1 // SPDX-License-Identifier: GPL-2.0
2 // SPI interface for ChromeOS Embedded Controller
4 // Copyright (C) 2012 Google, Inc
6 #include <linux/delay.h>
7 #include <linux/kernel.h>
8 #include <linux/module.h>
10 #include <linux/platform_data/cros_ec_commands.h>
11 #include <linux/platform_data/cros_ec_proto.h>
12 #include <linux/platform_device.h>
13 #include <linux/slab.h>
14 #include <linux/spi/spi.h>
15 #include <uapi/linux/sched/types.h>
19 /* The header byte, which follows the preamble */
20 #define EC_MSG_HEADER 0xec
23 * Number of EC preamble bytes we read at a time. Since it takes
24 * about 400-500us for the EC to respond there is not a lot of
25 * point in tuning this. If the EC could respond faster then
26 * we could increase this so that might expect the preamble and
27 * message to occur in a single transaction. However, the maximum
28 * SPI transfer size is 256 bytes, so at 5MHz we need a response
29 * time of perhaps <320us (200 bytes / 1600 bits).
31 #define EC_MSG_PREAMBLE_COUNT 32
34 * Allow for a long time for the EC to respond. We support i2c
35 * tunneling and support fairly long messages for the tunnel (249
36 * bytes long at the moment). If we're talking to a 100 kHz device
37 * on the other end and need to transfer ~256 bytes, then we need:
38 * 10 us/bit * ~10 bits/byte * ~256 bytes = ~25ms
40 * We'll wait 8 times that to handle clock stretching and other
41 * paranoia. Note that some battery gas gauge ICs claim to have a
42 * clock stretch of 144ms in rare situations. That's incentive for
43 * not directly passing i2c through, but it's too late for that for
46 * It's pretty unlikely that we'll really see a 249 byte tunnel in
47 * anything other than testing. If this was more common we might
48 * consider having slow commands like this require a GET_STATUS
49 * wait loop. The 'flash write' command would be another candidate
50 * for this, clocking in at 2-3ms.
52 #define EC_MSG_DEADLINE_MS 200
55 * Time between raising the SPI chip select (for the end of a
56 * transaction) and dropping it again (for the next transaction).
57 * If we go too fast, the EC will miss the transaction. We know that we
58 * need at least 70 us with the 16 MHz STM32 EC, so go with 200 us to be
61 #define EC_SPI_RECOVERY_TIME_NS (200 * 1000)
64 * struct cros_ec_spi - information about a SPI-connected EC
66 * @spi: SPI device we are connected to
67 * @last_transfer_ns: time that we last finished a transfer.
68 * @start_of_msg_delay: used to set the delay_usecs on the spi_transfer that
69 * is sent when we want to turn on CS at the start of a transaction.
70 * @end_of_msg_delay: used to set the delay_usecs on the spi_transfer that
71 * is sent when we want to turn off CS at the end of a transaction.
72 * @high_pri_worker: Used to schedule high priority work.
75 struct spi_device *spi;
77 unsigned int start_of_msg_delay;
78 unsigned int end_of_msg_delay;
79 struct kthread_worker *high_pri_worker;
82 typedef int (*cros_ec_xfer_fn_t) (struct cros_ec_device *ec_dev,
83 struct cros_ec_command *ec_msg);
86 * struct cros_ec_xfer_work_params - params for our high priority workers
88 * @work: The work_struct needed to queue work
89 * @fn: The function to use to transfer
90 * @ec_dev: ChromeOS EC device
91 * @ec_msg: Message to transfer
92 * @ret: The return value of the function
95 struct cros_ec_xfer_work_params {
96 struct kthread_work work;
98 struct cros_ec_device *ec_dev;
99 struct cros_ec_command *ec_msg;
103 static void debug_packet(struct device *dev, const char *name, u8 *ptr,
109 dev_dbg(dev, "%s: ", name);
110 for (i = 0; i < len; i++)
111 pr_cont(" %02x", ptr[i]);
117 static int terminate_request(struct cros_ec_device *ec_dev)
119 struct cros_ec_spi *ec_spi = ec_dev->priv;
120 struct spi_message msg;
121 struct spi_transfer trans;
125 * Turn off CS, possibly adding a delay to ensure the rising edge
126 * doesn't come too soon after the end of the data.
128 spi_message_init(&msg);
129 memset(&trans, 0, sizeof(trans));
130 trans.delay.value = ec_spi->end_of_msg_delay;
131 trans.delay.unit = SPI_DELAY_UNIT_USECS;
132 spi_message_add_tail(&trans, &msg);
134 ret = spi_sync_locked(ec_spi->spi, &msg);
136 /* Reset end-of-response timer */
137 ec_spi->last_transfer_ns = ktime_get_ns();
140 "cs-deassert spi transfer failed: %d\n",
148 * receive_n_bytes - receive n bytes from the EC.
150 * Assumes buf is a pointer into the ec_dev->din buffer
152 * @ec_dev: ChromeOS EC device.
153 * @buf: Pointer to the buffer receiving the data.
154 * @n: Number of bytes received.
156 static int receive_n_bytes(struct cros_ec_device *ec_dev, u8 *buf, int n)
158 struct cros_ec_spi *ec_spi = ec_dev->priv;
159 struct spi_transfer trans;
160 struct spi_message msg;
163 BUG_ON(buf - ec_dev->din + n > ec_dev->din_size);
165 memset(&trans, 0, sizeof(trans));
170 spi_message_init(&msg);
171 spi_message_add_tail(&trans, &msg);
172 ret = spi_sync_locked(ec_spi->spi, &msg);
174 dev_err(ec_dev->dev, "spi transfer failed: %d\n", ret);
180 * cros_ec_spi_receive_packet - Receive a packet from the EC.
182 * This function has two phases: reading the preamble bytes (since if we read
183 * data from the EC before it is ready to send, we just get preamble) and
184 * reading the actual message.
186 * The received data is placed into ec_dev->din.
188 * @ec_dev: ChromeOS EC device
189 * @need_len: Number of message bytes we need to read
191 static int cros_ec_spi_receive_packet(struct cros_ec_device *ec_dev,
194 struct ec_host_response *response;
197 unsigned long deadline;
200 BUG_ON(ec_dev->din_size < EC_MSG_PREAMBLE_COUNT);
202 /* Receive data until we see the header byte */
203 deadline = jiffies + msecs_to_jiffies(EC_MSG_DEADLINE_MS);
205 unsigned long start_jiffies = jiffies;
207 ret = receive_n_bytes(ec_dev,
209 EC_MSG_PREAMBLE_COUNT);
214 for (end = ptr + EC_MSG_PREAMBLE_COUNT; ptr != end; ptr++) {
215 if (*ptr == EC_SPI_FRAME_START) {
216 dev_dbg(ec_dev->dev, "msg found at %zd\n",
225 * Use the time at the start of the loop as a timeout. This
226 * gives us one last shot at getting the transfer and is useful
227 * in case we got context switched out for a while.
229 if (time_after(start_jiffies, deadline)) {
230 dev_warn(ec_dev->dev, "EC failed to respond in time\n");
236 * ptr now points to the header byte. Copy any valid data to the
237 * start of our buffer
240 BUG_ON(todo < 0 || todo > ec_dev->din_size);
241 todo = min(todo, need_len);
242 memmove(ec_dev->din, ptr, todo);
243 ptr = ec_dev->din + todo;
244 dev_dbg(ec_dev->dev, "need %d, got %d bytes from preamble\n",
248 /* If the entire response struct wasn't read, get the rest of it. */
249 if (todo < sizeof(*response)) {
250 ret = receive_n_bytes(ec_dev, ptr, sizeof(*response) - todo);
253 ptr += (sizeof(*response) - todo);
254 todo = sizeof(*response);
257 response = (struct ec_host_response *)ec_dev->din;
259 /* Abort if data_len is too large. */
260 if (response->data_len > ec_dev->din_size)
263 /* Receive data until we have it all */
264 while (need_len > 0) {
266 * We can't support transfers larger than the SPI FIFO size
267 * unless we have DMA. We don't have DMA on the ISP SPI ports
268 * for Exynos. We need a way of asking SPI driver for
269 * maximum-supported transfer size.
271 todo = min(need_len, 256);
272 dev_dbg(ec_dev->dev, "loop, todo=%d, need_len=%d, ptr=%zd\n",
273 todo, need_len, ptr - ec_dev->din);
275 ret = receive_n_bytes(ec_dev, ptr, todo);
283 dev_dbg(ec_dev->dev, "loop done, ptr=%zd\n", ptr - ec_dev->din);
289 * cros_ec_spi_receive_response - Receive a response from the EC.
291 * This function has two phases: reading the preamble bytes (since if we read
292 * data from the EC before it is ready to send, we just get preamble) and
293 * reading the actual message.
295 * The received data is placed into ec_dev->din.
297 * @ec_dev: ChromeOS EC device
298 * @need_len: Number of message bytes we need to read
300 static int cros_ec_spi_receive_response(struct cros_ec_device *ec_dev,
305 unsigned long deadline;
308 BUG_ON(ec_dev->din_size < EC_MSG_PREAMBLE_COUNT);
310 /* Receive data until we see the header byte */
311 deadline = jiffies + msecs_to_jiffies(EC_MSG_DEADLINE_MS);
313 unsigned long start_jiffies = jiffies;
315 ret = receive_n_bytes(ec_dev,
317 EC_MSG_PREAMBLE_COUNT);
322 for (end = ptr + EC_MSG_PREAMBLE_COUNT; ptr != end; ptr++) {
323 if (*ptr == EC_SPI_FRAME_START) {
324 dev_dbg(ec_dev->dev, "msg found at %zd\n",
333 * Use the time at the start of the loop as a timeout. This
334 * gives us one last shot at getting the transfer and is useful
335 * in case we got context switched out for a while.
337 if (time_after(start_jiffies, deadline)) {
338 dev_warn(ec_dev->dev, "EC failed to respond in time\n");
344 * ptr now points to the header byte. Copy any valid data to the
345 * start of our buffer
348 BUG_ON(todo < 0 || todo > ec_dev->din_size);
349 todo = min(todo, need_len);
350 memmove(ec_dev->din, ptr, todo);
351 ptr = ec_dev->din + todo;
352 dev_dbg(ec_dev->dev, "need %d, got %d bytes from preamble\n",
356 /* Receive data until we have it all */
357 while (need_len > 0) {
359 * We can't support transfers larger than the SPI FIFO size
360 * unless we have DMA. We don't have DMA on the ISP SPI ports
361 * for Exynos. We need a way of asking SPI driver for
362 * maximum-supported transfer size.
364 todo = min(need_len, 256);
365 dev_dbg(ec_dev->dev, "loop, todo=%d, need_len=%d, ptr=%zd\n",
366 todo, need_len, ptr - ec_dev->din);
368 ret = receive_n_bytes(ec_dev, ptr, todo);
372 debug_packet(ec_dev->dev, "interim", ptr, todo);
377 dev_dbg(ec_dev->dev, "loop done, ptr=%zd\n", ptr - ec_dev->din);
383 * do_cros_ec_pkt_xfer_spi - Transfer a packet over SPI and receive the reply
385 * @ec_dev: ChromeOS EC device
386 * @ec_msg: Message to transfer
388 static int do_cros_ec_pkt_xfer_spi(struct cros_ec_device *ec_dev,
389 struct cros_ec_command *ec_msg)
391 struct ec_host_response *response;
392 struct cros_ec_spi *ec_spi = ec_dev->priv;
393 struct spi_transfer trans, trans_delay;
394 struct spi_message msg;
400 int ret = 0, final_ret;
403 len = cros_ec_prepare_tx(ec_dev, ec_msg);
404 dev_dbg(ec_dev->dev, "prepared, len=%d\n", len);
406 /* If it's too soon to do another transaction, wait */
407 delay = ktime_get_ns() - ec_spi->last_transfer_ns;
408 if (delay < EC_SPI_RECOVERY_TIME_NS)
409 ndelay(EC_SPI_RECOVERY_TIME_NS - delay);
411 rx_buf = kzalloc(len, GFP_KERNEL);
415 spi_bus_lock(ec_spi->spi->master);
418 * Leave a gap between CS assertion and clocking of data to allow the
421 spi_message_init(&msg);
422 if (ec_spi->start_of_msg_delay) {
423 memset(&trans_delay, 0, sizeof(trans_delay));
424 trans_delay.delay.value = ec_spi->start_of_msg_delay;
425 trans_delay.delay.unit = SPI_DELAY_UNIT_USECS;
426 spi_message_add_tail(&trans_delay, &msg);
429 /* Transmit phase - send our message */
430 memset(&trans, 0, sizeof(trans));
431 trans.tx_buf = ec_dev->dout;
432 trans.rx_buf = rx_buf;
435 spi_message_add_tail(&trans, &msg);
436 ret = spi_sync_locked(ec_spi->spi, &msg);
438 /* Get the response */
440 /* Verify that EC can process command */
441 for (i = 0; i < len; i++) {
444 * Seeing the PAST_END, RX_BAD_DATA, or NOT_READY
445 * markers are all signs that the EC didn't fully
446 * receive our command. e.g., if the EC is flashing
447 * itself, it can't respond to any commands and instead
448 * clocks out EC_SPI_PAST_END from its SPI hardware
449 * buffer. Similar occurrences can happen if the AP is
450 * too slow to clock out data after asserting CS -- the
451 * EC will abort and fill its buffer with
452 * EC_SPI_RX_BAD_DATA.
454 * In all cases, these errors should be safe to retry.
455 * Report -EAGAIN and let the caller decide what to do
458 if (rx_byte == EC_SPI_PAST_END ||
459 rx_byte == EC_SPI_RX_BAD_DATA ||
460 rx_byte == EC_SPI_NOT_READY) {
468 ret = cros_ec_spi_receive_packet(ec_dev,
469 ec_msg->insize + sizeof(*response));
470 else if (ret != -EAGAIN)
471 dev_err(ec_dev->dev, "spi transfer failed: %d\n", ret);
473 final_ret = terminate_request(ec_dev);
475 spi_bus_unlock(ec_spi->spi->master);
484 /* check response error code */
485 response = (struct ec_host_response *)ptr;
486 ec_msg->result = response->result;
488 ret = cros_ec_check_result(ec_dev, ec_msg);
492 len = response->data_len;
494 if (len > ec_msg->insize) {
495 dev_err(ec_dev->dev, "packet too long (%d bytes, expected %d)",
496 len, ec_msg->insize);
501 for (i = 0; i < sizeof(*response); i++)
504 /* copy response packet payload and compute checksum */
505 memcpy(ec_msg->data, ptr + sizeof(*response), len);
506 for (i = 0; i < len; i++)
507 sum += ec_msg->data[i];
511 "bad packet checksum, calculated %x\n",
520 if (ec_msg->command == EC_CMD_REBOOT_EC)
521 msleep(EC_REBOOT_DELAY_MS);
527 * do_cros_ec_cmd_xfer_spi - Transfer a message over SPI and receive the reply
529 * @ec_dev: ChromeOS EC device
530 * @ec_msg: Message to transfer
532 static int do_cros_ec_cmd_xfer_spi(struct cros_ec_device *ec_dev,
533 struct cros_ec_command *ec_msg)
535 struct cros_ec_spi *ec_spi = ec_dev->priv;
536 struct spi_transfer trans;
537 struct spi_message msg;
543 int ret = 0, final_ret;
546 len = cros_ec_prepare_tx(ec_dev, ec_msg);
547 dev_dbg(ec_dev->dev, "prepared, len=%d\n", len);
549 /* If it's too soon to do another transaction, wait */
550 delay = ktime_get_ns() - ec_spi->last_transfer_ns;
551 if (delay < EC_SPI_RECOVERY_TIME_NS)
552 ndelay(EC_SPI_RECOVERY_TIME_NS - delay);
554 rx_buf = kzalloc(len, GFP_KERNEL);
558 spi_bus_lock(ec_spi->spi->master);
560 /* Transmit phase - send our message */
561 debug_packet(ec_dev->dev, "out", ec_dev->dout, len);
562 memset(&trans, 0, sizeof(trans));
563 trans.tx_buf = ec_dev->dout;
564 trans.rx_buf = rx_buf;
567 spi_message_init(&msg);
568 spi_message_add_tail(&trans, &msg);
569 ret = spi_sync_locked(ec_spi->spi, &msg);
571 /* Get the response */
573 /* Verify that EC can process command */
574 for (i = 0; i < len; i++) {
576 /* See comments in cros_ec_pkt_xfer_spi() */
577 if (rx_byte == EC_SPI_PAST_END ||
578 rx_byte == EC_SPI_RX_BAD_DATA ||
579 rx_byte == EC_SPI_NOT_READY) {
587 ret = cros_ec_spi_receive_response(ec_dev,
588 ec_msg->insize + EC_MSG_TX_PROTO_BYTES);
589 else if (ret != -EAGAIN)
590 dev_err(ec_dev->dev, "spi transfer failed: %d\n", ret);
592 final_ret = terminate_request(ec_dev);
594 spi_bus_unlock(ec_spi->spi->master);
603 /* check response error code */
604 ec_msg->result = ptr[0];
605 ret = cros_ec_check_result(ec_dev, ec_msg);
610 sum = ptr[0] + ptr[1];
611 if (len > ec_msg->insize) {
612 dev_err(ec_dev->dev, "packet too long (%d bytes, expected %d)",
613 len, ec_msg->insize);
618 /* copy response packet payload and compute checksum */
619 for (i = 0; i < len; i++) {
622 ec_msg->data[i] = ptr[i + 2];
626 debug_packet(ec_dev->dev, "in", ptr, len + 3);
628 if (sum != ptr[len + 2]) {
630 "bad packet checksum, expected %02x, got %02x\n",
639 if (ec_msg->command == EC_CMD_REBOOT_EC)
640 msleep(EC_REBOOT_DELAY_MS);
645 static void cros_ec_xfer_high_pri_work(struct kthread_work *work)
647 struct cros_ec_xfer_work_params *params;
649 params = container_of(work, struct cros_ec_xfer_work_params, work);
650 params->ret = params->fn(params->ec_dev, params->ec_msg);
653 static int cros_ec_xfer_high_pri(struct cros_ec_device *ec_dev,
654 struct cros_ec_command *ec_msg,
655 cros_ec_xfer_fn_t fn)
657 struct cros_ec_spi *ec_spi = ec_dev->priv;
658 struct cros_ec_xfer_work_params params = {
659 .work = KTHREAD_WORK_INIT(params.work,
660 cros_ec_xfer_high_pri_work),
667 * This looks a bit ridiculous. Why do the work on a
668 * different thread if we're just going to block waiting for
669 * the thread to finish? The key here is that the thread is
670 * running at high priority but the calling context might not
671 * be. We need to be at high priority to avoid getting
672 * context switched out for too long and the EC giving up on
675 kthread_queue_work(ec_spi->high_pri_worker, ¶ms.work);
676 kthread_flush_work(¶ms.work);
681 static int cros_ec_pkt_xfer_spi(struct cros_ec_device *ec_dev,
682 struct cros_ec_command *ec_msg)
684 return cros_ec_xfer_high_pri(ec_dev, ec_msg, do_cros_ec_pkt_xfer_spi);
687 static int cros_ec_cmd_xfer_spi(struct cros_ec_device *ec_dev,
688 struct cros_ec_command *ec_msg)
690 return cros_ec_xfer_high_pri(ec_dev, ec_msg, do_cros_ec_cmd_xfer_spi);
693 static void cros_ec_spi_dt_probe(struct cros_ec_spi *ec_spi, struct device *dev)
695 struct device_node *np = dev->of_node;
699 ret = of_property_read_u32(np, "google,cros-ec-spi-pre-delay", &val);
701 ec_spi->start_of_msg_delay = val;
703 ret = of_property_read_u32(np, "google,cros-ec-spi-msg-delay", &val);
705 ec_spi->end_of_msg_delay = val;
708 static void cros_ec_spi_high_pri_release(void *worker)
710 kthread_destroy_worker(worker);
713 static int cros_ec_spi_devm_high_pri_alloc(struct device *dev,
714 struct cros_ec_spi *ec_spi)
718 ec_spi->high_pri_worker =
719 kthread_create_worker(0, "cros_ec_spi_high_pri");
721 if (IS_ERR(ec_spi->high_pri_worker)) {
722 err = PTR_ERR(ec_spi->high_pri_worker);
723 dev_err(dev, "Can't create cros_ec high pri worker: %d\n", err);
727 err = devm_add_action_or_reset(dev, cros_ec_spi_high_pri_release,
728 ec_spi->high_pri_worker);
732 sched_set_fifo(ec_spi->high_pri_worker->task);
737 static int cros_ec_spi_probe(struct spi_device *spi)
739 struct device *dev = &spi->dev;
740 struct cros_ec_device *ec_dev;
741 struct cros_ec_spi *ec_spi;
744 spi->bits_per_word = 8;
746 err = spi_setup(spi);
750 ec_spi = devm_kzalloc(dev, sizeof(*ec_spi), GFP_KERNEL);
754 ec_dev = devm_kzalloc(dev, sizeof(*ec_dev), GFP_KERNEL);
758 /* Check for any DT properties */
759 cros_ec_spi_dt_probe(ec_spi, dev);
761 spi_set_drvdata(spi, ec_dev);
763 ec_dev->priv = ec_spi;
764 ec_dev->irq = spi->irq;
765 ec_dev->cmd_xfer = cros_ec_cmd_xfer_spi;
766 ec_dev->pkt_xfer = cros_ec_pkt_xfer_spi;
767 ec_dev->phys_name = dev_name(&ec_spi->spi->dev);
768 ec_dev->din_size = EC_MSG_PREAMBLE_COUNT +
769 sizeof(struct ec_host_response) +
770 sizeof(struct ec_response_get_protocol_info);
771 ec_dev->dout_size = sizeof(struct ec_host_request);
773 ec_spi->last_transfer_ns = ktime_get_ns();
775 err = cros_ec_spi_devm_high_pri_alloc(dev, ec_spi);
779 err = cros_ec_register(ec_dev);
781 dev_err(dev, "cannot register EC\n");
785 device_init_wakeup(&spi->dev, true);
790 static int cros_ec_spi_remove(struct spi_device *spi)
792 struct cros_ec_device *ec_dev = spi_get_drvdata(spi);
794 return cros_ec_unregister(ec_dev);
797 #ifdef CONFIG_PM_SLEEP
798 static int cros_ec_spi_suspend(struct device *dev)
800 struct cros_ec_device *ec_dev = dev_get_drvdata(dev);
802 return cros_ec_suspend(ec_dev);
805 static int cros_ec_spi_resume(struct device *dev)
807 struct cros_ec_device *ec_dev = dev_get_drvdata(dev);
809 return cros_ec_resume(ec_dev);
813 static SIMPLE_DEV_PM_OPS(cros_ec_spi_pm_ops, cros_ec_spi_suspend,
816 static const struct of_device_id cros_ec_spi_of_match[] = {
817 { .compatible = "google,cros-ec-spi", },
820 MODULE_DEVICE_TABLE(of, cros_ec_spi_of_match);
822 static const struct spi_device_id cros_ec_spi_id[] = {
823 { "cros-ec-spi", 0 },
826 MODULE_DEVICE_TABLE(spi, cros_ec_spi_id);
828 static struct spi_driver cros_ec_driver_spi = {
830 .name = "cros-ec-spi",
831 .of_match_table = cros_ec_spi_of_match,
832 .pm = &cros_ec_spi_pm_ops,
834 .probe = cros_ec_spi_probe,
835 .remove = cros_ec_spi_remove,
836 .id_table = cros_ec_spi_id,
839 module_spi_driver(cros_ec_driver_spi);
841 MODULE_LICENSE("GPL v2");
842 MODULE_DESCRIPTION("SPI interface for ChromeOS Embedded Controller");