drivers/pinctrl/uniphier/pinctrl-uniphier-core.c

   1 /*
   2  * Copyright (C) 2015-2017 Socionext Inc.
   3  *   Author: Masahiro Yamada <yamada.masahiro@socionext.com>
   4  *
   5  * This program is free software; you can redistribute it and/or modify
   6  * it under the terms of the GNU General Public License as published by
   7  * the Free Software Foundation; either version 2 of the License, or
   8  * (at your option) any later version.
   9  *
  10  * This program is distributed in the hope that it will be useful,
  11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13  * GNU General Public License for more details.
  14  */
  15
  16 #include <linux/list.h>
  17 #include <linux/mfd/syscon.h>
  18 #include <linux/of.h>
  19 #include <linux/pinctrl/pinconf.h>
  20 #include <linux/pinctrl/pinconf-generic.h>
  21 #include <linux/pinctrl/pinctrl.h>
  22 #include <linux/pinctrl/pinmux.h>
  23 #include <linux/platform_device.h>
  24 #include <linux/regmap.h>
  25
  26 #include "../core.h"
  27 #include "../pinctrl-utils.h"
  28 #include "pinctrl-uniphier.h"
  29
  30 #define UNIPHIER_PINCTRL_PINMUX_BASE    0x1000
  31 #define UNIPHIER_PINCTRL_LOAD_PINMUX    0x1700
  32 #define UNIPHIER_PINCTRL_DRVCTRL_BASE   0x1800
  33 #define UNIPHIER_PINCTRL_DRV2CTRL_BASE  0x1900
  34 #define UNIPHIER_PINCTRL_DRV3CTRL_BASE  0x1980
  35 #define UNIPHIER_PINCTRL_PUPDCTRL_BASE  0x1a00
  36 #define UNIPHIER_PINCTRL_IECTRL_BASE    0x1d00
  37
  38 struct uniphier_pinctrl_reg_region {
  39         struct list_head node;
  40         unsigned int base;
  41         unsigned int nregs;
  42         u32 vals[0];
  43 };
  44
  45 struct uniphier_pinctrl_priv {
  46         struct pinctrl_desc pctldesc;
  47         struct pinctrl_dev *pctldev;
  48         struct regmap *regmap;
  49         struct uniphier_pinctrl_socdata *socdata;
  50         struct list_head reg_regions;
  51 };
  52
  53 static int uniphier_pctl_get_groups_count(struct pinctrl_dev *pctldev)
  54 {
  55         struct uniphier_pinctrl_priv *priv = pinctrl_dev_get_drvdata(pctldev);
  56
  57         return priv->socdata->groups_count;
  58 }
  59
  60 static const char *uniphier_pctl_get_group_name(struct pinctrl_dev *pctldev,
  61                                                 unsigned selector)
  62 {
  63         struct uniphier_pinctrl_priv *priv = pinctrl_dev_get_drvdata(pctldev);
  64
  65         return priv->socdata->groups[selector].name;
  66 }
  67
  68 static int uniphier_pctl_get_group_pins(struct pinctrl_dev *pctldev,
  69                                         unsigned selector,
  70                                         const unsigned **pins,
  71                                         unsigned *num_pins)
  72 {
  73         struct uniphier_pinctrl_priv *priv = pinctrl_dev_get_drvdata(pctldev);
  74
  75         *pins = priv->socdata->groups[selector].pins;
  76         *num_pins = priv->socdata->groups[selector].num_pins;
  77
  78         return 0;
  79 }
  80
  81 #ifdef CONFIG_DEBUG_FS
  82 static void uniphier_pctl_pin_dbg_show(struct pinctrl_dev *pctldev,
  83                                        struct seq_file *s, unsigned offset)
  84 {
  85         const struct pin_desc *desc = pin_desc_get(pctldev, offset);
  86         const char *pull_dir, *drv_type;
  87
  88         switch (uniphier_pin_get_pull_dir(desc->drv_data)) {
  89         case UNIPHIER_PIN_PULL_UP:
  90                 pull_dir = "UP";
  91                 break;
  92         case UNIPHIER_PIN_PULL_DOWN:
  93                 pull_dir = "DOWN";
  94                 break;
  95         case UNIPHIER_PIN_PULL_UP_FIXED:
  96                 pull_dir = "UP(FIXED)";
  97                 break;
  98         case UNIPHIER_PIN_PULL_DOWN_FIXED:
  99                 pull_dir = "DOWN(FIXED)";
 100                 break;
 101         case UNIPHIER_PIN_PULL_NONE:
 102                 pull_dir = "NONE";
 103                 break;
 104         default:
 105                 BUG();
 106         }
 107
 108         switch (uniphier_pin_get_drv_type(desc->drv_data)) {
 109         case UNIPHIER_PIN_DRV_1BIT:
 110                 drv_type = "4/8(mA)";
 111                 break;
 112         case UNIPHIER_PIN_DRV_2BIT:
 113                 drv_type = "8/12/16/20(mA)";
 114                 break;
 115         case UNIPHIER_PIN_DRV_3BIT:
 116                 drv_type = "4/5/7/9/11/12/14/16(mA)";
 117                 break;
 118         case UNIPHIER_PIN_DRV_FIXED4:
 119                 drv_type = "4(mA)";
 120                 break;
 121         case UNIPHIER_PIN_DRV_FIXED5:
 122                 drv_type = "5(mA)";
 123                 break;
 124         case UNIPHIER_PIN_DRV_FIXED8:
 125                 drv_type = "8(mA)";
 126                 break;
 127         case UNIPHIER_PIN_DRV_NONE:
 128                 drv_type = "NONE";
 129                 break;
 130         default:
 131                 BUG();
 132         }
 133
 134         seq_printf(s, " PULL_DIR=%s  DRV_TYPE=%s", pull_dir, drv_type);
 135 }
 136 #endif
 137
 138 static const struct pinctrl_ops uniphier_pctlops = {
 139         .get_groups_count = uniphier_pctl_get_groups_count,
 140         .get_group_name = uniphier_pctl_get_group_name,
 141         .get_group_pins = uniphier_pctl_get_group_pins,
 142 #ifdef CONFIG_DEBUG_FS
 143         .pin_dbg_show = uniphier_pctl_pin_dbg_show,
 144 #endif
 145         .dt_node_to_map = pinconf_generic_dt_node_to_map_all,
 146         .dt_free_map = pinctrl_utils_free_map,
 147 };
 148
 149 static int uniphier_conf_pin_bias_get(struct pinctrl_dev *pctldev,
 150                                       unsigned int pin,
 151                                       enum pin_config_param param)
 152 {
 153         struct uniphier_pinctrl_priv *priv = pinctrl_dev_get_drvdata(pctldev);
 154         const struct pin_desc *desc = pin_desc_get(pctldev, pin);
 155         enum uniphier_pin_pull_dir pull_dir =
 156                                 uniphier_pin_get_pull_dir(desc->drv_data);
 157         unsigned int pupdctrl, reg, shift, val;
 158         unsigned int expected = 1;
 159         int ret;
 160
 161         switch (param) {
 162         case PIN_CONFIG_BIAS_DISABLE:
 163                 if (pull_dir == UNIPHIER_PIN_PULL_NONE)
 164                         return 0;
 165                 if (pull_dir == UNIPHIER_PIN_PULL_UP_FIXED ||
 166                     pull_dir == UNIPHIER_PIN_PULL_DOWN_FIXED)
 167                         return -EINVAL;
 168                 expected = 0;
 169                 break;
 170         case PIN_CONFIG_BIAS_PULL_UP:
 171                 if (pull_dir == UNIPHIER_PIN_PULL_UP_FIXED)
 172                         return 0;
 173                 if (pull_dir != UNIPHIER_PIN_PULL_UP)
 174                         return -EINVAL;
 175                 break;
 176         case PIN_CONFIG_BIAS_PULL_DOWN:
 177                 if (pull_dir == UNIPHIER_PIN_PULL_DOWN_FIXED)
 178                         return 0;
 179                 if (pull_dir != UNIPHIER_PIN_PULL_DOWN)
 180                         return -EINVAL;
 181                 break;
 182         default:
 183                 BUG();
 184         }
 185
 186         pupdctrl = uniphier_pin_get_pupdctrl(desc->drv_data);
 187
 188         reg = UNIPHIER_PINCTRL_PUPDCTRL_BASE + pupdctrl / 32 * 4;
 189         shift = pupdctrl % 32;
 190
 191         ret = regmap_read(priv->regmap, reg, &val);
 192         if (ret)
 193                 return ret;
 194
 195         val = (val >> shift) & 1;
 196
 197         return (val == expected) ? 0 : -EINVAL;
 198 }
 199
 200 static int uniphier_conf_pin_drive_get(struct pinctrl_dev *pctldev,
 201                                        unsigned int pin, u32 *strength)
 202 {
 203         struct uniphier_pinctrl_priv *priv = pinctrl_dev_get_drvdata(pctldev);
 204         const struct pin_desc *desc = pin_desc_get(pctldev, pin);
 205         enum uniphier_pin_drv_type type =
 206                                 uniphier_pin_get_drv_type(desc->drv_data);
 207         const unsigned int strength_1bit[] = {4, 8};
 208         const unsigned int strength_2bit[] = {8, 12, 16, 20};
 209         const unsigned int strength_3bit[] = {4, 5, 7, 9, 11, 12, 14, 16};
 210         const unsigned int *supported_strength;
 211         unsigned int drvctrl, reg, shift, mask, width, val;
 212         int ret;
 213
 214         switch (type) {
 215         case UNIPHIER_PIN_DRV_1BIT:
 216                 supported_strength = strength_1bit;
 217                 reg = UNIPHIER_PINCTRL_DRVCTRL_BASE;
 218                 width = 1;
 219                 break;
 220         case UNIPHIER_PIN_DRV_2BIT:
 221                 supported_strength = strength_2bit;
 222                 reg = UNIPHIER_PINCTRL_DRV2CTRL_BASE;
 223                 width = 2;
 224                 break;
 225         case UNIPHIER_PIN_DRV_3BIT:
 226                 supported_strength = strength_3bit;
 227                 reg = UNIPHIER_PINCTRL_DRV3CTRL_BASE;
 228                 width = 4;
 229                 break;
 230         case UNIPHIER_PIN_DRV_FIXED4:
 231                 *strength = 4;
 232                 return 0;
 233         case UNIPHIER_PIN_DRV_FIXED5:
 234                 *strength = 5;
 235                 return 0;
 236         case UNIPHIER_PIN_DRV_FIXED8:
 237                 *strength = 8;
 238                 return 0;
 239         default:
 240                 /* drive strength control is not supported for this pin */
 241                 return -EINVAL;
 242         }
 243
 244         drvctrl = uniphier_pin_get_drvctrl(desc->drv_data);
 245         drvctrl *= width;
 246
 247         reg += drvctrl / 32 * 4;
 248         shift = drvctrl % 32;
 249         mask = (1U << width) - 1;
 250
 251         ret = regmap_read(priv->regmap, reg, &val);
 252         if (ret)
 253                 return ret;
 254
 255         *strength = supported_strength[(val >> shift) & mask];
 256
 257         return 0;
 258 }
 259
 260 static int uniphier_conf_pin_input_enable_get(struct pinctrl_dev *pctldev,
 261                                               unsigned int pin)
 262 {
 263         struct uniphier_pinctrl_priv *priv = pinctrl_dev_get_drvdata(pctldev);
 264         const struct pin_desc *desc = pin_desc_get(pctldev, pin);
 265         unsigned int iectrl = uniphier_pin_get_iectrl(desc->drv_data);
 266         unsigned int reg, mask, val;
 267         int ret;
 268
 269         if (iectrl == UNIPHIER_PIN_IECTRL_NONE)
 270                 /* This pin is always input-enabled. */
 271                 return 0;
 272
 273         if (priv->socdata->caps & UNIPHIER_PINCTRL_CAPS_PERPIN_IECTRL)
 274                 iectrl = pin;
 275
 276         reg = UNIPHIER_PINCTRL_IECTRL_BASE + iectrl / 32 * 4;
 277         mask = BIT(iectrl % 32);
 278
 279         ret = regmap_read(priv->regmap, reg, &val);
 280         if (ret)
 281                 return ret;
 282
 283         return val & mask ? 0 : -EINVAL;
 284 }
 285
 286 static int uniphier_conf_pin_config_get(struct pinctrl_dev *pctldev,
 287                                         unsigned pin,
 288                                         unsigned long *configs)
 289 {
 290         enum pin_config_param param = pinconf_to_config_param(*configs);
 291         bool has_arg = false;
 292         u32 arg;
 293         int ret;
 294
 295         switch (param) {
 296         case PIN_CONFIG_BIAS_DISABLE:
 297         case PIN_CONFIG_BIAS_PULL_UP:
 298         case PIN_CONFIG_BIAS_PULL_DOWN:
 299                 ret = uniphier_conf_pin_bias_get(pctldev, pin, param);
 300                 break;
 301         case PIN_CONFIG_DRIVE_STRENGTH:
 302                 ret = uniphier_conf_pin_drive_get(pctldev, pin, &arg);
 303                 has_arg = true;
 304                 break;
 305         case PIN_CONFIG_INPUT_ENABLE:
 306                 ret = uniphier_conf_pin_input_enable_get(pctldev, pin);
 307                 break;
 308         default:
 309                 /* unsupported parameter */
 310                 ret = -EINVAL;
 311                 break;
 312         }
 313
 314         if (ret == 0 && has_arg)
 315                 *configs = pinconf_to_config_packed(param, arg);
 316
 317         return ret;
 318 }
 319
 320 static int uniphier_conf_pin_bias_set(struct pinctrl_dev *pctldev,
 321                                       unsigned int pin,
 322                                       enum pin_config_param param, u32 arg)
 323 {
 324         struct uniphier_pinctrl_priv *priv = pinctrl_dev_get_drvdata(pctldev);
 325         const struct pin_desc *desc = pin_desc_get(pctldev, pin);
 326         enum uniphier_pin_pull_dir pull_dir =
 327                                 uniphier_pin_get_pull_dir(desc->drv_data);
 328         unsigned int pupdctrl, reg, shift;
 329         unsigned int val = 1;
 330
 331         switch (param) {
 332         case PIN_CONFIG_BIAS_DISABLE:
 333                 if (pull_dir == UNIPHIER_PIN_PULL_NONE)
 334                         return 0;
 335                 if (pull_dir == UNIPHIER_PIN_PULL_UP_FIXED ||
 336                     pull_dir == UNIPHIER_PIN_PULL_DOWN_FIXED) {
 337                         dev_err(pctldev->dev,
 338                                 "can not disable pull register for pin %s\n",
 339                                 desc->name);
 340                         return -EINVAL;
 341                 }
 342                 val = 0;
 343                 break;
 344         case PIN_CONFIG_BIAS_PULL_UP:
 345                 if (pull_dir == UNIPHIER_PIN_PULL_UP_FIXED && arg != 0)
 346                         return 0;
 347                 if (pull_dir != UNIPHIER_PIN_PULL_UP) {
 348                         dev_err(pctldev->dev,
 349                                 "pull-up is unsupported for pin %s\n",
 350                                 desc->name);
 351                         return -EINVAL;
 352                 }
 353                 if (arg == 0) {
 354                         dev_err(pctldev->dev, "pull-up can not be total\n");
 355                         return -EINVAL;
 356                 }
 357                 break;
 358         case PIN_CONFIG_BIAS_PULL_DOWN:
 359                 if (pull_dir == UNIPHIER_PIN_PULL_DOWN_FIXED && arg != 0)
 360                         return 0;
 361                 if (pull_dir != UNIPHIER_PIN_PULL_DOWN) {
 362                         dev_err(pctldev->dev,
 363                                 "pull-down is unsupported for pin %s\n",
 364                                 desc->name);
 365                         return -EINVAL;
 366                 }
 367                 if (arg == 0) {
 368                         dev_err(pctldev->dev, "pull-down can not be total\n");
 369                         return -EINVAL;
 370                 }
 371                 break;
 372         case PIN_CONFIG_BIAS_PULL_PIN_DEFAULT:
 373                 if (pull_dir == UNIPHIER_PIN_PULL_NONE) {
 374                         dev_err(pctldev->dev,
 375                                 "pull-up/down is unsupported for pin %s\n",
 376                                 desc->name);
 377                         return -EINVAL;
 378                 }
 379
 380                 if (arg == 0)
 381                         return 0; /* configuration ingored */
 382                 break;
 383         default:
 384                 BUG();
 385         }
 386
 387         pupdctrl = uniphier_pin_get_pupdctrl(desc->drv_data);
 388
 389         reg = UNIPHIER_PINCTRL_PUPDCTRL_BASE + pupdctrl / 32 * 4;
 390         shift = pupdctrl % 32;
 391
 392         return regmap_update_bits(priv->regmap, reg, 1 << shift, val << shift);
 393 }
 394
 395 static int uniphier_conf_pin_drive_set(struct pinctrl_dev *pctldev,
 396                                        unsigned int pin, u32 strength)
 397 {
 398         struct uniphier_pinctrl_priv *priv = pinctrl_dev_get_drvdata(pctldev);
 399         const struct pin_desc *desc = pin_desc_get(pctldev, pin);
 400         enum uniphier_pin_drv_type type =
 401                                 uniphier_pin_get_drv_type(desc->drv_data);
 402         const unsigned int strength_1bit[] = {4, 8, -1};
 403         const unsigned int strength_2bit[] = {8, 12, 16, 20, -1};
 404         const unsigned int strength_3bit[] = {4, 5, 7, 9, 11, 12, 14, 16, -1};
 405         const unsigned int *supported_strength;
 406         unsigned int drvctrl, reg, shift, mask, width, val;
 407
 408         switch (type) {
 409         case UNIPHIER_PIN_DRV_1BIT:
 410                 supported_strength = strength_1bit;
 411                 reg = UNIPHIER_PINCTRL_DRVCTRL_BASE;
 412                 width = 1;
 413                 break;
 414         case UNIPHIER_PIN_DRV_2BIT:
 415                 supported_strength = strength_2bit;
 416                 reg = UNIPHIER_PINCTRL_DRV2CTRL_BASE;
 417                 width = 2;
 418                 break;
 419         case UNIPHIER_PIN_DRV_3BIT:
 420                 supported_strength = strength_3bit;
 421                 reg = UNIPHIER_PINCTRL_DRV3CTRL_BASE;
 422                 width = 4;
 423                 break;
 424         default:
 425                 dev_err(pctldev->dev,
 426                         "cannot change drive strength for pin %s\n",
 427                         desc->name);
 428                 return -EINVAL;
 429         }
 430
 431         for (val = 0; supported_strength[val] > 0; val++) {
 432                 if (supported_strength[val] > strength)
 433                         break;
 434         }
 435
 436         if (val == 0) {
 437                 dev_err(pctldev->dev,
 438                         "unsupported drive strength %u mA for pin %s\n",
 439                         strength, desc->name);
 440                 return -EINVAL;
 441         }
 442
 443         val--;
 444
 445         drvctrl = uniphier_pin_get_drvctrl(desc->drv_data);
 446         drvctrl *= width;
 447
 448         reg += drvctrl / 32 * 4;
 449         shift = drvctrl % 32;
 450         mask = (1U << width) - 1;
 451
 452         return regmap_update_bits(priv->regmap, reg,
 453                                   mask << shift, val << shift);
 454 }
 455
 456 static int uniphier_conf_pin_input_enable(struct pinctrl_dev *pctldev,
 457                                           unsigned int pin, u32 enable)
 458 {
 459         struct uniphier_pinctrl_priv *priv = pinctrl_dev_get_drvdata(pctldev);
 460         const struct pin_desc *desc = pin_desc_get(pctldev, pin);
 461         unsigned int iectrl = uniphier_pin_get_iectrl(desc->drv_data);
 462         unsigned int reg, mask;
 463
 464         /*
 465          * Multiple pins share one input enable, per-pin disabling is
 466          * impossible.
 467          */
 468         if (!(priv->socdata->caps & UNIPHIER_PINCTRL_CAPS_PERPIN_IECTRL) &&
 469             !enable)
 470                 return -EINVAL;
 471
 472         /* UNIPHIER_PIN_IECTRL_NONE means the pin is always input-enabled */
 473         if (iectrl == UNIPHIER_PIN_IECTRL_NONE)
 474                 return enable ? 0 : -EINVAL;
 475
 476         if (priv->socdata->caps & UNIPHIER_PINCTRL_CAPS_PERPIN_IECTRL)
 477                 iectrl = pin;
 478
 479         reg = UNIPHIER_PINCTRL_IECTRL_BASE + iectrl / 32 * 4;
 480         mask = BIT(iectrl % 32);
 481
 482         return regmap_update_bits(priv->regmap, reg, mask, enable ? mask : 0);
 483 }
 484
 485 static int uniphier_conf_pin_config_set(struct pinctrl_dev *pctldev,
 486                                         unsigned pin,
 487                                         unsigned long *configs,
 488                                         unsigned num_configs)
 489 {
 490         int i, ret;
 491
 492         for (i = 0; i < num_configs; i++) {
 493                 enum pin_config_param param =
 494                                         pinconf_to_config_param(configs[i]);
 495                 u32 arg = pinconf_to_config_argument(configs[i]);
 496
 497                 switch (param) {
 498                 case PIN_CONFIG_BIAS_DISABLE:
 499                 case PIN_CONFIG_BIAS_PULL_UP:
 500                 case PIN_CONFIG_BIAS_PULL_DOWN:
 501                 case PIN_CONFIG_BIAS_PULL_PIN_DEFAULT:
 502                         ret = uniphier_conf_pin_bias_set(pctldev, pin,
 503                                                          param, arg);
 504                         break;
 505                 case PIN_CONFIG_DRIVE_STRENGTH:
 506                         ret = uniphier_conf_pin_drive_set(pctldev, pin, arg);
 507                         break;
 508                 case PIN_CONFIG_INPUT_ENABLE:
 509                         ret = uniphier_conf_pin_input_enable(pctldev, pin, arg);
 510                         break;
 511                 default:
 512                         dev_err(pctldev->dev,
 513                                 "unsupported configuration parameter %u\n",
 514                                 param);
 515                         return -EINVAL;
 516                 }
 517
 518                 if (ret)
 519                         return ret;
 520         }
 521
 522         return 0;
 523 }
 524
 525 static int uniphier_conf_pin_config_group_set(struct pinctrl_dev *pctldev,
 526                                               unsigned selector,
 527                                               unsigned long *configs,
 528                                               unsigned num_configs)
 529 {
 530         struct uniphier_pinctrl_priv *priv = pinctrl_dev_get_drvdata(pctldev);
 531         const unsigned *pins = priv->socdata->groups[selector].pins;
 532         unsigned num_pins = priv->socdata->groups[selector].num_pins;
 533         int i, ret;
 534
 535         for (i = 0; i < num_pins; i++) {
 536                 ret = uniphier_conf_pin_config_set(pctldev, pins[i],
 537                                                    configs, num_configs);
 538                 if (ret)
 539                         return ret;
 540         }
 541
 542         return 0;
 543 }
 544
 545 static const struct pinconf_ops uniphier_confops = {
 546         .is_generic = true,
 547         .pin_config_get = uniphier_conf_pin_config_get,
 548         .pin_config_set = uniphier_conf_pin_config_set,
 549         .pin_config_group_set = uniphier_conf_pin_config_group_set,
 550 };
 551
 552 static int uniphier_pmx_get_functions_count(struct pinctrl_dev *pctldev)
 553 {
 554         struct uniphier_pinctrl_priv *priv = pinctrl_dev_get_drvdata(pctldev);
 555
 556         return priv->socdata->functions_count;
 557 }
 558
 559 static const char *uniphier_pmx_get_function_name(struct pinctrl_dev *pctldev,
 560                                                   unsigned selector)
 561 {
 562         struct uniphier_pinctrl_priv *priv = pinctrl_dev_get_drvdata(pctldev);
 563
 564         return priv->socdata->functions[selector].name;
 565 }
 566
 567 static int uniphier_pmx_get_function_groups(struct pinctrl_dev *pctldev,
 568                                             unsigned selector,
 569                                             const char * const **groups,
 570                                             unsigned *num_groups)
 571 {
 572         struct uniphier_pinctrl_priv *priv = pinctrl_dev_get_drvdata(pctldev);
 573
 574         *groups = priv->socdata->functions[selector].groups;
 575         *num_groups = priv->socdata->functions[selector].num_groups;
 576
 577         return 0;
 578 }
 579
 580 static int uniphier_pmx_set_one_mux(struct pinctrl_dev *pctldev, unsigned pin,
 581                                     int muxval)
 582 {
 583         struct uniphier_pinctrl_priv *priv = pinctrl_dev_get_drvdata(pctldev);
 584         unsigned int mux_bits, reg_stride, reg, reg_end, shift, mask;
 585         bool load_pinctrl;
 586         int ret;
 587
 588         /* some pins need input-enabling */
 589         ret = uniphier_conf_pin_input_enable(pctldev, pin, 1);
 590         if (ret)
 591                 return ret;
 592
 593         if (muxval < 0)
 594                 return 0;       /* dedicated pin; nothing to do for pin-mux */
 595
 596         if (priv->socdata->caps & UNIPHIER_PINCTRL_CAPS_DBGMUX_SEPARATE) {
 597                 /*
 598                  *  Mode     reg_offset     bit_position
 599                  *  Normal    4 * n        shift+3:shift
 600                  *  Debug     4 * n        shift+7:shift+4
 601                  */
 602                 mux_bits = 4;
 603                 reg_stride = 8;
 604                 load_pinctrl = true;
 605         } else {
 606                 /*
 607                  *  Mode     reg_offset     bit_position
 608                  *  Normal    8 * n        shift+3:shift
 609                  *  Debug     8 * n + 4    shift+3:shift
 610                  */
 611                 mux_bits = 8;
 612                 reg_stride = 4;
 613                 load_pinctrl = false;
 614         }
 615
 616         reg = UNIPHIER_PINCTRL_PINMUX_BASE + pin * mux_bits / 32 * reg_stride;
 617         reg_end = reg + reg_stride;
 618         shift = pin * mux_bits % 32;
 619         mask = (1U << mux_bits) - 1;
 620
 621         /*
 622          * If reg_stride is greater than 4, the MSB of each pinsel shall be
 623          * stored in the offset+4.
 624          */
 625         for (; reg < reg_end; reg += 4) {
 626                 ret = regmap_update_bits(priv->regmap, reg,
 627                                          mask << shift, muxval << shift);
 628                 if (ret)
 629                         return ret;
 630                 muxval >>= mux_bits;
 631         }
 632
 633         if (load_pinctrl) {
 634                 ret = regmap_write(priv->regmap,
 635                                    UNIPHIER_PINCTRL_LOAD_PINMUX, 1);
 636                 if (ret)
 637                         return ret;
 638         }
 639
 640         return 0;
 641 }
 642
 643 static int uniphier_pmx_set_mux(struct pinctrl_dev *pctldev,
 644                                 unsigned func_selector,
 645                                 unsigned group_selector)
 646 {
 647         struct uniphier_pinctrl_priv *priv = pinctrl_dev_get_drvdata(pctldev);
 648         const struct uniphier_pinctrl_group *grp =
 649                                         &priv->socdata->groups[group_selector];
 650         int i;
 651         int ret;
 652
 653         for (i = 0; i < grp->num_pins; i++) {
 654                 ret = uniphier_pmx_set_one_mux(pctldev, grp->pins[i],
 655                                                grp->muxvals[i]);
 656                 if (ret)
 657                         return ret;
 658         }
 659
 660         return 0;
 661 }
 662
 663 static int uniphier_pmx_gpio_request_enable(struct pinctrl_dev *pctldev,
 664                                             struct pinctrl_gpio_range *range,
 665                                             unsigned offset)
 666 {
 667         struct uniphier_pinctrl_priv *priv = pinctrl_dev_get_drvdata(pctldev);
 668         unsigned int gpio_offset;
 669         int muxval, i;
 670
 671         if (range->pins) {
 672                 for (i = 0; i < range->npins; i++)
 673                         if (range->pins[i] == offset)
 674                                 break;
 675
 676                 if (WARN_ON(i == range->npins))
 677                         return -EINVAL;
 678
 679                 gpio_offset = i;
 680         } else {
 681                 gpio_offset = offset - range->pin_base;
 682         }
 683
 684         gpio_offset += range->id;
 685
 686         muxval = priv->socdata->get_gpio_muxval(offset, gpio_offset);
 687
 688         return uniphier_pmx_set_one_mux(pctldev, offset, muxval);
 689 }
 690
 691 static const struct pinmux_ops uniphier_pmxops = {
 692         .get_functions_count = uniphier_pmx_get_functions_count,
 693         .get_function_name = uniphier_pmx_get_function_name,
 694         .get_function_groups = uniphier_pmx_get_function_groups,
 695         .set_mux = uniphier_pmx_set_mux,
 696         .gpio_request_enable = uniphier_pmx_gpio_request_enable,
 697         .strict = true,
 698 };
 699
 700 #ifdef CONFIG_PM_SLEEP
 701 static int uniphier_pinctrl_suspend(struct device *dev)
 702 {
 703         struct uniphier_pinctrl_priv *priv = dev_get_drvdata(dev);
 704         struct uniphier_pinctrl_reg_region *r;
 705         int ret;
 706
 707         list_for_each_entry(r, &priv->reg_regions, node) {
 708                 ret = regmap_bulk_read(priv->regmap, r->base, r->vals,
 709                                        r->nregs);
 710                 if (ret)
 711                         return ret;
 712         }
 713
 714         return 0;
 715 }
 716
 717 static int uniphier_pinctrl_resume(struct device *dev)
 718 {
 719         struct uniphier_pinctrl_priv *priv = dev_get_drvdata(dev);
 720         struct uniphier_pinctrl_reg_region *r;
 721         int ret;
 722
 723         list_for_each_entry(r, &priv->reg_regions, node) {
 724                 ret = regmap_bulk_write(priv->regmap, r->base, r->vals,
 725                                         r->nregs);
 726                 if (ret)
 727                         return ret;
 728         }
 729
 730         if (priv->socdata->caps & UNIPHIER_PINCTRL_CAPS_DBGMUX_SEPARATE) {
 731                 ret = regmap_write(priv->regmap,
 732                                    UNIPHIER_PINCTRL_LOAD_PINMUX, 1);
 733                 if (ret)
 734                         return ret;
 735         }
 736
 737         return 0;
 738 }
 739
 740 static int uniphier_pinctrl_add_reg_region(struct device *dev,
 741                                            struct uniphier_pinctrl_priv *priv,
 742                                            unsigned int base,
 743                                            unsigned int count,
 744                                            unsigned int width)
 745 {
 746         struct uniphier_pinctrl_reg_region *region;
 747         unsigned int nregs;
 748
 749         if (!count)
 750                 return 0;
 751
 752         nregs = DIV_ROUND_UP(count * width, 32);
 753
 754         region = devm_kzalloc(dev,
 755                               sizeof(*region) + sizeof(region->vals[0]) * nregs,
 756                               GFP_KERNEL);
 757         if (!region)
 758                 return -ENOMEM;
 759
 760         region->base = base;
 761         region->nregs = nregs;
 762
 763         list_add_tail(&region->node, &priv->reg_regions);
 764
 765         return 0;
 766 }
 767 #endif
 768
 769 static int uniphier_pinctrl_pm_init(struct device *dev,
 770                                     struct uniphier_pinctrl_priv *priv)
 771 {
 772 #ifdef CONFIG_PM_SLEEP
 773         const struct uniphier_pinctrl_socdata *socdata = priv->socdata;
 774         unsigned int num_drvctrl = 0;
 775         unsigned int num_drv2ctrl = 0;
 776         unsigned int num_drv3ctrl = 0;
 777         unsigned int num_pupdctrl = 0;
 778         unsigned int num_iectrl = 0;
 779         unsigned int iectrl, drvctrl, pupdctrl;
 780         enum uniphier_pin_drv_type drv_type;
 781         enum uniphier_pin_pull_dir pull_dir;
 782         int i, ret;
 783
 784         for (i = 0; i < socdata->npins; i++) {
 785                 void *drv_data = socdata->pins[i].drv_data;
 786
 787                 drvctrl = uniphier_pin_get_drvctrl(drv_data);
 788                 drv_type = uniphier_pin_get_drv_type(drv_data);
 789                 pupdctrl = uniphier_pin_get_pupdctrl(drv_data);
 790                 pull_dir = uniphier_pin_get_pull_dir(drv_data);
 791                 iectrl = uniphier_pin_get_iectrl(drv_data);
 792
 793                 switch (drv_type) {
 794                 case UNIPHIER_PIN_DRV_1BIT:
 795                         num_drvctrl = max(num_drvctrl, drvctrl + 1);
 796                         break;
 797                 case UNIPHIER_PIN_DRV_2BIT:
 798                         num_drv2ctrl = max(num_drv2ctrl, drvctrl + 1);
 799                         break;
 800                 case UNIPHIER_PIN_DRV_3BIT:
 801                         num_drv3ctrl = max(num_drv3ctrl, drvctrl + 1);
 802                         break;
 803                 default:
 804                         break;
 805                 }
 806
 807                 if (pull_dir == UNIPHIER_PIN_PULL_UP ||
 808                     pull_dir == UNIPHIER_PIN_PULL_DOWN)
 809                         num_pupdctrl = max(num_pupdctrl, pupdctrl + 1);
 810
 811                 if (iectrl != UNIPHIER_PIN_IECTRL_NONE) {
 812                         if (socdata->caps & UNIPHIER_PINCTRL_CAPS_PERPIN_IECTRL)
 813                                 iectrl = i;
 814                         num_iectrl = max(num_iectrl, iectrl + 1);
 815                 }
 816         }
 817
 818         INIT_LIST_HEAD(&priv->reg_regions);
 819
 820         ret = uniphier_pinctrl_add_reg_region(dev, priv,
 821                                               UNIPHIER_PINCTRL_PINMUX_BASE,
 822                                               socdata->npins, 8);
 823         if (ret)
 824                 return ret;
 825
 826         ret = uniphier_pinctrl_add_reg_region(dev, priv,
 827                                               UNIPHIER_PINCTRL_DRVCTRL_BASE,
 828                                               num_drvctrl, 1);
 829         if (ret)
 830                 return ret;
 831
 832         ret = uniphier_pinctrl_add_reg_region(dev, priv,
 833                                               UNIPHIER_PINCTRL_DRV2CTRL_BASE,
 834                                               num_drv2ctrl, 2);
 835         if (ret)
 836                 return ret;
 837
 838         ret = uniphier_pinctrl_add_reg_region(dev, priv,
 839                                               UNIPHIER_PINCTRL_DRV3CTRL_BASE,
 840                                               num_drv3ctrl, 3);
 841         if (ret)
 842                 return ret;
 843
 844         ret = uniphier_pinctrl_add_reg_region(dev, priv,
 845                                               UNIPHIER_PINCTRL_PUPDCTRL_BASE,
 846                                               num_pupdctrl, 1);
 847         if (ret)
 848                 return ret;
 849
 850         ret = uniphier_pinctrl_add_reg_region(dev, priv,
 851                                               UNIPHIER_PINCTRL_IECTRL_BASE,
 852                                               num_iectrl, 1);
 853         if (ret)
 854                 return ret;
 855 #endif
 856         return 0;
 857 }
 858
 859 const struct dev_pm_ops uniphier_pinctrl_pm_ops = {
 860         SET_LATE_SYSTEM_SLEEP_PM_OPS(uniphier_pinctrl_suspend,
 861                                      uniphier_pinctrl_resume)
 862 };
 863
 864 int uniphier_pinctrl_probe(struct platform_device *pdev,
 865                            struct uniphier_pinctrl_socdata *socdata)
 866 {
 867         struct device *dev = &pdev->dev;
 868         struct uniphier_pinctrl_priv *priv;
 869         struct device_node *parent;
 870         int ret;
 871
 872         if (!socdata ||
 873             !socdata->pins || !socdata->npins ||
 874             !socdata->groups || !socdata->groups_count ||
 875             !socdata->functions || !socdata->functions_count) {
 876                 dev_err(dev, "pinctrl socdata lacks necessary members\n");
 877                 return -EINVAL;
 878         }
 879
 880         priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
 881         if (!priv)
 882                 return -ENOMEM;
 883
 884         parent = of_get_parent(dev->of_node);
 885         priv->regmap = syscon_node_to_regmap(parent);
 886         of_node_put(parent);
 887
 888         if (IS_ERR(priv->regmap)) {
 889                 dev_err(dev, "failed to get regmap\n");
 890                 return PTR_ERR(priv->regmap);
 891         }
 892
 893         priv->socdata = socdata;
 894         priv->pctldesc.name = dev->driver->name;
 895         priv->pctldesc.pins = socdata->pins;
 896         priv->pctldesc.npins = socdata->npins;
 897         priv->pctldesc.pctlops = &uniphier_pctlops;
 898         priv->pctldesc.pmxops = &uniphier_pmxops;
 899         priv->pctldesc.confops = &uniphier_confops;
 900         priv->pctldesc.owner = dev->driver->owner;
 901
 902         ret = uniphier_pinctrl_pm_init(dev, priv);
 903         if (ret)
 904                 return ret;
 905
 906         priv->pctldev = devm_pinctrl_register(dev, &priv->pctldesc, priv);
 907         if (IS_ERR(priv->pctldev)) {
 908                 dev_err(dev, "failed to register UniPhier pinctrl driver\n");
 909                 return PTR_ERR(priv->pctldev);
 910         }
 911
 912         platform_set_drvdata(pdev, priv);
 913
 914         return 0;
 915 }