drivers/pinctrl/sunxi/pinctrl-suniv-f1c100s.c

   1 /*
   2  * Allwinner new F-series F1C100s SoC (suniv) pinctrl driver.
   3  *
   4  * Copyright (C) 2018 Icenowy Zheng
   5  *
   6  * Icenowy Zheng <icenowy@aosc.io>
   7  *
   8  * Copyright (C) 2014 Jackie Hwang
   9  *
  10  * Jackie Hwang <huangshr@allwinnertech.com>
  11  *
  12  * Copyright (C) 2014 Chen-Yu Tsai
  13  *
  14  * Chen-Yu Tsai <wens@csie.org>
  15  *
  16  * Copyright (C) 2014 Maxime Ripard
  17  *
  18  * Maxime Ripard <maxime.ripard@free-electrons.com>
  19  *
  20  * This file is licensed under the terms of the GNU General Public
  21  * License version 2.  This program is licensed "as is" without any
  22  * warranty of any kind, whether express or implied.
  23  */
  24
  25 #include <linux/module.h>
  26 #include <linux/platform_device.h>
  27 #include <linux/of.h>
  28 #include <linux/pinctrl/pinctrl.h>
  29
  30 #include "pinctrl-sunxi.h"
  31 static const struct sunxi_desc_pin suniv_f1c100s_pins[] = {
  32         SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 0),
  33                   SUNXI_FUNCTION(0x0, "gpio_in"),
  34                   SUNXI_FUNCTION(0x1, "gpio_out"),
  35                   SUNXI_FUNCTION(0x2, "rtp"),           /* X1 */
  36                   SUNXI_FUNCTION(0x4, "i2s"),           /* BCLK */
  37                   SUNXI_FUNCTION(0x5, "uart1"),         /* RTS */
  38                   SUNXI_FUNCTION(0x6, "spi1")),         /* CS */
  39         SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 1),
  40                   SUNXI_FUNCTION(0x0, "gpio_in"),
  41                   SUNXI_FUNCTION(0x1, "gpio_out"),
  42                   SUNXI_FUNCTION(0x2, "rtp"),           /* X2 */
  43                   SUNXI_FUNCTION(0x4, "i2s"),           /* LRCK */
  44                   SUNXI_FUNCTION(0x5, "uart1"),         /* CTS */
  45                   SUNXI_FUNCTION(0x6, "spi1")),         /* MOSI */
  46         SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 2),
  47                   SUNXI_FUNCTION(0x0, "gpio_in"),
  48                   SUNXI_FUNCTION(0x1, "gpio_out"),
  49                   SUNXI_FUNCTION(0x2, "rtp"),           /* Y1 */
  50                   SUNXI_FUNCTION(0x3, "pwm0"),          /* PWM0 */
  51                   SUNXI_FUNCTION(0x4, "i2s"),           /* IN */
  52                   SUNXI_FUNCTION(0x5, "uart1"),         /* RX */
  53                   SUNXI_FUNCTION(0x6, "spi1")),         /* CLK */
  54         SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 3),
  55                   SUNXI_FUNCTION(0x0, "gpio_in"),
  56                   SUNXI_FUNCTION(0x1, "gpio_out"),
  57                   SUNXI_FUNCTION(0x2, "rtp"),           /* Y2 */
  58                   SUNXI_FUNCTION(0x3, "ir0"),           /* RX */
  59                   SUNXI_FUNCTION(0x4, "i2s"),           /* OUT */
  60                   SUNXI_FUNCTION(0x5, "uart1"),         /* TX */
  61                   SUNXI_FUNCTION(0x6, "spi1")),         /* MISO */
  62         /* Hole */
  63         SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 0),
  64                   SUNXI_FUNCTION(0x0, "gpio_in"),
  65                   SUNXI_FUNCTION(0x1, "gpio_out"),
  66                   SUNXI_FUNCTION(0x2, "dram"),          /* DQS0 */
  67                   SUNXI_FUNCTION(0x3, "i2c1"),          /* SCK */
  68                   SUNXI_FUNCTION(0x4, "i2s"),           /* BCLK */
  69                   SUNXI_FUNCTION(0x5, "uart1"),         /* RTS */
  70                   SUNXI_FUNCTION(0x6, "spi1")),         /* CS */
  71         SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 1),
  72                   SUNXI_FUNCTION(0x0, "gpio_in"),
  73                   SUNXI_FUNCTION(0x1, "gpio_out"),
  74                   SUNXI_FUNCTION(0x2, "dram"),          /* DQS1 */
  75                   SUNXI_FUNCTION(0x3, "i2c1"),          /* SDA */
  76                   SUNXI_FUNCTION(0x4, "i2s"),           /* LRCK */
  77                   SUNXI_FUNCTION(0x5, "uart1"),         /* CTS */
  78                   SUNXI_FUNCTION(0x6, "spi1")),         /* MOSI */
  79         SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 2),
  80                   SUNXI_FUNCTION(0x0, "gpio_in"),
  81                   SUNXI_FUNCTION(0x1, "gpio_out"),
  82                   SUNXI_FUNCTION(0x2, "dram"),          /* CKE */
  83                   SUNXI_FUNCTION(0x3, "pwm0"),          /* PWM0 */
  84                   SUNXI_FUNCTION(0x4, "i2s"),           /* IN */
  85                   SUNXI_FUNCTION(0x5, "uart1"),         /* RX */
  86                   SUNXI_FUNCTION(0x6, "spi1")),         /* CLK */
  87         SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 3),
  88                   SUNXI_FUNCTION(0x0, "gpio_in"),
  89                   SUNXI_FUNCTION(0x1, "gpio_out"),
  90                   SUNXI_FUNCTION(0x2, "dram"),          /* DDR_REF_D */
  91                   SUNXI_FUNCTION(0x3, "ir0"),           /* RX */
  92                   SUNXI_FUNCTION(0x4, "i2s"),           /* OUT */
  93                   SUNXI_FUNCTION(0x5, "uart1"),         /* TX */
  94                   SUNXI_FUNCTION(0x6, "spi1")),         /* MISO */
  95         /* Hole */
  96         SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 0),
  97                   SUNXI_FUNCTION(0x1, "gpio_out"),
  98                   SUNXI_FUNCTION(0x2, "spi0"),          /* CLK */
  99                   SUNXI_FUNCTION(0x3, "mmc1")),         /* CLK */
 100         SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 1),
 101                   SUNXI_FUNCTION(0x0, "gpio_in"),
 102                   SUNXI_FUNCTION(0x1, "gpio_out"),
 103                   SUNXI_FUNCTION(0x2, "spi0"),          /* CS */
 104                   SUNXI_FUNCTION(0x3, "mmc1")),         /* CMD */
 105         SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 2),
 106                   SUNXI_FUNCTION(0x0, "gpio_in"),
 107                   SUNXI_FUNCTION(0x1, "gpio_out"),
 108                   SUNXI_FUNCTION(0x2, "spi0"),          /* MISO */
 109                   SUNXI_FUNCTION(0x3, "mmc1")),         /* D0 */
 110         SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 3),
 111                   SUNXI_FUNCTION(0x0, "gpio_in"),
 112                   SUNXI_FUNCTION(0x1, "gpio_out"),
 113                   SUNXI_FUNCTION(0x2, "spi0"),          /* MOSI */
 114                   SUNXI_FUNCTION(0x3, "uart0")),        /* TX */
 115         /* Hole */
 116         SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 0),
 117                   SUNXI_FUNCTION(0x0, "gpio_in"),
 118                   SUNXI_FUNCTION(0x1, "gpio_out"),
 119                   SUNXI_FUNCTION(0x2, "lcd"),           /* D2 */
 120                   SUNXI_FUNCTION(0x3, "i2c0"),          /* SDA */
 121                   SUNXI_FUNCTION(0x4, "rsb"),           /* SDA */
 122                   SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 0)),
 123         SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 1),
 124                   SUNXI_FUNCTION(0x0, "gpio_in"),
 125                   SUNXI_FUNCTION(0x1, "gpio_out"),
 126                   SUNXI_FUNCTION(0x2, "lcd"),           /* D3 */
 127                   SUNXI_FUNCTION(0x3, "uart1"),         /* RTS */
 128                   SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 1)),
 129         SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 2),
 130                   SUNXI_FUNCTION(0x0, "gpio_in"),
 131                   SUNXI_FUNCTION(0x1, "gpio_out"),
 132                   SUNXI_FUNCTION(0x2, "lcd"),           /* D4*/
 133                   SUNXI_FUNCTION(0x3, "uart1"),         /* CTS */
 134                   SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 2)),
 135         SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 3),
 136                   SUNXI_FUNCTION(0x0, "gpio_in"),
 137                   SUNXI_FUNCTION(0x1, "gpio_out"),
 138                   SUNXI_FUNCTION(0x2, "lcd"),           /* D5 */
 139                   SUNXI_FUNCTION(0x3, "uart1"),         /* RX */
 140                   SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 3)),
 141         SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 4),
 142                   SUNXI_FUNCTION(0x0, "gpio_in"),
 143                   SUNXI_FUNCTION(0x1, "gpio_out"),
 144                   SUNXI_FUNCTION(0x2, "lcd"),           /* D6 */
 145                   SUNXI_FUNCTION(0x3, "uart1"),         /* TX */
 146                   SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 4)),
 147         SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 5),
 148                   SUNXI_FUNCTION(0x0, "gpio_in"),
 149                   SUNXI_FUNCTION(0x1, "gpio_out"),
 150                   SUNXI_FUNCTION(0x2, "lcd"),           /* D7 */
 151                   SUNXI_FUNCTION(0x3, "i2c1"),          /* SCK */
 152                   SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 5)),
 153         SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 6),
 154                   SUNXI_FUNCTION(0x0, "gpio_in"),
 155                   SUNXI_FUNCTION(0x1, "gpio_out"),
 156                   SUNXI_FUNCTION(0x2, "lcd"),           /* D10 */
 157                   SUNXI_FUNCTION(0x3, "i2c1"),          /* SDA */
 158                   SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 6)),
 159         SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 7),
 160                   SUNXI_FUNCTION(0x0, "gpio_in"),
 161                   SUNXI_FUNCTION(0x1, "gpio_out"),
 162                   SUNXI_FUNCTION(0x2, "lcd"),           /* D11 */
 163                   SUNXI_FUNCTION(0x3, "i2s"),           /* MCLK */
 164                   SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 7)),
 165         SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 8),
 166                   SUNXI_FUNCTION(0x0, "gpio_in"),
 167                   SUNXI_FUNCTION(0x1, "gpio_out"),
 168                   SUNXI_FUNCTION(0x2, "lcd"),           /* D12 */
 169                   SUNXI_FUNCTION(0x3, "i2s"),           /* BCLK */
 170                   SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 8)),
 171         SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 9),
 172                   SUNXI_FUNCTION(0x0, "gpio_in"),
 173                   SUNXI_FUNCTION(0x1, "gpio_out"),
 174                   SUNXI_FUNCTION(0x2, "lcd"),           /* D13 */
 175                   SUNXI_FUNCTION(0x3, "i2s"),           /* LRCK */
 176                   SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 9)),
 177         SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 10),
 178                   SUNXI_FUNCTION(0x0, "gpio_in"),
 179                   SUNXI_FUNCTION(0x1, "gpio_out"),
 180                   SUNXI_FUNCTION(0x2, "lcd"),           /* D14 */
 181                   SUNXI_FUNCTION(0x3, "i2s"),           /* IN */
 182                   SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 10)),
 183         SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 11),
 184                   SUNXI_FUNCTION(0x0, "gpio_in"),
 185                   SUNXI_FUNCTION(0x1, "gpio_out"),
 186                   SUNXI_FUNCTION(0x2, "lcd"),           /* D15 */
 187                   SUNXI_FUNCTION(0x3, "i2s"),           /* OUT */
 188                   SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 11)),
 189         SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 12),
 190                   SUNXI_FUNCTION(0x0, "gpio_in"),
 191                   SUNXI_FUNCTION(0x1, "gpio_out"),
 192                   SUNXI_FUNCTION(0x2, "lcd"),           /* D18 */
 193                   SUNXI_FUNCTION(0x3, "i2c0"),          /* SCK */
 194                   SUNXI_FUNCTION(0x4, "rsb"),           /* SCK */
 195                   SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 12)),
 196         SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 13),
 197                   SUNXI_FUNCTION(0x0, "gpio_in"),
 198                   SUNXI_FUNCTION(0x1, "gpio_out"),
 199                   SUNXI_FUNCTION(0x2, "lcd"),           /* D19 */
 200                   SUNXI_FUNCTION(0x3, "uart2"),         /* TX */
 201                   SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 13)),
 202         SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 14),
 203                   SUNXI_FUNCTION(0x0, "gpio_in"),
 204                   SUNXI_FUNCTION(0x1, "gpio_out"),
 205                   SUNXI_FUNCTION(0x2, "lcd"),           /* D20 */
 206                   SUNXI_FUNCTION(0x3, "uart2"),         /* RX */
 207                   SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 14)),
 208         SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 15),
 209                   SUNXI_FUNCTION(0x0, "gpio_in"),
 210                   SUNXI_FUNCTION(0x1, "gpio_out"),
 211                   SUNXI_FUNCTION(0x2, "lcd"),           /* D21 */
 212                   SUNXI_FUNCTION(0x3, "uart2"),         /* RTS */
 213                   SUNXI_FUNCTION(0x4, "i2c2"),          /* SCK */
 214                   SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 15)),
 215         SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 16),
 216                   SUNXI_FUNCTION(0x0, "gpio_in"),
 217                   SUNXI_FUNCTION(0x1, "gpio_out"),
 218                   SUNXI_FUNCTION(0x2, "lcd"),           /* D22 */
 219                   SUNXI_FUNCTION(0x3, "uart2"),         /* CTS */
 220                   SUNXI_FUNCTION(0x4, "i2c2"),          /* SDA */
 221                   SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 16)),
 222         SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 17),
 223                   SUNXI_FUNCTION(0x0, "gpio_in"),
 224                   SUNXI_FUNCTION(0x1, "gpio_out"),
 225                   SUNXI_FUNCTION(0x2, "lcd"),           /* D23 */
 226                   SUNXI_FUNCTION(0x3, "spdif"),         /* OUT */
 227                   SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 17)),
 228         SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 18),
 229                   SUNXI_FUNCTION(0x0, "gpio_in"),
 230                   SUNXI_FUNCTION(0x1, "gpio_out"),
 231                   SUNXI_FUNCTION(0x2, "lcd"),           /* CLK */
 232                   SUNXI_FUNCTION(0x3, "spi0"),          /* CS */
 233                   SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 18)),
 234         SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 19),
 235                   SUNXI_FUNCTION(0x0, "gpio_in"),
 236                   SUNXI_FUNCTION(0x1, "gpio_out"),
 237                   SUNXI_FUNCTION(0x2, "lcd"),           /* DE */
 238                   SUNXI_FUNCTION(0x3, "spi0"),          /* MOSI */
 239                   SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 19)),
 240         SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 20),
 241                   SUNXI_FUNCTION(0x0, "gpio_in"),
 242                   SUNXI_FUNCTION(0x1, "gpio_out"),
 243                   SUNXI_FUNCTION(0x2, "lcd"),           /* HYSNC */
 244                   SUNXI_FUNCTION(0x3, "spi0"),          /* CLK */
 245                   SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 20)),
 246         SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 21),
 247                   SUNXI_FUNCTION(0x0, "gpio_in"),
 248                   SUNXI_FUNCTION(0x1, "gpio_out"),
 249                   SUNXI_FUNCTION(0x2, "lcd"),           /* VSYNC */
 250                   SUNXI_FUNCTION(0x3, "spi0"),          /* MISO */
 251                   SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 21)),
 252         /* Hole */
 253         SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 0),
 254                   SUNXI_FUNCTION(0x0, "gpio_in"),
 255                   SUNXI_FUNCTION(0x1, "gpio_out"),
 256                   SUNXI_FUNCTION(0x2, "csi"),           /* HSYNC */
 257                   SUNXI_FUNCTION(0x3, "lcd"),           /* D0 */
 258                   SUNXI_FUNCTION(0x4, "i2c2"),          /* SCK */
 259                   SUNXI_FUNCTION(0x5, "uart0"),         /* RX */
 260                   SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 0)),
 261         SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 1),
 262                   SUNXI_FUNCTION(0x0, "gpio_in"),
 263                   SUNXI_FUNCTION(0x1, "gpio_out"),
 264                   SUNXI_FUNCTION(0x2, "csi"),           /* VSYNC */
 265                   SUNXI_FUNCTION(0x3, "lcd"),           /* D1 */
 266                   SUNXI_FUNCTION(0x4, "i2c2"),          /* SDA */
 267                   SUNXI_FUNCTION(0x5, "uart0"),         /* TX */
 268                   SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 1)),
 269         SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 2),
 270                   SUNXI_FUNCTION(0x0, "gpio_in"),
 271                   SUNXI_FUNCTION(0x1, "gpio_out"),
 272                   SUNXI_FUNCTION(0x2, "csi"),           /* PCLK */
 273                   SUNXI_FUNCTION(0x3, "lcd"),           /* D8 */
 274                   SUNXI_FUNCTION(0x4, "clk"),           /* OUT */
 275                   SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 2)),
 276         SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 3),
 277                   SUNXI_FUNCTION(0x0, "gpio_in"),
 278                   SUNXI_FUNCTION(0x1, "gpio_out"),
 279                   SUNXI_FUNCTION(0x2, "csi"),           /* D0 */
 280                   SUNXI_FUNCTION(0x3, "lcd"),           /* D9 */
 281                   SUNXI_FUNCTION(0x4, "i2s"),           /* BCLK */
 282                   SUNXI_FUNCTION(0x5, "rsb"),           /* SCK */
 283                   SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 3)),
 284         SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 4),
 285                   SUNXI_FUNCTION(0x0, "gpio_in"),
 286                   SUNXI_FUNCTION(0x1, "gpio_out"),
 287                   SUNXI_FUNCTION(0x2, "csi"),           /* D1 */
 288                   SUNXI_FUNCTION(0x3, "lcd"),           /* D16 */
 289                   SUNXI_FUNCTION(0x4, "i2s"),           /* LRCK */
 290                   SUNXI_FUNCTION(0x5, "rsb"),           /* SDA */
 291                   SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 4)),
 292         SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 5),
 293                   SUNXI_FUNCTION(0x0, "gpio_in"),
 294                   SUNXI_FUNCTION(0x1, "gpio_out"),
 295                   SUNXI_FUNCTION(0x2, "csi"),           /* D2 */
 296                   SUNXI_FUNCTION(0x3, "lcd"),           /* D17 */
 297                   SUNXI_FUNCTION(0x4, "i2s"),           /* IN */
 298                   SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 5)),
 299         SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 6),
 300                   SUNXI_FUNCTION(0x0, "gpio_in"),
 301                   SUNXI_FUNCTION(0x1, "gpio_out"),
 302                   SUNXI_FUNCTION(0x2, "csi"),           /* D3 */
 303                   SUNXI_FUNCTION(0x3, "pwm1"),          /* PWM1 */
 304                   SUNXI_FUNCTION(0x4, "i2s"),           /* OUT */
 305                   SUNXI_FUNCTION(0x5, "spdif"),         /* OUT */
 306                   SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 6)),
 307         SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 7),
 308                   SUNXI_FUNCTION(0x0, "gpio_in"),
 309                   SUNXI_FUNCTION(0x1, "gpio_out"),
 310                   SUNXI_FUNCTION(0x2, "csi"),           /* D4 */
 311                   SUNXI_FUNCTION(0x3, "uart2"),         /* TX */
 312                   SUNXI_FUNCTION(0x4, "spi1"),          /* CS */
 313                   SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 7)),
 314         SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 8),
 315                   SUNXI_FUNCTION(0x0, "gpio_in"),
 316                   SUNXI_FUNCTION(0x1, "gpio_out"),
 317                   SUNXI_FUNCTION(0x2, "csi"),           /* D5 */
 318                   SUNXI_FUNCTION(0x3, "uart2"),         /* RX */
 319                   SUNXI_FUNCTION(0x4, "spi1"),          /* MOSI */
 320                   SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 8)),
 321         SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 9),
 322                   SUNXI_FUNCTION(0x0, "gpio_in"),
 323                   SUNXI_FUNCTION(0x1, "gpio_out"),
 324                   SUNXI_FUNCTION(0x2, "csi"),           /* D6 */
 325                   SUNXI_FUNCTION(0x3, "uart2"),         /* RTS */
 326                   SUNXI_FUNCTION(0x4, "spi1"),          /* CLK */
 327                   SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 9)),
 328         SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 10),
 329                   SUNXI_FUNCTION(0x0, "gpio_in"),
 330                   SUNXI_FUNCTION(0x1, "gpio_out"),
 331                   SUNXI_FUNCTION(0x2, "csi"),           /* D7 */
 332                   SUNXI_FUNCTION(0x3, "uart2"),         /* CTS */
 333                   SUNXI_FUNCTION(0x4, "spi1"),          /* MISO */
 334                   SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 10)),
 335         SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 11),
 336                   SUNXI_FUNCTION(0x0, "gpio_in"),
 337                   SUNXI_FUNCTION(0x1, "gpio_out"),
 338                   SUNXI_FUNCTION(0x2, "clk0"),          /* OUT */
 339                   SUNXI_FUNCTION(0x3, "i2c0"),          /* SCK */
 340                   SUNXI_FUNCTION(0x4, "ir"),            /* RX */
 341                   SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 11)),
 342         SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 12),
 343                   SUNXI_FUNCTION(0x0, "gpio_in"),
 344                   SUNXI_FUNCTION(0x1, "gpio_out"),
 345                   SUNXI_FUNCTION(0x2, "i2s"),           /* MCLK */
 346                   SUNXI_FUNCTION(0x3, "i2c0"),          /* SDA */
 347                   SUNXI_FUNCTION(0x4, "pwm0"),          /* PWM0 */
 348                   SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 12)),
 349
 350         /* Hole */
 351         SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 0),
 352                   SUNXI_FUNCTION(0x0, "gpio_in"),
 353                   SUNXI_FUNCTION(0x1, "gpio_out"),
 354                   SUNXI_FUNCTION(0x2, "mmc0"),          /* D1 */
 355                   SUNXI_FUNCTION(0x3, "jtag"),          /* MS */
 356                   SUNXI_FUNCTION(0x4, "ir0"),           /* MS */
 357                   SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 0)),
 358         SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 1),
 359                   SUNXI_FUNCTION(0x0, "gpio_in"),
 360                   SUNXI_FUNCTION(0x1, "gpio_out"),
 361                   SUNXI_FUNCTION(0x2, "mmc0"),          /* D0 */
 362                   SUNXI_FUNCTION(0x3, "dgb0"),          /* DI */
 363                   SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 1)),
 364         SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 2),
 365                   SUNXI_FUNCTION(0x0, "gpio_in"),
 366                   SUNXI_FUNCTION(0x1, "gpio_out"),
 367                   SUNXI_FUNCTION(0x2, "mmc0"),          /* CLK */
 368                   SUNXI_FUNCTION(0x3, "uart0"),         /* TX */
 369                   SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 2)),
 370         SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 3),
 371                   SUNXI_FUNCTION(0x0, "gpio_in"),
 372                   SUNXI_FUNCTION(0x1, "gpio_out"),
 373                   SUNXI_FUNCTION(0x2, "mmc0"),          /* CMD */
 374                   SUNXI_FUNCTION(0x3, "jtag"),          /* DO */
 375                   SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 3)),
 376         SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 4),
 377                   SUNXI_FUNCTION(0x0, "gpio_in"),
 378                   SUNXI_FUNCTION(0x1, "gpio_out"),
 379                   SUNXI_FUNCTION(0x2, "mmc0"),          /* D3 */
 380                   SUNXI_FUNCTION(0x3, "uart0"),         /* TX */
 381                   SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 4)),
 382         SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 5),
 383                   SUNXI_FUNCTION(0x0, "gpio_in"),
 384                   SUNXI_FUNCTION(0x1, "gpio_out"),
 385                   SUNXI_FUNCTION(0x2, "mmc0"),          /* D2 */
 386                   SUNXI_FUNCTION(0x3, "jtag"),          /* CK */
 387                   SUNXI_FUNCTION(0x4, "pwm1"),          /* PWM1 */
 388                   SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 5)),
 389 };
 390
 391 static const struct sunxi_pinctrl_desc suniv_f1c100s_pinctrl_data = {
 392         .pins = suniv_f1c100s_pins,
 393         .npins = ARRAY_SIZE(suniv_f1c100s_pins),
 394         .irq_banks = 3,
 395 };
 396
 397 static int suniv_pinctrl_probe(struct platform_device *pdev)
 398 {
 399         return sunxi_pinctrl_init(pdev,
 400                                   &suniv_f1c100s_pinctrl_data);
 401 }
 402
 403 static const struct of_device_id suniv_f1c100s_pinctrl_match[] = {
 404         { .compatible = "allwinner,suniv-f1c100s-pinctrl", },
 405         {}
 406 };
 407
 408 static struct platform_driver suniv_f1c100s_pinctrl_driver = {
 409         .probe  = suniv_pinctrl_probe,
 410         .driver = {
 411                 .name           = "suniv-f1c100s-pinctrl",
 412                 .of_match_table = suniv_f1c100s_pinctrl_match,
 413         },
 414 };
 415 builtin_platform_driver(suniv_f1c100s_pinctrl_driver);