GNU Linux-libre 5.13.14-gnu1
[releases.git] / drivers / pinctrl / sunxi / pinctrl-sun8i-h3-r.c
1 /*
2  * Allwinner H3 SoCs pinctrl driver.
3  *
4  * Copyright (C) 2016 Krzysztof Adamski <k@japko.eu>
5  *
6  * This file is licensed under the terms of the GNU General Public
7  * License version 2.  This program is licensed "as is" without any
8  * warranty of any kind, whether express or implied.
9  */
10
11 #include <linux/module.h>
12 #include <linux/platform_device.h>
13 #include <linux/of.h>
14 #include <linux/of_device.h>
15 #include <linux/pinctrl/pinctrl.h>
16
17 #include "pinctrl-sunxi.h"
18
19 static const struct sunxi_desc_pin sun8i_h3_r_pins[] = {
20         SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 0),
21                   SUNXI_FUNCTION(0x0, "gpio_in"),
22                   SUNXI_FUNCTION(0x1, "gpio_out"),
23                   SUNXI_FUNCTION(0x2, "s_i2c"),         /* SCK */
24                   SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 0)),  /* PL_EINT0 */
25         SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 1),
26                   SUNXI_FUNCTION(0x0, "gpio_in"),
27                   SUNXI_FUNCTION(0x1, "gpio_out"),
28                   SUNXI_FUNCTION(0x2, "s_i2c"),         /* SDA */
29                   SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 1)),  /* PL_EINT1 */
30         SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 2),
31                   SUNXI_FUNCTION(0x0, "gpio_in"),
32                   SUNXI_FUNCTION(0x1, "gpio_out"),
33                   SUNXI_FUNCTION(0x2, "s_uart"),        /* TX */
34                   SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 2)),  /* PL_EINT2 */
35         SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 3),
36                   SUNXI_FUNCTION(0x0, "gpio_in"),
37                   SUNXI_FUNCTION(0x1, "gpio_out"),
38                   SUNXI_FUNCTION(0x2, "s_uart"),        /* RX */
39                   SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 3)),  /* PL_EINT3 */
40         SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 4),
41                   SUNXI_FUNCTION(0x0, "gpio_in"),
42                   SUNXI_FUNCTION(0x1, "gpio_out"),
43                   SUNXI_FUNCTION(0x2, "s_jtag"),        /* MS */
44                   SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 4)),  /* PL_EINT4 */
45         SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 5),
46                   SUNXI_FUNCTION(0x0, "gpio_in"),
47                   SUNXI_FUNCTION(0x1, "gpio_out"),
48                   SUNXI_FUNCTION(0x2, "s_jtag"),        /* CK */
49                   SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 5)),  /* PL_EINT5 */
50         SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 6),
51                   SUNXI_FUNCTION(0x0, "gpio_in"),
52                   SUNXI_FUNCTION(0x1, "gpio_out"),
53                   SUNXI_FUNCTION(0x2, "s_jtag"),        /* DO */
54                   SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 6)),  /* PL_EINT6 */
55         SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 7),
56                   SUNXI_FUNCTION(0x0, "gpio_in"),
57                   SUNXI_FUNCTION(0x1, "gpio_out"),
58                   SUNXI_FUNCTION(0x2, "s_jtag"),        /* DI */
59                   SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 7)),  /* PL_EINT7 */
60         SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 8),
61                   SUNXI_FUNCTION(0x0, "gpio_in"),
62                   SUNXI_FUNCTION(0x1, "gpio_out"),
63                   SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 8)),  /* PL_EINT8 */
64         SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 9),
65                   SUNXI_FUNCTION(0x0, "gpio_in"),
66                   SUNXI_FUNCTION(0x1, "gpio_out"),
67                   SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 9)),  /* PL_EINT9 */
68         SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 10),
69                   SUNXI_FUNCTION(0x0, "gpio_in"),
70                   SUNXI_FUNCTION(0x1, "gpio_out"),
71                   SUNXI_FUNCTION(0x2, "s_pwm"),
72                   SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 10)), /* PL_EINT10 */
73         SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 11),
74                   SUNXI_FUNCTION(0x0, "gpio_in"),
75                   SUNXI_FUNCTION(0x1, "gpio_out"),
76                   SUNXI_FUNCTION(0x2, "s_cir_rx"),
77                   SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 11)), /* PL_EINT11 */
78 };
79
80 static const struct sunxi_pinctrl_desc sun8i_h3_r_pinctrl_data = {
81         .pins = sun8i_h3_r_pins,
82         .npins = ARRAY_SIZE(sun8i_h3_r_pins),
83         .irq_banks = 1,
84         .pin_base = PL_BASE,
85         .irq_read_needs_mux = true,
86         .disable_strict_mode = true,
87 };
88
89 static int sun8i_h3_r_pinctrl_probe(struct platform_device *pdev)
90 {
91         return sunxi_pinctrl_init(pdev,
92                                   &sun8i_h3_r_pinctrl_data);
93 }
94
95 static const struct of_device_id sun8i_h3_r_pinctrl_match[] = {
96         { .compatible = "allwinner,sun8i-h3-r-pinctrl", },
97         {}
98 };
99
100 static struct platform_driver sun8i_h3_r_pinctrl_driver = {
101         .probe  = sun8i_h3_r_pinctrl_probe,
102         .driver = {
103                 .name           = "sun8i-h3-r-pinctrl",
104                 .of_match_table = sun8i_h3_r_pinctrl_match,
105         },
106 };
107 builtin_platform_driver(sun8i_h3_r_pinctrl_driver);