1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * pin-controller/pin-mux/pin-config/gpio-driver for Samsung's SoC's.
5 * Copyright (c) 2012 Samsung Electronics Co., Ltd.
6 * http://www.samsung.com
7 * Copyright (c) 2012 Linaro Ltd
8 * http://www.linaro.org
10 * Author: Thomas Abraham <thomas.ab@samsung.com>
13 #ifndef __PINCTRL_SAMSUNG_H
14 #define __PINCTRL_SAMSUNG_H
16 #include <linux/pinctrl/pinctrl.h>
17 #include <linux/pinctrl/pinmux.h>
18 #include <linux/pinctrl/pinconf.h>
19 #include <linux/pinctrl/consumer.h>
20 #include <linux/pinctrl/machine.h>
22 #include <linux/gpio/driver.h>
25 * enum pincfg_type - possible pin configuration types supported.
26 * @PINCFG_TYPE_FUNC: Function configuration.
27 * @PINCFG_TYPE_DAT: Pin value configuration.
28 * @PINCFG_TYPE_PUD: Pull up/down configuration.
29 * @PINCFG_TYPE_DRV: Drive strength configuration.
30 * @PINCFG_TYPE_CON_PDN: Pin function in power down mode.
31 * @PINCFG_TYPE_PUD_PDN: Pull up/down configuration in power down mode.
45 * pin configuration (pull up/down and drive strength) type and its value are
46 * packed together into a 16-bits. The upper 8-bits represent the configuration
47 * type and the lower 8-bits hold the value of the configuration type.
49 #define PINCFG_TYPE_MASK 0xFF
50 #define PINCFG_VALUE_SHIFT 8
51 #define PINCFG_VALUE_MASK (0xFF << PINCFG_VALUE_SHIFT)
52 #define PINCFG_PACK(type, value) (((value) << PINCFG_VALUE_SHIFT) | type)
53 #define PINCFG_UNPACK_TYPE(cfg) ((cfg) & PINCFG_TYPE_MASK)
54 #define PINCFG_UNPACK_VALUE(cfg) (((cfg) & PINCFG_VALUE_MASK) >> \
57 * Values for the pin CON register, choosing pin function.
58 * The basic set (input and output) are same between: S3C24xx, S3C64xx, S5PV210,
59 * Exynos ARMv7, Exynos ARMv8, Tesla FSD.
61 #define PIN_CON_FUNC_INPUT 0x0
62 #define PIN_CON_FUNC_OUTPUT 0x1
65 * enum eint_type - possible external interrupt types.
66 * @EINT_TYPE_NONE: bank does not support external interrupts
67 * @EINT_TYPE_GPIO: bank supportes external gpio interrupts
68 * @EINT_TYPE_WKUP: bank supportes external wakeup interrupts
69 * @EINT_TYPE_WKUP_MUX: bank supports multiplexed external wakeup interrupts
71 * Samsung GPIO controller groups all the available pins into banks. The pins
72 * in a pin bank can support external gpio interrupts or external wakeup
73 * interrupts or no interrupts at all. From a software perspective, the only
74 * difference between external gpio and external wakeup interrupts is that
75 * the wakeup interrupts can additionally wakeup the system if it is in
85 /* maximum length of a pin in pin descriptor (example: "gpa0-0") */
86 #define PIN_NAME_LENGTH 10
88 #define PIN_GROUP(n, p, f) \
92 .num_pins = ARRAY_SIZE(p), \
96 #define PMX_FUNC(n, g) \
100 .num_groups = ARRAY_SIZE(g), \
103 struct samsung_pinctrl_drv_data;
106 * struct samsung_pin_bank_type: pin bank type description
107 * @fld_width: widths of configuration bitfields (0 if unavailable)
108 * @reg_offset: offsets of configuration registers (don't care of width is 0)
110 struct samsung_pin_bank_type {
111 u8 fld_width[PINCFG_TYPE_NUM];
112 u8 reg_offset[PINCFG_TYPE_NUM];
116 * struct samsung_pin_bank_data: represent a controller pin-bank (init data).
117 * @type: type of the bank (register offsets and bitfield widths)
118 * @pctl_offset: starting offset of the pin-bank registers.
119 * @pctl_res_idx: index of base address for pin-bank registers.
120 * @nr_pins: number of pins included in this bank.
121 * @eint_func: function to set in CON register to configure pin as EINT.
122 * @eint_type: type of the external interrupt supported by the bank.
123 * @eint_mask: bit mask of pins which support EINT function.
124 * @eint_offset: SoC-specific EINT register or interrupt offset of bank.
125 * @name: name to be prefixed for each pin in this pin bank.
127 struct samsung_pin_bank_data {
128 const struct samsung_pin_bank_type *type;
133 enum eint_type eint_type;
140 * struct samsung_pin_bank: represent a controller pin-bank.
141 * @type: type of the bank (register offsets and bitfield widths)
142 * @pctl_base: base address of the pin-bank registers
143 * @pctl_offset: starting offset of the pin-bank registers.
144 * @nr_pins: number of pins included in this bank.
145 * @eint_base: base address of the pin-bank EINT registers.
146 * @eint_func: function to set in CON register to configure pin as EINT.
147 * @eint_type: type of the external interrupt supported by the bank.
148 * @eint_mask: bit mask of pins which support EINT function.
149 * @eint_offset: SoC-specific EINT register or interrupt offset of bank.
150 * @name: name to be prefixed for each pin in this pin bank.
151 * @pin_base: starting pin number of the bank.
152 * @soc_priv: per-bank private data for SoC-specific code.
153 * @of_node: OF node of the bank.
154 * @drvdata: link to controller driver data
155 * @irq_domain: IRQ domain of the bank.
156 * @gpio_chip: GPIO chip of the bank.
157 * @grange: linux gpio pin range supported by this bank.
158 * @irq_chip: link to irq chip for external gpio and wakeup interrupts.
159 * @slock: spinlock protecting bank registers
160 * @pm_save: saved register values during suspend
162 struct samsung_pin_bank {
163 const struct samsung_pin_bank_type *type;
164 void __iomem *pctl_base;
167 void __iomem *eint_base;
169 enum eint_type eint_type;
176 struct fwnode_handle *fwnode;
177 struct samsung_pinctrl_drv_data *drvdata;
178 struct irq_domain *irq_domain;
179 struct gpio_chip gpio_chip;
180 struct pinctrl_gpio_range grange;
181 struct exynos_irq_chip *irq_chip;
182 raw_spinlock_t slock;
184 u32 pm_save[PINCFG_TYPE_NUM + 1]; /* +1 to handle double CON registers*/
188 * struct samsung_retention_data: runtime pin-bank retention control data.
189 * @regs: array of PMU registers to control pad retention.
190 * @nr_regs: number of registers in @regs array.
191 * @value: value to store to registers to turn off retention.
192 * @refcnt: atomic counter if retention control affects more than one bank.
193 * @priv: retention control code private data
194 * @enable: platform specific callback to enter retention mode.
195 * @disable: platform specific callback to exit retention mode.
197 struct samsung_retention_ctrl {
203 void (*enable)(struct samsung_pinctrl_drv_data *);
204 void (*disable)(struct samsung_pinctrl_drv_data *);
208 * struct samsung_retention_data: represent a pin-bank retention control data.
209 * @regs: array of PMU registers to control pad retention.
210 * @nr_regs: number of registers in @regs array.
211 * @value: value to store to registers to turn off retention.
212 * @refcnt: atomic counter if retention control affects more than one bank.
213 * @init: platform specific callback to initialize retention control.
215 struct samsung_retention_data {
220 struct samsung_retention_ctrl *(*init)(struct samsung_pinctrl_drv_data *,
221 const struct samsung_retention_data *);
225 * struct samsung_pin_ctrl: represent a pin controller.
226 * @pin_banks: list of pin banks included in this controller.
227 * @nr_banks: number of pin banks.
228 * @nr_ext_resources: number of the extra base address for pin banks.
229 * @retention_data: configuration data for retention control.
230 * @eint_gpio_init: platform specific callback to setup the external gpio
231 * interrupts for the controller.
232 * @eint_wkup_init: platform specific callback to setup the external wakeup
233 * interrupts for the controller.
234 * @suspend: platform specific suspend callback, executed during pin controller
235 * device suspend, see samsung_pinctrl_suspend()
236 * @resume: platform specific resume callback, executed during pin controller
237 * device suspend, see samsung_pinctrl_resume()
239 * External wakeup interrupts must define at least eint_wkup_init,
240 * retention_data and suspend in order for proper suspend/resume to work.
242 struct samsung_pin_ctrl {
243 const struct samsung_pin_bank_data *pin_banks;
244 unsigned int nr_banks;
245 unsigned int nr_ext_resources;
246 const struct samsung_retention_data *retention_data;
248 int (*eint_gpio_init)(struct samsung_pinctrl_drv_data *);
249 int (*eint_wkup_init)(struct samsung_pinctrl_drv_data *);
250 void (*suspend)(struct samsung_pinctrl_drv_data *);
251 void (*resume)(struct samsung_pinctrl_drv_data *);
255 * struct samsung_pinctrl_drv_data: wrapper for holding driver data together.
256 * @node: global list node
257 * @virt_base: register base address of the controller; this will be equal
258 * to each bank samsung_pin_bank->pctl_base and used on legacy
259 * platforms (like S3C24XX or S3C64XX) which has to access the base
260 * through samsung_pinctrl_drv_data, not samsung_pin_bank).
261 * @dev: device instance representing the controller.
262 * @irq: interrpt number used by the controller to notify gpio interrupts.
263 * @ctrl: pin controller instance managed by the driver.
264 * @pctl: pin controller descriptor registered with the pinctrl subsystem.
265 * @pctl_dev: cookie representing pinctrl device instance.
266 * @pin_groups: list of pin groups available to the driver.
267 * @nr_groups: number of such pin groups.
268 * @pmx_functions: list of pin functions available to the driver.
269 * @nr_function: number of such pin functions.
270 * @pin_base: starting system wide pin number.
271 * @nr_pins: number of pins supported by the controller.
272 * @retention_ctrl: retention control runtime data.
273 * @suspend: platform specific suspend callback, executed during pin controller
274 * device suspend, see samsung_pinctrl_suspend()
275 * @resume: platform specific resume callback, executed during pin controller
276 * device suspend, see samsung_pinctrl_resume()
278 struct samsung_pinctrl_drv_data {
279 struct list_head node;
280 void __iomem *virt_base;
284 struct pinctrl_desc pctl;
285 struct pinctrl_dev *pctl_dev;
287 const struct samsung_pin_group *pin_groups;
288 unsigned int nr_groups;
289 const struct samsung_pmx_func *pmx_functions;
290 unsigned int nr_functions;
292 struct samsung_pin_bank *pin_banks;
293 unsigned int nr_banks;
294 unsigned int pin_base;
295 unsigned int nr_pins;
297 struct samsung_retention_ctrl *retention_ctrl;
299 void (*suspend)(struct samsung_pinctrl_drv_data *);
300 void (*resume)(struct samsung_pinctrl_drv_data *);
304 * struct samsung_pinctrl_of_match_data: OF match device specific configuration data.
305 * @ctrl: array of pin controller data.
306 * @num_ctrl: size of array @ctrl.
308 struct samsung_pinctrl_of_match_data {
309 const struct samsung_pin_ctrl *ctrl;
310 unsigned int num_ctrl;
314 * struct samsung_pin_group: represent group of pins of a pinmux function.
315 * @name: name of the pin group, used to lookup the group.
316 * @pins: the pins included in this group.
317 * @num_pins: number of pins included in this group.
318 * @func: the function number to be programmed when selected.
320 struct samsung_pin_group {
322 const unsigned int *pins;
328 * struct samsung_pmx_func: represent a pin function.
329 * @name: name of the pin function, used to lookup the function.
330 * @groups: one or more names of pin groups that provide this function.
331 * @num_groups: number of groups included in @groups.
333 struct samsung_pmx_func {
340 /* list of all exported SoC specific data */
341 extern const struct samsung_pinctrl_of_match_data exynos3250_of_data;
342 extern const struct samsung_pinctrl_of_match_data exynos4210_of_data;
343 extern const struct samsung_pinctrl_of_match_data exynos4x12_of_data;
344 extern const struct samsung_pinctrl_of_match_data exynos5250_of_data;
345 extern const struct samsung_pinctrl_of_match_data exynos5260_of_data;
346 extern const struct samsung_pinctrl_of_match_data exynos5410_of_data;
347 extern const struct samsung_pinctrl_of_match_data exynos5420_of_data;
348 extern const struct samsung_pinctrl_of_match_data exynos5433_of_data;
349 extern const struct samsung_pinctrl_of_match_data exynos7_of_data;
350 extern const struct samsung_pinctrl_of_match_data exynos7885_of_data;
351 extern const struct samsung_pinctrl_of_match_data exynos850_of_data;
352 extern const struct samsung_pinctrl_of_match_data exynosautov9_of_data;
353 extern const struct samsung_pinctrl_of_match_data fsd_of_data;
354 extern const struct samsung_pinctrl_of_match_data s3c64xx_of_data;
355 extern const struct samsung_pinctrl_of_match_data s3c2412_of_data;
356 extern const struct samsung_pinctrl_of_match_data s3c2416_of_data;
357 extern const struct samsung_pinctrl_of_match_data s3c2440_of_data;
358 extern const struct samsung_pinctrl_of_match_data s3c2450_of_data;
359 extern const struct samsung_pinctrl_of_match_data s5pv210_of_data;
361 #endif /* __PINCTRL_SAMSUNG_H */