2 * Copyright (c) 2012-2014, The Linux Foundation. All rights reserved.
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 and
6 * only version 2 as published by the Free Software Foundation.
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
14 #include <linux/gpio.h>
15 #include <linux/module.h>
17 #include <linux/of_irq.h>
18 #include <linux/pinctrl/pinconf-generic.h>
19 #include <linux/pinctrl/pinconf.h>
20 #include <linux/pinctrl/pinmux.h>
21 #include <linux/platform_device.h>
22 #include <linux/regmap.h>
23 #include <linux/slab.h>
24 #include <linux/types.h>
26 #include <dt-bindings/pinctrl/qcom,pmic-mpp.h>
29 #include "../pinctrl-utils.h"
31 #define PMIC_MPP_ADDRESS_RANGE 0x100
34 * Pull Up Values - it indicates whether a pull-up should be
35 * applied for bidirectional mode only. The hardware ignores the
36 * configuration when operating in other modes.
38 #define PMIC_MPP_PULL_UP_0P6KOHM 0
39 #define PMIC_MPP_PULL_UP_10KOHM 1
40 #define PMIC_MPP_PULL_UP_30KOHM 2
41 #define PMIC_MPP_PULL_UP_OPEN 3
43 /* type registers base address bases */
44 #define PMIC_MPP_REG_TYPE 0x4
45 #define PMIC_MPP_REG_SUBTYPE 0x5
47 /* mpp peripheral type and subtype values */
48 #define PMIC_MPP_TYPE 0x11
49 #define PMIC_MPP_SUBTYPE_4CH_NO_ANA_OUT 0x3
50 #define PMIC_MPP_SUBTYPE_ULT_4CH_NO_ANA_OUT 0x4
51 #define PMIC_MPP_SUBTYPE_4CH_NO_SINK 0x5
52 #define PMIC_MPP_SUBTYPE_ULT_4CH_NO_SINK 0x6
53 #define PMIC_MPP_SUBTYPE_4CH_FULL_FUNC 0x7
54 #define PMIC_MPP_SUBTYPE_8CH_FULL_FUNC 0xf
56 #define PMIC_MPP_REG_RT_STS 0x10
57 #define PMIC_MPP_REG_RT_STS_VAL_MASK 0x1
59 /* control register base address bases */
60 #define PMIC_MPP_REG_MODE_CTL 0x40
61 #define PMIC_MPP_REG_DIG_VIN_CTL 0x41
62 #define PMIC_MPP_REG_DIG_PULL_CTL 0x42
63 #define PMIC_MPP_REG_DIG_IN_CTL 0x43
64 #define PMIC_MPP_REG_EN_CTL 0x46
65 #define PMIC_MPP_REG_AOUT_CTL 0x48
66 #define PMIC_MPP_REG_AIN_CTL 0x4a
67 #define PMIC_MPP_REG_SINK_CTL 0x4c
69 /* PMIC_MPP_REG_MODE_CTL */
70 #define PMIC_MPP_REG_MODE_VALUE_MASK 0x1
71 #define PMIC_MPP_REG_MODE_FUNCTION_SHIFT 1
72 #define PMIC_MPP_REG_MODE_FUNCTION_MASK 0x7
73 #define PMIC_MPP_REG_MODE_DIR_SHIFT 4
74 #define PMIC_MPP_REG_MODE_DIR_MASK 0x7
76 /* PMIC_MPP_REG_DIG_VIN_CTL */
77 #define PMIC_MPP_REG_VIN_SHIFT 0
78 #define PMIC_MPP_REG_VIN_MASK 0x7
80 /* PMIC_MPP_REG_DIG_PULL_CTL */
81 #define PMIC_MPP_REG_PULL_SHIFT 0
82 #define PMIC_MPP_REG_PULL_MASK 0x7
84 /* PMIC_MPP_REG_EN_CTL */
85 #define PMIC_MPP_REG_MASTER_EN_SHIFT 7
87 /* PMIC_MPP_REG_AIN_CTL */
88 #define PMIC_MPP_REG_AIN_ROUTE_SHIFT 0
89 #define PMIC_MPP_REG_AIN_ROUTE_MASK 0x7
91 #define PMIC_MPP_MODE_DIGITAL_INPUT 0
92 #define PMIC_MPP_MODE_DIGITAL_OUTPUT 1
93 #define PMIC_MPP_MODE_DIGITAL_BIDIR 2
94 #define PMIC_MPP_MODE_ANALOG_BIDIR 3
95 #define PMIC_MPP_MODE_ANALOG_INPUT 4
96 #define PMIC_MPP_MODE_ANALOG_OUTPUT 5
97 #define PMIC_MPP_MODE_CURRENT_SINK 6
99 #define PMIC_MPP_SELECTOR_NORMAL 0
100 #define PMIC_MPP_SELECTOR_PAIRED 1
101 #define PMIC_MPP_SELECTOR_DTEST_FIRST 4
103 #define PMIC_MPP_PHYSICAL_OFFSET 1
105 /* Qualcomm specific pin configurations */
106 #define PMIC_MPP_CONF_AMUX_ROUTE (PIN_CONFIG_END + 1)
107 #define PMIC_MPP_CONF_ANALOG_LEVEL (PIN_CONFIG_END + 2)
108 #define PMIC_MPP_CONF_DTEST_SELECTOR (PIN_CONFIG_END + 3)
109 #define PMIC_MPP_CONF_PAIRED (PIN_CONFIG_END + 4)
112 * struct pmic_mpp_pad - keep current MPP settings
113 * @base: Address base in SPMI device.
114 * @irq: IRQ number which this MPP generate.
115 * @is_enabled: Set to false when MPP should be put in high Z state.
116 * @out_value: Cached pin output value.
117 * @output_enabled: Set to true if MPP output logic is enabled.
118 * @input_enabled: Set to true if MPP input buffer logic is enabled.
119 * @paired: Pin operates in paired mode
120 * @has_pullup: Pin has support to configure pullup
121 * @num_sources: Number of power-sources supported by this MPP.
122 * @power_source: Current power-source used.
123 * @amux_input: Set the source for analog input.
124 * @aout_level: Analog output level
125 * @pullup: Pullup resistor value. Valid in Bidirectional mode only.
126 * @function: See pmic_mpp_functions[].
127 * @drive_strength: Amount of current in sink mode
128 * @dtest: DTEST route selector
130 struct pmic_mpp_pad {
139 unsigned int num_sources;
140 unsigned int power_source;
141 unsigned int amux_input;
142 unsigned int aout_level;
144 unsigned int function;
145 unsigned int drive_strength;
149 struct pmic_mpp_state {
152 struct pinctrl_dev *ctrl;
153 struct gpio_chip chip;
156 static const struct pinconf_generic_params pmic_mpp_bindings[] = {
157 {"qcom,amux-route", PMIC_MPP_CONF_AMUX_ROUTE, 0},
158 {"qcom,analog-level", PMIC_MPP_CONF_ANALOG_LEVEL, 0},
159 {"qcom,dtest", PMIC_MPP_CONF_DTEST_SELECTOR, 0},
160 {"qcom,paired", PMIC_MPP_CONF_PAIRED, 0},
163 #ifdef CONFIG_DEBUG_FS
164 static const struct pin_config_item pmic_conf_items[] = {
165 PCONFDUMP(PMIC_MPP_CONF_AMUX_ROUTE, "analog mux", NULL, true),
166 PCONFDUMP(PMIC_MPP_CONF_ANALOG_LEVEL, "analog level", NULL, true),
167 PCONFDUMP(PMIC_MPP_CONF_DTEST_SELECTOR, "dtest", NULL, true),
168 PCONFDUMP(PMIC_MPP_CONF_PAIRED, "paired", NULL, false),
172 static const char *const pmic_mpp_groups[] = {
173 "mpp1", "mpp2", "mpp3", "mpp4", "mpp5", "mpp6", "mpp7", "mpp8",
176 #define PMIC_MPP_DIGITAL 0
177 #define PMIC_MPP_ANALOG 1
178 #define PMIC_MPP_SINK 2
180 static const char *const pmic_mpp_functions[] = {
181 "digital", "analog", "sink"
184 static int pmic_mpp_read(struct pmic_mpp_state *state,
185 struct pmic_mpp_pad *pad, unsigned int addr)
190 ret = regmap_read(state->map, pad->base + addr, &val);
192 dev_err(state->dev, "read 0x%x failed\n", addr);
199 static int pmic_mpp_write(struct pmic_mpp_state *state,
200 struct pmic_mpp_pad *pad, unsigned int addr,
205 ret = regmap_write(state->map, pad->base + addr, val);
207 dev_err(state->dev, "write 0x%x failed\n", addr);
212 static int pmic_mpp_get_groups_count(struct pinctrl_dev *pctldev)
214 /* Every PIN is a group */
215 return pctldev->desc->npins;
218 static const char *pmic_mpp_get_group_name(struct pinctrl_dev *pctldev,
221 return pctldev->desc->pins[pin].name;
224 static int pmic_mpp_get_group_pins(struct pinctrl_dev *pctldev,
226 const unsigned **pins, unsigned *num_pins)
228 *pins = &pctldev->desc->pins[pin].number;
233 static const struct pinctrl_ops pmic_mpp_pinctrl_ops = {
234 .get_groups_count = pmic_mpp_get_groups_count,
235 .get_group_name = pmic_mpp_get_group_name,
236 .get_group_pins = pmic_mpp_get_group_pins,
237 .dt_node_to_map = pinconf_generic_dt_node_to_map_group,
238 .dt_free_map = pinctrl_utils_free_map,
241 static int pmic_mpp_get_functions_count(struct pinctrl_dev *pctldev)
243 return ARRAY_SIZE(pmic_mpp_functions);
246 static const char *pmic_mpp_get_function_name(struct pinctrl_dev *pctldev,
249 return pmic_mpp_functions[function];
252 static int pmic_mpp_get_function_groups(struct pinctrl_dev *pctldev,
254 const char *const **groups,
255 unsigned *const num_qgroups)
257 *groups = pmic_mpp_groups;
258 *num_qgroups = pctldev->desc->npins;
262 static int pmic_mpp_write_mode_ctl(struct pmic_mpp_state *state,
263 struct pmic_mpp_pad *pad)
270 switch (pad->function) {
271 case PMIC_MPP_ANALOG:
272 if (pad->input_enabled && pad->output_enabled)
273 mode = PMIC_MPP_MODE_ANALOG_BIDIR;
274 else if (pad->input_enabled)
275 mode = PMIC_MPP_MODE_ANALOG_INPUT;
277 mode = PMIC_MPP_MODE_ANALOG_OUTPUT;
279 case PMIC_MPP_DIGITAL:
280 if (pad->input_enabled && pad->output_enabled)
281 mode = PMIC_MPP_MODE_DIGITAL_BIDIR;
282 else if (pad->input_enabled)
283 mode = PMIC_MPP_MODE_DIGITAL_INPUT;
285 mode = PMIC_MPP_MODE_DIGITAL_OUTPUT;
289 mode = PMIC_MPP_MODE_CURRENT_SINK;
294 sel = PMIC_MPP_SELECTOR_DTEST_FIRST + pad->dtest - 1;
295 else if (pad->paired)
296 sel = PMIC_MPP_SELECTOR_PAIRED;
298 sel = PMIC_MPP_SELECTOR_NORMAL;
300 en = !!pad->out_value;
302 val = mode << PMIC_MPP_REG_MODE_DIR_SHIFT |
303 sel << PMIC_MPP_REG_MODE_FUNCTION_SHIFT |
306 return pmic_mpp_write(state, pad, PMIC_MPP_REG_MODE_CTL, val);
309 static int pmic_mpp_set_mux(struct pinctrl_dev *pctldev, unsigned function,
312 struct pmic_mpp_state *state = pinctrl_dev_get_drvdata(pctldev);
313 struct pmic_mpp_pad *pad;
317 pad = pctldev->desc->pins[pin].drv_data;
319 pad->function = function;
321 ret = pmic_mpp_write_mode_ctl(state, pad);
325 val = pad->is_enabled << PMIC_MPP_REG_MASTER_EN_SHIFT;
327 return pmic_mpp_write(state, pad, PMIC_MPP_REG_EN_CTL, val);
330 static const struct pinmux_ops pmic_mpp_pinmux_ops = {
331 .get_functions_count = pmic_mpp_get_functions_count,
332 .get_function_name = pmic_mpp_get_function_name,
333 .get_function_groups = pmic_mpp_get_function_groups,
334 .set_mux = pmic_mpp_set_mux,
337 static int pmic_mpp_config_get(struct pinctrl_dev *pctldev,
338 unsigned int pin, unsigned long *config)
340 unsigned param = pinconf_to_config_param(*config);
341 struct pmic_mpp_pad *pad;
344 pad = pctldev->desc->pins[pin].drv_data;
347 case PIN_CONFIG_BIAS_DISABLE:
348 if (pad->pullup != PMIC_MPP_PULL_UP_OPEN)
352 case PIN_CONFIG_BIAS_PULL_UP:
353 switch (pad->pullup) {
354 case PMIC_MPP_PULL_UP_0P6KOHM:
357 case PMIC_MPP_PULL_UP_10KOHM:
360 case PMIC_MPP_PULL_UP_30KOHM:
367 case PIN_CONFIG_BIAS_HIGH_IMPEDANCE:
372 case PIN_CONFIG_POWER_SOURCE:
373 arg = pad->power_source;
375 case PIN_CONFIG_INPUT_ENABLE:
376 if (!pad->input_enabled)
380 case PIN_CONFIG_OUTPUT:
381 arg = pad->out_value;
383 case PMIC_MPP_CONF_DTEST_SELECTOR:
386 case PMIC_MPP_CONF_AMUX_ROUTE:
387 arg = pad->amux_input;
389 case PMIC_MPP_CONF_PAIRED:
394 case PIN_CONFIG_DRIVE_STRENGTH:
395 arg = pad->drive_strength;
397 case PMIC_MPP_CONF_ANALOG_LEVEL:
398 arg = pad->aout_level;
404 /* Convert register value to pinconf value */
405 *config = pinconf_to_config_packed(param, arg);
409 static int pmic_mpp_config_set(struct pinctrl_dev *pctldev, unsigned int pin,
410 unsigned long *configs, unsigned nconfs)
412 struct pmic_mpp_state *state = pinctrl_dev_get_drvdata(pctldev);
413 struct pmic_mpp_pad *pad;
418 pad = pctldev->desc->pins[pin].drv_data;
420 /* Make it possible to enable the pin, by not setting high impedance */
421 pad->is_enabled = true;
423 for (i = 0; i < nconfs; i++) {
424 param = pinconf_to_config_param(configs[i]);
425 arg = pinconf_to_config_argument(configs[i]);
428 case PIN_CONFIG_BIAS_DISABLE:
429 pad->pullup = PMIC_MPP_PULL_UP_OPEN;
431 case PIN_CONFIG_BIAS_PULL_UP:
434 pad->pullup = PMIC_MPP_PULL_UP_0P6KOHM;
437 pad->pullup = PMIC_MPP_PULL_UP_10KOHM;
440 pad->pullup = PMIC_MPP_PULL_UP_30KOHM;
446 case PIN_CONFIG_BIAS_HIGH_IMPEDANCE:
447 pad->is_enabled = false;
449 case PIN_CONFIG_POWER_SOURCE:
450 if (arg >= pad->num_sources)
452 pad->power_source = arg;
454 case PIN_CONFIG_INPUT_ENABLE:
455 pad->input_enabled = arg ? true : false;
457 case PIN_CONFIG_OUTPUT:
458 pad->output_enabled = true;
459 pad->out_value = arg;
461 case PMIC_MPP_CONF_DTEST_SELECTOR:
464 case PIN_CONFIG_DRIVE_STRENGTH:
465 pad->drive_strength = arg;
467 case PMIC_MPP_CONF_AMUX_ROUTE:
468 if (arg >= PMIC_MPP_AMUX_ROUTE_ABUS4)
470 pad->amux_input = arg;
472 case PMIC_MPP_CONF_ANALOG_LEVEL:
473 pad->aout_level = arg;
475 case PMIC_MPP_CONF_PAIRED:
483 val = pad->power_source << PMIC_MPP_REG_VIN_SHIFT;
485 ret = pmic_mpp_write(state, pad, PMIC_MPP_REG_DIG_VIN_CTL, val);
489 if (pad->has_pullup) {
490 val = pad->pullup << PMIC_MPP_REG_PULL_SHIFT;
492 ret = pmic_mpp_write(state, pad, PMIC_MPP_REG_DIG_PULL_CTL,
498 val = pad->amux_input & PMIC_MPP_REG_AIN_ROUTE_MASK;
500 ret = pmic_mpp_write(state, pad, PMIC_MPP_REG_AIN_CTL, val);
504 ret = pmic_mpp_write(state, pad, PMIC_MPP_REG_AOUT_CTL, pad->aout_level);
508 ret = pmic_mpp_write_mode_ctl(state, pad);
512 ret = pmic_mpp_write(state, pad, PMIC_MPP_REG_SINK_CTL, pad->drive_strength);
516 val = pad->is_enabled << PMIC_MPP_REG_MASTER_EN_SHIFT;
518 return pmic_mpp_write(state, pad, PMIC_MPP_REG_EN_CTL, val);
521 static void pmic_mpp_config_dbg_show(struct pinctrl_dev *pctldev,
522 struct seq_file *s, unsigned pin)
524 struct pmic_mpp_state *state = pinctrl_dev_get_drvdata(pctldev);
525 struct pmic_mpp_pad *pad;
528 static const char *const biases[] = {
529 "0.6kOhm", "10kOhm", "30kOhm", "Disabled"
532 pad = pctldev->desc->pins[pin].drv_data;
534 seq_printf(s, " mpp%-2d:", pin + PMIC_MPP_PHYSICAL_OFFSET);
536 if (!pad->is_enabled) {
540 if (pad->input_enabled) {
541 ret = pmic_mpp_read(state, pad, PMIC_MPP_REG_RT_STS);
545 ret &= PMIC_MPP_REG_RT_STS_VAL_MASK;
546 pad->out_value = ret;
549 seq_printf(s, " %-4s", pad->output_enabled ? "out" : "in");
550 seq_printf(s, " %-7s", pmic_mpp_functions[pad->function]);
551 seq_printf(s, " vin-%d", pad->power_source);
552 seq_printf(s, " %d", pad->aout_level);
554 seq_printf(s, " %-8s", biases[pad->pullup]);
555 seq_printf(s, " %-4s", pad->out_value ? "high" : "low");
557 seq_printf(s, " dtest%d", pad->dtest);
559 seq_puts(s, " paired");
563 static const struct pinconf_ops pmic_mpp_pinconf_ops = {
565 .pin_config_group_get = pmic_mpp_config_get,
566 .pin_config_group_set = pmic_mpp_config_set,
567 .pin_config_group_dbg_show = pmic_mpp_config_dbg_show,
570 static int pmic_mpp_direction_input(struct gpio_chip *chip, unsigned pin)
572 struct pmic_mpp_state *state = gpiochip_get_data(chip);
573 unsigned long config;
575 config = pinconf_to_config_packed(PIN_CONFIG_INPUT_ENABLE, 1);
577 return pmic_mpp_config_set(state->ctrl, pin, &config, 1);
580 static int pmic_mpp_direction_output(struct gpio_chip *chip,
581 unsigned pin, int val)
583 struct pmic_mpp_state *state = gpiochip_get_data(chip);
584 unsigned long config;
586 config = pinconf_to_config_packed(PIN_CONFIG_OUTPUT, val);
588 return pmic_mpp_config_set(state->ctrl, pin, &config, 1);
591 static int pmic_mpp_get(struct gpio_chip *chip, unsigned pin)
593 struct pmic_mpp_state *state = gpiochip_get_data(chip);
594 struct pmic_mpp_pad *pad;
597 pad = state->ctrl->desc->pins[pin].drv_data;
599 if (pad->input_enabled) {
600 ret = pmic_mpp_read(state, pad, PMIC_MPP_REG_RT_STS);
604 pad->out_value = ret & PMIC_MPP_REG_RT_STS_VAL_MASK;
607 return !!pad->out_value;
610 static void pmic_mpp_set(struct gpio_chip *chip, unsigned pin, int value)
612 struct pmic_mpp_state *state = gpiochip_get_data(chip);
613 unsigned long config;
615 config = pinconf_to_config_packed(PIN_CONFIG_OUTPUT, value);
617 pmic_mpp_config_set(state->ctrl, pin, &config, 1);
620 static int pmic_mpp_of_xlate(struct gpio_chip *chip,
621 const struct of_phandle_args *gpio_desc,
624 if (chip->of_gpio_n_cells < 2)
628 *flags = gpio_desc->args[1];
630 return gpio_desc->args[0] - PMIC_MPP_PHYSICAL_OFFSET;
633 static int pmic_mpp_to_irq(struct gpio_chip *chip, unsigned pin)
635 struct pmic_mpp_state *state = gpiochip_get_data(chip);
636 struct pmic_mpp_pad *pad;
638 pad = state->ctrl->desc->pins[pin].drv_data;
643 static void pmic_mpp_dbg_show(struct seq_file *s, struct gpio_chip *chip)
645 struct pmic_mpp_state *state = gpiochip_get_data(chip);
648 for (i = 0; i < chip->ngpio; i++) {
649 pmic_mpp_config_dbg_show(state->ctrl, s, i);
654 static const struct gpio_chip pmic_mpp_gpio_template = {
655 .direction_input = pmic_mpp_direction_input,
656 .direction_output = pmic_mpp_direction_output,
659 .request = gpiochip_generic_request,
660 .free = gpiochip_generic_free,
661 .of_xlate = pmic_mpp_of_xlate,
662 .to_irq = pmic_mpp_to_irq,
663 .dbg_show = pmic_mpp_dbg_show,
666 static int pmic_mpp_populate(struct pmic_mpp_state *state,
667 struct pmic_mpp_pad *pad)
669 int type, subtype, val, dir;
672 type = pmic_mpp_read(state, pad, PMIC_MPP_REG_TYPE);
676 if (type != PMIC_MPP_TYPE) {
677 dev_err(state->dev, "incorrect block type 0x%x at 0x%x\n",
682 subtype = pmic_mpp_read(state, pad, PMIC_MPP_REG_SUBTYPE);
687 case PMIC_MPP_SUBTYPE_4CH_NO_ANA_OUT:
688 case PMIC_MPP_SUBTYPE_ULT_4CH_NO_ANA_OUT:
689 case PMIC_MPP_SUBTYPE_4CH_NO_SINK:
690 case PMIC_MPP_SUBTYPE_ULT_4CH_NO_SINK:
691 case PMIC_MPP_SUBTYPE_4CH_FULL_FUNC:
692 pad->num_sources = 4;
694 case PMIC_MPP_SUBTYPE_8CH_FULL_FUNC:
695 pad->num_sources = 8;
698 dev_err(state->dev, "unknown MPP type 0x%x at 0x%x\n",
703 val = pmic_mpp_read(state, pad, PMIC_MPP_REG_MODE_CTL);
707 pad->out_value = val & PMIC_MPP_REG_MODE_VALUE_MASK;
709 dir = val >> PMIC_MPP_REG_MODE_DIR_SHIFT;
710 dir &= PMIC_MPP_REG_MODE_DIR_MASK;
713 case PMIC_MPP_MODE_DIGITAL_INPUT:
714 pad->input_enabled = true;
715 pad->output_enabled = false;
716 pad->function = PMIC_MPP_DIGITAL;
718 case PMIC_MPP_MODE_DIGITAL_OUTPUT:
719 pad->input_enabled = false;
720 pad->output_enabled = true;
721 pad->function = PMIC_MPP_DIGITAL;
723 case PMIC_MPP_MODE_DIGITAL_BIDIR:
724 pad->input_enabled = true;
725 pad->output_enabled = true;
726 pad->function = PMIC_MPP_DIGITAL;
728 case PMIC_MPP_MODE_ANALOG_BIDIR:
729 pad->input_enabled = true;
730 pad->output_enabled = true;
731 pad->function = PMIC_MPP_ANALOG;
733 case PMIC_MPP_MODE_ANALOG_INPUT:
734 pad->input_enabled = true;
735 pad->output_enabled = false;
736 pad->function = PMIC_MPP_ANALOG;
738 case PMIC_MPP_MODE_ANALOG_OUTPUT:
739 pad->input_enabled = false;
740 pad->output_enabled = true;
741 pad->function = PMIC_MPP_ANALOG;
743 case PMIC_MPP_MODE_CURRENT_SINK:
744 pad->input_enabled = false;
745 pad->output_enabled = true;
746 pad->function = PMIC_MPP_SINK;
749 dev_err(state->dev, "unknown MPP direction\n");
753 sel = val >> PMIC_MPP_REG_MODE_FUNCTION_SHIFT;
754 sel &= PMIC_MPP_REG_MODE_FUNCTION_MASK;
756 if (sel >= PMIC_MPP_SELECTOR_DTEST_FIRST)
757 pad->dtest = sel + 1;
758 else if (sel == PMIC_MPP_SELECTOR_PAIRED)
761 val = pmic_mpp_read(state, pad, PMIC_MPP_REG_DIG_VIN_CTL);
765 pad->power_source = val >> PMIC_MPP_REG_VIN_SHIFT;
766 pad->power_source &= PMIC_MPP_REG_VIN_MASK;
768 if (subtype != PMIC_MPP_SUBTYPE_ULT_4CH_NO_ANA_OUT &&
769 subtype != PMIC_MPP_SUBTYPE_ULT_4CH_NO_SINK) {
770 val = pmic_mpp_read(state, pad, PMIC_MPP_REG_DIG_PULL_CTL);
774 pad->pullup = val >> PMIC_MPP_REG_PULL_SHIFT;
775 pad->pullup &= PMIC_MPP_REG_PULL_MASK;
776 pad->has_pullup = true;
779 val = pmic_mpp_read(state, pad, PMIC_MPP_REG_AIN_CTL);
783 pad->amux_input = val >> PMIC_MPP_REG_AIN_ROUTE_SHIFT;
784 pad->amux_input &= PMIC_MPP_REG_AIN_ROUTE_MASK;
786 val = pmic_mpp_read(state, pad, PMIC_MPP_REG_SINK_CTL);
790 pad->drive_strength = val;
792 val = pmic_mpp_read(state, pad, PMIC_MPP_REG_AOUT_CTL);
796 pad->aout_level = val;
798 val = pmic_mpp_read(state, pad, PMIC_MPP_REG_EN_CTL);
802 pad->is_enabled = !!val;
807 static int pmic_mpp_probe(struct platform_device *pdev)
809 struct device *dev = &pdev->dev;
810 struct pinctrl_pin_desc *pindesc;
811 struct pinctrl_desc *pctrldesc;
812 struct pmic_mpp_pad *pad, *pads;
813 struct pmic_mpp_state *state;
817 ret = of_property_read_u32(dev->of_node, "reg", ®);
819 dev_err(dev, "missing base address");
823 npins = platform_irq_count(pdev);
829 BUG_ON(npins > ARRAY_SIZE(pmic_mpp_groups));
831 state = devm_kzalloc(dev, sizeof(*state), GFP_KERNEL);
835 platform_set_drvdata(pdev, state);
837 state->dev = &pdev->dev;
838 state->map = dev_get_regmap(dev->parent, NULL);
840 pindesc = devm_kcalloc(dev, npins, sizeof(*pindesc), GFP_KERNEL);
844 pads = devm_kcalloc(dev, npins, sizeof(*pads), GFP_KERNEL);
848 pctrldesc = devm_kzalloc(dev, sizeof(*pctrldesc), GFP_KERNEL);
852 pctrldesc->pctlops = &pmic_mpp_pinctrl_ops;
853 pctrldesc->pmxops = &pmic_mpp_pinmux_ops;
854 pctrldesc->confops = &pmic_mpp_pinconf_ops;
855 pctrldesc->owner = THIS_MODULE;
856 pctrldesc->name = dev_name(dev);
857 pctrldesc->pins = pindesc;
858 pctrldesc->npins = npins;
860 pctrldesc->num_custom_params = ARRAY_SIZE(pmic_mpp_bindings);
861 pctrldesc->custom_params = pmic_mpp_bindings;
862 #ifdef CONFIG_DEBUG_FS
863 pctrldesc->custom_conf_items = pmic_conf_items;
866 for (i = 0; i < npins; i++, pindesc++) {
868 pindesc->drv_data = pad;
870 pindesc->name = pmic_mpp_groups[i];
872 pad->irq = platform_get_irq(pdev, i);
876 pad->base = reg + i * PMIC_MPP_ADDRESS_RANGE;
878 ret = pmic_mpp_populate(state, pad);
883 state->chip = pmic_mpp_gpio_template;
884 state->chip.parent = dev;
885 state->chip.base = -1;
886 state->chip.ngpio = npins;
887 state->chip.label = dev_name(dev);
888 state->chip.of_gpio_n_cells = 2;
889 state->chip.can_sleep = false;
891 state->ctrl = devm_pinctrl_register(dev, pctrldesc, state);
892 if (IS_ERR(state->ctrl))
893 return PTR_ERR(state->ctrl);
895 ret = gpiochip_add_data(&state->chip, state);
897 dev_err(state->dev, "can't add gpio chip\n");
901 ret = gpiochip_add_pin_range(&state->chip, dev_name(dev), 0, 0, npins);
903 dev_err(dev, "failed to add pin range\n");
910 gpiochip_remove(&state->chip);
914 static int pmic_mpp_remove(struct platform_device *pdev)
916 struct pmic_mpp_state *state = platform_get_drvdata(pdev);
918 gpiochip_remove(&state->chip);
922 static const struct of_device_id pmic_mpp_of_match[] = {
923 { .compatible = "qcom,pm8841-mpp" }, /* 4 MPP's */
924 { .compatible = "qcom,pm8916-mpp" }, /* 4 MPP's */
925 { .compatible = "qcom,pm8941-mpp" }, /* 8 MPP's */
926 { .compatible = "qcom,pm8994-mpp" }, /* 8 MPP's */
927 { .compatible = "qcom,pma8084-mpp" }, /* 8 MPP's */
928 { .compatible = "qcom,spmi-mpp" }, /* Generic */
932 MODULE_DEVICE_TABLE(of, pmic_mpp_of_match);
934 static struct platform_driver pmic_mpp_driver = {
936 .name = "qcom-spmi-mpp",
937 .of_match_table = pmic_mpp_of_match,
939 .probe = pmic_mpp_probe,
940 .remove = pmic_mpp_remove,
943 module_platform_driver(pmic_mpp_driver);
945 MODULE_AUTHOR("Ivan T. Ivanov <iivanov@mm-sol.com>");
946 MODULE_DESCRIPTION("Qualcomm SPMI PMIC MPP pin control driver");
947 MODULE_ALIAS("platform:qcom-spmi-mpp");
948 MODULE_LICENSE("GPL v2");