1 /* MCP23S08 SPI/I2C GPIO driver */
3 #include <linux/kernel.h>
4 #include <linux/device.h>
5 #include <linux/mutex.h>
6 #include <linux/module.h>
7 #include <linux/gpio.h>
9 #include <linux/spi/spi.h>
10 #include <linux/spi/mcp23s08.h>
11 #include <linux/slab.h>
12 #include <asm/byteorder.h>
13 #include <linux/interrupt.h>
14 #include <linux/of_device.h>
15 #include <linux/regmap.h>
16 #include <linux/pinctrl/pinctrl.h>
17 #include <linux/pinctrl/pinconf.h>
18 #include <linux/pinctrl/pinconf-generic.h>
21 * MCP types supported by driver
23 #define MCP_TYPE_S08 0
24 #define MCP_TYPE_S17 1
25 #define MCP_TYPE_008 2
26 #define MCP_TYPE_017 3
27 #define MCP_TYPE_S18 4
29 #define MCP_MAX_DEV_PER_CS 8
31 /* Registers are all 8 bits wide.
33 * The mcp23s17 has twice as many bits, and can be configured to work
34 * with either 16 bit registers or with two adjacent 8 bit banks.
36 #define MCP_IODIR 0x00 /* init/reset: all ones */
38 #define MCP_GPINTEN 0x02
39 #define MCP_DEFVAL 0x03
40 #define MCP_INTCON 0x04
41 #define MCP_IOCON 0x05
42 # define IOCON_MIRROR (1 << 6)
43 # define IOCON_SEQOP (1 << 5)
44 # define IOCON_HAEN (1 << 3)
45 # define IOCON_ODR (1 << 2)
46 # define IOCON_INTPOL (1 << 1)
47 # define IOCON_INTCC (1)
50 #define MCP_INTCAP 0x08
66 /* lock protects regmap access with bypass/cache flags */
69 struct gpio_chip chip;
71 struct regmap *regmap;
74 struct pinctrl_dev *pctldev;
75 struct pinctrl_desc pinctrl_desc;
78 static const struct reg_default mcp23x08_defaults[] = {
79 {.reg = MCP_IODIR, .def = 0xff},
80 {.reg = MCP_IPOL, .def = 0x00},
81 {.reg = MCP_GPINTEN, .def = 0x00},
82 {.reg = MCP_DEFVAL, .def = 0x00},
83 {.reg = MCP_INTCON, .def = 0x00},
84 {.reg = MCP_IOCON, .def = 0x00},
85 {.reg = MCP_GPPU, .def = 0x00},
86 {.reg = MCP_OLAT, .def = 0x00},
89 static const struct regmap_range mcp23x08_volatile_range = {
90 .range_min = MCP_INTF,
91 .range_max = MCP_GPIO,
94 static const struct regmap_access_table mcp23x08_volatile_table = {
95 .yes_ranges = &mcp23x08_volatile_range,
99 static const struct regmap_range mcp23x08_precious_range = {
100 .range_min = MCP_GPIO,
101 .range_max = MCP_GPIO,
104 static const struct regmap_access_table mcp23x08_precious_table = {
105 .yes_ranges = &mcp23x08_precious_range,
109 static const struct regmap_config mcp23x08_regmap = {
114 .volatile_table = &mcp23x08_volatile_table,
115 .precious_table = &mcp23x08_precious_table,
116 .reg_defaults = mcp23x08_defaults,
117 .num_reg_defaults = ARRAY_SIZE(mcp23x08_defaults),
118 .cache_type = REGCACHE_FLAT,
119 .max_register = MCP_OLAT,
122 static const struct reg_default mcp23x17_defaults[] = {
123 {.reg = MCP_IODIR << 1, .def = 0xffff},
124 {.reg = MCP_IPOL << 1, .def = 0x0000},
125 {.reg = MCP_GPINTEN << 1, .def = 0x0000},
126 {.reg = MCP_DEFVAL << 1, .def = 0x0000},
127 {.reg = MCP_INTCON << 1, .def = 0x0000},
128 {.reg = MCP_IOCON << 1, .def = 0x0000},
129 {.reg = MCP_GPPU << 1, .def = 0x0000},
130 {.reg = MCP_OLAT << 1, .def = 0x0000},
133 static const struct regmap_range mcp23x17_volatile_range = {
134 .range_min = MCP_INTF << 1,
135 .range_max = MCP_GPIO << 1,
138 static const struct regmap_access_table mcp23x17_volatile_table = {
139 .yes_ranges = &mcp23x17_volatile_range,
143 static const struct regmap_range mcp23x17_precious_range = {
144 .range_min = MCP_INTCAP << 1,
145 .range_max = MCP_GPIO << 1,
148 static const struct regmap_access_table mcp23x17_precious_table = {
149 .yes_ranges = &mcp23x17_precious_range,
153 static const struct regmap_config mcp23x17_regmap = {
158 .max_register = MCP_OLAT << 1,
159 .volatile_table = &mcp23x17_volatile_table,
160 .precious_table = &mcp23x17_precious_table,
161 .reg_defaults = mcp23x17_defaults,
162 .num_reg_defaults = ARRAY_SIZE(mcp23x17_defaults),
163 .cache_type = REGCACHE_FLAT,
164 .val_format_endian = REGMAP_ENDIAN_LITTLE,
167 static int mcp_read(struct mcp23s08 *mcp, unsigned int reg, unsigned int *val)
169 return regmap_read(mcp->regmap, reg << mcp->reg_shift, val);
172 static int mcp_write(struct mcp23s08 *mcp, unsigned int reg, unsigned int val)
174 return regmap_write(mcp->regmap, reg << mcp->reg_shift, val);
177 static int mcp_set_mask(struct mcp23s08 *mcp, unsigned int reg,
178 unsigned int mask, bool enabled)
180 u16 val = enabled ? 0xffff : 0x0000;
181 return regmap_update_bits(mcp->regmap, reg << mcp->reg_shift,
185 static int mcp_set_bit(struct mcp23s08 *mcp, unsigned int reg,
186 unsigned int pin, bool enabled)
189 return mcp_set_mask(mcp, reg, mask, enabled);
192 static const struct pinctrl_pin_desc mcp23x08_pins[] = {
193 PINCTRL_PIN(0, "gpio0"),
194 PINCTRL_PIN(1, "gpio1"),
195 PINCTRL_PIN(2, "gpio2"),
196 PINCTRL_PIN(3, "gpio3"),
197 PINCTRL_PIN(4, "gpio4"),
198 PINCTRL_PIN(5, "gpio5"),
199 PINCTRL_PIN(6, "gpio6"),
200 PINCTRL_PIN(7, "gpio7"),
203 static const struct pinctrl_pin_desc mcp23x17_pins[] = {
204 PINCTRL_PIN(0, "gpio0"),
205 PINCTRL_PIN(1, "gpio1"),
206 PINCTRL_PIN(2, "gpio2"),
207 PINCTRL_PIN(3, "gpio3"),
208 PINCTRL_PIN(4, "gpio4"),
209 PINCTRL_PIN(5, "gpio5"),
210 PINCTRL_PIN(6, "gpio6"),
211 PINCTRL_PIN(7, "gpio7"),
212 PINCTRL_PIN(8, "gpio8"),
213 PINCTRL_PIN(9, "gpio9"),
214 PINCTRL_PIN(10, "gpio10"),
215 PINCTRL_PIN(11, "gpio11"),
216 PINCTRL_PIN(12, "gpio12"),
217 PINCTRL_PIN(13, "gpio13"),
218 PINCTRL_PIN(14, "gpio14"),
219 PINCTRL_PIN(15, "gpio15"),
222 static int mcp_pinctrl_get_groups_count(struct pinctrl_dev *pctldev)
227 static const char *mcp_pinctrl_get_group_name(struct pinctrl_dev *pctldev,
233 static int mcp_pinctrl_get_group_pins(struct pinctrl_dev *pctldev,
235 const unsigned int **pins,
236 unsigned int *num_pins)
241 static const struct pinctrl_ops mcp_pinctrl_ops = {
242 .get_groups_count = mcp_pinctrl_get_groups_count,
243 .get_group_name = mcp_pinctrl_get_group_name,
244 .get_group_pins = mcp_pinctrl_get_group_pins,
246 .dt_node_to_map = pinconf_generic_dt_node_to_map_pin,
247 .dt_free_map = pinconf_generic_dt_free_map,
251 static int mcp_pinconf_get(struct pinctrl_dev *pctldev, unsigned int pin,
252 unsigned long *config)
254 struct mcp23s08 *mcp = pinctrl_dev_get_drvdata(pctldev);
255 enum pin_config_param param = pinconf_to_config_param(*config);
256 unsigned int data, status;
260 case PIN_CONFIG_BIAS_PULL_UP:
261 ret = mcp_read(mcp, MCP_GPPU, &data);
264 status = (data & BIT(pin)) ? 1 : 0;
267 dev_err(mcp->dev, "Invalid config param %04x\n", param);
273 return status ? 0 : -EINVAL;
276 static int mcp_pinconf_set(struct pinctrl_dev *pctldev, unsigned int pin,
277 unsigned long *configs, unsigned int num_configs)
279 struct mcp23s08 *mcp = pinctrl_dev_get_drvdata(pctldev);
280 enum pin_config_param param;
286 for (i = 0; i < num_configs; i++) {
287 param = pinconf_to_config_param(configs[i]);
288 arg = pinconf_to_config_argument(configs[i]);
291 case PIN_CONFIG_BIAS_PULL_UP:
292 val = arg ? 0xFFFF : 0x0000;
294 ret = mcp_set_bit(mcp, MCP_GPPU, pin, arg);
297 dev_err(mcp->dev, "Invalid config param %04x\n", param);
305 static const struct pinconf_ops mcp_pinconf_ops = {
306 .pin_config_get = mcp_pinconf_get,
307 .pin_config_set = mcp_pinconf_set,
311 /*----------------------------------------------------------------------*/
313 #ifdef CONFIG_SPI_MASTER
315 static int mcp23sxx_spi_write(void *context, const void *data, size_t count)
317 struct mcp23s08 *mcp = context;
318 struct spi_device *spi = to_spi_device(mcp->dev);
319 struct spi_message m;
320 struct spi_transfer t[2] = { { .tx_buf = &mcp->addr, .len = 1, },
321 { .tx_buf = data, .len = count, }, };
323 spi_message_init(&m);
324 spi_message_add_tail(&t[0], &m);
325 spi_message_add_tail(&t[1], &m);
327 return spi_sync(spi, &m);
330 static int mcp23sxx_spi_gather_write(void *context,
331 const void *reg, size_t reg_size,
332 const void *val, size_t val_size)
334 struct mcp23s08 *mcp = context;
335 struct spi_device *spi = to_spi_device(mcp->dev);
336 struct spi_message m;
337 struct spi_transfer t[3] = { { .tx_buf = &mcp->addr, .len = 1, },
338 { .tx_buf = reg, .len = reg_size, },
339 { .tx_buf = val, .len = val_size, }, };
341 spi_message_init(&m);
342 spi_message_add_tail(&t[0], &m);
343 spi_message_add_tail(&t[1], &m);
344 spi_message_add_tail(&t[2], &m);
346 return spi_sync(spi, &m);
349 static int mcp23sxx_spi_read(void *context, const void *reg, size_t reg_size,
350 void *val, size_t val_size)
352 struct mcp23s08 *mcp = context;
353 struct spi_device *spi = to_spi_device(mcp->dev);
359 tx[0] = mcp->addr | 0x01;
360 tx[1] = *((u8 *) reg);
362 return spi_write_then_read(spi, tx, sizeof(tx), val, val_size);
365 static const struct regmap_bus mcp23sxx_spi_regmap = {
366 .write = mcp23sxx_spi_write,
367 .gather_write = mcp23sxx_spi_gather_write,
368 .read = mcp23sxx_spi_read,
371 #endif /* CONFIG_SPI_MASTER */
373 /*----------------------------------------------------------------------*/
375 /* A given spi_device can represent up to eight mcp23sxx chips
376 * sharing the same chipselect but using different addresses
377 * (e.g. chips #0 and #3 might be populated, but not #1 or $2).
378 * Driver data holds all the per-chip data.
380 struct mcp23s08_driver_data {
382 struct mcp23s08 *mcp[8];
383 struct mcp23s08 chip[];
387 static int mcp23s08_direction_input(struct gpio_chip *chip, unsigned offset)
389 struct mcp23s08 *mcp = gpiochip_get_data(chip);
392 mutex_lock(&mcp->lock);
393 status = mcp_set_bit(mcp, MCP_IODIR, offset, true);
394 mutex_unlock(&mcp->lock);
399 static int mcp23s08_get(struct gpio_chip *chip, unsigned offset)
401 struct mcp23s08 *mcp = gpiochip_get_data(chip);
404 mutex_lock(&mcp->lock);
406 /* REVISIT reading this clears any IRQ ... */
407 ret = mcp_read(mcp, MCP_GPIO, &status);
411 mcp->cached_gpio = status;
412 status = !!(status & (1 << offset));
415 mutex_unlock(&mcp->lock);
419 static int __mcp23s08_set(struct mcp23s08 *mcp, unsigned mask, bool value)
421 return mcp_set_mask(mcp, MCP_OLAT, mask, value);
424 static void mcp23s08_set(struct gpio_chip *chip, unsigned offset, int value)
426 struct mcp23s08 *mcp = gpiochip_get_data(chip);
427 unsigned mask = BIT(offset);
429 mutex_lock(&mcp->lock);
430 __mcp23s08_set(mcp, mask, !!value);
431 mutex_unlock(&mcp->lock);
435 mcp23s08_direction_output(struct gpio_chip *chip, unsigned offset, int value)
437 struct mcp23s08 *mcp = gpiochip_get_data(chip);
438 unsigned mask = BIT(offset);
441 mutex_lock(&mcp->lock);
442 status = __mcp23s08_set(mcp, mask, value);
444 status = mcp_set_mask(mcp, MCP_IODIR, mask, false);
446 mutex_unlock(&mcp->lock);
450 /*----------------------------------------------------------------------*/
451 static irqreturn_t mcp23s08_irq(int irq, void *data)
453 struct mcp23s08 *mcp = data;
454 int intcap, intcon, intf, i, gpio, gpio_orig, intcap_mask, defval;
455 unsigned int child_irq;
456 bool intf_set, intcap_changed, gpio_bit_changed,
457 defval_changed, gpio_set;
459 mutex_lock(&mcp->lock);
460 if (mcp_read(mcp, MCP_INTF, &intf) < 0) {
461 mutex_unlock(&mcp->lock);
465 if (mcp_read(mcp, MCP_INTCAP, &intcap) < 0) {
466 mutex_unlock(&mcp->lock);
470 if (mcp_read(mcp, MCP_INTCON, &intcon) < 0) {
471 mutex_unlock(&mcp->lock);
475 if (mcp_read(mcp, MCP_DEFVAL, &defval) < 0) {
476 mutex_unlock(&mcp->lock);
480 /* This clears the interrupt(configurable on S18) */
481 if (mcp_read(mcp, MCP_GPIO, &gpio) < 0) {
482 mutex_unlock(&mcp->lock);
485 gpio_orig = mcp->cached_gpio;
486 mcp->cached_gpio = gpio;
487 mutex_unlock(&mcp->lock);
490 /* There is no interrupt pending */
494 dev_dbg(mcp->chip.parent,
495 "intcap 0x%04X intf 0x%04X gpio_orig 0x%04X gpio 0x%04X\n",
496 intcap, intf, gpio_orig, gpio);
498 for (i = 0; i < mcp->chip.ngpio; i++) {
499 /* We must check all of the inputs on the chip,
500 * otherwise we may not notice a change on >=2 pins.
502 * On at least the mcp23s17, INTCAP is only updated
503 * one byte at a time(INTCAPA and INTCAPB are
504 * not written to at the same time - only on a per-bank
507 * INTF only contains the single bit that caused the
508 * interrupt per-bank. On the mcp23s17, there is
509 * INTFA and INTFB. If two pins are changed on the A
510 * side at the same time, INTF will only have one bit
511 * set. If one pin on the A side and one pin on the B
512 * side are changed at the same time, INTF will have
513 * two bits set. Thus, INTF can't be the only check
514 * to see if the input has changed.
517 intf_set = intf & BIT(i);
518 if (i < 8 && intf_set)
519 intcap_mask = 0x00FF;
520 else if (i >= 8 && intf_set)
521 intcap_mask = 0xFF00;
525 intcap_changed = (intcap_mask &
526 (intcap & BIT(i))) !=
527 (intcap_mask & (BIT(i) & gpio_orig));
528 gpio_set = BIT(i) & gpio;
529 gpio_bit_changed = (BIT(i) & gpio_orig) !=
531 defval_changed = (BIT(i) & intcon) &&
535 if (((gpio_bit_changed || intcap_changed) &&
536 (BIT(i) & mcp->irq_rise) && gpio_set) ||
537 ((gpio_bit_changed || intcap_changed) &&
538 (BIT(i) & mcp->irq_fall) && !gpio_set) ||
540 child_irq = irq_find_mapping(mcp->chip.irqdomain, i);
541 handle_nested_irq(child_irq);
548 static void mcp23s08_irq_mask(struct irq_data *data)
550 struct gpio_chip *gc = irq_data_get_irq_chip_data(data);
551 struct mcp23s08 *mcp = gpiochip_get_data(gc);
552 unsigned int pos = data->hwirq;
554 mcp_set_bit(mcp, MCP_GPINTEN, pos, false);
557 static void mcp23s08_irq_unmask(struct irq_data *data)
559 struct gpio_chip *gc = irq_data_get_irq_chip_data(data);
560 struct mcp23s08 *mcp = gpiochip_get_data(gc);
561 unsigned int pos = data->hwirq;
563 mcp_set_bit(mcp, MCP_GPINTEN, pos, true);
566 static int mcp23s08_irq_set_type(struct irq_data *data, unsigned int type)
568 struct gpio_chip *gc = irq_data_get_irq_chip_data(data);
569 struct mcp23s08 *mcp = gpiochip_get_data(gc);
570 unsigned int pos = data->hwirq;
573 if ((type & IRQ_TYPE_EDGE_BOTH) == IRQ_TYPE_EDGE_BOTH) {
574 mcp_set_bit(mcp, MCP_INTCON, pos, false);
575 mcp->irq_rise |= BIT(pos);
576 mcp->irq_fall |= BIT(pos);
577 } else if (type & IRQ_TYPE_EDGE_RISING) {
578 mcp_set_bit(mcp, MCP_INTCON, pos, false);
579 mcp->irq_rise |= BIT(pos);
580 mcp->irq_fall &= ~BIT(pos);
581 } else if (type & IRQ_TYPE_EDGE_FALLING) {
582 mcp_set_bit(mcp, MCP_INTCON, pos, false);
583 mcp->irq_rise &= ~BIT(pos);
584 mcp->irq_fall |= BIT(pos);
585 } else if (type & IRQ_TYPE_LEVEL_HIGH) {
586 mcp_set_bit(mcp, MCP_INTCON, pos, true);
587 mcp_set_bit(mcp, MCP_DEFVAL, pos, false);
588 } else if (type & IRQ_TYPE_LEVEL_LOW) {
589 mcp_set_bit(mcp, MCP_INTCON, pos, true);
590 mcp_set_bit(mcp, MCP_DEFVAL, pos, true);
597 static void mcp23s08_irq_bus_lock(struct irq_data *data)
599 struct gpio_chip *gc = irq_data_get_irq_chip_data(data);
600 struct mcp23s08 *mcp = gpiochip_get_data(gc);
602 mutex_lock(&mcp->lock);
603 regcache_cache_only(mcp->regmap, true);
606 static void mcp23s08_irq_bus_unlock(struct irq_data *data)
608 struct gpio_chip *gc = irq_data_get_irq_chip_data(data);
609 struct mcp23s08 *mcp = gpiochip_get_data(gc);
611 regcache_cache_only(mcp->regmap, false);
612 regcache_sync(mcp->regmap);
614 mutex_unlock(&mcp->lock);
617 static struct irq_chip mcp23s08_irq_chip = {
618 .name = "gpio-mcp23xxx",
619 .irq_mask = mcp23s08_irq_mask,
620 .irq_unmask = mcp23s08_irq_unmask,
621 .irq_set_type = mcp23s08_irq_set_type,
622 .irq_bus_lock = mcp23s08_irq_bus_lock,
623 .irq_bus_sync_unlock = mcp23s08_irq_bus_unlock,
626 static int mcp23s08_irq_setup(struct mcp23s08 *mcp)
628 struct gpio_chip *chip = &mcp->chip;
630 unsigned long irqflags = IRQF_ONESHOT | IRQF_SHARED;
632 if (mcp->irq_active_high)
633 irqflags |= IRQF_TRIGGER_HIGH;
635 irqflags |= IRQF_TRIGGER_LOW;
637 err = devm_request_threaded_irq(chip->parent, mcp->irq, NULL,
639 irqflags, dev_name(chip->parent), mcp);
641 dev_err(chip->parent, "unable to request IRQ#%d: %d\n",
649 static int mcp23s08_irqchip_setup(struct mcp23s08 *mcp)
651 struct gpio_chip *chip = &mcp->chip;
654 err = gpiochip_irqchip_add_nested(chip,
660 dev_err(chip->parent,
661 "could not connect irqchip to gpiochip: %d\n", err);
665 gpiochip_set_nested_irqchip(chip,
672 /*----------------------------------------------------------------------*/
674 #ifdef CONFIG_DEBUG_FS
676 #include <linux/seq_file.h>
679 * This compares the chip's registers with the register
680 * cache and corrects any incorrectly set register. This
681 * can be used to fix state for MCP23xxx, that temporary
682 * lost its power supply.
684 #define MCP23S08_CONFIG_REGS 8
685 static int __check_mcp23s08_reg_cache(struct mcp23s08 *mcp)
687 int cached[MCP23S08_CONFIG_REGS];
690 /* read cached config registers */
691 for (i = 0; i < MCP23S08_CONFIG_REGS; i++) {
692 err = mcp_read(mcp, i, &cached[i]);
697 regcache_cache_bypass(mcp->regmap, true);
699 for (i = 0; i < MCP23S08_CONFIG_REGS; i++) {
701 err = mcp_read(mcp, i, &uncached);
705 if (uncached != cached[i]) {
706 dev_err(mcp->dev, "restoring reg 0x%02x from 0x%04x to 0x%04x (power-loss?)\n",
707 i, uncached, cached[i]);
708 mcp_write(mcp, i, cached[i]);
714 dev_err(mcp->dev, "read error: reg=%02x, err=%d", i, err);
715 regcache_cache_bypass(mcp->regmap, false);
720 * This shows more info than the generic gpio dump code:
721 * pullups, deglitching, open drain drive.
723 static void mcp23s08_dbg_show(struct seq_file *s, struct gpio_chip *chip)
725 struct mcp23s08 *mcp;
729 int iodir, gpio, gppu;
731 mcp = gpiochip_get_data(chip);
733 /* NOTE: we only handle one bank for now ... */
734 bank = '0' + ((mcp->addr >> 1) & 0x7);
736 mutex_lock(&mcp->lock);
738 t = __check_mcp23s08_reg_cache(mcp);
740 seq_printf(s, " I/O Error\n");
743 t = mcp_read(mcp, MCP_IODIR, &iodir);
745 seq_printf(s, " I/O Error\n");
748 t = mcp_read(mcp, MCP_GPIO, &gpio);
750 seq_printf(s, " I/O Error\n");
753 t = mcp_read(mcp, MCP_GPPU, &gppu);
755 seq_printf(s, " I/O Error\n");
759 for (t = 0, mask = BIT(0); t < chip->ngpio; t++, mask <<= 1) {
762 label = gpiochip_is_requested(chip, t);
766 seq_printf(s, " gpio-%-3d P%c.%d (%-12s) %s %s %s",
767 chip->base + t, bank, t, label,
768 (iodir & mask) ? "in " : "out",
769 (gpio & mask) ? "hi" : "lo",
770 (gppu & mask) ? "up" : " ");
771 /* NOTE: ignoring the irq-related registers */
775 mutex_unlock(&mcp->lock);
779 #define mcp23s08_dbg_show NULL
782 /*----------------------------------------------------------------------*/
784 static int mcp23s08_probe_one(struct mcp23s08 *mcp, struct device *dev,
785 void *data, unsigned addr, unsigned type,
786 unsigned int base, int cs)
790 struct regmap_config *one_regmap_config = NULL;
792 mutex_init(&mcp->lock);
796 mcp->irq_active_high = false;
798 mcp->chip.direction_input = mcp23s08_direction_input;
799 mcp->chip.get = mcp23s08_get;
800 mcp->chip.direction_output = mcp23s08_direction_output;
801 mcp->chip.set = mcp23s08_set;
802 mcp->chip.dbg_show = mcp23s08_dbg_show;
803 #ifdef CONFIG_OF_GPIO
804 mcp->chip.of_gpio_n_cells = 2;
805 mcp->chip.of_node = dev->of_node;
809 #ifdef CONFIG_SPI_MASTER
815 devm_kmemdup(dev, &mcp23x08_regmap,
816 sizeof(struct regmap_config), GFP_KERNEL);
819 mcp->chip.label = "mcp23s08";
823 devm_kmemdup(dev, &mcp23x17_regmap,
824 sizeof(struct regmap_config), GFP_KERNEL);
826 mcp->chip.ngpio = 16;
827 mcp->chip.label = "mcp23s17";
830 if (!one_regmap_config)
833 one_regmap_config->name = devm_kasprintf(dev, GFP_KERNEL, "%d", (addr & ~0x40) >> 1);
834 mcp->regmap = devm_regmap_init(dev, &mcp23sxx_spi_regmap, mcp,
839 if (!one_regmap_config)
841 mcp->regmap = devm_regmap_init(dev, &mcp23sxx_spi_regmap, mcp,
844 mcp->chip.ngpio = 16;
845 mcp->chip.label = "mcp23s18";
847 #endif /* CONFIG_SPI_MASTER */
849 #if IS_ENABLED(CONFIG_I2C)
851 mcp->regmap = devm_regmap_init_i2c(data, &mcp23x08_regmap);
854 mcp->chip.label = "mcp23008";
858 mcp->regmap = devm_regmap_init_i2c(data, &mcp23x17_regmap);
860 mcp->chip.ngpio = 16;
861 mcp->chip.label = "mcp23017";
863 #endif /* CONFIG_I2C */
866 dev_err(dev, "invalid device type (%d)\n", type);
870 if (IS_ERR(mcp->regmap))
871 return PTR_ERR(mcp->regmap);
873 mcp->chip.base = base;
874 mcp->chip.can_sleep = true;
875 mcp->chip.parent = dev;
876 mcp->chip.owner = THIS_MODULE;
878 /* verify MCP_IOCON.SEQOP = 0, so sequential reads work,
879 * and MCP_IOCON.HAEN = 1, so we work with all chips.
882 ret = mcp_read(mcp, MCP_IOCON, &status);
886 mcp->irq_controller =
887 device_property_read_bool(dev, "interrupt-controller");
888 if (mcp->irq && mcp->irq_controller) {
889 mcp->irq_active_high =
890 device_property_read_bool(dev,
891 "microchip,irq-active-high");
893 mirror = device_property_read_bool(dev, "microchip,irq-mirror");
896 if ((status & IOCON_SEQOP) || !(status & IOCON_HAEN) || mirror ||
897 mcp->irq_active_high) {
898 /* mcp23s17 has IOCON twice, make sure they are in sync */
899 status &= ~(IOCON_SEQOP | (IOCON_SEQOP << 8));
900 status |= IOCON_HAEN | (IOCON_HAEN << 8);
901 if (mcp->irq_active_high)
902 status |= IOCON_INTPOL | (IOCON_INTPOL << 8);
904 status &= ~(IOCON_INTPOL | (IOCON_INTPOL << 8));
907 status |= IOCON_MIRROR | (IOCON_MIRROR << 8);
909 if (type == MCP_TYPE_S18)
910 status |= IOCON_INTCC | (IOCON_INTCC << 8);
912 ret = mcp_write(mcp, MCP_IOCON, status);
917 if (mcp->irq && mcp->irq_controller) {
918 ret = mcp23s08_irqchip_setup(mcp);
923 ret = devm_gpiochip_add_data(dev, &mcp->chip, mcp);
927 mcp->pinctrl_desc.name = "mcp23xxx-pinctrl";
928 mcp->pinctrl_desc.pctlops = &mcp_pinctrl_ops;
929 mcp->pinctrl_desc.confops = &mcp_pinconf_ops;
930 mcp->pinctrl_desc.npins = mcp->chip.ngpio;
931 if (mcp->pinctrl_desc.npins == 8)
932 mcp->pinctrl_desc.pins = mcp23x08_pins;
933 else if (mcp->pinctrl_desc.npins == 16)
934 mcp->pinctrl_desc.pins = mcp23x17_pins;
935 mcp->pinctrl_desc.owner = THIS_MODULE;
937 mcp->pctldev = devm_pinctrl_register(dev, &mcp->pinctrl_desc, mcp);
938 if (IS_ERR(mcp->pctldev)) {
939 ret = PTR_ERR(mcp->pctldev);
944 ret = mcp23s08_irq_setup(mcp);
948 dev_dbg(dev, "can't setup chip %d, --> %d\n", addr, ret);
952 /*----------------------------------------------------------------------*/
955 #ifdef CONFIG_SPI_MASTER
956 static const struct of_device_id mcp23s08_spi_of_match[] = {
958 .compatible = "microchip,mcp23s08",
959 .data = (void *) MCP_TYPE_S08,
962 .compatible = "microchip,mcp23s17",
963 .data = (void *) MCP_TYPE_S17,
966 .compatible = "microchip,mcp23s18",
967 .data = (void *) MCP_TYPE_S18,
969 /* NOTE: The use of the mcp prefix is deprecated and will be removed. */
971 .compatible = "mcp,mcp23s08",
972 .data = (void *) MCP_TYPE_S08,
975 .compatible = "mcp,mcp23s17",
976 .data = (void *) MCP_TYPE_S17,
980 MODULE_DEVICE_TABLE(of, mcp23s08_spi_of_match);
983 #if IS_ENABLED(CONFIG_I2C)
984 static const struct of_device_id mcp23s08_i2c_of_match[] = {
986 .compatible = "microchip,mcp23008",
987 .data = (void *) MCP_TYPE_008,
990 .compatible = "microchip,mcp23017",
991 .data = (void *) MCP_TYPE_017,
993 /* NOTE: The use of the mcp prefix is deprecated and will be removed. */
995 .compatible = "mcp,mcp23008",
996 .data = (void *) MCP_TYPE_008,
999 .compatible = "mcp,mcp23017",
1000 .data = (void *) MCP_TYPE_017,
1004 MODULE_DEVICE_TABLE(of, mcp23s08_i2c_of_match);
1006 #endif /* CONFIG_OF */
1009 #if IS_ENABLED(CONFIG_I2C)
1011 static int mcp230xx_probe(struct i2c_client *client,
1012 const struct i2c_device_id *id)
1014 struct mcp23s08_platform_data *pdata, local_pdata;
1015 struct mcp23s08 *mcp;
1018 pdata = dev_get_platdata(&client->dev);
1020 pdata = &local_pdata;
1024 mcp = devm_kzalloc(&client->dev, sizeof(*mcp), GFP_KERNEL);
1028 mcp->irq = client->irq;
1029 status = mcp23s08_probe_one(mcp, &client->dev, client, client->addr,
1030 id->driver_data, pdata->base, 0);
1034 i2c_set_clientdata(client, mcp);
1039 static const struct i2c_device_id mcp230xx_id[] = {
1040 { "mcp23008", MCP_TYPE_008 },
1041 { "mcp23017", MCP_TYPE_017 },
1044 MODULE_DEVICE_TABLE(i2c, mcp230xx_id);
1046 static struct i2c_driver mcp230xx_driver = {
1049 .of_match_table = of_match_ptr(mcp23s08_i2c_of_match),
1051 .probe = mcp230xx_probe,
1052 .id_table = mcp230xx_id,
1055 static int __init mcp23s08_i2c_init(void)
1057 return i2c_add_driver(&mcp230xx_driver);
1060 static void mcp23s08_i2c_exit(void)
1062 i2c_del_driver(&mcp230xx_driver);
1067 static int __init mcp23s08_i2c_init(void) { return 0; }
1068 static void mcp23s08_i2c_exit(void) { }
1070 #endif /* CONFIG_I2C */
1072 /*----------------------------------------------------------------------*/
1074 #ifdef CONFIG_SPI_MASTER
1076 static int mcp23s08_probe(struct spi_device *spi)
1078 struct mcp23s08_platform_data *pdata, local_pdata;
1081 struct mcp23s08_driver_data *data;
1084 const struct of_device_id *match;
1086 match = of_match_device(of_match_ptr(mcp23s08_spi_of_match), &spi->dev);
1088 type = (int)(uintptr_t)match->data;
1090 type = spi_get_device_id(spi)->driver_data;
1092 pdata = dev_get_platdata(&spi->dev);
1094 pdata = &local_pdata;
1097 status = device_property_read_u32(&spi->dev,
1098 "microchip,spi-present-mask", &pdata->spi_present_mask);
1100 status = device_property_read_u32(&spi->dev,
1101 "mcp,spi-present-mask",
1102 &pdata->spi_present_mask);
1105 dev_err(&spi->dev, "missing spi-present-mask");
1111 if (!pdata->spi_present_mask || pdata->spi_present_mask > 0xff) {
1112 dev_err(&spi->dev, "invalid spi-present-mask");
1116 for (addr = 0; addr < MCP_MAX_DEV_PER_CS; addr++) {
1117 if (pdata->spi_present_mask & BIT(addr))
1124 data = devm_kzalloc(&spi->dev,
1125 sizeof(*data) + chips * sizeof(struct mcp23s08),
1130 spi_set_drvdata(spi, data);
1132 for (addr = 0; addr < MCP_MAX_DEV_PER_CS; addr++) {
1133 if (!(pdata->spi_present_mask & BIT(addr)))
1136 data->mcp[addr] = &data->chip[chips];
1137 data->mcp[addr]->irq = spi->irq;
1138 status = mcp23s08_probe_one(data->mcp[addr], &spi->dev, spi,
1139 0x40 | (addr << 1), type,
1144 if (pdata->base != -1)
1145 pdata->base += data->mcp[addr]->chip.ngpio;
1146 ngpio += data->mcp[addr]->chip.ngpio;
1148 data->ngpio = ngpio;
1153 static const struct spi_device_id mcp23s08_ids[] = {
1154 { "mcp23s08", MCP_TYPE_S08 },
1155 { "mcp23s17", MCP_TYPE_S17 },
1156 { "mcp23s18", MCP_TYPE_S18 },
1159 MODULE_DEVICE_TABLE(spi, mcp23s08_ids);
1161 static struct spi_driver mcp23s08_driver = {
1162 .probe = mcp23s08_probe,
1163 .id_table = mcp23s08_ids,
1166 .of_match_table = of_match_ptr(mcp23s08_spi_of_match),
1170 static int __init mcp23s08_spi_init(void)
1172 return spi_register_driver(&mcp23s08_driver);
1175 static void mcp23s08_spi_exit(void)
1177 spi_unregister_driver(&mcp23s08_driver);
1182 static int __init mcp23s08_spi_init(void) { return 0; }
1183 static void mcp23s08_spi_exit(void) { }
1185 #endif /* CONFIG_SPI_MASTER */
1187 /*----------------------------------------------------------------------*/
1189 static int __init mcp23s08_init(void)
1193 ret = mcp23s08_spi_init();
1197 ret = mcp23s08_i2c_init();
1204 mcp23s08_spi_exit();
1208 /* register after spi/i2c postcore initcall and before
1209 * subsys initcalls that may rely on these GPIOs
1211 subsys_initcall(mcp23s08_init);
1213 static void __exit mcp23s08_exit(void)
1215 mcp23s08_spi_exit();
1216 mcp23s08_i2c_exit();
1218 module_exit(mcp23s08_exit);
1220 MODULE_LICENSE("GPL");