1 // SPDX-License-Identifier: GPL-2.0-only
3 * Awinic AW9523B i2c pin controller driver
4 * Copyright (c) 2020, AngeloGioacchino Del Regno
5 * <angelogioacchino.delregno@somainline.org>
8 #include <linux/bitfield.h>
9 #include <linux/gpio/consumer.h>
10 #include <linux/gpio/driver.h>
11 #include <linux/i2c.h>
12 #include <linux/init.h>
13 #include <linux/interrupt.h>
14 #include <linux/irq.h>
15 #include <linux/mutex.h>
16 #include <linux/module.h>
17 #include <linux/pinctrl/pinconf.h>
18 #include <linux/pinctrl/pinctrl.h>
19 #include <linux/pinctrl/pinmux.h>
20 #include <linux/pinctrl/pinconf-generic.h>
21 #include <linux/property.h>
22 #include <linux/regmap.h>
23 #include <linux/regulator/consumer.h>
24 #include <linux/slab.h>
26 #define AW9523_MAX_FUNCS 2
27 #define AW9523_NUM_PORTS 2
28 #define AW9523_PINS_PER_PORT 8
31 * HW needs at least 20uS for reset and at least 1-2uS to recover from
32 * reset, but we have to account for eventual board quirks, if any:
33 * for this reason, keep reset asserted for 50uS and wait for 20uS
34 * to recover from the reset.
36 #define AW9523_HW_RESET_US 50
37 #define AW9523_HW_RESET_RECOVERY_US 20
39 /* Port 0: P0_0...P0_7 - Port 1: P1_0...P1_7 */
40 #define AW9523_PIN_TO_PORT(pin) (pin >> 3)
41 #define AW9523_REG_IN_STATE(pin) (0x00 + AW9523_PIN_TO_PORT(pin))
42 #define AW9523_REG_OUT_STATE(pin) (0x02 + AW9523_PIN_TO_PORT(pin))
43 #define AW9523_REG_CONF_STATE(pin) (0x04 + AW9523_PIN_TO_PORT(pin))
44 #define AW9523_REG_INTR_DIS(pin) (0x06 + AW9523_PIN_TO_PORT(pin))
45 #define AW9523_REG_CHIPID 0x10
46 #define AW9523_VAL_EXPECTED_CHIPID 0x23
48 #define AW9523_REG_GCR 0x11
49 #define AW9523_GCR_ISEL_MASK GENMASK(0, 1)
50 #define AW9523_GCR_GPOMD_MASK BIT(4)
52 #define AW9523_REG_PORT_MODE(pin) (0x12 + AW9523_PIN_TO_PORT(pin))
53 #define AW9523_REG_SOFT_RESET 0x7f
54 #define AW9523_VAL_RESET 0x00
57 * struct aw9523_irq - Interrupt controller structure
58 * @lock: mutex locking for the irq bus
59 * @irqchip: structure holding irqchip params
60 * @cached_gpio: stores the previous gpio status for bit comparison
64 struct irq_chip *irqchip;
69 * struct aw9523_pinmux - Pin mux params
70 * @name: Name of the mux
71 * @grps: Groups of the mux
72 * @num_grps: Number of groups (sizeof array grps)
74 struct aw9523_pinmux {
76 const char * const *grps;
81 * struct aw9523 - Main driver structure
83 * @regmap: regmap handle for current device
84 * @i2c_lock: Mutex lock for i2c operations
85 * @reset_gpio: Hardware reset (RSTN) signal GPIO
86 * @vio_vreg: VCC regulator (Optional)
87 * @pctl: pinctrl handle for current device
88 * @gpio: structure holding gpiochip params
89 * @irq: Interrupt controller structure
93 struct regmap *regmap;
94 struct mutex i2c_lock;
95 struct gpio_desc *reset_gpio;
96 struct regulator *vio_vreg;
97 struct pinctrl_dev *pctl;
98 struct gpio_chip gpio;
99 struct aw9523_irq *irq;
102 static const struct pinctrl_pin_desc aw9523_pins[] = {
104 PINCTRL_PIN(0, "gpio0"),
105 PINCTRL_PIN(1, "gpio1"),
106 PINCTRL_PIN(2, "gpio2"),
107 PINCTRL_PIN(3, "gpio3"),
108 PINCTRL_PIN(4, "gpio4"),
109 PINCTRL_PIN(5, "gpio5"),
110 PINCTRL_PIN(6, "gpio6"),
111 PINCTRL_PIN(7, "gpio7"),
114 PINCTRL_PIN(8, "gpio8"),
115 PINCTRL_PIN(9, "gpio9"),
116 PINCTRL_PIN(10, "gpio10"),
117 PINCTRL_PIN(11, "gpio11"),
118 PINCTRL_PIN(12, "gpio12"),
119 PINCTRL_PIN(13, "gpio13"),
120 PINCTRL_PIN(14, "gpio14"),
121 PINCTRL_PIN(15, "gpio15"),
124 static int aw9523_pinctrl_get_groups_count(struct pinctrl_dev *pctldev)
126 return ARRAY_SIZE(aw9523_pins);
129 static const char *aw9523_pinctrl_get_group_name(struct pinctrl_dev *pctldev,
130 unsigned int selector)
132 return aw9523_pins[selector].name;
135 static int aw9523_pinctrl_get_group_pins(struct pinctrl_dev *pctldev,
136 unsigned int selector,
137 const unsigned int **pins,
138 unsigned int *num_pins)
140 *pins = &aw9523_pins[selector].number;
145 static const struct pinctrl_ops aw9523_pinctrl_ops = {
146 .get_groups_count = aw9523_pinctrl_get_groups_count,
147 .get_group_pins = aw9523_pinctrl_get_group_pins,
148 .get_group_name = aw9523_pinctrl_get_group_name,
149 .dt_node_to_map = pinconf_generic_dt_node_to_map_pin,
150 .dt_free_map = pinconf_generic_dt_free_map,
153 static const char * const gpio_pwm_groups[] = {
154 "gpio0", "gpio1", "gpio2", "gpio3", "gpio4", "gpio5",
155 "gpio6", "gpio7", "gpio8", "gpio9", "gpio10", "gpio11",
156 "gpio12", "gpio13", "gpio14", "gpio15"
159 /* Warning: Do NOT reorder this array */
160 static const struct aw9523_pinmux aw9523_pmx[] = {
163 .grps = gpio_pwm_groups,
164 .num_grps = ARRAY_SIZE(gpio_pwm_groups),
168 .grps = gpio_pwm_groups,
169 .num_grps = ARRAY_SIZE(gpio_pwm_groups),
173 static int aw9523_pmx_get_funcs_count(struct pinctrl_dev *pctl)
175 return ARRAY_SIZE(aw9523_pmx);
178 static const char *aw9523_pmx_get_fname(struct pinctrl_dev *pctl,
181 return aw9523_pmx[sel].name;
184 static int aw9523_pmx_get_groups(struct pinctrl_dev *pctl, unsigned int sel,
185 const char * const **groups,
186 unsigned int * const num_groups)
188 *groups = aw9523_pmx[sel].grps;
189 *num_groups = aw9523_pmx[sel].num_grps;
193 static int aw9523_pmx_set_mux(struct pinctrl_dev *pctl, unsigned int fsel,
196 struct aw9523 *awi = pinctrl_dev_get_drvdata(pctl);
197 int ret, pin = aw9523_pins[grp].number % AW9523_PINS_PER_PORT;
199 if (fsel >= ARRAY_SIZE(aw9523_pmx))
203 * This maps directly to the aw9523_pmx array: programming a
204 * high bit means "gpio" and a low bit means "pwm".
206 mutex_lock(&awi->i2c_lock);
207 ret = regmap_update_bits(awi->regmap, AW9523_REG_PORT_MODE(pin),
208 BIT(pin), (fsel ? BIT(pin) : 0));
209 mutex_unlock(&awi->i2c_lock);
213 static const struct pinmux_ops aw9523_pinmux_ops = {
214 .get_functions_count = aw9523_pmx_get_funcs_count,
215 .get_function_name = aw9523_pmx_get_fname,
216 .get_function_groups = aw9523_pmx_get_groups,
217 .set_mux = aw9523_pmx_set_mux,
220 static int aw9523_pcfg_param_to_reg(enum pin_config_param pcp, int pin, u8 *r)
225 case PIN_CONFIG_BIAS_PULL_PIN_DEFAULT:
226 case PIN_CONFIG_BIAS_PULL_DOWN:
227 case PIN_CONFIG_BIAS_PULL_UP:
228 reg = AW9523_REG_IN_STATE(pin);
230 case PIN_CONFIG_DRIVE_OPEN_DRAIN:
231 case PIN_CONFIG_DRIVE_PUSH_PULL:
232 reg = AW9523_REG_GCR;
234 case PIN_CONFIG_INPUT_ENABLE:
235 case PIN_CONFIG_OUTPUT_ENABLE:
236 reg = AW9523_REG_CONF_STATE(pin);
238 case PIN_CONFIG_OUTPUT:
239 reg = AW9523_REG_OUT_STATE(pin);
249 static int aw9523_pconf_get(struct pinctrl_dev *pctldev, unsigned int pin,
250 unsigned long *config)
252 struct aw9523 *awi = pinctrl_dev_get_drvdata(pctldev);
253 enum pin_config_param param = pinconf_to_config_param(*config);
254 int regbit = pin % AW9523_PINS_PER_PORT;
259 rc = aw9523_pcfg_param_to_reg(param, pin, ®);
263 mutex_lock(&awi->i2c_lock);
264 rc = regmap_read(awi->regmap, reg, &val);
265 mutex_unlock(&awi->i2c_lock);
270 case PIN_CONFIG_BIAS_PULL_UP:
271 case PIN_CONFIG_INPUT_ENABLE:
272 case PIN_CONFIG_OUTPUT:
275 case PIN_CONFIG_BIAS_PULL_DOWN:
276 case PIN_CONFIG_OUTPUT_ENABLE:
280 case PIN_CONFIG_DRIVE_OPEN_DRAIN:
281 if (pin >= AW9523_PINS_PER_PORT)
284 val = !FIELD_GET(AW9523_GCR_GPOMD_MASK, val);
286 case PIN_CONFIG_DRIVE_PUSH_PULL:
287 if (pin >= AW9523_PINS_PER_PORT)
290 val = FIELD_GET(AW9523_GCR_GPOMD_MASK, val);
298 *config = pinconf_to_config_packed(param, !!val);
303 static int aw9523_pconf_set(struct pinctrl_dev *pctldev, unsigned int pin,
304 unsigned long *configs, unsigned int num_configs)
306 struct aw9523 *awi = pinctrl_dev_get_drvdata(pctldev);
307 enum pin_config_param param;
308 int regbit = pin % AW9523_PINS_PER_PORT;
311 unsigned int mask, val;
314 mutex_lock(&awi->i2c_lock);
315 for (i = 0; i < num_configs; i++) {
316 param = pinconf_to_config_param(configs[i]);
317 arg = pinconf_to_config_argument(configs[i]);
319 rc = aw9523_pcfg_param_to_reg(param, pin, ®);
324 case PIN_CONFIG_OUTPUT:
325 /* First, enable pin output */
326 rc = regmap_update_bits(awi->regmap,
327 AW9523_REG_CONF_STATE(pin),
332 /* Then, fall through to config output level */
334 case PIN_CONFIG_OUTPUT_ENABLE:
337 case PIN_CONFIG_BIAS_PULL_PIN_DEFAULT:
338 case PIN_CONFIG_BIAS_PULL_DOWN:
339 case PIN_CONFIG_BIAS_PULL_UP:
340 case PIN_CONFIG_INPUT_ENABLE:
342 val = arg ? BIT(regbit) : 0;
344 case PIN_CONFIG_DRIVE_OPEN_DRAIN:
345 /* Open-Drain is supported only on port 0 */
346 if (pin >= AW9523_PINS_PER_PORT) {
350 mask = AW9523_GCR_GPOMD_MASK;
353 case PIN_CONFIG_DRIVE_PUSH_PULL:
354 /* Port 1 is always Push-Pull */
355 if (pin >= AW9523_PINS_PER_PORT) {
360 mask = AW9523_GCR_GPOMD_MASK;
361 val = AW9523_GCR_GPOMD_MASK;
368 rc = regmap_update_bits(awi->regmap, reg, mask, val);
373 mutex_unlock(&awi->i2c_lock);
377 static const struct pinconf_ops aw9523_pinconf_ops = {
378 .pin_config_get = aw9523_pconf_get,
379 .pin_config_set = aw9523_pconf_set,
384 * aw9523_get_pin_direction - Get pin direction
385 * @regmap: Regmap structure
386 * @pin: gpiolib pin number
387 * @n: pin index in port register
389 * Return: Pin direction for success or negative number for error
391 static int aw9523_get_pin_direction(struct regmap *regmap, u8 pin, u8 n)
395 ret = regmap_test_bits(regmap, AW9523_REG_CONF_STATE(pin), BIT(n));
399 return ret ? GPIO_LINE_DIRECTION_IN : GPIO_LINE_DIRECTION_OUT;
403 * aw9523_get_port_state - Get input or output state for entire port
404 * @regmap: Regmap structure
405 * @pin: gpiolib pin number
406 * @regbit: hw pin index, used to retrieve port number
407 * @state: returned port state
409 * Return: Zero for success or negative number for error
411 static int aw9523_get_port_state(struct regmap *regmap, u8 pin,
412 u8 regbit, unsigned int *state)
417 dir = aw9523_get_pin_direction(regmap, pin, regbit);
421 if (dir == GPIO_LINE_DIRECTION_IN)
422 reg = AW9523_REG_IN_STATE(pin);
424 reg = AW9523_REG_OUT_STATE(pin);
426 return regmap_read(regmap, reg, state);
429 static int aw9523_gpio_irq_type(struct irq_data *d, unsigned int type)
433 case IRQ_TYPE_EDGE_BOTH:
441 * aw9523_irq_mask - Mask interrupt
444 * Sets which interrupt to mask in the bitmap;
445 * The interrupt will be masked when unlocking the irq bus.
447 static void aw9523_irq_mask(struct irq_data *d)
449 struct aw9523 *awi = gpiochip_get_data(irq_data_get_irq_chip_data(d));
450 unsigned int n = d->hwirq % AW9523_PINS_PER_PORT;
452 regmap_update_bits(awi->regmap,
453 AW9523_REG_INTR_DIS(d->hwirq),
455 gpiochip_disable_irq(&awi->gpio, irqd_to_hwirq(d));
459 * aw9523_irq_unmask - Unmask interrupt
462 * Sets which interrupt to unmask in the bitmap;
463 * The interrupt will be masked when unlocking the irq bus.
465 static void aw9523_irq_unmask(struct irq_data *d)
467 struct aw9523 *awi = gpiochip_get_data(irq_data_get_irq_chip_data(d));
468 unsigned int n = d->hwirq % AW9523_PINS_PER_PORT;
470 gpiochip_enable_irq(&awi->gpio, irqd_to_hwirq(d));
471 regmap_update_bits(awi->regmap,
472 AW9523_REG_INTR_DIS(d->hwirq),
476 static irqreturn_t aw9523_irq_thread_func(int irq, void *dev_id)
478 struct aw9523 *awi = (struct aw9523 *)dev_id;
479 unsigned long n, val = 0;
480 unsigned long changed_gpio;
481 unsigned int tmp, port_pin, i, ret;
483 for (i = 0; i < AW9523_NUM_PORTS; i++) {
484 port_pin = i * AW9523_PINS_PER_PORT;
485 ret = regmap_read(awi->regmap,
486 AW9523_REG_IN_STATE(port_pin),
490 val |= (u8)tmp << (i * 8);
493 /* Handle GPIO input release interrupt as well */
494 changed_gpio = awi->irq->cached_gpio ^ val;
495 awi->irq->cached_gpio = val;
498 * To avoid up to four *slow* i2c reads from any driver hooked
499 * up to our interrupts, just check for the irq_find_mapping
500 * result: if the interrupt is not mapped, then we don't want
503 for_each_set_bit(n, &changed_gpio, awi->gpio.ngpio) {
504 tmp = irq_find_mapping(awi->gpio.irq.domain, n);
507 handle_nested_irq(tmp);
514 * aw9523_irq_bus_lock - Grab lock for interrupt operation
517 static void aw9523_irq_bus_lock(struct irq_data *d)
519 struct aw9523 *awi = gpiochip_get_data(irq_data_get_irq_chip_data(d));
521 mutex_lock(&awi->irq->lock);
522 regcache_cache_only(awi->regmap, true);
526 * aw9523_irq_bus_sync_unlock - Synchronize state and unlock
529 * Writes the interrupt mask bits (found in the bit map) to the
530 * hardware, then unlocks the bus.
532 static void aw9523_irq_bus_sync_unlock(struct irq_data *d)
534 struct aw9523 *awi = gpiochip_get_data(irq_data_get_irq_chip_data(d));
536 regcache_cache_only(awi->regmap, false);
537 regcache_sync(awi->regmap);
538 mutex_unlock(&awi->irq->lock);
541 static int aw9523_gpio_get_direction(struct gpio_chip *chip,
544 struct aw9523 *awi = gpiochip_get_data(chip);
545 u8 regbit = offset % AW9523_PINS_PER_PORT;
548 mutex_lock(&awi->i2c_lock);
549 ret = aw9523_get_pin_direction(awi->regmap, offset, regbit);
550 mutex_unlock(&awi->i2c_lock);
555 static int aw9523_gpio_get(struct gpio_chip *chip, unsigned int offset)
557 struct aw9523 *awi = gpiochip_get_data(chip);
558 u8 regbit = offset % AW9523_PINS_PER_PORT;
562 mutex_lock(&awi->i2c_lock);
563 ret = aw9523_get_port_state(awi->regmap, offset, regbit, &val);
564 mutex_unlock(&awi->i2c_lock);
568 return !!(val & BIT(regbit));
572 * _aw9523_gpio_get_multiple - Get I/O state for an entire port
573 * @regmap: Regmap structure
574 * @pin: gpiolib pin number
575 * @regbit: hw pin index, used to retrieve port number
576 * @state: returned port I/O state
578 * Return: Zero for success or negative number for error
580 static int _aw9523_gpio_get_multiple(struct aw9523 *awi, u8 regbit,
587 /* Registers are 8-bits wide */
588 ret = regmap_read(awi->regmap, AW9523_REG_CONF_STATE(regbit), &dir_in);
595 ret = regmap_read(awi->regmap, AW9523_REG_IN_STATE(regbit),
599 *state |= (u8)val & m;
604 ret = regmap_read(awi->regmap, AW9523_REG_OUT_STATE(regbit),
608 *state |= (u8)val & m;
614 static int aw9523_gpio_get_multiple(struct gpio_chip *chip,
618 struct aw9523 *awi = gpiochip_get_data(chip);
622 mutex_lock(&awi->i2c_lock);
624 /* Port 0 (gpio 0-7) */
627 ret = _aw9523_gpio_get_multiple(awi, 0, &state, m);
633 /* Port 1 (gpio 8-15) */
634 m = (*mask >> 8) & U8_MAX;
636 ret = _aw9523_gpio_get_multiple(awi, AW9523_PINS_PER_PORT,
641 *bits |= (state << 8);
644 mutex_unlock(&awi->i2c_lock);
648 static void aw9523_gpio_set_multiple(struct gpio_chip *chip,
652 struct aw9523 *awi = gpiochip_get_data(chip);
653 u8 mask_lo, mask_hi, bits_lo, bits_hi;
657 mask_lo = *mask & U8_MAX;
658 mask_hi = (*mask >> 8) & U8_MAX;
659 mutex_lock(&awi->i2c_lock);
661 reg = AW9523_REG_OUT_STATE(AW9523_PINS_PER_PORT);
662 bits_hi = (*bits >> 8) & U8_MAX;
664 ret = regmap_write_bits(awi->regmap, reg, mask_hi, bits_hi);
666 dev_warn(awi->dev, "Cannot write port1 out level\n");
671 reg = AW9523_REG_OUT_STATE(0);
672 bits_lo = *bits & U8_MAX;
673 ret = regmap_write_bits(awi->regmap, reg, mask_lo, bits_lo);
675 dev_warn(awi->dev, "Cannot write port0 out level\n");
678 mutex_unlock(&awi->i2c_lock);
681 static void aw9523_gpio_set(struct gpio_chip *chip,
682 unsigned int offset, int value)
684 struct aw9523 *awi = gpiochip_get_data(chip);
685 u8 regbit = offset % AW9523_PINS_PER_PORT;
687 mutex_lock(&awi->i2c_lock);
688 regmap_update_bits(awi->regmap, AW9523_REG_OUT_STATE(offset),
689 BIT(regbit), value ? BIT(regbit) : 0);
690 mutex_unlock(&awi->i2c_lock);
694 static int aw9523_direction_input(struct gpio_chip *chip, unsigned int offset)
696 struct aw9523 *awi = gpiochip_get_data(chip);
697 u8 regbit = offset % AW9523_PINS_PER_PORT;
700 mutex_lock(&awi->i2c_lock);
701 ret = regmap_update_bits(awi->regmap, AW9523_REG_CONF_STATE(offset),
702 BIT(regbit), BIT(regbit));
703 mutex_unlock(&awi->i2c_lock);
708 static int aw9523_direction_output(struct gpio_chip *chip,
709 unsigned int offset, int value)
711 struct aw9523 *awi = gpiochip_get_data(chip);
712 u8 regbit = offset % AW9523_PINS_PER_PORT;
715 mutex_lock(&awi->i2c_lock);
716 ret = regmap_update_bits(awi->regmap, AW9523_REG_OUT_STATE(offset),
717 BIT(regbit), value ? BIT(regbit) : 0);
721 ret = regmap_update_bits(awi->regmap, AW9523_REG_CONF_STATE(offset),
724 mutex_unlock(&awi->i2c_lock);
728 static int aw9523_drive_reset_gpio(struct aw9523 *awi)
730 unsigned int chip_id;
734 * If the chip is already configured for any reason, then we
735 * will probably succeed in sending the soft reset signal to
736 * the hardware through I2C: this operation takes less time
737 * compared to a full HW reset and it gives the same results.
739 ret = regmap_write(awi->regmap, AW9523_REG_SOFT_RESET, 0);
743 dev_dbg(awi->dev, "Cannot execute soft reset: trying hard reset\n");
744 ret = gpiod_direction_output(awi->reset_gpio, 0);
748 /* The reset pulse has to be longer than 20uS due to deglitch */
749 usleep_range(AW9523_HW_RESET_US, AW9523_HW_RESET_US + 1);
751 ret = gpiod_direction_output(awi->reset_gpio, 1);
755 /* The HW needs at least 1uS to reliably recover after reset */
756 usleep_range(AW9523_HW_RESET_RECOVERY_US,
757 AW9523_HW_RESET_RECOVERY_US + 1);
759 /* Check the ChipID */
760 ret = regmap_read(awi->regmap, AW9523_REG_CHIPID, &chip_id);
762 dev_err(awi->dev, "Cannot read Chip ID: %d\n", ret);
765 if (chip_id != AW9523_VAL_EXPECTED_CHIPID) {
766 dev_err(awi->dev, "Bad ChipID; read 0x%x, expected 0x%x\n",
767 chip_id, AW9523_VAL_EXPECTED_CHIPID);
774 static int aw9523_hw_reset(struct aw9523 *awi)
776 int ret, max_retries = 2;
778 /* Sometimes the chip needs more than one reset cycle */
780 ret = aw9523_drive_reset_gpio(awi);
784 } while (max_retries);
789 static int aw9523_init_gpiochip(struct aw9523 *awi, unsigned int npins)
791 struct device *dev = awi->dev;
792 struct gpio_chip *gc = &awi->gpio;
794 gc->label = devm_kstrdup(dev, dev_name(dev), GFP_KERNEL);
800 gc->get_direction = aw9523_gpio_get_direction;
801 gc->direction_input = aw9523_direction_input;
802 gc->direction_output = aw9523_direction_output;
803 gc->get = aw9523_gpio_get;
804 gc->get_multiple = aw9523_gpio_get_multiple;
805 gc->set = aw9523_gpio_set;
806 gc->set_multiple = aw9523_gpio_set_multiple;
807 gc->set_config = gpiochip_generic_config;
809 gc->owner = THIS_MODULE;
810 gc->can_sleep = false;
815 static const struct irq_chip aw9523_irq_chip = {
817 .irq_mask = aw9523_irq_mask,
818 .irq_unmask = aw9523_irq_unmask,
819 .irq_bus_lock = aw9523_irq_bus_lock,
820 .irq_bus_sync_unlock = aw9523_irq_bus_sync_unlock,
821 .irq_set_type = aw9523_gpio_irq_type,
822 .flags = IRQCHIP_IMMUTABLE,
823 GPIOCHIP_IRQ_RESOURCE_HELPERS,
826 static int aw9523_init_irq(struct aw9523 *awi, int irq)
828 struct device *dev = awi->dev;
829 struct gpio_irq_chip *girq;
830 struct irq_chip *irqchip;
833 if (!device_property_read_bool(dev, "interrupt-controller"))
836 irqchip = devm_kzalloc(dev, sizeof(*irqchip), GFP_KERNEL);
840 awi->irq = devm_kzalloc(dev, sizeof(*awi->irq), GFP_KERNEL);
844 awi->irq->irqchip = irqchip;
845 mutex_init(&awi->irq->lock);
847 ret = devm_request_threaded_irq(dev, irq, NULL, aw9523_irq_thread_func,
848 IRQF_ONESHOT, dev_name(dev), awi);
850 dev_err(dev, "Failed to request irq %d\n", irq);
854 girq = &awi->gpio.irq;
855 gpio_irq_chip_set_chip(girq, &aw9523_irq_chip);
856 girq->parent_handler = NULL;
857 girq->num_parents = 0;
858 girq->parents = NULL;
859 girq->default_type = IRQ_TYPE_EDGE_BOTH;
860 girq->handler = handle_simple_irq;
861 girq->threaded = true;
866 static bool aw9523_is_reg_hole(unsigned int reg)
868 return (reg > AW9523_REG_PORT_MODE(AW9523_PINS_PER_PORT) &&
869 reg < AW9523_REG_SOFT_RESET) ||
870 (reg > AW9523_REG_INTR_DIS(AW9523_PINS_PER_PORT) &&
871 reg < AW9523_REG_CHIPID);
874 static bool aw9523_readable_reg(struct device *dev, unsigned int reg)
876 /* All available registers (minus holes) can be read */
877 return !aw9523_is_reg_hole(reg);
880 static bool aw9523_volatile_reg(struct device *dev, unsigned int reg)
882 return aw9523_is_reg_hole(reg) ||
883 reg == AW9523_REG_IN_STATE(0) ||
884 reg == AW9523_REG_IN_STATE(AW9523_PINS_PER_PORT) ||
885 reg == AW9523_REG_CHIPID ||
886 reg == AW9523_REG_SOFT_RESET;
889 static bool aw9523_writeable_reg(struct device *dev, unsigned int reg)
891 return !aw9523_is_reg_hole(reg) && reg != AW9523_REG_CHIPID;
894 static bool aw9523_precious_reg(struct device *dev, unsigned int reg)
896 /* Reading AW9523_REG_IN_STATE clears interrupt status */
897 return aw9523_is_reg_hole(reg) ||
898 reg == AW9523_REG_IN_STATE(0) ||
899 reg == AW9523_REG_IN_STATE(AW9523_PINS_PER_PORT);
902 static const struct regmap_config aw9523_regmap = {
907 .precious_reg = aw9523_precious_reg,
908 .readable_reg = aw9523_readable_reg,
909 .volatile_reg = aw9523_volatile_reg,
910 .writeable_reg = aw9523_writeable_reg,
912 .cache_type = REGCACHE_FLAT,
913 .disable_locking = true,
915 .num_reg_defaults_raw = AW9523_REG_SOFT_RESET,
918 static int aw9523_hw_init(struct aw9523 *awi)
920 u8 p1_pin = AW9523_PINS_PER_PORT;
924 /* No register caching during initialization */
925 regcache_cache_bypass(awi->regmap, true);
927 /* Bring up the chip */
928 ret = aw9523_hw_reset(awi);
930 dev_err(awi->dev, "HW Reset failed: %d\n", ret);
935 * This is the expected chip and it is running: it's time to
936 * set a safe default configuration in case the user doesn't
937 * configure (all of the available) pins in this chip.
938 * P.S.: The writes order doesn't matter.
941 /* Set all pins as GPIO */
942 ret = regmap_write(awi->regmap, AW9523_REG_PORT_MODE(0), U8_MAX);
945 ret = regmap_write(awi->regmap, AW9523_REG_PORT_MODE(p1_pin), U8_MAX);
949 /* Set Open-Drain mode on Port 0 (Port 1 is always P-P) */
950 ret = regmap_write(awi->regmap, AW9523_REG_GCR, 0);
954 /* Set all pins as inputs */
955 ret = regmap_write(awi->regmap, AW9523_REG_CONF_STATE(0), U8_MAX);
958 ret = regmap_write(awi->regmap, AW9523_REG_CONF_STATE(p1_pin), U8_MAX);
962 /* Disable all interrupts to avoid unreasoned wakeups */
963 ret = regmap_write(awi->regmap, AW9523_REG_INTR_DIS(0), U8_MAX);
966 ret = regmap_write(awi->regmap, AW9523_REG_INTR_DIS(p1_pin), U8_MAX);
970 /* Clear setup-generated interrupts by performing a port state read */
971 ret = aw9523_get_port_state(awi->regmap, 0, 0, &val);
974 ret = aw9523_get_port_state(awi->regmap, p1_pin, 0, &val);
978 /* Everything went fine: activate and reinitialize register cache */
979 regcache_cache_bypass(awi->regmap, false);
980 return regmap_reinit_cache(awi->regmap, &aw9523_regmap);
983 static int aw9523_probe(struct i2c_client *client)
985 struct device *dev = &client->dev;
986 struct pinctrl_desc *pdesc;
990 awi = devm_kzalloc(dev, sizeof(*awi), GFP_KERNEL);
994 i2c_set_clientdata(client, awi);
997 awi->reset_gpio = devm_gpiod_get(dev, "reset", GPIOD_OUT_HIGH);
998 if (IS_ERR(awi->reset_gpio))
999 return PTR_ERR(awi->reset_gpio);
1000 gpiod_set_consumer_name(awi->reset_gpio, "aw9523 reset");
1002 awi->regmap = devm_regmap_init_i2c(client, &aw9523_regmap);
1003 if (IS_ERR(awi->regmap))
1004 return PTR_ERR(awi->regmap);
1006 awi->vio_vreg = devm_regulator_get_optional(dev, "vio");
1007 if (IS_ERR(awi->vio_vreg)) {
1008 if (PTR_ERR(awi->vio_vreg) == -EPROBE_DEFER)
1009 return -EPROBE_DEFER;
1010 awi->vio_vreg = NULL;
1012 ret = regulator_enable(awi->vio_vreg);
1017 mutex_init(&awi->i2c_lock);
1018 lockdep_set_subclass(&awi->i2c_lock,
1019 i2c_adapter_depth(client->adapter));
1021 pdesc = devm_kzalloc(dev, sizeof(*pdesc), GFP_KERNEL);
1025 ret = aw9523_hw_init(awi);
1027 goto err_disable_vregs;
1029 pdesc->name = dev_name(dev);
1030 pdesc->owner = THIS_MODULE;
1031 pdesc->pctlops = &aw9523_pinctrl_ops;
1032 pdesc->pmxops = &aw9523_pinmux_ops;
1033 pdesc->confops = &aw9523_pinconf_ops;
1034 pdesc->pins = aw9523_pins;
1035 pdesc->npins = ARRAY_SIZE(aw9523_pins);
1037 ret = aw9523_init_gpiochip(awi, pdesc->npins);
1039 goto err_disable_vregs;
1042 ret = aw9523_init_irq(awi, client->irq);
1044 goto err_disable_vregs;
1047 awi->pctl = devm_pinctrl_register(dev, pdesc, awi);
1048 if (IS_ERR(awi->pctl)) {
1049 ret = PTR_ERR(awi->pctl);
1050 dev_err(dev, "Cannot register pinctrl: %d", ret);
1051 goto err_disable_vregs;
1054 ret = devm_gpiochip_add_data(dev, &awi->gpio, awi);
1056 goto err_disable_vregs;
1062 regulator_disable(awi->vio_vreg);
1063 mutex_destroy(&awi->i2c_lock);
1067 static void aw9523_remove(struct i2c_client *client)
1069 struct aw9523 *awi = i2c_get_clientdata(client);
1076 * If the chip VIO is connected to a regulator that we can turn
1077 * off, life is easy... otherwise, reinitialize the chip and
1078 * set the pins to hardware defaults before removing the driver
1079 * to leave it in a clean, safe and predictable state.
1081 if (awi->vio_vreg) {
1082 regulator_disable(awi->vio_vreg);
1084 mutex_lock(&awi->i2c_lock);
1085 ret = aw9523_hw_init(awi);
1086 mutex_unlock(&awi->i2c_lock);
1091 mutex_destroy(&awi->i2c_lock);
1094 static const struct i2c_device_id aw9523_i2c_id_table[] = {
1095 { "aw9523_i2c", 0 },
1098 MODULE_DEVICE_TABLE(i2c, aw9523_i2c_id_table);
1100 static const struct of_device_id of_aw9523_i2c_match[] = {
1101 { .compatible = "awinic,aw9523-pinctrl", },
1104 MODULE_DEVICE_TABLE(of, of_aw9523_i2c_match);
1106 static struct i2c_driver aw9523_driver = {
1108 .name = "aw9523-pinctrl",
1109 .of_match_table = of_aw9523_i2c_match,
1111 .probe = aw9523_probe,
1112 .remove = aw9523_remove,
1113 .id_table = aw9523_i2c_id_table,
1115 module_i2c_driver(aw9523_driver);
1117 MODULE_DESCRIPTION("Awinic AW9523 I2C GPIO Expander driver");
1118 MODULE_AUTHOR("AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>");
1119 MODULE_LICENSE("GPL v2");