1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Pin controller and GPIO driver for Amlogic Meson SoCs
5 * Copyright (C) 2014 Beniamino Galvani <b.galvani@gmail.com>
8 #include <linux/gpio/driver.h>
9 #include <linux/pinctrl/pinctrl.h>
10 #include <linux/platform_device.h>
11 #include <linux/regmap.h>
12 #include <linux/types.h>
17 * struct meson_pmx_group - a pinmux group
20 * @pins: pins in the group
21 * @num_pins: number of pins in the group
22 * @is_gpio: whether the group is a single GPIO group
23 * @reg: register offset for the group in the domain mux registers
24 * @bit bit index enabling the group
25 * @domain: index of the domain this group belongs to
27 struct meson_pmx_group {
29 const unsigned int *pins;
30 unsigned int num_pins;
35 * struct meson_pmx_func - a pinmux function
37 * @name: function name
38 * @groups: groups in the function
39 * @num_groups: number of groups in the function
41 struct meson_pmx_func {
43 const char * const *groups;
44 unsigned int num_groups;
48 * struct meson_reg_desc - a register descriptor
50 * @reg: register offset in the regmap
51 * @bit: bit index in register
53 * The structure describes the information needed to control pull,
54 * pull-enable, direction, etc. for a single pin
56 struct meson_reg_desc {
62 * enum meson_reg_type - type of registers encoded in @meson_reg_desc
75 * enum meson_pinconf_drv - value of drive-strength supported
77 enum meson_pinconf_drv {
78 MESON_PINCONF_DRV_500UA,
79 MESON_PINCONF_DRV_2500UA,
80 MESON_PINCONF_DRV_3000UA,
81 MESON_PINCONF_DRV_4000UA,
88 * @first: first pin of the bank
89 * @last: last pin of the bank
90 * @irq: hwirq base number of the bank
91 * @regs: array of register descriptors
93 * A bank represents a set of pins controlled by a contiguous set of
94 * bits in the domain registers. The structure specifies which bits in
95 * the regmap control the different functionalities. Each member of
96 * the @regs array refers to the first pin of the bank.
104 struct meson_reg_desc regs[NUM_REG];
107 struct meson_pinctrl_data {
109 const struct pinctrl_pin_desc *pins;
110 struct meson_pmx_group *groups;
111 struct meson_pmx_func *funcs;
112 unsigned int num_pins;
113 unsigned int num_groups;
114 unsigned int num_funcs;
115 struct meson_bank *banks;
116 unsigned int num_banks;
117 const struct pinmux_ops *pmx_ops;
119 int (*parse_dt)(struct meson_pinctrl *pc);
122 struct meson_pinctrl {
124 struct pinctrl_dev *pcdev;
125 struct pinctrl_desc desc;
126 struct meson_pinctrl_data *data;
127 struct regmap *reg_mux;
128 struct regmap *reg_pullen;
129 struct regmap *reg_pull;
130 struct regmap *reg_gpio;
131 struct regmap *reg_ds;
132 struct gpio_chip chip;
133 struct device_node *of_node;
136 #define FUNCTION(fn) \
139 .groups = fn ## _groups, \
140 .num_groups = ARRAY_SIZE(fn ## _groups), \
143 #define BANK_DS(n, f, l, fi, li, per, peb, pr, pb, dr, db, or, ob, ir, ib, \
152 [REG_PULLEN] = { per, peb }, \
153 [REG_PULL] = { pr, pb }, \
154 [REG_DIR] = { dr, db }, \
155 [REG_OUT] = { or, ob }, \
156 [REG_IN] = { ir, ib }, \
157 [REG_DS] = { dsr, dsb }, \
161 #define BANK(n, f, l, fi, li, per, peb, pr, pb, dr, db, or, ob, ir, ib) \
162 BANK_DS(n, f, l, fi, li, per, peb, pr, pb, dr, db, or, ob, ir, ib, 0, 0)
164 #define MESON_PIN(x) PINCTRL_PIN(x, #x)
166 /* Common pmx functions */
167 int meson_pmx_get_funcs_count(struct pinctrl_dev *pcdev);
168 const char *meson_pmx_get_func_name(struct pinctrl_dev *pcdev,
170 int meson_pmx_get_groups(struct pinctrl_dev *pcdev,
172 const char * const **groups,
173 unsigned * const num_groups);
175 /* Common probe function */
176 int meson_pinctrl_probe(struct platform_device *pdev);
177 /* Common ao groups extra dt parse function for SoCs before g12a */
178 int meson8_aobus_parse_dt_extra(struct meson_pinctrl *pc);
179 /* Common extra dt parse function for SoCs like A1 */
180 int meson_a1_parse_dt_extra(struct meson_pinctrl *pc);