1 // SPDX-License-Identifier: GPL-2.0
3 * MediaTek Pinctrl Paris Driver, which implement the vendor per-pin
4 * bindings for MediaTek SoC.
6 * Copyright (C) 2018 MediaTek Inc.
7 * Author: Sean Wang <sean.wang@mediatek.com>
8 * Zhiyong Tao <zhiyong.tao@mediatek.com>
9 * Hongzhou.Yang <hongzhou.yang@mediatek.com>
12 #include <linux/gpio/driver.h>
13 #include <linux/module.h>
14 #include <dt-bindings/pinctrl/mt65xx.h>
15 #include "pinctrl-paris.h"
17 #define PINCTRL_PINCTRL_DEV KBUILD_MODNAME
19 /* Custom pinconf parameters */
20 #define MTK_PIN_CONFIG_TDSEL (PIN_CONFIG_END + 1)
21 #define MTK_PIN_CONFIG_RDSEL (PIN_CONFIG_END + 2)
22 #define MTK_PIN_CONFIG_PU_ADV (PIN_CONFIG_END + 3)
23 #define MTK_PIN_CONFIG_PD_ADV (PIN_CONFIG_END + 4)
24 #define MTK_PIN_CONFIG_DRV_ADV (PIN_CONFIG_END + 5)
26 static const struct pinconf_generic_params mtk_custom_bindings[] = {
27 {"mediatek,tdsel", MTK_PIN_CONFIG_TDSEL, 0},
28 {"mediatek,rdsel", MTK_PIN_CONFIG_RDSEL, 0},
29 {"mediatek,pull-up-adv", MTK_PIN_CONFIG_PU_ADV, 1},
30 {"mediatek,pull-down-adv", MTK_PIN_CONFIG_PD_ADV, 1},
31 {"mediatek,drive-strength-adv", MTK_PIN_CONFIG_DRV_ADV, 2},
34 #ifdef CONFIG_DEBUG_FS
35 static const struct pin_config_item mtk_conf_items[] = {
36 PCONFDUMP(MTK_PIN_CONFIG_TDSEL, "tdsel", NULL, true),
37 PCONFDUMP(MTK_PIN_CONFIG_RDSEL, "rdsel", NULL, true),
38 PCONFDUMP(MTK_PIN_CONFIG_PU_ADV, "pu-adv", NULL, true),
39 PCONFDUMP(MTK_PIN_CONFIG_PD_ADV, "pd-adv", NULL, true),
40 PCONFDUMP(MTK_PIN_CONFIG_DRV_ADV, "drive-strength-adv", NULL, true),
44 static const char * const mtk_gpio_functions[] = {
45 "func0", "func1", "func2", "func3",
46 "func4", "func5", "func6", "func7",
47 "func8", "func9", "func10", "func11",
48 "func12", "func13", "func14", "func15",
51 static int mtk_pinmux_gpio_request_enable(struct pinctrl_dev *pctldev,
52 struct pinctrl_gpio_range *range,
55 struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev);
56 const struct mtk_pin_desc *desc;
58 desc = (const struct mtk_pin_desc *)&hw->soc->pins[pin];
60 return mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_MODE,
64 static int mtk_pinmux_gpio_set_direction(struct pinctrl_dev *pctldev,
65 struct pinctrl_gpio_range *range,
66 unsigned int pin, bool input)
68 struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev);
69 const struct mtk_pin_desc *desc;
71 desc = (const struct mtk_pin_desc *)&hw->soc->pins[pin];
73 /* hardware would take 0 as input direction */
74 return mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DIR, !input);
77 static int mtk_pinconf_get(struct pinctrl_dev *pctldev,
78 unsigned int pin, unsigned long *config)
80 struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev);
81 u32 param = pinconf_to_config_param(*config);
82 int pullup, err, reg, ret = 1;
83 const struct mtk_pin_desc *desc;
85 if (pin >= hw->soc->npins) {
89 desc = (const struct mtk_pin_desc *)&hw->soc->pins[pin];
92 case PIN_CONFIG_BIAS_DISABLE:
93 case PIN_CONFIG_BIAS_PULL_UP:
94 case PIN_CONFIG_BIAS_PULL_DOWN:
95 if (hw->soc->bias_get_combo) {
96 err = hw->soc->bias_get_combo(hw, desc, &pullup, &ret);
99 if (ret == MTK_PUPD_SET_R1R0_00)
101 if (param == PIN_CONFIG_BIAS_DISABLE) {
102 if (ret != MTK_DISABLE)
104 } else if (param == PIN_CONFIG_BIAS_PULL_UP) {
105 if (!pullup || ret == MTK_DISABLE)
107 } else if (param == PIN_CONFIG_BIAS_PULL_DOWN) {
108 if (pullup || ret == MTK_DISABLE)
115 case PIN_CONFIG_SLEW_RATE:
116 err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_SR, &ret);
118 case PIN_CONFIG_INPUT_ENABLE:
119 case PIN_CONFIG_OUTPUT_ENABLE:
120 err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_DIR, &ret);
123 /* CONFIG Current direction return value
124 * ------------- ----------------- ----------------------
125 * OUTPUT_ENABLE output 1 (= HW value)
126 * input 0 (= HW value)
127 * INPUT_ENABLE output 0 (= reverse HW value)
128 * input 1 (= reverse HW value)
130 if (param == PIN_CONFIG_INPUT_ENABLE)
134 case PIN_CONFIG_INPUT_SCHMITT_ENABLE:
135 err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_DIR, &ret);
138 /* return error when in output mode
139 * because schmitt trigger only work in input mode
146 err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_SMT, &ret);
149 case PIN_CONFIG_DRIVE_STRENGTH:
150 if (hw->soc->drive_get)
151 err = hw->soc->drive_get(hw, desc, &ret);
155 case MTK_PIN_CONFIG_TDSEL:
156 case MTK_PIN_CONFIG_RDSEL:
157 reg = (param == MTK_PIN_CONFIG_TDSEL) ?
158 PINCTRL_PIN_REG_TDSEL : PINCTRL_PIN_REG_RDSEL;
159 err = mtk_hw_get_value(hw, desc, reg, &ret);
161 case MTK_PIN_CONFIG_PU_ADV:
162 case MTK_PIN_CONFIG_PD_ADV:
163 if (hw->soc->adv_pull_get) {
164 pullup = param == MTK_PIN_CONFIG_PU_ADV;
165 err = hw->soc->adv_pull_get(hw, desc, pullup, &ret);
169 case MTK_PIN_CONFIG_DRV_ADV:
170 if (hw->soc->adv_drive_get)
171 err = hw->soc->adv_drive_get(hw, desc, &ret);
181 *config = pinconf_to_config_packed(param, ret);
186 static int mtk_pinconf_set(struct pinctrl_dev *pctldev, unsigned int pin,
187 enum pin_config_param param, u32 arg)
189 struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev);
190 const struct mtk_pin_desc *desc;
194 if (pin >= hw->soc->npins) {
198 desc = (const struct mtk_pin_desc *)&hw->soc->pins[pin];
200 switch ((u32)param) {
201 case PIN_CONFIG_BIAS_DISABLE:
202 if (hw->soc->bias_set_combo)
203 err = hw->soc->bias_set_combo(hw, desc, 0, MTK_DISABLE);
207 case PIN_CONFIG_BIAS_PULL_UP:
208 if (hw->soc->bias_set_combo)
209 err = hw->soc->bias_set_combo(hw, desc, 1, arg);
213 case PIN_CONFIG_BIAS_PULL_DOWN:
214 if (hw->soc->bias_set_combo)
215 err = hw->soc->bias_set_combo(hw, desc, 0, arg);
219 case PIN_CONFIG_OUTPUT_ENABLE:
220 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_SMT,
222 /* Keep set direction to consider the case that a GPIO pin
223 * does not have SMT control
225 if (err != -ENOTSUPP)
228 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DIR,
231 case PIN_CONFIG_INPUT_ENABLE:
232 /* regard all non-zero value as enable */
233 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_IES, !!arg);
237 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DIR,
240 case PIN_CONFIG_SLEW_RATE:
241 /* regard all non-zero value as enable */
242 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_SR, !!arg);
244 case PIN_CONFIG_OUTPUT:
245 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DO,
250 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DIR,
253 case PIN_CONFIG_INPUT_SCHMITT:
254 case PIN_CONFIG_INPUT_SCHMITT_ENABLE:
255 /* arg = 1: Input mode & SMT enable ;
256 * arg = 0: Output mode & SMT disable
258 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DIR, !arg);
262 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_SMT, !!arg);
264 case PIN_CONFIG_DRIVE_STRENGTH:
265 if (hw->soc->drive_set)
266 err = hw->soc->drive_set(hw, desc, arg);
270 case MTK_PIN_CONFIG_TDSEL:
271 case MTK_PIN_CONFIG_RDSEL:
272 reg = (param == MTK_PIN_CONFIG_TDSEL) ?
273 PINCTRL_PIN_REG_TDSEL : PINCTRL_PIN_REG_RDSEL;
274 err = mtk_hw_set_value(hw, desc, reg, arg);
276 case MTK_PIN_CONFIG_PU_ADV:
277 case MTK_PIN_CONFIG_PD_ADV:
278 if (hw->soc->adv_pull_set) {
281 pullup = param == MTK_PIN_CONFIG_PU_ADV;
282 err = hw->soc->adv_pull_set(hw, desc, pullup,
287 case MTK_PIN_CONFIG_DRV_ADV:
288 if (hw->soc->adv_drive_set)
289 err = hw->soc->adv_drive_set(hw, desc, arg);
301 static struct mtk_pinctrl_group *
302 mtk_pctrl_find_group_by_pin(struct mtk_pinctrl *hw, u32 pin)
306 for (i = 0; i < hw->soc->ngrps; i++) {
307 struct mtk_pinctrl_group *grp = hw->groups + i;
316 static const struct mtk_func_desc *
317 mtk_pctrl_find_function_by_pin(struct mtk_pinctrl *hw, u32 pin_num, u32 fnum)
319 const struct mtk_pin_desc *pin = hw->soc->pins + pin_num;
320 const struct mtk_func_desc *func = pin->funcs;
322 while (func && func->name) {
323 if (func->muxval == fnum)
331 static bool mtk_pctrl_is_function_valid(struct mtk_pinctrl *hw, u32 pin_num,
336 for (i = 0; i < hw->soc->npins; i++) {
337 const struct mtk_pin_desc *pin = hw->soc->pins + i;
339 if (pin->number == pin_num) {
340 const struct mtk_func_desc *func = pin->funcs;
342 while (func && func->name) {
343 if (func->muxval == fnum)
355 static int mtk_pctrl_dt_node_to_map_func(struct mtk_pinctrl *pctl,
357 struct mtk_pinctrl_group *grp,
358 struct pinctrl_map **map,
359 unsigned *reserved_maps,
364 if (*num_maps == *reserved_maps)
367 (*map)[*num_maps].type = PIN_MAP_TYPE_MUX_GROUP;
368 (*map)[*num_maps].data.mux.group = grp->name;
370 ret = mtk_pctrl_is_function_valid(pctl, pin, fnum);
372 dev_err(pctl->dev, "invalid function %d on pin %d .\n",
377 (*map)[*num_maps].data.mux.function = mtk_gpio_functions[fnum];
383 static int mtk_pctrl_dt_subnode_to_map(struct pinctrl_dev *pctldev,
384 struct device_node *node,
385 struct pinctrl_map **map,
386 unsigned *reserved_maps,
389 struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev);
390 int num_pins, num_funcs, maps_per_pin, i, err;
391 struct mtk_pinctrl_group *grp;
392 unsigned int num_configs;
393 bool has_config = false;
394 unsigned long *configs;
395 u32 pinfunc, pin, func;
396 struct property *pins;
397 unsigned reserve = 0;
399 pins = of_find_property(node, "pinmux", NULL);
401 dev_err(hw->dev, "missing pins property in node %pOFn .\n",
406 err = pinconf_generic_parse_dt_config(node, pctldev, &configs,
414 num_pins = pins->length / sizeof(u32);
415 num_funcs = num_pins;
419 if (has_config && num_pins >= 1)
422 if (!num_pins || !maps_per_pin) {
427 reserve = num_pins * maps_per_pin;
429 err = pinctrl_utils_reserve_map(pctldev, map, reserved_maps, num_maps,
434 for (i = 0; i < num_pins; i++) {
435 err = of_property_read_u32_index(node, "pinmux", i, &pinfunc);
439 pin = MTK_GET_PIN_NO(pinfunc);
440 func = MTK_GET_PIN_FUNC(pinfunc);
442 if (pin >= hw->soc->npins ||
443 func >= ARRAY_SIZE(mtk_gpio_functions)) {
444 dev_err(hw->dev, "invalid pins value.\n");
449 grp = mtk_pctrl_find_group_by_pin(hw, pin);
451 dev_err(hw->dev, "unable to match pin %d to group\n",
457 err = mtk_pctrl_dt_node_to_map_func(hw, pin, func, grp, map,
458 reserved_maps, num_maps);
463 err = pinctrl_utils_add_map_configs(pctldev, map,
469 PIN_MAP_TYPE_CONFIGS_GROUP);
482 static int mtk_pctrl_dt_node_to_map(struct pinctrl_dev *pctldev,
483 struct device_node *np_config,
484 struct pinctrl_map **map,
487 struct device_node *np;
488 unsigned reserved_maps;
495 for_each_child_of_node(np_config, np) {
496 ret = mtk_pctrl_dt_subnode_to_map(pctldev, np, map,
500 pinctrl_utils_free_map(pctldev, *map, *num_maps);
509 static int mtk_pctrl_get_groups_count(struct pinctrl_dev *pctldev)
511 struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev);
513 return hw->soc->ngrps;
516 static const char *mtk_pctrl_get_group_name(struct pinctrl_dev *pctldev,
519 struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev);
521 return hw->groups[group].name;
524 static int mtk_pctrl_get_group_pins(struct pinctrl_dev *pctldev,
525 unsigned group, const unsigned **pins,
528 struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev);
530 *pins = (unsigned *)&hw->groups[group].pin;
536 static int mtk_hw_get_value_wrap(struct mtk_pinctrl *hw, unsigned int gpio, int field)
538 const struct mtk_pin_desc *desc;
541 if (gpio >= hw->soc->npins)
544 desc = (const struct mtk_pin_desc *)&hw->soc->pins[gpio];
546 err = mtk_hw_get_value(hw, desc, field, &value);
553 #define mtk_pctrl_get_pinmux(hw, gpio) \
554 mtk_hw_get_value_wrap(hw, gpio, PINCTRL_PIN_REG_MODE)
556 #define mtk_pctrl_get_direction(hw, gpio) \
557 mtk_hw_get_value_wrap(hw, gpio, PINCTRL_PIN_REG_DIR)
559 #define mtk_pctrl_get_out(hw, gpio) \
560 mtk_hw_get_value_wrap(hw, gpio, PINCTRL_PIN_REG_DO)
562 #define mtk_pctrl_get_in(hw, gpio) \
563 mtk_hw_get_value_wrap(hw, gpio, PINCTRL_PIN_REG_DI)
565 #define mtk_pctrl_get_smt(hw, gpio) \
566 mtk_hw_get_value_wrap(hw, gpio, PINCTRL_PIN_REG_SMT)
568 #define mtk_pctrl_get_ies(hw, gpio) \
569 mtk_hw_get_value_wrap(hw, gpio, PINCTRL_PIN_REG_IES)
571 #define mtk_pctrl_get_driving(hw, gpio) \
572 mtk_hw_get_value_wrap(hw, gpio, PINCTRL_PIN_REG_DRV)
574 ssize_t mtk_pctrl_show_one_pin(struct mtk_pinctrl *hw,
575 unsigned int gpio, char *buf, unsigned int bufLen)
577 int pinmux, pullup, pullen, len = 0, r1 = -1, r0 = -1;
578 const struct mtk_pin_desc *desc;
580 if (gpio >= hw->soc->npins)
583 if (mtk_is_virt_gpio(hw, gpio))
586 desc = (const struct mtk_pin_desc *)&hw->soc->pins[gpio];
587 pinmux = mtk_pctrl_get_pinmux(hw, gpio);
588 if (pinmux >= hw->soc->nfuncs)
589 pinmux -= hw->soc->nfuncs;
591 mtk_pinconf_bias_get_combo(hw, desc, &pullup, &pullen);
592 if (pullen == MTK_PUPD_SET_R1R0_00) {
596 } else if (pullen == MTK_PUPD_SET_R1R0_01) {
600 } else if (pullen == MTK_PUPD_SET_R1R0_10) {
604 } else if (pullen == MTK_PUPD_SET_R1R0_11) {
608 } else if (pullen != MTK_DISABLE && pullen != MTK_ENABLE) {
611 len += scnprintf(buf + len, bufLen - len,
612 "%03d: %1d%1d%1d%1d%02d%1d%1d%1d%1d",
615 mtk_pctrl_get_direction(hw, gpio),
616 mtk_pctrl_get_out(hw, gpio),
617 mtk_pctrl_get_in(hw, gpio),
618 mtk_pctrl_get_driving(hw, gpio),
619 mtk_pctrl_get_smt(hw, gpio),
620 mtk_pctrl_get_ies(hw, gpio),
625 len += scnprintf(buf + len, bufLen - len, " (%1d %1d)\n",
628 len += scnprintf(buf + len, bufLen - len, "\n");
633 EXPORT_SYMBOL_GPL(mtk_pctrl_show_one_pin);
635 #define PIN_DBG_BUF_SZ 96
636 static void mtk_pctrl_dbg_show(struct pinctrl_dev *pctldev, struct seq_file *s,
639 struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev);
640 char buf[PIN_DBG_BUF_SZ];
642 (void)mtk_pctrl_show_one_pin(hw, gpio, buf, PIN_DBG_BUF_SZ);
644 seq_printf(s, "%s", buf);
647 static const struct pinctrl_ops mtk_pctlops = {
648 .dt_node_to_map = mtk_pctrl_dt_node_to_map,
649 .dt_free_map = pinctrl_utils_free_map,
650 .get_groups_count = mtk_pctrl_get_groups_count,
651 .get_group_name = mtk_pctrl_get_group_name,
652 .get_group_pins = mtk_pctrl_get_group_pins,
653 .pin_dbg_show = mtk_pctrl_dbg_show,
656 static int mtk_pmx_get_funcs_cnt(struct pinctrl_dev *pctldev)
658 return ARRAY_SIZE(mtk_gpio_functions);
661 static const char *mtk_pmx_get_func_name(struct pinctrl_dev *pctldev,
664 return mtk_gpio_functions[selector];
667 static int mtk_pmx_get_func_groups(struct pinctrl_dev *pctldev,
669 const char * const **groups,
670 unsigned * const num_groups)
672 struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev);
674 *groups = hw->grp_names;
675 *num_groups = hw->soc->ngrps;
680 static int mtk_pmx_set_mux(struct pinctrl_dev *pctldev,
684 struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev);
685 struct mtk_pinctrl_group *grp = hw->groups + group;
686 const struct mtk_func_desc *desc_func;
687 const struct mtk_pin_desc *desc;
690 ret = mtk_pctrl_is_function_valid(hw, grp->pin, function);
692 dev_err(hw->dev, "invalid function %d on group %d .\n",
697 desc_func = mtk_pctrl_find_function_by_pin(hw, grp->pin, function);
701 desc = (const struct mtk_pin_desc *)&hw->soc->pins[grp->pin];
702 mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_MODE, desc_func->muxval);
707 static const struct pinmux_ops mtk_pmxops = {
708 .get_functions_count = mtk_pmx_get_funcs_cnt,
709 .get_function_name = mtk_pmx_get_func_name,
710 .get_function_groups = mtk_pmx_get_func_groups,
711 .set_mux = mtk_pmx_set_mux,
712 .gpio_set_direction = mtk_pinmux_gpio_set_direction,
713 .gpio_request_enable = mtk_pinmux_gpio_request_enable,
716 static int mtk_pconf_group_get(struct pinctrl_dev *pctldev, unsigned group,
717 unsigned long *config)
719 struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev);
720 struct mtk_pinctrl_group *grp = &hw->groups[group];
722 /* One pin per group only */
723 return mtk_pinconf_get(pctldev, grp->pin, config);
726 static int mtk_pconf_group_set(struct pinctrl_dev *pctldev, unsigned group,
727 unsigned long *configs, unsigned num_configs)
729 struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev);
730 struct mtk_pinctrl_group *grp = &hw->groups[group];
733 for (i = 0; i < num_configs; i++) {
734 ret = mtk_pinconf_set(pctldev, grp->pin,
735 pinconf_to_config_param(configs[i]),
736 pinconf_to_config_argument(configs[i]));
744 static const struct pinconf_ops mtk_confops = {
745 .pin_config_get = mtk_pinconf_get,
746 .pin_config_group_get = mtk_pconf_group_get,
747 .pin_config_group_set = mtk_pconf_group_set,
751 static struct pinctrl_desc mtk_desc = {
752 .name = PINCTRL_PINCTRL_DEV,
753 .pctlops = &mtk_pctlops,
754 .pmxops = &mtk_pmxops,
755 .confops = &mtk_confops,
756 .owner = THIS_MODULE,
759 static int mtk_gpio_get_direction(struct gpio_chip *chip, unsigned int gpio)
761 struct mtk_pinctrl *hw = gpiochip_get_data(chip);
762 const struct mtk_pin_desc *desc;
765 if (gpio >= hw->soc->npins)
769 * "Virtual" GPIOs are always and only used for interrupts
770 * Since they are only used for interrupts, they are always inputs
772 if (mtk_is_virt_gpio(hw, gpio))
775 desc = (const struct mtk_pin_desc *)&hw->soc->pins[gpio];
777 err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_DIR, &value);
782 return GPIO_LINE_DIRECTION_OUT;
784 return GPIO_LINE_DIRECTION_IN;
787 static int mtk_gpio_get(struct gpio_chip *chip, unsigned int gpio)
789 struct mtk_pinctrl *hw = gpiochip_get_data(chip);
790 const struct mtk_pin_desc *desc;
793 if (gpio >= hw->soc->npins)
796 desc = (const struct mtk_pin_desc *)&hw->soc->pins[gpio];
798 err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_DI, &value);
805 static void mtk_gpio_set(struct gpio_chip *chip, unsigned int gpio, int value)
807 struct mtk_pinctrl *hw = gpiochip_get_data(chip);
808 const struct mtk_pin_desc *desc;
810 if (gpio >= hw->soc->npins)
813 desc = (const struct mtk_pin_desc *)&hw->soc->pins[gpio];
815 mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DO, !!value);
818 static int mtk_gpio_direction_input(struct gpio_chip *chip, unsigned int gpio)
820 struct mtk_pinctrl *hw = gpiochip_get_data(chip);
822 if (gpio >= hw->soc->npins)
825 return pinctrl_gpio_direction_input(chip->base + gpio);
828 static int mtk_gpio_direction_output(struct gpio_chip *chip, unsigned int gpio,
831 struct mtk_pinctrl *hw = gpiochip_get_data(chip);
833 if (gpio >= hw->soc->npins)
836 mtk_gpio_set(chip, gpio, value);
838 return pinctrl_gpio_direction_output(chip->base + gpio);
841 static int mtk_gpio_to_irq(struct gpio_chip *chip, unsigned int offset)
843 struct mtk_pinctrl *hw = gpiochip_get_data(chip);
844 const struct mtk_pin_desc *desc;
849 desc = (const struct mtk_pin_desc *)&hw->soc->pins[offset];
851 if (desc->eint.eint_n == EINT_NA)
854 return mtk_eint_find_irq(hw->eint, desc->eint.eint_n);
857 static int mtk_gpio_set_config(struct gpio_chip *chip, unsigned int offset,
858 unsigned long config)
860 struct mtk_pinctrl *hw = gpiochip_get_data(chip);
861 const struct mtk_pin_desc *desc;
864 desc = (const struct mtk_pin_desc *)&hw->soc->pins[offset];
867 pinconf_to_config_param(config) != PIN_CONFIG_INPUT_DEBOUNCE ||
868 desc->eint.eint_n == EINT_NA)
871 debounce = pinconf_to_config_argument(config);
873 return mtk_eint_set_debounce(hw->eint, desc->eint.eint_n, debounce);
876 static int mtk_build_gpiochip(struct mtk_pinctrl *hw, struct device_node *np)
878 struct gpio_chip *chip = &hw->chip;
881 chip->label = PINCTRL_PINCTRL_DEV;
882 chip->parent = hw->dev;
883 chip->request = gpiochip_generic_request;
884 chip->free = gpiochip_generic_free;
885 chip->get_direction = mtk_gpio_get_direction;
886 chip->direction_input = mtk_gpio_direction_input;
887 chip->direction_output = mtk_gpio_direction_output;
888 chip->get = mtk_gpio_get;
889 chip->set = mtk_gpio_set;
890 chip->to_irq = mtk_gpio_to_irq;
891 chip->set_config = mtk_gpio_set_config;
893 chip->ngpio = hw->soc->npins;
895 chip->of_gpio_n_cells = 2;
897 ret = gpiochip_add_data(chip, hw);
904 static int mtk_pctrl_build_state(struct platform_device *pdev)
906 struct mtk_pinctrl *hw = platform_get_drvdata(pdev);
909 /* Allocate groups */
910 hw->groups = devm_kmalloc_array(&pdev->dev, hw->soc->ngrps,
911 sizeof(*hw->groups), GFP_KERNEL);
915 /* We assume that one pin is one group, use pin name as group name. */
916 hw->grp_names = devm_kmalloc_array(&pdev->dev, hw->soc->ngrps,
917 sizeof(*hw->grp_names), GFP_KERNEL);
921 for (i = 0; i < hw->soc->npins; i++) {
922 const struct mtk_pin_desc *pin = hw->soc->pins + i;
923 struct mtk_pinctrl_group *group = hw->groups + i;
925 group->name = pin->name;
926 group->pin = pin->number;
928 hw->grp_names[i] = pin->name;
934 int mtk_paris_pinctrl_probe(struct platform_device *pdev,
935 const struct mtk_pin_soc *soc)
937 struct pinctrl_pin_desc *pins;
938 struct mtk_pinctrl *hw;
941 hw = devm_kzalloc(&pdev->dev, sizeof(*hw), GFP_KERNEL);
945 platform_set_drvdata(pdev, hw);
947 hw->dev = &pdev->dev;
949 if (!hw->soc->nbase_names) {
951 "SoC should be assigned at least one register base\n");
955 hw->base = devm_kmalloc_array(&pdev->dev, hw->soc->nbase_names,
956 sizeof(*hw->base), GFP_KERNEL);
960 for (i = 0; i < hw->soc->nbase_names; i++) {
961 hw->base[i] = devm_platform_ioremap_resource_byname(pdev,
962 hw->soc->base_names[i]);
963 if (IS_ERR(hw->base[i]))
964 return PTR_ERR(hw->base[i]);
967 hw->nbase = hw->soc->nbase_names;
969 spin_lock_init(&hw->lock);
971 err = mtk_pctrl_build_state(pdev);
973 dev_err(&pdev->dev, "build state failed: %d\n", err);
977 /* Copy from internal struct mtk_pin_desc to register to the core */
978 pins = devm_kmalloc_array(&pdev->dev, hw->soc->npins, sizeof(*pins),
983 for (i = 0; i < hw->soc->npins; i++) {
984 pins[i].number = hw->soc->pins[i].number;
985 pins[i].name = hw->soc->pins[i].name;
988 /* Setup pins descriptions per SoC types */
989 mtk_desc.pins = (const struct pinctrl_pin_desc *)pins;
990 mtk_desc.npins = hw->soc->npins;
991 mtk_desc.num_custom_params = ARRAY_SIZE(mtk_custom_bindings);
992 mtk_desc.custom_params = mtk_custom_bindings;
993 #ifdef CONFIG_DEBUG_FS
994 mtk_desc.custom_conf_items = mtk_conf_items;
997 err = devm_pinctrl_register_and_init(&pdev->dev, &mtk_desc, hw,
1002 err = pinctrl_enable(hw->pctrl);
1006 err = mtk_build_eint(hw, pdev);
1008 dev_warn(&pdev->dev,
1009 "Failed to add EINT, but pinctrl still can work\n");
1011 /* Build gpiochip should be after pinctrl_enable is done */
1012 err = mtk_build_gpiochip(hw, pdev->dev.of_node);
1014 dev_err(&pdev->dev, "Failed to add gpio_chip\n");
1018 platform_set_drvdata(pdev, hw);
1022 EXPORT_SYMBOL_GPL(mtk_paris_pinctrl_probe);
1024 static int mtk_paris_pinctrl_suspend(struct device *device)
1026 struct mtk_pinctrl *pctl = dev_get_drvdata(device);
1028 return mtk_eint_do_suspend(pctl->eint);
1031 static int mtk_paris_pinctrl_resume(struct device *device)
1033 struct mtk_pinctrl *pctl = dev_get_drvdata(device);
1035 return mtk_eint_do_resume(pctl->eint);
1038 const struct dev_pm_ops mtk_paris_pinctrl_pm_ops = {
1039 .suspend_noirq = mtk_paris_pinctrl_suspend,
1040 .resume_noirq = mtk_paris_pinctrl_resume,
1043 MODULE_LICENSE("GPL v2");
1044 MODULE_DESCRIPTION("MediaTek Pinctrl Common Driver V2 Paris");