2 * Copyright (C) 2015 Broadcom Corporation
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License as
6 * published by the Free Software Foundation version 2.
8 * This program is distributed "as is" WITHOUT ANY WARRANTY of any
9 * kind, whether express or implied; without even the implied warranty
10 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
14 #include <linux/delay.h>
16 #include <linux/module.h>
18 #include <linux/phy/phy.h>
19 #include <linux/platform_device.h>
21 #define PCIE_CFG_OFFSET 0x00
22 #define PCIE1_PHY_IDDQ_SHIFT 10
23 #define PCIE0_PHY_IDDQ_SHIFT 2
25 enum cygnus_pcie_phy_id {
31 struct cygnus_pcie_phy_core;
34 * struct cygnus_pcie_phy - Cygnus PCIe PHY device
35 * @core: pointer to the Cygnus PCIe PHY core control
36 * @id: internal ID to identify the Cygnus PCIe PHY
37 * @phy: pointer to the kernel PHY device
39 struct cygnus_pcie_phy {
40 struct cygnus_pcie_phy_core *core;
41 enum cygnus_pcie_phy_id id;
46 * struct cygnus_pcie_phy_core - Cygnus PCIe PHY core control
47 * @dev: pointer to device
48 * @base: base register
49 * @lock: mutex to protect access to individual PHYs
50 * @phys: pointer to Cygnus PHY device
52 struct cygnus_pcie_phy_core {
56 struct cygnus_pcie_phy phys[MAX_NUM_PHYS];
59 static int cygnus_pcie_power_config(struct cygnus_pcie_phy *phy, bool enable)
61 struct cygnus_pcie_phy_core *core = phy->core;
65 mutex_lock(&core->lock);
68 case CYGNUS_PHY_PCIE0:
69 shift = PCIE0_PHY_IDDQ_SHIFT;
72 case CYGNUS_PHY_PCIE1:
73 shift = PCIE1_PHY_IDDQ_SHIFT;
77 mutex_unlock(&core->lock);
78 dev_err(core->dev, "PCIe PHY %d invalid\n", phy->id);
83 val = readl(core->base + PCIE_CFG_OFFSET);
85 writel(val, core->base + PCIE_CFG_OFFSET);
87 * Wait 50 ms for the PCIe Serdes to stabilize after the analog
88 * front end is brought up
92 val = readl(core->base + PCIE_CFG_OFFSET);
94 writel(val, core->base + PCIE_CFG_OFFSET);
97 mutex_unlock(&core->lock);
98 dev_dbg(core->dev, "PCIe PHY %d %s\n", phy->id,
99 enable ? "enabled" : "disabled");
103 static int cygnus_pcie_phy_power_on(struct phy *p)
105 struct cygnus_pcie_phy *phy = phy_get_drvdata(p);
107 return cygnus_pcie_power_config(phy, true);
110 static int cygnus_pcie_phy_power_off(struct phy *p)
112 struct cygnus_pcie_phy *phy = phy_get_drvdata(p);
114 return cygnus_pcie_power_config(phy, false);
117 static const struct phy_ops cygnus_pcie_phy_ops = {
118 .power_on = cygnus_pcie_phy_power_on,
119 .power_off = cygnus_pcie_phy_power_off,
120 .owner = THIS_MODULE,
123 static int cygnus_pcie_phy_probe(struct platform_device *pdev)
125 struct device *dev = &pdev->dev;
126 struct device_node *node = dev->of_node, *child;
127 struct cygnus_pcie_phy_core *core;
128 struct phy_provider *provider;
132 if (of_get_child_count(node) == 0) {
133 dev_err(dev, "PHY no child node\n");
137 core = devm_kzalloc(dev, sizeof(*core), GFP_KERNEL);
143 core->base = devm_platform_ioremap_resource(pdev, 0);
144 if (IS_ERR(core->base))
145 return PTR_ERR(core->base);
147 mutex_init(&core->lock);
149 for_each_available_child_of_node(node, child) {
151 struct cygnus_pcie_phy *p;
153 if (of_property_read_u32(child, "reg", &id)) {
154 dev_err(dev, "missing reg property for %pOFn\n",
160 if (id >= MAX_NUM_PHYS) {
161 dev_err(dev, "invalid PHY id: %u\n", id);
166 if (core->phys[id].phy) {
167 dev_err(dev, "duplicated PHY id: %u\n", id);
173 p->phy = devm_phy_create(dev, child, &cygnus_pcie_phy_ops);
174 if (IS_ERR(p->phy)) {
175 dev_err(dev, "failed to create PHY\n");
176 ret = PTR_ERR(p->phy);
182 phy_set_drvdata(p->phy, p);
186 dev_set_drvdata(dev, core);
188 provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate);
189 if (IS_ERR(provider)) {
190 dev_err(dev, "failed to register PHY provider\n");
191 return PTR_ERR(provider);
194 dev_dbg(dev, "registered %u PCIe PHY(s)\n", cnt);
202 static const struct of_device_id cygnus_pcie_phy_match_table[] = {
203 { .compatible = "brcm,cygnus-pcie-phy" },
206 MODULE_DEVICE_TABLE(of, cygnus_pcie_phy_match_table);
208 static struct platform_driver cygnus_pcie_phy_driver = {
210 .name = "cygnus-pcie-phy",
211 .of_match_table = cygnus_pcie_phy_match_table,
213 .probe = cygnus_pcie_phy_probe,
215 module_platform_driver(cygnus_pcie_phy_driver);
217 MODULE_AUTHOR("Ray Jui <rjui@broadcom.com>");
218 MODULE_DESCRIPTION("Broadcom Cygnus PCIe PHY driver");
219 MODULE_LICENSE("GPL v2");