2 * Allwinner sun4i USB phy driver
4 * Copyright (C) 2014-2015 Hans de Goede <hdegoede@redhat.com>
7 * Allwinner Technology Co., Ltd. <www.allwinnertech.com>
9 * Modelled after: Samsung S5P/EXYNOS SoC series MIPI CSIS/DSIM DPHY driver
10 * Copyright (C) 2013 Samsung Electronics Co., Ltd.
11 * Author: Sylwester Nawrocki <s.nawrocki@samsung.com>
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License as published by
15 * the Free Software Foundation; either version 2 of the License, or
16 * (at your option) any later version.
18 * This program is distributed in the hope that it will be useful,
19 * but WITHOUT ANY WARRANTY; without even the implied warranty of
20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 * GNU General Public License for more details.
24 #include <linux/clk.h>
25 #include <linux/delay.h>
26 #include <linux/err.h>
27 #include <linux/extcon.h>
29 #include <linux/interrupt.h>
30 #include <linux/kernel.h>
31 #include <linux/module.h>
32 #include <linux/mutex.h>
34 #include <linux/of_address.h>
35 #include <linux/of_device.h>
36 #include <linux/of_gpio.h>
37 #include <linux/phy/phy.h>
38 #include <linux/phy/phy-sun4i-usb.h>
39 #include <linux/platform_device.h>
40 #include <linux/power_supply.h>
41 #include <linux/regulator/consumer.h>
42 #include <linux/reset.h>
43 #include <linux/spinlock.h>
44 #include <linux/usb/of.h>
45 #include <linux/workqueue.h>
48 #define REG_PHYCTL_A10 0x04
49 #define REG_PHYBIST 0x08
50 #define REG_PHYTUNE 0x0c
51 #define REG_PHYCTL_A33 0x10
52 #define REG_PHY_OTGCTL 0x20
54 #define REG_PMU_UNK1 0x10
56 #define PHYCTL_DATA BIT(7)
58 #define OTGCTL_ROUTE_MUSB BIT(0)
60 #define SUNXI_AHB_ICHR8_EN BIT(10)
61 #define SUNXI_AHB_INCR4_BURST_EN BIT(9)
62 #define SUNXI_AHB_INCRX_ALIGN_EN BIT(8)
63 #define SUNXI_ULPI_BYPASS_EN BIT(0)
65 /* ISCR, Interface Status and Control bits */
66 #define ISCR_ID_PULLUP_EN (1 << 17)
67 #define ISCR_DPDM_PULLUP_EN (1 << 16)
68 /* sunxi has the phy id/vbus pins not connected, so we use the force bits */
69 #define ISCR_FORCE_ID_MASK (3 << 14)
70 #define ISCR_FORCE_ID_LOW (2 << 14)
71 #define ISCR_FORCE_ID_HIGH (3 << 14)
72 #define ISCR_FORCE_VBUS_MASK (3 << 12)
73 #define ISCR_FORCE_VBUS_LOW (2 << 12)
74 #define ISCR_FORCE_VBUS_HIGH (3 << 12)
76 /* Common Control Bits for Both PHYs */
77 #define PHY_PLL_BW 0x03
78 #define PHY_RES45_CAL_EN 0x0c
80 /* Private Control Bits for Each PHY */
81 #define PHY_TX_AMPLITUDE_TUNE 0x20
82 #define PHY_TX_SLEWRATE_TUNE 0x22
83 #define PHY_VBUSVALID_TH_SEL 0x25
84 #define PHY_PULLUP_RES_SEL 0x27
85 #define PHY_OTG_FUNC_EN 0x28
86 #define PHY_VBUS_DET_EN 0x29
87 #define PHY_DISCON_TH_SEL 0x2a
88 #define PHY_SQUELCH_DETECT 0x3c
90 /* A83T specific control bits for PHY0 */
91 #define PHY_CTL_VBUSVLDEXT BIT(5)
92 #define PHY_CTL_SIDDQ BIT(3)
94 /* A83T specific control bits for PHY2 HSIC */
95 #define SUNXI_EHCI_HS_FORCE BIT(20)
96 #define SUNXI_HSIC_CONNECT_DET BIT(17)
97 #define SUNXI_HSIC_CONNECT_INT BIT(16)
98 #define SUNXI_HSIC BIT(1)
103 * Note do not raise the debounce time, we must report Vusb high within 100ms
104 * otherwise we get Vbus errors
106 #define DEBOUNCE_TIME msecs_to_jiffies(50)
107 #define POLL_TIME msecs_to_jiffies(250)
109 enum sun4i_usb_phy_type {
119 struct sun4i_usb_phy_cfg {
122 enum sun4i_usb_phy_type type;
125 bool dedicated_clocks;
126 bool enable_pmu_unk1;
127 bool phy0_dual_route;
131 struct sun4i_usb_phy_data {
133 const struct sun4i_usb_phy_cfg *cfg;
134 enum usb_dr_mode dr_mode;
135 spinlock_t reg_lock; /* guard access to phyctl reg */
136 struct sun4i_usb_phy {
139 struct regulator *vbus;
140 struct reset_control *reset;
146 /* phy0 / otg related variables */
147 struct extcon_dev *extcon;
149 struct gpio_desc *id_det_gpio;
150 struct gpio_desc *vbus_det_gpio;
151 struct power_supply *vbus_power_supply;
152 struct notifier_block vbus_power_nb;
153 bool vbus_power_nb_registered;
154 bool force_session_end;
159 struct delayed_work detect;
162 #define to_sun4i_usb_phy_data(phy) \
163 container_of((phy), struct sun4i_usb_phy_data, phys[(phy)->index])
165 static void sun4i_usb_phy0_update_iscr(struct phy *_phy, u32 clr, u32 set)
167 struct sun4i_usb_phy *phy = phy_get_drvdata(_phy);
168 struct sun4i_usb_phy_data *data = to_sun4i_usb_phy_data(phy);
171 iscr = readl(data->base + REG_ISCR);
174 writel(iscr, data->base + REG_ISCR);
177 static void sun4i_usb_phy0_set_id_detect(struct phy *phy, u32 val)
180 val = ISCR_FORCE_ID_HIGH;
182 val = ISCR_FORCE_ID_LOW;
184 sun4i_usb_phy0_update_iscr(phy, ISCR_FORCE_ID_MASK, val);
187 static void sun4i_usb_phy0_set_vbus_detect(struct phy *phy, u32 val)
190 val = ISCR_FORCE_VBUS_HIGH;
192 val = ISCR_FORCE_VBUS_LOW;
194 sun4i_usb_phy0_update_iscr(phy, ISCR_FORCE_VBUS_MASK, val);
197 static void sun4i_usb_phy_write(struct sun4i_usb_phy *phy, u32 addr, u32 data,
200 struct sun4i_usb_phy_data *phy_data = to_sun4i_usb_phy_data(phy);
201 u32 temp, usbc_bit = BIT(phy->index * 2);
202 void __iomem *phyctl = phy_data->base + phy_data->cfg->phyctl_offset;
206 spin_lock_irqsave(&phy_data->reg_lock, flags);
208 if (phy_data->cfg->phyctl_offset == REG_PHYCTL_A33) {
209 /* SoCs newer than A33 need us to set phyctl to 0 explicitly */
213 for (i = 0; i < len; i++) {
214 temp = readl(phyctl);
216 /* clear the address portion */
217 temp &= ~(0xff << 8);
219 /* set the address */
220 temp |= ((addr + i) << 8);
221 writel(temp, phyctl);
223 /* set the data bit and clear usbc bit*/
224 temp = readb(phyctl);
228 temp &= ~PHYCTL_DATA;
230 writeb(temp, phyctl);
233 temp = readb(phyctl);
235 writeb(temp, phyctl);
237 temp = readb(phyctl);
239 writeb(temp, phyctl);
244 spin_unlock_irqrestore(&phy_data->reg_lock, flags);
247 static void sun4i_usb_phy_passby(struct sun4i_usb_phy *phy, int enable)
249 struct sun4i_usb_phy_data *phy_data = to_sun4i_usb_phy_data(phy);
255 bits = SUNXI_AHB_ICHR8_EN | SUNXI_AHB_INCR4_BURST_EN |
256 SUNXI_AHB_INCRX_ALIGN_EN | SUNXI_ULPI_BYPASS_EN;
258 /* A83T USB2 is HSIC */
259 if (phy_data->cfg->type == sun8i_a83t_phy && phy->index == 2)
260 bits |= SUNXI_EHCI_HS_FORCE | SUNXI_HSIC_CONNECT_INT |
263 reg_value = readl(phy->pmu);
270 writel(reg_value, phy->pmu);
273 static int sun4i_usb_phy_init(struct phy *_phy)
275 struct sun4i_usb_phy *phy = phy_get_drvdata(_phy);
276 struct sun4i_usb_phy_data *data = to_sun4i_usb_phy_data(phy);
280 ret = clk_prepare_enable(phy->clk);
284 ret = clk_prepare_enable(phy->clk2);
286 clk_disable_unprepare(phy->clk);
290 ret = reset_control_deassert(phy->reset);
292 clk_disable_unprepare(phy->clk2);
293 clk_disable_unprepare(phy->clk);
297 if (data->cfg->type == sun8i_a83t_phy) {
298 if (phy->index == 0) {
299 val = readl(data->base + data->cfg->phyctl_offset);
300 val |= PHY_CTL_VBUSVLDEXT;
301 val &= ~PHY_CTL_SIDDQ;
302 writel(val, data->base + data->cfg->phyctl_offset);
305 if (phy->pmu && data->cfg->enable_pmu_unk1) {
306 val = readl(phy->pmu + REG_PMU_UNK1);
307 writel(val & ~2, phy->pmu + REG_PMU_UNK1);
310 /* Enable USB 45 Ohm resistor calibration */
312 sun4i_usb_phy_write(phy, PHY_RES45_CAL_EN, 0x01, 1);
314 /* Adjust PHY's magnitude and rate */
315 sun4i_usb_phy_write(phy, PHY_TX_AMPLITUDE_TUNE, 0x14, 5);
317 /* Disconnect threshold adjustment */
318 sun4i_usb_phy_write(phy, PHY_DISCON_TH_SEL,
319 data->cfg->disc_thresh, 2);
322 sun4i_usb_phy_passby(phy, 1);
324 if (phy->index == 0) {
325 data->phy0_init = true;
327 /* Enable pull-ups */
328 sun4i_usb_phy0_update_iscr(_phy, 0, ISCR_DPDM_PULLUP_EN);
329 sun4i_usb_phy0_update_iscr(_phy, 0, ISCR_ID_PULLUP_EN);
331 /* Force ISCR and cable state updates */
334 queue_delayed_work(system_wq, &data->detect, 0);
340 static int sun4i_usb_phy_exit(struct phy *_phy)
342 struct sun4i_usb_phy *phy = phy_get_drvdata(_phy);
343 struct sun4i_usb_phy_data *data = to_sun4i_usb_phy_data(phy);
345 if (phy->index == 0) {
346 if (data->cfg->type == sun8i_a83t_phy) {
347 void __iomem *phyctl = data->base +
348 data->cfg->phyctl_offset;
350 writel(readl(phyctl) | PHY_CTL_SIDDQ, phyctl);
353 /* Disable pull-ups */
354 sun4i_usb_phy0_update_iscr(_phy, ISCR_DPDM_PULLUP_EN, 0);
355 sun4i_usb_phy0_update_iscr(_phy, ISCR_ID_PULLUP_EN, 0);
356 data->phy0_init = false;
359 sun4i_usb_phy_passby(phy, 0);
360 reset_control_assert(phy->reset);
361 clk_disable_unprepare(phy->clk2);
362 clk_disable_unprepare(phy->clk);
367 static int sun4i_usb_phy0_get_id_det(struct sun4i_usb_phy_data *data)
369 switch (data->dr_mode) {
370 case USB_DR_MODE_OTG:
371 if (data->id_det_gpio)
372 return gpiod_get_value_cansleep(data->id_det_gpio);
374 return 1; /* Fallback to peripheral mode */
375 case USB_DR_MODE_HOST:
377 case USB_DR_MODE_PERIPHERAL:
383 static int sun4i_usb_phy0_get_vbus_det(struct sun4i_usb_phy_data *data)
385 if (data->vbus_det_gpio)
386 return gpiod_get_value_cansleep(data->vbus_det_gpio);
388 if (data->vbus_power_supply) {
389 union power_supply_propval val;
392 r = power_supply_get_property(data->vbus_power_supply,
393 POWER_SUPPLY_PROP_PRESENT, &val);
398 /* Fallback: report vbus as high */
402 static bool sun4i_usb_phy0_have_vbus_det(struct sun4i_usb_phy_data *data)
404 return data->vbus_det_gpio || data->vbus_power_supply;
407 static bool sun4i_usb_phy0_poll(struct sun4i_usb_phy_data *data)
409 if ((data->id_det_gpio && data->id_det_irq <= 0) ||
410 (data->vbus_det_gpio && data->vbus_det_irq <= 0))
414 * The A31/A23/A33 companion pmics (AXP221/AXP223) do not
415 * generate vbus change interrupts when the board is driving
416 * vbus using the N_VBUSEN pin on the pmic, so we must poll
417 * when using the pmic for vbus-det _and_ we're driving vbus.
419 if ((data->cfg->type == sun6i_a31_phy ||
420 data->cfg->type == sun8i_a33_phy) &&
421 data->vbus_power_supply && data->phys[0].regulator_on)
427 static int sun4i_usb_phy_power_on(struct phy *_phy)
429 struct sun4i_usb_phy *phy = phy_get_drvdata(_phy);
430 struct sun4i_usb_phy_data *data = to_sun4i_usb_phy_data(phy);
433 if (!phy->vbus || phy->regulator_on)
436 /* For phy0 only turn on Vbus if we don't have an ext. Vbus */
437 if (phy->index == 0 && sun4i_usb_phy0_have_vbus_det(data) &&
439 dev_warn(&_phy->dev, "External vbus detected, not enabling our own vbus\n");
443 ret = regulator_enable(phy->vbus);
447 phy->regulator_on = true;
449 /* We must report Vbus high within OTG_TIME_A_WAIT_VRISE msec. */
450 if (phy->index == 0 && sun4i_usb_phy0_poll(data))
451 mod_delayed_work(system_wq, &data->detect, DEBOUNCE_TIME);
456 static int sun4i_usb_phy_power_off(struct phy *_phy)
458 struct sun4i_usb_phy *phy = phy_get_drvdata(_phy);
459 struct sun4i_usb_phy_data *data = to_sun4i_usb_phy_data(phy);
461 if (!phy->vbus || !phy->regulator_on)
464 regulator_disable(phy->vbus);
465 phy->regulator_on = false;
468 * phy0 vbus typically slowly discharges, sometimes this causes the
469 * Vbus gpio to not trigger an edge irq on Vbus off, so force a rescan.
471 if (phy->index == 0 && !sun4i_usb_phy0_poll(data))
472 mod_delayed_work(system_wq, &data->detect, POLL_TIME);
477 static int sun4i_usb_phy_set_mode(struct phy *_phy, enum phy_mode mode)
479 struct sun4i_usb_phy *phy = phy_get_drvdata(_phy);
480 struct sun4i_usb_phy_data *data = to_sun4i_usb_phy_data(phy);
483 if (phy->index != 0) {
484 if (mode == PHY_MODE_USB_HOST)
490 case PHY_MODE_USB_HOST:
491 new_mode = USB_DR_MODE_HOST;
493 case PHY_MODE_USB_DEVICE:
494 new_mode = USB_DR_MODE_PERIPHERAL;
496 case PHY_MODE_USB_OTG:
497 new_mode = USB_DR_MODE_OTG;
503 if (new_mode != data->dr_mode) {
504 dev_info(&_phy->dev, "Changing dr_mode to %d\n", new_mode);
505 data->dr_mode = new_mode;
508 data->id_det = -1; /* Force reprocessing of id */
509 data->force_session_end = true;
510 queue_delayed_work(system_wq, &data->detect, 0);
515 void sun4i_usb_phy_set_squelch_detect(struct phy *_phy, bool enabled)
517 struct sun4i_usb_phy *phy = phy_get_drvdata(_phy);
519 sun4i_usb_phy_write(phy, PHY_SQUELCH_DETECT, enabled ? 0 : 2, 2);
521 EXPORT_SYMBOL_GPL(sun4i_usb_phy_set_squelch_detect);
523 static const struct phy_ops sun4i_usb_phy_ops = {
524 .init = sun4i_usb_phy_init,
525 .exit = sun4i_usb_phy_exit,
526 .power_on = sun4i_usb_phy_power_on,
527 .power_off = sun4i_usb_phy_power_off,
528 .set_mode = sun4i_usb_phy_set_mode,
529 .owner = THIS_MODULE,
532 static void sun4i_usb_phy0_reroute(struct sun4i_usb_phy_data *data, int id_det)
536 regval = readl(data->base + REG_PHY_OTGCTL);
538 /* Host mode. Route phy0 to EHCI/OHCI */
539 regval &= ~OTGCTL_ROUTE_MUSB;
541 /* Peripheral mode. Route phy0 to MUSB */
542 regval |= OTGCTL_ROUTE_MUSB;
544 writel(regval, data->base + REG_PHY_OTGCTL);
547 static void sun4i_usb_phy0_id_vbus_det_scan(struct work_struct *work)
549 struct sun4i_usb_phy_data *data =
550 container_of(work, struct sun4i_usb_phy_data, detect.work);
551 struct phy *phy0 = data->phys[0].phy;
552 struct sun4i_usb_phy *phy;
553 bool force_session_end, id_notify = false, vbus_notify = false;
554 int id_det, vbus_det;
559 phy = phy_get_drvdata(phy0);
560 id_det = sun4i_usb_phy0_get_id_det(data);
561 vbus_det = sun4i_usb_phy0_get_vbus_det(data);
563 mutex_lock(&phy0->mutex);
565 if (!data->phy0_init) {
566 mutex_unlock(&phy0->mutex);
570 force_session_end = data->force_session_end;
571 data->force_session_end = false;
573 if (id_det != data->id_det) {
574 /* id-change, force session end if we've no vbus detection */
575 if (data->dr_mode == USB_DR_MODE_OTG &&
576 !sun4i_usb_phy0_have_vbus_det(data))
577 force_session_end = true;
579 /* When entering host mode (id = 0) force end the session now */
580 if (force_session_end && id_det == 0) {
581 sun4i_usb_phy0_set_vbus_detect(phy0, 0);
583 sun4i_usb_phy0_set_vbus_detect(phy0, 1);
585 sun4i_usb_phy0_set_id_detect(phy0, id_det);
586 data->id_det = id_det;
590 if (vbus_det != data->vbus_det) {
591 sun4i_usb_phy0_set_vbus_detect(phy0, vbus_det);
592 data->vbus_det = vbus_det;
596 mutex_unlock(&phy0->mutex);
599 extcon_set_state_sync(data->extcon, EXTCON_USB_HOST,
601 /* When leaving host mode force end the session here */
602 if (force_session_end && id_det == 1) {
603 mutex_lock(&phy0->mutex);
604 sun4i_usb_phy0_set_vbus_detect(phy0, 0);
606 sun4i_usb_phy0_set_vbus_detect(phy0, 1);
607 mutex_unlock(&phy0->mutex);
610 /* Enable PHY0 passby for host mode only. */
611 sun4i_usb_phy_passby(phy, !id_det);
613 /* Re-route PHY0 if necessary */
614 if (data->cfg->phy0_dual_route)
615 sun4i_usb_phy0_reroute(data, id_det);
619 extcon_set_state_sync(data->extcon, EXTCON_USB, vbus_det);
621 if (sun4i_usb_phy0_poll(data))
622 queue_delayed_work(system_wq, &data->detect, POLL_TIME);
625 static irqreturn_t sun4i_usb_phy0_id_vbus_det_irq(int irq, void *dev_id)
627 struct sun4i_usb_phy_data *data = dev_id;
629 /* vbus or id changed, let the pins settle and then scan them */
630 mod_delayed_work(system_wq, &data->detect, DEBOUNCE_TIME);
635 static int sun4i_usb_phy0_vbus_notify(struct notifier_block *nb,
636 unsigned long val, void *v)
638 struct sun4i_usb_phy_data *data =
639 container_of(nb, struct sun4i_usb_phy_data, vbus_power_nb);
640 struct power_supply *psy = v;
642 /* Properties on the vbus_power_supply changed, scan vbus_det */
643 if (val == PSY_EVENT_PROP_CHANGED && psy == data->vbus_power_supply)
644 mod_delayed_work(system_wq, &data->detect, DEBOUNCE_TIME);
649 static struct phy *sun4i_usb_phy_xlate(struct device *dev,
650 struct of_phandle_args *args)
652 struct sun4i_usb_phy_data *data = dev_get_drvdata(dev);
654 if (args->args[0] >= data->cfg->num_phys)
655 return ERR_PTR(-ENODEV);
657 if (data->cfg->missing_phys & BIT(args->args[0]))
658 return ERR_PTR(-ENODEV);
660 return data->phys[args->args[0]].phy;
663 static int sun4i_usb_phy_remove(struct platform_device *pdev)
665 struct device *dev = &pdev->dev;
666 struct sun4i_usb_phy_data *data = dev_get_drvdata(dev);
668 if (data->vbus_power_nb_registered)
669 power_supply_unreg_notifier(&data->vbus_power_nb);
670 if (data->id_det_irq > 0)
671 devm_free_irq(dev, data->id_det_irq, data);
672 if (data->vbus_det_irq > 0)
673 devm_free_irq(dev, data->vbus_det_irq, data);
675 cancel_delayed_work_sync(&data->detect);
680 static const unsigned int sun4i_usb_phy0_cable[] = {
686 static int sun4i_usb_phy_probe(struct platform_device *pdev)
688 struct sun4i_usb_phy_data *data;
689 struct device *dev = &pdev->dev;
690 struct device_node *np = dev->of_node;
691 struct phy_provider *phy_provider;
692 struct resource *res;
695 data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL);
699 spin_lock_init(&data->reg_lock);
700 INIT_DELAYED_WORK(&data->detect, sun4i_usb_phy0_id_vbus_det_scan);
701 dev_set_drvdata(dev, data);
702 data->cfg = of_device_get_match_data(dev);
706 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "phy_ctrl");
707 data->base = devm_ioremap_resource(dev, res);
708 if (IS_ERR(data->base))
709 return PTR_ERR(data->base);
711 data->id_det_gpio = devm_gpiod_get_optional(dev, "usb0_id_det",
713 if (IS_ERR(data->id_det_gpio)) {
714 dev_err(dev, "Couldn't request ID GPIO\n");
715 return PTR_ERR(data->id_det_gpio);
718 data->vbus_det_gpio = devm_gpiod_get_optional(dev, "usb0_vbus_det",
720 if (IS_ERR(data->vbus_det_gpio)) {
721 dev_err(dev, "Couldn't request VBUS detect GPIO\n");
722 return PTR_ERR(data->vbus_det_gpio);
725 if (of_find_property(np, "usb0_vbus_power-supply", NULL)) {
726 data->vbus_power_supply = devm_power_supply_get_by_phandle(dev,
727 "usb0_vbus_power-supply");
728 if (IS_ERR(data->vbus_power_supply)) {
729 dev_err(dev, "Couldn't get the VBUS power supply\n");
730 return PTR_ERR(data->vbus_power_supply);
733 if (!data->vbus_power_supply)
734 return -EPROBE_DEFER;
737 data->dr_mode = of_usb_get_dr_mode_by_phy(np, 0);
739 data->extcon = devm_extcon_dev_allocate(dev, sun4i_usb_phy0_cable);
740 if (IS_ERR(data->extcon)) {
741 dev_err(dev, "Couldn't allocate our extcon device\n");
742 return PTR_ERR(data->extcon);
745 ret = devm_extcon_dev_register(dev, data->extcon);
747 dev_err(dev, "failed to register extcon: %d\n", ret);
751 for (i = 0; i < data->cfg->num_phys; i++) {
752 struct sun4i_usb_phy *phy = data->phys + i;
755 if (data->cfg->missing_phys & BIT(i))
758 snprintf(name, sizeof(name), "usb%d_vbus", i);
759 phy->vbus = devm_regulator_get_optional(dev, name);
760 if (IS_ERR(phy->vbus)) {
761 if (PTR_ERR(phy->vbus) == -EPROBE_DEFER) {
763 "Couldn't get regulator %s... Deferring probe\n",
765 return -EPROBE_DEFER;
771 if (data->cfg->dedicated_clocks)
772 snprintf(name, sizeof(name), "usb%d_phy", i);
774 strlcpy(name, "usb_phy", sizeof(name));
776 phy->clk = devm_clk_get(dev, name);
777 if (IS_ERR(phy->clk)) {
778 dev_err(dev, "failed to get clock %s\n", name);
779 return PTR_ERR(phy->clk);
782 /* The first PHY is always tied to OTG, and never HSIC */
783 if (data->cfg->hsic_index && i == data->cfg->hsic_index) {
784 /* HSIC needs secondary clock */
785 snprintf(name, sizeof(name), "usb%d_hsic_12M", i);
786 phy->clk2 = devm_clk_get(dev, name);
787 if (IS_ERR(phy->clk2)) {
788 dev_err(dev, "failed to get clock %s\n", name);
789 return PTR_ERR(phy->clk2);
793 snprintf(name, sizeof(name), "usb%d_reset", i);
794 phy->reset = devm_reset_control_get(dev, name);
795 if (IS_ERR(phy->reset)) {
796 dev_err(dev, "failed to get reset %s\n", name);
797 return PTR_ERR(phy->reset);
800 if (i || data->cfg->phy0_dual_route) { /* No pmu for musb */
801 snprintf(name, sizeof(name), "pmu%d", i);
802 res = platform_get_resource_byname(pdev,
803 IORESOURCE_MEM, name);
804 phy->pmu = devm_ioremap_resource(dev, res);
805 if (IS_ERR(phy->pmu))
806 return PTR_ERR(phy->pmu);
809 phy->phy = devm_phy_create(dev, NULL, &sun4i_usb_phy_ops);
810 if (IS_ERR(phy->phy)) {
811 dev_err(dev, "failed to create PHY %d\n", i);
812 return PTR_ERR(phy->phy);
816 phy_set_drvdata(phy->phy, &data->phys[i]);
819 data->id_det_irq = gpiod_to_irq(data->id_det_gpio);
820 if (data->id_det_irq > 0) {
821 ret = devm_request_irq(dev, data->id_det_irq,
822 sun4i_usb_phy0_id_vbus_det_irq,
823 IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
824 "usb0-id-det", data);
826 dev_err(dev, "Err requesting id-det-irq: %d\n", ret);
831 data->vbus_det_irq = gpiod_to_irq(data->vbus_det_gpio);
832 if (data->vbus_det_irq > 0) {
833 ret = devm_request_irq(dev, data->vbus_det_irq,
834 sun4i_usb_phy0_id_vbus_det_irq,
835 IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
836 "usb0-vbus-det", data);
838 dev_err(dev, "Err requesting vbus-det-irq: %d\n", ret);
839 data->vbus_det_irq = -1;
840 sun4i_usb_phy_remove(pdev); /* Stop detect work */
845 if (data->vbus_power_supply) {
846 data->vbus_power_nb.notifier_call = sun4i_usb_phy0_vbus_notify;
847 data->vbus_power_nb.priority = 0;
848 ret = power_supply_reg_notifier(&data->vbus_power_nb);
850 sun4i_usb_phy_remove(pdev); /* Stop detect work */
853 data->vbus_power_nb_registered = true;
856 phy_provider = devm_of_phy_provider_register(dev, sun4i_usb_phy_xlate);
857 if (IS_ERR(phy_provider)) {
858 sun4i_usb_phy_remove(pdev); /* Stop detect work */
859 return PTR_ERR(phy_provider);
862 dev_dbg(dev, "successfully loaded\n");
867 static const struct sun4i_usb_phy_cfg sun4i_a10_cfg = {
869 .type = sun4i_a10_phy,
871 .phyctl_offset = REG_PHYCTL_A10,
872 .dedicated_clocks = false,
873 .enable_pmu_unk1 = false,
876 static const struct sun4i_usb_phy_cfg sun5i_a13_cfg = {
878 .type = sun4i_a10_phy,
880 .phyctl_offset = REG_PHYCTL_A10,
881 .dedicated_clocks = false,
882 .enable_pmu_unk1 = false,
885 static const struct sun4i_usb_phy_cfg sun6i_a31_cfg = {
887 .type = sun6i_a31_phy,
889 .phyctl_offset = REG_PHYCTL_A10,
890 .dedicated_clocks = true,
891 .enable_pmu_unk1 = false,
894 static const struct sun4i_usb_phy_cfg sun7i_a20_cfg = {
896 .type = sun4i_a10_phy,
898 .phyctl_offset = REG_PHYCTL_A10,
899 .dedicated_clocks = false,
900 .enable_pmu_unk1 = false,
903 static const struct sun4i_usb_phy_cfg sun8i_a23_cfg = {
905 .type = sun6i_a31_phy,
907 .phyctl_offset = REG_PHYCTL_A10,
908 .dedicated_clocks = true,
909 .enable_pmu_unk1 = false,
912 static const struct sun4i_usb_phy_cfg sun8i_a33_cfg = {
914 .type = sun8i_a33_phy,
916 .phyctl_offset = REG_PHYCTL_A33,
917 .dedicated_clocks = true,
918 .enable_pmu_unk1 = false,
921 static const struct sun4i_usb_phy_cfg sun8i_a83t_cfg = {
924 .type = sun8i_a83t_phy,
925 .phyctl_offset = REG_PHYCTL_A33,
926 .dedicated_clocks = true,
929 static const struct sun4i_usb_phy_cfg sun8i_h3_cfg = {
931 .type = sun8i_h3_phy,
933 .phyctl_offset = REG_PHYCTL_A33,
934 .dedicated_clocks = true,
935 .enable_pmu_unk1 = true,
936 .phy0_dual_route = true,
939 static const struct sun4i_usb_phy_cfg sun8i_v3s_cfg = {
941 .type = sun8i_v3s_phy,
943 .phyctl_offset = REG_PHYCTL_A33,
944 .dedicated_clocks = true,
945 .enable_pmu_unk1 = true,
948 static const struct sun4i_usb_phy_cfg sun50i_a64_cfg = {
950 .type = sun50i_a64_phy,
952 .phyctl_offset = REG_PHYCTL_A33,
953 .dedicated_clocks = true,
954 .enable_pmu_unk1 = true,
955 .phy0_dual_route = true,
958 static const struct of_device_id sun4i_usb_phy_of_match[] = {
959 { .compatible = "allwinner,sun4i-a10-usb-phy", .data = &sun4i_a10_cfg },
960 { .compatible = "allwinner,sun5i-a13-usb-phy", .data = &sun5i_a13_cfg },
961 { .compatible = "allwinner,sun6i-a31-usb-phy", .data = &sun6i_a31_cfg },
962 { .compatible = "allwinner,sun7i-a20-usb-phy", .data = &sun7i_a20_cfg },
963 { .compatible = "allwinner,sun8i-a23-usb-phy", .data = &sun8i_a23_cfg },
964 { .compatible = "allwinner,sun8i-a33-usb-phy", .data = &sun8i_a33_cfg },
965 { .compatible = "allwinner,sun8i-a83t-usb-phy", .data = &sun8i_a83t_cfg },
966 { .compatible = "allwinner,sun8i-h3-usb-phy", .data = &sun8i_h3_cfg },
967 { .compatible = "allwinner,sun8i-v3s-usb-phy", .data = &sun8i_v3s_cfg },
968 { .compatible = "allwinner,sun50i-a64-usb-phy",
969 .data = &sun50i_a64_cfg},
972 MODULE_DEVICE_TABLE(of, sun4i_usb_phy_of_match);
974 static struct platform_driver sun4i_usb_phy_driver = {
975 .probe = sun4i_usb_phy_probe,
976 .remove = sun4i_usb_phy_remove,
978 .of_match_table = sun4i_usb_phy_of_match,
979 .name = "sun4i-usb-phy",
982 module_platform_driver(sun4i_usb_phy_driver);
984 MODULE_DESCRIPTION("Allwinner sun4i USB phy driver");
985 MODULE_AUTHOR("Hans de Goede <hdegoede@redhat.com>");
986 MODULE_LICENSE("GPL v2");