1 // SPDX-License-Identifier: GPL-2.0
3 * Microsemi Switchtec(tm) PCIe Management Driver
4 * Copyright (c) 2017, Microsemi Corporation
7 #include <linux/switchtec.h>
8 #include <linux/switchtec_ioctl.h>
10 #include <linux/interrupt.h>
11 #include <linux/module.h>
13 #include <linux/uaccess.h>
14 #include <linux/poll.h>
15 #include <linux/wait.h>
16 #include <linux/io-64-nonatomic-lo-hi.h>
17 #include <linux/nospec.h>
19 MODULE_DESCRIPTION("Microsemi Switchtec(tm) PCIe Management Driver");
20 MODULE_VERSION("0.1");
21 MODULE_LICENSE("GPL");
22 MODULE_AUTHOR("Microsemi Corporation");
24 static int max_devices = 16;
25 module_param(max_devices, int, 0644);
26 MODULE_PARM_DESC(max_devices, "max number of switchtec device instances");
28 static bool use_dma_mrpc = true;
29 module_param(use_dma_mrpc, bool, 0644);
30 MODULE_PARM_DESC(use_dma_mrpc,
31 "Enable the use of the DMA MRPC feature");
33 static int nirqs = 32;
34 module_param(nirqs, int, 0644);
35 MODULE_PARM_DESC(nirqs, "number of interrupts to allocate (more may be useful for NTB applications)");
37 static dev_t switchtec_devt;
38 static DEFINE_IDA(switchtec_minor_ida);
40 struct class *switchtec_class;
41 EXPORT_SYMBOL_GPL(switchtec_class);
51 struct switchtec_user {
52 struct switchtec_dev *stdev;
54 enum mrpc_state state;
56 wait_queue_head_t cmd_comp;
58 struct list_head list;
66 unsigned char data[SWITCHTEC_MRPC_PAYLOAD_SIZE];
71 * The MMIO reads to the device_id register should always return the device ID
72 * of the device, otherwise the firmware is probably stuck or unreachable
73 * due to a firmware reset which clears PCI state including the BARs and Memory
76 static int is_firmware_running(struct switchtec_dev *stdev)
78 u32 device = ioread32(&stdev->mmio_sys_info->device_id);
80 return stdev->pdev->device == device;
83 static struct switchtec_user *stuser_create(struct switchtec_dev *stdev)
85 struct switchtec_user *stuser;
87 stuser = kzalloc(sizeof(*stuser), GFP_KERNEL);
89 return ERR_PTR(-ENOMEM);
91 get_device(&stdev->dev);
92 stuser->stdev = stdev;
93 kref_init(&stuser->kref);
94 INIT_LIST_HEAD(&stuser->list);
95 init_waitqueue_head(&stuser->cmd_comp);
96 stuser->event_cnt = atomic_read(&stdev->event_cnt);
98 dev_dbg(&stdev->dev, "%s: %p\n", __func__, stuser);
103 static void stuser_free(struct kref *kref)
105 struct switchtec_user *stuser;
107 stuser = container_of(kref, struct switchtec_user, kref);
109 dev_dbg(&stuser->stdev->dev, "%s: %p\n", __func__, stuser);
111 put_device(&stuser->stdev->dev);
115 static void stuser_put(struct switchtec_user *stuser)
117 kref_put(&stuser->kref, stuser_free);
120 static void stuser_set_state(struct switchtec_user *stuser,
121 enum mrpc_state state)
123 /* requires the mrpc_mutex to already be held when called */
125 static const char * const state_names[] = {
126 [MRPC_IDLE] = "IDLE",
127 [MRPC_QUEUED] = "QUEUED",
128 [MRPC_RUNNING] = "RUNNING",
129 [MRPC_DONE] = "DONE",
130 [MRPC_IO_ERROR] = "IO_ERROR",
133 stuser->state = state;
135 dev_dbg(&stuser->stdev->dev, "stuser state %p -> %s",
136 stuser, state_names[state]);
139 static void mrpc_complete_cmd(struct switchtec_dev *stdev);
141 static void flush_wc_buf(struct switchtec_dev *stdev)
143 struct ntb_dbmsg_regs __iomem *mmio_dbmsg;
146 * odb (outbound doorbell) register is processed by low latency
147 * hardware and w/o side effect
149 mmio_dbmsg = (void __iomem *)stdev->mmio_ntb +
150 SWITCHTEC_NTB_REG_DBMSG_OFFSET;
151 ioread32(&mmio_dbmsg->odb);
154 static void mrpc_cmd_submit(struct switchtec_dev *stdev)
156 /* requires the mrpc_mutex to already be held when called */
158 struct switchtec_user *stuser;
160 if (stdev->mrpc_busy)
163 if (list_empty(&stdev->mrpc_queue))
166 stuser = list_entry(stdev->mrpc_queue.next, struct switchtec_user,
169 if (stdev->dma_mrpc) {
170 stdev->dma_mrpc->status = SWITCHTEC_MRPC_STATUS_INPROGRESS;
171 memset(stdev->dma_mrpc->data, 0xFF, SWITCHTEC_MRPC_PAYLOAD_SIZE);
174 stuser_set_state(stuser, MRPC_RUNNING);
175 stdev->mrpc_busy = 1;
176 memcpy_toio(&stdev->mmio_mrpc->input_data,
177 stuser->data, stuser->data_len);
179 iowrite32(stuser->cmd, &stdev->mmio_mrpc->cmd);
181 schedule_delayed_work(&stdev->mrpc_timeout,
182 msecs_to_jiffies(500));
185 static int mrpc_queue_cmd(struct switchtec_user *stuser)
187 /* requires the mrpc_mutex to already be held when called */
189 struct switchtec_dev *stdev = stuser->stdev;
191 kref_get(&stuser->kref);
192 stuser->read_len = sizeof(stuser->data);
193 stuser_set_state(stuser, MRPC_QUEUED);
194 stuser->cmd_done = false;
195 list_add_tail(&stuser->list, &stdev->mrpc_queue);
197 mrpc_cmd_submit(stdev);
202 static void mrpc_cleanup_cmd(struct switchtec_dev *stdev)
204 /* requires the mrpc_mutex to already be held when called */
206 struct switchtec_user *stuser = list_entry(stdev->mrpc_queue.next,
207 struct switchtec_user, list);
209 stuser->cmd_done = true;
210 wake_up_interruptible(&stuser->cmd_comp);
211 list_del_init(&stuser->list);
213 stdev->mrpc_busy = 0;
215 mrpc_cmd_submit(stdev);
218 static void mrpc_complete_cmd(struct switchtec_dev *stdev)
220 /* requires the mrpc_mutex to already be held when called */
222 struct switchtec_user *stuser;
224 if (list_empty(&stdev->mrpc_queue))
227 stuser = list_entry(stdev->mrpc_queue.next, struct switchtec_user,
231 stuser->status = stdev->dma_mrpc->status;
233 stuser->status = ioread32(&stdev->mmio_mrpc->status);
235 if (stuser->status == SWITCHTEC_MRPC_STATUS_INPROGRESS)
238 stuser_set_state(stuser, MRPC_DONE);
239 stuser->return_code = 0;
241 if (stuser->status != SWITCHTEC_MRPC_STATUS_DONE &&
242 stuser->status != SWITCHTEC_MRPC_STATUS_ERROR)
246 stuser->return_code = stdev->dma_mrpc->rtn_code;
248 stuser->return_code = ioread32(&stdev->mmio_mrpc->ret_value);
249 if (stuser->return_code != 0)
253 memcpy(stuser->data, &stdev->dma_mrpc->data,
256 memcpy_fromio(stuser->data, &stdev->mmio_mrpc->output_data,
259 mrpc_cleanup_cmd(stdev);
262 static void mrpc_event_work(struct work_struct *work)
264 struct switchtec_dev *stdev;
266 stdev = container_of(work, struct switchtec_dev, mrpc_work);
268 dev_dbg(&stdev->dev, "%s\n", __func__);
270 mutex_lock(&stdev->mrpc_mutex);
271 cancel_delayed_work(&stdev->mrpc_timeout);
272 mrpc_complete_cmd(stdev);
273 mutex_unlock(&stdev->mrpc_mutex);
276 static void mrpc_error_complete_cmd(struct switchtec_dev *stdev)
278 /* requires the mrpc_mutex to already be held when called */
280 struct switchtec_user *stuser;
282 if (list_empty(&stdev->mrpc_queue))
285 stuser = list_entry(stdev->mrpc_queue.next,
286 struct switchtec_user, list);
288 stuser_set_state(stuser, MRPC_IO_ERROR);
290 mrpc_cleanup_cmd(stdev);
293 static void mrpc_timeout_work(struct work_struct *work)
295 struct switchtec_dev *stdev;
298 stdev = container_of(work, struct switchtec_dev, mrpc_timeout.work);
300 dev_dbg(&stdev->dev, "%s\n", __func__);
302 mutex_lock(&stdev->mrpc_mutex);
304 if (!is_firmware_running(stdev)) {
305 mrpc_error_complete_cmd(stdev);
310 status = stdev->dma_mrpc->status;
312 status = ioread32(&stdev->mmio_mrpc->status);
313 if (status == SWITCHTEC_MRPC_STATUS_INPROGRESS) {
314 schedule_delayed_work(&stdev->mrpc_timeout,
315 msecs_to_jiffies(500));
319 mrpc_complete_cmd(stdev);
321 mutex_unlock(&stdev->mrpc_mutex);
324 static ssize_t device_version_show(struct device *dev,
325 struct device_attribute *attr, char *buf)
327 struct switchtec_dev *stdev = to_stdev(dev);
330 ver = ioread32(&stdev->mmio_sys_info->device_version);
332 return sysfs_emit(buf, "%x\n", ver);
334 static DEVICE_ATTR_RO(device_version);
336 static ssize_t fw_version_show(struct device *dev,
337 struct device_attribute *attr, char *buf)
339 struct switchtec_dev *stdev = to_stdev(dev);
342 ver = ioread32(&stdev->mmio_sys_info->firmware_version);
344 return sysfs_emit(buf, "%08x\n", ver);
346 static DEVICE_ATTR_RO(fw_version);
348 static ssize_t io_string_show(char *buf, void __iomem *attr, size_t len)
352 memcpy_fromio(buf, attr, len);
356 for (i = len - 1; i > 0; i--) {
366 #define DEVICE_ATTR_SYS_INFO_STR(field) \
367 static ssize_t field ## _show(struct device *dev, \
368 struct device_attribute *attr, char *buf) \
370 struct switchtec_dev *stdev = to_stdev(dev); \
371 struct sys_info_regs __iomem *si = stdev->mmio_sys_info; \
372 if (stdev->gen == SWITCHTEC_GEN3) \
373 return io_string_show(buf, &si->gen3.field, \
374 sizeof(si->gen3.field)); \
375 else if (stdev->gen == SWITCHTEC_GEN4) \
376 return io_string_show(buf, &si->gen4.field, \
377 sizeof(si->gen4.field)); \
379 return -EOPNOTSUPP; \
382 static DEVICE_ATTR_RO(field)
384 DEVICE_ATTR_SYS_INFO_STR(vendor_id);
385 DEVICE_ATTR_SYS_INFO_STR(product_id);
386 DEVICE_ATTR_SYS_INFO_STR(product_revision);
388 static ssize_t component_vendor_show(struct device *dev,
389 struct device_attribute *attr, char *buf)
391 struct switchtec_dev *stdev = to_stdev(dev);
392 struct sys_info_regs __iomem *si = stdev->mmio_sys_info;
394 /* component_vendor field not supported after gen3 */
395 if (stdev->gen != SWITCHTEC_GEN3)
396 return sysfs_emit(buf, "none\n");
398 return io_string_show(buf, &si->gen3.component_vendor,
399 sizeof(si->gen3.component_vendor));
401 static DEVICE_ATTR_RO(component_vendor);
403 static ssize_t component_id_show(struct device *dev,
404 struct device_attribute *attr, char *buf)
406 struct switchtec_dev *stdev = to_stdev(dev);
407 int id = ioread16(&stdev->mmio_sys_info->gen3.component_id);
409 /* component_id field not supported after gen3 */
410 if (stdev->gen != SWITCHTEC_GEN3)
411 return sysfs_emit(buf, "none\n");
413 return sysfs_emit(buf, "PM%04X\n", id);
415 static DEVICE_ATTR_RO(component_id);
417 static ssize_t component_revision_show(struct device *dev,
418 struct device_attribute *attr, char *buf)
420 struct switchtec_dev *stdev = to_stdev(dev);
421 int rev = ioread8(&stdev->mmio_sys_info->gen3.component_revision);
423 /* component_revision field not supported after gen3 */
424 if (stdev->gen != SWITCHTEC_GEN3)
425 return sysfs_emit(buf, "255\n");
427 return sysfs_emit(buf, "%d\n", rev);
429 static DEVICE_ATTR_RO(component_revision);
431 static ssize_t partition_show(struct device *dev,
432 struct device_attribute *attr, char *buf)
434 struct switchtec_dev *stdev = to_stdev(dev);
436 return sysfs_emit(buf, "%d\n", stdev->partition);
438 static DEVICE_ATTR_RO(partition);
440 static ssize_t partition_count_show(struct device *dev,
441 struct device_attribute *attr, char *buf)
443 struct switchtec_dev *stdev = to_stdev(dev);
445 return sysfs_emit(buf, "%d\n", stdev->partition_count);
447 static DEVICE_ATTR_RO(partition_count);
449 static struct attribute *switchtec_device_attrs[] = {
450 &dev_attr_device_version.attr,
451 &dev_attr_fw_version.attr,
452 &dev_attr_vendor_id.attr,
453 &dev_attr_product_id.attr,
454 &dev_attr_product_revision.attr,
455 &dev_attr_component_vendor.attr,
456 &dev_attr_component_id.attr,
457 &dev_attr_component_revision.attr,
458 &dev_attr_partition.attr,
459 &dev_attr_partition_count.attr,
463 ATTRIBUTE_GROUPS(switchtec_device);
465 static int switchtec_dev_open(struct inode *inode, struct file *filp)
467 struct switchtec_dev *stdev;
468 struct switchtec_user *stuser;
470 stdev = container_of(inode->i_cdev, struct switchtec_dev, cdev);
472 stuser = stuser_create(stdev);
474 return PTR_ERR(stuser);
476 filp->private_data = stuser;
477 stream_open(inode, filp);
479 dev_dbg(&stdev->dev, "%s: %p\n", __func__, stuser);
484 static int switchtec_dev_release(struct inode *inode, struct file *filp)
486 struct switchtec_user *stuser = filp->private_data;
493 static int lock_mutex_and_test_alive(struct switchtec_dev *stdev)
495 if (mutex_lock_interruptible(&stdev->mrpc_mutex))
499 mutex_unlock(&stdev->mrpc_mutex);
506 static ssize_t switchtec_dev_write(struct file *filp, const char __user *data,
507 size_t size, loff_t *off)
509 struct switchtec_user *stuser = filp->private_data;
510 struct switchtec_dev *stdev = stuser->stdev;
513 if (size < sizeof(stuser->cmd) ||
514 size > sizeof(stuser->cmd) + sizeof(stuser->data))
517 stuser->data_len = size - sizeof(stuser->cmd);
519 rc = lock_mutex_and_test_alive(stdev);
523 if (stuser->state != MRPC_IDLE) {
528 rc = copy_from_user(&stuser->cmd, data, sizeof(stuser->cmd));
533 if (((MRPC_CMD_ID(stuser->cmd) == MRPC_GAS_WRITE) ||
534 (MRPC_CMD_ID(stuser->cmd) == MRPC_GAS_READ)) &&
535 !capable(CAP_SYS_ADMIN)) {
540 data += sizeof(stuser->cmd);
541 rc = copy_from_user(&stuser->data, data, size - sizeof(stuser->cmd));
547 rc = mrpc_queue_cmd(stuser);
550 mutex_unlock(&stdev->mrpc_mutex);
558 static ssize_t switchtec_dev_read(struct file *filp, char __user *data,
559 size_t size, loff_t *off)
561 struct switchtec_user *stuser = filp->private_data;
562 struct switchtec_dev *stdev = stuser->stdev;
565 if (size < sizeof(stuser->cmd) ||
566 size > sizeof(stuser->cmd) + sizeof(stuser->data))
569 rc = lock_mutex_and_test_alive(stdev);
573 if (stuser->state == MRPC_IDLE) {
574 mutex_unlock(&stdev->mrpc_mutex);
578 stuser->read_len = size - sizeof(stuser->return_code);
580 mutex_unlock(&stdev->mrpc_mutex);
582 if (filp->f_flags & O_NONBLOCK) {
583 if (!stuser->cmd_done)
586 rc = wait_event_interruptible(stuser->cmd_comp,
592 rc = lock_mutex_and_test_alive(stdev);
596 if (stuser->state == MRPC_IO_ERROR) {
597 mutex_unlock(&stdev->mrpc_mutex);
601 if (stuser->state != MRPC_DONE) {
602 mutex_unlock(&stdev->mrpc_mutex);
606 rc = copy_to_user(data, &stuser->return_code,
607 sizeof(stuser->return_code));
609 mutex_unlock(&stdev->mrpc_mutex);
613 data += sizeof(stuser->return_code);
614 rc = copy_to_user(data, &stuser->data,
615 size - sizeof(stuser->return_code));
617 mutex_unlock(&stdev->mrpc_mutex);
621 stuser_set_state(stuser, MRPC_IDLE);
623 mutex_unlock(&stdev->mrpc_mutex);
625 if (stuser->status == SWITCHTEC_MRPC_STATUS_DONE ||
626 stuser->status == SWITCHTEC_MRPC_STATUS_ERROR)
628 else if (stuser->status == SWITCHTEC_MRPC_STATUS_INTERRUPTED)
634 static __poll_t switchtec_dev_poll(struct file *filp, poll_table *wait)
636 struct switchtec_user *stuser = filp->private_data;
637 struct switchtec_dev *stdev = stuser->stdev;
640 poll_wait(filp, &stuser->cmd_comp, wait);
641 poll_wait(filp, &stdev->event_wq, wait);
643 if (lock_mutex_and_test_alive(stdev))
644 return EPOLLIN | EPOLLRDHUP | EPOLLOUT | EPOLLERR | EPOLLHUP;
646 mutex_unlock(&stdev->mrpc_mutex);
648 if (stuser->cmd_done)
649 ret |= EPOLLIN | EPOLLRDNORM;
651 if (stuser->event_cnt != atomic_read(&stdev->event_cnt))
652 ret |= EPOLLPRI | EPOLLRDBAND;
657 static int ioctl_flash_info(struct switchtec_dev *stdev,
658 struct switchtec_ioctl_flash_info __user *uinfo)
660 struct switchtec_ioctl_flash_info info = {0};
661 struct flash_info_regs __iomem *fi = stdev->mmio_flash_info;
663 if (stdev->gen == SWITCHTEC_GEN3) {
664 info.flash_length = ioread32(&fi->gen3.flash_length);
665 info.num_partitions = SWITCHTEC_NUM_PARTITIONS_GEN3;
666 } else if (stdev->gen == SWITCHTEC_GEN4) {
667 info.flash_length = ioread32(&fi->gen4.flash_length);
668 info.num_partitions = SWITCHTEC_NUM_PARTITIONS_GEN4;
673 if (copy_to_user(uinfo, &info, sizeof(info)))
679 static void set_fw_info_part(struct switchtec_ioctl_flash_part_info *info,
680 struct partition_info __iomem *pi)
682 info->address = ioread32(&pi->address);
683 info->length = ioread32(&pi->length);
686 static int flash_part_info_gen3(struct switchtec_dev *stdev,
687 struct switchtec_ioctl_flash_part_info *info)
689 struct flash_info_regs_gen3 __iomem *fi =
690 &stdev->mmio_flash_info->gen3;
691 struct sys_info_regs_gen3 __iomem *si = &stdev->mmio_sys_info->gen3;
692 u32 active_addr = -1;
694 switch (info->flash_partition) {
695 case SWITCHTEC_IOCTL_PART_CFG0:
696 active_addr = ioread32(&fi->active_cfg);
697 set_fw_info_part(info, &fi->cfg0);
698 if (ioread16(&si->cfg_running) == SWITCHTEC_GEN3_CFG0_RUNNING)
699 info->active |= SWITCHTEC_IOCTL_PART_RUNNING;
701 case SWITCHTEC_IOCTL_PART_CFG1:
702 active_addr = ioread32(&fi->active_cfg);
703 set_fw_info_part(info, &fi->cfg1);
704 if (ioread16(&si->cfg_running) == SWITCHTEC_GEN3_CFG1_RUNNING)
705 info->active |= SWITCHTEC_IOCTL_PART_RUNNING;
707 case SWITCHTEC_IOCTL_PART_IMG0:
708 active_addr = ioread32(&fi->active_img);
709 set_fw_info_part(info, &fi->img0);
710 if (ioread16(&si->img_running) == SWITCHTEC_GEN3_IMG0_RUNNING)
711 info->active |= SWITCHTEC_IOCTL_PART_RUNNING;
713 case SWITCHTEC_IOCTL_PART_IMG1:
714 active_addr = ioread32(&fi->active_img);
715 set_fw_info_part(info, &fi->img1);
716 if (ioread16(&si->img_running) == SWITCHTEC_GEN3_IMG1_RUNNING)
717 info->active |= SWITCHTEC_IOCTL_PART_RUNNING;
719 case SWITCHTEC_IOCTL_PART_NVLOG:
720 set_fw_info_part(info, &fi->nvlog);
722 case SWITCHTEC_IOCTL_PART_VENDOR0:
723 set_fw_info_part(info, &fi->vendor[0]);
725 case SWITCHTEC_IOCTL_PART_VENDOR1:
726 set_fw_info_part(info, &fi->vendor[1]);
728 case SWITCHTEC_IOCTL_PART_VENDOR2:
729 set_fw_info_part(info, &fi->vendor[2]);
731 case SWITCHTEC_IOCTL_PART_VENDOR3:
732 set_fw_info_part(info, &fi->vendor[3]);
734 case SWITCHTEC_IOCTL_PART_VENDOR4:
735 set_fw_info_part(info, &fi->vendor[4]);
737 case SWITCHTEC_IOCTL_PART_VENDOR5:
738 set_fw_info_part(info, &fi->vendor[5]);
740 case SWITCHTEC_IOCTL_PART_VENDOR6:
741 set_fw_info_part(info, &fi->vendor[6]);
743 case SWITCHTEC_IOCTL_PART_VENDOR7:
744 set_fw_info_part(info, &fi->vendor[7]);
750 if (info->address == active_addr)
751 info->active |= SWITCHTEC_IOCTL_PART_ACTIVE;
756 static int flash_part_info_gen4(struct switchtec_dev *stdev,
757 struct switchtec_ioctl_flash_part_info *info)
759 struct flash_info_regs_gen4 __iomem *fi = &stdev->mmio_flash_info->gen4;
760 struct sys_info_regs_gen4 __iomem *si = &stdev->mmio_sys_info->gen4;
761 struct active_partition_info_gen4 __iomem *af = &fi->active_flag;
763 switch (info->flash_partition) {
764 case SWITCHTEC_IOCTL_PART_MAP_0:
765 set_fw_info_part(info, &fi->map0);
767 case SWITCHTEC_IOCTL_PART_MAP_1:
768 set_fw_info_part(info, &fi->map1);
770 case SWITCHTEC_IOCTL_PART_KEY_0:
771 set_fw_info_part(info, &fi->key0);
772 if (ioread8(&af->key) == SWITCHTEC_GEN4_KEY0_ACTIVE)
773 info->active |= SWITCHTEC_IOCTL_PART_ACTIVE;
774 if (ioread16(&si->key_running) == SWITCHTEC_GEN4_KEY0_RUNNING)
775 info->active |= SWITCHTEC_IOCTL_PART_RUNNING;
777 case SWITCHTEC_IOCTL_PART_KEY_1:
778 set_fw_info_part(info, &fi->key1);
779 if (ioread8(&af->key) == SWITCHTEC_GEN4_KEY1_ACTIVE)
780 info->active |= SWITCHTEC_IOCTL_PART_ACTIVE;
781 if (ioread16(&si->key_running) == SWITCHTEC_GEN4_KEY1_RUNNING)
782 info->active |= SWITCHTEC_IOCTL_PART_RUNNING;
784 case SWITCHTEC_IOCTL_PART_BL2_0:
785 set_fw_info_part(info, &fi->bl2_0);
786 if (ioread8(&af->bl2) == SWITCHTEC_GEN4_BL2_0_ACTIVE)
787 info->active |= SWITCHTEC_IOCTL_PART_ACTIVE;
788 if (ioread16(&si->bl2_running) == SWITCHTEC_GEN4_BL2_0_RUNNING)
789 info->active |= SWITCHTEC_IOCTL_PART_RUNNING;
791 case SWITCHTEC_IOCTL_PART_BL2_1:
792 set_fw_info_part(info, &fi->bl2_1);
793 if (ioread8(&af->bl2) == SWITCHTEC_GEN4_BL2_1_ACTIVE)
794 info->active |= SWITCHTEC_IOCTL_PART_ACTIVE;
795 if (ioread16(&si->bl2_running) == SWITCHTEC_GEN4_BL2_1_RUNNING)
796 info->active |= SWITCHTEC_IOCTL_PART_RUNNING;
798 case SWITCHTEC_IOCTL_PART_CFG0:
799 set_fw_info_part(info, &fi->cfg0);
800 if (ioread8(&af->cfg) == SWITCHTEC_GEN4_CFG0_ACTIVE)
801 info->active |= SWITCHTEC_IOCTL_PART_ACTIVE;
802 if (ioread16(&si->cfg_running) == SWITCHTEC_GEN4_CFG0_RUNNING)
803 info->active |= SWITCHTEC_IOCTL_PART_RUNNING;
805 case SWITCHTEC_IOCTL_PART_CFG1:
806 set_fw_info_part(info, &fi->cfg1);
807 if (ioread8(&af->cfg) == SWITCHTEC_GEN4_CFG1_ACTIVE)
808 info->active |= SWITCHTEC_IOCTL_PART_ACTIVE;
809 if (ioread16(&si->cfg_running) == SWITCHTEC_GEN4_CFG1_RUNNING)
810 info->active |= SWITCHTEC_IOCTL_PART_RUNNING;
812 case SWITCHTEC_IOCTL_PART_IMG0:
813 set_fw_info_part(info, &fi->img0);
814 if (ioread8(&af->img) == SWITCHTEC_GEN4_IMG0_ACTIVE)
815 info->active |= SWITCHTEC_IOCTL_PART_ACTIVE;
816 if (ioread16(&si->img_running) == SWITCHTEC_GEN4_IMG0_RUNNING)
817 info->active |= SWITCHTEC_IOCTL_PART_RUNNING;
819 case SWITCHTEC_IOCTL_PART_IMG1:
820 set_fw_info_part(info, &fi->img1);
821 if (ioread8(&af->img) == SWITCHTEC_GEN4_IMG1_ACTIVE)
822 info->active |= SWITCHTEC_IOCTL_PART_ACTIVE;
823 if (ioread16(&si->img_running) == SWITCHTEC_GEN4_IMG1_RUNNING)
824 info->active |= SWITCHTEC_IOCTL_PART_RUNNING;
826 case SWITCHTEC_IOCTL_PART_NVLOG:
827 set_fw_info_part(info, &fi->nvlog);
829 case SWITCHTEC_IOCTL_PART_VENDOR0:
830 set_fw_info_part(info, &fi->vendor[0]);
832 case SWITCHTEC_IOCTL_PART_VENDOR1:
833 set_fw_info_part(info, &fi->vendor[1]);
835 case SWITCHTEC_IOCTL_PART_VENDOR2:
836 set_fw_info_part(info, &fi->vendor[2]);
838 case SWITCHTEC_IOCTL_PART_VENDOR3:
839 set_fw_info_part(info, &fi->vendor[3]);
841 case SWITCHTEC_IOCTL_PART_VENDOR4:
842 set_fw_info_part(info, &fi->vendor[4]);
844 case SWITCHTEC_IOCTL_PART_VENDOR5:
845 set_fw_info_part(info, &fi->vendor[5]);
847 case SWITCHTEC_IOCTL_PART_VENDOR6:
848 set_fw_info_part(info, &fi->vendor[6]);
850 case SWITCHTEC_IOCTL_PART_VENDOR7:
851 set_fw_info_part(info, &fi->vendor[7]);
860 static int ioctl_flash_part_info(struct switchtec_dev *stdev,
861 struct switchtec_ioctl_flash_part_info __user *uinfo)
864 struct switchtec_ioctl_flash_part_info info = {0};
866 if (copy_from_user(&info, uinfo, sizeof(info)))
869 if (stdev->gen == SWITCHTEC_GEN3) {
870 ret = flash_part_info_gen3(stdev, &info);
873 } else if (stdev->gen == SWITCHTEC_GEN4) {
874 ret = flash_part_info_gen4(stdev, &info);
881 if (copy_to_user(uinfo, &info, sizeof(info)))
887 static int ioctl_event_summary(struct switchtec_dev *stdev,
888 struct switchtec_user *stuser,
889 struct switchtec_ioctl_event_summary __user *usum,
892 struct switchtec_ioctl_event_summary *s;
897 s = kzalloc(sizeof(*s), GFP_KERNEL);
901 s->global = ioread32(&stdev->mmio_sw_event->global_summary);
902 s->part_bitmap = ioread64(&stdev->mmio_sw_event->part_event_bitmap);
903 s->local_part = ioread32(&stdev->mmio_part_cfg->part_event_summary);
905 for (i = 0; i < stdev->partition_count; i++) {
906 reg = ioread32(&stdev->mmio_part_cfg_all[i].part_event_summary);
910 for (i = 0; i < stdev->pff_csr_count; i++) {
911 reg = ioread32(&stdev->mmio_pff_csr[i].pff_event_summary);
915 if (copy_to_user(usum, s, size)) {
920 stuser->event_cnt = atomic_read(&stdev->event_cnt);
927 static u32 __iomem *global_ev_reg(struct switchtec_dev *stdev,
928 size_t offset, int index)
930 return (void __iomem *)stdev->mmio_sw_event + offset;
933 static u32 __iomem *part_ev_reg(struct switchtec_dev *stdev,
934 size_t offset, int index)
936 return (void __iomem *)&stdev->mmio_part_cfg_all[index] + offset;
939 static u32 __iomem *pff_ev_reg(struct switchtec_dev *stdev,
940 size_t offset, int index)
942 return (void __iomem *)&stdev->mmio_pff_csr[index] + offset;
945 #define EV_GLB(i, r)[i] = {offsetof(struct sw_event_regs, r), global_ev_reg}
946 #define EV_PAR(i, r)[i] = {offsetof(struct part_cfg_regs, r), part_ev_reg}
947 #define EV_PFF(i, r)[i] = {offsetof(struct pff_csr_regs, r), pff_ev_reg}
949 static const struct event_reg {
951 u32 __iomem *(*map_reg)(struct switchtec_dev *stdev,
952 size_t offset, int index);
954 EV_GLB(SWITCHTEC_IOCTL_EVENT_STACK_ERROR, stack_error_event_hdr),
955 EV_GLB(SWITCHTEC_IOCTL_EVENT_PPU_ERROR, ppu_error_event_hdr),
956 EV_GLB(SWITCHTEC_IOCTL_EVENT_ISP_ERROR, isp_error_event_hdr),
957 EV_GLB(SWITCHTEC_IOCTL_EVENT_SYS_RESET, sys_reset_event_hdr),
958 EV_GLB(SWITCHTEC_IOCTL_EVENT_FW_EXC, fw_exception_hdr),
959 EV_GLB(SWITCHTEC_IOCTL_EVENT_FW_NMI, fw_nmi_hdr),
960 EV_GLB(SWITCHTEC_IOCTL_EVENT_FW_NON_FATAL, fw_non_fatal_hdr),
961 EV_GLB(SWITCHTEC_IOCTL_EVENT_FW_FATAL, fw_fatal_hdr),
962 EV_GLB(SWITCHTEC_IOCTL_EVENT_TWI_MRPC_COMP, twi_mrpc_comp_hdr),
963 EV_GLB(SWITCHTEC_IOCTL_EVENT_TWI_MRPC_COMP_ASYNC,
964 twi_mrpc_comp_async_hdr),
965 EV_GLB(SWITCHTEC_IOCTL_EVENT_CLI_MRPC_COMP, cli_mrpc_comp_hdr),
966 EV_GLB(SWITCHTEC_IOCTL_EVENT_CLI_MRPC_COMP_ASYNC,
967 cli_mrpc_comp_async_hdr),
968 EV_GLB(SWITCHTEC_IOCTL_EVENT_GPIO_INT, gpio_interrupt_hdr),
969 EV_GLB(SWITCHTEC_IOCTL_EVENT_GFMS, gfms_event_hdr),
970 EV_PAR(SWITCHTEC_IOCTL_EVENT_PART_RESET, part_reset_hdr),
971 EV_PAR(SWITCHTEC_IOCTL_EVENT_MRPC_COMP, mrpc_comp_hdr),
972 EV_PAR(SWITCHTEC_IOCTL_EVENT_MRPC_COMP_ASYNC, mrpc_comp_async_hdr),
973 EV_PAR(SWITCHTEC_IOCTL_EVENT_DYN_PART_BIND_COMP, dyn_binding_hdr),
974 EV_PAR(SWITCHTEC_IOCTL_EVENT_INTERCOMM_REQ_NOTIFY,
975 intercomm_notify_hdr),
976 EV_PFF(SWITCHTEC_IOCTL_EVENT_AER_IN_P2P, aer_in_p2p_hdr),
977 EV_PFF(SWITCHTEC_IOCTL_EVENT_AER_IN_VEP, aer_in_vep_hdr),
978 EV_PFF(SWITCHTEC_IOCTL_EVENT_DPC, dpc_hdr),
979 EV_PFF(SWITCHTEC_IOCTL_EVENT_CTS, cts_hdr),
980 EV_PFF(SWITCHTEC_IOCTL_EVENT_UEC, uec_hdr),
981 EV_PFF(SWITCHTEC_IOCTL_EVENT_HOTPLUG, hotplug_hdr),
982 EV_PFF(SWITCHTEC_IOCTL_EVENT_IER, ier_hdr),
983 EV_PFF(SWITCHTEC_IOCTL_EVENT_THRESH, threshold_hdr),
984 EV_PFF(SWITCHTEC_IOCTL_EVENT_POWER_MGMT, power_mgmt_hdr),
985 EV_PFF(SWITCHTEC_IOCTL_EVENT_TLP_THROTTLING, tlp_throttling_hdr),
986 EV_PFF(SWITCHTEC_IOCTL_EVENT_FORCE_SPEED, force_speed_hdr),
987 EV_PFF(SWITCHTEC_IOCTL_EVENT_CREDIT_TIMEOUT, credit_timeout_hdr),
988 EV_PFF(SWITCHTEC_IOCTL_EVENT_LINK_STATE, link_state_hdr),
991 static u32 __iomem *event_hdr_addr(struct switchtec_dev *stdev,
992 int event_id, int index)
996 if (event_id < 0 || event_id >= SWITCHTEC_IOCTL_MAX_EVENTS)
997 return (u32 __iomem *)ERR_PTR(-EINVAL);
999 off = event_regs[event_id].offset;
1001 if (event_regs[event_id].map_reg == part_ev_reg) {
1002 if (index == SWITCHTEC_IOCTL_EVENT_LOCAL_PART_IDX)
1003 index = stdev->partition;
1004 else if (index < 0 || index >= stdev->partition_count)
1005 return (u32 __iomem *)ERR_PTR(-EINVAL);
1006 } else if (event_regs[event_id].map_reg == pff_ev_reg) {
1007 if (index < 0 || index >= stdev->pff_csr_count)
1008 return (u32 __iomem *)ERR_PTR(-EINVAL);
1011 return event_regs[event_id].map_reg(stdev, off, index);
1014 static int event_ctl(struct switchtec_dev *stdev,
1015 struct switchtec_ioctl_event_ctl *ctl)
1021 reg = event_hdr_addr(stdev, ctl->event_id, ctl->index);
1023 return PTR_ERR(reg);
1025 hdr = ioread32(reg);
1026 if (hdr & SWITCHTEC_EVENT_NOT_SUPP)
1029 for (i = 0; i < ARRAY_SIZE(ctl->data); i++)
1030 ctl->data[i] = ioread32(®[i + 1]);
1032 ctl->occurred = hdr & SWITCHTEC_EVENT_OCCURRED;
1033 ctl->count = (hdr >> 5) & 0xFF;
1035 if (!(ctl->flags & SWITCHTEC_IOCTL_EVENT_FLAG_CLEAR))
1036 hdr &= ~SWITCHTEC_EVENT_CLEAR;
1037 if (ctl->flags & SWITCHTEC_IOCTL_EVENT_FLAG_EN_POLL)
1038 hdr |= SWITCHTEC_EVENT_EN_IRQ;
1039 if (ctl->flags & SWITCHTEC_IOCTL_EVENT_FLAG_DIS_POLL)
1040 hdr &= ~SWITCHTEC_EVENT_EN_IRQ;
1041 if (ctl->flags & SWITCHTEC_IOCTL_EVENT_FLAG_EN_LOG)
1042 hdr |= SWITCHTEC_EVENT_EN_LOG;
1043 if (ctl->flags & SWITCHTEC_IOCTL_EVENT_FLAG_DIS_LOG)
1044 hdr &= ~SWITCHTEC_EVENT_EN_LOG;
1045 if (ctl->flags & SWITCHTEC_IOCTL_EVENT_FLAG_EN_CLI)
1046 hdr |= SWITCHTEC_EVENT_EN_CLI;
1047 if (ctl->flags & SWITCHTEC_IOCTL_EVENT_FLAG_DIS_CLI)
1048 hdr &= ~SWITCHTEC_EVENT_EN_CLI;
1049 if (ctl->flags & SWITCHTEC_IOCTL_EVENT_FLAG_EN_FATAL)
1050 hdr |= SWITCHTEC_EVENT_FATAL;
1051 if (ctl->flags & SWITCHTEC_IOCTL_EVENT_FLAG_DIS_FATAL)
1052 hdr &= ~SWITCHTEC_EVENT_FATAL;
1055 iowrite32(hdr, reg);
1058 if (hdr & SWITCHTEC_EVENT_EN_IRQ)
1059 ctl->flags |= SWITCHTEC_IOCTL_EVENT_FLAG_EN_POLL;
1060 if (hdr & SWITCHTEC_EVENT_EN_LOG)
1061 ctl->flags |= SWITCHTEC_IOCTL_EVENT_FLAG_EN_LOG;
1062 if (hdr & SWITCHTEC_EVENT_EN_CLI)
1063 ctl->flags |= SWITCHTEC_IOCTL_EVENT_FLAG_EN_CLI;
1064 if (hdr & SWITCHTEC_EVENT_FATAL)
1065 ctl->flags |= SWITCHTEC_IOCTL_EVENT_FLAG_EN_FATAL;
1070 static int ioctl_event_ctl(struct switchtec_dev *stdev,
1071 struct switchtec_ioctl_event_ctl __user *uctl)
1075 unsigned int event_flags;
1076 struct switchtec_ioctl_event_ctl ctl;
1078 if (copy_from_user(&ctl, uctl, sizeof(ctl)))
1081 if (ctl.event_id >= SWITCHTEC_IOCTL_MAX_EVENTS)
1084 if (ctl.flags & SWITCHTEC_IOCTL_EVENT_FLAG_UNUSED)
1087 if (ctl.index == SWITCHTEC_IOCTL_EVENT_IDX_ALL) {
1088 if (event_regs[ctl.event_id].map_reg == global_ev_reg)
1090 else if (event_regs[ctl.event_id].map_reg == part_ev_reg)
1091 nr_idxs = stdev->partition_count;
1092 else if (event_regs[ctl.event_id].map_reg == pff_ev_reg)
1093 nr_idxs = stdev->pff_csr_count;
1097 event_flags = ctl.flags;
1098 for (ctl.index = 0; ctl.index < nr_idxs; ctl.index++) {
1099 ctl.flags = event_flags;
1100 ret = event_ctl(stdev, &ctl);
1101 if (ret < 0 && ret != -EOPNOTSUPP)
1105 ret = event_ctl(stdev, &ctl);
1110 if (copy_to_user(uctl, &ctl, sizeof(ctl)))
1116 static int ioctl_pff_to_port(struct switchtec_dev *stdev,
1117 struct switchtec_ioctl_pff_port __user *up)
1121 struct part_cfg_regs __iomem *pcfg;
1122 struct switchtec_ioctl_pff_port p;
1124 if (copy_from_user(&p, up, sizeof(p)))
1128 for (part = 0; part < stdev->partition_count; part++) {
1129 pcfg = &stdev->mmio_part_cfg_all[part];
1132 reg = ioread32(&pcfg->usp_pff_inst_id);
1138 reg = ioread32(&pcfg->vep_pff_inst_id) & 0xFF;
1140 p.port = SWITCHTEC_IOCTL_PFF_VEP;
1144 for (i = 0; i < ARRAY_SIZE(pcfg->dsp_pff_inst_id); i++) {
1145 reg = ioread32(&pcfg->dsp_pff_inst_id[i]);
1157 if (copy_to_user(up, &p, sizeof(p)))
1163 static int ioctl_port_to_pff(struct switchtec_dev *stdev,
1164 struct switchtec_ioctl_pff_port __user *up)
1166 struct switchtec_ioctl_pff_port p;
1167 struct part_cfg_regs __iomem *pcfg;
1169 if (copy_from_user(&p, up, sizeof(p)))
1172 if (p.partition == SWITCHTEC_IOCTL_EVENT_LOCAL_PART_IDX)
1173 pcfg = stdev->mmio_part_cfg;
1174 else if (p.partition < stdev->partition_count)
1175 pcfg = &stdev->mmio_part_cfg_all[p.partition];
1181 p.pff = ioread32(&pcfg->usp_pff_inst_id);
1183 case SWITCHTEC_IOCTL_PFF_VEP:
1184 p.pff = ioread32(&pcfg->vep_pff_inst_id) & 0xFF;
1187 if (p.port > ARRAY_SIZE(pcfg->dsp_pff_inst_id))
1189 p.port = array_index_nospec(p.port,
1190 ARRAY_SIZE(pcfg->dsp_pff_inst_id) + 1);
1191 p.pff = ioread32(&pcfg->dsp_pff_inst_id[p.port - 1]);
1195 if (copy_to_user(up, &p, sizeof(p)))
1201 static long switchtec_dev_ioctl(struct file *filp, unsigned int cmd,
1204 struct switchtec_user *stuser = filp->private_data;
1205 struct switchtec_dev *stdev = stuser->stdev;
1207 void __user *argp = (void __user *)arg;
1209 rc = lock_mutex_and_test_alive(stdev);
1214 case SWITCHTEC_IOCTL_FLASH_INFO:
1215 rc = ioctl_flash_info(stdev, argp);
1217 case SWITCHTEC_IOCTL_FLASH_PART_INFO:
1218 rc = ioctl_flash_part_info(stdev, argp);
1220 case SWITCHTEC_IOCTL_EVENT_SUMMARY_LEGACY:
1221 rc = ioctl_event_summary(stdev, stuser, argp,
1222 sizeof(struct switchtec_ioctl_event_summary_legacy));
1224 case SWITCHTEC_IOCTL_EVENT_CTL:
1225 rc = ioctl_event_ctl(stdev, argp);
1227 case SWITCHTEC_IOCTL_PFF_TO_PORT:
1228 rc = ioctl_pff_to_port(stdev, argp);
1230 case SWITCHTEC_IOCTL_PORT_TO_PFF:
1231 rc = ioctl_port_to_pff(stdev, argp);
1233 case SWITCHTEC_IOCTL_EVENT_SUMMARY:
1234 rc = ioctl_event_summary(stdev, stuser, argp,
1235 sizeof(struct switchtec_ioctl_event_summary));
1242 mutex_unlock(&stdev->mrpc_mutex);
1246 static const struct file_operations switchtec_fops = {
1247 .owner = THIS_MODULE,
1248 .open = switchtec_dev_open,
1249 .release = switchtec_dev_release,
1250 .write = switchtec_dev_write,
1251 .read = switchtec_dev_read,
1252 .poll = switchtec_dev_poll,
1253 .unlocked_ioctl = switchtec_dev_ioctl,
1254 .compat_ioctl = compat_ptr_ioctl,
1257 static void link_event_work(struct work_struct *work)
1259 struct switchtec_dev *stdev;
1261 stdev = container_of(work, struct switchtec_dev, link_event_work);
1263 if (stdev->link_notifier)
1264 stdev->link_notifier(stdev);
1267 static void check_link_state_events(struct switchtec_dev *stdev)
1274 for (idx = 0; idx < stdev->pff_csr_count; idx++) {
1275 reg = ioread32(&stdev->mmio_pff_csr[idx].link_state_hdr);
1276 dev_dbg(&stdev->dev, "link_state: %d->%08x\n", idx, reg);
1277 count = (reg >> 5) & 0xFF;
1279 if (count != stdev->link_event_count[idx]) {
1281 stdev->link_event_count[idx] = count;
1286 schedule_work(&stdev->link_event_work);
1289 static void enable_link_state_events(struct switchtec_dev *stdev)
1293 for (idx = 0; idx < stdev->pff_csr_count; idx++) {
1294 iowrite32(SWITCHTEC_EVENT_CLEAR |
1295 SWITCHTEC_EVENT_EN_IRQ,
1296 &stdev->mmio_pff_csr[idx].link_state_hdr);
1300 static void enable_dma_mrpc(struct switchtec_dev *stdev)
1302 writeq(stdev->dma_mrpc_dma_addr, &stdev->mmio_mrpc->dma_addr);
1303 flush_wc_buf(stdev);
1304 iowrite32(SWITCHTEC_DMA_MRPC_EN, &stdev->mmio_mrpc->dma_en);
1307 static void stdev_release(struct device *dev)
1309 struct switchtec_dev *stdev = to_stdev(dev);
1314 static void stdev_kill(struct switchtec_dev *stdev)
1316 struct switchtec_user *stuser, *tmpuser;
1318 pci_clear_master(stdev->pdev);
1320 cancel_delayed_work_sync(&stdev->mrpc_timeout);
1322 /* Mark the hardware as unavailable and complete all completions */
1323 mutex_lock(&stdev->mrpc_mutex);
1324 stdev->alive = false;
1326 /* Wake up and kill any users waiting on an MRPC request */
1327 list_for_each_entry_safe(stuser, tmpuser, &stdev->mrpc_queue, list) {
1328 stuser->cmd_done = true;
1329 wake_up_interruptible(&stuser->cmd_comp);
1330 list_del_init(&stuser->list);
1334 mutex_unlock(&stdev->mrpc_mutex);
1336 /* Wake up any users waiting on event_wq */
1337 wake_up_interruptible(&stdev->event_wq);
1340 static struct switchtec_dev *stdev_create(struct pci_dev *pdev)
1342 struct switchtec_dev *stdev;
1348 stdev = kzalloc_node(sizeof(*stdev), GFP_KERNEL,
1349 dev_to_node(&pdev->dev));
1351 return ERR_PTR(-ENOMEM);
1353 stdev->alive = true;
1354 stdev->pdev = pci_dev_get(pdev);
1355 INIT_LIST_HEAD(&stdev->mrpc_queue);
1356 mutex_init(&stdev->mrpc_mutex);
1357 stdev->mrpc_busy = 0;
1358 INIT_WORK(&stdev->mrpc_work, mrpc_event_work);
1359 INIT_DELAYED_WORK(&stdev->mrpc_timeout, mrpc_timeout_work);
1360 INIT_WORK(&stdev->link_event_work, link_event_work);
1361 init_waitqueue_head(&stdev->event_wq);
1362 atomic_set(&stdev->event_cnt, 0);
1365 device_initialize(dev);
1366 dev->class = switchtec_class;
1367 dev->parent = &pdev->dev;
1368 dev->groups = switchtec_device_groups;
1369 dev->release = stdev_release;
1371 minor = ida_alloc(&switchtec_minor_ida, GFP_KERNEL);
1377 dev->devt = MKDEV(MAJOR(switchtec_devt), minor);
1378 dev_set_name(dev, "switchtec%d", minor);
1380 cdev = &stdev->cdev;
1381 cdev_init(cdev, &switchtec_fops);
1382 cdev->owner = THIS_MODULE;
1387 pci_dev_put(stdev->pdev);
1388 put_device(&stdev->dev);
1392 static int mask_event(struct switchtec_dev *stdev, int eid, int idx)
1394 size_t off = event_regs[eid].offset;
1395 u32 __iomem *hdr_reg;
1398 hdr_reg = event_regs[eid].map_reg(stdev, off, idx);
1399 hdr = ioread32(hdr_reg);
1401 if (hdr & SWITCHTEC_EVENT_NOT_SUPP)
1404 if (!(hdr & SWITCHTEC_EVENT_OCCURRED && hdr & SWITCHTEC_EVENT_EN_IRQ))
1407 dev_dbg(&stdev->dev, "%s: %d %d %x\n", __func__, eid, idx, hdr);
1408 hdr &= ~(SWITCHTEC_EVENT_EN_IRQ | SWITCHTEC_EVENT_OCCURRED);
1409 iowrite32(hdr, hdr_reg);
1414 static int mask_all_events(struct switchtec_dev *stdev, int eid)
1419 if (event_regs[eid].map_reg == part_ev_reg) {
1420 for (idx = 0; idx < stdev->partition_count; idx++)
1421 count += mask_event(stdev, eid, idx);
1422 } else if (event_regs[eid].map_reg == pff_ev_reg) {
1423 for (idx = 0; idx < stdev->pff_csr_count; idx++) {
1424 if (!stdev->pff_local[idx])
1427 count += mask_event(stdev, eid, idx);
1430 count += mask_event(stdev, eid, 0);
1436 static irqreturn_t switchtec_event_isr(int irq, void *dev)
1438 struct switchtec_dev *stdev = dev;
1440 irqreturn_t ret = IRQ_NONE;
1441 int eid, event_count = 0;
1443 reg = ioread32(&stdev->mmio_part_cfg->mrpc_comp_hdr);
1444 if (reg & SWITCHTEC_EVENT_OCCURRED) {
1445 dev_dbg(&stdev->dev, "%s: mrpc comp\n", __func__);
1447 schedule_work(&stdev->mrpc_work);
1448 iowrite32(reg, &stdev->mmio_part_cfg->mrpc_comp_hdr);
1451 check_link_state_events(stdev);
1453 for (eid = 0; eid < SWITCHTEC_IOCTL_MAX_EVENTS; eid++) {
1454 if (eid == SWITCHTEC_IOCTL_EVENT_LINK_STATE ||
1455 eid == SWITCHTEC_IOCTL_EVENT_MRPC_COMP)
1458 event_count += mask_all_events(stdev, eid);
1462 atomic_inc(&stdev->event_cnt);
1463 wake_up_interruptible(&stdev->event_wq);
1464 dev_dbg(&stdev->dev, "%s: %d events\n", __func__,
1473 static irqreturn_t switchtec_dma_mrpc_isr(int irq, void *dev)
1475 struct switchtec_dev *stdev = dev;
1476 irqreturn_t ret = IRQ_NONE;
1478 iowrite32(SWITCHTEC_EVENT_CLEAR |
1479 SWITCHTEC_EVENT_EN_IRQ,
1480 &stdev->mmio_part_cfg->mrpc_comp_hdr);
1481 schedule_work(&stdev->mrpc_work);
1487 static int switchtec_init_isr(struct switchtec_dev *stdev)
1497 nvecs = pci_alloc_irq_vectors(stdev->pdev, 1, nirqs,
1498 PCI_IRQ_MSIX | PCI_IRQ_MSI |
1503 event_irq = ioread16(&stdev->mmio_part_cfg->vep_vector_number);
1504 if (event_irq < 0 || event_irq >= nvecs)
1507 event_irq = pci_irq_vector(stdev->pdev, event_irq);
1511 rc = devm_request_irq(&stdev->pdev->dev, event_irq,
1512 switchtec_event_isr, 0,
1513 KBUILD_MODNAME, stdev);
1518 if (!stdev->dma_mrpc)
1521 dma_mrpc_irq = ioread32(&stdev->mmio_mrpc->dma_vector);
1522 if (dma_mrpc_irq < 0 || dma_mrpc_irq >= nvecs)
1525 dma_mrpc_irq = pci_irq_vector(stdev->pdev, dma_mrpc_irq);
1526 if (dma_mrpc_irq < 0)
1527 return dma_mrpc_irq;
1529 rc = devm_request_irq(&stdev->pdev->dev, dma_mrpc_irq,
1530 switchtec_dma_mrpc_isr, 0,
1531 KBUILD_MODNAME, stdev);
1536 static void init_pff(struct switchtec_dev *stdev)
1540 struct part_cfg_regs __iomem *pcfg = stdev->mmio_part_cfg;
1542 for (i = 0; i < SWITCHTEC_MAX_PFF_CSR; i++) {
1543 reg = ioread16(&stdev->mmio_pff_csr[i].vendor_id);
1544 if (reg != PCI_VENDOR_ID_MICROSEMI)
1548 stdev->pff_csr_count = i;
1550 reg = ioread32(&pcfg->usp_pff_inst_id);
1551 if (reg < stdev->pff_csr_count)
1552 stdev->pff_local[reg] = 1;
1554 reg = ioread32(&pcfg->vep_pff_inst_id) & 0xFF;
1555 if (reg < stdev->pff_csr_count)
1556 stdev->pff_local[reg] = 1;
1558 for (i = 0; i < ARRAY_SIZE(pcfg->dsp_pff_inst_id); i++) {
1559 reg = ioread32(&pcfg->dsp_pff_inst_id[i]);
1560 if (reg < stdev->pff_csr_count)
1561 stdev->pff_local[reg] = 1;
1565 static int switchtec_init_pci(struct switchtec_dev *stdev,
1566 struct pci_dev *pdev)
1570 unsigned long res_start, res_len;
1571 u32 __iomem *part_id;
1573 rc = pcim_enable_device(pdev);
1577 rc = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
1581 pci_set_master(pdev);
1583 res_start = pci_resource_start(pdev, 0);
1584 res_len = pci_resource_len(pdev, 0);
1586 if (!devm_request_mem_region(&pdev->dev, res_start,
1587 res_len, KBUILD_MODNAME))
1590 stdev->mmio_mrpc = devm_ioremap_wc(&pdev->dev, res_start,
1591 SWITCHTEC_GAS_TOP_CFG_OFFSET);
1592 if (!stdev->mmio_mrpc)
1595 map = devm_ioremap(&pdev->dev,
1596 res_start + SWITCHTEC_GAS_TOP_CFG_OFFSET,
1597 res_len - SWITCHTEC_GAS_TOP_CFG_OFFSET);
1601 stdev->mmio = map - SWITCHTEC_GAS_TOP_CFG_OFFSET;
1602 stdev->mmio_sw_event = stdev->mmio + SWITCHTEC_GAS_SW_EVENT_OFFSET;
1603 stdev->mmio_sys_info = stdev->mmio + SWITCHTEC_GAS_SYS_INFO_OFFSET;
1604 stdev->mmio_flash_info = stdev->mmio + SWITCHTEC_GAS_FLASH_INFO_OFFSET;
1605 stdev->mmio_ntb = stdev->mmio + SWITCHTEC_GAS_NTB_OFFSET;
1607 if (stdev->gen == SWITCHTEC_GEN3)
1608 part_id = &stdev->mmio_sys_info->gen3.partition_id;
1609 else if (stdev->gen == SWITCHTEC_GEN4)
1610 part_id = &stdev->mmio_sys_info->gen4.partition_id;
1614 stdev->partition = ioread8(part_id);
1615 stdev->partition_count = ioread8(&stdev->mmio_ntb->partition_count);
1616 stdev->mmio_part_cfg_all = stdev->mmio + SWITCHTEC_GAS_PART_CFG_OFFSET;
1617 stdev->mmio_part_cfg = &stdev->mmio_part_cfg_all[stdev->partition];
1618 stdev->mmio_pff_csr = stdev->mmio + SWITCHTEC_GAS_PFF_CSR_OFFSET;
1620 if (stdev->partition_count < 1)
1621 stdev->partition_count = 1;
1625 pci_set_drvdata(pdev, stdev);
1630 if (ioread32(&stdev->mmio_mrpc->dma_ver) == 0)
1633 stdev->dma_mrpc = dma_alloc_coherent(&stdev->pdev->dev,
1634 sizeof(*stdev->dma_mrpc),
1635 &stdev->dma_mrpc_dma_addr,
1637 if (stdev->dma_mrpc == NULL)
1643 static void switchtec_exit_pci(struct switchtec_dev *stdev)
1645 if (stdev->dma_mrpc) {
1646 iowrite32(0, &stdev->mmio_mrpc->dma_en);
1647 flush_wc_buf(stdev);
1648 writeq(0, &stdev->mmio_mrpc->dma_addr);
1649 dma_free_coherent(&stdev->pdev->dev, sizeof(*stdev->dma_mrpc),
1650 stdev->dma_mrpc, stdev->dma_mrpc_dma_addr);
1651 stdev->dma_mrpc = NULL;
1655 static int switchtec_pci_probe(struct pci_dev *pdev,
1656 const struct pci_device_id *id)
1658 struct switchtec_dev *stdev;
1661 if (pdev->class == (PCI_CLASS_BRIDGE_OTHER << 8))
1662 request_module_nowait("ntb_hw_switchtec");
1664 stdev = stdev_create(pdev);
1666 return PTR_ERR(stdev);
1668 stdev->gen = id->driver_data;
1670 rc = switchtec_init_pci(stdev, pdev);
1674 rc = switchtec_init_isr(stdev);
1676 dev_err(&stdev->dev, "failed to init isr.\n");
1680 iowrite32(SWITCHTEC_EVENT_CLEAR |
1681 SWITCHTEC_EVENT_EN_IRQ,
1682 &stdev->mmio_part_cfg->mrpc_comp_hdr);
1683 enable_link_state_events(stdev);
1685 if (stdev->dma_mrpc)
1686 enable_dma_mrpc(stdev);
1688 rc = cdev_device_add(&stdev->cdev, &stdev->dev);
1692 dev_info(&stdev->dev, "Management device registered.\n");
1699 switchtec_exit_pci(stdev);
1701 ida_free(&switchtec_minor_ida, MINOR(stdev->dev.devt));
1702 put_device(&stdev->dev);
1706 static void switchtec_pci_remove(struct pci_dev *pdev)
1708 struct switchtec_dev *stdev = pci_get_drvdata(pdev);
1710 pci_set_drvdata(pdev, NULL);
1712 cdev_device_del(&stdev->cdev, &stdev->dev);
1713 ida_free(&switchtec_minor_ida, MINOR(stdev->dev.devt));
1714 dev_info(&stdev->dev, "unregistered.\n");
1716 switchtec_exit_pci(stdev);
1717 pci_dev_put(stdev->pdev);
1719 put_device(&stdev->dev);
1722 #define SWITCHTEC_PCI_DEVICE(device_id, gen) \
1724 .vendor = PCI_VENDOR_ID_MICROSEMI, \
1725 .device = device_id, \
1726 .subvendor = PCI_ANY_ID, \
1727 .subdevice = PCI_ANY_ID, \
1728 .class = (PCI_CLASS_MEMORY_OTHER << 8), \
1729 .class_mask = 0xFFFFFFFF, \
1730 .driver_data = gen, \
1733 .vendor = PCI_VENDOR_ID_MICROSEMI, \
1734 .device = device_id, \
1735 .subvendor = PCI_ANY_ID, \
1736 .subdevice = PCI_ANY_ID, \
1737 .class = (PCI_CLASS_BRIDGE_OTHER << 8), \
1738 .class_mask = 0xFFFFFFFF, \
1739 .driver_data = gen, \
1742 static const struct pci_device_id switchtec_pci_tbl[] = {
1743 SWITCHTEC_PCI_DEVICE(0x8531, SWITCHTEC_GEN3), //PFX 24xG3
1744 SWITCHTEC_PCI_DEVICE(0x8532, SWITCHTEC_GEN3), //PFX 32xG3
1745 SWITCHTEC_PCI_DEVICE(0x8533, SWITCHTEC_GEN3), //PFX 48xG3
1746 SWITCHTEC_PCI_DEVICE(0x8534, SWITCHTEC_GEN3), //PFX 64xG3
1747 SWITCHTEC_PCI_DEVICE(0x8535, SWITCHTEC_GEN3), //PFX 80xG3
1748 SWITCHTEC_PCI_DEVICE(0x8536, SWITCHTEC_GEN3), //PFX 96xG3
1749 SWITCHTEC_PCI_DEVICE(0x8541, SWITCHTEC_GEN3), //PSX 24xG3
1750 SWITCHTEC_PCI_DEVICE(0x8542, SWITCHTEC_GEN3), //PSX 32xG3
1751 SWITCHTEC_PCI_DEVICE(0x8543, SWITCHTEC_GEN3), //PSX 48xG3
1752 SWITCHTEC_PCI_DEVICE(0x8544, SWITCHTEC_GEN3), //PSX 64xG3
1753 SWITCHTEC_PCI_DEVICE(0x8545, SWITCHTEC_GEN3), //PSX 80xG3
1754 SWITCHTEC_PCI_DEVICE(0x8546, SWITCHTEC_GEN3), //PSX 96xG3
1755 SWITCHTEC_PCI_DEVICE(0x8551, SWITCHTEC_GEN3), //PAX 24XG3
1756 SWITCHTEC_PCI_DEVICE(0x8552, SWITCHTEC_GEN3), //PAX 32XG3
1757 SWITCHTEC_PCI_DEVICE(0x8553, SWITCHTEC_GEN3), //PAX 48XG3
1758 SWITCHTEC_PCI_DEVICE(0x8554, SWITCHTEC_GEN3), //PAX 64XG3
1759 SWITCHTEC_PCI_DEVICE(0x8555, SWITCHTEC_GEN3), //PAX 80XG3
1760 SWITCHTEC_PCI_DEVICE(0x8556, SWITCHTEC_GEN3), //PAX 96XG3
1761 SWITCHTEC_PCI_DEVICE(0x8561, SWITCHTEC_GEN3), //PFXL 24XG3
1762 SWITCHTEC_PCI_DEVICE(0x8562, SWITCHTEC_GEN3), //PFXL 32XG3
1763 SWITCHTEC_PCI_DEVICE(0x8563, SWITCHTEC_GEN3), //PFXL 48XG3
1764 SWITCHTEC_PCI_DEVICE(0x8564, SWITCHTEC_GEN3), //PFXL 64XG3
1765 SWITCHTEC_PCI_DEVICE(0x8565, SWITCHTEC_GEN3), //PFXL 80XG3
1766 SWITCHTEC_PCI_DEVICE(0x8566, SWITCHTEC_GEN3), //PFXL 96XG3
1767 SWITCHTEC_PCI_DEVICE(0x8571, SWITCHTEC_GEN3), //PFXI 24XG3
1768 SWITCHTEC_PCI_DEVICE(0x8572, SWITCHTEC_GEN3), //PFXI 32XG3
1769 SWITCHTEC_PCI_DEVICE(0x8573, SWITCHTEC_GEN3), //PFXI 48XG3
1770 SWITCHTEC_PCI_DEVICE(0x8574, SWITCHTEC_GEN3), //PFXI 64XG3
1771 SWITCHTEC_PCI_DEVICE(0x8575, SWITCHTEC_GEN3), //PFXI 80XG3
1772 SWITCHTEC_PCI_DEVICE(0x8576, SWITCHTEC_GEN3), //PFXI 96XG3
1773 SWITCHTEC_PCI_DEVICE(0x4000, SWITCHTEC_GEN4), //PFX 100XG4
1774 SWITCHTEC_PCI_DEVICE(0x4084, SWITCHTEC_GEN4), //PFX 84XG4
1775 SWITCHTEC_PCI_DEVICE(0x4068, SWITCHTEC_GEN4), //PFX 68XG4
1776 SWITCHTEC_PCI_DEVICE(0x4052, SWITCHTEC_GEN4), //PFX 52XG4
1777 SWITCHTEC_PCI_DEVICE(0x4036, SWITCHTEC_GEN4), //PFX 36XG4
1778 SWITCHTEC_PCI_DEVICE(0x4028, SWITCHTEC_GEN4), //PFX 28XG4
1779 SWITCHTEC_PCI_DEVICE(0x4100, SWITCHTEC_GEN4), //PSX 100XG4
1780 SWITCHTEC_PCI_DEVICE(0x4184, SWITCHTEC_GEN4), //PSX 84XG4
1781 SWITCHTEC_PCI_DEVICE(0x4168, SWITCHTEC_GEN4), //PSX 68XG4
1782 SWITCHTEC_PCI_DEVICE(0x4152, SWITCHTEC_GEN4), //PSX 52XG4
1783 SWITCHTEC_PCI_DEVICE(0x4136, SWITCHTEC_GEN4), //PSX 36XG4
1784 SWITCHTEC_PCI_DEVICE(0x4128, SWITCHTEC_GEN4), //PSX 28XG4
1785 SWITCHTEC_PCI_DEVICE(0x4200, SWITCHTEC_GEN4), //PAX 100XG4
1786 SWITCHTEC_PCI_DEVICE(0x4284, SWITCHTEC_GEN4), //PAX 84XG4
1787 SWITCHTEC_PCI_DEVICE(0x4268, SWITCHTEC_GEN4), //PAX 68XG4
1788 SWITCHTEC_PCI_DEVICE(0x4252, SWITCHTEC_GEN4), //PAX 52XG4
1789 SWITCHTEC_PCI_DEVICE(0x4236, SWITCHTEC_GEN4), //PAX 36XG4
1790 SWITCHTEC_PCI_DEVICE(0x4228, SWITCHTEC_GEN4), //PAX 28XG4
1791 SWITCHTEC_PCI_DEVICE(0x4352, SWITCHTEC_GEN4), //PFXA 52XG4
1792 SWITCHTEC_PCI_DEVICE(0x4336, SWITCHTEC_GEN4), //PFXA 36XG4
1793 SWITCHTEC_PCI_DEVICE(0x4328, SWITCHTEC_GEN4), //PFXA 28XG4
1794 SWITCHTEC_PCI_DEVICE(0x4452, SWITCHTEC_GEN4), //PSXA 52XG4
1795 SWITCHTEC_PCI_DEVICE(0x4436, SWITCHTEC_GEN4), //PSXA 36XG4
1796 SWITCHTEC_PCI_DEVICE(0x4428, SWITCHTEC_GEN4), //PSXA 28XG4
1797 SWITCHTEC_PCI_DEVICE(0x4552, SWITCHTEC_GEN4), //PAXA 52XG4
1798 SWITCHTEC_PCI_DEVICE(0x4536, SWITCHTEC_GEN4), //PAXA 36XG4
1799 SWITCHTEC_PCI_DEVICE(0x4528, SWITCHTEC_GEN4), //PAXA 28XG4
1802 MODULE_DEVICE_TABLE(pci, switchtec_pci_tbl);
1804 static struct pci_driver switchtec_pci_driver = {
1805 .name = KBUILD_MODNAME,
1806 .id_table = switchtec_pci_tbl,
1807 .probe = switchtec_pci_probe,
1808 .remove = switchtec_pci_remove,
1811 static int __init switchtec_init(void)
1815 rc = alloc_chrdev_region(&switchtec_devt, 0, max_devices,
1820 switchtec_class = class_create(THIS_MODULE, "switchtec");
1821 if (IS_ERR(switchtec_class)) {
1822 rc = PTR_ERR(switchtec_class);
1823 goto err_create_class;
1826 rc = pci_register_driver(&switchtec_pci_driver);
1828 goto err_pci_register;
1830 pr_info(KBUILD_MODNAME ": loaded.\n");
1835 class_destroy(switchtec_class);
1838 unregister_chrdev_region(switchtec_devt, max_devices);
1842 module_init(switchtec_init);
1844 static void __exit switchtec_exit(void)
1846 pci_unregister_driver(&switchtec_pci_driver);
1847 class_destroy(switchtec_class);
1848 unregister_chrdev_region(switchtec_devt, max_devices);
1849 ida_destroy(&switchtec_minor_ida);
1851 pr_info(KBUILD_MODNAME ": unloaded.\n");
1853 module_exit(switchtec_exit);