2 * Microsemi Switchtec(tm) PCIe Management Driver
3 * Copyright (c) 2017, Microsemi Corporation
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation.
9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
16 #include <linux/switchtec_ioctl.h>
18 #include <linux/interrupt.h>
19 #include <linux/module.h>
21 #include <linux/uaccess.h>
22 #include <linux/poll.h>
23 #include <linux/pci.h>
24 #include <linux/cdev.h>
25 #include <linux/wait.h>
26 #include <linux/io-64-nonatomic-lo-hi.h>
27 #include <linux/nospec.h>
29 MODULE_DESCRIPTION("Microsemi Switchtec(tm) PCIe Management Driver");
30 MODULE_VERSION("0.1");
31 MODULE_LICENSE("GPL");
32 MODULE_AUTHOR("Microsemi Corporation");
34 static int max_devices = 16;
35 module_param(max_devices, int, 0644);
36 MODULE_PARM_DESC(max_devices, "max number of switchtec device instances");
38 static dev_t switchtec_devt;
39 static struct class *switchtec_class;
40 static DEFINE_IDA(switchtec_minor_ida);
42 #define MICROSEMI_VENDOR_ID 0x11f8
43 #define MICROSEMI_NTB_CLASSCODE 0x068000
44 #define MICROSEMI_MGMT_CLASSCODE 0x058000
46 #define SWITCHTEC_MRPC_PAYLOAD_SIZE 1024
47 #define SWITCHTEC_MAX_PFF_CSR 48
49 #define SWITCHTEC_EVENT_OCCURRED BIT(0)
50 #define SWITCHTEC_EVENT_CLEAR BIT(0)
51 #define SWITCHTEC_EVENT_EN_LOG BIT(1)
52 #define SWITCHTEC_EVENT_EN_CLI BIT(2)
53 #define SWITCHTEC_EVENT_EN_IRQ BIT(3)
54 #define SWITCHTEC_EVENT_FATAL BIT(4)
57 SWITCHTEC_GAS_MRPC_OFFSET = 0x0000,
58 SWITCHTEC_GAS_TOP_CFG_OFFSET = 0x1000,
59 SWITCHTEC_GAS_SW_EVENT_OFFSET = 0x1800,
60 SWITCHTEC_GAS_SYS_INFO_OFFSET = 0x2000,
61 SWITCHTEC_GAS_FLASH_INFO_OFFSET = 0x2200,
62 SWITCHTEC_GAS_PART_CFG_OFFSET = 0x4000,
63 SWITCHTEC_GAS_NTB_OFFSET = 0x10000,
64 SWITCHTEC_GAS_PFF_CSR_OFFSET = 0x134000,
68 u8 input_data[SWITCHTEC_MRPC_PAYLOAD_SIZE];
69 u8 output_data[SWITCHTEC_MRPC_PAYLOAD_SIZE];
76 SWITCHTEC_MRPC_STATUS_INPROGRESS = 1,
77 SWITCHTEC_MRPC_STATUS_DONE = 2,
78 SWITCHTEC_MRPC_STATUS_ERROR = 0xFF,
79 SWITCHTEC_MRPC_STATUS_INTERRUPTED = 0x100,
82 struct sw_event_regs {
83 u64 event_report_ctrl;
85 u64 part_event_bitmap;
89 u32 stack_error_event_hdr;
90 u32 stack_error_event_data;
92 u32 ppu_error_event_hdr;
93 u32 ppu_error_event_data;
95 u32 isp_error_event_hdr;
96 u32 isp_error_event_data;
98 u32 sys_reset_event_hdr;
100 u32 fw_exception_hdr;
104 u32 fw_non_fatal_hdr;
108 u32 twi_mrpc_comp_hdr;
109 u32 twi_mrpc_comp_data;
111 u32 twi_mrpc_comp_async_hdr;
112 u32 twi_mrpc_comp_async_data;
114 u32 cli_mrpc_comp_hdr;
115 u32 cli_mrpc_comp_data;
117 u32 cli_mrpc_comp_async_hdr;
118 u32 cli_mrpc_comp_async_data;
120 u32 gpio_interrupt_hdr;
121 u32 gpio_interrupt_data;
126 SWITCHTEC_CFG0_RUNNING = 0x04,
127 SWITCHTEC_CFG1_RUNNING = 0x05,
128 SWITCHTEC_IMG0_RUNNING = 0x03,
129 SWITCHTEC_IMG1_RUNNING = 0x07,
132 struct sys_info_regs {
135 u32 firmware_version;
137 u32 vendor_table_revision;
138 u32 table_format_version;
140 u32 cfg_file_fmt_version;
146 char product_revision[4];
147 char component_vendor[8];
149 u8 component_revision;
152 struct flash_info_regs {
153 u32 flash_part_map_upd_idx;
155 struct active_partition_info {
161 struct active_partition_info active_cfg;
162 struct active_partition_info inactive_img;
163 struct active_partition_info inactive_cfg;
167 struct partition_info {
172 struct partition_info cfg1;
173 struct partition_info img0;
174 struct partition_info img1;
175 struct partition_info nvlog;
176 struct partition_info vendor[8];
179 struct ntb_info_regs {
187 struct part_cfg_regs {
194 u32 dsp_pff_inst_id[47];
196 u16 vep_vector_number;
197 u16 usp_vector_number;
198 u32 port_event_bitmap;
200 u32 part_event_summary;
203 u32 part_reset_data[5];
205 u32 mrpc_comp_data[5];
206 u32 mrpc_comp_async_hdr;
207 u32 mrpc_comp_async_data[5];
209 u32 dyn_binding_data[5];
214 SWITCHTEC_PART_CFG_EVENT_RESET = 1 << 0,
215 SWITCHTEC_PART_CFG_EVENT_MRPC_CMP = 1 << 1,
216 SWITCHTEC_PART_CFG_EVENT_MRPC_ASYNC_CMP = 1 << 2,
217 SWITCHTEC_PART_CFG_EVENT_DYN_PART_CMP = 1 << 3,
220 struct pff_csr_regs {
223 u32 pci_cfg_header[15];
224 u32 pci_cap_region[48];
225 u32 pcie_cap_region[448];
226 u32 indirect_gas_window[128];
227 u32 indirect_gas_window_off;
229 u32 pff_event_summary;
232 u32 aer_in_p2p_data[5];
234 u32 aer_in_vep_data[5];
245 u32 threshold_data[5];
247 u32 power_mgmt_data[5];
248 u32 tlp_throttling_hdr;
249 u32 tlp_throttling_data[5];
251 u32 force_speed_data[5];
252 u32 credit_timeout_hdr;
253 u32 credit_timeout_data[5];
255 u32 link_state_data[5];
259 struct switchtec_dev {
260 struct pci_dev *pdev;
267 char pff_local[SWITCHTEC_MAX_PFF_CSR];
270 struct mrpc_regs __iomem *mmio_mrpc;
271 struct sw_event_regs __iomem *mmio_sw_event;
272 struct sys_info_regs __iomem *mmio_sys_info;
273 struct flash_info_regs __iomem *mmio_flash_info;
274 struct ntb_info_regs __iomem *mmio_ntb;
275 struct part_cfg_regs __iomem *mmio_part_cfg;
276 struct part_cfg_regs __iomem *mmio_part_cfg_all;
277 struct pff_csr_regs __iomem *mmio_pff_csr;
280 * The mrpc mutex must be held when accessing the other
281 * mrpc_ fields, alive flag and stuser->state field
283 struct mutex mrpc_mutex;
284 struct list_head mrpc_queue;
286 struct work_struct mrpc_work;
287 struct delayed_work mrpc_timeout;
290 wait_queue_head_t event_wq;
294 static struct switchtec_dev *to_stdev(struct device *dev)
296 return container_of(dev, struct switchtec_dev, dev);
306 struct switchtec_user {
307 struct switchtec_dev *stdev;
309 enum mrpc_state state;
311 struct completion comp;
313 struct list_head list;
320 unsigned char data[SWITCHTEC_MRPC_PAYLOAD_SIZE];
324 static struct switchtec_user *stuser_create(struct switchtec_dev *stdev)
326 struct switchtec_user *stuser;
328 stuser = kzalloc(sizeof(*stuser), GFP_KERNEL);
330 return ERR_PTR(-ENOMEM);
332 get_device(&stdev->dev);
333 stuser->stdev = stdev;
334 kref_init(&stuser->kref);
335 INIT_LIST_HEAD(&stuser->list);
336 init_completion(&stuser->comp);
337 stuser->event_cnt = atomic_read(&stdev->event_cnt);
339 dev_dbg(&stdev->dev, "%s: %p\n", __func__, stuser);
344 static void stuser_free(struct kref *kref)
346 struct switchtec_user *stuser;
348 stuser = container_of(kref, struct switchtec_user, kref);
350 dev_dbg(&stuser->stdev->dev, "%s: %p\n", __func__, stuser);
352 put_device(&stuser->stdev->dev);
356 static void stuser_put(struct switchtec_user *stuser)
358 kref_put(&stuser->kref, stuser_free);
361 static void stuser_set_state(struct switchtec_user *stuser,
362 enum mrpc_state state)
364 /* requires the mrpc_mutex to already be held when called */
366 const char * const state_names[] = {
367 [MRPC_IDLE] = "IDLE",
368 [MRPC_QUEUED] = "QUEUED",
369 [MRPC_RUNNING] = "RUNNING",
370 [MRPC_DONE] = "DONE",
373 stuser->state = state;
375 dev_dbg(&stuser->stdev->dev, "stuser state %p -> %s",
376 stuser, state_names[state]);
379 static void mrpc_complete_cmd(struct switchtec_dev *stdev);
381 static void mrpc_cmd_submit(struct switchtec_dev *stdev)
383 /* requires the mrpc_mutex to already be held when called */
385 struct switchtec_user *stuser;
387 if (stdev->mrpc_busy)
390 if (list_empty(&stdev->mrpc_queue))
393 stuser = list_entry(stdev->mrpc_queue.next, struct switchtec_user,
396 stuser_set_state(stuser, MRPC_RUNNING);
397 stdev->mrpc_busy = 1;
398 memcpy_toio(&stdev->mmio_mrpc->input_data,
399 stuser->data, stuser->data_len);
400 iowrite32(stuser->cmd, &stdev->mmio_mrpc->cmd);
402 schedule_delayed_work(&stdev->mrpc_timeout,
403 msecs_to_jiffies(500));
406 static int mrpc_queue_cmd(struct switchtec_user *stuser)
408 /* requires the mrpc_mutex to already be held when called */
410 struct switchtec_dev *stdev = stuser->stdev;
412 kref_get(&stuser->kref);
413 stuser->read_len = sizeof(stuser->data);
414 stuser_set_state(stuser, MRPC_QUEUED);
415 reinit_completion(&stuser->comp);
416 list_add_tail(&stuser->list, &stdev->mrpc_queue);
418 mrpc_cmd_submit(stdev);
423 static void mrpc_complete_cmd(struct switchtec_dev *stdev)
425 /* requires the mrpc_mutex to already be held when called */
426 struct switchtec_user *stuser;
428 if (list_empty(&stdev->mrpc_queue))
431 stuser = list_entry(stdev->mrpc_queue.next, struct switchtec_user,
434 stuser->status = ioread32(&stdev->mmio_mrpc->status);
435 if (stuser->status == SWITCHTEC_MRPC_STATUS_INPROGRESS)
438 stuser_set_state(stuser, MRPC_DONE);
439 stuser->return_code = 0;
441 if (stuser->status != SWITCHTEC_MRPC_STATUS_DONE)
444 stuser->return_code = ioread32(&stdev->mmio_mrpc->ret_value);
445 if (stuser->return_code != 0)
448 memcpy_fromio(stuser->data, &stdev->mmio_mrpc->output_data,
452 complete_all(&stuser->comp);
453 list_del_init(&stuser->list);
455 stdev->mrpc_busy = 0;
457 mrpc_cmd_submit(stdev);
460 static void mrpc_event_work(struct work_struct *work)
462 struct switchtec_dev *stdev;
464 stdev = container_of(work, struct switchtec_dev, mrpc_work);
466 dev_dbg(&stdev->dev, "%s\n", __func__);
468 mutex_lock(&stdev->mrpc_mutex);
469 cancel_delayed_work(&stdev->mrpc_timeout);
470 mrpc_complete_cmd(stdev);
471 mutex_unlock(&stdev->mrpc_mutex);
474 static void mrpc_timeout_work(struct work_struct *work)
476 struct switchtec_dev *stdev;
479 stdev = container_of(work, struct switchtec_dev, mrpc_timeout.work);
481 dev_dbg(&stdev->dev, "%s\n", __func__);
483 mutex_lock(&stdev->mrpc_mutex);
485 status = ioread32(&stdev->mmio_mrpc->status);
486 if (status == SWITCHTEC_MRPC_STATUS_INPROGRESS) {
487 schedule_delayed_work(&stdev->mrpc_timeout,
488 msecs_to_jiffies(500));
492 mrpc_complete_cmd(stdev);
495 mutex_unlock(&stdev->mrpc_mutex);
498 static ssize_t device_version_show(struct device *dev,
499 struct device_attribute *attr, char *buf)
501 struct switchtec_dev *stdev = to_stdev(dev);
504 ver = ioread32(&stdev->mmio_sys_info->device_version);
506 return sprintf(buf, "%x\n", ver);
508 static DEVICE_ATTR_RO(device_version);
510 static ssize_t fw_version_show(struct device *dev,
511 struct device_attribute *attr, char *buf)
513 struct switchtec_dev *stdev = to_stdev(dev);
516 ver = ioread32(&stdev->mmio_sys_info->firmware_version);
518 return sprintf(buf, "%08x\n", ver);
520 static DEVICE_ATTR_RO(fw_version);
522 static ssize_t io_string_show(char *buf, void __iomem *attr, size_t len)
526 memcpy_fromio(buf, attr, len);
530 for (i = len - 1; i > 0; i--) {
540 #define DEVICE_ATTR_SYS_INFO_STR(field) \
541 static ssize_t field ## _show(struct device *dev, \
542 struct device_attribute *attr, char *buf) \
544 struct switchtec_dev *stdev = to_stdev(dev); \
545 return io_string_show(buf, &stdev->mmio_sys_info->field, \
546 sizeof(stdev->mmio_sys_info->field)); \
549 static DEVICE_ATTR_RO(field)
551 DEVICE_ATTR_SYS_INFO_STR(vendor_id);
552 DEVICE_ATTR_SYS_INFO_STR(product_id);
553 DEVICE_ATTR_SYS_INFO_STR(product_revision);
554 DEVICE_ATTR_SYS_INFO_STR(component_vendor);
556 static ssize_t component_id_show(struct device *dev,
557 struct device_attribute *attr, char *buf)
559 struct switchtec_dev *stdev = to_stdev(dev);
560 int id = ioread16(&stdev->mmio_sys_info->component_id);
562 return sprintf(buf, "PM%04X\n", id);
564 static DEVICE_ATTR_RO(component_id);
566 static ssize_t component_revision_show(struct device *dev,
567 struct device_attribute *attr, char *buf)
569 struct switchtec_dev *stdev = to_stdev(dev);
570 int rev = ioread8(&stdev->mmio_sys_info->component_revision);
572 return sprintf(buf, "%d\n", rev);
574 static DEVICE_ATTR_RO(component_revision);
576 static ssize_t partition_show(struct device *dev,
577 struct device_attribute *attr, char *buf)
579 struct switchtec_dev *stdev = to_stdev(dev);
581 return sprintf(buf, "%d\n", stdev->partition);
583 static DEVICE_ATTR_RO(partition);
585 static ssize_t partition_count_show(struct device *dev,
586 struct device_attribute *attr, char *buf)
588 struct switchtec_dev *stdev = to_stdev(dev);
590 return sprintf(buf, "%d\n", stdev->partition_count);
592 static DEVICE_ATTR_RO(partition_count);
594 static struct attribute *switchtec_device_attrs[] = {
595 &dev_attr_device_version.attr,
596 &dev_attr_fw_version.attr,
597 &dev_attr_vendor_id.attr,
598 &dev_attr_product_id.attr,
599 &dev_attr_product_revision.attr,
600 &dev_attr_component_vendor.attr,
601 &dev_attr_component_id.attr,
602 &dev_attr_component_revision.attr,
603 &dev_attr_partition.attr,
604 &dev_attr_partition_count.attr,
608 ATTRIBUTE_GROUPS(switchtec_device);
610 static int switchtec_dev_open(struct inode *inode, struct file *filp)
612 struct switchtec_dev *stdev;
613 struct switchtec_user *stuser;
615 stdev = container_of(inode->i_cdev, struct switchtec_dev, cdev);
617 stuser = stuser_create(stdev);
619 return PTR_ERR(stuser);
621 filp->private_data = stuser;
622 nonseekable_open(inode, filp);
624 dev_dbg(&stdev->dev, "%s: %p\n", __func__, stuser);
629 static int switchtec_dev_release(struct inode *inode, struct file *filp)
631 struct switchtec_user *stuser = filp->private_data;
638 static int lock_mutex_and_test_alive(struct switchtec_dev *stdev)
640 if (mutex_lock_interruptible(&stdev->mrpc_mutex))
644 mutex_unlock(&stdev->mrpc_mutex);
651 static ssize_t switchtec_dev_write(struct file *filp, const char __user *data,
652 size_t size, loff_t *off)
654 struct switchtec_user *stuser = filp->private_data;
655 struct switchtec_dev *stdev = stuser->stdev;
658 if (size < sizeof(stuser->cmd) ||
659 size > sizeof(stuser->cmd) + sizeof(stuser->data))
662 stuser->data_len = size - sizeof(stuser->cmd);
664 rc = lock_mutex_and_test_alive(stdev);
668 if (stuser->state != MRPC_IDLE) {
673 rc = copy_from_user(&stuser->cmd, data, sizeof(stuser->cmd));
679 data += sizeof(stuser->cmd);
680 rc = copy_from_user(&stuser->data, data, size - sizeof(stuser->cmd));
686 rc = mrpc_queue_cmd(stuser);
689 mutex_unlock(&stdev->mrpc_mutex);
697 static ssize_t switchtec_dev_read(struct file *filp, char __user *data,
698 size_t size, loff_t *off)
700 struct switchtec_user *stuser = filp->private_data;
701 struct switchtec_dev *stdev = stuser->stdev;
704 if (size < sizeof(stuser->cmd) ||
705 size > sizeof(stuser->cmd) + sizeof(stuser->data))
708 rc = lock_mutex_and_test_alive(stdev);
712 if (stuser->state == MRPC_IDLE) {
713 mutex_unlock(&stdev->mrpc_mutex);
717 stuser->read_len = size - sizeof(stuser->return_code);
719 mutex_unlock(&stdev->mrpc_mutex);
721 if (filp->f_flags & O_NONBLOCK) {
722 if (!try_wait_for_completion(&stuser->comp))
725 rc = wait_for_completion_interruptible(&stuser->comp);
730 rc = lock_mutex_and_test_alive(stdev);
734 if (stuser->state != MRPC_DONE) {
735 mutex_unlock(&stdev->mrpc_mutex);
739 rc = copy_to_user(data, &stuser->return_code,
740 sizeof(stuser->return_code));
746 data += sizeof(stuser->return_code);
747 rc = copy_to_user(data, &stuser->data,
748 size - sizeof(stuser->return_code));
754 stuser_set_state(stuser, MRPC_IDLE);
757 mutex_unlock(&stdev->mrpc_mutex);
759 if (stuser->status == SWITCHTEC_MRPC_STATUS_DONE)
761 else if (stuser->status == SWITCHTEC_MRPC_STATUS_INTERRUPTED)
767 static unsigned int switchtec_dev_poll(struct file *filp, poll_table *wait)
769 struct switchtec_user *stuser = filp->private_data;
770 struct switchtec_dev *stdev = stuser->stdev;
773 poll_wait(filp, &stuser->comp.wait, wait);
774 poll_wait(filp, &stdev->event_wq, wait);
776 if (lock_mutex_and_test_alive(stdev))
777 return POLLIN | POLLRDHUP | POLLOUT | POLLERR | POLLHUP;
779 mutex_unlock(&stdev->mrpc_mutex);
781 if (try_wait_for_completion(&stuser->comp))
782 ret |= POLLIN | POLLRDNORM;
784 if (stuser->event_cnt != atomic_read(&stdev->event_cnt))
785 ret |= POLLPRI | POLLRDBAND;
790 static int ioctl_flash_info(struct switchtec_dev *stdev,
791 struct switchtec_ioctl_flash_info __user *uinfo)
793 struct switchtec_ioctl_flash_info info = {0};
794 struct flash_info_regs __iomem *fi = stdev->mmio_flash_info;
796 info.flash_length = ioread32(&fi->flash_length);
797 info.num_partitions = SWITCHTEC_IOCTL_NUM_PARTITIONS;
799 if (copy_to_user(uinfo, &info, sizeof(info)))
805 static void set_fw_info_part(struct switchtec_ioctl_flash_part_info *info,
806 struct partition_info __iomem *pi)
808 info->address = ioread32(&pi->address);
809 info->length = ioread32(&pi->length);
812 static int ioctl_flash_part_info(struct switchtec_dev *stdev,
813 struct switchtec_ioctl_flash_part_info __user *uinfo)
815 struct switchtec_ioctl_flash_part_info info = {0};
816 struct flash_info_regs __iomem *fi = stdev->mmio_flash_info;
817 struct sys_info_regs __iomem *si = stdev->mmio_sys_info;
818 u32 active_addr = -1;
820 if (copy_from_user(&info, uinfo, sizeof(info)))
823 switch (info.flash_partition) {
824 case SWITCHTEC_IOCTL_PART_CFG0:
825 active_addr = ioread32(&fi->active_cfg);
826 set_fw_info_part(&info, &fi->cfg0);
827 if (ioread16(&si->cfg_running) == SWITCHTEC_CFG0_RUNNING)
828 info.active |= SWITCHTEC_IOCTL_PART_RUNNING;
830 case SWITCHTEC_IOCTL_PART_CFG1:
831 active_addr = ioread32(&fi->active_cfg);
832 set_fw_info_part(&info, &fi->cfg1);
833 if (ioread16(&si->cfg_running) == SWITCHTEC_CFG1_RUNNING)
834 info.active |= SWITCHTEC_IOCTL_PART_RUNNING;
836 case SWITCHTEC_IOCTL_PART_IMG0:
837 active_addr = ioread32(&fi->active_img);
838 set_fw_info_part(&info, &fi->img0);
839 if (ioread16(&si->img_running) == SWITCHTEC_IMG0_RUNNING)
840 info.active |= SWITCHTEC_IOCTL_PART_RUNNING;
842 case SWITCHTEC_IOCTL_PART_IMG1:
843 active_addr = ioread32(&fi->active_img);
844 set_fw_info_part(&info, &fi->img1);
845 if (ioread16(&si->img_running) == SWITCHTEC_IMG1_RUNNING)
846 info.active |= SWITCHTEC_IOCTL_PART_RUNNING;
848 case SWITCHTEC_IOCTL_PART_NVLOG:
849 set_fw_info_part(&info, &fi->nvlog);
851 case SWITCHTEC_IOCTL_PART_VENDOR0:
852 set_fw_info_part(&info, &fi->vendor[0]);
854 case SWITCHTEC_IOCTL_PART_VENDOR1:
855 set_fw_info_part(&info, &fi->vendor[1]);
857 case SWITCHTEC_IOCTL_PART_VENDOR2:
858 set_fw_info_part(&info, &fi->vendor[2]);
860 case SWITCHTEC_IOCTL_PART_VENDOR3:
861 set_fw_info_part(&info, &fi->vendor[3]);
863 case SWITCHTEC_IOCTL_PART_VENDOR4:
864 set_fw_info_part(&info, &fi->vendor[4]);
866 case SWITCHTEC_IOCTL_PART_VENDOR5:
867 set_fw_info_part(&info, &fi->vendor[5]);
869 case SWITCHTEC_IOCTL_PART_VENDOR6:
870 set_fw_info_part(&info, &fi->vendor[6]);
872 case SWITCHTEC_IOCTL_PART_VENDOR7:
873 set_fw_info_part(&info, &fi->vendor[7]);
879 if (info.address == active_addr)
880 info.active |= SWITCHTEC_IOCTL_PART_ACTIVE;
882 if (copy_to_user(uinfo, &info, sizeof(info)))
888 static int ioctl_event_summary(struct switchtec_dev *stdev,
889 struct switchtec_user *stuser,
890 struct switchtec_ioctl_event_summary __user *usum)
892 struct switchtec_ioctl_event_summary s = {0};
896 s.global = ioread32(&stdev->mmio_sw_event->global_summary);
897 s.part_bitmap = readq(&stdev->mmio_sw_event->part_event_bitmap);
898 s.local_part = ioread32(&stdev->mmio_part_cfg->part_event_summary);
900 for (i = 0; i < stdev->partition_count; i++) {
901 reg = ioread32(&stdev->mmio_part_cfg_all[i].part_event_summary);
905 for (i = 0; i < SWITCHTEC_MAX_PFF_CSR; i++) {
906 reg = ioread16(&stdev->mmio_pff_csr[i].vendor_id);
907 if (reg != MICROSEMI_VENDOR_ID)
910 reg = ioread32(&stdev->mmio_pff_csr[i].pff_event_summary);
914 if (copy_to_user(usum, &s, sizeof(s)))
917 stuser->event_cnt = atomic_read(&stdev->event_cnt);
922 static u32 __iomem *global_ev_reg(struct switchtec_dev *stdev,
923 size_t offset, int index)
925 return (void __iomem *)stdev->mmio_sw_event + offset;
928 static u32 __iomem *part_ev_reg(struct switchtec_dev *stdev,
929 size_t offset, int index)
931 return (void __iomem *)&stdev->mmio_part_cfg_all[index] + offset;
934 static u32 __iomem *pff_ev_reg(struct switchtec_dev *stdev,
935 size_t offset, int index)
937 return (void __iomem *)&stdev->mmio_pff_csr[index] + offset;
940 #define EV_GLB(i, r)[i] = {offsetof(struct sw_event_regs, r), global_ev_reg}
941 #define EV_PAR(i, r)[i] = {offsetof(struct part_cfg_regs, r), part_ev_reg}
942 #define EV_PFF(i, r)[i] = {offsetof(struct pff_csr_regs, r), pff_ev_reg}
944 const struct event_reg {
946 u32 __iomem *(*map_reg)(struct switchtec_dev *stdev,
947 size_t offset, int index);
949 EV_GLB(SWITCHTEC_IOCTL_EVENT_STACK_ERROR, stack_error_event_hdr),
950 EV_GLB(SWITCHTEC_IOCTL_EVENT_PPU_ERROR, ppu_error_event_hdr),
951 EV_GLB(SWITCHTEC_IOCTL_EVENT_ISP_ERROR, isp_error_event_hdr),
952 EV_GLB(SWITCHTEC_IOCTL_EVENT_SYS_RESET, sys_reset_event_hdr),
953 EV_GLB(SWITCHTEC_IOCTL_EVENT_FW_EXC, fw_exception_hdr),
954 EV_GLB(SWITCHTEC_IOCTL_EVENT_FW_NMI, fw_nmi_hdr),
955 EV_GLB(SWITCHTEC_IOCTL_EVENT_FW_NON_FATAL, fw_non_fatal_hdr),
956 EV_GLB(SWITCHTEC_IOCTL_EVENT_FW_FATAL, fw_fatal_hdr),
957 EV_GLB(SWITCHTEC_IOCTL_EVENT_TWI_MRPC_COMP, twi_mrpc_comp_hdr),
958 EV_GLB(SWITCHTEC_IOCTL_EVENT_TWI_MRPC_COMP_ASYNC,
959 twi_mrpc_comp_async_hdr),
960 EV_GLB(SWITCHTEC_IOCTL_EVENT_CLI_MRPC_COMP, cli_mrpc_comp_hdr),
961 EV_GLB(SWITCHTEC_IOCTL_EVENT_CLI_MRPC_COMP_ASYNC,
962 cli_mrpc_comp_async_hdr),
963 EV_GLB(SWITCHTEC_IOCTL_EVENT_GPIO_INT, gpio_interrupt_hdr),
964 EV_PAR(SWITCHTEC_IOCTL_EVENT_PART_RESET, part_reset_hdr),
965 EV_PAR(SWITCHTEC_IOCTL_EVENT_MRPC_COMP, mrpc_comp_hdr),
966 EV_PAR(SWITCHTEC_IOCTL_EVENT_MRPC_COMP_ASYNC, mrpc_comp_async_hdr),
967 EV_PAR(SWITCHTEC_IOCTL_EVENT_DYN_PART_BIND_COMP, dyn_binding_hdr),
968 EV_PFF(SWITCHTEC_IOCTL_EVENT_AER_IN_P2P, aer_in_p2p_hdr),
969 EV_PFF(SWITCHTEC_IOCTL_EVENT_AER_IN_VEP, aer_in_vep_hdr),
970 EV_PFF(SWITCHTEC_IOCTL_EVENT_DPC, dpc_hdr),
971 EV_PFF(SWITCHTEC_IOCTL_EVENT_CTS, cts_hdr),
972 EV_PFF(SWITCHTEC_IOCTL_EVENT_HOTPLUG, hotplug_hdr),
973 EV_PFF(SWITCHTEC_IOCTL_EVENT_IER, ier_hdr),
974 EV_PFF(SWITCHTEC_IOCTL_EVENT_THRESH, threshold_hdr),
975 EV_PFF(SWITCHTEC_IOCTL_EVENT_POWER_MGMT, power_mgmt_hdr),
976 EV_PFF(SWITCHTEC_IOCTL_EVENT_TLP_THROTTLING, tlp_throttling_hdr),
977 EV_PFF(SWITCHTEC_IOCTL_EVENT_FORCE_SPEED, force_speed_hdr),
978 EV_PFF(SWITCHTEC_IOCTL_EVENT_CREDIT_TIMEOUT, credit_timeout_hdr),
979 EV_PFF(SWITCHTEC_IOCTL_EVENT_LINK_STATE, link_state_hdr),
982 static u32 __iomem *event_hdr_addr(struct switchtec_dev *stdev,
983 int event_id, int index)
987 if (event_id < 0 || event_id >= SWITCHTEC_IOCTL_MAX_EVENTS)
988 return ERR_PTR(-EINVAL);
990 off = event_regs[event_id].offset;
992 if (event_regs[event_id].map_reg == part_ev_reg) {
993 if (index == SWITCHTEC_IOCTL_EVENT_LOCAL_PART_IDX)
994 index = stdev->partition;
995 else if (index < 0 || index >= stdev->partition_count)
996 return ERR_PTR(-EINVAL);
997 } else if (event_regs[event_id].map_reg == pff_ev_reg) {
998 if (index < 0 || index >= stdev->pff_csr_count)
999 return ERR_PTR(-EINVAL);
1002 return event_regs[event_id].map_reg(stdev, off, index);
1005 static int event_ctl(struct switchtec_dev *stdev,
1006 struct switchtec_ioctl_event_ctl *ctl)
1012 reg = event_hdr_addr(stdev, ctl->event_id, ctl->index);
1014 return PTR_ERR(reg);
1016 hdr = ioread32(reg);
1017 for (i = 0; i < ARRAY_SIZE(ctl->data); i++)
1018 ctl->data[i] = ioread32(®[i + 1]);
1020 ctl->occurred = hdr & SWITCHTEC_EVENT_OCCURRED;
1021 ctl->count = (hdr >> 5) & 0xFF;
1023 if (!(ctl->flags & SWITCHTEC_IOCTL_EVENT_FLAG_CLEAR))
1024 hdr &= ~SWITCHTEC_EVENT_CLEAR;
1025 if (ctl->flags & SWITCHTEC_IOCTL_EVENT_FLAG_EN_POLL)
1026 hdr |= SWITCHTEC_EVENT_EN_IRQ;
1027 if (ctl->flags & SWITCHTEC_IOCTL_EVENT_FLAG_DIS_POLL)
1028 hdr &= ~SWITCHTEC_EVENT_EN_IRQ;
1029 if (ctl->flags & SWITCHTEC_IOCTL_EVENT_FLAG_EN_LOG)
1030 hdr |= SWITCHTEC_EVENT_EN_LOG;
1031 if (ctl->flags & SWITCHTEC_IOCTL_EVENT_FLAG_DIS_LOG)
1032 hdr &= ~SWITCHTEC_EVENT_EN_LOG;
1033 if (ctl->flags & SWITCHTEC_IOCTL_EVENT_FLAG_EN_CLI)
1034 hdr |= SWITCHTEC_EVENT_EN_CLI;
1035 if (ctl->flags & SWITCHTEC_IOCTL_EVENT_FLAG_DIS_CLI)
1036 hdr &= ~SWITCHTEC_EVENT_EN_CLI;
1037 if (ctl->flags & SWITCHTEC_IOCTL_EVENT_FLAG_EN_FATAL)
1038 hdr |= SWITCHTEC_EVENT_FATAL;
1039 if (ctl->flags & SWITCHTEC_IOCTL_EVENT_FLAG_DIS_FATAL)
1040 hdr &= ~SWITCHTEC_EVENT_FATAL;
1043 iowrite32(hdr, reg);
1046 if (hdr & SWITCHTEC_EVENT_EN_IRQ)
1047 ctl->flags |= SWITCHTEC_IOCTL_EVENT_FLAG_EN_POLL;
1048 if (hdr & SWITCHTEC_EVENT_EN_LOG)
1049 ctl->flags |= SWITCHTEC_IOCTL_EVENT_FLAG_EN_LOG;
1050 if (hdr & SWITCHTEC_EVENT_EN_CLI)
1051 ctl->flags |= SWITCHTEC_IOCTL_EVENT_FLAG_EN_CLI;
1052 if (hdr & SWITCHTEC_EVENT_FATAL)
1053 ctl->flags |= SWITCHTEC_IOCTL_EVENT_FLAG_EN_FATAL;
1058 static int ioctl_event_ctl(struct switchtec_dev *stdev,
1059 struct switchtec_ioctl_event_ctl __user *uctl)
1063 unsigned int event_flags;
1064 struct switchtec_ioctl_event_ctl ctl;
1066 if (copy_from_user(&ctl, uctl, sizeof(ctl)))
1069 if (ctl.event_id >= SWITCHTEC_IOCTL_MAX_EVENTS)
1072 if (ctl.flags & SWITCHTEC_IOCTL_EVENT_FLAG_UNUSED)
1075 if (ctl.index == SWITCHTEC_IOCTL_EVENT_IDX_ALL) {
1076 if (event_regs[ctl.event_id].map_reg == global_ev_reg)
1078 else if (event_regs[ctl.event_id].map_reg == part_ev_reg)
1079 nr_idxs = stdev->partition_count;
1080 else if (event_regs[ctl.event_id].map_reg == pff_ev_reg)
1081 nr_idxs = stdev->pff_csr_count;
1085 event_flags = ctl.flags;
1086 for (ctl.index = 0; ctl.index < nr_idxs; ctl.index++) {
1087 ctl.flags = event_flags;
1088 ret = event_ctl(stdev, &ctl);
1093 ret = event_ctl(stdev, &ctl);
1098 if (copy_to_user(uctl, &ctl, sizeof(ctl)))
1104 static int ioctl_pff_to_port(struct switchtec_dev *stdev,
1105 struct switchtec_ioctl_pff_port *up)
1109 struct part_cfg_regs *pcfg;
1110 struct switchtec_ioctl_pff_port p;
1112 if (copy_from_user(&p, up, sizeof(p)))
1116 for (part = 0; part < stdev->partition_count; part++) {
1117 pcfg = &stdev->mmio_part_cfg_all[part];
1120 reg = ioread32(&pcfg->usp_pff_inst_id);
1126 reg = ioread32(&pcfg->vep_pff_inst_id);
1128 p.port = SWITCHTEC_IOCTL_PFF_VEP;
1132 for (i = 0; i < ARRAY_SIZE(pcfg->dsp_pff_inst_id); i++) {
1133 reg = ioread32(&pcfg->dsp_pff_inst_id[i]);
1145 if (copy_to_user(up, &p, sizeof(p)))
1151 static int ioctl_port_to_pff(struct switchtec_dev *stdev,
1152 struct switchtec_ioctl_pff_port *up)
1154 struct switchtec_ioctl_pff_port p;
1155 struct part_cfg_regs *pcfg;
1157 if (copy_from_user(&p, up, sizeof(p)))
1160 if (p.partition == SWITCHTEC_IOCTL_EVENT_LOCAL_PART_IDX)
1161 pcfg = stdev->mmio_part_cfg;
1162 else if (p.partition < stdev->partition_count)
1163 pcfg = &stdev->mmio_part_cfg_all[p.partition];
1169 p.pff = ioread32(&pcfg->usp_pff_inst_id);
1171 case SWITCHTEC_IOCTL_PFF_VEP:
1172 p.pff = ioread32(&pcfg->vep_pff_inst_id);
1175 if (p.port > ARRAY_SIZE(pcfg->dsp_pff_inst_id))
1177 p.port = array_index_nospec(p.port,
1178 ARRAY_SIZE(pcfg->dsp_pff_inst_id) + 1);
1179 p.pff = ioread32(&pcfg->dsp_pff_inst_id[p.port - 1]);
1183 if (copy_to_user(up, &p, sizeof(p)))
1189 static long switchtec_dev_ioctl(struct file *filp, unsigned int cmd,
1192 struct switchtec_user *stuser = filp->private_data;
1193 struct switchtec_dev *stdev = stuser->stdev;
1195 void __user *argp = (void __user *)arg;
1197 rc = lock_mutex_and_test_alive(stdev);
1202 case SWITCHTEC_IOCTL_FLASH_INFO:
1203 rc = ioctl_flash_info(stdev, argp);
1205 case SWITCHTEC_IOCTL_FLASH_PART_INFO:
1206 rc = ioctl_flash_part_info(stdev, argp);
1208 case SWITCHTEC_IOCTL_EVENT_SUMMARY:
1209 rc = ioctl_event_summary(stdev, stuser, argp);
1211 case SWITCHTEC_IOCTL_EVENT_CTL:
1212 rc = ioctl_event_ctl(stdev, argp);
1214 case SWITCHTEC_IOCTL_PFF_TO_PORT:
1215 rc = ioctl_pff_to_port(stdev, argp);
1217 case SWITCHTEC_IOCTL_PORT_TO_PFF:
1218 rc = ioctl_port_to_pff(stdev, argp);
1225 mutex_unlock(&stdev->mrpc_mutex);
1229 static const struct file_operations switchtec_fops = {
1230 .owner = THIS_MODULE,
1231 .open = switchtec_dev_open,
1232 .release = switchtec_dev_release,
1233 .write = switchtec_dev_write,
1234 .read = switchtec_dev_read,
1235 .poll = switchtec_dev_poll,
1236 .unlocked_ioctl = switchtec_dev_ioctl,
1237 .compat_ioctl = switchtec_dev_ioctl,
1240 static void stdev_release(struct device *dev)
1242 struct switchtec_dev *stdev = to_stdev(dev);
1247 static void stdev_kill(struct switchtec_dev *stdev)
1249 struct switchtec_user *stuser, *tmpuser;
1251 pci_clear_master(stdev->pdev);
1253 cancel_delayed_work_sync(&stdev->mrpc_timeout);
1255 /* Mark the hardware as unavailable and complete all completions */
1256 mutex_lock(&stdev->mrpc_mutex);
1257 stdev->alive = false;
1259 /* Wake up and kill any users waiting on an MRPC request */
1260 list_for_each_entry_safe(stuser, tmpuser, &stdev->mrpc_queue, list) {
1261 complete_all(&stuser->comp);
1262 list_del_init(&stuser->list);
1266 mutex_unlock(&stdev->mrpc_mutex);
1268 /* Wake up any users waiting on event_wq */
1269 wake_up_interruptible(&stdev->event_wq);
1272 static struct switchtec_dev *stdev_create(struct pci_dev *pdev)
1274 struct switchtec_dev *stdev;
1280 stdev = kzalloc_node(sizeof(*stdev), GFP_KERNEL,
1281 dev_to_node(&pdev->dev));
1283 return ERR_PTR(-ENOMEM);
1285 stdev->alive = true;
1287 INIT_LIST_HEAD(&stdev->mrpc_queue);
1288 mutex_init(&stdev->mrpc_mutex);
1289 stdev->mrpc_busy = 0;
1290 INIT_WORK(&stdev->mrpc_work, mrpc_event_work);
1291 INIT_DELAYED_WORK(&stdev->mrpc_timeout, mrpc_timeout_work);
1292 init_waitqueue_head(&stdev->event_wq);
1293 atomic_set(&stdev->event_cnt, 0);
1296 device_initialize(dev);
1297 dev->class = switchtec_class;
1298 dev->parent = &pdev->dev;
1299 dev->groups = switchtec_device_groups;
1300 dev->release = stdev_release;
1302 minor = ida_simple_get(&switchtec_minor_ida, 0, 0,
1309 dev->devt = MKDEV(MAJOR(switchtec_devt), minor);
1310 dev_set_name(dev, "switchtec%d", minor);
1312 cdev = &stdev->cdev;
1313 cdev_init(cdev, &switchtec_fops);
1314 cdev->owner = THIS_MODULE;
1319 put_device(&stdev->dev);
1323 static int mask_event(struct switchtec_dev *stdev, int eid, int idx)
1325 size_t off = event_regs[eid].offset;
1326 u32 __iomem *hdr_reg;
1329 hdr_reg = event_regs[eid].map_reg(stdev, off, idx);
1330 hdr = ioread32(hdr_reg);
1332 if (!(hdr & SWITCHTEC_EVENT_OCCURRED && hdr & SWITCHTEC_EVENT_EN_IRQ))
1335 dev_dbg(&stdev->dev, "%s: %d %d %x\n", __func__, eid, idx, hdr);
1336 hdr &= ~(SWITCHTEC_EVENT_EN_IRQ | SWITCHTEC_EVENT_OCCURRED);
1337 iowrite32(hdr, hdr_reg);
1342 static int mask_all_events(struct switchtec_dev *stdev, int eid)
1347 if (event_regs[eid].map_reg == part_ev_reg) {
1348 for (idx = 0; idx < stdev->partition_count; idx++)
1349 count += mask_event(stdev, eid, idx);
1350 } else if (event_regs[eid].map_reg == pff_ev_reg) {
1351 for (idx = 0; idx < stdev->pff_csr_count; idx++) {
1352 if (!stdev->pff_local[idx])
1354 count += mask_event(stdev, eid, idx);
1357 count += mask_event(stdev, eid, 0);
1363 static irqreturn_t switchtec_event_isr(int irq, void *dev)
1365 struct switchtec_dev *stdev = dev;
1367 irqreturn_t ret = IRQ_NONE;
1368 int eid, event_count = 0;
1370 reg = ioread32(&stdev->mmio_part_cfg->mrpc_comp_hdr);
1371 if (reg & SWITCHTEC_EVENT_OCCURRED) {
1372 dev_dbg(&stdev->dev, "%s: mrpc comp\n", __func__);
1374 schedule_work(&stdev->mrpc_work);
1375 iowrite32(reg, &stdev->mmio_part_cfg->mrpc_comp_hdr);
1378 for (eid = 0; eid < SWITCHTEC_IOCTL_MAX_EVENTS; eid++)
1379 event_count += mask_all_events(stdev, eid);
1382 atomic_inc(&stdev->event_cnt);
1383 wake_up_interruptible(&stdev->event_wq);
1384 dev_dbg(&stdev->dev, "%s: %d events\n", __func__,
1392 static int switchtec_init_isr(struct switchtec_dev *stdev)
1397 nvecs = pci_alloc_irq_vectors(stdev->pdev, 1, 4,
1398 PCI_IRQ_MSIX | PCI_IRQ_MSI);
1402 event_irq = ioread16(&stdev->mmio_part_cfg->vep_vector_number);
1403 if (event_irq < 0 || event_irq >= nvecs)
1406 event_irq = pci_irq_vector(stdev->pdev, event_irq);
1410 return devm_request_irq(&stdev->pdev->dev, event_irq,
1411 switchtec_event_isr, 0,
1412 KBUILD_MODNAME, stdev);
1415 static void init_pff(struct switchtec_dev *stdev)
1419 struct part_cfg_regs *pcfg = stdev->mmio_part_cfg;
1421 for (i = 0; i < SWITCHTEC_MAX_PFF_CSR; i++) {
1422 reg = ioread16(&stdev->mmio_pff_csr[i].vendor_id);
1423 if (reg != MICROSEMI_VENDOR_ID)
1427 stdev->pff_csr_count = i;
1429 reg = ioread32(&pcfg->usp_pff_inst_id);
1430 if (reg < SWITCHTEC_MAX_PFF_CSR)
1431 stdev->pff_local[reg] = 1;
1433 reg = ioread32(&pcfg->vep_pff_inst_id);
1434 if (reg < SWITCHTEC_MAX_PFF_CSR)
1435 stdev->pff_local[reg] = 1;
1437 for (i = 0; i < ARRAY_SIZE(pcfg->dsp_pff_inst_id); i++) {
1438 reg = ioread32(&pcfg->dsp_pff_inst_id[i]);
1439 if (reg < SWITCHTEC_MAX_PFF_CSR)
1440 stdev->pff_local[reg] = 1;
1444 static int switchtec_init_pci(struct switchtec_dev *stdev,
1445 struct pci_dev *pdev)
1449 rc = pcim_enable_device(pdev);
1453 rc = pcim_iomap_regions(pdev, 0x1, KBUILD_MODNAME);
1457 pci_set_master(pdev);
1459 stdev->mmio = pcim_iomap_table(pdev)[0];
1460 stdev->mmio_mrpc = stdev->mmio + SWITCHTEC_GAS_MRPC_OFFSET;
1461 stdev->mmio_sw_event = stdev->mmio + SWITCHTEC_GAS_SW_EVENT_OFFSET;
1462 stdev->mmio_sys_info = stdev->mmio + SWITCHTEC_GAS_SYS_INFO_OFFSET;
1463 stdev->mmio_flash_info = stdev->mmio + SWITCHTEC_GAS_FLASH_INFO_OFFSET;
1464 stdev->mmio_ntb = stdev->mmio + SWITCHTEC_GAS_NTB_OFFSET;
1465 stdev->partition = ioread8(&stdev->mmio_sys_info->partition_id);
1466 stdev->partition_count = ioread8(&stdev->mmio_ntb->partition_count);
1467 stdev->mmio_part_cfg_all = stdev->mmio + SWITCHTEC_GAS_PART_CFG_OFFSET;
1468 stdev->mmio_part_cfg = &stdev->mmio_part_cfg_all[stdev->partition];
1469 stdev->mmio_pff_csr = stdev->mmio + SWITCHTEC_GAS_PFF_CSR_OFFSET;
1471 if (stdev->partition_count < 1)
1472 stdev->partition_count = 1;
1476 pci_set_drvdata(pdev, stdev);
1481 static int switchtec_pci_probe(struct pci_dev *pdev,
1482 const struct pci_device_id *id)
1484 struct switchtec_dev *stdev;
1487 stdev = stdev_create(pdev);
1489 return PTR_ERR(stdev);
1491 rc = switchtec_init_pci(stdev, pdev);
1495 rc = switchtec_init_isr(stdev);
1497 dev_err(&stdev->dev, "failed to init isr.\n");
1501 iowrite32(SWITCHTEC_EVENT_CLEAR |
1502 SWITCHTEC_EVENT_EN_IRQ,
1503 &stdev->mmio_part_cfg->mrpc_comp_hdr);
1505 rc = cdev_device_add(&stdev->cdev, &stdev->dev);
1509 dev_info(&stdev->dev, "Management device registered.\n");
1516 ida_simple_remove(&switchtec_minor_ida, MINOR(stdev->dev.devt));
1517 put_device(&stdev->dev);
1521 static void switchtec_pci_remove(struct pci_dev *pdev)
1523 struct switchtec_dev *stdev = pci_get_drvdata(pdev);
1525 pci_set_drvdata(pdev, NULL);
1527 cdev_device_del(&stdev->cdev, &stdev->dev);
1528 ida_simple_remove(&switchtec_minor_ida, MINOR(stdev->dev.devt));
1529 dev_info(&stdev->dev, "unregistered.\n");
1532 put_device(&stdev->dev);
1535 #define SWITCHTEC_PCI_DEVICE(device_id) \
1537 .vendor = MICROSEMI_VENDOR_ID, \
1538 .device = device_id, \
1539 .subvendor = PCI_ANY_ID, \
1540 .subdevice = PCI_ANY_ID, \
1541 .class = MICROSEMI_MGMT_CLASSCODE, \
1542 .class_mask = 0xFFFFFFFF, \
1545 .vendor = MICROSEMI_VENDOR_ID, \
1546 .device = device_id, \
1547 .subvendor = PCI_ANY_ID, \
1548 .subdevice = PCI_ANY_ID, \
1549 .class = MICROSEMI_NTB_CLASSCODE, \
1550 .class_mask = 0xFFFFFFFF, \
1553 static const struct pci_device_id switchtec_pci_tbl[] = {
1554 SWITCHTEC_PCI_DEVICE(0x8531), //PFX 24xG3
1555 SWITCHTEC_PCI_DEVICE(0x8532), //PFX 32xG3
1556 SWITCHTEC_PCI_DEVICE(0x8533), //PFX 48xG3
1557 SWITCHTEC_PCI_DEVICE(0x8534), //PFX 64xG3
1558 SWITCHTEC_PCI_DEVICE(0x8535), //PFX 80xG3
1559 SWITCHTEC_PCI_DEVICE(0x8536), //PFX 96xG3
1560 SWITCHTEC_PCI_DEVICE(0x8543), //PSX 48xG3
1561 SWITCHTEC_PCI_DEVICE(0x8544), //PSX 64xG3
1562 SWITCHTEC_PCI_DEVICE(0x8545), //PSX 80xG3
1563 SWITCHTEC_PCI_DEVICE(0x8546), //PSX 96xG3
1564 SWITCHTEC_PCI_DEVICE(0x8551), //PAX 24XG3
1565 SWITCHTEC_PCI_DEVICE(0x8552), //PAX 32XG3
1566 SWITCHTEC_PCI_DEVICE(0x8553), //PAX 48XG3
1567 SWITCHTEC_PCI_DEVICE(0x8554), //PAX 64XG3
1568 SWITCHTEC_PCI_DEVICE(0x8555), //PAX 80XG3
1569 SWITCHTEC_PCI_DEVICE(0x8556), //PAX 96XG3
1570 SWITCHTEC_PCI_DEVICE(0x8561), //PFXL 24XG3
1571 SWITCHTEC_PCI_DEVICE(0x8562), //PFXL 32XG3
1572 SWITCHTEC_PCI_DEVICE(0x8563), //PFXL 48XG3
1573 SWITCHTEC_PCI_DEVICE(0x8564), //PFXL 64XG3
1574 SWITCHTEC_PCI_DEVICE(0x8565), //PFXL 80XG3
1575 SWITCHTEC_PCI_DEVICE(0x8566), //PFXL 96XG3
1576 SWITCHTEC_PCI_DEVICE(0x8571), //PFXI 24XG3
1577 SWITCHTEC_PCI_DEVICE(0x8572), //PFXI 32XG3
1578 SWITCHTEC_PCI_DEVICE(0x8573), //PFXI 48XG3
1579 SWITCHTEC_PCI_DEVICE(0x8574), //PFXI 64XG3
1580 SWITCHTEC_PCI_DEVICE(0x8575), //PFXI 80XG3
1581 SWITCHTEC_PCI_DEVICE(0x8576), //PFXI 96XG3
1584 MODULE_DEVICE_TABLE(pci, switchtec_pci_tbl);
1586 static struct pci_driver switchtec_pci_driver = {
1587 .name = KBUILD_MODNAME,
1588 .id_table = switchtec_pci_tbl,
1589 .probe = switchtec_pci_probe,
1590 .remove = switchtec_pci_remove,
1593 static int __init switchtec_init(void)
1597 rc = alloc_chrdev_region(&switchtec_devt, 0, max_devices,
1602 switchtec_class = class_create(THIS_MODULE, "switchtec");
1603 if (IS_ERR(switchtec_class)) {
1604 rc = PTR_ERR(switchtec_class);
1605 goto err_create_class;
1608 rc = pci_register_driver(&switchtec_pci_driver);
1610 goto err_pci_register;
1612 pr_info(KBUILD_MODNAME ": loaded.\n");
1617 class_destroy(switchtec_class);
1620 unregister_chrdev_region(switchtec_devt, max_devices);
1624 module_init(switchtec_init);
1626 static void __exit switchtec_exit(void)
1628 pci_unregister_driver(&switchtec_pci_driver);
1629 class_destroy(switchtec_class);
1630 unregister_chrdev_region(switchtec_devt, max_devices);
1631 ida_destroy(&switchtec_minor_ida);
1633 pr_info(KBUILD_MODNAME ": unloaded.\n");
1635 module_exit(switchtec_exit);