4 * (C) Copyright 2004 Jon Smirl <jonsmirl@yahoo.com>
5 * (C) Copyright 2004 Silicon Graphics, Inc. Jesse Barnes <jbarnes@sgi.com>
7 * PCI ROM access routines
9 #include <linux/kernel.h>
10 #include <linux/export.h>
11 #include <linux/pci.h>
12 #include <linux/slab.h>
17 * pci_enable_rom - enable ROM decoding for a PCI device
18 * @pdev: PCI device to enable
20 * Enable ROM decoding on @dev. This involves simply turning on the last
21 * bit of the PCI ROM BAR. Note that some cards may share address decoders
22 * between the ROM and other resources, so enabling it may disable access
23 * to MMIO registers or other card memory.
25 int pci_enable_rom(struct pci_dev *pdev)
27 struct resource *res = pdev->resource + PCI_ROM_RESOURCE;
28 struct pci_bus_region region;
35 * Ideally pci_update_resource() would update the ROM BAR address,
36 * and we would only set the enable bit here. But apparently some
37 * devices have buggy ROM BARs that read as zero when disabled.
39 pcibios_resource_to_bus(pdev->bus, ®ion, res);
40 pci_read_config_dword(pdev, pdev->rom_base_reg, &rom_addr);
41 rom_addr &= ~PCI_ROM_ADDRESS_MASK;
42 rom_addr |= region.start | PCI_ROM_ADDRESS_ENABLE;
43 pci_write_config_dword(pdev, pdev->rom_base_reg, rom_addr);
46 EXPORT_SYMBOL_GPL(pci_enable_rom);
49 * pci_disable_rom - disable ROM decoding for a PCI device
50 * @pdev: PCI device to disable
52 * Disable ROM decoding on a PCI device by turning off the last bit in the
55 void pci_disable_rom(struct pci_dev *pdev)
58 pci_read_config_dword(pdev, pdev->rom_base_reg, &rom_addr);
59 rom_addr &= ~PCI_ROM_ADDRESS_ENABLE;
60 pci_write_config_dword(pdev, pdev->rom_base_reg, rom_addr);
62 EXPORT_SYMBOL_GPL(pci_disable_rom);
65 * pci_get_rom_size - obtain the actual size of the ROM image
66 * @pdev: target PCI device
67 * @rom: kernel virtual pointer to image of ROM
68 * @size: size of PCI window
69 * return: size of actual ROM image
71 * Determine the actual length of the ROM image.
72 * The PCI window size could be much larger than the
75 size_t pci_get_rom_size(struct pci_dev *pdev, void __iomem *rom, size_t size)
84 /* Standard PCI ROMs start out with these bytes 55 AA */
85 if (readb(image) != 0x55) {
86 dev_err(&pdev->dev, "Invalid ROM contents\n");
89 if (readb(image + 1) != 0xAA)
91 /* get the PCI data structure and check its signature */
92 pds = image + readw(image + 24);
93 if (readb(pds) != 'P')
95 if (readb(pds + 1) != 'C')
97 if (readb(pds + 2) != 'I')
99 if (readb(pds + 3) != 'R')
101 last_image = readb(pds + 21) & 0x80;
102 length = readw(pds + 16);
103 image += length * 512;
104 } while (length && !last_image);
106 /* never return a size larger than the PCI resource window */
107 /* there are known ROMs that get the size wrong */
108 return min((size_t)(image - rom), size);
112 * pci_map_rom - map a PCI ROM to kernel space
113 * @pdev: pointer to pci device struct
114 * @size: pointer to receive size of pci window over ROM
116 * Return: kernel virtual pointer to image of ROM
118 * Map a PCI ROM into kernel space. If ROM is boot video ROM,
119 * the shadow BIOS copy will be returned instead of the
122 void __iomem *pci_map_rom(struct pci_dev *pdev, size_t *size)
124 struct resource *res = &pdev->resource[PCI_ROM_RESOURCE];
129 * IORESOURCE_ROM_SHADOW set on x86, x86_64 and IA64 supports legacy
130 * memory map if the VGA enable bit of the Bridge Control register is
131 * set for embedded VGA.
133 if (res->flags & IORESOURCE_ROM_SHADOW) {
134 /* primary video rom always starts here */
135 start = (loff_t)0xC0000;
136 *size = 0x20000; /* cover C000:0 through E000:0 */
139 (IORESOURCE_ROM_COPY | IORESOURCE_ROM_BIOS_COPY)) {
140 *size = pci_resource_len(pdev, PCI_ROM_RESOURCE);
141 return (void __iomem *)(unsigned long)
142 pci_resource_start(pdev, PCI_ROM_RESOURCE);
144 /* assign the ROM an address if it doesn't have one */
145 if (res->parent == NULL &&
146 pci_assign_resource(pdev, PCI_ROM_RESOURCE))
148 start = pci_resource_start(pdev, PCI_ROM_RESOURCE);
149 *size = pci_resource_len(pdev, PCI_ROM_RESOURCE);
153 /* Enable ROM space decodes */
154 if (pci_enable_rom(pdev))
159 rom = ioremap(start, *size);
161 /* restore enable if ioremap fails */
162 if (!(res->flags & (IORESOURCE_ROM_ENABLE |
163 IORESOURCE_ROM_SHADOW |
164 IORESOURCE_ROM_COPY)))
165 pci_disable_rom(pdev);
170 * Try to find the true size of the ROM since sometimes the PCI window
171 * size is much larger than the actual size of the ROM.
172 * True size is important if the ROM is going to be copied.
174 *size = pci_get_rom_size(pdev, rom, *size);
177 EXPORT_SYMBOL(pci_map_rom);
180 * pci_unmap_rom - unmap the ROM from kernel space
181 * @pdev: pointer to pci device struct
182 * @rom: virtual address of the previous mapping
184 * Remove a mapping of a previously mapped ROM
186 void pci_unmap_rom(struct pci_dev *pdev, void __iomem *rom)
188 struct resource *res = &pdev->resource[PCI_ROM_RESOURCE];
190 if (res->flags & (IORESOURCE_ROM_COPY | IORESOURCE_ROM_BIOS_COPY))
195 /* Disable again before continuing, leave enabled if pci=rom */
196 if (!(res->flags & (IORESOURCE_ROM_ENABLE | IORESOURCE_ROM_SHADOW)))
197 pci_disable_rom(pdev);
199 EXPORT_SYMBOL(pci_unmap_rom);
202 * pci_cleanup_rom - free the ROM copy created by pci_map_rom_copy
203 * @pdev: pointer to pci device struct
205 * Free the copied ROM if we allocated one.
207 void pci_cleanup_rom(struct pci_dev *pdev)
209 struct resource *res = &pdev->resource[PCI_ROM_RESOURCE];
211 if (res->flags & IORESOURCE_ROM_COPY) {
212 kfree((void *)(unsigned long)res->start);
213 res->flags |= IORESOURCE_UNSET;
214 res->flags &= ~IORESOURCE_ROM_COPY;
221 * pci_platform_rom - provides a pointer to any ROM image provided by the
223 * @pdev: pointer to pci device struct
224 * @size: pointer to receive size of pci window over ROM
226 void __iomem *pci_platform_rom(struct pci_dev *pdev, size_t *size)
228 if (pdev->rom && pdev->romlen) {
229 *size = pdev->romlen;
230 return phys_to_virt((phys_addr_t)pdev->rom);
235 EXPORT_SYMBOL(pci_platform_rom);