1 /* SPDX-License-Identifier: GPL-2.0 */
6 #define msix_table_size(flags) ((flags & PCI_MSIX_FLAGS_QSIZE) + 1)
8 extern int pci_msi_setup_msi_irqs(struct pci_dev *dev, int nvec, int type);
9 extern void pci_msi_teardown_msi_irqs(struct pci_dev *dev);
11 #ifdef CONFIG_PCI_MSI_ARCH_FALLBACKS
12 extern int pci_msi_legacy_setup_msi_irqs(struct pci_dev *dev, int nvec, int type);
13 extern void pci_msi_legacy_teardown_msi_irqs(struct pci_dev *dev);
15 static inline int pci_msi_legacy_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
21 static inline void pci_msi_legacy_teardown_msi_irqs(struct pci_dev *dev)
28 * PCI 2.3 does not specify mask bits for each MSI interrupt. Attempting to
29 * mask all MSI interrupts by clearing the MSI enable bit does not work
30 * reliably as devices without an INTx disable bit will then generate a
31 * level IRQ which will never be cleared.
33 static inline __attribute_const__ u32 msi_multi_mask(struct msi_desc *desc)
35 /* Don't shift by >= width of type */
36 if (desc->pci.msi_attrib.multi_cap >= 5)
38 return (1 << (1 << desc->pci.msi_attrib.multi_cap)) - 1;