2 * PCIe RC driver for Synopsys DesignWare Core
4 * Copyright (C) 2015-2016 Synopsys, Inc. (www.synopsys.com)
6 * Authors: Joao Pinto <Joao.Pinto@synopsys.com>
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
12 #include <linux/clk.h>
13 #include <linux/delay.h>
14 #include <linux/gpio.h>
15 #include <linux/interrupt.h>
16 #include <linux/kernel.h>
17 #include <linux/init.h>
18 #include <linux/of_gpio.h>
19 #include <linux/pci.h>
20 #include <linux/platform_device.h>
21 #include <linux/resource.h>
22 #include <linux/signal.h>
23 #include <linux/types.h>
25 #include "pcie-designware.h"
31 static irqreturn_t dw_plat_pcie_msi_irq_handler(int irq, void *arg)
33 struct pcie_port *pp = arg;
35 return dw_handle_msi_irq(pp);
38 static int dw_plat_pcie_host_init(struct pcie_port *pp)
40 struct dw_pcie *pci = to_dw_pcie_from_pp(pp);
43 dw_pcie_wait_for_link(pci);
45 if (IS_ENABLED(CONFIG_PCI_MSI))
51 static const struct dw_pcie_host_ops dw_plat_pcie_host_ops = {
52 .host_init = dw_plat_pcie_host_init,
55 static int dw_plat_add_pcie_port(struct pcie_port *pp,
56 struct platform_device *pdev)
58 struct device *dev = &pdev->dev;
61 pp->irq = platform_get_irq(pdev, 1);
65 if (IS_ENABLED(CONFIG_PCI_MSI)) {
66 pp->msi_irq = platform_get_irq(pdev, 0);
70 ret = devm_request_irq(dev, pp->msi_irq,
71 dw_plat_pcie_msi_irq_handler,
72 IRQF_SHARED | IRQF_NO_THREAD,
73 "dw-plat-pcie-msi", pp);
75 dev_err(dev, "failed to request MSI IRQ\n");
81 pp->ops = &dw_plat_pcie_host_ops;
83 ret = dw_pcie_host_init(pp);
85 dev_err(dev, "failed to initialize host\n");
92 static const struct dw_pcie_ops dw_pcie_ops = {
95 static int dw_plat_pcie_probe(struct platform_device *pdev)
97 struct device *dev = &pdev->dev;
98 struct dw_plat_pcie *dw_plat_pcie;
100 struct resource *res; /* Resource from DT */
103 dw_plat_pcie = devm_kzalloc(dev, sizeof(*dw_plat_pcie), GFP_KERNEL);
107 pci = devm_kzalloc(dev, sizeof(*pci), GFP_KERNEL);
112 pci->ops = &dw_pcie_ops;
114 dw_plat_pcie->pci = pci;
116 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
117 pci->dbi_base = devm_ioremap_resource(dev, res);
118 if (IS_ERR(pci->dbi_base))
119 return PTR_ERR(pci->dbi_base);
121 platform_set_drvdata(pdev, dw_plat_pcie);
123 ret = dw_plat_add_pcie_port(&pci->pp, pdev);
130 static const struct of_device_id dw_plat_pcie_of_match[] = {
131 { .compatible = "snps,dw-pcie", },
135 static struct platform_driver dw_plat_pcie_driver = {
138 .of_match_table = dw_plat_pcie_of_match,
139 .suppress_bind_attrs = true,
141 .probe = dw_plat_pcie_probe,
143 builtin_platform_driver(dw_plat_pcie_driver);