2 * PCIe host controller driver for Freescale Layerscape SoCs
4 * Copyright (C) 2014 Freescale Semiconductor.
6 * Author: Minghuan Lian <Minghuan.Lian@freescale.com>
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
13 #include <linux/kernel.h>
14 #include <linux/interrupt.h>
15 #include <linux/init.h>
16 #include <linux/of_pci.h>
17 #include <linux/of_platform.h>
18 #include <linux/of_irq.h>
19 #include <linux/of_address.h>
20 #include <linux/pci.h>
21 #include <linux/platform_device.h>
22 #include <linux/resource.h>
23 #include <linux/mfd/syscon.h>
24 #include <linux/regmap.h>
26 #include "pcie-designware.h"
28 /* PEX1/2 Misc Ports Status Register */
29 #define SCFG_PEXMSCPORTSR(pex_idx) (0x94 + (pex_idx) * 4)
30 #define LTSSM_STATE_SHIFT 20
31 #define LTSSM_STATE_MASK 0x3f
32 #define LTSSM_PCIE_L0 0x11 /* L0 state */
34 /* PEX Internal Configuration Registers */
35 #define PCIE_STRFMR1 0x71c /* Symbol Timer & Filter Mask Register1 */
37 #define PCIE_IATU_NUM 6
39 struct ls_pcie_drvdata {
43 const struct dw_pcie_host_ops *ops;
44 const struct dw_pcie_ops *dw_pcie_ops;
51 const struct ls_pcie_drvdata *drvdata;
55 #define to_ls_pcie(x) dev_get_drvdata((x)->dev)
57 static bool ls_pcie_is_bridge(struct ls_pcie *pcie)
59 struct dw_pcie *pci = pcie->pci;
62 header_type = ioread8(pci->dbi_base + PCI_HEADER_TYPE);
65 return header_type == PCI_HEADER_TYPE_BRIDGE;
68 /* Clear multi-function bit */
69 static void ls_pcie_clear_multifunction(struct ls_pcie *pcie)
71 struct dw_pcie *pci = pcie->pci;
73 iowrite8(PCI_HEADER_TYPE_BRIDGE, pci->dbi_base + PCI_HEADER_TYPE);
76 /* Drop MSG TLP except for Vendor MSG */
77 static void ls_pcie_drop_msg_tlp(struct ls_pcie *pcie)
80 struct dw_pcie *pci = pcie->pci;
82 val = ioread32(pci->dbi_base + PCIE_STRFMR1);
84 iowrite32(val, pci->dbi_base + PCIE_STRFMR1);
87 static void ls_pcie_disable_outbound_atus(struct ls_pcie *pcie)
91 for (i = 0; i < PCIE_IATU_NUM; i++)
92 dw_pcie_disable_atu(pcie->pci, i, DW_PCIE_REGION_OUTBOUND);
95 static int ls1021_pcie_link_up(struct dw_pcie *pci)
98 struct ls_pcie *pcie = to_ls_pcie(pci);
103 regmap_read(pcie->scfg, SCFG_PEXMSCPORTSR(pcie->index), &state);
104 state = (state >> LTSSM_STATE_SHIFT) & LTSSM_STATE_MASK;
106 if (state < LTSSM_PCIE_L0)
112 static int ls_pcie_link_up(struct dw_pcie *pci)
114 struct ls_pcie *pcie = to_ls_pcie(pci);
117 state = (ioread32(pcie->lut + pcie->drvdata->lut_dbg) >>
118 pcie->drvdata->ltssm_shift) &
121 if (state < LTSSM_PCIE_L0)
127 static int ls_pcie_host_init(struct pcie_port *pp)
129 struct dw_pcie *pci = to_dw_pcie_from_pp(pp);
130 struct ls_pcie *pcie = to_ls_pcie(pci);
133 * Disable outbound windows configured by the bootloader to avoid
134 * one transaction hitting multiple outbound windows.
135 * dw_pcie_setup_rc() will reconfigure the outbound windows.
137 ls_pcie_disable_outbound_atus(pcie);
139 dw_pcie_dbi_ro_wr_en(pci);
140 ls_pcie_clear_multifunction(pcie);
141 dw_pcie_dbi_ro_wr_dis(pci);
143 ls_pcie_drop_msg_tlp(pcie);
145 dw_pcie_setup_rc(pp);
150 static int ls1021_pcie_host_init(struct pcie_port *pp)
152 struct dw_pcie *pci = to_dw_pcie_from_pp(pp);
153 struct ls_pcie *pcie = to_ls_pcie(pci);
154 struct device *dev = pci->dev;
158 pcie->scfg = syscon_regmap_lookup_by_phandle(dev->of_node,
160 if (IS_ERR(pcie->scfg)) {
161 ret = PTR_ERR(pcie->scfg);
162 dev_err(dev, "No syscfg phandle specified\n");
167 if (of_property_read_u32_array(dev->of_node,
168 "fsl,pcie-scfg", index, 2)) {
172 pcie->index = index[1];
174 return ls_pcie_host_init(pp);
177 static int ls_pcie_msi_host_init(struct pcie_port *pp,
178 struct msi_controller *chip)
180 struct dw_pcie *pci = to_dw_pcie_from_pp(pp);
181 struct device *dev = pci->dev;
182 struct device_node *np = dev->of_node;
183 struct device_node *msi_node;
186 * The MSI domain is set by the generic of_msi_configure(). This
187 * .msi_host_init() function keeps us from doing the default MSI
188 * domain setup in dw_pcie_host_init() and also enforces the
189 * requirement that "msi-parent" exists.
191 msi_node = of_parse_phandle(np, "msi-parent", 0);
193 dev_err(dev, "failed to find msi-parent\n");
200 static const struct dw_pcie_host_ops ls1021_pcie_host_ops = {
201 .host_init = ls1021_pcie_host_init,
202 .msi_host_init = ls_pcie_msi_host_init,
205 static const struct dw_pcie_host_ops ls_pcie_host_ops = {
206 .host_init = ls_pcie_host_init,
207 .msi_host_init = ls_pcie_msi_host_init,
210 static const struct dw_pcie_ops dw_ls1021_pcie_ops = {
211 .link_up = ls1021_pcie_link_up,
214 static const struct dw_pcie_ops dw_ls_pcie_ops = {
215 .link_up = ls_pcie_link_up,
218 static struct ls_pcie_drvdata ls1021_drvdata = {
219 .ops = &ls1021_pcie_host_ops,
220 .dw_pcie_ops = &dw_ls1021_pcie_ops,
223 static struct ls_pcie_drvdata ls1043_drvdata = {
224 .lut_offset = 0x10000,
227 .ops = &ls_pcie_host_ops,
228 .dw_pcie_ops = &dw_ls_pcie_ops,
231 static struct ls_pcie_drvdata ls1046_drvdata = {
232 .lut_offset = 0x80000,
235 .ops = &ls_pcie_host_ops,
236 .dw_pcie_ops = &dw_ls_pcie_ops,
239 static struct ls_pcie_drvdata ls2080_drvdata = {
240 .lut_offset = 0x80000,
243 .ops = &ls_pcie_host_ops,
244 .dw_pcie_ops = &dw_ls_pcie_ops,
247 static struct ls_pcie_drvdata ls2088_drvdata = {
248 .lut_offset = 0x80000,
251 .ops = &ls_pcie_host_ops,
252 .dw_pcie_ops = &dw_ls_pcie_ops,
255 static const struct of_device_id ls_pcie_of_match[] = {
256 { .compatible = "fsl,ls1021a-pcie", .data = &ls1021_drvdata },
257 { .compatible = "fsl,ls1043a-pcie", .data = &ls1043_drvdata },
258 { .compatible = "fsl,ls1046a-pcie", .data = &ls1046_drvdata },
259 { .compatible = "fsl,ls2080a-pcie", .data = &ls2080_drvdata },
260 { .compatible = "fsl,ls2085a-pcie", .data = &ls2080_drvdata },
261 { .compatible = "fsl,ls2088a-pcie", .data = &ls2088_drvdata },
262 { .compatible = "fsl,ls1088a-pcie", .data = &ls2088_drvdata },
266 static int __init ls_add_pcie_port(struct ls_pcie *pcie)
268 struct dw_pcie *pci = pcie->pci;
269 struct pcie_port *pp = &pci->pp;
270 struct device *dev = pci->dev;
273 pp->ops = pcie->drvdata->ops;
275 ret = dw_pcie_host_init(pp);
277 dev_err(dev, "failed to initialize host\n");
284 static int __init ls_pcie_probe(struct platform_device *pdev)
286 struct device *dev = &pdev->dev;
288 struct ls_pcie *pcie;
289 struct resource *dbi_base;
292 pcie = devm_kzalloc(dev, sizeof(*pcie), GFP_KERNEL);
296 pci = devm_kzalloc(dev, sizeof(*pci), GFP_KERNEL);
300 pcie->drvdata = of_device_get_match_data(dev);
303 pci->ops = pcie->drvdata->dw_pcie_ops;
307 dbi_base = platform_get_resource_byname(pdev, IORESOURCE_MEM, "regs");
308 pci->dbi_base = devm_pci_remap_cfg_resource(dev, dbi_base);
309 if (IS_ERR(pci->dbi_base))
310 return PTR_ERR(pci->dbi_base);
312 pcie->lut = pci->dbi_base + pcie->drvdata->lut_offset;
314 if (!ls_pcie_is_bridge(pcie))
317 platform_set_drvdata(pdev, pcie);
319 ret = ls_add_pcie_port(pcie);
326 static struct platform_driver ls_pcie_driver = {
328 .name = "layerscape-pcie",
329 .of_match_table = ls_pcie_of_match,
330 .suppress_bind_attrs = true,
333 builtin_platform_driver_probe(ls_pcie_driver, ls_pcie_probe);