2 * This file is part of wlcore
4 * Copyright (C) 2011 Texas Instruments Inc.
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * version 2 as published by the Free Software Foundation.
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13 * General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
25 #include <linux/platform_device.h>
31 /* The maximum number of Tx descriptors in all chip families */
32 #define WLCORE_MAX_TX_DESCRIPTORS 32
35 * We always allocate this number of mac addresses. If we don't
36 * have enough allocated addresses, the LAA bit is used
38 #define WLCORE_NUM_MAC_ADDRESSES 3
40 /* wl12xx/wl18xx maximum transmission power (in dBm) */
41 #define WLCORE_MAX_TXPWR 25
43 /* forward declaration */
44 struct wl1271_tx_hw_descr;
46 struct wl1271_rx_descriptor;
49 int (*setup)(struct wl1271 *wl);
50 int (*identify_chip)(struct wl1271 *wl);
51 int (*identify_fw)(struct wl1271 *wl);
52 int (*boot)(struct wl1271 *wl);
53 int (*plt_init)(struct wl1271 *wl);
54 int (*trigger_cmd)(struct wl1271 *wl, int cmd_box_addr,
55 void *buf, size_t len);
56 int (*ack_event)(struct wl1271 *wl);
57 int (*wait_for_event)(struct wl1271 *wl, enum wlcore_wait_event event,
59 int (*process_mailbox_events)(struct wl1271 *wl);
60 u32 (*calc_tx_blocks)(struct wl1271 *wl, u32 len, u32 spare_blks);
61 void (*set_tx_desc_blocks)(struct wl1271 *wl,
62 struct wl1271_tx_hw_descr *desc,
63 u32 blks, u32 spare_blks);
64 void (*set_tx_desc_data_len)(struct wl1271 *wl,
65 struct wl1271_tx_hw_descr *desc,
67 enum wl_rx_buf_align (*get_rx_buf_align)(struct wl1271 *wl,
69 int (*prepare_read)(struct wl1271 *wl, u32 rx_desc, u32 len);
70 u32 (*get_rx_packet_len)(struct wl1271 *wl, void *rx_data,
72 int (*tx_delayed_compl)(struct wl1271 *wl);
73 void (*tx_immediate_compl)(struct wl1271 *wl);
74 int (*hw_init)(struct wl1271 *wl);
75 int (*init_vif)(struct wl1271 *wl, struct wl12xx_vif *wlvif);
76 void (*convert_fw_status)(struct wl1271 *wl, void *raw_fw_status,
77 struct wl_fw_status *fw_status);
78 u32 (*sta_get_ap_rate_mask)(struct wl1271 *wl,
79 struct wl12xx_vif *wlvif);
80 int (*get_pg_ver)(struct wl1271 *wl, s8 *ver);
81 int (*get_mac)(struct wl1271 *wl);
82 void (*set_tx_desc_csum)(struct wl1271 *wl,
83 struct wl1271_tx_hw_descr *desc,
85 void (*set_rx_csum)(struct wl1271 *wl,
86 struct wl1271_rx_descriptor *desc,
88 u32 (*ap_get_mimo_wide_rate_mask)(struct wl1271 *wl,
89 struct wl12xx_vif *wlvif);
90 int (*debugfs_init)(struct wl1271 *wl, struct dentry *rootdir);
91 int (*handle_static_data)(struct wl1271 *wl,
92 struct wl1271_static_data *static_data);
93 int (*scan_start)(struct wl1271 *wl, struct wl12xx_vif *wlvif,
94 struct cfg80211_scan_request *req);
95 int (*scan_stop)(struct wl1271 *wl, struct wl12xx_vif *wlvif);
96 int (*sched_scan_start)(struct wl1271 *wl, struct wl12xx_vif *wlvif,
97 struct cfg80211_sched_scan_request *req,
98 struct ieee80211_scan_ies *ies);
99 void (*sched_scan_stop)(struct wl1271 *wl, struct wl12xx_vif *wlvif);
100 int (*get_spare_blocks)(struct wl1271 *wl, bool is_gem);
101 int (*set_key)(struct wl1271 *wl, enum set_key_cmd cmd,
102 struct ieee80211_vif *vif,
103 struct ieee80211_sta *sta,
104 struct ieee80211_key_conf *key_conf);
105 int (*channel_switch)(struct wl1271 *wl,
106 struct wl12xx_vif *wlvif,
107 struct ieee80211_channel_switch *ch_switch);
108 u32 (*pre_pkt_send)(struct wl1271 *wl, u32 buf_offset, u32 last_len);
109 void (*sta_rc_update)(struct wl1271 *wl, struct wl12xx_vif *wlvif);
110 int (*set_peer_cap)(struct wl1271 *wl,
111 struct ieee80211_sta_ht_cap *ht_cap,
112 bool allow_ht_operation,
113 u32 rate_set, u8 hlid);
114 u32 (*convert_hwaddr)(struct wl1271 *wl, u32 hwaddr);
115 bool (*lnk_high_prio)(struct wl1271 *wl, u8 hlid,
116 struct wl1271_link *lnk);
117 bool (*lnk_low_prio)(struct wl1271 *wl, u8 hlid,
118 struct wl1271_link *lnk);
119 int (*interrupt_notify)(struct wl1271 *wl, bool action);
120 int (*rx_ba_filter)(struct wl1271 *wl, bool action);
121 int (*ap_sleep)(struct wl1271 *wl);
122 int (*smart_config_start)(struct wl1271 *wl, u32 group_bitmap);
123 int (*smart_config_stop)(struct wl1271 *wl);
124 int (*smart_config_set_group_key)(struct wl1271 *wl, u16 group_id,
125 u8 key_len, u8 *key);
126 int (*set_cac)(struct wl1271 *wl, struct wl12xx_vif *wlvif,
128 int (*dfs_master_restart)(struct wl1271 *wl, struct wl12xx_vif *wlvif);
131 enum wlcore_partitions {
136 PART_TOP_PRCM_ELP_SOC,
142 struct wlcore_partition {
147 struct wlcore_partition_set {
148 struct wlcore_partition mem;
149 struct wlcore_partition reg;
150 struct wlcore_partition mem2;
151 struct wlcore_partition mem3;
154 enum wlcore_registers {
155 /* register addresses, used with partition translation */
157 REG_INTERRUPT_NO_CLEAR,
159 REG_COMMAND_MAILBOX_PTR,
160 REG_EVENT_MAILBOX_PTR,
165 REG_CMD_MBOX_ADDRESS,
167 /* data access memory addresses, used with partition translation */
171 /* raw data access memory addresses */
172 REG_RAW_FW_STATUS_ADDR,
177 struct wl1271_stats {
179 unsigned long fw_stats_update;
182 unsigned int retry_count;
183 unsigned int excessive_retries;
188 struct ieee80211_hw *hw;
189 bool mac80211_registered;
192 struct platform_device *pdev;
196 struct wl1271_if_operations *if_ops;
204 enum wlcore_state state;
205 enum wl12xx_fw_type fw_type;
207 enum plt_mode plt_mode;
214 struct wlcore_partition_set curr_part;
216 struct wl1271_chip chip;
227 /* address read from the fuse ROM */
231 /* we have up to 2 MAC addresses */
232 struct mac_address addresses[WLCORE_NUM_MAC_ADDRESSES];
236 unsigned long links_map[BITS_TO_LONGS(WLCORE_MAX_LINKS)];
237 unsigned long roles_map[BITS_TO_LONGS(WL12XX_MAX_ROLES)];
238 unsigned long roc_map[BITS_TO_LONGS(WL12XX_MAX_ROLES)];
239 unsigned long rate_policies_map[
240 BITS_TO_LONGS(WL12XX_MAX_RATE_POLICIES)];
241 unsigned long klv_templates_map[
242 BITS_TO_LONGS(WLCORE_MAX_KLV_TEMPLATES)];
244 u8 session_ids[WLCORE_MAX_LINKS];
246 struct list_head wlvif_list;
251 struct wl1271_acx_mem_map *target_mem_map;
253 /* Accounting for allocated / available TX blocks on HW */
255 u32 tx_blocks_available;
256 u32 tx_allocated_blocks;
257 u32 tx_results_count;
259 /* Accounting for allocated / available Tx packets in HW */
260 u32 tx_pkts_freed[NUM_TX_QUEUES];
261 u32 tx_allocated_pkts[NUM_TX_QUEUES];
263 /* Transmitted TX packets counter for chipset interface */
264 u32 tx_packets_count;
266 /* Time-offset between host and chipset clocks */
269 /* Frames scheduled for transmission, not handled yet */
270 int tx_queue_count[NUM_TX_QUEUES];
271 unsigned long queue_stop_reasons[
272 NUM_TX_QUEUES * WLCORE_NUM_MAC_ADDRESSES];
274 /* Frames received, not handled yet by mac80211 */
275 struct sk_buff_head deferred_rx_queue;
277 /* Frames sent, not returned yet to mac80211 */
278 struct sk_buff_head deferred_tx_queue;
280 struct work_struct tx_work;
281 struct workqueue_struct *freezable_wq;
283 /* Pending TX frames */
284 unsigned long tx_frames_map[BITS_TO_LONGS(WLCORE_MAX_TX_DESCRIPTORS)];
285 struct sk_buff *tx_frames[WLCORE_MAX_TX_DESCRIPTORS];
291 /* Intermediate buffer, used for packet aggregation */
295 /* Reusable dummy packet template */
296 struct sk_buff *dummy_packet;
298 /* Network stack work */
299 struct work_struct netstack_work;
304 /* Number of valid bytes in the FW log buffer */
307 /* FW log end marker */
310 /* FW memory block size */
311 u32 fw_mem_block_size;
313 /* Sysfs FW log entry readers wait queue */
314 wait_queue_head_t fwlog_waitq;
316 /* Hardware recovery work */
317 struct work_struct recovery_work;
318 bool watchdog_recovery;
320 /* Reg domain last configuration */
321 u32 reg_ch_conf_last[2] __aligned(8);
322 /* Reg domain pending configuration */
323 u32 reg_ch_conf_pending[2];
325 /* Pointer that holds DMA-friendly block for the mailbox */
328 /* The mbox event mask */
330 /* events to unmask only when ap interface is up */
333 /* Mailbox pointers */
337 /* Are we currently scanning */
338 struct wl12xx_vif *scan_wlvif;
339 struct wl1271_scan scan;
340 struct delayed_work scan_complete_work;
342 struct ieee80211_vif *roc_vif;
343 struct delayed_work roc_complete_work;
345 struct wl12xx_vif *sched_vif;
347 /* The current band */
348 enum ieee80211_band band;
350 struct completion *elp_compl;
351 struct delayed_work elp_work;
356 struct wl1271_stats stats;
360 u32 buffer_busyword[WL1271_BUSY_WORD_CNT];
363 struct wl_fw_status *fw_status;
364 struct wl1271_tx_hw_res_if *tx_res_if;
366 /* Current chipset configuration */
367 struct wlcore_conf conf;
375 /* Most recently reported noise in dBm */
378 /* bands supported by this instance of wl12xx */
379 struct ieee80211_supported_band bands[WLCORE_NUM_BANDS];
382 * wowlan trigger was configured during suspend.
383 * (currently, only "ANY" trigger is supported)
386 bool irq_wake_enabled;
389 * AP-mode - links indexed by HLID. The global and broadcast links
392 struct wl1271_link links[WLCORE_MAX_LINKS];
394 /* number of currently active links */
395 int active_link_count;
397 /* Fast/slow links bitmap according to FW */
398 unsigned long fw_fast_lnk_map;
400 /* AP-mode - a bitmap of links currently in PS mode according to FW */
401 unsigned long ap_fw_ps_map;
403 /* AP-mode - a bitmap of links currently in PS mode in mac80211 */
404 unsigned long ap_ps_map;
406 /* Quirks of specific hardware revisions */
409 /* number of currently active RX BA sessions */
410 int ba_rx_session_count;
412 /* Maximum number of supported RX BA sessions */
413 int ba_rx_session_count_max;
415 /* AP-mode - number of currently connected stations */
416 int active_sta_count;
418 /* Flag determining whether AP should broadcast OFDM-only rates */
421 /* last wlvif we transmitted from */
422 struct wl12xx_vif *last_wlvif;
424 /* work to fire when Tx is stuck */
425 struct delayed_work tx_watchdog_work;
427 struct wlcore_ops *ops;
428 /* pointer to the lower driver partition table */
429 const struct wlcore_partition_set *ptable;
430 /* pointer to the lower driver register table */
432 /* name of the firmwares to load - for PLT, single role, multi-role */
433 const char *plt_fw_name;
434 const char *sr_fw_name;
435 const char *mr_fw_name;
437 u8 scan_templ_id_2_4;
439 u8 sched_scan_templ_id_2_4;
440 u8 sched_scan_templ_id_5;
443 /* per-chip-family private structure */
446 /* number of TX descriptors the HW supports. */
448 /* number of RX descriptors the HW supports. */
450 /* number of links the HW supports */
452 /* max stations a single AP can support */
455 /* translate HW Tx rates to standard rate-indices */
456 const u8 **band_rate_to_idx;
458 /* size of table for HW rates that can be received from chip */
459 u8 hw_tx_rate_tbl_size;
461 /* this HW rate and below are considered HT rates for this chip */
464 /* HW HT (11n) capabilities */
465 struct ieee80211_sta_ht_cap ht_cap[WLCORE_NUM_BANDS];
467 /* the current dfs region */
468 enum nl80211_dfs_regions dfs_region;
470 /* size of the private FW status data */
471 size_t fw_status_len;
472 size_t fw_status_priv_len;
474 /* RX Data filter rule state - enabled/disabled */
475 unsigned long rx_filter_enabled[BITS_TO_LONGS(WL1271_MAX_RX_FILTERS)];
477 /* size of the private static data */
478 size_t static_data_priv_len;
480 /* the current channel type */
481 enum nl80211_channel_type channel_type;
483 /* mutex for protecting the tx_flush function */
484 struct mutex flush_mutex;
486 /* sleep auth value currently configured to FW */
489 /* the number of allocated MAC addresses in this chip */
492 /* minimum FW version required for the driver to work in single-role */
493 unsigned int min_sr_fw_ver[NUM_FW_VER];
495 /* minimum FW version required for the driver to work in multi-role */
496 unsigned int min_mr_fw_ver[NUM_FW_VER];
498 struct completion nvs_loading_complete;
500 /* interface combinations supported by the hw */
501 const struct ieee80211_iface_combination *iface_combinations;
502 u8 n_iface_combinations;
504 /* dynamic fw traces */
505 u32 dynamic_fw_traces;
508 int wlcore_probe(struct wl1271 *wl, struct platform_device *pdev);
509 int wlcore_remove(struct platform_device *pdev);
510 struct ieee80211_hw *wlcore_alloc_hw(size_t priv_size, u32 aggr_buf_size,
512 int wlcore_free_hw(struct wl1271 *wl);
513 int wlcore_set_key(struct wl1271 *wl, enum set_key_cmd cmd,
514 struct ieee80211_vif *vif,
515 struct ieee80211_sta *sta,
516 struct ieee80211_key_conf *key_conf);
517 void wlcore_regdomain_config(struct wl1271 *wl);
518 void wlcore_update_inconn_sta(struct wl1271 *wl, struct wl12xx_vif *wlvif,
519 struct wl1271_station *wl_sta, bool in_conn);
522 wlcore_set_ht_cap(struct wl1271 *wl, enum ieee80211_band band,
523 struct ieee80211_sta_ht_cap *ht_cap)
525 memcpy(&wl->ht_cap[band], ht_cap, sizeof(*ht_cap));
528 /* Tell wlcore not to care about this element when checking the version */
529 #define WLCORE_FW_VER_IGNORE -1
532 wlcore_set_min_fw_ver(struct wl1271 *wl, unsigned int chip,
533 unsigned int iftype_sr, unsigned int major_sr,
534 unsigned int subtype_sr, unsigned int minor_sr,
535 unsigned int iftype_mr, unsigned int major_mr,
536 unsigned int subtype_mr, unsigned int minor_mr)
538 wl->min_sr_fw_ver[FW_VER_CHIP] = chip;
539 wl->min_sr_fw_ver[FW_VER_IF_TYPE] = iftype_sr;
540 wl->min_sr_fw_ver[FW_VER_MAJOR] = major_sr;
541 wl->min_sr_fw_ver[FW_VER_SUBTYPE] = subtype_sr;
542 wl->min_sr_fw_ver[FW_VER_MINOR] = minor_sr;
544 wl->min_mr_fw_ver[FW_VER_CHIP] = chip;
545 wl->min_mr_fw_ver[FW_VER_IF_TYPE] = iftype_mr;
546 wl->min_mr_fw_ver[FW_VER_MAJOR] = major_mr;
547 wl->min_mr_fw_ver[FW_VER_SUBTYPE] = subtype_mr;
548 wl->min_mr_fw_ver[FW_VER_MINOR] = minor_mr;
551 /* Firmware image load chunk size */
552 #define CHUNK_SIZE 16384
556 /* Each RX/TX transaction requires an end-of-transaction transfer */
557 #define WLCORE_QUIRK_END_OF_TRANSACTION BIT(0)
559 /* wl127x and SPI don't support SDIO block size alignment */
560 #define WLCORE_QUIRK_TX_BLOCKSIZE_ALIGN BIT(2)
562 /* means aggregated Rx packets are aligned to a SDIO block */
563 #define WLCORE_QUIRK_RX_BLOCKSIZE_ALIGN BIT(3)
565 /* Older firmwares did not implement the FW logger over bus feature */
566 #define WLCORE_QUIRK_FWLOG_NOT_IMPLEMENTED BIT(4)
568 /* Older firmwares use an old NVS format */
569 #define WLCORE_QUIRK_LEGACY_NVS BIT(5)
571 /* pad only the last frame in the aggregate buffer */
572 #define WLCORE_QUIRK_TX_PAD_LAST_FRAME BIT(7)
574 /* extra header space is required for TKIP */
575 #define WLCORE_QUIRK_TKIP_HEADER_SPACE BIT(8)
577 /* Some firmwares not support sched scans while connected */
578 #define WLCORE_QUIRK_NO_SCHED_SCAN_WHILE_CONN BIT(9)
580 /* separate probe response templates for one-shot and sched scans */
581 #define WLCORE_QUIRK_DUAL_PROBE_TMPL BIT(10)
583 /* Firmware requires reg domain configuration for active calibration */
584 #define WLCORE_QUIRK_REGDOMAIN_CONF BIT(11)
586 /* The FW only support a zero session id for AP */
587 #define WLCORE_QUIRK_AP_ZERO_SESSION_ID BIT(12)
589 /* TODO: move all these common registers and values elsewhere */
590 #define HW_ACCESS_ELP_CTRL_REG 0x1FFFC
592 /* ELP register commands */
593 #define ELPCTRL_WAKE_UP 0x1
594 #define ELPCTRL_WAKE_UP_WLAN_READY 0x5
595 #define ELPCTRL_SLEEP 0x0
596 /* ELP WLAN_READY bit */
597 #define ELPCTRL_WLAN_READY 0x2
599 /*************************************************************************
601 Interrupt Trigger Register (Host -> WiLink)
603 **************************************************************************/
605 /* Hardware to Embedded CPU Interrupts - first 32-bit register set */
608 * The host sets this bit to inform the Wlan
609 * FW that a TX packet is in the XFER
612 #define INTR_TRIG_TX_PROC0 BIT(2)
615 * The host sets this bit to inform the FW
616 * that it read a packet from RX XFER
619 #define INTR_TRIG_RX_PROC0 BIT(3)
621 #define INTR_TRIG_DEBUG_ACK BIT(4)
623 #define INTR_TRIG_STATE_CHANGED BIT(5)
625 /* Hardware to Embedded CPU Interrupts - second 32-bit register set */
628 * The host sets this bit to inform the FW
629 * that it read a packet from RX XFER
632 #define INTR_TRIG_RX_PROC1 BIT(17)
635 * The host sets this bit to inform the Wlan
636 * hardware that a TX packet is in the XFER
639 #define INTR_TRIG_TX_PROC1 BIT(18)
641 #define ACX_SLV_SOFT_RESET_BIT BIT(1)
642 #define SOFT_RESET_MAX_TIME 1000000
643 #define SOFT_RESET_STALL_TIME 1000
645 #define ECPU_CONTROL_HALT 0x00000101
647 #define WELP_ARM_COMMAND_VAL 0x4
649 #endif /* __WLCORE_H__ */