1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
2 /* Copyright(c) 2019-2022 Realtek Corporation
5 #ifndef __RTW89_8852C_H__
6 #define __RTW89_8852C_H__
10 #define RF_PATH_NUM_8852C 2
11 #define BB_PATH_NUM_8852C 2
12 #define NTX_NUM_8852C 2
14 struct rtw8852c_u_efuse {
16 u8 mac_addr[ETH_ALEN];
19 struct rtw8852c_e_efuse {
20 u8 mac_addr[ETH_ALEN];
23 struct rtw8852c_tssi_offset {
24 u8 cck_tssi[TSSI_CCK_CH_GROUP_NUM];
25 u8 bw40_tssi[TSSI_MCS_2G_CH_GROUP_NUM];
27 u8 bw40_1s_tssi_5g[TSSI_MCS_5G_CH_GROUP_NUM];
30 struct rtw8852c_efuse {
32 struct rtw8852c_tssi_offset path_a_tssi;
34 struct rtw8852c_tssi_offset path_b_tssi;
56 u8 tx_cali_pwr_trk_mode;
57 u8 trx_path_selection;
74 u8 bw40_1s_tssi_6g_a[TSSI_MCS_6G_CH_GROUP_NUM];
76 u8 bw40_1s_tssi_6g_b[TSSI_MCS_6G_CH_GROUP_NUM];
81 struct rtw8852c_u_efuse u;
82 struct rtw8852c_e_efuse e;
86 extern const struct rtw89_chip_info rtw8852c_chip_info;