1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
2 /* Copyright(c) 2019-2020 Realtek Corporation
10 enum rtw89_fw_dl_status {
11 RTW89_FWDL_INITIAL_STATE = 0,
12 RTW89_FWDL_FWDL_ONGOING = 1,
13 RTW89_FWDL_CHECKSUM_FAIL = 2,
14 RTW89_FWDL_SECURITY_FAIL = 3,
15 RTW89_FWDL_CV_NOT_MATCH = 4,
17 RTW89_FWDL_WCPU_FWDL_RDY = 6,
18 RTW89_FWDL_WCPU_FW_INIT_RDY = 7
21 #define RTW89_GET_C2H_HDR_FUNC(info) \
22 u32_get_bits(info, GENMASK(6, 0))
23 #define RTW89_GET_C2H_HDR_LEN(info) \
24 u32_get_bits(info, GENMASK(11, 8))
26 #define RTW89_SET_H2CREG_HDR_FUNC(info, val) \
27 u32p_replace_bits(info, val, GENMASK(6, 0))
28 #define RTW89_SET_H2CREG_HDR_LEN(info, val) \
29 u32p_replace_bits(info, val, GENMASK(11, 8))
31 #define RTW89_H2CREG_MAX 4
32 #define RTW89_C2HREG_MAX 4
33 #define RTW89_C2HREG_HDR_LEN 2
34 #define RTW89_H2CREG_HDR_LEN 2
35 #define RTW89_C2H_TIMEOUT 1000000
36 struct rtw89_mac_c2h_info {
39 u32 c2hreg[RTW89_C2HREG_MAX];
42 struct rtw89_mac_h2c_info {
45 u32 h2creg[RTW89_H2CREG_MAX];
48 enum rtw89_mac_h2c_type {
49 RTW89_FWCMD_H2CREG_FUNC_H2CREG_LB = 0,
50 RTW89_FWCMD_H2CREG_FUNC_CNSL_CMD,
51 RTW89_FWCMD_H2CREG_FUNC_FWERR,
52 RTW89_FWCMD_H2CREG_FUNC_GET_FEATURE,
53 RTW89_FWCMD_H2CREG_FUNC_GETPKT_INFORM,
54 RTW89_FWCMD_H2CREG_FUNC_SCH_TX_EN
57 enum rtw89_mac_c2h_type {
58 RTW89_FWCMD_C2HREG_FUNC_C2HREG_LB = 0,
59 RTW89_FWCMD_C2HREG_FUNC_ERR_RPT,
60 RTW89_FWCMD_C2HREG_FUNC_ERR_MSG,
61 RTW89_FWCMD_C2HREG_FUNC_PHY_CAP,
62 RTW89_FWCMD_C2HREG_FUNC_TX_PAUSE_RPT,
63 RTW89_FWCMD_C2HREG_FUNC_NULL = 0xFF
66 struct rtw89_c2h_phy_cap {
82 enum rtw89_fw_c2h_category {
88 enum rtw89_fw_log_level {
89 RTW89_FW_LOG_LEVEL_OFF,
90 RTW89_FW_LOG_LEVEL_CRT,
91 RTW89_FW_LOG_LEVEL_SER,
92 RTW89_FW_LOG_LEVEL_WARN,
93 RTW89_FW_LOG_LEVEL_LOUD,
94 RTW89_FW_LOG_LEVEL_TR,
97 enum rtw89_fw_log_path {
98 RTW89_FW_LOG_LEVEL_UART,
99 RTW89_FW_LOG_LEVEL_C2H,
100 RTW89_FW_LOG_LEVEL_SNI,
103 enum rtw89_fw_log_comp {
104 RTW89_FW_LOG_COMP_VER,
105 RTW89_FW_LOG_COMP_INIT,
106 RTW89_FW_LOG_COMP_TASK,
107 RTW89_FW_LOG_COMP_CNS,
108 RTW89_FW_LOG_COMP_H2C,
109 RTW89_FW_LOG_COMP_C2H,
110 RTW89_FW_LOG_COMP_TX,
111 RTW89_FW_LOG_COMP_RX,
112 RTW89_FW_LOG_COMP_IPSEC,
113 RTW89_FW_LOG_COMP_TIMER,
114 RTW89_FW_LOG_COMP_DBGPKT,
115 RTW89_FW_LOG_COMP_PS,
116 RTW89_FW_LOG_COMP_ERROR,
117 RTW89_FW_LOG_COMP_WOWLAN,
118 RTW89_FW_LOG_COMP_SECURE_BOOT,
119 RTW89_FW_LOG_COMP_BTC,
120 RTW89_FW_LOG_COMP_BB,
121 RTW89_FW_LOG_COMP_TWT,
122 RTW89_FW_LOG_COMP_RF,
123 RTW89_FW_LOG_COMP_MCC = 20,
126 enum rtw89_pkt_offload_op {
127 RTW89_PKT_OFLD_OP_ADD,
128 RTW89_PKT_OFLD_OP_DEL,
129 RTW89_PKT_OFLD_OP_READ,
132 enum rtw89_scanofld_notify_reason {
133 RTW89_SCAN_DWELL_NOTIFY,
134 RTW89_SCAN_PRE_TX_NOTIFY,
135 RTW89_SCAN_POST_TX_NOTIFY,
136 RTW89_SCAN_ENTER_CH_NOTIFY,
137 RTW89_SCAN_LEAVE_CH_NOTIFY,
138 RTW89_SCAN_END_SCAN_NOTIFY,
141 enum rtw89_chan_type {
142 RTW89_CHAN_OPERATE = 0,
147 #define FWDL_SECTION_MAX_NUM 10
148 #define FWDL_SECTION_CHKSUM_LEN 8
149 #define FWDL_SECTION_PER_PKT_LEN 2020
151 struct rtw89_fw_hdr_section_info {
158 struct rtw89_fw_bin_info {
161 struct rtw89_fw_hdr_section_info section_info[FWDL_SECTION_MAX_NUM];
164 struct rtw89_fw_macid_pause_grp {
169 struct rtw89_h2creg_sch_tx_en {
180 #define RTW89_CHANNEL_TIME 45
181 #define RTW89_DFS_CHAN_TIME 105
182 #define RTW89_OFF_CHAN_TIME 100
183 #define RTW89_DWELL_TIME 20
184 #define RTW89_SCAN_WIDTH 0
185 #define RTW89_SCANOFLD_MAX_SSID 8
186 #define RTW89_SCANOFLD_MAX_IE_LEN 512
187 #define RTW89_SCANOFLD_PKT_NONE 0xFF
188 #define RTW89_SCANOFLD_DEBUG_MASK 0x1F
189 #define RTW89_MAC_CHINFO_SIZE 20
191 struct rtw89_mac_chinfo {
208 u8 pkt_id[RTW89_SCANOFLD_MAX_SSID];
211 struct list_head list;
214 struct rtw89_scan_option {
219 struct rtw89_pktofld_info {
220 struct list_head list;
224 static inline void RTW89_SET_FWCMD_RA_IS_DIS(void *cmd, u32 val)
226 le32p_replace_bits((__le32 *)(cmd) + 0x00, val, BIT(0));
229 static inline void RTW89_SET_FWCMD_RA_MODE(void *cmd, u32 val)
231 le32p_replace_bits((__le32 *)(cmd) + 0x00, val, GENMASK(5, 1));
234 static inline void RTW89_SET_FWCMD_RA_BW_CAP(void *cmd, u32 val)
236 le32p_replace_bits((__le32 *)(cmd) + 0x00, val, GENMASK(7, 6));
239 static inline void RTW89_SET_FWCMD_RA_MACID(void *cmd, u32 val)
241 le32p_replace_bits((__le32 *)(cmd) + 0x00, val, GENMASK(15, 8));
244 static inline void RTW89_SET_FWCMD_RA_DCM(void *cmd, u32 val)
246 le32p_replace_bits((__le32 *)(cmd) + 0x00, val, BIT(16));
249 static inline void RTW89_SET_FWCMD_RA_ER(void *cmd, u32 val)
251 le32p_replace_bits((__le32 *)(cmd) + 0x00, val, BIT(17));
254 static inline void RTW89_SET_FWCMD_RA_INIT_RATE_LV(void *cmd, u32 val)
256 le32p_replace_bits((__le32 *)(cmd) + 0x00, val, GENMASK(19, 18));
259 static inline void RTW89_SET_FWCMD_RA_UPD_ALL(void *cmd, u32 val)
261 le32p_replace_bits((__le32 *)(cmd) + 0x00, val, BIT(20));
264 static inline void RTW89_SET_FWCMD_RA_SGI(void *cmd, u32 val)
266 le32p_replace_bits((__le32 *)(cmd) + 0x00, val, BIT(21));
269 static inline void RTW89_SET_FWCMD_RA_LDPC(void *cmd, u32 val)
271 le32p_replace_bits((__le32 *)(cmd) + 0x00, val, BIT(22));
274 static inline void RTW89_SET_FWCMD_RA_STBC(void *cmd, u32 val)
276 le32p_replace_bits((__le32 *)(cmd) + 0x00, val, BIT(23));
279 static inline void RTW89_SET_FWCMD_RA_SS_NUM(void *cmd, u32 val)
281 le32p_replace_bits((__le32 *)(cmd) + 0x00, val, GENMASK(26, 24));
284 static inline void RTW89_SET_FWCMD_RA_GILTF(void *cmd, u32 val)
286 le32p_replace_bits((__le32 *)(cmd) + 0x00, val, GENMASK(29, 27));
289 static inline void RTW89_SET_FWCMD_RA_UPD_BW_NSS_MASK(void *cmd, u32 val)
291 le32p_replace_bits((__le32 *)(cmd) + 0x00, val, BIT(30));
294 static inline void RTW89_SET_FWCMD_RA_UPD_MASK(void *cmd, u32 val)
296 le32p_replace_bits((__le32 *)(cmd) + 0x00, val, BIT(31));
299 static inline void RTW89_SET_FWCMD_RA_MASK_0(void *cmd, u32 val)
301 le32p_replace_bits((__le32 *)(cmd) + 0x01, val, GENMASK(7, 0));
304 static inline void RTW89_SET_FWCMD_RA_MASK_1(void *cmd, u32 val)
306 le32p_replace_bits((__le32 *)(cmd) + 0x01, val, GENMASK(15, 8));
309 static inline void RTW89_SET_FWCMD_RA_MASK_2(void *cmd, u32 val)
311 le32p_replace_bits((__le32 *)(cmd) + 0x01, val, GENMASK(23, 16));
314 static inline void RTW89_SET_FWCMD_RA_MASK_3(void *cmd, u32 val)
316 le32p_replace_bits((__le32 *)(cmd) + 0x01, val, GENMASK(31, 24));
319 static inline void RTW89_SET_FWCMD_RA_MASK_4(void *cmd, u32 val)
321 le32p_replace_bits((__le32 *)(cmd) + 0x02, val, GENMASK(7, 0));
324 static inline void RTW89_SET_FWCMD_RA_BFEE_CSI_CTL(void *cmd, u32 val)
326 le32p_replace_bits((__le32 *)(cmd) + 0x02, val, BIT(31));
329 static inline void RTW89_SET_FWCMD_RA_BAND_NUM(void *cmd, u32 val)
331 le32p_replace_bits((__le32 *)(cmd) + 0x03, val, GENMASK(7, 0));
334 static inline void RTW89_SET_FWCMD_RA_RA_CSI_RATE_EN(void *cmd, u32 val)
336 le32p_replace_bits((__le32 *)(cmd) + 0x03, val, BIT(8));
339 static inline void RTW89_SET_FWCMD_RA_FIXED_CSI_RATE_EN(void *cmd, u32 val)
341 le32p_replace_bits((__le32 *)(cmd) + 0x03, val, BIT(9));
344 static inline void RTW89_SET_FWCMD_RA_CR_TBL_SEL(void *cmd, u32 val)
346 le32p_replace_bits((__le32 *)(cmd) + 0x03, val, BIT(10));
349 static inline void RTW89_SET_FWCMD_RA_FIXED_CSI_MCS_SS_IDX(void *cmd, u32 val)
351 le32p_replace_bits((__le32 *)(cmd) + 0x03, val, GENMASK(23, 16));
354 static inline void RTW89_SET_FWCMD_RA_FIXED_CSI_MODE(void *cmd, u32 val)
356 le32p_replace_bits((__le32 *)(cmd) + 0x03, val, GENMASK(25, 24));
359 static inline void RTW89_SET_FWCMD_RA_FIXED_CSI_GI_LTF(void *cmd, u32 val)
361 le32p_replace_bits((__le32 *)(cmd) + 0x03, val, GENMASK(28, 26));
364 static inline void RTW89_SET_FWCMD_RA_FIXED_CSI_BW(void *cmd, u32 val)
366 le32p_replace_bits((__le32 *)(cmd) + 0x03, val, GENMASK(31, 29));
369 static inline void RTW89_SET_FWCMD_SEC_IDX(void *cmd, u32 val)
371 le32p_replace_bits((__le32 *)(cmd) + 0x00, val, GENMASK(7, 0));
374 static inline void RTW89_SET_FWCMD_SEC_OFFSET(void *cmd, u32 val)
376 le32p_replace_bits((__le32 *)(cmd) + 0x00, val, GENMASK(15, 8));
379 static inline void RTW89_SET_FWCMD_SEC_LEN(void *cmd, u32 val)
381 le32p_replace_bits((__le32 *)(cmd) + 0x00, val, GENMASK(23, 16));
384 static inline void RTW89_SET_FWCMD_SEC_TYPE(void *cmd, u32 val)
386 le32p_replace_bits((__le32 *)(cmd) + 0x01, val, GENMASK(3, 0));
389 static inline void RTW89_SET_FWCMD_SEC_EXT_KEY(void *cmd, u32 val)
391 le32p_replace_bits((__le32 *)(cmd) + 0x01, val, BIT(4));
394 static inline void RTW89_SET_FWCMD_SEC_SPP_MODE(void *cmd, u32 val)
396 le32p_replace_bits((__le32 *)(cmd) + 0x01, val, BIT(5));
399 static inline void RTW89_SET_FWCMD_SEC_KEY0(void *cmd, u32 val)
401 le32p_replace_bits((__le32 *)(cmd) + 0x02, val, GENMASK(31, 0));
404 static inline void RTW89_SET_FWCMD_SEC_KEY1(void *cmd, u32 val)
406 le32p_replace_bits((__le32 *)(cmd) + 0x03, val, GENMASK(31, 0));
409 static inline void RTW89_SET_FWCMD_SEC_KEY2(void *cmd, u32 val)
411 le32p_replace_bits((__le32 *)(cmd) + 0x04, val, GENMASK(31, 0));
414 static inline void RTW89_SET_FWCMD_SEC_KEY3(void *cmd, u32 val)
416 le32p_replace_bits((__le32 *)(cmd) + 0x05, val, GENMASK(31, 0));
419 static inline void RTW89_SET_EDCA_SEL(void *cmd, u32 val)
421 le32p_replace_bits((__le32 *)(cmd) + 0x00, val, GENMASK(1, 0));
424 static inline void RTW89_SET_EDCA_BAND(void *cmd, u32 val)
426 le32p_replace_bits((__le32 *)(cmd) + 0x00, val, BIT(3));
429 static inline void RTW89_SET_EDCA_WMM(void *cmd, u32 val)
431 le32p_replace_bits((__le32 *)(cmd) + 0x00, val, BIT(4));
434 static inline void RTW89_SET_EDCA_AC(void *cmd, u32 val)
436 le32p_replace_bits((__le32 *)(cmd) + 0x00, val, GENMASK(6, 5));
439 static inline void RTW89_SET_EDCA_PARAM(void *cmd, u32 val)
441 le32p_replace_bits((__le32 *)(cmd) + 0x01, val, GENMASK(31, 0));
443 #define FW_EDCA_PARAM_TXOPLMT_MSK GENMASK(26, 16)
444 #define FW_EDCA_PARAM_CWMAX_MSK GENMASK(15, 12)
445 #define FW_EDCA_PARAM_CWMIN_MSK GENMASK(11, 8)
446 #define FW_EDCA_PARAM_AIFS_MSK GENMASK(7, 0)
448 #define GET_FWSECTION_HDR_SEC_SIZE(fwhdr) \
449 le32_get_bits(*((const __le32 *)(fwhdr) + 1), GENMASK(23, 0))
450 #define GET_FWSECTION_HDR_CHECKSUM(fwhdr) \
451 le32_get_bits(*((const __le32 *)(fwhdr) + 1), BIT(28))
452 #define GET_FWSECTION_HDR_REDL(fwhdr) \
453 le32_get_bits(*((const __le32 *)(fwhdr) + 1), BIT(29))
454 #define GET_FWSECTION_HDR_DL_ADDR(fwhdr) \
455 le32_get_bits(*((const __le32 *)(fwhdr)), GENMASK(31, 0))
457 #define GET_FW_HDR_MAJOR_VERSION(fwhdr) \
458 le32_get_bits(*((const __le32 *)(fwhdr) + 1), GENMASK(7, 0))
459 #define GET_FW_HDR_MINOR_VERSION(fwhdr) \
460 le32_get_bits(*((const __le32 *)(fwhdr) + 1), GENMASK(15, 8))
461 #define GET_FW_HDR_SUBVERSION(fwhdr) \
462 le32_get_bits(*((const __le32 *)(fwhdr) + 1), GENMASK(23, 16))
463 #define GET_FW_HDR_SUBINDEX(fwhdr) \
464 le32_get_bits(*((const __le32 *)(fwhdr) + 1), GENMASK(31, 24))
465 #define GET_FW_HDR_MONTH(fwhdr) \
466 le32_get_bits(*((const __le32 *)(fwhdr) + 4), GENMASK(7, 0))
467 #define GET_FW_HDR_DATE(fwhdr) \
468 le32_get_bits(*((const __le32 *)(fwhdr) + 4), GENMASK(15, 8))
469 #define GET_FW_HDR_HOUR(fwhdr) \
470 le32_get_bits(*((const __le32 *)(fwhdr) + 4), GENMASK(23, 16))
471 #define GET_FW_HDR_MIN(fwhdr) \
472 le32_get_bits(*((const __le32 *)(fwhdr) + 4), GENMASK(31, 24))
473 #define GET_FW_HDR_YEAR(fwhdr) \
474 le32_get_bits(*((const __le32 *)(fwhdr) + 5), GENMASK(31, 0))
475 #define GET_FW_HDR_SEC_NUM(fwhdr) \
476 le32_get_bits(*((const __le32 *)(fwhdr) + 6), GENMASK(15, 8))
477 #define GET_FW_HDR_CMD_VERSERION(fwhdr) \
478 le32_get_bits(*((const __le32 *)(fwhdr) + 7), GENMASK(31, 24))
479 static inline void SET_FW_HDR_PART_SIZE(void *fwhdr, u32 val)
481 le32p_replace_bits((__le32 *)fwhdr + 7, val, GENMASK(15, 0));
484 static inline void SET_CTRL_INFO_MACID(void *table, u32 val)
486 le32p_replace_bits((__le32 *)(table) + 0, val, GENMASK(6, 0));
489 static inline void SET_CTRL_INFO_OPERATION(void *table, u32 val)
491 le32p_replace_bits((__le32 *)(table) + 0, val, BIT(7));
493 #define SET_CMC_TBL_MASK_DATARATE GENMASK(8, 0)
494 static inline void SET_CMC_TBL_DATARATE(void *table, u32 val)
496 le32p_replace_bits((__le32 *)(table) + 1, val, GENMASK(8, 0));
497 le32p_replace_bits((__le32 *)(table) + 9, SET_CMC_TBL_MASK_DATARATE,
500 #define SET_CMC_TBL_MASK_FORCE_TXOP BIT(0)
501 static inline void SET_CMC_TBL_FORCE_TXOP(void *table, u32 val)
503 le32p_replace_bits((__le32 *)(table) + 1, val, BIT(9));
504 le32p_replace_bits((__le32 *)(table) + 9, SET_CMC_TBL_MASK_FORCE_TXOP,
507 #define SET_CMC_TBL_MASK_DATA_BW GENMASK(1, 0)
508 static inline void SET_CMC_TBL_DATA_BW(void *table, u32 val)
510 le32p_replace_bits((__le32 *)(table) + 1, val, GENMASK(11, 10));
511 le32p_replace_bits((__le32 *)(table) + 9, SET_CMC_TBL_MASK_DATA_BW,
514 #define SET_CMC_TBL_MASK_DATA_GI_LTF GENMASK(2, 0)
515 static inline void SET_CMC_TBL_DATA_GI_LTF(void *table, u32 val)
517 le32p_replace_bits((__le32 *)(table) + 1, val, GENMASK(14, 12));
518 le32p_replace_bits((__le32 *)(table) + 9, SET_CMC_TBL_MASK_DATA_GI_LTF,
521 #define SET_CMC_TBL_MASK_DARF_TC_INDEX BIT(0)
522 static inline void SET_CMC_TBL_DARF_TC_INDEX(void *table, u32 val)
524 le32p_replace_bits((__le32 *)(table) + 1, val, BIT(15));
525 le32p_replace_bits((__le32 *)(table) + 9, SET_CMC_TBL_MASK_DARF_TC_INDEX,
528 #define SET_CMC_TBL_MASK_ARFR_CTRL GENMASK(3, 0)
529 static inline void SET_CMC_TBL_ARFR_CTRL(void *table, u32 val)
531 le32p_replace_bits((__le32 *)(table) + 1, val, GENMASK(19, 16));
532 le32p_replace_bits((__le32 *)(table) + 9, SET_CMC_TBL_MASK_ARFR_CTRL,
535 #define SET_CMC_TBL_MASK_ACQ_RPT_EN BIT(0)
536 static inline void SET_CMC_TBL_ACQ_RPT_EN(void *table, u32 val)
538 le32p_replace_bits((__le32 *)(table) + 1, val, BIT(20));
539 le32p_replace_bits((__le32 *)(table) + 9, SET_CMC_TBL_MASK_ACQ_RPT_EN,
542 #define SET_CMC_TBL_MASK_MGQ_RPT_EN BIT(0)
543 static inline void SET_CMC_TBL_MGQ_RPT_EN(void *table, u32 val)
545 le32p_replace_bits((__le32 *)(table) + 1, val, BIT(21));
546 le32p_replace_bits((__le32 *)(table) + 9, SET_CMC_TBL_MASK_MGQ_RPT_EN,
549 #define SET_CMC_TBL_MASK_ULQ_RPT_EN BIT(0)
550 static inline void SET_CMC_TBL_ULQ_RPT_EN(void *table, u32 val)
552 le32p_replace_bits((__le32 *)(table) + 1, val, BIT(22));
553 le32p_replace_bits((__le32 *)(table) + 9, SET_CMC_TBL_MASK_ULQ_RPT_EN,
556 #define SET_CMC_TBL_MASK_TWTQ_RPT_EN BIT(0)
557 static inline void SET_CMC_TBL_TWTQ_RPT_EN(void *table, u32 val)
559 le32p_replace_bits((__le32 *)(table) + 1, val, BIT(23));
560 le32p_replace_bits((__le32 *)(table) + 9, SET_CMC_TBL_MASK_TWTQ_RPT_EN,
563 #define SET_CMC_TBL_MASK_DISRTSFB BIT(0)
564 static inline void SET_CMC_TBL_DISRTSFB(void *table, u32 val)
566 le32p_replace_bits((__le32 *)(table) + 1, val, BIT(25));
567 le32p_replace_bits((__le32 *)(table) + 9, SET_CMC_TBL_MASK_DISRTSFB,
570 #define SET_CMC_TBL_MASK_DISDATAFB BIT(0)
571 static inline void SET_CMC_TBL_DISDATAFB(void *table, u32 val)
573 le32p_replace_bits((__le32 *)(table) + 1, val, BIT(26));
574 le32p_replace_bits((__le32 *)(table) + 9, SET_CMC_TBL_MASK_DISDATAFB,
577 #define SET_CMC_TBL_MASK_TRYRATE BIT(0)
578 static inline void SET_CMC_TBL_TRYRATE(void *table, u32 val)
580 le32p_replace_bits((__le32 *)(table) + 1, val, BIT(27));
581 le32p_replace_bits((__le32 *)(table) + 9, SET_CMC_TBL_MASK_TRYRATE,
584 #define SET_CMC_TBL_MASK_AMPDU_DENSITY GENMASK(3, 0)
585 static inline void SET_CMC_TBL_AMPDU_DENSITY(void *table, u32 val)
587 le32p_replace_bits((__le32 *)(table) + 1, val, GENMASK(31, 28));
588 le32p_replace_bits((__le32 *)(table) + 9, SET_CMC_TBL_MASK_AMPDU_DENSITY,
591 #define SET_CMC_TBL_MASK_DATA_RTY_LOWEST_RATE GENMASK(8, 0)
592 static inline void SET_CMC_TBL_DATA_RTY_LOWEST_RATE(void *table, u32 val)
594 le32p_replace_bits((__le32 *)(table) + 2, val, GENMASK(8, 0));
595 le32p_replace_bits((__le32 *)(table) + 10, SET_CMC_TBL_MASK_DATA_RTY_LOWEST_RATE,
598 #define SET_CMC_TBL_MASK_AMPDU_TIME_SEL BIT(0)
599 static inline void SET_CMC_TBL_AMPDU_TIME_SEL(void *table, u32 val)
601 le32p_replace_bits((__le32 *)(table) + 2, val, BIT(9));
602 le32p_replace_bits((__le32 *)(table) + 10, SET_CMC_TBL_MASK_AMPDU_TIME_SEL,
605 #define SET_CMC_TBL_MASK_AMPDU_LEN_SEL BIT(0)
606 static inline void SET_CMC_TBL_AMPDU_LEN_SEL(void *table, u32 val)
608 le32p_replace_bits((__le32 *)(table) + 2, val, BIT(10));
609 le32p_replace_bits((__le32 *)(table) + 10, SET_CMC_TBL_MASK_AMPDU_LEN_SEL,
612 #define SET_CMC_TBL_MASK_RTS_TXCNT_LMT_SEL BIT(0)
613 static inline void SET_CMC_TBL_RTS_TXCNT_LMT_SEL(void *table, u32 val)
615 le32p_replace_bits((__le32 *)(table) + 2, val, BIT(11));
616 le32p_replace_bits((__le32 *)(table) + 10, SET_CMC_TBL_MASK_RTS_TXCNT_LMT_SEL,
619 #define SET_CMC_TBL_MASK_RTS_TXCNT_LMT GENMASK(3, 0)
620 static inline void SET_CMC_TBL_RTS_TXCNT_LMT(void *table, u32 val)
622 le32p_replace_bits((__le32 *)(table) + 2, val, GENMASK(15, 12));
623 le32p_replace_bits((__le32 *)(table) + 10, SET_CMC_TBL_MASK_RTS_TXCNT_LMT,
626 #define SET_CMC_TBL_MASK_RTSRATE GENMASK(8, 0)
627 static inline void SET_CMC_TBL_RTSRATE(void *table, u32 val)
629 le32p_replace_bits((__le32 *)(table) + 2, val, GENMASK(24, 16));
630 le32p_replace_bits((__le32 *)(table) + 10, SET_CMC_TBL_MASK_RTSRATE,
633 #define SET_CMC_TBL_MASK_VCS_STBC BIT(0)
634 static inline void SET_CMC_TBL_VCS_STBC(void *table, u32 val)
636 le32p_replace_bits((__le32 *)(table) + 2, val, BIT(27));
637 le32p_replace_bits((__le32 *)(table) + 10, SET_CMC_TBL_MASK_VCS_STBC,
640 #define SET_CMC_TBL_MASK_RTS_RTY_LOWEST_RATE GENMASK(3, 0)
641 static inline void SET_CMC_TBL_RTS_RTY_LOWEST_RATE(void *table, u32 val)
643 le32p_replace_bits((__le32 *)(table) + 2, val, GENMASK(31, 28));
644 le32p_replace_bits((__le32 *)(table) + 10, SET_CMC_TBL_MASK_RTS_RTY_LOWEST_RATE,
647 #define SET_CMC_TBL_MASK_DATA_TX_CNT_LMT GENMASK(5, 0)
648 static inline void SET_CMC_TBL_DATA_TX_CNT_LMT(void *table, u32 val)
650 le32p_replace_bits((__le32 *)(table) + 3, val, GENMASK(5, 0));
651 le32p_replace_bits((__le32 *)(table) + 11, SET_CMC_TBL_MASK_DATA_TX_CNT_LMT,
654 #define SET_CMC_TBL_MASK_DATA_TXCNT_LMT_SEL BIT(0)
655 static inline void SET_CMC_TBL_DATA_TXCNT_LMT_SEL(void *table, u32 val)
657 le32p_replace_bits((__le32 *)(table) + 3, val, BIT(6));
658 le32p_replace_bits((__le32 *)(table) + 11, SET_CMC_TBL_MASK_DATA_TXCNT_LMT_SEL,
661 #define SET_CMC_TBL_MASK_MAX_AGG_NUM_SEL BIT(0)
662 static inline void SET_CMC_TBL_MAX_AGG_NUM_SEL(void *table, u32 val)
664 le32p_replace_bits((__le32 *)(table) + 3, val, BIT(7));
665 le32p_replace_bits((__le32 *)(table) + 11, SET_CMC_TBL_MASK_MAX_AGG_NUM_SEL,
668 #define SET_CMC_TBL_MASK_RTS_EN BIT(0)
669 static inline void SET_CMC_TBL_RTS_EN(void *table, u32 val)
671 le32p_replace_bits((__le32 *)(table) + 3, val, BIT(8));
672 le32p_replace_bits((__le32 *)(table) + 11, SET_CMC_TBL_MASK_RTS_EN,
675 #define SET_CMC_TBL_MASK_CTS2SELF_EN BIT(0)
676 static inline void SET_CMC_TBL_CTS2SELF_EN(void *table, u32 val)
678 le32p_replace_bits((__le32 *)(table) + 3, val, BIT(9));
679 le32p_replace_bits((__le32 *)(table) + 11, SET_CMC_TBL_MASK_CTS2SELF_EN,
682 #define SET_CMC_TBL_MASK_CCA_RTS GENMASK(1, 0)
683 static inline void SET_CMC_TBL_CCA_RTS(void *table, u32 val)
685 le32p_replace_bits((__le32 *)(table) + 3, val, GENMASK(11, 10));
686 le32p_replace_bits((__le32 *)(table) + 11, SET_CMC_TBL_MASK_CCA_RTS,
689 #define SET_CMC_TBL_MASK_HW_RTS_EN BIT(0)
690 static inline void SET_CMC_TBL_HW_RTS_EN(void *table, u32 val)
692 le32p_replace_bits((__le32 *)(table) + 3, val, BIT(12));
693 le32p_replace_bits((__le32 *)(table) + 11, SET_CMC_TBL_MASK_HW_RTS_EN,
696 #define SET_CMC_TBL_MASK_RTS_DROP_DATA_MODE GENMASK(1, 0)
697 static inline void SET_CMC_TBL_RTS_DROP_DATA_MODE(void *table, u32 val)
699 le32p_replace_bits((__le32 *)(table) + 3, val, GENMASK(14, 13));
700 le32p_replace_bits((__le32 *)(table) + 11, SET_CMC_TBL_MASK_RTS_DROP_DATA_MODE,
703 #define SET_CMC_TBL_MASK_AMPDU_MAX_LEN GENMASK(10, 0)
704 static inline void SET_CMC_TBL_AMPDU_MAX_LEN(void *table, u32 val)
706 le32p_replace_bits((__le32 *)(table) + 3, val, GENMASK(26, 16));
707 le32p_replace_bits((__le32 *)(table) + 11, SET_CMC_TBL_MASK_AMPDU_MAX_LEN,
710 #define SET_CMC_TBL_MASK_UL_MU_DIS BIT(0)
711 static inline void SET_CMC_TBL_UL_MU_DIS(void *table, u32 val)
713 le32p_replace_bits((__le32 *)(table) + 3, val, BIT(27));
714 le32p_replace_bits((__le32 *)(table) + 11, SET_CMC_TBL_MASK_UL_MU_DIS,
717 #define SET_CMC_TBL_MASK_AMPDU_MAX_TIME GENMASK(3, 0)
718 static inline void SET_CMC_TBL_AMPDU_MAX_TIME(void *table, u32 val)
720 le32p_replace_bits((__le32 *)(table) + 3, val, GENMASK(31, 28));
721 le32p_replace_bits((__le32 *)(table) + 11, SET_CMC_TBL_MASK_AMPDU_MAX_TIME,
724 #define SET_CMC_TBL_MASK_MAX_AGG_NUM GENMASK(7, 0)
725 static inline void SET_CMC_TBL_MAX_AGG_NUM(void *table, u32 val)
727 le32p_replace_bits((__le32 *)(table) + 4, val, GENMASK(7, 0));
728 le32p_replace_bits((__le32 *)(table) + 12, SET_CMC_TBL_MASK_MAX_AGG_NUM,
731 #define SET_CMC_TBL_MASK_BA_BMAP GENMASK(1, 0)
732 static inline void SET_CMC_TBL_BA_BMAP(void *table, u32 val)
734 le32p_replace_bits((__le32 *)(table) + 4, val, GENMASK(9, 8));
735 le32p_replace_bits((__le32 *)(table) + 12, SET_CMC_TBL_MASK_BA_BMAP,
738 #define SET_CMC_TBL_MASK_VO_LFTIME_SEL GENMASK(2, 0)
739 static inline void SET_CMC_TBL_VO_LFTIME_SEL(void *table, u32 val)
741 le32p_replace_bits((__le32 *)(table) + 4, val, GENMASK(18, 16));
742 le32p_replace_bits((__le32 *)(table) + 12, SET_CMC_TBL_MASK_VO_LFTIME_SEL,
745 #define SET_CMC_TBL_MASK_VI_LFTIME_SEL GENMASK(2, 0)
746 static inline void SET_CMC_TBL_VI_LFTIME_SEL(void *table, u32 val)
748 le32p_replace_bits((__le32 *)(table) + 4, val, GENMASK(21, 19));
749 le32p_replace_bits((__le32 *)(table) + 12, SET_CMC_TBL_MASK_VI_LFTIME_SEL,
752 #define SET_CMC_TBL_MASK_BE_LFTIME_SEL GENMASK(2, 0)
753 static inline void SET_CMC_TBL_BE_LFTIME_SEL(void *table, u32 val)
755 le32p_replace_bits((__le32 *)(table) + 4, val, GENMASK(24, 22));
756 le32p_replace_bits((__le32 *)(table) + 12, SET_CMC_TBL_MASK_BE_LFTIME_SEL,
759 #define SET_CMC_TBL_MASK_BK_LFTIME_SEL GENMASK(2, 0)
760 static inline void SET_CMC_TBL_BK_LFTIME_SEL(void *table, u32 val)
762 le32p_replace_bits((__le32 *)(table) + 4, val, GENMASK(27, 25));
763 le32p_replace_bits((__le32 *)(table) + 12, SET_CMC_TBL_MASK_BK_LFTIME_SEL,
766 #define SET_CMC_TBL_MASK_SECTYPE GENMASK(3, 0)
767 static inline void SET_CMC_TBL_SECTYPE(void *table, u32 val)
769 le32p_replace_bits((__le32 *)(table) + 4, val, GENMASK(31, 28));
770 le32p_replace_bits((__le32 *)(table) + 12, SET_CMC_TBL_MASK_SECTYPE,
773 #define SET_CMC_TBL_MASK_MULTI_PORT_ID GENMASK(2, 0)
774 static inline void SET_CMC_TBL_MULTI_PORT_ID(void *table, u32 val)
776 le32p_replace_bits((__le32 *)(table) + 5, val, GENMASK(2, 0));
777 le32p_replace_bits((__le32 *)(table) + 13, SET_CMC_TBL_MASK_MULTI_PORT_ID,
780 #define SET_CMC_TBL_MASK_BMC BIT(0)
781 static inline void SET_CMC_TBL_BMC(void *table, u32 val)
783 le32p_replace_bits((__le32 *)(table) + 5, val, BIT(3));
784 le32p_replace_bits((__le32 *)(table) + 13, SET_CMC_TBL_MASK_BMC,
787 #define SET_CMC_TBL_MASK_MBSSID GENMASK(3, 0)
788 static inline void SET_CMC_TBL_MBSSID(void *table, u32 val)
790 le32p_replace_bits((__le32 *)(table) + 5, val, GENMASK(7, 4));
791 le32p_replace_bits((__le32 *)(table) + 13, SET_CMC_TBL_MASK_MBSSID,
794 #define SET_CMC_TBL_MASK_NAVUSEHDR BIT(0)
795 static inline void SET_CMC_TBL_NAVUSEHDR(void *table, u32 val)
797 le32p_replace_bits((__le32 *)(table) + 5, val, BIT(8));
798 le32p_replace_bits((__le32 *)(table) + 13, SET_CMC_TBL_MASK_NAVUSEHDR,
801 #define SET_CMC_TBL_MASK_TXPWR_MODE GENMASK(2, 0)
802 static inline void SET_CMC_TBL_TXPWR_MODE(void *table, u32 val)
804 le32p_replace_bits((__le32 *)(table) + 5, val, GENMASK(11, 9));
805 le32p_replace_bits((__le32 *)(table) + 13, SET_CMC_TBL_MASK_TXPWR_MODE,
808 #define SET_CMC_TBL_MASK_DATA_DCM BIT(0)
809 static inline void SET_CMC_TBL_DATA_DCM(void *table, u32 val)
811 le32p_replace_bits((__le32 *)(table) + 5, val, BIT(12));
812 le32p_replace_bits((__le32 *)(table) + 13, SET_CMC_TBL_MASK_DATA_DCM,
815 #define SET_CMC_TBL_MASK_DATA_ER BIT(0)
816 static inline void SET_CMC_TBL_DATA_ER(void *table, u32 val)
818 le32p_replace_bits((__le32 *)(table) + 5, val, BIT(13));
819 le32p_replace_bits((__le32 *)(table) + 13, SET_CMC_TBL_MASK_DATA_ER,
822 #define SET_CMC_TBL_MASK_DATA_LDPC BIT(0)
823 static inline void SET_CMC_TBL_DATA_LDPC(void *table, u32 val)
825 le32p_replace_bits((__le32 *)(table) + 5, val, BIT(14));
826 le32p_replace_bits((__le32 *)(table) + 13, SET_CMC_TBL_MASK_DATA_LDPC,
829 #define SET_CMC_TBL_MASK_DATA_STBC BIT(0)
830 static inline void SET_CMC_TBL_DATA_STBC(void *table, u32 val)
832 le32p_replace_bits((__le32 *)(table) + 5, val, BIT(15));
833 le32p_replace_bits((__le32 *)(table) + 13, SET_CMC_TBL_MASK_DATA_STBC,
836 #define SET_CMC_TBL_MASK_A_CTRL_BQR BIT(0)
837 static inline void SET_CMC_TBL_A_CTRL_BQR(void *table, u32 val)
839 le32p_replace_bits((__le32 *)(table) + 5, val, BIT(16));
840 le32p_replace_bits((__le32 *)(table) + 13, SET_CMC_TBL_MASK_A_CTRL_BQR,
843 #define SET_CMC_TBL_MASK_A_CTRL_UPH BIT(0)
844 static inline void SET_CMC_TBL_A_CTRL_UPH(void *table, u32 val)
846 le32p_replace_bits((__le32 *)(table) + 5, val, BIT(17));
847 le32p_replace_bits((__le32 *)(table) + 13, SET_CMC_TBL_MASK_A_CTRL_UPH,
850 #define SET_CMC_TBL_MASK_A_CTRL_BSR BIT(0)
851 static inline void SET_CMC_TBL_A_CTRL_BSR(void *table, u32 val)
853 le32p_replace_bits((__le32 *)(table) + 5, val, BIT(18));
854 le32p_replace_bits((__le32 *)(table) + 13, SET_CMC_TBL_MASK_A_CTRL_BSR,
857 #define SET_CMC_TBL_MASK_A_CTRL_CAS BIT(0)
858 static inline void SET_CMC_TBL_A_CTRL_CAS(void *table, u32 val)
860 le32p_replace_bits((__le32 *)(table) + 5, val, BIT(19));
861 le32p_replace_bits((__le32 *)(table) + 13, SET_CMC_TBL_MASK_A_CTRL_CAS,
864 #define SET_CMC_TBL_MASK_DATA_BW_ER BIT(0)
865 static inline void SET_CMC_TBL_DATA_BW_ER(void *table, u32 val)
867 le32p_replace_bits((__le32 *)(table) + 5, val, BIT(20));
868 le32p_replace_bits((__le32 *)(table) + 13, SET_CMC_TBL_MASK_DATA_BW_ER,
871 #define SET_CMC_TBL_MASK_LSIG_TXOP_EN BIT(0)
872 static inline void SET_CMC_TBL_LSIG_TXOP_EN(void *table, u32 val)
874 le32p_replace_bits((__le32 *)(table) + 5, val, BIT(21));
875 le32p_replace_bits((__le32 *)(table) + 13, SET_CMC_TBL_MASK_LSIG_TXOP_EN,
878 #define SET_CMC_TBL_MASK_CTRL_CNT_VLD BIT(0)
879 static inline void SET_CMC_TBL_CTRL_CNT_VLD(void *table, u32 val)
881 le32p_replace_bits((__le32 *)(table) + 5, val, BIT(27));
882 le32p_replace_bits((__le32 *)(table) + 13, SET_CMC_TBL_MASK_CTRL_CNT_VLD,
885 #define SET_CMC_TBL_MASK_CTRL_CNT GENMASK(3, 0)
886 static inline void SET_CMC_TBL_CTRL_CNT(void *table, u32 val)
888 le32p_replace_bits((__le32 *)(table) + 5, val, GENMASK(31, 28));
889 le32p_replace_bits((__le32 *)(table) + 13, SET_CMC_TBL_MASK_CTRL_CNT,
892 #define SET_CMC_TBL_MASK_RESP_REF_RATE GENMASK(8, 0)
893 static inline void SET_CMC_TBL_RESP_REF_RATE(void *table, u32 val)
895 le32p_replace_bits((__le32 *)(table) + 6, val, GENMASK(8, 0));
896 le32p_replace_bits((__le32 *)(table) + 14, SET_CMC_TBL_MASK_RESP_REF_RATE,
899 #define SET_CMC_TBL_MASK_ALL_ACK_SUPPORT BIT(0)
900 static inline void SET_CMC_TBL_ALL_ACK_SUPPORT(void *table, u32 val)
902 le32p_replace_bits((__le32 *)(table) + 6, val, BIT(12));
903 le32p_replace_bits((__le32 *)(table) + 14, SET_CMC_TBL_MASK_ALL_ACK_SUPPORT,
906 #define SET_CMC_TBL_MASK_BSR_QUEUE_SIZE_FORMAT BIT(0)
907 static inline void SET_CMC_TBL_BSR_QUEUE_SIZE_FORMAT(void *table, u32 val)
909 le32p_replace_bits((__le32 *)(table) + 6, val, BIT(13));
910 le32p_replace_bits((__le32 *)(table) + 14, SET_CMC_TBL_MASK_BSR_QUEUE_SIZE_FORMAT,
913 #define SET_CMC_TBL_MASK_NTX_PATH_EN GENMASK(3, 0)
914 static inline void SET_CMC_TBL_NTX_PATH_EN(void *table, u32 val)
916 le32p_replace_bits((__le32 *)(table) + 6, val, GENMASK(19, 16));
917 le32p_replace_bits((__le32 *)(table) + 14, SET_CMC_TBL_MASK_NTX_PATH_EN,
920 #define SET_CMC_TBL_MASK_PATH_MAP_A GENMASK(1, 0)
921 static inline void SET_CMC_TBL_PATH_MAP_A(void *table, u32 val)
923 le32p_replace_bits((__le32 *)(table) + 6, val, GENMASK(21, 20));
924 le32p_replace_bits((__le32 *)(table) + 14, SET_CMC_TBL_MASK_PATH_MAP_A,
927 #define SET_CMC_TBL_MASK_PATH_MAP_B GENMASK(1, 0)
928 static inline void SET_CMC_TBL_PATH_MAP_B(void *table, u32 val)
930 le32p_replace_bits((__le32 *)(table) + 6, val, GENMASK(23, 22));
931 le32p_replace_bits((__le32 *)(table) + 14, SET_CMC_TBL_MASK_PATH_MAP_B,
934 #define SET_CMC_TBL_MASK_PATH_MAP_C GENMASK(1, 0)
935 static inline void SET_CMC_TBL_PATH_MAP_C(void *table, u32 val)
937 le32p_replace_bits((__le32 *)(table) + 6, val, GENMASK(25, 24));
938 le32p_replace_bits((__le32 *)(table) + 14, SET_CMC_TBL_MASK_PATH_MAP_C,
941 #define SET_CMC_TBL_MASK_PATH_MAP_D GENMASK(1, 0)
942 static inline void SET_CMC_TBL_PATH_MAP_D(void *table, u32 val)
944 le32p_replace_bits((__le32 *)(table) + 6, val, GENMASK(27, 26));
945 le32p_replace_bits((__le32 *)(table) + 14, SET_CMC_TBL_MASK_PATH_MAP_D,
948 #define SET_CMC_TBL_MASK_ANTSEL_A BIT(0)
949 static inline void SET_CMC_TBL_ANTSEL_A(void *table, u32 val)
951 le32p_replace_bits((__le32 *)(table) + 6, val, BIT(28));
952 le32p_replace_bits((__le32 *)(table) + 14, SET_CMC_TBL_MASK_ANTSEL_A,
955 #define SET_CMC_TBL_MASK_ANTSEL_B BIT(0)
956 static inline void SET_CMC_TBL_ANTSEL_B(void *table, u32 val)
958 le32p_replace_bits((__le32 *)(table) + 6, val, BIT(29));
959 le32p_replace_bits((__le32 *)(table) + 14, SET_CMC_TBL_MASK_ANTSEL_B,
962 #define SET_CMC_TBL_MASK_ANTSEL_C BIT(0)
963 static inline void SET_CMC_TBL_ANTSEL_C(void *table, u32 val)
965 le32p_replace_bits((__le32 *)(table) + 6, val, BIT(30));
966 le32p_replace_bits((__le32 *)(table) + 14, SET_CMC_TBL_MASK_ANTSEL_C,
969 #define SET_CMC_TBL_MASK_ANTSEL_D BIT(0)
970 static inline void SET_CMC_TBL_ANTSEL_D(void *table, u32 val)
972 le32p_replace_bits((__le32 *)(table) + 6, val, BIT(31));
973 le32p_replace_bits((__le32 *)(table) + 14, SET_CMC_TBL_MASK_ANTSEL_D,
977 #define SET_CMC_TBL_MASK_NOMINAL_PKT_PADDING GENMASK(1, 0)
978 static inline void SET_CMC_TBL_NOMINAL_PKT_PADDING_V1(void *table, u32 val)
980 le32p_replace_bits((__le32 *)(table) + 7, val, GENMASK(1, 0));
981 le32p_replace_bits((__le32 *)(table) + 15, SET_CMC_TBL_MASK_NOMINAL_PKT_PADDING,
985 static inline void SET_CMC_TBL_NOMINAL_PKT_PADDING40_V1(void *table, u32 val)
987 le32p_replace_bits((__le32 *)(table) + 7, val, GENMASK(3, 2));
988 le32p_replace_bits((__le32 *)(table) + 15, SET_CMC_TBL_MASK_NOMINAL_PKT_PADDING,
992 static inline void SET_CMC_TBL_NOMINAL_PKT_PADDING80_V1(void *table, u32 val)
994 le32p_replace_bits((__le32 *)(table) + 7, val, GENMASK(5, 4));
995 le32p_replace_bits((__le32 *)(table) + 15, SET_CMC_TBL_MASK_NOMINAL_PKT_PADDING,
999 static inline void SET_CMC_TBL_NOMINAL_PKT_PADDING160_V1(void *table, u32 val)
1001 le32p_replace_bits((__le32 *)(table) + 7, val, GENMASK(7, 6));
1002 le32p_replace_bits((__le32 *)(table) + 15, SET_CMC_TBL_MASK_NOMINAL_PKT_PADDING,
1006 #define SET_CMC_TBL_MASK_ADDR_CAM_INDEX GENMASK(7, 0)
1007 static inline void SET_CMC_TBL_ADDR_CAM_INDEX(void *table, u32 val)
1009 le32p_replace_bits((__le32 *)(table) + 7, val, GENMASK(7, 0));
1010 le32p_replace_bits((__le32 *)(table) + 15, SET_CMC_TBL_MASK_ADDR_CAM_INDEX,
1013 #define SET_CMC_TBL_MASK_PAID GENMASK(8, 0)
1014 static inline void SET_CMC_TBL_PAID(void *table, u32 val)
1016 le32p_replace_bits((__le32 *)(table) + 7, val, GENMASK(16, 8));
1017 le32p_replace_bits((__le32 *)(table) + 15, SET_CMC_TBL_MASK_PAID,
1020 #define SET_CMC_TBL_MASK_ULDL BIT(0)
1021 static inline void SET_CMC_TBL_ULDL(void *table, u32 val)
1023 le32p_replace_bits((__le32 *)(table) + 7, val, BIT(17));
1024 le32p_replace_bits((__le32 *)(table) + 15, SET_CMC_TBL_MASK_ULDL,
1027 #define SET_CMC_TBL_MASK_DOPPLER_CTRL GENMASK(1, 0)
1028 static inline void SET_CMC_TBL_DOPPLER_CTRL(void *table, u32 val)
1030 le32p_replace_bits((__le32 *)(table) + 7, val, GENMASK(19, 18));
1031 le32p_replace_bits((__le32 *)(table) + 15, SET_CMC_TBL_MASK_DOPPLER_CTRL,
1034 static inline void SET_CMC_TBL_NOMINAL_PKT_PADDING(void *table, u32 val)
1036 le32p_replace_bits((__le32 *)(table) + 7, val, GENMASK(21, 20));
1037 le32p_replace_bits((__le32 *)(table) + 15, SET_CMC_TBL_MASK_NOMINAL_PKT_PADDING,
1041 static inline void SET_CMC_TBL_NOMINAL_PKT_PADDING40(void *table, u32 val)
1043 le32p_replace_bits((__le32 *)(table) + 7, val, GENMASK(23, 22));
1044 le32p_replace_bits((__le32 *)(table) + 15, SET_CMC_TBL_MASK_NOMINAL_PKT_PADDING,
1047 #define SET_CMC_TBL_MASK_TXPWR_TOLERENCE GENMASK(3, 0)
1048 static inline void SET_CMC_TBL_TXPWR_TOLERENCE(void *table, u32 val)
1050 le32p_replace_bits((__le32 *)(table) + 7, val, GENMASK(27, 24));
1051 le32p_replace_bits((__le32 *)(table) + 15, SET_CMC_TBL_MASK_TXPWR_TOLERENCE,
1055 static inline void SET_CMC_TBL_NOMINAL_PKT_PADDING80(void *table, u32 val)
1057 le32p_replace_bits((__le32 *)(table) + 7, val, GENMASK(31, 30));
1058 le32p_replace_bits((__le32 *)(table) + 15, SET_CMC_TBL_MASK_NOMINAL_PKT_PADDING,
1061 #define SET_CMC_TBL_MASK_NC GENMASK(2, 0)
1062 static inline void SET_CMC_TBL_NC(void *table, u32 val)
1064 le32p_replace_bits((__le32 *)(table) + 8, val, GENMASK(2, 0));
1065 le32p_replace_bits((__le32 *)(table) + 16, SET_CMC_TBL_MASK_NC,
1068 #define SET_CMC_TBL_MASK_NR GENMASK(2, 0)
1069 static inline void SET_CMC_TBL_NR(void *table, u32 val)
1071 le32p_replace_bits((__le32 *)(table) + 8, val, GENMASK(5, 3));
1072 le32p_replace_bits((__le32 *)(table) + 16, SET_CMC_TBL_MASK_NR,
1075 #define SET_CMC_TBL_MASK_NG GENMASK(1, 0)
1076 static inline void SET_CMC_TBL_NG(void *table, u32 val)
1078 le32p_replace_bits((__le32 *)(table) + 8, val, GENMASK(7, 6));
1079 le32p_replace_bits((__le32 *)(table) + 16, SET_CMC_TBL_MASK_NG,
1082 #define SET_CMC_TBL_MASK_CB GENMASK(1, 0)
1083 static inline void SET_CMC_TBL_CB(void *table, u32 val)
1085 le32p_replace_bits((__le32 *)(table) + 8, val, GENMASK(9, 8));
1086 le32p_replace_bits((__le32 *)(table) + 16, SET_CMC_TBL_MASK_CB,
1089 #define SET_CMC_TBL_MASK_CS GENMASK(1, 0)
1090 static inline void SET_CMC_TBL_CS(void *table, u32 val)
1092 le32p_replace_bits((__le32 *)(table) + 8, val, GENMASK(11, 10));
1093 le32p_replace_bits((__le32 *)(table) + 16, SET_CMC_TBL_MASK_CS,
1096 #define SET_CMC_TBL_MASK_CSI_TXBF_EN BIT(0)
1097 static inline void SET_CMC_TBL_CSI_TXBF_EN(void *table, u32 val)
1099 le32p_replace_bits((__le32 *)(table) + 8, val, BIT(12));
1100 le32p_replace_bits((__le32 *)(table) + 16, SET_CMC_TBL_MASK_CSI_TXBF_EN,
1103 #define SET_CMC_TBL_MASK_CSI_STBC_EN BIT(0)
1104 static inline void SET_CMC_TBL_CSI_STBC_EN(void *table, u32 val)
1106 le32p_replace_bits((__le32 *)(table) + 8, val, BIT(13));
1107 le32p_replace_bits((__le32 *)(table) + 16, SET_CMC_TBL_MASK_CSI_STBC_EN,
1110 #define SET_CMC_TBL_MASK_CSI_LDPC_EN BIT(0)
1111 static inline void SET_CMC_TBL_CSI_LDPC_EN(void *table, u32 val)
1113 le32p_replace_bits((__le32 *)(table) + 8, val, BIT(14));
1114 le32p_replace_bits((__le32 *)(table) + 16, SET_CMC_TBL_MASK_CSI_LDPC_EN,
1117 #define SET_CMC_TBL_MASK_CSI_PARA_EN BIT(0)
1118 static inline void SET_CMC_TBL_CSI_PARA_EN(void *table, u32 val)
1120 le32p_replace_bits((__le32 *)(table) + 8, val, BIT(15));
1121 le32p_replace_bits((__le32 *)(table) + 16, SET_CMC_TBL_MASK_CSI_PARA_EN,
1124 #define SET_CMC_TBL_MASK_CSI_FIX_RATE GENMASK(8, 0)
1125 static inline void SET_CMC_TBL_CSI_FIX_RATE(void *table, u32 val)
1127 le32p_replace_bits((__le32 *)(table) + 8, val, GENMASK(24, 16));
1128 le32p_replace_bits((__le32 *)(table) + 16, SET_CMC_TBL_MASK_CSI_FIX_RATE,
1131 #define SET_CMC_TBL_MASK_CSI_GI_LTF GENMASK(2, 0)
1132 static inline void SET_CMC_TBL_CSI_GI_LTF(void *table, u32 val)
1134 le32p_replace_bits((__le32 *)(table) + 8, val, GENMASK(27, 25));
1135 le32p_replace_bits((__le32 *)(table) + 16, SET_CMC_TBL_MASK_CSI_GI_LTF,
1139 static inline void SET_CMC_TBL_NOMINAL_PKT_PADDING160(void *table, u32 val)
1141 le32p_replace_bits((__le32 *)(table) + 8, val, GENMASK(29, 28));
1142 le32p_replace_bits((__le32 *)(table) + 16, SET_CMC_TBL_MASK_NOMINAL_PKT_PADDING,
1146 #define SET_CMC_TBL_MASK_CSI_BW GENMASK(1, 0)
1147 static inline void SET_CMC_TBL_CSI_BW(void *table, u32 val)
1149 le32p_replace_bits((__le32 *)(table) + 8, val, GENMASK(31, 30));
1150 le32p_replace_bits((__le32 *)(table) + 16, SET_CMC_TBL_MASK_CSI_BW,
1154 static inline void SET_DCTL_MACID_V1(void *table, u32 val)
1156 le32p_replace_bits((__le32 *)(table) + 0, val, GENMASK(6, 0));
1159 static inline void SET_DCTL_OPERATION_V1(void *table, u32 val)
1161 le32p_replace_bits((__le32 *)(table) + 0, val, BIT(7));
1164 #define SET_DCTL_MASK_QOS_FIELD_V1 GENMASK(7, 0)
1165 static inline void SET_DCTL_QOS_FIELD_V1(void *table, u32 val)
1167 le32p_replace_bits((__le32 *)(table) + 1, val, GENMASK(7, 0));
1168 le32p_replace_bits((__le32 *)(table) + 9, SET_DCTL_MASK_QOS_FIELD_V1,
1172 #define SET_DCTL_MASK_SET_DCTL_HW_EXSEQ_MACID GENMASK(6, 0)
1173 static inline void SET_DCTL_HW_EXSEQ_MACID_V1(void *table, u32 val)
1175 le32p_replace_bits((__le32 *)(table) + 1, val, GENMASK(14, 8));
1176 le32p_replace_bits((__le32 *)(table) + 9, SET_DCTL_MASK_SET_DCTL_HW_EXSEQ_MACID,
1180 #define SET_DCTL_MASK_QOS_DATA BIT(0)
1181 static inline void SET_DCTL_QOS_DATA_V1(void *table, u32 val)
1183 le32p_replace_bits((__le32 *)(table) + 1, val, BIT(15));
1184 le32p_replace_bits((__le32 *)(table) + 9, SET_DCTL_MASK_QOS_DATA,
1188 #define SET_DCTL_MASK_AES_IV_L GENMASK(15, 0)
1189 static inline void SET_DCTL_AES_IV_L_V1(void *table, u32 val)
1191 le32p_replace_bits((__le32 *)(table) + 1, val, GENMASK(31, 16));
1192 le32p_replace_bits((__le32 *)(table) + 9, SET_DCTL_MASK_AES_IV_L,
1196 #define SET_DCTL_MASK_AES_IV_H GENMASK(31, 0)
1197 static inline void SET_DCTL_AES_IV_H_V1(void *table, u32 val)
1199 le32p_replace_bits((__le32 *)(table) + 2, val, GENMASK(31, 0));
1200 le32p_replace_bits((__le32 *)(table) + 10, SET_DCTL_MASK_AES_IV_H,
1204 #define SET_DCTL_MASK_SEQ0 GENMASK(11, 0)
1205 static inline void SET_DCTL_SEQ0_V1(void *table, u32 val)
1207 le32p_replace_bits((__le32 *)(table) + 3, val, GENMASK(11, 0));
1208 le32p_replace_bits((__le32 *)(table) + 11, SET_DCTL_MASK_SEQ0,
1212 #define SET_DCTL_MASK_SEQ1 GENMASK(11, 0)
1213 static inline void SET_DCTL_SEQ1_V1(void *table, u32 val)
1215 le32p_replace_bits((__le32 *)(table) + 3, val, GENMASK(23, 12));
1216 le32p_replace_bits((__le32 *)(table) + 11, SET_DCTL_MASK_SEQ1,
1220 #define SET_DCTL_MASK_AMSDU_MAX_LEN GENMASK(2, 0)
1221 static inline void SET_DCTL_AMSDU_MAX_LEN_V1(void *table, u32 val)
1223 le32p_replace_bits((__le32 *)(table) + 3, val, GENMASK(26, 24));
1224 le32p_replace_bits((__le32 *)(table) + 11, SET_DCTL_MASK_AMSDU_MAX_LEN,
1228 #define SET_DCTL_MASK_STA_AMSDU_EN BIT(0)
1229 static inline void SET_DCTL_STA_AMSDU_EN_V1(void *table, u32 val)
1231 le32p_replace_bits((__le32 *)(table) + 3, val, BIT(27));
1232 le32p_replace_bits((__le32 *)(table) + 11, SET_DCTL_MASK_STA_AMSDU_EN,
1236 #define SET_DCTL_MASK_CHKSUM_OFLD_EN BIT(0)
1237 static inline void SET_DCTL_CHKSUM_OFLD_EN_V1(void *table, u32 val)
1239 le32p_replace_bits((__le32 *)(table) + 3, val, BIT(28));
1240 le32p_replace_bits((__le32 *)(table) + 11, SET_DCTL_MASK_CHKSUM_OFLD_EN,
1244 #define SET_DCTL_MASK_WITH_LLC BIT(0)
1245 static inline void SET_DCTL_WITH_LLC_V1(void *table, u32 val)
1247 le32p_replace_bits((__le32 *)(table) + 3, val, BIT(29));
1248 le32p_replace_bits((__le32 *)(table) + 11, SET_DCTL_MASK_WITH_LLC,
1252 #define SET_DCTL_MASK_SEQ2 GENMASK(11, 0)
1253 static inline void SET_DCTL_SEQ2_V1(void *table, u32 val)
1255 le32p_replace_bits((__le32 *)(table) + 4, val, GENMASK(11, 0));
1256 le32p_replace_bits((__le32 *)(table) + 12, SET_DCTL_MASK_SEQ2,
1260 #define SET_DCTL_MASK_SEQ3 GENMASK(11, 0)
1261 static inline void SET_DCTL_SEQ3_V1(void *table, u32 val)
1263 le32p_replace_bits((__le32 *)(table) + 4, val, GENMASK(23, 12));
1264 le32p_replace_bits((__le32 *)(table) + 12, SET_DCTL_MASK_SEQ3,
1268 #define SET_DCTL_MASK_TGT_IND GENMASK(3, 0)
1269 static inline void SET_DCTL_TGT_IND_V1(void *table, u32 val)
1271 le32p_replace_bits((__le32 *)(table) + 4, val, GENMASK(27, 24));
1272 le32p_replace_bits((__le32 *)(table) + 12, SET_DCTL_MASK_TGT_IND,
1276 #define SET_DCTL_MASK_TGT_IND_EN BIT(0)
1277 static inline void SET_DCTL_TGT_IND_EN_V1(void *table, u32 val)
1279 le32p_replace_bits((__le32 *)(table) + 4, val, BIT(28));
1280 le32p_replace_bits((__le32 *)(table) + 12, SET_DCTL_MASK_TGT_IND_EN,
1284 #define SET_DCTL_MASK_HTC_LB GENMASK(2, 0)
1285 static inline void SET_DCTL_HTC_LB_V1(void *table, u32 val)
1287 le32p_replace_bits((__le32 *)(table) + 4, val, GENMASK(31, 29));
1288 le32p_replace_bits((__le32 *)(table) + 12, SET_DCTL_MASK_HTC_LB,
1292 #define SET_DCTL_MASK_MHDR_LEN GENMASK(4, 0)
1293 static inline void SET_DCTL_MHDR_LEN_V1(void *table, u32 val)
1295 le32p_replace_bits((__le32 *)(table) + 5, val, GENMASK(4, 0));
1296 le32p_replace_bits((__le32 *)(table) + 13, SET_DCTL_MASK_MHDR_LEN,
1300 #define SET_DCTL_MASK_VLAN_TAG_VALID BIT(0)
1301 static inline void SET_DCTL_VLAN_TAG_VALID_V1(void *table, u32 val)
1303 le32p_replace_bits((__le32 *)(table) + 5, val, BIT(5));
1304 le32p_replace_bits((__le32 *)(table) + 13, SET_DCTL_MASK_VLAN_TAG_VALID,
1308 #define SET_DCTL_MASK_VLAN_TAG_SEL GENMASK(1, 0)
1309 static inline void SET_DCTL_VLAN_TAG_SEL_V1(void *table, u32 val)
1311 le32p_replace_bits((__le32 *)(table) + 5, val, GENMASK(7, 6));
1312 le32p_replace_bits((__le32 *)(table) + 13, SET_DCTL_MASK_VLAN_TAG_SEL,
1316 #define SET_DCTL_MASK_HTC_ORDER BIT(0)
1317 static inline void SET_DCTL_HTC_ORDER_V1(void *table, u32 val)
1319 le32p_replace_bits((__le32 *)(table) + 5, val, BIT(8));
1320 le32p_replace_bits((__le32 *)(table) + 13, SET_DCTL_MASK_HTC_ORDER,
1324 #define SET_DCTL_MASK_SEC_KEY_ID GENMASK(1, 0)
1325 static inline void SET_DCTL_SEC_KEY_ID_V1(void *table, u32 val)
1327 le32p_replace_bits((__le32 *)(table) + 5, val, GENMASK(10, 9));
1328 le32p_replace_bits((__le32 *)(table) + 13, SET_DCTL_MASK_SEC_KEY_ID,
1332 #define SET_DCTL_MASK_WAPI BIT(0)
1333 static inline void SET_DCTL_WAPI_V1(void *table, u32 val)
1335 le32p_replace_bits((__le32 *)(table) + 5, val, BIT(15));
1336 le32p_replace_bits((__le32 *)(table) + 13, SET_DCTL_MASK_WAPI,
1340 #define SET_DCTL_MASK_SEC_ENT_MODE GENMASK(1, 0)
1341 static inline void SET_DCTL_SEC_ENT_MODE_V1(void *table, u32 val)
1343 le32p_replace_bits((__le32 *)(table) + 5, val, GENMASK(17, 16));
1344 le32p_replace_bits((__le32 *)(table) + 13, SET_DCTL_MASK_SEC_ENT_MODE,
1348 #define SET_DCTL_MASK_SEC_ENTX_KEYID GENMASK(1, 0)
1349 static inline void SET_DCTL_SEC_ENT0_KEYID_V1(void *table, u32 val)
1351 le32p_replace_bits((__le32 *)(table) + 5, val, GENMASK(19, 18));
1352 le32p_replace_bits((__le32 *)(table) + 13, SET_DCTL_MASK_SEC_ENTX_KEYID,
1356 static inline void SET_DCTL_SEC_ENT1_KEYID_V1(void *table, u32 val)
1358 le32p_replace_bits((__le32 *)(table) + 5, val, GENMASK(21, 20));
1359 le32p_replace_bits((__le32 *)(table) + 13, SET_DCTL_MASK_SEC_ENTX_KEYID,
1363 static inline void SET_DCTL_SEC_ENT2_KEYID_V1(void *table, u32 val)
1365 le32p_replace_bits((__le32 *)(table) + 5, val, GENMASK(23, 22));
1366 le32p_replace_bits((__le32 *)(table) + 13, SET_DCTL_MASK_SEC_ENTX_KEYID,
1370 static inline void SET_DCTL_SEC_ENT3_KEYID_V1(void *table, u32 val)
1372 le32p_replace_bits((__le32 *)(table) + 5, val, GENMASK(25, 24));
1373 le32p_replace_bits((__le32 *)(table) + 13, SET_DCTL_MASK_SEC_ENTX_KEYID,
1377 static inline void SET_DCTL_SEC_ENT4_KEYID_V1(void *table, u32 val)
1379 le32p_replace_bits((__le32 *)(table) + 5, val, GENMASK(27, 26));
1380 le32p_replace_bits((__le32 *)(table) + 13, SET_DCTL_MASK_SEC_ENTX_KEYID,
1384 static inline void SET_DCTL_SEC_ENT5_KEYID_V1(void *table, u32 val)
1386 le32p_replace_bits((__le32 *)(table) + 5, val, GENMASK(29, 28));
1387 le32p_replace_bits((__le32 *)(table) + 13, SET_DCTL_MASK_SEC_ENTX_KEYID,
1391 static inline void SET_DCTL_SEC_ENT6_KEYID_V1(void *table, u32 val)
1393 le32p_replace_bits((__le32 *)(table) + 5, val, GENMASK(31, 30));
1394 le32p_replace_bits((__le32 *)(table) + 13, SET_DCTL_MASK_SEC_ENTX_KEYID,
1398 #define SET_DCTL_MASK_SEC_ENT_VALID GENMASK(7, 0)
1399 static inline void SET_DCTL_SEC_ENT_VALID_V1(void *table, u32 val)
1401 le32p_replace_bits((__le32 *)(table) + 6, val, GENMASK(7, 0));
1402 le32p_replace_bits((__le32 *)(table) + 14, SET_DCTL_MASK_SEC_ENT_VALID,
1406 #define SET_DCTL_MASK_SEC_ENTX GENMASK(7, 0)
1407 static inline void SET_DCTL_SEC_ENT0_V1(void *table, u32 val)
1409 le32p_replace_bits((__le32 *)(table) + 6, val, GENMASK(15, 8));
1410 le32p_replace_bits((__le32 *)(table) + 14, SET_DCTL_MASK_SEC_ENTX,
1414 static inline void SET_DCTL_SEC_ENT1_V1(void *table, u32 val)
1416 le32p_replace_bits((__le32 *)(table) + 6, val, GENMASK(23, 16));
1417 le32p_replace_bits((__le32 *)(table) + 14, SET_DCTL_MASK_SEC_ENTX,
1421 static inline void SET_DCTL_SEC_ENT2_V1(void *table, u32 val)
1423 le32p_replace_bits((__le32 *)(table) + 6, val, GENMASK(31, 24));
1424 le32p_replace_bits((__le32 *)(table) + 14, SET_DCTL_MASK_SEC_ENTX,
1428 static inline void SET_DCTL_SEC_ENT3_V1(void *table, u32 val)
1430 le32p_replace_bits((__le32 *)(table) + 7, val, GENMASK(7, 0));
1431 le32p_replace_bits((__le32 *)(table) + 15, SET_DCTL_MASK_SEC_ENTX,
1435 static inline void SET_DCTL_SEC_ENT4_V1(void *table, u32 val)
1437 le32p_replace_bits((__le32 *)(table) + 7, val, GENMASK(15, 8));
1438 le32p_replace_bits((__le32 *)(table) + 15, SET_DCTL_MASK_SEC_ENTX,
1442 static inline void SET_DCTL_SEC_ENT5_V1(void *table, u32 val)
1444 le32p_replace_bits((__le32 *)(table) + 7, val, GENMASK(23, 16));
1445 le32p_replace_bits((__le32 *)(table) + 15, SET_DCTL_MASK_SEC_ENTX,
1449 static inline void SET_DCTL_SEC_ENT6_V1(void *table, u32 val)
1451 le32p_replace_bits((__le32 *)(table) + 7, val, GENMASK(31, 24));
1452 le32p_replace_bits((__le32 *)(table) + 15, SET_DCTL_MASK_SEC_ENTX,
1456 static inline void SET_BCN_UPD_PORT(void *h2c, u32 val)
1458 le32p_replace_bits((__le32 *)h2c, val, GENMASK(7, 0));
1461 static inline void SET_BCN_UPD_MBSSID(void *h2c, u32 val)
1463 le32p_replace_bits((__le32 *)h2c, val, GENMASK(15, 8));
1466 static inline void SET_BCN_UPD_BAND(void *h2c, u32 val)
1468 le32p_replace_bits((__le32 *)h2c, val, GENMASK(23, 16));
1471 static inline void SET_BCN_UPD_GRP_IE_OFST(void *h2c, u32 val)
1473 le32p_replace_bits((__le32 *)h2c, (val - 24) | BIT(7), GENMASK(31, 24));
1476 static inline void SET_BCN_UPD_MACID(void *h2c, u32 val)
1478 le32p_replace_bits((__le32 *)(h2c) + 1, val, GENMASK(7, 0));
1481 static inline void SET_BCN_UPD_SSN_SEL(void *h2c, u32 val)
1483 le32p_replace_bits((__le32 *)(h2c) + 1, val, GENMASK(9, 8));
1486 static inline void SET_BCN_UPD_SSN_MODE(void *h2c, u32 val)
1488 le32p_replace_bits((__le32 *)(h2c) + 1, val, GENMASK(11, 10));
1491 static inline void SET_BCN_UPD_RATE(void *h2c, u32 val)
1493 le32p_replace_bits((__le32 *)(h2c) + 1, val, GENMASK(20, 12));
1496 static inline void SET_BCN_UPD_TXPWR(void *h2c, u32 val)
1498 le32p_replace_bits((__le32 *)(h2c) + 1, val, GENMASK(23, 21));
1501 static inline void SET_BCN_UPD_TXINFO_CTRL_EN(void *h2c, u32 val)
1503 le32p_replace_bits((__le32 *)(h2c) + 2, val, BIT(0));
1506 static inline void SET_BCN_UPD_NTX_PATH_EN(void *h2c, u32 val)
1508 le32p_replace_bits((__le32 *)(h2c) + 2, val, GENMASK(4, 1));
1511 static inline void SET_BCN_UPD_PATH_MAP_A(void *h2c, u32 val)
1513 le32p_replace_bits((__le32 *)(h2c) + 2, val, GENMASK(6, 5));
1516 static inline void SET_BCN_UPD_PATH_MAP_B(void *h2c, u32 val)
1518 le32p_replace_bits((__le32 *)(h2c) + 2, val, GENMASK(8, 7));
1521 static inline void SET_BCN_UPD_PATH_MAP_C(void *h2c, u32 val)
1523 le32p_replace_bits((__le32 *)(h2c) + 2, val, GENMASK(10, 9));
1526 static inline void SET_BCN_UPD_PATH_MAP_D(void *h2c, u32 val)
1528 le32p_replace_bits((__le32 *)(h2c) + 2, val, GENMASK(12, 11));
1531 static inline void SET_BCN_UPD_PATH_ANTSEL_A(void *h2c, u32 val)
1533 le32p_replace_bits((__le32 *)(h2c) + 2, val, BIT(13));
1536 static inline void SET_BCN_UPD_PATH_ANTSEL_B(void *h2c, u32 val)
1538 le32p_replace_bits((__le32 *)(h2c) + 2, val, BIT(14));
1541 static inline void SET_BCN_UPD_PATH_ANTSEL_C(void *h2c, u32 val)
1543 le32p_replace_bits((__le32 *)(h2c) + 2, val, BIT(15));
1546 static inline void SET_BCN_UPD_PATH_ANTSEL_D(void *h2c, u32 val)
1548 le32p_replace_bits((__le32 *)(h2c) + 2, val, BIT(16));
1551 static inline void SET_BCN_UPD_CSA_OFST(void *h2c, u32 val)
1553 le32p_replace_bits((__le32 *)(h2c) + 2, val, GENMASK(31, 17));
1556 static inline void SET_FWROLE_MAINTAIN_MACID(void *h2c, u32 val)
1558 le32p_replace_bits((__le32 *)h2c, val, GENMASK(7, 0));
1561 static inline void SET_FWROLE_MAINTAIN_SELF_ROLE(void *h2c, u32 val)
1563 le32p_replace_bits((__le32 *)h2c, val, GENMASK(9, 8));
1566 static inline void SET_FWROLE_MAINTAIN_UPD_MODE(void *h2c, u32 val)
1568 le32p_replace_bits((__le32 *)h2c, val, GENMASK(12, 10));
1571 static inline void SET_FWROLE_MAINTAIN_WIFI_ROLE(void *h2c, u32 val)
1573 le32p_replace_bits((__le32 *)h2c, val, GENMASK(16, 13));
1576 static inline void SET_JOININFO_MACID(void *h2c, u32 val)
1578 le32p_replace_bits((__le32 *)h2c, val, GENMASK(7, 0));
1581 static inline void SET_JOININFO_OP(void *h2c, u32 val)
1583 le32p_replace_bits((__le32 *)h2c, val, BIT(8));
1586 static inline void SET_JOININFO_BAND(void *h2c, u32 val)
1588 le32p_replace_bits((__le32 *)h2c, val, BIT(9));
1591 static inline void SET_JOININFO_WMM(void *h2c, u32 val)
1593 le32p_replace_bits((__le32 *)h2c, val, GENMASK(11, 10));
1596 static inline void SET_JOININFO_TGR(void *h2c, u32 val)
1598 le32p_replace_bits((__le32 *)h2c, val, BIT(12));
1601 static inline void SET_JOININFO_ISHESTA(void *h2c, u32 val)
1603 le32p_replace_bits((__le32 *)h2c, val, BIT(13));
1606 static inline void SET_JOININFO_DLBW(void *h2c, u32 val)
1608 le32p_replace_bits((__le32 *)h2c, val, GENMASK(15, 14));
1611 static inline void SET_JOININFO_TF_MAC_PAD(void *h2c, u32 val)
1613 le32p_replace_bits((__le32 *)h2c, val, GENMASK(17, 16));
1616 static inline void SET_JOININFO_DL_T_PE(void *h2c, u32 val)
1618 le32p_replace_bits((__le32 *)h2c, val, GENMASK(20, 18));
1621 static inline void SET_JOININFO_PORT_ID(void *h2c, u32 val)
1623 le32p_replace_bits((__le32 *)h2c, val, GENMASK(23, 21));
1626 static inline void SET_JOININFO_NET_TYPE(void *h2c, u32 val)
1628 le32p_replace_bits((__le32 *)h2c, val, GENMASK(25, 24));
1631 static inline void SET_JOININFO_WIFI_ROLE(void *h2c, u32 val)
1633 le32p_replace_bits((__le32 *)h2c, val, GENMASK(29, 26));
1636 static inline void SET_JOININFO_SELF_ROLE(void *h2c, u32 val)
1638 le32p_replace_bits((__le32 *)h2c, val, GENMASK(31, 30));
1641 static inline void SET_GENERAL_PKT_MACID(void *h2c, u32 val)
1643 le32p_replace_bits((__le32 *)h2c, val, GENMASK(7, 0));
1646 static inline void SET_GENERAL_PKT_PROBRSP_ID(void *h2c, u32 val)
1648 le32p_replace_bits((__le32 *)h2c, val, GENMASK(15, 8));
1651 static inline void SET_GENERAL_PKT_PSPOLL_ID(void *h2c, u32 val)
1653 le32p_replace_bits((__le32 *)h2c, val, GENMASK(23, 16));
1656 static inline void SET_GENERAL_PKT_NULL_ID(void *h2c, u32 val)
1658 le32p_replace_bits((__le32 *)h2c, val, GENMASK(31, 24));
1661 static inline void SET_GENERAL_PKT_QOS_NULL_ID(void *h2c, u32 val)
1663 le32p_replace_bits((__le32 *)(h2c) + 1, val, GENMASK(7, 0));
1666 static inline void SET_GENERAL_PKT_CTS2SELF_ID(void *h2c, u32 val)
1668 le32p_replace_bits((__le32 *)(h2c) + 1, val, GENMASK(15, 8));
1671 static inline void SET_LOG_CFG_LEVEL(void *h2c, u32 val)
1673 le32p_replace_bits((__le32 *)h2c, val, GENMASK(7, 0));
1676 static inline void SET_LOG_CFG_PATH(void *h2c, u32 val)
1678 le32p_replace_bits((__le32 *)h2c, val, GENMASK(15, 8));
1681 static inline void SET_LOG_CFG_COMP(void *h2c, u32 val)
1683 le32p_replace_bits((__le32 *)(h2c) + 1, val, GENMASK(31, 0));
1686 static inline void SET_LOG_CFG_COMP_EXT(void *h2c, u32 val)
1688 le32p_replace_bits((__le32 *)(h2c) + 2, val, GENMASK(31, 0));
1691 static inline void SET_BA_CAM_VALID(void *h2c, u32 val)
1693 le32p_replace_bits((__le32 *)h2c, val, BIT(0));
1696 static inline void SET_BA_CAM_INIT_REQ(void *h2c, u32 val)
1698 le32p_replace_bits((__le32 *)h2c, val, BIT(1));
1701 static inline void SET_BA_CAM_ENTRY_IDX(void *h2c, u32 val)
1703 le32p_replace_bits((__le32 *)h2c, val, GENMASK(3, 2));
1706 static inline void SET_BA_CAM_TID(void *h2c, u32 val)
1708 le32p_replace_bits((__le32 *)h2c, val, GENMASK(7, 4));
1711 static inline void SET_BA_CAM_MACID(void *h2c, u32 val)
1713 le32p_replace_bits((__le32 *)h2c, val, GENMASK(15, 8));
1716 static inline void SET_BA_CAM_BMAP_SIZE(void *h2c, u32 val)
1718 le32p_replace_bits((__le32 *)h2c, val, GENMASK(19, 16));
1721 static inline void SET_BA_CAM_SSN(void *h2c, u32 val)
1723 le32p_replace_bits((__le32 *)h2c, val, GENMASK(31, 20));
1726 static inline void SET_BA_CAM_UID(void *h2c, u32 val)
1728 le32p_replace_bits((__le32 *)h2c + 1, val, GENMASK(7, 0));
1731 static inline void SET_BA_CAM_STD_EN(void *h2c, u32 val)
1733 le32p_replace_bits((__le32 *)h2c + 1, val, BIT(8));
1736 static inline void SET_BA_CAM_BAND(void *h2c, u32 val)
1738 le32p_replace_bits((__le32 *)h2c + 1, val, BIT(9));
1741 static inline void SET_BA_CAM_ENTRY_IDX_V1(void *h2c, u32 val)
1743 le32p_replace_bits((__le32 *)h2c + 1, val, GENMASK(31, 28));
1746 static inline void SET_LPS_PARM_MACID(void *h2c, u32 val)
1748 le32p_replace_bits((__le32 *)h2c, val, GENMASK(7, 0));
1751 static inline void SET_LPS_PARM_PSMODE(void *h2c, u32 val)
1753 le32p_replace_bits((__le32 *)h2c, val, GENMASK(15, 8));
1756 static inline void SET_LPS_PARM_RLBM(void *h2c, u32 val)
1758 le32p_replace_bits((__le32 *)h2c, val, GENMASK(19, 16));
1761 static inline void SET_LPS_PARM_SMARTPS(void *h2c, u32 val)
1763 le32p_replace_bits((__le32 *)h2c, val, GENMASK(23, 20));
1766 static inline void SET_LPS_PARM_AWAKEINTERVAL(void *h2c, u32 val)
1768 le32p_replace_bits((__le32 *)h2c, val, GENMASK(31, 24));
1771 static inline void SET_LPS_PARM_VOUAPSD(void *h2c, u32 val)
1773 le32p_replace_bits((__le32 *)(h2c) + 1, val, BIT(0));
1776 static inline void SET_LPS_PARM_VIUAPSD(void *h2c, u32 val)
1778 le32p_replace_bits((__le32 *)(h2c) + 1, val, BIT(1));
1781 static inline void SET_LPS_PARM_BEUAPSD(void *h2c, u32 val)
1783 le32p_replace_bits((__le32 *)(h2c) + 1, val, BIT(2));
1786 static inline void SET_LPS_PARM_BKUAPSD(void *h2c, u32 val)
1788 le32p_replace_bits((__le32 *)(h2c) + 1, val, BIT(3));
1791 static inline void SET_LPS_PARM_LASTRPWM(void *h2c, u32 val)
1793 le32p_replace_bits((__le32 *)(h2c) + 1, val, GENMASK(15, 8));
1796 static inline void RTW89_SET_FWCMD_CPU_EXCEPTION_TYPE(void *cmd, u32 val)
1798 le32p_replace_bits((__le32 *)cmd, val, GENMASK(31, 0));
1801 enum rtw89_btc_btf_h2c_class {
1804 BTFC_FW_EVENT = 0x12,
1807 enum rtw89_btc_btf_set {
1808 SET_REPORT_EN = 0x0,
1820 SET_BT_IGNORE_WLAN_ACT,
1822 SET_BT_LNA_CONSTRAIN,
1823 SET_BT_GOLDEN_RX_RANGE,
1829 enum rtw89_btc_cxdrvinfo {
1841 enum rtw89_scan_mode {
1842 RTW89_SCAN_IMMEDIATE,
1845 enum rtw89_scan_type {
1849 static inline void RTW89_SET_FWCMD_CXHDR_TYPE(void *cmd, u8 val)
1851 u8p_replace_bits((u8 *)(cmd) + 0, val, GENMASK(7, 0));
1854 static inline void RTW89_SET_FWCMD_CXHDR_LEN(void *cmd, u8 val)
1856 u8p_replace_bits((u8 *)(cmd) + 1, val, GENMASK(7, 0));
1859 static inline void RTW89_SET_FWCMD_CXINIT_ANT_TYPE(void *cmd, u8 val)
1861 u8p_replace_bits((u8 *)(cmd) + 2, val, GENMASK(7, 0));
1864 static inline void RTW89_SET_FWCMD_CXINIT_ANT_NUM(void *cmd, u8 val)
1866 u8p_replace_bits((u8 *)(cmd) + 3, val, GENMASK(7, 0));
1869 static inline void RTW89_SET_FWCMD_CXINIT_ANT_ISO(void *cmd, u8 val)
1871 u8p_replace_bits((u8 *)(cmd) + 4, val, GENMASK(7, 0));
1874 static inline void RTW89_SET_FWCMD_CXINIT_ANT_POS(void *cmd, u8 val)
1876 u8p_replace_bits((u8 *)(cmd) + 5, val, BIT(0));
1879 static inline void RTW89_SET_FWCMD_CXINIT_ANT_DIVERSITY(void *cmd, u8 val)
1881 u8p_replace_bits((u8 *)(cmd) + 5, val, BIT(1));
1884 static inline void RTW89_SET_FWCMD_CXINIT_MOD_RFE(void *cmd, u8 val)
1886 u8p_replace_bits((u8 *)(cmd) + 6, val, GENMASK(7, 0));
1889 static inline void RTW89_SET_FWCMD_CXINIT_MOD_CV(void *cmd, u8 val)
1891 u8p_replace_bits((u8 *)(cmd) + 7, val, GENMASK(7, 0));
1894 static inline void RTW89_SET_FWCMD_CXINIT_MOD_BT_SOLO(void *cmd, u8 val)
1896 u8p_replace_bits((u8 *)(cmd) + 8, val, BIT(0));
1899 static inline void RTW89_SET_FWCMD_CXINIT_MOD_BT_POS(void *cmd, u8 val)
1901 u8p_replace_bits((u8 *)(cmd) + 8, val, BIT(1));
1904 static inline void RTW89_SET_FWCMD_CXINIT_MOD_SW_TYPE(void *cmd, u8 val)
1906 u8p_replace_bits((u8 *)(cmd) + 8, val, BIT(2));
1909 static inline void RTW89_SET_FWCMD_CXINIT_WL_GCH(void *cmd, u8 val)
1911 u8p_replace_bits((u8 *)(cmd) + 10, val, GENMASK(7, 0));
1914 static inline void RTW89_SET_FWCMD_CXINIT_WL_ONLY(void *cmd, u8 val)
1916 u8p_replace_bits((u8 *)(cmd) + 11, val, BIT(0));
1919 static inline void RTW89_SET_FWCMD_CXINIT_WL_INITOK(void *cmd, u8 val)
1921 u8p_replace_bits((u8 *)(cmd) + 11, val, BIT(1));
1924 static inline void RTW89_SET_FWCMD_CXINIT_DBCC_EN(void *cmd, u8 val)
1926 u8p_replace_bits((u8 *)(cmd) + 11, val, BIT(2));
1929 static inline void RTW89_SET_FWCMD_CXINIT_CX_OTHER(void *cmd, u8 val)
1931 u8p_replace_bits((u8 *)(cmd) + 11, val, BIT(3));
1934 static inline void RTW89_SET_FWCMD_CXINIT_BT_ONLY(void *cmd, u8 val)
1936 u8p_replace_bits((u8 *)(cmd) + 11, val, BIT(4));
1939 static inline void RTW89_SET_FWCMD_CXROLE_CONNECT_CNT(void *cmd, u8 val)
1941 u8p_replace_bits((u8 *)(cmd) + 2, val, GENMASK(7, 0));
1944 static inline void RTW89_SET_FWCMD_CXROLE_LINK_MODE(void *cmd, u8 val)
1946 u8p_replace_bits((u8 *)(cmd) + 3, val, GENMASK(7, 0));
1949 static inline void RTW89_SET_FWCMD_CXROLE_ROLE_NONE(void *cmd, u16 val)
1951 le16p_replace_bits((__le16 *)((u8 *)(cmd) + 4), val, BIT(0));
1954 static inline void RTW89_SET_FWCMD_CXROLE_ROLE_STA(void *cmd, u16 val)
1956 le16p_replace_bits((__le16 *)((u8 *)(cmd) + 4), val, BIT(1));
1959 static inline void RTW89_SET_FWCMD_CXROLE_ROLE_AP(void *cmd, u16 val)
1961 le16p_replace_bits((__le16 *)((u8 *)(cmd) + 4), val, BIT(2));
1964 static inline void RTW89_SET_FWCMD_CXROLE_ROLE_VAP(void *cmd, u16 val)
1966 le16p_replace_bits((__le16 *)((u8 *)(cmd) + 4), val, BIT(3));
1969 static inline void RTW89_SET_FWCMD_CXROLE_ROLE_ADHOC(void *cmd, u16 val)
1971 le16p_replace_bits((__le16 *)((u8 *)(cmd) + 4), val, BIT(4));
1974 static inline void RTW89_SET_FWCMD_CXROLE_ROLE_ADHOC_MASTER(void *cmd, u16 val)
1976 le16p_replace_bits((__le16 *)((u8 *)(cmd) + 4), val, BIT(5));
1979 static inline void RTW89_SET_FWCMD_CXROLE_ROLE_MESH(void *cmd, u16 val)
1981 le16p_replace_bits((__le16 *)((u8 *)(cmd) + 4), val, BIT(6));
1984 static inline void RTW89_SET_FWCMD_CXROLE_ROLE_MONITOR(void *cmd, u16 val)
1986 le16p_replace_bits((__le16 *)((u8 *)(cmd) + 4), val, BIT(7));
1989 static inline void RTW89_SET_FWCMD_CXROLE_ROLE_P2P_DEV(void *cmd, u16 val)
1991 le16p_replace_bits((__le16 *)((u8 *)(cmd) + 4), val, BIT(8));
1994 static inline void RTW89_SET_FWCMD_CXROLE_ROLE_P2P_GC(void *cmd, u16 val)
1996 le16p_replace_bits((__le16 *)((u8 *)(cmd) + 4), val, BIT(9));
1999 static inline void RTW89_SET_FWCMD_CXROLE_ROLE_P2P_GO(void *cmd, u16 val)
2001 le16p_replace_bits((__le16 *)((u8 *)(cmd) + 4), val, BIT(10));
2004 static inline void RTW89_SET_FWCMD_CXROLE_ROLE_NAN(void *cmd, u16 val)
2006 le16p_replace_bits((__le16 *)((u8 *)(cmd) + 4), val, BIT(11));
2009 static inline void RTW89_SET_FWCMD_CXROLE_ACT_CONNECTED(void *cmd, u8 val, int n)
2011 u8p_replace_bits((u8 *)(cmd) + (6 + 12 * (n)), val, BIT(0));
2014 static inline void RTW89_SET_FWCMD_CXROLE_ACT_PID(void *cmd, u8 val, int n)
2016 u8p_replace_bits((u8 *)(cmd) + (6 + 12 * (n)), val, GENMASK(3, 1));
2019 static inline void RTW89_SET_FWCMD_CXROLE_ACT_PHY(void *cmd, u8 val, int n)
2021 u8p_replace_bits((u8 *)(cmd) + (6 + 12 * (n)), val, BIT(4));
2024 static inline void RTW89_SET_FWCMD_CXROLE_ACT_NOA(void *cmd, u8 val, int n)
2026 u8p_replace_bits((u8 *)(cmd) + (6 + 12 * (n)), val, BIT(5));
2029 static inline void RTW89_SET_FWCMD_CXROLE_ACT_BAND(void *cmd, u8 val, int n)
2031 u8p_replace_bits((u8 *)(cmd) + (6 + 12 * (n)), val, GENMASK(7, 6));
2034 static inline void RTW89_SET_FWCMD_CXROLE_ACT_CLIENT_PS(void *cmd, u8 val, int n)
2036 u8p_replace_bits((u8 *)(cmd) + (7 + 12 * (n)), val, BIT(0));
2039 static inline void RTW89_SET_FWCMD_CXROLE_ACT_BW(void *cmd, u8 val, int n)
2041 u8p_replace_bits((u8 *)(cmd) + (7 + 12 * (n)), val, GENMASK(7, 1));
2044 static inline void RTW89_SET_FWCMD_CXROLE_ACT_ROLE(void *cmd, u8 val, int n)
2046 u8p_replace_bits((u8 *)(cmd) + (8 + 12 * (n)), val, GENMASK(7, 0));
2049 static inline void RTW89_SET_FWCMD_CXROLE_ACT_CH(void *cmd, u8 val, int n)
2051 u8p_replace_bits((u8 *)(cmd) + (9 + 12 * (n)), val, GENMASK(7, 0));
2054 static inline void RTW89_SET_FWCMD_CXROLE_ACT_TX_LVL(void *cmd, u16 val, int n)
2056 le16p_replace_bits((__le16 *)((u8 *)(cmd) + (10 + 12 * (n))), val, GENMASK(15, 0));
2059 static inline void RTW89_SET_FWCMD_CXROLE_ACT_RX_LVL(void *cmd, u16 val, int n)
2061 le16p_replace_bits((__le16 *)((u8 *)(cmd) + (12 + 12 * (n))), val, GENMASK(15, 0));
2064 static inline void RTW89_SET_FWCMD_CXROLE_ACT_TX_RATE(void *cmd, u16 val, int n)
2066 le16p_replace_bits((__le16 *)((u8 *)(cmd) + (14 + 12 * (n))), val, GENMASK(15, 0));
2069 static inline void RTW89_SET_FWCMD_CXROLE_ACT_RX_RATE(void *cmd, u16 val, int n)
2071 le16p_replace_bits((__le16 *)((u8 *)(cmd) + (16 + 12 * (n))), val, GENMASK(15, 0));
2074 static inline void RTW89_SET_FWCMD_CXCTRL_MANUAL(void *cmd, u32 val)
2076 le32p_replace_bits((__le32 *)((u8 *)(cmd) + 2), val, BIT(0));
2079 static inline void RTW89_SET_FWCMD_CXCTRL_IGNORE_BT(void *cmd, u32 val)
2081 le32p_replace_bits((__le32 *)((u8 *)(cmd) + 2), val, BIT(1));
2084 static inline void RTW89_SET_FWCMD_CXCTRL_ALWAYS_FREERUN(void *cmd, u32 val)
2086 le32p_replace_bits((__le32 *)((u8 *)(cmd) + 2), val, BIT(2));
2089 static inline void RTW89_SET_FWCMD_CXCTRL_TRACE_STEP(void *cmd, u32 val)
2091 le32p_replace_bits((__le32 *)((u8 *)(cmd) + 2), val, GENMASK(18, 3));
2094 static inline void RTW89_SET_FWCMD_CXRFK_STATE(void *cmd, u32 val)
2096 le32p_replace_bits((__le32 *)((u8 *)(cmd) + 2), val, GENMASK(1, 0));
2099 static inline void RTW89_SET_FWCMD_CXRFK_PATH_MAP(void *cmd, u32 val)
2101 le32p_replace_bits((__le32 *)((u8 *)(cmd) + 2), val, GENMASK(5, 2));
2104 static inline void RTW89_SET_FWCMD_CXRFK_PHY_MAP(void *cmd, u32 val)
2106 le32p_replace_bits((__le32 *)((u8 *)(cmd) + 2), val, GENMASK(7, 6));
2109 static inline void RTW89_SET_FWCMD_CXRFK_BAND(void *cmd, u32 val)
2111 le32p_replace_bits((__le32 *)((u8 *)(cmd) + 2), val, GENMASK(9, 8));
2114 static inline void RTW89_SET_FWCMD_CXRFK_TYPE(void *cmd, u32 val)
2116 le32p_replace_bits((__le32 *)((u8 *)(cmd) + 2), val, GENMASK(17, 10));
2119 static inline void RTW89_SET_FWCMD_PACKET_OFLD_PKT_IDX(void *cmd, u32 val)
2121 le32p_replace_bits((__le32 *)((u8 *)(cmd)), val, GENMASK(7, 0));
2124 static inline void RTW89_SET_FWCMD_PACKET_OFLD_PKT_OP(void *cmd, u32 val)
2126 le32p_replace_bits((__le32 *)((u8 *)(cmd)), val, GENMASK(10, 8));
2129 static inline void RTW89_SET_FWCMD_PACKET_OFLD_PKT_LENGTH(void *cmd, u32 val)
2131 le32p_replace_bits((__le32 *)((u8 *)(cmd)), val, GENMASK(31, 16));
2134 static inline void RTW89_SET_FWCMD_SCANOFLD_CH_NUM(void *cmd, u32 val)
2136 le32p_replace_bits((__le32 *)((u8 *)(cmd)), val, GENMASK(7, 0));
2139 static inline void RTW89_SET_FWCMD_SCANOFLD_CH_SIZE(void *cmd, u32 val)
2141 le32p_replace_bits((__le32 *)((u8 *)(cmd)), val, GENMASK(15, 8));
2144 static inline void RTW89_SET_FWCMD_CHINFO_PERIOD(void *cmd, u32 val)
2146 le32p_replace_bits((__le32 *)((u8 *)(cmd)), val, GENMASK(7, 0));
2149 static inline void RTW89_SET_FWCMD_CHINFO_DWELL(void *cmd, u32 val)
2151 le32p_replace_bits((__le32 *)((u8 *)(cmd)), val, GENMASK(15, 8));
2154 static inline void RTW89_SET_FWCMD_CHINFO_CENTER_CH(void *cmd, u32 val)
2156 le32p_replace_bits((__le32 *)((u8 *)(cmd)), val, GENMASK(23, 16));
2159 static inline void RTW89_SET_FWCMD_CHINFO_PRI_CH(void *cmd, u32 val)
2161 le32p_replace_bits((__le32 *)((u8 *)(cmd)), val, GENMASK(31, 24));
2164 static inline void RTW89_SET_FWCMD_CHINFO_BW(void *cmd, u32 val)
2166 le32p_replace_bits((__le32 *)((u8 *)(cmd) + 4), val, GENMASK(2, 0));
2169 static inline void RTW89_SET_FWCMD_CHINFO_ACTION(void *cmd, u32 val)
2171 le32p_replace_bits((__le32 *)((u8 *)(cmd) + 4), val, GENMASK(7, 3));
2174 static inline void RTW89_SET_FWCMD_CHINFO_NUM_PKT(void *cmd, u32 val)
2176 le32p_replace_bits((__le32 *)((u8 *)(cmd) + 4), val, GENMASK(11, 8));
2179 static inline void RTW89_SET_FWCMD_CHINFO_TX(void *cmd, u32 val)
2181 le32p_replace_bits((__le32 *)((u8 *)(cmd) + 4), val, BIT(12));
2184 static inline void RTW89_SET_FWCMD_CHINFO_PAUSE_DATA(void *cmd, u32 val)
2186 le32p_replace_bits((__le32 *)((u8 *)(cmd) + 4), val, BIT(13));
2189 static inline void RTW89_SET_FWCMD_CHINFO_BAND(void *cmd, u32 val)
2191 le32p_replace_bits((__le32 *)((u8 *)(cmd) + 4), val, GENMASK(15, 14));
2194 static inline void RTW89_SET_FWCMD_CHINFO_PKT_ID(void *cmd, u32 val)
2196 le32p_replace_bits((__le32 *)((u8 *)(cmd) + 4), val, GENMASK(23, 16));
2199 static inline void RTW89_SET_FWCMD_CHINFO_DFS(void *cmd, u32 val)
2201 le32p_replace_bits((__le32 *)((u8 *)(cmd) + 4), val, BIT(24));
2204 static inline void RTW89_SET_FWCMD_CHINFO_TX_NULL(void *cmd, u32 val)
2206 le32p_replace_bits((__le32 *)((u8 *)(cmd) + 4), val, BIT(25));
2209 static inline void RTW89_SET_FWCMD_CHINFO_RANDOM(void *cmd, u32 val)
2211 le32p_replace_bits((__le32 *)((u8 *)(cmd) + 4), val, BIT(26));
2214 static inline void RTW89_SET_FWCMD_CHINFO_CFG_TX(void *cmd, u32 val)
2216 le32p_replace_bits((__le32 *)((u8 *)(cmd) + 4), val, BIT(27));
2219 static inline void RTW89_SET_FWCMD_CHINFO_PKT0(void *cmd, u32 val)
2221 le32p_replace_bits((__le32 *)((u8 *)(cmd) + 8), val, GENMASK(7, 0));
2224 static inline void RTW89_SET_FWCMD_CHINFO_PKT1(void *cmd, u32 val)
2226 le32p_replace_bits((__le32 *)((u8 *)(cmd) + 8), val, GENMASK(15, 8));
2229 static inline void RTW89_SET_FWCMD_CHINFO_PKT2(void *cmd, u32 val)
2231 le32p_replace_bits((__le32 *)((u8 *)(cmd) + 8), val, GENMASK(23, 16));
2234 static inline void RTW89_SET_FWCMD_CHINFO_PKT3(void *cmd, u32 val)
2236 le32p_replace_bits((__le32 *)((u8 *)(cmd) + 8), val, GENMASK(31, 24));
2239 static inline void RTW89_SET_FWCMD_CHINFO_PKT4(void *cmd, u32 val)
2241 le32p_replace_bits((__le32 *)((u8 *)(cmd) + 12), val, GENMASK(7, 0));
2244 static inline void RTW89_SET_FWCMD_CHINFO_PKT5(void *cmd, u32 val)
2246 le32p_replace_bits((__le32 *)((u8 *)(cmd) + 12), val, GENMASK(15, 8));
2249 static inline void RTW89_SET_FWCMD_CHINFO_PKT6(void *cmd, u32 val)
2251 le32p_replace_bits((__le32 *)((u8 *)(cmd) + 12), val, GENMASK(23, 16));
2254 static inline void RTW89_SET_FWCMD_CHINFO_PKT7(void *cmd, u32 val)
2256 le32p_replace_bits((__le32 *)((u8 *)(cmd) + 12), val, GENMASK(31, 24));
2259 static inline void RTW89_SET_FWCMD_CHINFO_POWER_IDX(void *cmd, u32 val)
2261 le32p_replace_bits((__le32 *)((u8 *)(cmd) + 16), val, GENMASK(15, 0));
2264 static inline void RTW89_SET_FWCMD_SCANOFLD_MACID(void *cmd, u32 val)
2266 le32p_replace_bits((__le32 *)((u8 *)(cmd)), val, GENMASK(7, 0));
2269 static inline void RTW89_SET_FWCMD_SCANOFLD_NORM_CY(void *cmd, u32 val)
2271 le32p_replace_bits((__le32 *)((u8 *)(cmd)), val, GENMASK(15, 8));
2274 static inline void RTW89_SET_FWCMD_SCANOFLD_PORT_ID(void *cmd, u32 val)
2276 le32p_replace_bits((__le32 *)((u8 *)(cmd)), val, GENMASK(18, 16));
2279 static inline void RTW89_SET_FWCMD_SCANOFLD_BAND(void *cmd, u32 val)
2281 le32p_replace_bits((__le32 *)((u8 *)(cmd)), val, BIT(19));
2284 static inline void RTW89_SET_FWCMD_SCANOFLD_OPERATION(void *cmd, u32 val)
2286 le32p_replace_bits((__le32 *)((u8 *)(cmd)), val, GENMASK(21, 20));
2289 static inline void RTW89_SET_FWCMD_SCANOFLD_TARGET_CH_BAND(void *cmd, u32 val)
2291 le32p_replace_bits((__le32 *)((u8 *)(cmd)), val, GENMASK(23, 22));
2294 static inline void RTW89_SET_FWCMD_SCANOFLD_NOTIFY_END(void *cmd, u32 val)
2296 le32p_replace_bits((__le32 *)((u8 *)(cmd) + 4), val, BIT(0));
2299 static inline void RTW89_SET_FWCMD_SCANOFLD_TARGET_CH_MODE(void *cmd, u32 val)
2301 le32p_replace_bits((__le32 *)((u8 *)(cmd) + 4), val, BIT(1));
2304 static inline void RTW89_SET_FWCMD_SCANOFLD_START_MODE(void *cmd, u32 val)
2306 le32p_replace_bits((__le32 *)((u8 *)(cmd) + 4), val, BIT(2));
2309 static inline void RTW89_SET_FWCMD_SCANOFLD_SCAN_TYPE(void *cmd, u32 val)
2311 le32p_replace_bits((__le32 *)((u8 *)(cmd) + 4), val, GENMASK(4, 3));
2314 static inline void RTW89_SET_FWCMD_SCANOFLD_TARGET_CH_BW(void *cmd, u32 val)
2316 le32p_replace_bits((__le32 *)((u8 *)(cmd) + 4), val, GENMASK(7, 5));
2319 static inline void RTW89_SET_FWCMD_SCANOFLD_TARGET_PRI_CH(void *cmd, u32 val)
2321 le32p_replace_bits((__le32 *)((u8 *)(cmd) + 4), val, GENMASK(15, 8));
2324 static inline void RTW89_SET_FWCMD_SCANOFLD_TARGET_CENTRAL_CH(void *cmd,
2327 le32p_replace_bits((__le32 *)((u8 *)(cmd) + 4), val, GENMASK(23, 16));
2330 static inline void RTW89_SET_FWCMD_SCANOFLD_PROBE_REQ_PKT_ID(void *cmd, u32 val)
2332 le32p_replace_bits((__le32 *)((u8 *)(cmd) + 4), val, GENMASK(31, 24));
2335 static inline void RTW89_SET_FWCMD_SCANOFLD_NORM_PD(void *cmd, u32 val)
2337 le32p_replace_bits((__le32 *)((u8 *)(cmd) + 8), val, GENMASK(15, 0));
2340 static inline void RTW89_SET_FWCMD_SCANOFLD_SLOW_PD(void *cmd, u32 val)
2342 le32p_replace_bits((__le32 *)((u8 *)(cmd) + 8), val, GENMASK(23, 16));
2345 static inline void RTW89_SET_FWCMD_SCANOFLD_TSF_HIGH(void *cmd, u32 val)
2347 le32p_replace_bits((__le32 *)((u8 *)(cmd) + 12), val, GENMASK(31, 0));
2350 static inline void RTW89_SET_FWCMD_SCANOFLD_TSF_SLOW(void *cmd, u32 val)
2352 le32p_replace_bits((__le32 *)((u8 *)(cmd) + 16), val, GENMASK(31, 0));
2355 #define RTW89_C2H_HEADER_LEN 8
2357 #define RTW89_GET_C2H_CATEGORY(c2h) \
2358 le32_get_bits(*((const __le32 *)c2h), GENMASK(1, 0))
2359 #define RTW89_GET_C2H_CLASS(c2h) \
2360 le32_get_bits(*((const __le32 *)c2h), GENMASK(7, 2))
2361 #define RTW89_GET_C2H_FUNC(c2h) \
2362 le32_get_bits(*((const __le32 *)c2h), GENMASK(15, 8))
2363 #define RTW89_GET_C2H_LEN(c2h) \
2364 le32_get_bits(*((const __le32 *)(c2h) + 1), GENMASK(13, 0))
2366 #define RTW89_GET_C2H_LOG_SRT_PRT(c2h) (char *)((__le32 *)(c2h) + 2)
2367 #define RTW89_GET_C2H_LOG_LEN(len) ((len) - RTW89_C2H_HEADER_LEN)
2369 #define RTW89_GET_MAC_C2H_DONE_ACK_CAT(c2h) \
2370 le32_get_bits(*((const __le32 *)(c2h) + 2), GENMASK(1, 0))
2371 #define RTW89_GET_MAC_C2H_DONE_ACK_CLASS(c2h) \
2372 le32_get_bits(*((const __le32 *)(c2h) + 2), GENMASK(7, 2))
2373 #define RTW89_GET_MAC_C2H_DONE_ACK_FUNC(c2h) \
2374 le32_get_bits(*((const __le32 *)(c2h) + 2), GENMASK(15, 8))
2375 #define RTW89_GET_MAC_C2H_DONE_ACK_H2C_RETURN(c2h) \
2376 le32_get_bits(*((const __le32 *)(c2h) + 2), GENMASK(23, 16))
2377 #define RTW89_GET_MAC_C2H_DONE_ACK_H2C_SEQ(c2h) \
2378 le32_get_bits(*((const __le32 *)(c2h) + 2), GENMASK(31, 24))
2380 #define RTW89_GET_MAC_C2H_REV_ACK_CAT(c2h) \
2381 le32_get_bits(*((const __le32 *)(c2h) + 2), GENMASK(1, 0))
2382 #define RTW89_GET_MAC_C2H_REV_ACK_CLASS(c2h) \
2383 le32_get_bits(*((const __le32 *)(c2h) + 2), GENMASK(7, 2))
2384 #define RTW89_GET_MAC_C2H_REV_ACK_FUNC(c2h) \
2385 le32_get_bits(*((const __le32 *)(c2h) + 2), GENMASK(15, 8))
2386 #define RTW89_GET_MAC_C2H_REV_ACK_H2C_SEQ(c2h) \
2387 le32_get_bits(*((const __le32 *)(c2h) + 2), GENMASK(23, 16))
2389 #define RTW89_GET_PHY_C2H_RA_RPT_MACID(c2h) \
2390 le32_get_bits(*((const __le32 *)(c2h) + 2), GENMASK(15, 0))
2391 #define RTW89_GET_PHY_C2H_RA_RPT_RETRY_RATIO(c2h) \
2392 le32_get_bits(*((const __le32 *)(c2h) + 2), GENMASK(23, 16))
2393 #define RTW89_GET_PHY_C2H_RA_RPT_MCSNSS(c2h) \
2394 le32_get_bits(*((const __le32 *)(c2h) + 3), GENMASK(6, 0))
2395 #define RTW89_GET_PHY_C2H_RA_RPT_MD_SEL(c2h) \
2396 le32_get_bits(*((const __le32 *)(c2h) + 3), GENMASK(9, 8))
2397 #define RTW89_GET_PHY_C2H_RA_RPT_GILTF(c2h) \
2398 le32_get_bits(*((const __le32 *)(c2h) + 3), GENMASK(12, 10))
2399 #define RTW89_GET_PHY_C2H_RA_RPT_BW(c2h) \
2400 le32_get_bits(*((const __le32 *)(c2h) + 3), GENMASK(14, 13))
2402 /* VHT, HE, HT-old: [6:4]: NSS, [3:0]: MCS
2403 * HT-new: [6:5]: NA, [4:0]: MCS
2405 #define RTW89_RA_RATE_MASK_NSS GENMASK(6, 4)
2406 #define RTW89_RA_RATE_MASK_MCS GENMASK(3, 0)
2407 #define RTW89_RA_RATE_MASK_HT_MCS GENMASK(4, 0)
2408 #define RTW89_MK_HT_RATE(nss, mcs) (FIELD_PREP(GENMASK(4, 3), nss) | \
2409 FIELD_PREP(GENMASK(2, 0), mcs))
2411 #define RTW89_GET_MAC_C2H_PKTOFLD_ID(c2h) \
2412 le32_get_bits(*((const __le32 *)(c2h) + 2), GENMASK(7, 0))
2413 #define RTW89_GET_MAC_C2H_PKTOFLD_OP(c2h) \
2414 le32_get_bits(*((const __le32 *)(c2h) + 2), GENMASK(10, 8))
2415 #define RTW89_GET_MAC_C2H_PKTOFLD_LEN(c2h) \
2416 le32_get_bits(*((const __le32 *)(c2h) + 2), GENMASK(31, 16))
2418 #define RTW89_GET_MAC_C2H_SCANOFLD_PRI_CH(c2h) \
2419 le32_get_bits(*((const __le32 *)(c2h) + 2), GENMASK(7, 0))
2420 #define RTW89_GET_MAC_C2H_SCANOFLD_RSP(c2h) \
2421 le32_get_bits(*((const __le32 *)(c2h) + 2), GENMASK(19, 16))
2422 #define RTW89_GET_MAC_C2H_SCANOFLD_STATUS(c2h) \
2423 le32_get_bits(*((const __le32 *)(c2h) + 2), GENMASK(23, 20))
2424 #define RTW89_GET_MAC_C2H_SCANOFLD_TX_FAIL(c2h) \
2425 le32_get_bits(*((const __le32 *)(c2h) + 5), GENMASK(3, 0))
2426 #define RTW89_GET_MAC_C2H_SCANOFLD_AIR_DENSITY(c2h) \
2427 le32_get_bits(*((const __le32 *)(c2h) + 5), GENMASK(7, 4))
2428 #define RTW89_GET_MAC_C2H_SCANOFLD_BAND(c2h) \
2429 le32_get_bits(*((const __le32 *)(c2h) + 5), GENMASK(25, 24))
2431 #define RTW89_FW_HDR_SIZE 32
2432 #define RTW89_FW_SECTION_HDR_SIZE 16
2434 #define RTW89_MFW_SIG 0xFF
2436 struct rtw89_mfw_info {
2438 u8 type; /* enum rtw89_fw_type */
2446 struct rtw89_mfw_hdr {
2447 u8 sig; /* RTW89_MFW_SIG */
2450 struct rtw89_mfw_info info[];
2458 #define RTW89_H2C_RF_PAGE_SIZE 500
2459 #define RTW89_H2C_RF_PAGE_NUM 3
2460 struct rtw89_fw_h2c_rf_reg_info {
2461 enum rtw89_rf_path rf_path;
2462 __le32 rtw89_phy_config_rf_h2c[RTW89_H2C_RF_PAGE_NUM][RTW89_H2C_RF_PAGE_SIZE];
2466 #define H2C_SEC_CAM_LEN 24
2468 #define H2C_HEADER_LEN 8
2469 #define H2C_HDR_CAT GENMASK(1, 0)
2470 #define H2C_HDR_CLASS GENMASK(7, 2)
2471 #define H2C_HDR_FUNC GENMASK(15, 8)
2472 #define H2C_HDR_DEL_TYPE GENMASK(19, 16)
2473 #define H2C_HDR_H2C_SEQ GENMASK(31, 24)
2474 #define H2C_HDR_TOTAL_LEN GENMASK(13, 0)
2475 #define H2C_HDR_REC_ACK BIT(14)
2476 #define H2C_HDR_DONE_ACK BIT(15)
2478 #define FWCMD_TYPE_H2C 0
2480 #define H2C_CAT_TEST 0x0
2482 /* CLASS 5 - FW STATUS TEST */
2483 #define H2C_CL_FW_STATUS_TEST 0x5
2484 #define H2C_FUNC_CPU_EXCEPTION 0x1
2486 #define H2C_CAT_MAC 0x1
2488 /* CLASS 0 - FW INFO */
2489 #define H2C_CL_FW_INFO 0x0
2490 #define H2C_FUNC_LOG_CFG 0x0
2491 #define H2C_FUNC_MAC_GENERAL_PKT 0x1
2494 #define H2C_CL_MAC_PS 0x2
2495 #define H2C_FUNC_MAC_LPS_PARM 0x0
2497 /* CLASS 3 - FW download */
2498 #define H2C_CL_MAC_FWDL 0x3
2499 #define H2C_FUNC_MAC_FWHDR_DL 0x0
2501 /* CLASS 5 - Frame Exchange */
2502 #define H2C_CL_MAC_FR_EXCHG 0x5
2503 #define H2C_FUNC_MAC_CCTLINFO_UD 0x2
2504 #define H2C_FUNC_MAC_BCN_UPD 0x5
2505 #define H2C_FUNC_MAC_DCTLINFO_UD_V1 0x9
2506 #define H2C_FUNC_MAC_CCTLINFO_UD_V1 0xa
2508 /* CLASS 6 - Address CAM */
2509 #define H2C_CL_MAC_ADDR_CAM_UPDATE 0x6
2510 #define H2C_FUNC_MAC_ADDR_CAM_UPD 0x0
2512 /* CLASS 8 - Media Status Report */
2513 #define H2C_CL_MAC_MEDIA_RPT 0x8
2514 #define H2C_FUNC_MAC_JOININFO 0x0
2515 #define H2C_FUNC_MAC_FWROLE_MAINTAIN 0x4
2517 /* CLASS 9 - FW offload */
2518 #define H2C_CL_MAC_FW_OFLD 0x9
2519 #define H2C_FUNC_PACKET_OFLD 0x1
2520 #define H2C_FUNC_MAC_MACID_PAUSE 0x8
2521 #define H2C_FUNC_USR_EDCA 0xF
2522 #define H2C_FUNC_OFLD_CFG 0x14
2523 #define H2C_FUNC_ADD_SCANOFLD_CH 0x16
2524 #define H2C_FUNC_SCANOFLD 0x17
2526 /* CLASS 10 - Security CAM */
2527 #define H2C_CL_MAC_SEC_CAM 0xa
2528 #define H2C_FUNC_MAC_SEC_UPD 0x1
2530 /* CLASS 12 - BA CAM */
2531 #define H2C_CL_BA_CAM 0xc
2532 #define H2C_FUNC_MAC_BA_CAM 0x0
2534 #define H2C_CAT_OUTSRC 0x2
2536 #define H2C_CL_OUTSRC_RA 0x1
2537 #define H2C_FUNC_OUTSRC_RA_MACIDCFG 0x0
2539 #define H2C_CL_OUTSRC_RF_REG_A 0x8
2540 #define H2C_CL_OUTSRC_RF_REG_B 0x9
2541 #define H2C_CL_OUTSRC_RF_FW_NOTIFY 0xa
2542 #define H2C_FUNC_OUTSRC_RF_GET_MCCCH 0x2
2544 struct rtw89_fw_h2c_rf_get_mccch {
2549 __le32 current_channel;
2550 __le32 current_band_type;
2553 #define RTW89_FW_RSVD_PLE_SIZE 0x800
2555 #define RTW89_WCPU_BASE_ADDR 0xA0000000
2557 #define RTW89_FW_BACKTRACE_INFO_SIZE 8
2558 #define RTW89_VALID_FW_BACKTRACE_SIZE(_size) \
2559 ((_size) % RTW89_FW_BACKTRACE_INFO_SIZE == 0)
2561 #define RTW89_FW_BACKTRACE_MAX_SIZE 512 /* 8 * 64 (entries) */
2562 #define RTW89_FW_BACKTRACE_KEY 0xBACEBACE
2564 int rtw89_fw_check_rdy(struct rtw89_dev *rtwdev);
2565 int rtw89_fw_recognize(struct rtw89_dev *rtwdev);
2566 int rtw89_fw_download(struct rtw89_dev *rtwdev, enum rtw89_fw_type type);
2567 int rtw89_load_firmware(struct rtw89_dev *rtwdev);
2568 void rtw89_unload_firmware(struct rtw89_dev *rtwdev);
2569 int rtw89_wait_firmware_completion(struct rtw89_dev *rtwdev);
2570 void rtw89_h2c_pkt_set_hdr(struct rtw89_dev *rtwdev, struct sk_buff *skb,
2571 u8 type, u8 cat, u8 class, u8 func,
2572 bool rack, bool dack, u32 len);
2573 int rtw89_fw_h2c_default_cmac_tbl(struct rtw89_dev *rtwdev,
2574 struct rtw89_vif *rtwvif);
2575 int rtw89_fw_h2c_assoc_cmac_tbl(struct rtw89_dev *rtwdev,
2576 struct ieee80211_vif *vif,
2577 struct ieee80211_sta *sta);
2578 int rtw89_fw_h2c_txtime_cmac_tbl(struct rtw89_dev *rtwdev,
2579 struct rtw89_sta *rtwsta);
2580 int rtw89_fw_h2c_update_beacon(struct rtw89_dev *rtwdev,
2581 struct rtw89_vif *rtwvif);
2582 int rtw89_fw_h2c_cam(struct rtw89_dev *rtwdev, struct rtw89_vif *vif,
2583 struct rtw89_sta *rtwsta, const u8 *scan_mac_addr);
2584 int rtw89_fw_h2c_dctl_sec_cam_v1(struct rtw89_dev *rtwdev,
2585 struct rtw89_vif *rtwvif,
2586 struct rtw89_sta *rtwsta);
2587 void rtw89_fw_c2h_irqsafe(struct rtw89_dev *rtwdev, struct sk_buff *c2h);
2588 void rtw89_fw_c2h_work(struct work_struct *work);
2589 int rtw89_fw_h2c_role_maintain(struct rtw89_dev *rtwdev,
2590 struct rtw89_vif *rtwvif,
2591 struct rtw89_sta *rtwsta,
2592 enum rtw89_upd_mode upd_mode);
2593 int rtw89_fw_h2c_join_info(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif,
2594 struct rtw89_sta *rtwsta, bool dis_conn);
2595 int rtw89_fw_h2c_macid_pause(struct rtw89_dev *rtwdev, u8 sh, u8 grp,
2597 int rtw89_fw_h2c_set_edca(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif,
2599 int rtw89_fw_h2c_set_ofld_cfg(struct rtw89_dev *rtwdev);
2600 int rtw89_fw_h2c_ra(struct rtw89_dev *rtwdev, struct rtw89_ra_info *ra, bool csi);
2601 int rtw89_fw_h2c_cxdrv_init(struct rtw89_dev *rtwdev);
2602 int rtw89_fw_h2c_cxdrv_role(struct rtw89_dev *rtwdev);
2603 int rtw89_fw_h2c_cxdrv_ctrl(struct rtw89_dev *rtwdev);
2604 int rtw89_fw_h2c_cxdrv_rfk(struct rtw89_dev *rtwdev);
2605 int rtw89_fw_h2c_del_pkt_offload(struct rtw89_dev *rtwdev, u8 id);
2606 int rtw89_fw_h2c_add_pkt_offload(struct rtw89_dev *rtwdev, u8 *id,
2607 struct sk_buff *skb_ofld);
2608 int rtw89_fw_h2c_scan_list_offload(struct rtw89_dev *rtwdev, int len,
2609 struct list_head *chan_list);
2610 int rtw89_fw_h2c_scan_offload(struct rtw89_dev *rtwdev,
2611 struct rtw89_scan_option *opt,
2612 struct rtw89_vif *vif);
2613 int rtw89_fw_h2c_rf_reg(struct rtw89_dev *rtwdev,
2614 struct rtw89_fw_h2c_rf_reg_info *info,
2616 int rtw89_fw_h2c_rf_ntfy_mcc(struct rtw89_dev *rtwdev);
2617 int rtw89_fw_h2c_raw_with_hdr(struct rtw89_dev *rtwdev,
2618 u8 h2c_class, u8 h2c_func, u8 *buf, u16 len,
2619 bool rack, bool dack);
2620 int rtw89_fw_h2c_raw(struct rtw89_dev *rtwdev, const u8 *buf, u16 len);
2621 void rtw89_fw_send_all_early_h2c(struct rtw89_dev *rtwdev);
2622 void rtw89_fw_free_all_early_h2c(struct rtw89_dev *rtwdev);
2623 int rtw89_fw_h2c_general_pkt(struct rtw89_dev *rtwdev, u8 macid);
2624 int rtw89_fw_h2c_ba_cam(struct rtw89_dev *rtwdev, struct rtw89_sta *rtwsta,
2625 bool valid, struct ieee80211_ampdu_params *params);
2627 int rtw89_fw_h2c_lps_parm(struct rtw89_dev *rtwdev,
2628 struct rtw89_lps_parm *lps_param);
2629 struct sk_buff *rtw89_fw_h2c_alloc_skb_with_hdr(struct rtw89_dev *rtwdev, u32 len);
2630 struct sk_buff *rtw89_fw_h2c_alloc_skb_no_hdr(struct rtw89_dev *rtwdev, u32 len);
2631 int rtw89_fw_msg_reg(struct rtw89_dev *rtwdev,
2632 struct rtw89_mac_h2c_info *h2c_info,
2633 struct rtw89_mac_c2h_info *c2h_info);
2634 int rtw89_fw_h2c_fw_log(struct rtw89_dev *rtwdev, bool enable);
2635 void rtw89_fw_st_dbg_dump(struct rtw89_dev *rtwdev);
2636 void rtw89_store_op_chan(struct rtw89_dev *rtwdev);
2637 void rtw89_hw_scan_start(struct rtw89_dev *rtwdev, struct ieee80211_vif *vif,
2638 struct ieee80211_scan_request *req);
2639 void rtw89_hw_scan_complete(struct rtw89_dev *rtwdev, struct ieee80211_vif *vif,
2641 int rtw89_hw_scan_offload(struct rtw89_dev *rtwdev, struct ieee80211_vif *vif,
2643 void rtw89_hw_scan_status_report(struct rtw89_dev *rtwdev, struct sk_buff *skb);
2644 void rtw89_hw_scan_chan_switch(struct rtw89_dev *rtwdev, struct sk_buff *skb);
2645 void rtw89_hw_scan_abort(struct rtw89_dev *rtwdev, struct ieee80211_vif *vif);
2646 void rtw89_store_op_chan(struct rtw89_dev *rtwdev);
2647 int rtw89_fw_h2c_trigger_cpu_exception(struct rtw89_dev *rtwdev);