drivers/net/wireless/realtek/rtw89/core.c

   1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
   2 /* Copyright(c) 2019-2020  Realtek Corporation
   3  */
   4 #include <linux/ip.h>
   5 #include <linux/udp.h>
   6
   7 #include "cam.h"
   8 #include "coex.h"
   9 #include "core.h"
  10 #include "efuse.h"
  11 #include "fw.h"
  12 #include "mac.h"
  13 #include "phy.h"
  14 #include "ps.h"
  15 #include "reg.h"
  16 #include "sar.h"
  17 #include "ser.h"
  18 #include "txrx.h"
  19 #include "util.h"
  20
  21 static bool rtw89_disable_ps_mode;
  22 module_param_named(disable_ps_mode, rtw89_disable_ps_mode, bool, 0644);
  23 MODULE_PARM_DESC(disable_ps_mode, "Set Y to disable low power mode");
  24
  25 #define RTW89_DEF_CHAN(_freq, _hw_val, _flags, _band)   \
  26         { .center_freq = _freq, .hw_value = _hw_val, .flags = _flags, .band = _band, }
  27 #define RTW89_DEF_CHAN_2G(_freq, _hw_val)       \
  28         RTW89_DEF_CHAN(_freq, _hw_val, 0, NL80211_BAND_2GHZ)
  29 #define RTW89_DEF_CHAN_5G(_freq, _hw_val)       \
  30         RTW89_DEF_CHAN(_freq, _hw_val, 0, NL80211_BAND_5GHZ)
  31 #define RTW89_DEF_CHAN_5G_NO_HT40MINUS(_freq, _hw_val)  \
  32         RTW89_DEF_CHAN(_freq, _hw_val, IEEE80211_CHAN_NO_HT40MINUS, NL80211_BAND_5GHZ)
  33 #define RTW89_DEF_CHAN_6G(_freq, _hw_val)       \
  34         RTW89_DEF_CHAN(_freq, _hw_val, 0, NL80211_BAND_6GHZ)
  35
  36 static struct ieee80211_channel rtw89_channels_2ghz[] = {
  37         RTW89_DEF_CHAN_2G(2412, 1),
  38         RTW89_DEF_CHAN_2G(2417, 2),
  39         RTW89_DEF_CHAN_2G(2422, 3),
  40         RTW89_DEF_CHAN_2G(2427, 4),
  41         RTW89_DEF_CHAN_2G(2432, 5),
  42         RTW89_DEF_CHAN_2G(2437, 6),
  43         RTW89_DEF_CHAN_2G(2442, 7),
  44         RTW89_DEF_CHAN_2G(2447, 8),
  45         RTW89_DEF_CHAN_2G(2452, 9),
  46         RTW89_DEF_CHAN_2G(2457, 10),
  47         RTW89_DEF_CHAN_2G(2462, 11),
  48         RTW89_DEF_CHAN_2G(2467, 12),
  49         RTW89_DEF_CHAN_2G(2472, 13),
  50         RTW89_DEF_CHAN_2G(2484, 14),
  51 };
  52
  53 static struct ieee80211_channel rtw89_channels_5ghz[] = {
  54         RTW89_DEF_CHAN_5G(5180, 36),
  55         RTW89_DEF_CHAN_5G(5200, 40),
  56         RTW89_DEF_CHAN_5G(5220, 44),
  57         RTW89_DEF_CHAN_5G(5240, 48),
  58         RTW89_DEF_CHAN_5G(5260, 52),
  59         RTW89_DEF_CHAN_5G(5280, 56),
  60         RTW89_DEF_CHAN_5G(5300, 60),
  61         RTW89_DEF_CHAN_5G(5320, 64),
  62         RTW89_DEF_CHAN_5G(5500, 100),
  63         RTW89_DEF_CHAN_5G(5520, 104),
  64         RTW89_DEF_CHAN_5G(5540, 108),
  65         RTW89_DEF_CHAN_5G(5560, 112),
  66         RTW89_DEF_CHAN_5G(5580, 116),
  67         RTW89_DEF_CHAN_5G(5600, 120),
  68         RTW89_DEF_CHAN_5G(5620, 124),
  69         RTW89_DEF_CHAN_5G(5640, 128),
  70         RTW89_DEF_CHAN_5G(5660, 132),
  71         RTW89_DEF_CHAN_5G(5680, 136),
  72         RTW89_DEF_CHAN_5G(5700, 140),
  73         RTW89_DEF_CHAN_5G(5720, 144),
  74         RTW89_DEF_CHAN_5G(5745, 149),
  75         RTW89_DEF_CHAN_5G(5765, 153),
  76         RTW89_DEF_CHAN_5G(5785, 157),
  77         RTW89_DEF_CHAN_5G(5805, 161),
  78         RTW89_DEF_CHAN_5G_NO_HT40MINUS(5825, 165),
  79 };
  80
  81 static struct ieee80211_channel rtw89_channels_6ghz[] = {
  82         RTW89_DEF_CHAN_6G(5955, 1),
  83         RTW89_DEF_CHAN_6G(5975, 5),
  84         RTW89_DEF_CHAN_6G(5995, 9),
  85         RTW89_DEF_CHAN_6G(6015, 13),
  86         RTW89_DEF_CHAN_6G(6035, 17),
  87         RTW89_DEF_CHAN_6G(6055, 21),
  88         RTW89_DEF_CHAN_6G(6075, 25),
  89         RTW89_DEF_CHAN_6G(6095, 29),
  90         RTW89_DEF_CHAN_6G(6115, 33),
  91         RTW89_DEF_CHAN_6G(6135, 37),
  92         RTW89_DEF_CHAN_6G(6155, 41),
  93         RTW89_DEF_CHAN_6G(6175, 45),
  94         RTW89_DEF_CHAN_6G(6195, 49),
  95         RTW89_DEF_CHAN_6G(6215, 53),
  96         RTW89_DEF_CHAN_6G(6235, 57),
  97         RTW89_DEF_CHAN_6G(6255, 61),
  98         RTW89_DEF_CHAN_6G(6275, 65),
  99         RTW89_DEF_CHAN_6G(6295, 69),
 100         RTW89_DEF_CHAN_6G(6315, 73),
 101         RTW89_DEF_CHAN_6G(6335, 77),
 102         RTW89_DEF_CHAN_6G(6355, 81),
 103         RTW89_DEF_CHAN_6G(6375, 85),
 104         RTW89_DEF_CHAN_6G(6395, 89),
 105         RTW89_DEF_CHAN_6G(6415, 93),
 106         RTW89_DEF_CHAN_6G(6435, 97),
 107         RTW89_DEF_CHAN_6G(6455, 101),
 108         RTW89_DEF_CHAN_6G(6475, 105),
 109         RTW89_DEF_CHAN_6G(6495, 109),
 110         RTW89_DEF_CHAN_6G(6515, 113),
 111         RTW89_DEF_CHAN_6G(6535, 117),
 112         RTW89_DEF_CHAN_6G(6555, 121),
 113         RTW89_DEF_CHAN_6G(6575, 125),
 114         RTW89_DEF_CHAN_6G(6595, 129),
 115         RTW89_DEF_CHAN_6G(6615, 133),
 116         RTW89_DEF_CHAN_6G(6635, 137),
 117         RTW89_DEF_CHAN_6G(6655, 141),
 118         RTW89_DEF_CHAN_6G(6675, 145),
 119         RTW89_DEF_CHAN_6G(6695, 149),
 120         RTW89_DEF_CHAN_6G(6715, 153),
 121         RTW89_DEF_CHAN_6G(6735, 157),
 122         RTW89_DEF_CHAN_6G(6755, 161),
 123         RTW89_DEF_CHAN_6G(6775, 165),
 124         RTW89_DEF_CHAN_6G(6795, 169),
 125         RTW89_DEF_CHAN_6G(6815, 173),
 126         RTW89_DEF_CHAN_6G(6835, 177),
 127         RTW89_DEF_CHAN_6G(6855, 181),
 128         RTW89_DEF_CHAN_6G(6875, 185),
 129         RTW89_DEF_CHAN_6G(6895, 189),
 130         RTW89_DEF_CHAN_6G(6915, 193),
 131         RTW89_DEF_CHAN_6G(6935, 197),
 132         RTW89_DEF_CHAN_6G(6955, 201),
 133         RTW89_DEF_CHAN_6G(6975, 205),
 134         RTW89_DEF_CHAN_6G(6995, 209),
 135         RTW89_DEF_CHAN_6G(7015, 213),
 136         RTW89_DEF_CHAN_6G(7035, 217),
 137         RTW89_DEF_CHAN_6G(7055, 221),
 138         RTW89_DEF_CHAN_6G(7075, 225),
 139         RTW89_DEF_CHAN_6G(7095, 229),
 140         RTW89_DEF_CHAN_6G(7115, 233),
 141 };
 142
 143 static struct ieee80211_rate rtw89_bitrates[] = {
 144         { .bitrate = 10,  .hw_value = 0x00, },
 145         { .bitrate = 20,  .hw_value = 0x01, },
 146         { .bitrate = 55,  .hw_value = 0x02, },
 147         { .bitrate = 110, .hw_value = 0x03, },
 148         { .bitrate = 60,  .hw_value = 0x04, },
 149         { .bitrate = 90,  .hw_value = 0x05, },
 150         { .bitrate = 120, .hw_value = 0x06, },
 151         { .bitrate = 180, .hw_value = 0x07, },
 152         { .bitrate = 240, .hw_value = 0x08, },
 153         { .bitrate = 360, .hw_value = 0x09, },
 154         { .bitrate = 480, .hw_value = 0x0a, },
 155         { .bitrate = 540, .hw_value = 0x0b, },
 156 };
 157
 158 u16 rtw89_ra_report_to_bitrate(struct rtw89_dev *rtwdev, u8 rpt_rate)
 159 {
 160         struct ieee80211_rate rate;
 161
 162         if (unlikely(rpt_rate >= ARRAY_SIZE(rtw89_bitrates))) {
 163                 rtw89_info(rtwdev, "invalid rpt rate %d\n", rpt_rate);
 164                 return 0;
 165         }
 166
 167         rate = rtw89_bitrates[rpt_rate];
 168
 169         return rate.bitrate;
 170 }
 171
 172 static struct ieee80211_supported_band rtw89_sband_2ghz = {
 173         .band           = NL80211_BAND_2GHZ,
 174         .channels       = rtw89_channels_2ghz,
 175         .n_channels     = ARRAY_SIZE(rtw89_channels_2ghz),
 176         .bitrates       = rtw89_bitrates,
 177         .n_bitrates     = ARRAY_SIZE(rtw89_bitrates),
 178         .ht_cap         = {0},
 179         .vht_cap        = {0},
 180 };
 181
 182 static struct ieee80211_supported_band rtw89_sband_5ghz = {
 183         .band           = NL80211_BAND_5GHZ,
 184         .channels       = rtw89_channels_5ghz,
 185         .n_channels     = ARRAY_SIZE(rtw89_channels_5ghz),
 186
 187         /* 5G has no CCK rates, 1M/2M/5.5M/11M */
 188         .bitrates       = rtw89_bitrates + 4,
 189         .n_bitrates     = ARRAY_SIZE(rtw89_bitrates) - 4,
 190         .ht_cap         = {0},
 191         .vht_cap        = {0},
 192 };
 193
 194 static struct ieee80211_supported_band rtw89_sband_6ghz = {
 195         .band           = NL80211_BAND_6GHZ,
 196         .channels       = rtw89_channels_6ghz,
 197         .n_channels     = ARRAY_SIZE(rtw89_channels_6ghz),
 198
 199         /* 6G has no CCK rates, 1M/2M/5.5M/11M */
 200         .bitrates       = rtw89_bitrates + 4,
 201         .n_bitrates     = ARRAY_SIZE(rtw89_bitrates) - 4,
 202 };
 203
 204 static void rtw89_traffic_stats_accu(struct rtw89_dev *rtwdev,
 205                                      struct rtw89_traffic_stats *stats,
 206                                      struct sk_buff *skb, bool tx)
 207 {
 208         struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
 209
 210         if (!ieee80211_is_data(hdr->frame_control))
 211                 return;
 212
 213         if (is_broadcast_ether_addr(hdr->addr1) ||
 214             is_multicast_ether_addr(hdr->addr1))
 215                 return;
 216
 217         if (tx) {
 218                 stats->tx_cnt++;
 219                 stats->tx_unicast += skb->len;
 220         } else {
 221                 stats->rx_cnt++;
 222                 stats->rx_unicast += skb->len;
 223         }
 224 }
 225
 226 static void rtw89_get_channel_params(struct cfg80211_chan_def *chandef,
 227                                      struct rtw89_channel_params *chan_param)
 228 {
 229         struct ieee80211_channel *channel = chandef->chan;
 230         enum nl80211_chan_width width = chandef->width;
 231         u32 primary_freq, center_freq;
 232         u8 center_chan;
 233         u8 bandwidth = RTW89_CHANNEL_WIDTH_20;
 234         u8 primary_chan_idx = 0;
 235         u32 offset;
 236         u8 band;
 237         u8 subband;
 238
 239         center_chan = channel->hw_value;
 240         primary_freq = channel->center_freq;
 241         center_freq = chandef->center_freq1;
 242
 243         switch (width) {
 244         case NL80211_CHAN_WIDTH_20_NOHT:
 245         case NL80211_CHAN_WIDTH_20:
 246                 bandwidth = RTW89_CHANNEL_WIDTH_20;
 247                 primary_chan_idx = RTW89_SC_DONT_CARE;
 248                 break;
 249         case NL80211_CHAN_WIDTH_40:
 250                 bandwidth = RTW89_CHANNEL_WIDTH_40;
 251                 if (primary_freq > center_freq) {
 252                         primary_chan_idx = RTW89_SC_20_UPPER;
 253                         center_chan -= 2;
 254                 } else {
 255                         primary_chan_idx = RTW89_SC_20_LOWER;
 256                         center_chan += 2;
 257                 }
 258                 break;
 259         case NL80211_CHAN_WIDTH_80:
 260         case NL80211_CHAN_WIDTH_160:
 261                 bandwidth = nl_to_rtw89_bandwidth(width);
 262                 if (primary_freq > center_freq) {
 263                         offset = (primary_freq - center_freq - 10) / 20;
 264                         primary_chan_idx = RTW89_SC_20_UPPER + offset * 2;
 265                         center_chan -= 2 + offset * 4;
 266                 } else {
 267                         offset = (center_freq - primary_freq - 10) / 20;
 268                         primary_chan_idx = RTW89_SC_20_LOWER + offset * 2;
 269                         center_chan += 2 + offset * 4;
 270                 }
 271                 break;
 272         default:
 273                 center_chan = 0;
 274                 break;
 275         }
 276
 277         switch (channel->band) {
 278         default:
 279         case NL80211_BAND_2GHZ:
 280                 band = RTW89_BAND_2G;
 281                 break;
 282         case NL80211_BAND_5GHZ:
 283                 band = RTW89_BAND_5G;
 284                 break;
 285         case NL80211_BAND_6GHZ:
 286                 band = RTW89_BAND_6G;
 287                 break;
 288         }
 289
 290         switch (band) {
 291         default:
 292         case RTW89_BAND_2G:
 293                 switch (center_chan) {
 294                 default:
 295                 case 1 ... 14:
 296                         subband = RTW89_CH_2G;
 297                         break;
 298                 }
 299                 break;
 300         case RTW89_BAND_5G:
 301                 switch (center_chan) {
 302                 default:
 303                 case 36 ... 64:
 304                         subband = RTW89_CH_5G_BAND_1;
 305                         break;
 306                 case 100 ... 144:
 307                         subband = RTW89_CH_5G_BAND_3;
 308                         break;
 309                 case 149 ... 177:
 310                         subband = RTW89_CH_5G_BAND_4;
 311                         break;
 312                 }
 313                 break;
 314         case RTW89_BAND_6G:
 315                 switch (center_chan) {
 316                 default:
 317                 case 1 ... 29:
 318                         subband = RTW89_CH_6G_BAND_IDX0;
 319                         break;
 320                 case 33 ... 61:
 321                         subband = RTW89_CH_6G_BAND_IDX1;
 322                         break;
 323                 case 65 ... 93:
 324                         subband = RTW89_CH_6G_BAND_IDX2;
 325                         break;
 326                 case 97 ... 125:
 327                         subband = RTW89_CH_6G_BAND_IDX3;
 328                         break;
 329                 case 129 ... 157:
 330                         subband = RTW89_CH_6G_BAND_IDX4;
 331                         break;
 332                 case 161 ... 189:
 333                         subband = RTW89_CH_6G_BAND_IDX5;
 334                         break;
 335                 case 193 ... 221:
 336                         subband = RTW89_CH_6G_BAND_IDX6;
 337                         break;
 338                 case 225 ... 253:
 339                         subband = RTW89_CH_6G_BAND_IDX7;
 340                         break;
 341                 }
 342                 break;
 343         }
 344
 345         chan_param->center_chan = center_chan;
 346         chan_param->center_freq = center_freq;
 347         chan_param->primary_chan = channel->hw_value;
 348         chan_param->bandwidth = bandwidth;
 349         chan_param->pri_ch_idx = primary_chan_idx;
 350         chan_param->band_type = band;
 351         chan_param->subband_type = subband;
 352 }
 353
 354 void rtw89_set_channel(struct rtw89_dev *rtwdev)
 355 {
 356         struct ieee80211_hw *hw = rtwdev->hw;
 357         const struct rtw89_chip_info *chip = rtwdev->chip;
 358         struct rtw89_hal *hal = &rtwdev->hal;
 359         struct rtw89_channel_params ch_param;
 360         struct rtw89_channel_help_params bak;
 361         u8 center_chan, bandwidth;
 362         bool band_changed;
 363
 364         rtw89_get_channel_params(&hw->conf.chandef, &ch_param);
 365         if (WARN(ch_param.center_chan == 0, "Invalid channel\n"))
 366                 return;
 367
 368         center_chan = ch_param.center_chan;
 369         bandwidth = ch_param.bandwidth;
 370         band_changed = hal->current_band_type != ch_param.band_type ||
 371                        hal->current_channel == 0;
 372
 373         hal->current_band_width = bandwidth;
 374         hal->current_channel = center_chan;
 375         hal->current_freq = ch_param.center_freq;
 376         hal->prev_primary_channel = hal->current_primary_channel;
 377         hal->prev_band_type = hal->current_band_type;
 378         hal->current_primary_channel = ch_param.primary_chan;
 379         hal->current_band_type = ch_param.band_type;
 380         hal->current_subband = ch_param.subband_type;
 381
 382         rtw89_chip_set_channel_prepare(rtwdev, &bak);
 383
 384         chip->ops->set_channel(rtwdev, &ch_param);
 385
 386         rtw89_chip_set_txpwr(rtwdev);
 387
 388         rtw89_chip_set_channel_done(rtwdev, &bak);
 389
 390         if (band_changed) {
 391                 rtw89_btc_ntfy_switch_band(rtwdev, RTW89_PHY_0, hal->current_band_type);
 392                 rtw89_chip_rfk_band_changed(rtwdev);
 393         }
 394 }
 395
 396 static enum rtw89_core_tx_type
 397 rtw89_core_get_tx_type(struct rtw89_dev *rtwdev,
 398                        struct sk_buff *skb)
 399 {
 400         struct ieee80211_hdr *hdr = (void *)skb->data;
 401         __le16 fc = hdr->frame_control;
 402
 403         if (ieee80211_is_mgmt(fc) || ieee80211_is_nullfunc(fc))
 404                 return RTW89_CORE_TX_TYPE_MGMT;
 405
 406         return RTW89_CORE_TX_TYPE_DATA;
 407 }
 408
 409 static void
 410 rtw89_core_tx_update_ampdu_info(struct rtw89_dev *rtwdev,
 411                                 struct rtw89_core_tx_request *tx_req, u8 tid)
 412 {
 413         struct ieee80211_sta *sta = tx_req->sta;
 414         struct rtw89_tx_desc_info *desc_info = &tx_req->desc_info;
 415         struct rtw89_sta *rtwsta;
 416         u8 ampdu_num;
 417
 418         if (!sta) {
 419                 rtw89_warn(rtwdev, "cannot set ampdu info without sta\n");
 420                 return;
 421         }
 422
 423         rtwsta = (struct rtw89_sta *)sta->drv_priv;
 424
 425         ampdu_num = (u8)((rtwsta->ampdu_params[tid].agg_num ?
 426                           rtwsta->ampdu_params[tid].agg_num :
 427                           4 << sta->deflink.ht_cap.ampdu_factor) - 1);
 428
 429         desc_info->agg_en = true;
 430         desc_info->ampdu_density = sta->deflink.ht_cap.ampdu_density;
 431         desc_info->ampdu_num = ampdu_num;
 432 }
 433
 434 static void
 435 rtw89_core_tx_update_sec_key(struct rtw89_dev *rtwdev,
 436                              struct rtw89_core_tx_request *tx_req)
 437 {
 438         const struct rtw89_chip_info *chip = rtwdev->chip;
 439         struct ieee80211_vif *vif = tx_req->vif;
 440         struct ieee80211_sta *sta = tx_req->sta;
 441         struct ieee80211_tx_info *info;
 442         struct ieee80211_key_conf *key;
 443         struct rtw89_vif *rtwvif;
 444         struct rtw89_sta *rtwsta = sta_to_rtwsta_safe(sta);
 445         struct rtw89_addr_cam_entry *addr_cam;
 446         struct rtw89_sec_cam_entry *sec_cam;
 447         struct rtw89_tx_desc_info *desc_info = &tx_req->desc_info;
 448         struct sk_buff *skb = tx_req->skb;
 449         u8 sec_type = RTW89_SEC_KEY_TYPE_NONE;
 450         u64 pn64;
 451
 452         if (!vif) {
 453                 rtw89_warn(rtwdev, "cannot set sec key without vif\n");
 454                 return;
 455         }
 456
 457         rtwvif = (struct rtw89_vif *)vif->drv_priv;
 458         addr_cam = rtw89_get_addr_cam_of(rtwvif, rtwsta);
 459
 460         info = IEEE80211_SKB_CB(skb);
 461         key = info->control.hw_key;
 462         sec_cam = addr_cam->sec_entries[key->hw_key_idx];
 463         if (!sec_cam) {
 464                 rtw89_warn(rtwdev, "sec cam entry is empty\n");
 465                 return;
 466         }
 467
 468         switch (key->cipher) {
 469         case WLAN_CIPHER_SUITE_WEP40:
 470                 sec_type = RTW89_SEC_KEY_TYPE_WEP40;
 471                 break;
 472         case WLAN_CIPHER_SUITE_WEP104:
 473                 sec_type = RTW89_SEC_KEY_TYPE_WEP104;
 474                 break;
 475         case WLAN_CIPHER_SUITE_TKIP:
 476                 sec_type = RTW89_SEC_KEY_TYPE_TKIP;
 477                 break;
 478         case WLAN_CIPHER_SUITE_CCMP:
 479                 sec_type = RTW89_SEC_KEY_TYPE_CCMP128;
 480                 break;
 481         case WLAN_CIPHER_SUITE_CCMP_256:
 482                 sec_type = RTW89_SEC_KEY_TYPE_CCMP256;
 483                 break;
 484         case WLAN_CIPHER_SUITE_GCMP:
 485                 sec_type = RTW89_SEC_KEY_TYPE_GCMP128;
 486                 break;
 487         case WLAN_CIPHER_SUITE_GCMP_256:
 488                 sec_type = RTW89_SEC_KEY_TYPE_GCMP256;
 489                 break;
 490         default:
 491                 rtw89_warn(rtwdev, "key cipher not supported %d\n", key->cipher);
 492                 return;
 493         }
 494
 495         desc_info->sec_en = true;
 496         desc_info->sec_keyid = key->keyidx;
 497         desc_info->sec_type = sec_type;
 498         desc_info->sec_cam_idx = sec_cam->sec_cam_idx;
 499
 500         if (!chip->hw_sec_hdr)
 501                 return;
 502
 503         pn64 = atomic64_inc_return(&key->tx_pn);
 504         desc_info->sec_seq[0] = pn64;
 505         desc_info->sec_seq[1] = pn64 >> 8;
 506         desc_info->sec_seq[2] = pn64 >> 16;
 507         desc_info->sec_seq[3] = pn64 >> 24;
 508         desc_info->sec_seq[4] = pn64 >> 32;
 509         desc_info->sec_seq[5] = pn64 >> 40;
 510         desc_info->wp_offset = 1; /* in unit of 8 bytes for security header */
 511 }
 512
 513 static u16 rtw89_core_get_mgmt_rate(struct rtw89_dev *rtwdev,
 514                                     struct rtw89_core_tx_request *tx_req)
 515 {
 516         struct sk_buff *skb = tx_req->skb;
 517         struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
 518         struct ieee80211_vif *vif = tx_info->control.vif;
 519         struct rtw89_hal *hal = &rtwdev->hal;
 520         u16 lowest_rate = hal->current_band_type == RTW89_BAND_2G ?
 521                           RTW89_HW_RATE_CCK1 : RTW89_HW_RATE_OFDM6;
 522
 523         if (!vif || !vif->bss_conf.basic_rates || !tx_req->sta)
 524                 return lowest_rate;
 525
 526         return __ffs(vif->bss_conf.basic_rates) + lowest_rate;
 527 }
 528
 529 static void
 530 rtw89_core_tx_update_mgmt_info(struct rtw89_dev *rtwdev,
 531                                struct rtw89_core_tx_request *tx_req)
 532 {
 533         struct ieee80211_vif *vif = tx_req->vif;
 534         struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv;
 535         struct rtw89_tx_desc_info *desc_info = &tx_req->desc_info;
 536         u8 qsel, ch_dma;
 537
 538         qsel = desc_info->hiq ? RTW89_TX_QSEL_B0_HI : RTW89_TX_QSEL_B0_MGMT;
 539         ch_dma = rtw89_core_get_ch_dma(rtwdev, qsel);
 540
 541         desc_info->qsel = qsel;
 542         desc_info->ch_dma = ch_dma;
 543         desc_info->port = desc_info->hiq ? rtwvif->port : 0;
 544         desc_info->hw_ssn_sel = RTW89_MGMT_HW_SSN_SEL;
 545         desc_info->hw_seq_mode = RTW89_MGMT_HW_SEQ_MODE;
 546
 547         /* fixed data rate for mgmt frames */
 548         desc_info->en_wd_info = true;
 549         desc_info->use_rate = true;
 550         desc_info->dis_data_fb = true;
 551         desc_info->data_rate = rtw89_core_get_mgmt_rate(rtwdev, tx_req);
 552
 553         rtw89_debug(rtwdev, RTW89_DBG_TXRX,
 554                     "tx mgmt frame with rate 0x%x on channel %d (bw %d)\n",
 555                     desc_info->data_rate, rtwdev->hal.current_channel,
 556                     rtwdev->hal.current_band_width);
 557 }
 558
 559 static void
 560 rtw89_core_tx_update_h2c_info(struct rtw89_dev *rtwdev,
 561                               struct rtw89_core_tx_request *tx_req)
 562 {
 563         struct rtw89_tx_desc_info *desc_info = &tx_req->desc_info;
 564
 565         desc_info->is_bmc = false;
 566         desc_info->wd_page = false;
 567         desc_info->ch_dma = RTW89_DMA_H2C;
 568 }
 569
 570 static void rtw89_core_get_no_ul_ofdma_htc(struct rtw89_dev *rtwdev, __le32 *htc)
 571 {
 572         static const u8 rtw89_bandwidth_to_om[] = {
 573                 [RTW89_CHANNEL_WIDTH_20] = HTC_OM_CHANNEL_WIDTH_20,
 574                 [RTW89_CHANNEL_WIDTH_40] = HTC_OM_CHANNEL_WIDTH_40,
 575                 [RTW89_CHANNEL_WIDTH_80] = HTC_OM_CHANNEL_WIDTH_80,
 576                 [RTW89_CHANNEL_WIDTH_160] = HTC_OM_CHANNEL_WIDTH_160_OR_80_80,
 577                 [RTW89_CHANNEL_WIDTH_80_80] = HTC_OM_CHANNEL_WIDTH_160_OR_80_80,
 578         };
 579         const struct rtw89_chip_info *chip = rtwdev->chip;
 580         struct rtw89_hal *hal = &rtwdev->hal;
 581         u8 om_bandwidth;
 582
 583         if (!chip->dis_2g_40m_ul_ofdma ||
 584             hal->current_band_type != RTW89_BAND_2G ||
 585             hal->current_band_width != RTW89_CHANNEL_WIDTH_40)
 586                 return;
 587
 588         om_bandwidth = hal->current_band_width < ARRAY_SIZE(rtw89_bandwidth_to_om) ?
 589                        rtw89_bandwidth_to_om[hal->current_band_width] : 0;
 590         *htc = le32_encode_bits(RTW89_HTC_VARIANT_HE, RTW89_HTC_MASK_VARIANT) |
 591                le32_encode_bits(RTW89_HTC_VARIANT_HE_CID_OM, RTW89_HTC_MASK_CTL_ID) |
 592                le32_encode_bits(hal->rx_nss - 1, RTW89_HTC_MASK_HTC_OM_RX_NSS) |
 593                le32_encode_bits(om_bandwidth, RTW89_HTC_MASK_HTC_OM_CH_WIDTH) |
 594                le32_encode_bits(1, RTW89_HTC_MASK_HTC_OM_UL_MU_DIS) |
 595                le32_encode_bits(hal->tx_nss - 1, RTW89_HTC_MASK_HTC_OM_TX_NSTS) |
 596                le32_encode_bits(0, RTW89_HTC_MASK_HTC_OM_ER_SU_DIS) |
 597                le32_encode_bits(0, RTW89_HTC_MASK_HTC_OM_DL_MU_MIMO_RR) |
 598                le32_encode_bits(0, RTW89_HTC_MASK_HTC_OM_UL_MU_DATA_DIS);
 599 }
 600
 601 static bool
 602 __rtw89_core_tx_check_he_qos_htc(struct rtw89_dev *rtwdev,
 603                                  struct rtw89_core_tx_request *tx_req,
 604                                  enum btc_pkt_type pkt_type)
 605 {
 606         struct ieee80211_sta *sta = tx_req->sta;
 607         struct sk_buff *skb = tx_req->skb;
 608         struct ieee80211_hdr *hdr = (void *)skb->data;
 609         __le16 fc = hdr->frame_control;
 610
 611         /* AP IOT issue with EAPoL, ARP and DHCP */
 612         if (pkt_type < PACKET_MAX)
 613                 return false;
 614
 615         if (!sta || !sta->deflink.he_cap.has_he)
 616                 return false;
 617
 618         if (!ieee80211_is_data_qos(fc))
 619                 return false;
 620
 621         if (skb_headroom(skb) < IEEE80211_HT_CTL_LEN)
 622                 return false;
 623
 624         return true;
 625 }
 626
 627 static void
 628 __rtw89_core_tx_adjust_he_qos_htc(struct rtw89_dev *rtwdev,
 629                                   struct rtw89_core_tx_request *tx_req)
 630 {
 631         struct ieee80211_sta *sta = tx_req->sta;
 632         struct rtw89_sta *rtwsta = (struct rtw89_sta *)sta->drv_priv;
 633         struct sk_buff *skb = tx_req->skb;
 634         struct ieee80211_hdr *hdr = (void *)skb->data;
 635         __le16 fc = hdr->frame_control;
 636         void *data;
 637         __le32 *htc;
 638         u8 *qc;
 639         int hdr_len;
 640
 641         hdr_len = ieee80211_has_a4(fc) ? 32 : 26;
 642         data = skb_push(skb, IEEE80211_HT_CTL_LEN);
 643         memmove(data, data + IEEE80211_HT_CTL_LEN, hdr_len);
 644
 645         hdr = data;
 646         htc = data + hdr_len;
 647         hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_ORDER);
 648         *htc = rtwsta->htc_template ? rtwsta->htc_template :
 649                le32_encode_bits(RTW89_HTC_VARIANT_HE, RTW89_HTC_MASK_VARIANT) |
 650                le32_encode_bits(RTW89_HTC_VARIANT_HE_CID_CAS, RTW89_HTC_MASK_CTL_ID);
 651
 652         qc = data + hdr_len - IEEE80211_QOS_CTL_LEN;
 653         qc[0] |= IEEE80211_QOS_CTL_EOSP;
 654 }
 655
 656 static void
 657 rtw89_core_tx_update_he_qos_htc(struct rtw89_dev *rtwdev,
 658                                 struct rtw89_core_tx_request *tx_req,
 659                                 enum btc_pkt_type pkt_type)
 660 {
 661         struct rtw89_tx_desc_info *desc_info = &tx_req->desc_info;
 662         struct ieee80211_vif *vif = tx_req->vif;
 663         struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv;
 664
 665         if (!__rtw89_core_tx_check_he_qos_htc(rtwdev, tx_req, pkt_type))
 666                 goto desc_bk;
 667
 668         __rtw89_core_tx_adjust_he_qos_htc(rtwdev, tx_req);
 669
 670         desc_info->pkt_size += IEEE80211_HT_CTL_LEN;
 671         desc_info->a_ctrl_bsr = true;
 672
 673 desc_bk:
 674         if (!rtwvif || rtwvif->last_a_ctrl == desc_info->a_ctrl_bsr)
 675                 return;
 676
 677         rtwvif->last_a_ctrl = desc_info->a_ctrl_bsr;
 678         desc_info->bk = true;
 679 }
 680
 681 static u8 rtw89_core_tx_get_mac_id(struct rtw89_dev *rtwdev,
 682                                    struct rtw89_core_tx_request *tx_req)
 683 {
 684         struct ieee80211_vif *vif = tx_req->vif;
 685         struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv;
 686         struct ieee80211_sta *sta = tx_req->sta;
 687         struct rtw89_sta *rtwsta;
 688
 689         if (!sta)
 690                 return rtwvif->mac_id;
 691
 692         rtwsta = (struct rtw89_sta *)sta->drv_priv;
 693         return rtwsta->mac_id;
 694 }
 695
 696 static void
 697 rtw89_core_tx_update_data_info(struct rtw89_dev *rtwdev,
 698                                struct rtw89_core_tx_request *tx_req)
 699 {
 700         struct ieee80211_vif *vif = tx_req->vif;
 701         struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv;
 702         struct rtw89_phy_rate_pattern *rate_pattern = &rtwvif->rate_pattern;
 703         struct rtw89_hal *hal = &rtwdev->hal;
 704         struct rtw89_tx_desc_info *desc_info = &tx_req->desc_info;
 705         struct sk_buff *skb = tx_req->skb;
 706         u8 tid, tid_indicate;
 707         u8 qsel, ch_dma;
 708
 709         tid = skb->priority & IEEE80211_QOS_CTL_TAG1D_MASK;
 710         tid_indicate = rtw89_core_get_tid_indicate(rtwdev, tid);
 711         qsel = desc_info->hiq ? RTW89_TX_QSEL_B0_HI : rtw89_core_get_qsel(rtwdev, tid);
 712         ch_dma = rtw89_core_get_ch_dma(rtwdev, qsel);
 713
 714         desc_info->ch_dma = ch_dma;
 715         desc_info->tid_indicate = tid_indicate;
 716         desc_info->qsel = qsel;
 717         desc_info->mac_id = rtw89_core_tx_get_mac_id(rtwdev, tx_req);
 718         desc_info->port = desc_info->hiq ? rtwvif->port : 0;
 719
 720         /* enable wd_info for AMPDU */
 721         desc_info->en_wd_info = true;
 722
 723         if (IEEE80211_SKB_CB(skb)->flags & IEEE80211_TX_CTL_AMPDU)
 724                 rtw89_core_tx_update_ampdu_info(rtwdev, tx_req, tid);
 725         if (IEEE80211_SKB_CB(skb)->control.hw_key)
 726                 rtw89_core_tx_update_sec_key(rtwdev, tx_req);
 727
 728         if (rate_pattern->enable)
 729                 desc_info->data_retry_lowest_rate = rate_pattern->rate;
 730         else if (hal->current_band_type == RTW89_BAND_2G)
 731                 desc_info->data_retry_lowest_rate = RTW89_HW_RATE_CCK1;
 732         else
 733                 desc_info->data_retry_lowest_rate = RTW89_HW_RATE_OFDM6;
 734 }
 735
 736 static enum btc_pkt_type
 737 rtw89_core_tx_btc_spec_pkt_notify(struct rtw89_dev *rtwdev,
 738                                   struct rtw89_core_tx_request *tx_req)
 739 {
 740         struct sk_buff *skb = tx_req->skb;
 741         struct udphdr *udphdr;
 742
 743         if (IEEE80211_SKB_CB(skb)->control.flags & IEEE80211_TX_CTRL_PORT_CTRL_PROTO) {
 744                 ieee80211_queue_work(rtwdev->hw, &rtwdev->btc.eapol_notify_work);
 745                 return PACKET_EAPOL;
 746         }
 747
 748         if (skb->protocol == htons(ETH_P_ARP)) {
 749                 ieee80211_queue_work(rtwdev->hw, &rtwdev->btc.arp_notify_work);
 750                 return PACKET_ARP;
 751         }
 752
 753         if (skb->protocol == htons(ETH_P_IP) &&
 754             ip_hdr(skb)->protocol == IPPROTO_UDP) {
 755                 udphdr = udp_hdr(skb);
 756                 if (((udphdr->source == htons(67) && udphdr->dest == htons(68)) ||
 757                      (udphdr->source == htons(68) && udphdr->dest == htons(67))) &&
 758                     skb->len > 282) {
 759                         ieee80211_queue_work(rtwdev->hw, &rtwdev->btc.dhcp_notify_work);
 760                         return PACKET_DHCP;
 761                 }
 762         }
 763
 764         if (skb->protocol == htons(ETH_P_IP) &&
 765             ip_hdr(skb)->protocol == IPPROTO_ICMP) {
 766                 ieee80211_queue_work(rtwdev->hw, &rtwdev->btc.icmp_notify_work);
 767                 return PACKET_ICMP;
 768         }
 769
 770         return PACKET_MAX;
 771 }
 772
 773 static void rtw89_core_tx_update_llc_hdr(struct rtw89_dev *rtwdev,
 774                                          struct rtw89_tx_desc_info *desc_info,
 775                                          struct sk_buff *skb)
 776 {
 777         struct ieee80211_hdr *hdr = (void *)skb->data;
 778         __le16 fc = hdr->frame_control;
 779
 780         desc_info->hdr_llc_len = ieee80211_hdrlen(fc);
 781         desc_info->hdr_llc_len >>= 1; /* in unit of 2 bytes */
 782 }
 783
 784 static void
 785 rtw89_core_tx_wake(struct rtw89_dev *rtwdev,
 786                    struct rtw89_core_tx_request *tx_req)
 787 {
 788         if (!RTW89_CHK_FW_FEATURE(TX_WAKE, &rtwdev->fw))
 789                 return;
 790
 791         if (!test_bit(RTW89_FLAG_LOW_POWER_MODE, rtwdev->flags))
 792                 return;
 793
 794         if (tx_req->tx_type != RTW89_CORE_TX_TYPE_MGMT)
 795                 return;
 796
 797         rtw89_mac_notify_wake(rtwdev);
 798 }
 799
 800 static void
 801 rtw89_core_tx_update_desc_info(struct rtw89_dev *rtwdev,
 802                                struct rtw89_core_tx_request *tx_req)
 803 {
 804         struct rtw89_tx_desc_info *desc_info = &tx_req->desc_info;
 805         struct sk_buff *skb = tx_req->skb;
 806         struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
 807         struct ieee80211_hdr *hdr = (void *)skb->data;
 808         enum rtw89_core_tx_type tx_type;
 809         enum btc_pkt_type pkt_type;
 810         bool is_bmc;
 811         u16 seq;
 812
 813         seq = (le16_to_cpu(hdr->seq_ctrl) & IEEE80211_SCTL_SEQ) >> 4;
 814         if (tx_req->tx_type != RTW89_CORE_TX_TYPE_FWCMD) {
 815                 tx_type = rtw89_core_get_tx_type(rtwdev, skb);
 816                 tx_req->tx_type = tx_type;
 817         }
 818         is_bmc = (is_broadcast_ether_addr(hdr->addr1) ||
 819                   is_multicast_ether_addr(hdr->addr1));
 820
 821         desc_info->seq = seq;
 822         desc_info->pkt_size = skb->len;
 823         desc_info->is_bmc = is_bmc;
 824         desc_info->wd_page = true;
 825         desc_info->hiq = info->flags & IEEE80211_TX_CTL_SEND_AFTER_DTIM;
 826
 827         switch (tx_req->tx_type) {
 828         case RTW89_CORE_TX_TYPE_MGMT:
 829                 rtw89_core_tx_update_mgmt_info(rtwdev, tx_req);
 830                 break;
 831         case RTW89_CORE_TX_TYPE_DATA:
 832                 rtw89_core_tx_update_data_info(rtwdev, tx_req);
 833                 pkt_type = rtw89_core_tx_btc_spec_pkt_notify(rtwdev, tx_req);
 834                 rtw89_core_tx_update_he_qos_htc(rtwdev, tx_req, pkt_type);
 835                 rtw89_core_tx_update_llc_hdr(rtwdev, desc_info, skb);
 836                 break;
 837         case RTW89_CORE_TX_TYPE_FWCMD:
 838                 rtw89_core_tx_update_h2c_info(rtwdev, tx_req);
 839                 break;
 840         }
 841 }
 842
 843 void rtw89_core_tx_kick_off(struct rtw89_dev *rtwdev, u8 qsel)
 844 {
 845         u8 ch_dma;
 846
 847         ch_dma = rtw89_core_get_ch_dma(rtwdev, qsel);
 848
 849         rtw89_hci_tx_kick_off(rtwdev, ch_dma);
 850 }
 851
 852 int rtw89_h2c_tx(struct rtw89_dev *rtwdev,
 853                  struct sk_buff *skb, bool fwdl)
 854 {
 855         struct rtw89_core_tx_request tx_req = {0};
 856         u32 cnt;
 857         int ret;
 858
 859         if (!test_bit(RTW89_FLAG_POWERON, rtwdev->flags)) {
 860                 rtw89_debug(rtwdev, RTW89_DBG_FW,
 861                             "ignore h2c due to power is off with firmware state=%d\n",
 862                             test_bit(RTW89_FLAG_FW_RDY, rtwdev->flags));
 863                 return 0;
 864         }
 865
 866         tx_req.skb = skb;
 867         tx_req.tx_type = RTW89_CORE_TX_TYPE_FWCMD;
 868         if (fwdl)
 869                 tx_req.desc_info.fw_dl = true;
 870
 871         rtw89_core_tx_update_desc_info(rtwdev, &tx_req);
 872
 873         if (!fwdl)
 874                 rtw89_hex_dump(rtwdev, RTW89_DBG_FW, "H2C: ", skb->data, skb->len);
 875
 876         cnt = rtw89_hci_check_and_reclaim_tx_resource(rtwdev, RTW89_TXCH_CH12);
 877         if (cnt == 0) {
 878                 rtw89_err(rtwdev, "no tx fwcmd resource\n");
 879                 return -ENOSPC;
 880         }
 881
 882         ret = rtw89_hci_tx_write(rtwdev, &tx_req);
 883         if (ret) {
 884                 rtw89_err(rtwdev, "failed to transmit skb to HCI\n");
 885                 return ret;
 886         }
 887         rtw89_hci_tx_kick_off(rtwdev, RTW89_TXCH_CH12);
 888
 889         return 0;
 890 }
 891
 892 int rtw89_core_tx_write(struct rtw89_dev *rtwdev, struct ieee80211_vif *vif,
 893                         struct ieee80211_sta *sta, struct sk_buff *skb, int *qsel)
 894 {
 895         struct rtw89_core_tx_request tx_req = {0};
 896         struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv;
 897         int ret;
 898
 899         tx_req.skb = skb;
 900         tx_req.sta = sta;
 901         tx_req.vif = vif;
 902
 903         rtw89_traffic_stats_accu(rtwdev, &rtwdev->stats, skb, true);
 904         rtw89_traffic_stats_accu(rtwdev, &rtwvif->stats, skb, true);
 905         rtw89_core_tx_update_desc_info(rtwdev, &tx_req);
 906         rtw89_core_tx_wake(rtwdev, &tx_req);
 907
 908         ret = rtw89_hci_tx_write(rtwdev, &tx_req);
 909         if (ret) {
 910                 rtw89_err(rtwdev, "failed to transmit skb to HCI\n");
 911                 return ret;
 912         }
 913
 914         if (qsel)
 915                 *qsel = tx_req.desc_info.qsel;
 916
 917         return 0;
 918 }
 919
 920 static __le32 rtw89_build_txwd_body0(struct rtw89_tx_desc_info *desc_info)
 921 {
 922         u32 dword = FIELD_PREP(RTW89_TXWD_BODY0_WP_OFFSET, desc_info->wp_offset) |
 923                     FIELD_PREP(RTW89_TXWD_BODY0_WD_INFO_EN, desc_info->en_wd_info) |
 924                     FIELD_PREP(RTW89_TXWD_BODY0_CHANNEL_DMA, desc_info->ch_dma) |
 925                     FIELD_PREP(RTW89_TXWD_BODY0_HDR_LLC_LEN, desc_info->hdr_llc_len) |
 926                     FIELD_PREP(RTW89_TXWD_BODY0_WD_PAGE, desc_info->wd_page) |
 927                     FIELD_PREP(RTW89_TXWD_BODY0_FW_DL, desc_info->fw_dl) |
 928                     FIELD_PREP(RTW89_TXWD_BODY0_HW_SSN_SEL, desc_info->hw_ssn_sel) |
 929                     FIELD_PREP(RTW89_TXWD_BODY0_HW_SSN_MODE, desc_info->hw_seq_mode);
 930
 931         return cpu_to_le32(dword);
 932 }
 933
 934 static __le32 rtw89_build_txwd_body0_v1(struct rtw89_tx_desc_info *desc_info)
 935 {
 936         u32 dword = FIELD_PREP(RTW89_TXWD_BODY0_WP_OFFSET_V1, desc_info->wp_offset) |
 937                     FIELD_PREP(RTW89_TXWD_BODY0_WD_INFO_EN, desc_info->en_wd_info) |
 938                     FIELD_PREP(RTW89_TXWD_BODY0_CHANNEL_DMA, desc_info->ch_dma) |
 939                     FIELD_PREP(RTW89_TXWD_BODY0_HDR_LLC_LEN, desc_info->hdr_llc_len) |
 940                     FIELD_PREP(RTW89_TXWD_BODY0_WD_PAGE, desc_info->wd_page) |
 941                     FIELD_PREP(RTW89_TXWD_BODY0_FW_DL, desc_info->fw_dl);
 942
 943         return cpu_to_le32(dword);
 944 }
 945
 946 static __le32 rtw89_build_txwd_body1_v1(struct rtw89_tx_desc_info *desc_info)
 947 {
 948         u32 dword = FIELD_PREP(RTW89_TXWD_BODY1_ADDR_INFO_NUM, desc_info->addr_info_nr) |
 949                     FIELD_PREP(RTW89_TXWD_BODY1_SEC_KEYID, desc_info->sec_keyid) |
 950                     FIELD_PREP(RTW89_TXWD_BODY1_SEC_TYPE, desc_info->sec_type);
 951
 952         return cpu_to_le32(dword);
 953 }
 954
 955 static __le32 rtw89_build_txwd_body2(struct rtw89_tx_desc_info *desc_info)
 956 {
 957         u32 dword = FIELD_PREP(RTW89_TXWD_BODY2_TID_INDICATE, desc_info->tid_indicate) |
 958                     FIELD_PREP(RTW89_TXWD_BODY2_QSEL, desc_info->qsel) |
 959                     FIELD_PREP(RTW89_TXWD_BODY2_TXPKT_SIZE, desc_info->pkt_size) |
 960                     FIELD_PREP(RTW89_TXWD_BODY2_MACID, desc_info->mac_id);
 961
 962         return cpu_to_le32(dword);
 963 }
 964
 965 static __le32 rtw89_build_txwd_body3(struct rtw89_tx_desc_info *desc_info)
 966 {
 967         u32 dword = FIELD_PREP(RTW89_TXWD_BODY3_SW_SEQ, desc_info->seq) |
 968                     FIELD_PREP(RTW89_TXWD_BODY3_AGG_EN, desc_info->agg_en) |
 969                     FIELD_PREP(RTW89_TXWD_BODY3_BK, desc_info->bk);
 970
 971         return cpu_to_le32(dword);
 972 }
 973
 974 static __le32 rtw89_build_txwd_body4(struct rtw89_tx_desc_info *desc_info)
 975 {
 976         u32 dword = FIELD_PREP(RTW89_TXWD_BODY4_SEC_IV_L0, desc_info->sec_seq[0]) |
 977                     FIELD_PREP(RTW89_TXWD_BODY4_SEC_IV_L1, desc_info->sec_seq[1]);
 978
 979         return cpu_to_le32(dword);
 980 }
 981
 982 static __le32 rtw89_build_txwd_body5(struct rtw89_tx_desc_info *desc_info)
 983 {
 984         u32 dword = FIELD_PREP(RTW89_TXWD_BODY5_SEC_IV_H2, desc_info->sec_seq[2]) |
 985                     FIELD_PREP(RTW89_TXWD_BODY5_SEC_IV_H3, desc_info->sec_seq[3]) |
 986                     FIELD_PREP(RTW89_TXWD_BODY5_SEC_IV_H4, desc_info->sec_seq[4]) |
 987                     FIELD_PREP(RTW89_TXWD_BODY5_SEC_IV_H5, desc_info->sec_seq[5]);
 988
 989         return cpu_to_le32(dword);
 990 }
 991
 992 static __le32 rtw89_build_txwd_body7_v1(struct rtw89_tx_desc_info *desc_info)
 993 {
 994         u32 dword = FIELD_PREP(RTW89_TXWD_BODY7_USE_RATE_V1, desc_info->use_rate) |
 995                     FIELD_PREP(RTW89_TXWD_BODY7_DATA_RATE, desc_info->data_rate);
 996
 997         return cpu_to_le32(dword);
 998 }
 999
1000 static __le32 rtw89_build_txwd_info0(struct rtw89_tx_desc_info *desc_info)
1001 {
1002         u32 dword = FIELD_PREP(RTW89_TXWD_INFO0_USE_RATE, desc_info->use_rate) |
1003                     FIELD_PREP(RTW89_TXWD_INFO0_DATA_RATE, desc_info->data_rate) |
1004                     FIELD_PREP(RTW89_TXWD_INFO0_DISDATAFB, desc_info->dis_data_fb) |
1005                     FIELD_PREP(RTW89_TXWD_INFO0_MULTIPORT_ID, desc_info->port);
1006
1007         return cpu_to_le32(dword);
1008 }
1009
1010 static __le32 rtw89_build_txwd_info0_v1(struct rtw89_tx_desc_info *desc_info)
1011 {
1012         u32 dword = FIELD_PREP(RTW89_TXWD_INFO0_DISDATAFB, desc_info->dis_data_fb);
1013
1014         return cpu_to_le32(dword);
1015 }
1016
1017 static __le32 rtw89_build_txwd_info1(struct rtw89_tx_desc_info *desc_info)
1018 {
1019         u32 dword = FIELD_PREP(RTW89_TXWD_INFO1_MAX_AGGNUM, desc_info->ampdu_num) |
1020                     FIELD_PREP(RTW89_TXWD_INFO1_A_CTRL_BSR, desc_info->a_ctrl_bsr) |
1021                     FIELD_PREP(RTW89_TXWD_INFO1_DATA_RTY_LOWEST_RATE,
1022                                desc_info->data_retry_lowest_rate);
1023
1024         return cpu_to_le32(dword);
1025 }
1026
1027 static __le32 rtw89_build_txwd_info2(struct rtw89_tx_desc_info *desc_info)
1028 {
1029         u32 dword = FIELD_PREP(RTW89_TXWD_INFO2_AMPDU_DENSITY, desc_info->ampdu_density) |
1030                     FIELD_PREP(RTW89_TXWD_INFO2_SEC_TYPE, desc_info->sec_type) |
1031                     FIELD_PREP(RTW89_TXWD_INFO2_SEC_HW_ENC, desc_info->sec_en) |
1032                     FIELD_PREP(RTW89_TXWD_INFO2_SEC_CAM_IDX, desc_info->sec_cam_idx);
1033
1034         return cpu_to_le32(dword);
1035 }
1036
1037 static __le32 rtw89_build_txwd_info2_v1(struct rtw89_tx_desc_info *desc_info)
1038 {
1039         u32 dword = FIELD_PREP(RTW89_TXWD_INFO2_AMPDU_DENSITY, desc_info->ampdu_density) |
1040                     FIELD_PREP(RTW89_TXWD_INFO2_FORCE_KEY_EN, desc_info->sec_en) |
1041                     FIELD_PREP(RTW89_TXWD_INFO2_SEC_CAM_IDX, desc_info->sec_cam_idx);
1042
1043         return cpu_to_le32(dword);
1044 }
1045
1046 static __le32 rtw89_build_txwd_info4(struct rtw89_tx_desc_info *desc_info)
1047 {
1048         u32 dword = FIELD_PREP(RTW89_TXWD_INFO4_RTS_EN, 1) |
1049                     FIELD_PREP(RTW89_TXWD_INFO4_HW_RTS_EN, 1);
1050
1051         return cpu_to_le32(dword);
1052 }
1053
1054 void rtw89_core_fill_txdesc(struct rtw89_dev *rtwdev,
1055                             struct rtw89_tx_desc_info *desc_info,
1056                             void *txdesc)
1057 {
1058         struct rtw89_txwd_body *txwd_body = (struct rtw89_txwd_body *)txdesc;
1059         struct rtw89_txwd_info *txwd_info;
1060
1061         txwd_body->dword0 = rtw89_build_txwd_body0(desc_info);
1062         txwd_body->dword2 = rtw89_build_txwd_body2(desc_info);
1063         txwd_body->dword3 = rtw89_build_txwd_body3(desc_info);
1064
1065         if (!desc_info->en_wd_info)
1066                 return;
1067
1068         txwd_info = (struct rtw89_txwd_info *)(txwd_body + 1);
1069         txwd_info->dword0 = rtw89_build_txwd_info0(desc_info);
1070         txwd_info->dword1 = rtw89_build_txwd_info1(desc_info);
1071         txwd_info->dword2 = rtw89_build_txwd_info2(desc_info);
1072         txwd_info->dword4 = rtw89_build_txwd_info4(desc_info);
1073
1074 }
1075 EXPORT_SYMBOL(rtw89_core_fill_txdesc);
1076
1077 void rtw89_core_fill_txdesc_v1(struct rtw89_dev *rtwdev,
1078                                struct rtw89_tx_desc_info *desc_info,
1079                                void *txdesc)
1080 {
1081         struct rtw89_txwd_body_v1 *txwd_body = (struct rtw89_txwd_body_v1 *)txdesc;
1082         struct rtw89_txwd_info *txwd_info;
1083
1084         txwd_body->dword0 = rtw89_build_txwd_body0_v1(desc_info);
1085         txwd_body->dword1 = rtw89_build_txwd_body1_v1(desc_info);
1086         txwd_body->dword2 = rtw89_build_txwd_body2(desc_info);
1087         txwd_body->dword3 = rtw89_build_txwd_body3(desc_info);
1088         if (desc_info->sec_en) {
1089                 txwd_body->dword4 = rtw89_build_txwd_body4(desc_info);
1090                 txwd_body->dword5 = rtw89_build_txwd_body5(desc_info);
1091         }
1092         txwd_body->dword7 = rtw89_build_txwd_body7_v1(desc_info);
1093
1094         if (!desc_info->en_wd_info)
1095                 return;
1096
1097         txwd_info = (struct rtw89_txwd_info *)(txwd_body + 1);
1098         txwd_info->dword0 = rtw89_build_txwd_info0_v1(desc_info);
1099         txwd_info->dword1 = rtw89_build_txwd_info1(desc_info);
1100         txwd_info->dword2 = rtw89_build_txwd_info2_v1(desc_info);
1101         txwd_info->dword4 = rtw89_build_txwd_info4(desc_info);
1102 }
1103 EXPORT_SYMBOL(rtw89_core_fill_txdesc_v1);
1104
1105 static __le32 rtw89_build_txwd_fwcmd0_v1(struct rtw89_tx_desc_info *desc_info)
1106 {
1107         u32 dword = FIELD_PREP(AX_RXD_RPKT_LEN_MASK, desc_info->pkt_size) |
1108                     FIELD_PREP(AX_RXD_RPKT_TYPE_MASK, desc_info->fw_dl ?
1109                                                       RTW89_CORE_RX_TYPE_FWDL :
1110                                                       RTW89_CORE_RX_TYPE_H2C);
1111
1112         return cpu_to_le32(dword);
1113 }
1114
1115 void rtw89_core_fill_txdesc_fwcmd_v1(struct rtw89_dev *rtwdev,
1116                                      struct rtw89_tx_desc_info *desc_info,
1117                                      void *txdesc)
1118 {
1119         struct rtw89_rxdesc_short *txwd_v1 = (struct rtw89_rxdesc_short *)txdesc;
1120
1121         txwd_v1->dword0 = rtw89_build_txwd_fwcmd0_v1(desc_info);
1122 }
1123 EXPORT_SYMBOL(rtw89_core_fill_txdesc_fwcmd_v1);
1124
1125 static int rtw89_core_rx_process_mac_ppdu(struct rtw89_dev *rtwdev,
1126                                           struct sk_buff *skb,
1127                                           struct rtw89_rx_phy_ppdu *phy_ppdu)
1128 {
1129         bool rx_cnt_valid = false;
1130         u8 plcp_size = 0;
1131         u8 usr_num = 0;
1132         u8 *phy_sts;
1133
1134         rx_cnt_valid = RTW89_GET_RXINFO_RX_CNT_VLD(skb->data);
1135         plcp_size = RTW89_GET_RXINFO_PLCP_LEN(skb->data) << 3;
1136         usr_num = RTW89_GET_RXINFO_USR_NUM(skb->data);
1137         if (usr_num > RTW89_PPDU_MAX_USR) {
1138                 rtw89_warn(rtwdev, "Invalid user number in mac info\n");
1139                 return -EINVAL;
1140         }
1141
1142         phy_sts = skb->data + RTW89_PPDU_MAC_INFO_SIZE;
1143         phy_sts += usr_num * RTW89_PPDU_MAC_INFO_USR_SIZE;
1144         /* 8-byte alignment */
1145         if (usr_num & BIT(0))
1146                 phy_sts += RTW89_PPDU_MAC_INFO_USR_SIZE;
1147         if (rx_cnt_valid)
1148                 phy_sts += RTW89_PPDU_MAC_RX_CNT_SIZE;
1149         phy_sts += plcp_size;
1150
1151         phy_ppdu->buf = phy_sts;
1152         phy_ppdu->len = skb->data + skb->len - phy_sts;
1153
1154         return 0;
1155 }
1156
1157 static void rtw89_core_rx_process_phy_ppdu_iter(void *data,
1158                                                 struct ieee80211_sta *sta)
1159 {
1160         struct rtw89_sta *rtwsta = (struct rtw89_sta *)sta->drv_priv;
1161         struct rtw89_rx_phy_ppdu *phy_ppdu = (struct rtw89_rx_phy_ppdu *)data;
1162
1163         if (rtwsta->mac_id == phy_ppdu->mac_id && phy_ppdu->to_self)
1164                 ewma_rssi_add(&rtwsta->avg_rssi, phy_ppdu->rssi_avg);
1165 }
1166
1167 #define VAR_LEN 0xff
1168 #define VAR_LEN_UNIT 8
1169 static u16 rtw89_core_get_phy_status_ie_len(struct rtw89_dev *rtwdev, u8 *addr)
1170 {
1171         static const u8 physts_ie_len_tab[32] = {
1172                 16, 32, 24, 24, 8, 8, 8, 8, VAR_LEN, 8, VAR_LEN, 176, VAR_LEN,
1173                 VAR_LEN, VAR_LEN, VAR_LEN, VAR_LEN, VAR_LEN, 16, 24, VAR_LEN,
1174                 VAR_LEN, VAR_LEN, 0, 24, 24, 24, 24, 32, 32, 32, 32
1175         };
1176         u16 ie_len;
1177         u8 ie;
1178
1179         ie = RTW89_GET_PHY_STS_IE_TYPE(addr);
1180         if (physts_ie_len_tab[ie] != VAR_LEN)
1181                 ie_len = physts_ie_len_tab[ie];
1182         else
1183                 ie_len = RTW89_GET_PHY_STS_IE_LEN(addr) * VAR_LEN_UNIT;
1184
1185         return ie_len;
1186 }
1187
1188 static void rtw89_core_parse_phy_status_ie01(struct rtw89_dev *rtwdev, u8 *addr,
1189                                              struct rtw89_rx_phy_ppdu *phy_ppdu)
1190 {
1191         s16 cfo;
1192
1193         phy_ppdu->chan_idx = RTW89_GET_PHY_STS_IE01_CH_IDX(addr);
1194         if (phy_ppdu->rate < RTW89_HW_RATE_OFDM6)
1195                 return;
1196         /* sign conversion for S(12,2) */
1197         cfo = sign_extend32(RTW89_GET_PHY_STS_IE01_CFO(addr), 11);
1198         rtw89_phy_cfo_parse(rtwdev, cfo, phy_ppdu);
1199 }
1200
1201 static int rtw89_core_process_phy_status_ie(struct rtw89_dev *rtwdev, u8 *addr,
1202                                             struct rtw89_rx_phy_ppdu *phy_ppdu)
1203 {
1204         u8 ie;
1205
1206         ie = RTW89_GET_PHY_STS_IE_TYPE(addr);
1207         switch (ie) {
1208         case RTW89_PHYSTS_IE01_CMN_OFDM:
1209                 rtw89_core_parse_phy_status_ie01(rtwdev, addr, phy_ppdu);
1210                 break;
1211         default:
1212                 break;
1213         }
1214
1215         return 0;
1216 }
1217
1218 static void rtw89_core_update_phy_ppdu(struct rtw89_rx_phy_ppdu *phy_ppdu)
1219 {
1220         s8 *rssi = phy_ppdu->rssi;
1221         u8 *buf = phy_ppdu->buf;
1222
1223         phy_ppdu->ie = RTW89_GET_PHY_STS_IE_MAP(buf);
1224         phy_ppdu->rssi_avg = RTW89_GET_PHY_STS_RSSI_AVG(buf);
1225         rssi[RF_PATH_A] = RTW89_RSSI_RAW_TO_DBM(RTW89_GET_PHY_STS_RSSI_A(buf));
1226         rssi[RF_PATH_B] = RTW89_RSSI_RAW_TO_DBM(RTW89_GET_PHY_STS_RSSI_B(buf));
1227         rssi[RF_PATH_C] = RTW89_RSSI_RAW_TO_DBM(RTW89_GET_PHY_STS_RSSI_C(buf));
1228         rssi[RF_PATH_D] = RTW89_RSSI_RAW_TO_DBM(RTW89_GET_PHY_STS_RSSI_D(buf));
1229 }
1230
1231 static int rtw89_core_rx_process_phy_ppdu(struct rtw89_dev *rtwdev,
1232                                           struct rtw89_rx_phy_ppdu *phy_ppdu)
1233 {
1234         if (RTW89_GET_PHY_STS_LEN(phy_ppdu->buf) << 3 != phy_ppdu->len) {
1235                 rtw89_warn(rtwdev, "phy ppdu len mismatch\n");
1236                 return -EINVAL;
1237         }
1238         rtw89_core_update_phy_ppdu(phy_ppdu);
1239         ieee80211_iterate_stations_atomic(rtwdev->hw,
1240                                           rtw89_core_rx_process_phy_ppdu_iter,
1241                                           phy_ppdu);
1242
1243         return 0;
1244 }
1245
1246 static int rtw89_core_rx_parse_phy_sts(struct rtw89_dev *rtwdev,
1247                                        struct rtw89_rx_phy_ppdu *phy_ppdu)
1248 {
1249         u16 ie_len;
1250         u8 *pos, *end;
1251
1252         /* mark invalid reports and bypass them */
1253         if (phy_ppdu->ie < RTW89_CCK_PKT)
1254                 return -EINVAL;
1255
1256         pos = (u8 *)phy_ppdu->buf + PHY_STS_HDR_LEN;
1257         end = (u8 *)phy_ppdu->buf + phy_ppdu->len;
1258         while (pos < end) {
1259                 ie_len = rtw89_core_get_phy_status_ie_len(rtwdev, pos);
1260                 rtw89_core_process_phy_status_ie(rtwdev, pos, phy_ppdu);
1261                 pos += ie_len;
1262                 if (pos > end || ie_len == 0) {
1263                         rtw89_debug(rtwdev, RTW89_DBG_TXRX,
1264                                     "phy status parse failed\n");
1265                         return -EINVAL;
1266                 }
1267         }
1268
1269         return 0;
1270 }
1271
1272 static void rtw89_core_rx_process_phy_sts(struct rtw89_dev *rtwdev,
1273                                           struct rtw89_rx_phy_ppdu *phy_ppdu)
1274 {
1275         int ret;
1276
1277         ret = rtw89_core_rx_parse_phy_sts(rtwdev, phy_ppdu);
1278         if (ret)
1279                 rtw89_debug(rtwdev, RTW89_DBG_TXRX, "parse phy sts failed\n");
1280         else
1281                 phy_ppdu->valid = true;
1282 }
1283
1284 static u8 rtw89_rxdesc_to_nl_he_gi(struct rtw89_dev *rtwdev,
1285                                    const struct rtw89_rx_desc_info *desc_info,
1286                                    bool rx_status)
1287 {
1288         switch (desc_info->gi_ltf) {
1289         case RTW89_GILTF_SGI_4XHE08:
1290         case RTW89_GILTF_2XHE08:
1291         case RTW89_GILTF_1XHE08:
1292                 return NL80211_RATE_INFO_HE_GI_0_8;
1293         case RTW89_GILTF_2XHE16:
1294         case RTW89_GILTF_1XHE16:
1295                 return NL80211_RATE_INFO_HE_GI_1_6;
1296         case RTW89_GILTF_LGI_4XHE32:
1297                 return NL80211_RATE_INFO_HE_GI_3_2;
1298         default:
1299                 rtw89_warn(rtwdev, "invalid gi_ltf=%d", desc_info->gi_ltf);
1300                 return rx_status ? NL80211_RATE_INFO_HE_GI_3_2 : U8_MAX;
1301         }
1302 }
1303
1304 static bool rtw89_core_rx_ppdu_match(struct rtw89_dev *rtwdev,
1305                                      struct rtw89_rx_desc_info *desc_info,
1306                                      struct ieee80211_rx_status *status)
1307 {
1308         u8 band = desc_info->bb_sel ? RTW89_PHY_1 : RTW89_PHY_0;
1309         u8 data_rate_mode, bw, rate_idx = MASKBYTE0, gi_ltf;
1310         u16 data_rate;
1311         bool ret;
1312
1313         data_rate = desc_info->data_rate;
1314         data_rate_mode = GET_DATA_RATE_MODE(data_rate);
1315         if (data_rate_mode == DATA_RATE_MODE_NON_HT) {
1316                 rate_idx = GET_DATA_RATE_NOT_HT_IDX(data_rate);
1317                 /* rate_idx is still hardware value here */
1318         } else if (data_rate_mode == DATA_RATE_MODE_HT) {
1319                 rate_idx = GET_DATA_RATE_HT_IDX(data_rate);
1320         } else if (data_rate_mode == DATA_RATE_MODE_VHT) {
1321                 rate_idx = GET_DATA_RATE_VHT_HE_IDX(data_rate);
1322         } else if (data_rate_mode == DATA_RATE_MODE_HE) {
1323                 rate_idx = GET_DATA_RATE_VHT_HE_IDX(data_rate);
1324         } else {
1325                 rtw89_warn(rtwdev, "invalid RX rate mode %d\n", data_rate_mode);
1326         }
1327
1328         bw = rtw89_hw_to_rate_info_bw(desc_info->bw);
1329         gi_ltf = rtw89_rxdesc_to_nl_he_gi(rtwdev, desc_info, false);
1330         ret = rtwdev->ppdu_sts.curr_rx_ppdu_cnt[band] == desc_info->ppdu_cnt &&
1331               status->rate_idx == rate_idx &&
1332               status->he_gi == gi_ltf &&
1333               status->bw == bw;
1334
1335         return ret;
1336 }
1337
1338 struct rtw89_vif_rx_stats_iter_data {
1339         struct rtw89_dev *rtwdev;
1340         struct rtw89_rx_phy_ppdu *phy_ppdu;
1341         struct rtw89_rx_desc_info *desc_info;
1342         struct sk_buff *skb;
1343         const u8 *bssid;
1344 };
1345
1346 static void rtw89_vif_rx_stats_iter(void *data, u8 *mac,
1347                                     struct ieee80211_vif *vif)
1348 {
1349         struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv;
1350         struct rtw89_vif_rx_stats_iter_data *iter_data = data;
1351         struct rtw89_dev *rtwdev = iter_data->rtwdev;
1352         struct rtw89_pkt_stat *pkt_stat = &rtwdev->phystat.cur_pkt_stat;
1353         struct rtw89_rx_desc_info *desc_info = iter_data->desc_info;
1354         struct sk_buff *skb = iter_data->skb;
1355         struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
1356         const u8 *bssid = iter_data->bssid;
1357
1358         if (!ether_addr_equal(vif->bss_conf.bssid, bssid))
1359                 return;
1360
1361         if (ieee80211_is_beacon(hdr->frame_control))
1362                 pkt_stat->beacon_nr++;
1363
1364         if (!ether_addr_equal(vif->addr, hdr->addr1))
1365                 return;
1366
1367         if (desc_info->data_rate < RTW89_HW_RATE_NR)
1368                 pkt_stat->rx_rate_cnt[desc_info->data_rate]++;
1369
1370         rtw89_traffic_stats_accu(rtwdev, &rtwvif->stats, skb, false);
1371 }
1372
1373 static void rtw89_core_rx_stats(struct rtw89_dev *rtwdev,
1374                                 struct rtw89_rx_phy_ppdu *phy_ppdu,
1375                                 struct rtw89_rx_desc_info *desc_info,
1376                                 struct sk_buff *skb)
1377 {
1378         struct rtw89_vif_rx_stats_iter_data iter_data;
1379
1380         rtw89_traffic_stats_accu(rtwdev, &rtwdev->stats, skb, false);
1381
1382         iter_data.rtwdev = rtwdev;
1383         iter_data.phy_ppdu = phy_ppdu;
1384         iter_data.desc_info = desc_info;
1385         iter_data.skb = skb;
1386         iter_data.bssid = get_hdr_bssid((struct ieee80211_hdr *)skb->data);
1387         rtw89_iterate_vifs_bh(rtwdev, rtw89_vif_rx_stats_iter, &iter_data);
1388 }
1389
1390 static void rtw89_correct_cck_chan(struct rtw89_dev *rtwdev,
1391                                    struct ieee80211_rx_status *status)
1392 {
1393         u16 chan = rtwdev->hal.prev_primary_channel;
1394         u8 band = chan <= 14 ? NL80211_BAND_2GHZ : NL80211_BAND_5GHZ;
1395
1396         if (status->band != NL80211_BAND_2GHZ &&
1397             status->encoding == RX_ENC_LEGACY &&
1398             status->rate_idx < RTW89_HW_RATE_OFDM6) {
1399                 status->freq = ieee80211_channel_to_frequency(chan, band);
1400                 status->band = band;
1401         }
1402 }
1403
1404 static void rtw89_core_hw_to_sband_rate(struct ieee80211_rx_status *rx_status)
1405 {
1406         if (rx_status->band == NL80211_BAND_2GHZ ||
1407             rx_status->encoding != RX_ENC_LEGACY)
1408                 return;
1409
1410         /* Some control frames' freq(ACKs in this case) are reported wrong due
1411          * to FW notify timing, set to lowest rate to prevent overflow.
1412          */
1413         if (rx_status->rate_idx < RTW89_HW_RATE_OFDM6) {
1414                 rx_status->rate_idx = 0;
1415                 return;
1416         }
1417
1418         /* No 4 CCK rates for non-2G */
1419         rx_status->rate_idx -= 4;
1420 }
1421
1422 static void rtw89_core_rx_to_mac80211(struct rtw89_dev *rtwdev,
1423                                       struct rtw89_rx_phy_ppdu *phy_ppdu,
1424                                       struct rtw89_rx_desc_info *desc_info,
1425                                       struct sk_buff *skb_ppdu,
1426                                       struct ieee80211_rx_status *rx_status)
1427 {
1428         rtw89_core_hw_to_sband_rate(rx_status);
1429         rtw89_core_rx_stats(rtwdev, phy_ppdu, desc_info, skb_ppdu);
1430         /* In low power mode, it does RX in thread context. */
1431         local_bh_disable();
1432         ieee80211_rx_napi(rtwdev->hw, NULL, skb_ppdu, &rtwdev->napi);
1433         local_bh_enable();
1434         rtwdev->napi_budget_countdown--;
1435 }
1436
1437 static void rtw89_core_rx_pending_skb(struct rtw89_dev *rtwdev,
1438                                       struct rtw89_rx_phy_ppdu *phy_ppdu,
1439                                       struct rtw89_rx_desc_info *desc_info,
1440                                       struct sk_buff *skb)
1441 {
1442         u8 band = desc_info->bb_sel ? RTW89_PHY_1 : RTW89_PHY_0;
1443         int curr = rtwdev->ppdu_sts.curr_rx_ppdu_cnt[band];
1444         struct sk_buff *skb_ppdu = NULL, *tmp;
1445         struct ieee80211_rx_status *rx_status;
1446
1447         if (curr > RTW89_MAX_PPDU_CNT)
1448                 return;
1449
1450         skb_queue_walk_safe(&rtwdev->ppdu_sts.rx_queue[band], skb_ppdu, tmp) {
1451                 skb_unlink(skb_ppdu, &rtwdev->ppdu_sts.rx_queue[band]);
1452                 rx_status = IEEE80211_SKB_RXCB(skb_ppdu);
1453                 if (rtw89_core_rx_ppdu_match(rtwdev, desc_info, rx_status))
1454                         rtw89_chip_query_ppdu(rtwdev, phy_ppdu, rx_status);
1455                 rtw89_correct_cck_chan(rtwdev, rx_status);
1456                 rtw89_core_rx_to_mac80211(rtwdev, phy_ppdu, desc_info, skb_ppdu, rx_status);
1457         }
1458 }
1459
1460 static void rtw89_core_rx_process_ppdu_sts(struct rtw89_dev *rtwdev,
1461                                            struct rtw89_rx_desc_info *desc_info,
1462                                            struct sk_buff *skb)
1463 {
1464         struct rtw89_rx_phy_ppdu phy_ppdu = {.buf = skb->data, .valid = false,
1465                                              .len = skb->len,
1466                                              .to_self = desc_info->addr1_match,
1467                                              .rate = desc_info->data_rate,
1468                                              .mac_id = desc_info->mac_id};
1469         int ret;
1470
1471         if (desc_info->mac_info_valid)
1472                 rtw89_core_rx_process_mac_ppdu(rtwdev, skb, &phy_ppdu);
1473         ret = rtw89_core_rx_process_phy_ppdu(rtwdev, &phy_ppdu);
1474         if (ret)
1475                 rtw89_debug(rtwdev, RTW89_DBG_TXRX, "process ppdu failed\n");
1476
1477         rtw89_core_rx_process_phy_sts(rtwdev, &phy_ppdu);
1478         rtw89_core_rx_pending_skb(rtwdev, &phy_ppdu, desc_info, skb);
1479         dev_kfree_skb_any(skb);
1480 }
1481
1482 static void rtw89_core_rx_process_report(struct rtw89_dev *rtwdev,
1483                                          struct rtw89_rx_desc_info *desc_info,
1484                                          struct sk_buff *skb)
1485 {
1486         switch (desc_info->pkt_type) {
1487         case RTW89_CORE_RX_TYPE_C2H:
1488                 rtw89_fw_c2h_irqsafe(rtwdev, skb);
1489                 break;
1490         case RTW89_CORE_RX_TYPE_PPDU_STAT:
1491                 rtw89_core_rx_process_ppdu_sts(rtwdev, desc_info, skb);
1492                 break;
1493         default:
1494                 rtw89_debug(rtwdev, RTW89_DBG_TXRX, "unhandled pkt_type=%d\n",
1495                             desc_info->pkt_type);
1496                 dev_kfree_skb_any(skb);
1497                 break;
1498         }
1499 }
1500
1501 void rtw89_core_query_rxdesc(struct rtw89_dev *rtwdev,
1502                              struct rtw89_rx_desc_info *desc_info,
1503                              u8 *data, u32 data_offset)
1504 {
1505         const struct rtw89_chip_info *chip = rtwdev->chip;
1506         struct rtw89_rxdesc_short *rxd_s;
1507         struct rtw89_rxdesc_long *rxd_l;
1508         u8 shift_len, drv_info_len;
1509
1510         rxd_s = (struct rtw89_rxdesc_short *)(data + data_offset);
1511         desc_info->pkt_size = RTW89_GET_RXWD_PKT_SIZE(rxd_s);
1512         desc_info->drv_info_size = RTW89_GET_RXWD_DRV_INFO_SIZE(rxd_s);
1513         desc_info->long_rxdesc = RTW89_GET_RXWD_LONG_RXD(rxd_s);
1514         desc_info->pkt_type = RTW89_GET_RXWD_RPKT_TYPE(rxd_s);
1515         desc_info->mac_info_valid = RTW89_GET_RXWD_MAC_INFO_VALID(rxd_s);
1516         if (chip->chip_id == RTL8852C)
1517                 desc_info->bw = RTW89_GET_RXWD_BW_V1(rxd_s);
1518         else
1519                 desc_info->bw = RTW89_GET_RXWD_BW(rxd_s);
1520         desc_info->data_rate = RTW89_GET_RXWD_DATA_RATE(rxd_s);
1521         desc_info->gi_ltf = RTW89_GET_RXWD_GI_LTF(rxd_s);
1522         desc_info->user_id = RTW89_GET_RXWD_USER_ID(rxd_s);
1523         desc_info->sr_en = RTW89_GET_RXWD_SR_EN(rxd_s);
1524         desc_info->ppdu_cnt = RTW89_GET_RXWD_PPDU_CNT(rxd_s);
1525         desc_info->ppdu_type = RTW89_GET_RXWD_PPDU_TYPE(rxd_s);
1526         desc_info->free_run_cnt = RTW89_GET_RXWD_FREE_RUN_CNT(rxd_s);
1527         desc_info->icv_err = RTW89_GET_RXWD_ICV_ERR(rxd_s);
1528         desc_info->crc32_err = RTW89_GET_RXWD_CRC32_ERR(rxd_s);
1529         desc_info->hw_dec = RTW89_GET_RXWD_HW_DEC(rxd_s);
1530         desc_info->sw_dec = RTW89_GET_RXWD_SW_DEC(rxd_s);
1531         desc_info->addr1_match = RTW89_GET_RXWD_A1_MATCH(rxd_s);
1532
1533         shift_len = desc_info->shift << 1; /* 2-byte unit */
1534         drv_info_len = desc_info->drv_info_size << 3; /* 8-byte unit */
1535         desc_info->offset = data_offset + shift_len + drv_info_len;
1536         desc_info->ready = true;
1537
1538         if (!desc_info->long_rxdesc)
1539                 return;
1540
1541         rxd_l = (struct rtw89_rxdesc_long *)(data + data_offset);
1542         desc_info->frame_type = RTW89_GET_RXWD_TYPE(rxd_l);
1543         desc_info->addr_cam_valid = RTW89_GET_RXWD_ADDR_CAM_VLD(rxd_l);
1544         desc_info->addr_cam_id = RTW89_GET_RXWD_ADDR_CAM_ID(rxd_l);
1545         desc_info->sec_cam_id = RTW89_GET_RXWD_SEC_CAM_ID(rxd_l);
1546         desc_info->mac_id = RTW89_GET_RXWD_MAC_ID(rxd_l);
1547         desc_info->rx_pl_id = RTW89_GET_RXWD_RX_PL_ID(rxd_l);
1548 }
1549 EXPORT_SYMBOL(rtw89_core_query_rxdesc);
1550
1551 struct rtw89_core_iter_rx_status {
1552         struct rtw89_dev *rtwdev;
1553         struct ieee80211_rx_status *rx_status;
1554         struct rtw89_rx_desc_info *desc_info;
1555         u8 mac_id;
1556 };
1557
1558 static
1559 void rtw89_core_stats_sta_rx_status_iter(void *data, struct ieee80211_sta *sta)
1560 {
1561         struct rtw89_core_iter_rx_status *iter_data =
1562                                 (struct rtw89_core_iter_rx_status *)data;
1563         struct ieee80211_rx_status *rx_status = iter_data->rx_status;
1564         struct rtw89_sta *rtwsta = (struct rtw89_sta *)sta->drv_priv;
1565         struct rtw89_rx_desc_info *desc_info = iter_data->desc_info;
1566         u8 mac_id = iter_data->mac_id;
1567
1568         if (mac_id != rtwsta->mac_id)
1569                 return;
1570
1571         rtwsta->rx_status = *rx_status;
1572         rtwsta->rx_hw_rate = desc_info->data_rate;
1573 }
1574
1575 static void rtw89_core_stats_sta_rx_status(struct rtw89_dev *rtwdev,
1576                                            struct rtw89_rx_desc_info *desc_info,
1577                                            struct ieee80211_rx_status *rx_status)
1578 {
1579         struct rtw89_core_iter_rx_status iter_data;
1580
1581         if (!desc_info->addr1_match || !desc_info->long_rxdesc)
1582                 return;
1583
1584         if (desc_info->frame_type != RTW89_RX_TYPE_DATA)
1585                 return;
1586
1587         iter_data.rtwdev = rtwdev;
1588         iter_data.rx_status = rx_status;
1589         iter_data.desc_info = desc_info;
1590         iter_data.mac_id = desc_info->mac_id;
1591         ieee80211_iterate_stations_atomic(rtwdev->hw,
1592                                           rtw89_core_stats_sta_rx_status_iter,
1593                                           &iter_data);
1594 }
1595
1596 static void rtw89_core_update_rx_status(struct rtw89_dev *rtwdev,
1597                                         struct rtw89_rx_desc_info *desc_info,
1598                                         struct ieee80211_rx_status *rx_status)
1599 {
1600         struct ieee80211_hw *hw = rtwdev->hw;
1601         struct rtw89_hal *hal = &rtwdev->hal;
1602         u16 data_rate;
1603         u8 data_rate_mode;
1604
1605         /* currently using single PHY */
1606         rx_status->freq = hw->conf.chandef.chan->center_freq;
1607         rx_status->band = hw->conf.chandef.chan->band;
1608
1609         if (rtwdev->scanning &&
1610             RTW89_CHK_FW_FEATURE(SCAN_OFFLOAD, &rtwdev->fw)) {
1611                 u8 chan = hal->current_channel;
1612                 u8 band = hal->current_band_type;
1613                 enum nl80211_band nl_band;
1614
1615                 nl_band = rtw89_hw_to_nl80211_band(band);
1616                 rx_status->freq = ieee80211_channel_to_frequency(chan, nl_band);
1617                 rx_status->band = nl_band;
1618         }
1619
1620         if (desc_info->icv_err || desc_info->crc32_err)
1621                 rx_status->flag |= RX_FLAG_FAILED_FCS_CRC;
1622
1623         if (desc_info->hw_dec &&
1624             !(desc_info->sw_dec || desc_info->icv_err))
1625                 rx_status->flag |= RX_FLAG_DECRYPTED;
1626
1627         rx_status->bw = rtw89_hw_to_rate_info_bw(desc_info->bw);
1628
1629         data_rate = desc_info->data_rate;
1630         data_rate_mode = GET_DATA_RATE_MODE(data_rate);
1631         if (data_rate_mode == DATA_RATE_MODE_NON_HT) {
1632                 rx_status->encoding = RX_ENC_LEGACY;
1633                 rx_status->rate_idx = GET_DATA_RATE_NOT_HT_IDX(data_rate);
1634                 /* convert rate_idx after we get the correct band */
1635         } else if (data_rate_mode == DATA_RATE_MODE_HT) {
1636                 rx_status->encoding = RX_ENC_HT;
1637                 rx_status->rate_idx = GET_DATA_RATE_HT_IDX(data_rate);
1638                 if (desc_info->gi_ltf)
1639                         rx_status->enc_flags |= RX_ENC_FLAG_SHORT_GI;
1640         } else if (data_rate_mode == DATA_RATE_MODE_VHT) {
1641                 rx_status->encoding = RX_ENC_VHT;
1642                 rx_status->rate_idx = GET_DATA_RATE_VHT_HE_IDX(data_rate);
1643                 rx_status->nss = GET_DATA_RATE_NSS(data_rate) + 1;
1644                 if (desc_info->gi_ltf)
1645                         rx_status->enc_flags |= RX_ENC_FLAG_SHORT_GI;
1646         } else if (data_rate_mode == DATA_RATE_MODE_HE) {
1647                 rx_status->encoding = RX_ENC_HE;
1648                 rx_status->rate_idx = GET_DATA_RATE_VHT_HE_IDX(data_rate);
1649                 rx_status->nss = GET_DATA_RATE_NSS(data_rate) + 1;
1650         } else {
1651                 rtw89_warn(rtwdev, "invalid RX rate mode %d\n", data_rate_mode);
1652         }
1653
1654         /* he_gi is used to match ppdu, so we always fill it. */
1655         rx_status->he_gi = rtw89_rxdesc_to_nl_he_gi(rtwdev, desc_info, true);
1656         rx_status->flag |= RX_FLAG_MACTIME_START;
1657         rx_status->mactime = desc_info->free_run_cnt;
1658
1659         rtw89_core_stats_sta_rx_status(rtwdev, desc_info, rx_status);
1660 }
1661
1662 static enum rtw89_ps_mode rtw89_update_ps_mode(struct rtw89_dev *rtwdev)
1663 {
1664         const struct rtw89_chip_info *chip = rtwdev->chip;
1665
1666         if (rtw89_disable_ps_mode || !chip->ps_mode_supported)
1667                 return RTW89_PS_MODE_NONE;
1668
1669         if (chip->ps_mode_supported & BIT(RTW89_PS_MODE_PWR_GATED))
1670                 return RTW89_PS_MODE_PWR_GATED;
1671
1672         if (chip->ps_mode_supported & BIT(RTW89_PS_MODE_CLK_GATED))
1673                 return RTW89_PS_MODE_CLK_GATED;
1674
1675         if (chip->ps_mode_supported & BIT(RTW89_PS_MODE_RFOFF))
1676                 return RTW89_PS_MODE_RFOFF;
1677
1678         return RTW89_PS_MODE_NONE;
1679 }
1680
1681 static void rtw89_core_flush_ppdu_rx_queue(struct rtw89_dev *rtwdev,
1682                                            struct rtw89_rx_desc_info *desc_info)
1683 {
1684         struct rtw89_ppdu_sts_info *ppdu_sts = &rtwdev->ppdu_sts;
1685         u8 band = desc_info->bb_sel ? RTW89_PHY_1 : RTW89_PHY_0;
1686         struct ieee80211_rx_status *rx_status;
1687         struct sk_buff *skb_ppdu, *tmp;
1688
1689         skb_queue_walk_safe(&ppdu_sts->rx_queue[band], skb_ppdu, tmp) {
1690                 skb_unlink(skb_ppdu, &ppdu_sts->rx_queue[band]);
1691                 rx_status = IEEE80211_SKB_RXCB(skb_ppdu);
1692                 rtw89_core_rx_to_mac80211(rtwdev, NULL, desc_info, skb_ppdu, rx_status);
1693         }
1694 }
1695
1696 void rtw89_core_rx(struct rtw89_dev *rtwdev,
1697                    struct rtw89_rx_desc_info *desc_info,
1698                    struct sk_buff *skb)
1699 {
1700         struct ieee80211_rx_status *rx_status;
1701         struct rtw89_ppdu_sts_info *ppdu_sts = &rtwdev->ppdu_sts;
1702         u8 ppdu_cnt = desc_info->ppdu_cnt;
1703         u8 band = desc_info->bb_sel ? RTW89_PHY_1 : RTW89_PHY_0;
1704
1705         if (desc_info->pkt_type != RTW89_CORE_RX_TYPE_WIFI) {
1706                 rtw89_core_rx_process_report(rtwdev, desc_info, skb);
1707                 return;
1708         }
1709
1710         if (ppdu_sts->curr_rx_ppdu_cnt[band] != ppdu_cnt) {
1711                 rtw89_core_flush_ppdu_rx_queue(rtwdev, desc_info);
1712                 ppdu_sts->curr_rx_ppdu_cnt[band] = ppdu_cnt;
1713         }
1714
1715         rx_status = IEEE80211_SKB_RXCB(skb);
1716         memset(rx_status, 0, sizeof(*rx_status));
1717         rtw89_core_update_rx_status(rtwdev, desc_info, rx_status);
1718         if (desc_info->long_rxdesc &&
1719             BIT(desc_info->frame_type) & PPDU_FILTER_BITMAP)
1720                 skb_queue_tail(&ppdu_sts->rx_queue[band], skb);
1721         else
1722                 rtw89_core_rx_to_mac80211(rtwdev, NULL, desc_info, skb, rx_status);
1723 }
1724 EXPORT_SYMBOL(rtw89_core_rx);
1725
1726 void rtw89_core_napi_start(struct rtw89_dev *rtwdev)
1727 {
1728         if (test_and_set_bit(RTW89_FLAG_NAPI_RUNNING, rtwdev->flags))
1729                 return;
1730
1731         napi_enable(&rtwdev->napi);
1732 }
1733 EXPORT_SYMBOL(rtw89_core_napi_start);
1734
1735 void rtw89_core_napi_stop(struct rtw89_dev *rtwdev)
1736 {
1737         if (!test_and_clear_bit(RTW89_FLAG_NAPI_RUNNING, rtwdev->flags))
1738                 return;
1739
1740         napi_synchronize(&rtwdev->napi);
1741         napi_disable(&rtwdev->napi);
1742 }
1743 EXPORT_SYMBOL(rtw89_core_napi_stop);
1744
1745 void rtw89_core_napi_init(struct rtw89_dev *rtwdev)
1746 {
1747         init_dummy_netdev(&rtwdev->netdev);
1748         netif_napi_add(&rtwdev->netdev, &rtwdev->napi,
1749                        rtwdev->hci.ops->napi_poll, NAPI_POLL_WEIGHT);
1750 }
1751 EXPORT_SYMBOL(rtw89_core_napi_init);
1752
1753 void rtw89_core_napi_deinit(struct rtw89_dev *rtwdev)
1754 {
1755         rtw89_core_napi_stop(rtwdev);
1756         netif_napi_del(&rtwdev->napi);
1757 }
1758 EXPORT_SYMBOL(rtw89_core_napi_deinit);
1759
1760 static void rtw89_core_ba_work(struct work_struct *work)
1761 {
1762         struct rtw89_dev *rtwdev =
1763                 container_of(work, struct rtw89_dev, ba_work);
1764         struct rtw89_txq *rtwtxq, *tmp;
1765         int ret;
1766
1767         spin_lock_bh(&rtwdev->ba_lock);
1768         list_for_each_entry_safe(rtwtxq, tmp, &rtwdev->ba_list, list) {
1769                 struct ieee80211_txq *txq = rtw89_txq_to_txq(rtwtxq);
1770                 struct ieee80211_sta *sta = txq->sta;
1771                 struct rtw89_sta *rtwsta = sta ? (struct rtw89_sta *)sta->drv_priv : NULL;
1772                 u8 tid = txq->tid;
1773
1774                 if (!sta) {
1775                         rtw89_warn(rtwdev, "cannot start BA without sta\n");
1776                         goto skip_ba_work;
1777                 }
1778
1779                 if (rtwsta->disassoc) {
1780                         rtw89_debug(rtwdev, RTW89_DBG_TXRX,
1781                                     "cannot start BA with disassoc sta\n");
1782                         goto skip_ba_work;
1783                 }
1784
1785                 ret = ieee80211_start_tx_ba_session(sta, tid, 0);
1786                 if (ret) {
1787                         rtw89_debug(rtwdev, RTW89_DBG_TXRX,
1788                                     "failed to setup BA session for %pM:%2d: %d\n",
1789                                     sta->addr, tid, ret);
1790                         if (ret == -EINVAL)
1791                                 set_bit(RTW89_TXQ_F_BLOCK_BA, &rtwtxq->flags);
1792                 }
1793 skip_ba_work:
1794                 list_del_init(&rtwtxq->list);
1795         }
1796         spin_unlock_bh(&rtwdev->ba_lock);
1797 }
1798
1799 static void rtw89_core_free_sta_pending_ba(struct rtw89_dev *rtwdev,
1800                                            struct ieee80211_sta *sta)
1801 {
1802         struct rtw89_txq *rtwtxq, *tmp;
1803
1804         spin_lock_bh(&rtwdev->ba_lock);
1805         list_for_each_entry_safe(rtwtxq, tmp, &rtwdev->ba_list, list) {
1806                 struct ieee80211_txq *txq = rtw89_txq_to_txq(rtwtxq);
1807
1808                 if (sta == txq->sta)
1809                         list_del_init(&rtwtxq->list);
1810         }
1811         spin_unlock_bh(&rtwdev->ba_lock);
1812 }
1813
1814 static void rtw89_core_txq_check_agg(struct rtw89_dev *rtwdev,
1815                                      struct rtw89_txq *rtwtxq,
1816                                      struct sk_buff *skb)
1817 {
1818         struct ieee80211_hw *hw = rtwdev->hw;
1819         struct ieee80211_txq *txq = rtw89_txq_to_txq(rtwtxq);
1820         struct ieee80211_sta *sta = txq->sta;
1821         struct rtw89_sta *rtwsta = sta ? (struct rtw89_sta *)sta->drv_priv : NULL;
1822
1823         if (unlikely(skb_get_queue_mapping(skb) == IEEE80211_AC_VO))
1824                 return;
1825
1826         if (unlikely(skb->protocol == cpu_to_be16(ETH_P_PAE)))
1827                 return;
1828
1829         if (unlikely(!sta))
1830                 return;
1831
1832         if (unlikely(test_bit(RTW89_TXQ_F_BLOCK_BA, &rtwtxq->flags)))
1833                 return;
1834
1835         if (test_bit(RTW89_TXQ_F_AMPDU, &rtwtxq->flags)) {
1836                 IEEE80211_SKB_CB(skb)->flags |= IEEE80211_TX_CTL_AMPDU;
1837                 return;
1838         }
1839
1840         spin_lock_bh(&rtwdev->ba_lock);
1841         if (!rtwsta->disassoc && list_empty(&rtwtxq->list)) {
1842                 list_add_tail(&rtwtxq->list, &rtwdev->ba_list);
1843                 ieee80211_queue_work(hw, &rtwdev->ba_work);
1844         }
1845         spin_unlock_bh(&rtwdev->ba_lock);
1846 }
1847
1848 static void rtw89_core_txq_push(struct rtw89_dev *rtwdev,
1849                                 struct rtw89_txq *rtwtxq,
1850                                 unsigned long frame_cnt,
1851                                 unsigned long byte_cnt)
1852 {
1853         struct ieee80211_txq *txq = rtw89_txq_to_txq(rtwtxq);
1854         struct ieee80211_vif *vif = txq->vif;
1855         struct ieee80211_sta *sta = txq->sta;
1856         struct sk_buff *skb;
1857         unsigned long i;
1858         int ret;
1859
1860         rcu_read_lock();
1861         for (i = 0; i < frame_cnt; i++) {
1862                 skb = ieee80211_tx_dequeue_ni(rtwdev->hw, txq);
1863                 if (!skb) {
1864                         rtw89_debug(rtwdev, RTW89_DBG_TXRX, "dequeue a NULL skb\n");
1865                         goto out;
1866                 }
1867                 rtw89_core_txq_check_agg(rtwdev, rtwtxq, skb);
1868                 ret = rtw89_core_tx_write(rtwdev, vif, sta, skb, NULL);
1869                 if (ret) {
1870                         rtw89_err(rtwdev, "failed to push txq: %d\n", ret);
1871                         ieee80211_free_txskb(rtwdev->hw, skb);
1872                         break;
1873                 }
1874         }
1875 out:
1876         rcu_read_unlock();
1877 }
1878
1879 static u32 rtw89_check_and_reclaim_tx_resource(struct rtw89_dev *rtwdev, u8 tid)
1880 {
1881         u8 qsel, ch_dma;
1882
1883         qsel = rtw89_core_get_qsel(rtwdev, tid);
1884         ch_dma = rtw89_core_get_ch_dma(rtwdev, qsel);
1885
1886         return rtw89_hci_check_and_reclaim_tx_resource(rtwdev, ch_dma);
1887 }
1888
1889 static bool rtw89_core_txq_agg_wait(struct rtw89_dev *rtwdev,
1890                                     struct ieee80211_txq *txq,
1891                                     unsigned long *frame_cnt,
1892                                     bool *sched_txq, bool *reinvoke)
1893 {
1894         struct rtw89_txq *rtwtxq = (struct rtw89_txq *)txq->drv_priv;
1895         struct ieee80211_sta *sta = txq->sta;
1896         struct rtw89_sta *rtwsta = sta ? (struct rtw89_sta *)sta->drv_priv : NULL;
1897
1898         if (!sta || rtwsta->max_agg_wait <= 0)
1899                 return false;
1900
1901         if (rtwdev->stats.tx_tfc_lv <= RTW89_TFC_MID)
1902                 return false;
1903
1904         if (*frame_cnt > 1) {
1905                 *frame_cnt -= 1;
1906                 *sched_txq = true;
1907                 *reinvoke = true;
1908                 rtwtxq->wait_cnt = 1;
1909                 return false;
1910         }
1911
1912         if (*frame_cnt == 1 && rtwtxq->wait_cnt < rtwsta->max_agg_wait) {
1913                 *reinvoke = true;
1914                 rtwtxq->wait_cnt++;
1915                 return true;
1916         }
1917
1918         rtwtxq->wait_cnt = 0;
1919         return false;
1920 }
1921
1922 static void rtw89_core_txq_schedule(struct rtw89_dev *rtwdev, u8 ac, bool *reinvoke)
1923 {
1924         struct ieee80211_hw *hw = rtwdev->hw;
1925         struct ieee80211_txq *txq;
1926         struct rtw89_txq *rtwtxq;
1927         unsigned long frame_cnt;
1928         unsigned long byte_cnt;
1929         u32 tx_resource;
1930         bool sched_txq;
1931
1932         ieee80211_txq_schedule_start(hw, ac);
1933         while ((txq = ieee80211_next_txq(hw, ac))) {
1934                 rtwtxq = (struct rtw89_txq *)txq->drv_priv;
1935                 tx_resource = rtw89_check_and_reclaim_tx_resource(rtwdev, txq->tid);
1936                 sched_txq = false;
1937
1938                 ieee80211_txq_get_depth(txq, &frame_cnt, &byte_cnt);
1939                 if (rtw89_core_txq_agg_wait(rtwdev, txq, &frame_cnt, &sched_txq, reinvoke)) {
1940                         ieee80211_return_txq(hw, txq, true);
1941                         continue;
1942                 }
1943                 frame_cnt = min_t(unsigned long, frame_cnt, tx_resource);
1944                 rtw89_core_txq_push(rtwdev, rtwtxq, frame_cnt, byte_cnt);
1945                 ieee80211_return_txq(hw, txq, sched_txq);
1946                 if (frame_cnt != 0)
1947                         rtw89_core_tx_kick_off(rtwdev, rtw89_core_get_qsel(rtwdev, txq->tid));
1948         }
1949         ieee80211_txq_schedule_end(hw, ac);
1950 }
1951
1952 static void rtw89_ips_work(struct work_struct *work)
1953 {
1954         struct rtw89_dev *rtwdev = container_of(work, struct rtw89_dev,
1955                                                 ips_work);
1956         mutex_lock(&rtwdev->mutex);
1957         if (rtwdev->hw->conf.flags & IEEE80211_CONF_IDLE)
1958                 rtw89_enter_ips(rtwdev);
1959         mutex_unlock(&rtwdev->mutex);
1960 }
1961
1962 static void rtw89_core_txq_work(struct work_struct *w)
1963 {
1964         struct rtw89_dev *rtwdev = container_of(w, struct rtw89_dev, txq_work);
1965         bool reinvoke = false;
1966         u8 ac;
1967
1968         for (ac = 0; ac < IEEE80211_NUM_ACS; ac++)
1969                 rtw89_core_txq_schedule(rtwdev, ac, &reinvoke);
1970
1971         if (reinvoke) {
1972                 /* reinvoke to process the last frame */
1973                 mod_delayed_work(rtwdev->txq_wq, &rtwdev->txq_reinvoke_work, 1);
1974         }
1975 }
1976
1977 static void rtw89_core_txq_reinvoke_work(struct work_struct *w)
1978 {
1979         struct rtw89_dev *rtwdev = container_of(w, struct rtw89_dev,
1980                                                 txq_reinvoke_work.work);
1981
1982         queue_work(rtwdev->txq_wq, &rtwdev->txq_work);
1983 }
1984
1985 static enum rtw89_tfc_lv rtw89_get_traffic_level(struct rtw89_dev *rtwdev,
1986                                                  u32 throughput, u64 cnt)
1987 {
1988         if (cnt < 100)
1989                 return RTW89_TFC_IDLE;
1990         if (throughput > 50)
1991                 return RTW89_TFC_HIGH;
1992         if (throughput > 10)
1993                 return RTW89_TFC_MID;
1994         if (throughput > 2)
1995                 return RTW89_TFC_LOW;
1996         return RTW89_TFC_ULTRA_LOW;
1997 }
1998
1999 static bool rtw89_traffic_stats_calc(struct rtw89_dev *rtwdev,
2000                                      struct rtw89_traffic_stats *stats)
2001 {
2002         enum rtw89_tfc_lv tx_tfc_lv = stats->tx_tfc_lv;
2003         enum rtw89_tfc_lv rx_tfc_lv = stats->rx_tfc_lv;
2004
2005         stats->tx_throughput_raw = (u32)(stats->tx_unicast >> RTW89_TP_SHIFT);
2006         stats->rx_throughput_raw = (u32)(stats->rx_unicast >> RTW89_TP_SHIFT);
2007
2008         ewma_tp_add(&stats->tx_ewma_tp, stats->tx_throughput_raw);
2009         ewma_tp_add(&stats->rx_ewma_tp, stats->rx_throughput_raw);
2010
2011         stats->tx_throughput = ewma_tp_read(&stats->tx_ewma_tp);
2012         stats->rx_throughput = ewma_tp_read(&stats->rx_ewma_tp);
2013         stats->tx_tfc_lv = rtw89_get_traffic_level(rtwdev, stats->tx_throughput,
2014                                                    stats->tx_cnt);
2015         stats->rx_tfc_lv = rtw89_get_traffic_level(rtwdev, stats->rx_throughput,
2016                                                    stats->rx_cnt);
2017         stats->tx_avg_len = stats->tx_cnt ?
2018                             DIV_ROUND_DOWN_ULL(stats->tx_unicast, stats->tx_cnt) : 0;
2019         stats->rx_avg_len = stats->rx_cnt ?
2020                             DIV_ROUND_DOWN_ULL(stats->rx_unicast, stats->rx_cnt) : 0;
2021
2022         stats->tx_unicast = 0;
2023         stats->rx_unicast = 0;
2024         stats->tx_cnt = 0;
2025         stats->rx_cnt = 0;
2026
2027         if (tx_tfc_lv != stats->tx_tfc_lv || rx_tfc_lv != stats->rx_tfc_lv)
2028                 return true;
2029
2030         return false;
2031 }
2032
2033 static bool rtw89_traffic_stats_track(struct rtw89_dev *rtwdev)
2034 {
2035         struct rtw89_vif *rtwvif;
2036         bool tfc_changed;
2037
2038         tfc_changed = rtw89_traffic_stats_calc(rtwdev, &rtwdev->stats);
2039         rtw89_for_each_rtwvif(rtwdev, rtwvif)
2040                 rtw89_traffic_stats_calc(rtwdev, &rtwvif->stats);
2041
2042         return tfc_changed;
2043 }
2044
2045 static void rtw89_vif_enter_lps(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif)
2046 {
2047         if (rtwvif->wifi_role != RTW89_WIFI_ROLE_STATION)
2048                 return;
2049
2050         if (rtwvif->stats.tx_tfc_lv == RTW89_TFC_IDLE &&
2051             rtwvif->stats.rx_tfc_lv == RTW89_TFC_IDLE)
2052                 rtw89_enter_lps(rtwdev, rtwvif->mac_id);
2053 }
2054
2055 static void rtw89_enter_lps_track(struct rtw89_dev *rtwdev)
2056 {
2057         struct rtw89_vif *rtwvif;
2058
2059         rtw89_for_each_rtwvif(rtwdev, rtwvif)
2060                 rtw89_vif_enter_lps(rtwdev, rtwvif);
2061 }
2062
2063 void rtw89_traffic_stats_init(struct rtw89_dev *rtwdev,
2064                               struct rtw89_traffic_stats *stats)
2065 {
2066         stats->tx_unicast = 0;
2067         stats->rx_unicast = 0;
2068         stats->tx_cnt = 0;
2069         stats->rx_cnt = 0;
2070         ewma_tp_init(&stats->tx_ewma_tp);
2071         ewma_tp_init(&stats->rx_ewma_tp);
2072 }
2073
2074 static void rtw89_track_work(struct work_struct *work)
2075 {
2076         struct rtw89_dev *rtwdev = container_of(work, struct rtw89_dev,
2077                                                 track_work.work);
2078         bool tfc_changed;
2079
2080         mutex_lock(&rtwdev->mutex);
2081
2082         if (!test_bit(RTW89_FLAG_RUNNING, rtwdev->flags))
2083                 goto out;
2084
2085         ieee80211_queue_delayed_work(rtwdev->hw, &rtwdev->track_work,
2086                                      RTW89_TRACK_WORK_PERIOD);
2087
2088         tfc_changed = rtw89_traffic_stats_track(rtwdev);
2089         if (rtwdev->scanning)
2090                 goto out;
2091
2092         rtw89_leave_lps(rtwdev);
2093
2094         if (tfc_changed) {
2095                 rtw89_hci_recalc_int_mit(rtwdev);
2096                 rtw89_btc_ntfy_wl_sta(rtwdev);
2097         }
2098         rtw89_mac_bf_monitor_track(rtwdev);
2099         rtw89_phy_stat_track(rtwdev);
2100         rtw89_phy_env_monitor_track(rtwdev);
2101         rtw89_phy_dig(rtwdev);
2102         rtw89_chip_rfk_track(rtwdev);
2103         rtw89_phy_ra_update(rtwdev);
2104         rtw89_phy_cfo_track(rtwdev);
2105
2106         if (rtwdev->lps_enabled && !rtwdev->btc.lps)
2107                 rtw89_enter_lps_track(rtwdev);
2108
2109 out:
2110         mutex_unlock(&rtwdev->mutex);
2111 }
2112
2113 u8 rtw89_core_acquire_bit_map(unsigned long *addr, unsigned long size)
2114 {
2115         unsigned long bit;
2116
2117         bit = find_first_zero_bit(addr, size);
2118         if (bit < size)
2119                 set_bit(bit, addr);
2120
2121         return bit;
2122 }
2123
2124 void rtw89_core_release_bit_map(unsigned long *addr, u8 bit)
2125 {
2126         clear_bit(bit, addr);
2127 }
2128
2129 void rtw89_core_release_all_bits_map(unsigned long *addr, unsigned int nbits)
2130 {
2131         bitmap_zero(addr, nbits);
2132 }
2133
2134 int rtw89_core_acquire_sta_ba_entry(struct rtw89_sta *rtwsta, u8 tid, u8 *cam_idx)
2135 {
2136         struct rtw89_ba_cam_entry *entry;
2137         u8 idx;
2138
2139         idx = rtw89_core_acquire_bit_map(rtwsta->ba_cam_map, RTW89_BA_CAM_NUM);
2140         if (idx == RTW89_BA_CAM_NUM) {
2141                 /* allocate a static BA CAM to tid=0, so replace the existing
2142                  * one if BA CAM is full. Hardware will process the original tid
2143                  * automatically.
2144                  */
2145                 if (tid != 0)
2146                         return -ENOSPC;
2147
2148                 idx = 0;
2149         }
2150
2151         entry = &rtwsta->ba_cam_entry[idx];
2152         entry->tid = tid;
2153         *cam_idx = idx;
2154
2155         return 0;
2156 }
2157
2158 int rtw89_core_release_sta_ba_entry(struct rtw89_sta *rtwsta, u8 tid, u8 *cam_idx)
2159 {
2160         struct rtw89_ba_cam_entry *entry;
2161         int i;
2162
2163         for (i = 0; i < RTW89_BA_CAM_NUM; i++) {
2164                 if (!test_bit(i, rtwsta->ba_cam_map))
2165                         continue;
2166
2167                 entry = &rtwsta->ba_cam_entry[i];
2168                 if (entry->tid != tid)
2169                         continue;
2170
2171                 rtw89_core_release_bit_map(rtwsta->ba_cam_map, i);
2172                 *cam_idx = i;
2173                 return 0;
2174         }
2175
2176         return -ENOENT;
2177 }
2178
2179 #define RTW89_TYPE_MAPPING(_type)       \
2180         case NL80211_IFTYPE_ ## _type:  \
2181                 rtwvif->wifi_role = RTW89_WIFI_ROLE_ ## _type;  \
2182                 break
2183 void rtw89_vif_type_mapping(struct ieee80211_vif *vif, bool assoc)
2184 {
2185         struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv;
2186
2187         switch (vif->type) {
2188         RTW89_TYPE_MAPPING(ADHOC);
2189         RTW89_TYPE_MAPPING(STATION);
2190         RTW89_TYPE_MAPPING(AP);
2191         RTW89_TYPE_MAPPING(MONITOR);
2192         RTW89_TYPE_MAPPING(MESH_POINT);
2193         default:
2194                 WARN_ON(1);
2195                 break;
2196         }
2197
2198         switch (vif->type) {
2199         case NL80211_IFTYPE_AP:
2200         case NL80211_IFTYPE_MESH_POINT:
2201                 rtwvif->net_type = RTW89_NET_TYPE_AP_MODE;
2202                 rtwvif->self_role = RTW89_SELF_ROLE_AP;
2203                 break;
2204         case NL80211_IFTYPE_ADHOC:
2205                 rtwvif->net_type = RTW89_NET_TYPE_AD_HOC;
2206                 rtwvif->self_role = RTW89_SELF_ROLE_CLIENT;
2207                 break;
2208         case NL80211_IFTYPE_STATION:
2209                 if (assoc) {
2210                         rtwvif->net_type = RTW89_NET_TYPE_INFRA;
2211                         rtwvif->trigger = vif->bss_conf.he_support;
2212                 } else {
2213                         rtwvif->net_type = RTW89_NET_TYPE_NO_LINK;
2214                         rtwvif->trigger = false;
2215                 }
2216                 rtwvif->self_role = RTW89_SELF_ROLE_CLIENT;
2217                 rtwvif->addr_cam.sec_ent_mode = RTW89_ADDR_CAM_SEC_NORMAL;
2218                 break;
2219         default:
2220                 WARN_ON(1);
2221                 break;
2222         }
2223 }
2224
2225 int rtw89_core_sta_add(struct rtw89_dev *rtwdev,
2226                        struct ieee80211_vif *vif,
2227                        struct ieee80211_sta *sta)
2228 {
2229         struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv;
2230         struct rtw89_sta *rtwsta = (struct rtw89_sta *)sta->drv_priv;
2231         int i;
2232
2233         rtwsta->rtwvif = rtwvif;
2234         rtwsta->prev_rssi = 0;
2235
2236         for (i = 0; i < ARRAY_SIZE(sta->txq); i++)
2237                 rtw89_core_txq_init(rtwdev, sta->txq[i]);
2238
2239         ewma_rssi_init(&rtwsta->avg_rssi);
2240
2241         if (vif->type == NL80211_IFTYPE_STATION) {
2242                 /* for station mode, assign the mac_id from itself */
2243                 rtwsta->mac_id = rtwvif->mac_id;
2244                 rtw89_btc_ntfy_role_info(rtwdev, rtwvif, rtwsta,
2245                                          BTC_ROLE_MSTS_STA_CONN_START);
2246                 rtw89_chip_rfk_channel(rtwdev);
2247         } else if (vif->type == NL80211_IFTYPE_AP) {
2248                 rtwsta->mac_id = rtw89_core_acquire_bit_map(rtwdev->mac_id_map,
2249                                                             RTW89_MAX_MAC_ID_NUM);
2250         }
2251
2252         return 0;
2253 }
2254
2255 int rtw89_core_sta_disassoc(struct rtw89_dev *rtwdev,
2256                             struct ieee80211_vif *vif,
2257                             struct ieee80211_sta *sta)
2258 {
2259         struct rtw89_sta *rtwsta = (struct rtw89_sta *)sta->drv_priv;
2260
2261         rtwdev->total_sta_assoc--;
2262         rtwsta->disassoc = true;
2263
2264         return 0;
2265 }
2266
2267 int rtw89_core_sta_disconnect(struct rtw89_dev *rtwdev,
2268                               struct ieee80211_vif *vif,
2269                               struct ieee80211_sta *sta)
2270 {
2271         struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv;
2272         struct rtw89_sta *rtwsta = (struct rtw89_sta *)sta->drv_priv;
2273         int ret;
2274
2275         rtw89_mac_bf_monitor_calc(rtwdev, sta, true);
2276         rtw89_mac_bf_disassoc(rtwdev, vif, sta);
2277         rtw89_core_free_sta_pending_ba(rtwdev, sta);
2278         if (vif->type == NL80211_IFTYPE_AP)
2279                 rtw89_cam_deinit_addr_cam(rtwdev, &rtwsta->addr_cam);
2280
2281         if (vif->type == NL80211_IFTYPE_STATION)
2282                 rtw89_vif_type_mapping(vif, false);
2283
2284         ret = rtw89_fw_h2c_assoc_cmac_tbl(rtwdev, vif, sta);
2285         if (ret) {
2286                 rtw89_warn(rtwdev, "failed to send h2c cmac table\n");
2287                 return ret;
2288         }
2289
2290         ret = rtw89_fw_h2c_join_info(rtwdev, rtwvif, rtwsta, true);
2291         if (ret) {
2292                 rtw89_warn(rtwdev, "failed to send h2c join info\n");
2293                 return ret;
2294         }
2295
2296         if (vif->type == NL80211_IFTYPE_AP) {
2297                 ret = rtw89_fw_h2c_role_maintain(rtwdev, rtwvif, rtwsta, RTW89_ROLE_REMOVE);
2298                 if (ret) {
2299                         rtw89_warn(rtwdev, "failed to send h2c role info\n");
2300                         return ret;
2301                 }
2302         }
2303
2304         /* update cam aid mac_id net_type */
2305         ret = rtw89_fw_h2c_cam(rtwdev, rtwvif, rtwsta, NULL);
2306         if (ret) {
2307                 rtw89_warn(rtwdev, "failed to send h2c cam\n");
2308                 return ret;
2309         }
2310
2311         return ret;
2312 }
2313
2314 int rtw89_core_sta_assoc(struct rtw89_dev *rtwdev,
2315                          struct ieee80211_vif *vif,
2316                          struct ieee80211_sta *sta)
2317 {
2318         struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv;
2319         struct rtw89_sta *rtwsta = (struct rtw89_sta *)sta->drv_priv;
2320         int ret;
2321
2322         if (vif->type == NL80211_IFTYPE_AP) {
2323                 ret = rtw89_mac_set_macid_pause(rtwdev, rtwsta->mac_id, false);
2324                 if (ret) {
2325                         rtw89_warn(rtwdev, "failed to send h2c macid pause\n");
2326                         return ret;
2327                 }
2328
2329                 ret = rtw89_fw_h2c_role_maintain(rtwdev, rtwvif, rtwsta, RTW89_ROLE_CREATE);
2330                 if (ret) {
2331                         rtw89_warn(rtwdev, "failed to send h2c role info\n");
2332                         return ret;
2333                 }
2334
2335                 ret = rtw89_cam_init_addr_cam(rtwdev, &rtwsta->addr_cam, &rtwvif->bssid_cam);
2336                 if (ret) {
2337                         rtw89_warn(rtwdev, "failed to send h2c init addr cam\n");
2338                         return ret;
2339                 }
2340         }
2341
2342         ret = rtw89_fw_h2c_assoc_cmac_tbl(rtwdev, vif, sta);
2343         if (ret) {
2344                 rtw89_warn(rtwdev, "failed to send h2c cmac table\n");
2345                 return ret;
2346         }
2347
2348         ret = rtw89_fw_h2c_join_info(rtwdev, rtwvif, rtwsta, false);
2349         if (ret) {
2350                 rtw89_warn(rtwdev, "failed to send h2c join info\n");
2351                 return ret;
2352         }
2353
2354         /* update cam aid mac_id net_type */
2355         rtw89_fw_h2c_cam(rtwdev, rtwvif, rtwsta, NULL);
2356         if (ret) {
2357                 rtw89_warn(rtwdev, "failed to send h2c cam\n");
2358                 return ret;
2359         }
2360
2361         ret = rtw89_fw_h2c_general_pkt(rtwdev, rtwsta->mac_id);
2362         if (ret) {
2363                 rtw89_warn(rtwdev, "failed to send h2c general packet\n");
2364                 return ret;
2365         }
2366
2367         rtwdev->total_sta_assoc++;
2368         rtw89_phy_ra_assoc(rtwdev, sta);
2369         rtw89_mac_bf_assoc(rtwdev, vif, sta);
2370         rtw89_mac_bf_monitor_calc(rtwdev, sta, false);
2371
2372         if (vif->type == NL80211_IFTYPE_STATION) {
2373                 rtw89_btc_ntfy_role_info(rtwdev, rtwvif, rtwsta,
2374                                          BTC_ROLE_MSTS_STA_CONN_END);
2375                 rtw89_core_get_no_ul_ofdma_htc(rtwdev, &rtwsta->htc_template);
2376         }
2377
2378         return ret;
2379 }
2380
2381 int rtw89_core_sta_remove(struct rtw89_dev *rtwdev,
2382                           struct ieee80211_vif *vif,
2383                           struct ieee80211_sta *sta)
2384 {
2385         struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv;
2386         struct rtw89_sta *rtwsta = (struct rtw89_sta *)sta->drv_priv;
2387
2388         if (vif->type == NL80211_IFTYPE_STATION)
2389                 rtw89_btc_ntfy_role_info(rtwdev, rtwvif, rtwsta,
2390                                          BTC_ROLE_MSTS_STA_DIS_CONN);
2391         else if (vif->type == NL80211_IFTYPE_AP)
2392                 rtw89_core_release_bit_map(rtwdev->mac_id_map, rtwsta->mac_id);
2393
2394         return 0;
2395 }
2396
2397 static void rtw89_init_ht_cap(struct rtw89_dev *rtwdev,
2398                               struct ieee80211_sta_ht_cap *ht_cap)
2399 {
2400         static const __le16 highest[RF_PATH_MAX] = {
2401                 cpu_to_le16(150), cpu_to_le16(300), cpu_to_le16(450), cpu_to_le16(600),
2402         };
2403         struct rtw89_hal *hal = &rtwdev->hal;
2404         u8 nss = hal->rx_nss;
2405         int i;
2406
2407         ht_cap->ht_supported = true;
2408         ht_cap->cap = 0;
2409         ht_cap->cap |= IEEE80211_HT_CAP_SGI_20 |
2410                        IEEE80211_HT_CAP_MAX_AMSDU |
2411                        IEEE80211_HT_CAP_TX_STBC |
2412                        (1 << IEEE80211_HT_CAP_RX_STBC_SHIFT);
2413         ht_cap->cap |= IEEE80211_HT_CAP_LDPC_CODING;
2414         ht_cap->cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40 |
2415                        IEEE80211_HT_CAP_DSSSCCK40 |
2416                        IEEE80211_HT_CAP_SGI_40;
2417         ht_cap->ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K;
2418         ht_cap->ampdu_density = IEEE80211_HT_MPDU_DENSITY_NONE;
2419         ht_cap->mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;
2420         for (i = 0; i < nss; i++)
2421                 ht_cap->mcs.rx_mask[i] = 0xFF;
2422         ht_cap->mcs.rx_mask[4] = 0x01;
2423         ht_cap->mcs.rx_highest = highest[nss - 1];
2424 }
2425
2426 static void rtw89_init_vht_cap(struct rtw89_dev *rtwdev,
2427                                struct ieee80211_sta_vht_cap *vht_cap)
2428 {
2429         static const __le16 highest_bw80[RF_PATH_MAX] = {
2430                 cpu_to_le16(433), cpu_to_le16(867), cpu_to_le16(1300), cpu_to_le16(1733),
2431         };
2432         static const __le16 highest_bw160[RF_PATH_MAX] = {
2433                 cpu_to_le16(867), cpu_to_le16(1733), cpu_to_le16(2600), cpu_to_le16(3467),
2434         };
2435         const struct rtw89_chip_info *chip = rtwdev->chip;
2436         const __le16 *highest = chip->support_bw160 ? highest_bw160 : highest_bw80;
2437         struct rtw89_hal *hal = &rtwdev->hal;
2438         u16 tx_mcs_map = 0, rx_mcs_map = 0;
2439         u8 sts_cap = 3;
2440         int i;
2441
2442         for (i = 0; i < 8; i++) {
2443                 if (i < hal->tx_nss)
2444                         tx_mcs_map |= IEEE80211_VHT_MCS_SUPPORT_0_9 << (i * 2);
2445                 else
2446                         tx_mcs_map |= IEEE80211_VHT_MCS_NOT_SUPPORTED << (i * 2);
2447                 if (i < hal->rx_nss)
2448                         rx_mcs_map |= IEEE80211_VHT_MCS_SUPPORT_0_9 << (i * 2);
2449                 else
2450                         rx_mcs_map |= IEEE80211_VHT_MCS_NOT_SUPPORTED << (i * 2);
2451         }
2452
2453         vht_cap->vht_supported = true;
2454         vht_cap->cap = IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_11454 |
2455                        IEEE80211_VHT_CAP_SHORT_GI_80 |
2456                        IEEE80211_VHT_CAP_RXSTBC_1 |
2457                        IEEE80211_VHT_CAP_HTC_VHT |
2458                        IEEE80211_VHT_CAP_MAX_A_MPDU_LENGTH_EXPONENT_MASK |
2459                        0;
2460         vht_cap->cap |= IEEE80211_VHT_CAP_TXSTBC;
2461         vht_cap->cap |= IEEE80211_VHT_CAP_RXLDPC;
2462         vht_cap->cap |= IEEE80211_VHT_CAP_MU_BEAMFORMEE_CAPABLE |
2463                         IEEE80211_VHT_CAP_SU_BEAMFORMEE_CAPABLE;
2464         vht_cap->cap |= sts_cap << IEEE80211_VHT_CAP_BEAMFORMEE_STS_SHIFT;
2465         if (chip->support_bw160)
2466                 vht_cap->cap |= IEEE80211_VHT_CAP_SUPP_CHAN_WIDTH_160MHZ |
2467                                 IEEE80211_VHT_CAP_SHORT_GI_160;
2468         vht_cap->vht_mcs.rx_mcs_map = cpu_to_le16(rx_mcs_map);
2469         vht_cap->vht_mcs.tx_mcs_map = cpu_to_le16(tx_mcs_map);
2470         vht_cap->vht_mcs.rx_highest = highest[hal->rx_nss - 1];
2471         vht_cap->vht_mcs.tx_highest = highest[hal->tx_nss - 1];
2472 }
2473
2474 #define RTW89_SBAND_IFTYPES_NR 2
2475
2476 static void rtw89_init_he_cap(struct rtw89_dev *rtwdev,
2477                               enum nl80211_band band,
2478                               struct ieee80211_supported_band *sband)
2479 {
2480         const struct rtw89_chip_info *chip = rtwdev->chip;
2481         struct rtw89_hal *hal = &rtwdev->hal;
2482         struct ieee80211_sband_iftype_data *iftype_data;
2483         bool no_ng16 = (chip->chip_id == RTL8852A && hal->cv == CHIP_CBV) ||
2484                        (chip->chip_id == RTL8852B && hal->cv == CHIP_CAV);
2485         u16 mcs_map = 0;
2486         int i;
2487         int nss = hal->rx_nss;
2488         int idx = 0;
2489
2490         iftype_data = kcalloc(RTW89_SBAND_IFTYPES_NR, sizeof(*iftype_data), GFP_KERNEL);
2491         if (!iftype_data)
2492                 return;
2493
2494         for (i = 0; i < 8; i++) {
2495                 if (i < nss)
2496                         mcs_map |= IEEE80211_HE_MCS_SUPPORT_0_11 << (i * 2);
2497                 else
2498                         mcs_map |= IEEE80211_HE_MCS_NOT_SUPPORTED << (i * 2);
2499         }
2500
2501         for (i = 0; i < NUM_NL80211_IFTYPES; i++) {
2502                 struct ieee80211_sta_he_cap *he_cap;
2503                 u8 *mac_cap_info;
2504                 u8 *phy_cap_info;
2505
2506                 switch (i) {
2507                 case NL80211_IFTYPE_STATION:
2508                 case NL80211_IFTYPE_AP:
2509                         break;
2510                 default:
2511                         continue;
2512                 }
2513
2514                 if (idx >= RTW89_SBAND_IFTYPES_NR) {
2515                         rtw89_warn(rtwdev, "run out of iftype_data\n");
2516                         break;
2517                 }
2518
2519                 iftype_data[idx].types_mask = BIT(i);
2520                 he_cap = &iftype_data[idx].he_cap;
2521                 mac_cap_info = he_cap->he_cap_elem.mac_cap_info;
2522                 phy_cap_info = he_cap->he_cap_elem.phy_cap_info;
2523
2524                 he_cap->has_he = true;
2525                 if (i == NL80211_IFTYPE_AP)
2526                         mac_cap_info[0] = IEEE80211_HE_MAC_CAP0_HTC_HE;
2527                 if (i == NL80211_IFTYPE_STATION)
2528                         mac_cap_info[1] = IEEE80211_HE_MAC_CAP1_TF_MAC_PAD_DUR_16US;
2529                 mac_cap_info[2] = IEEE80211_HE_MAC_CAP2_ALL_ACK |
2530                                   IEEE80211_HE_MAC_CAP2_BSR;
2531                 mac_cap_info[3] = IEEE80211_HE_MAC_CAP3_MAX_AMPDU_LEN_EXP_EXT_2;
2532                 if (i == NL80211_IFTYPE_AP)
2533                         mac_cap_info[3] |= IEEE80211_HE_MAC_CAP3_OMI_CONTROL;
2534                 mac_cap_info[4] = IEEE80211_HE_MAC_CAP4_OPS |
2535                                   IEEE80211_HE_MAC_CAP4_AMSDU_IN_AMPDU;
2536                 if (i == NL80211_IFTYPE_STATION)
2537                         mac_cap_info[5] = IEEE80211_HE_MAC_CAP5_HT_VHT_TRIG_FRAME_RX;
2538                 if (band == NL80211_BAND_2GHZ) {
2539                         phy_cap_info[0] =
2540                                 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_40MHZ_IN_2G;
2541                 } else {
2542                         phy_cap_info[0] =
2543                                 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_40MHZ_80MHZ_IN_5G;
2544                         if (chip->support_bw160)
2545                                 phy_cap_info[0] |= IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_160MHZ_IN_5G;
2546                 }
2547                 phy_cap_info[1] = IEEE80211_HE_PHY_CAP1_DEVICE_CLASS_A |
2548                                   IEEE80211_HE_PHY_CAP1_LDPC_CODING_IN_PAYLOAD |
2549                                   IEEE80211_HE_PHY_CAP1_HE_LTF_AND_GI_FOR_HE_PPDUS_0_8US;
2550                 phy_cap_info[2] = IEEE80211_HE_PHY_CAP2_NDP_4x_LTF_AND_3_2US |
2551                                   IEEE80211_HE_PHY_CAP2_STBC_TX_UNDER_80MHZ |
2552                                   IEEE80211_HE_PHY_CAP2_STBC_RX_UNDER_80MHZ |
2553                                   IEEE80211_HE_PHY_CAP2_DOPPLER_TX;
2554                 phy_cap_info[3] = IEEE80211_HE_PHY_CAP3_DCM_MAX_CONST_RX_16_QAM;
2555                 if (i == NL80211_IFTYPE_STATION)
2556                         phy_cap_info[3] |= IEEE80211_HE_PHY_CAP3_DCM_MAX_CONST_TX_16_QAM |
2557                                            IEEE80211_HE_PHY_CAP3_DCM_MAX_TX_NSS_2;
2558                 if (i == NL80211_IFTYPE_AP)
2559                         phy_cap_info[3] |= IEEE80211_HE_PHY_CAP3_RX_PARTIAL_BW_SU_IN_20MHZ_MU;
2560                 phy_cap_info[4] = IEEE80211_HE_PHY_CAP4_SU_BEAMFORMEE |
2561                                   IEEE80211_HE_PHY_CAP4_BEAMFORMEE_MAX_STS_UNDER_80MHZ_4;
2562                 phy_cap_info[5] = no_ng16 ? 0 :
2563                                   IEEE80211_HE_PHY_CAP5_NG16_SU_FEEDBACK |
2564                                   IEEE80211_HE_PHY_CAP5_NG16_MU_FEEDBACK;
2565                 phy_cap_info[6] = IEEE80211_HE_PHY_CAP6_CODEBOOK_SIZE_42_SU |
2566                                   IEEE80211_HE_PHY_CAP6_CODEBOOK_SIZE_75_MU |
2567                                   IEEE80211_HE_PHY_CAP6_TRIG_SU_BEAMFORMING_FB |
2568                                   IEEE80211_HE_PHY_CAP6_PARTIAL_BW_EXT_RANGE;
2569                 phy_cap_info[7] = IEEE80211_HE_PHY_CAP7_POWER_BOOST_FACTOR_SUPP |
2570                                   IEEE80211_HE_PHY_CAP7_HE_SU_MU_PPDU_4XLTF_AND_08_US_GI |
2571                                   IEEE80211_HE_PHY_CAP7_MAX_NC_1;
2572                 phy_cap_info[8] = IEEE80211_HE_PHY_CAP8_HE_ER_SU_PPDU_4XLTF_AND_08_US_GI |
2573                                   IEEE80211_HE_PHY_CAP8_HE_ER_SU_1XLTF_AND_08_US_GI |
2574                                   IEEE80211_HE_PHY_CAP8_DCM_MAX_RU_996;
2575                 if (chip->support_bw160)
2576                         phy_cap_info[8] |= IEEE80211_HE_PHY_CAP8_20MHZ_IN_160MHZ_HE_PPDU |
2577                                            IEEE80211_HE_PHY_CAP8_80MHZ_IN_160MHZ_HE_PPDU;
2578                 phy_cap_info[9] = IEEE80211_HE_PHY_CAP9_LONGER_THAN_16_SIGB_OFDM_SYM |
2579                                   IEEE80211_HE_PHY_CAP9_RX_1024_QAM_LESS_THAN_242_TONE_RU |
2580                                   IEEE80211_HE_PHY_CAP9_RX_FULL_BW_SU_USING_MU_WITH_COMP_SIGB |
2581                                   IEEE80211_HE_PHY_CAP9_RX_FULL_BW_SU_USING_MU_WITH_NON_COMP_SIGB |
2582                                   u8_encode_bits(IEEE80211_HE_PHY_CAP9_NOMINAL_PKT_PADDING_16US,
2583                                                  IEEE80211_HE_PHY_CAP9_NOMINAL_PKT_PADDING_MASK);
2584                 if (i == NL80211_IFTYPE_STATION)
2585                         phy_cap_info[9] |= IEEE80211_HE_PHY_CAP9_TX_1024_QAM_LESS_THAN_242_TONE_RU;
2586                 he_cap->he_mcs_nss_supp.rx_mcs_80 = cpu_to_le16(mcs_map);
2587                 he_cap->he_mcs_nss_supp.tx_mcs_80 = cpu_to_le16(mcs_map);
2588                 if (chip->support_bw160) {
2589                         he_cap->he_mcs_nss_supp.rx_mcs_160 = cpu_to_le16(mcs_map);
2590                         he_cap->he_mcs_nss_supp.tx_mcs_160 = cpu_to_le16(mcs_map);
2591                 }
2592
2593                 if (band == NL80211_BAND_6GHZ) {
2594                         __le16 capa;
2595
2596                         capa = le16_encode_bits(IEEE80211_HT_MPDU_DENSITY_NONE,
2597                                                 IEEE80211_HE_6GHZ_CAP_MIN_MPDU_START) |
2598                                le16_encode_bits(IEEE80211_VHT_MAX_AMPDU_1024K,
2599                                                 IEEE80211_HE_6GHZ_CAP_MAX_AMPDU_LEN_EXP) |
2600                                le16_encode_bits(IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_11454,
2601                                                 IEEE80211_HE_6GHZ_CAP_MAX_MPDU_LEN);
2602                         iftype_data[idx].he_6ghz_capa.capa = capa;
2603                 }
2604
2605                 idx++;
2606         }
2607
2608         sband->iftype_data = iftype_data;
2609         sband->n_iftype_data = idx;
2610 }
2611
2612 static int rtw89_core_set_supported_band(struct rtw89_dev *rtwdev)
2613 {
2614         struct ieee80211_hw *hw = rtwdev->hw;
2615         struct ieee80211_supported_band *sband_2ghz = NULL, *sband_5ghz = NULL;
2616         struct ieee80211_supported_band *sband_6ghz = NULL;
2617         u32 size = sizeof(struct ieee80211_supported_band);
2618         u8 support_bands = rtwdev->chip->support_bands;
2619
2620         if (support_bands & BIT(NL80211_BAND_2GHZ)) {
2621                 sband_2ghz = kmemdup(&rtw89_sband_2ghz, size, GFP_KERNEL);
2622                 if (!sband_2ghz)
2623                         goto err;
2624                 rtw89_init_ht_cap(rtwdev, &sband_2ghz->ht_cap);
2625                 rtw89_init_he_cap(rtwdev, NL80211_BAND_2GHZ, sband_2ghz);
2626                 hw->wiphy->bands[NL80211_BAND_2GHZ] = sband_2ghz;
2627         }
2628
2629         if (support_bands & BIT(NL80211_BAND_5GHZ)) {
2630                 sband_5ghz = kmemdup(&rtw89_sband_5ghz, size, GFP_KERNEL);
2631                 if (!sband_5ghz)
2632                         goto err;
2633                 rtw89_init_ht_cap(rtwdev, &sband_5ghz->ht_cap);
2634                 rtw89_init_vht_cap(rtwdev, &sband_5ghz->vht_cap);
2635                 rtw89_init_he_cap(rtwdev, NL80211_BAND_5GHZ, sband_5ghz);
2636                 hw->wiphy->bands[NL80211_BAND_5GHZ] = sband_5ghz;
2637         }
2638
2639         if (support_bands & BIT(NL80211_BAND_6GHZ)) {
2640                 sband_6ghz = kmemdup(&rtw89_sband_6ghz, size, GFP_KERNEL);
2641                 if (!sband_6ghz)
2642                         goto err;
2643                 rtw89_init_he_cap(rtwdev, NL80211_BAND_6GHZ, sband_6ghz);
2644                 hw->wiphy->bands[NL80211_BAND_6GHZ] = sband_6ghz;
2645         }
2646
2647         return 0;
2648
2649 err:
2650         hw->wiphy->bands[NL80211_BAND_2GHZ] = NULL;
2651         hw->wiphy->bands[NL80211_BAND_5GHZ] = NULL;
2652         hw->wiphy->bands[NL80211_BAND_6GHZ] = NULL;
2653         if (sband_2ghz)
2654                 kfree(sband_2ghz->iftype_data);
2655         if (sband_5ghz)
2656                 kfree(sband_5ghz->iftype_data);
2657         if (sband_6ghz)
2658                 kfree(sband_6ghz->iftype_data);
2659         kfree(sband_2ghz);
2660         kfree(sband_5ghz);
2661         kfree(sband_6ghz);
2662         return -ENOMEM;
2663 }
2664
2665 static void rtw89_core_clr_supported_band(struct rtw89_dev *rtwdev)
2666 {
2667         struct ieee80211_hw *hw = rtwdev->hw;
2668
2669         kfree(hw->wiphy->bands[NL80211_BAND_2GHZ]->iftype_data);
2670         kfree(hw->wiphy->bands[NL80211_BAND_5GHZ]->iftype_data);
2671         if (hw->wiphy->bands[NL80211_BAND_6GHZ])
2672                 kfree(hw->wiphy->bands[NL80211_BAND_6GHZ]->iftype_data);
2673         kfree(hw->wiphy->bands[NL80211_BAND_2GHZ]);
2674         kfree(hw->wiphy->bands[NL80211_BAND_5GHZ]);
2675         kfree(hw->wiphy->bands[NL80211_BAND_6GHZ]);
2676         hw->wiphy->bands[NL80211_BAND_2GHZ] = NULL;
2677         hw->wiphy->bands[NL80211_BAND_5GHZ] = NULL;
2678         hw->wiphy->bands[NL80211_BAND_6GHZ] = NULL;
2679 }
2680
2681 static void rtw89_core_ppdu_sts_init(struct rtw89_dev *rtwdev)
2682 {
2683         int i;
2684
2685         for (i = 0; i < RTW89_PHY_MAX; i++)
2686                 skb_queue_head_init(&rtwdev->ppdu_sts.rx_queue[i]);
2687         for (i = 0; i < RTW89_PHY_MAX; i++)
2688                 rtwdev->ppdu_sts.curr_rx_ppdu_cnt[i] = U8_MAX;
2689 }
2690
2691 void rtw89_core_update_beacon_work(struct work_struct *work)
2692 {
2693         struct rtw89_dev *rtwdev;
2694         struct rtw89_vif *rtwvif = container_of(work, struct rtw89_vif,
2695                                                 update_beacon_work);
2696
2697         if (rtwvif->net_type != RTW89_NET_TYPE_AP_MODE)
2698                 return;
2699
2700         rtwdev = rtwvif->rtwdev;
2701         mutex_lock(&rtwdev->mutex);
2702         rtw89_fw_h2c_update_beacon(rtwdev, rtwvif);
2703         mutex_unlock(&rtwdev->mutex);
2704 }
2705
2706 int rtw89_core_start(struct rtw89_dev *rtwdev)
2707 {
2708         int ret;
2709
2710         rtwdev->mac.qta_mode = RTW89_QTA_SCC;
2711         ret = rtw89_mac_init(rtwdev);
2712         if (ret) {
2713                 rtw89_err(rtwdev, "mac init fail, ret:%d\n", ret);
2714                 return ret;
2715         }
2716
2717         rtw89_btc_ntfy_poweron(rtwdev);
2718
2719         /* efuse process */
2720
2721         /* pre-config BB/RF, BB reset/RFC reset */
2722         rtw89_chip_disable_bb_rf(rtwdev);
2723         ret = rtw89_chip_enable_bb_rf(rtwdev);
2724         if (ret)
2725                 return ret;
2726
2727         rtw89_phy_init_bb_reg(rtwdev);
2728         rtw89_phy_init_rf_reg(rtwdev);
2729
2730         rtw89_btc_ntfy_init(rtwdev, BTC_MODE_NORMAL);
2731
2732         rtw89_phy_dm_init(rtwdev);
2733
2734         rtw89_mac_cfg_ppdu_status(rtwdev, RTW89_MAC_0, true);
2735         rtw89_mac_update_rts_threshold(rtwdev, RTW89_MAC_0);
2736
2737         ret = rtw89_hci_start(rtwdev);
2738         if (ret) {
2739                 rtw89_err(rtwdev, "failed to start hci\n");
2740                 return ret;
2741         }
2742
2743         ieee80211_queue_delayed_work(rtwdev->hw, &rtwdev->track_work,
2744                                      RTW89_TRACK_WORK_PERIOD);
2745
2746         set_bit(RTW89_FLAG_RUNNING, rtwdev->flags);
2747
2748         rtw89_btc_ntfy_radio_state(rtwdev, BTC_RFCTRL_WL_ON);
2749         rtw89_fw_h2c_fw_log(rtwdev, rtwdev->fw.fw_log_enable);
2750
2751         return 0;
2752 }
2753
2754 void rtw89_core_stop(struct rtw89_dev *rtwdev)
2755 {
2756         struct rtw89_btc *btc = &rtwdev->btc;
2757
2758         /* Prvent to stop twice; enter_ips and ops_stop */
2759         if (!test_bit(RTW89_FLAG_RUNNING, rtwdev->flags))
2760                 return;
2761
2762         rtw89_btc_ntfy_radio_state(rtwdev, BTC_RFCTRL_WL_OFF);
2763
2764         clear_bit(RTW89_FLAG_RUNNING, rtwdev->flags);
2765
2766         mutex_unlock(&rtwdev->mutex);
2767
2768         cancel_work_sync(&rtwdev->c2h_work);
2769         cancel_work_sync(&btc->eapol_notify_work);
2770         cancel_work_sync(&btc->arp_notify_work);
2771         cancel_work_sync(&btc->dhcp_notify_work);
2772         cancel_work_sync(&btc->icmp_notify_work);
2773         cancel_delayed_work_sync(&rtwdev->txq_reinvoke_work);
2774         cancel_delayed_work_sync(&rtwdev->track_work);
2775         cancel_delayed_work_sync(&rtwdev->coex_act1_work);
2776         cancel_delayed_work_sync(&rtwdev->coex_bt_devinfo_work);
2777         cancel_delayed_work_sync(&rtwdev->coex_rfk_chk_work);
2778         cancel_delayed_work_sync(&rtwdev->cfo_track_work);
2779
2780         mutex_lock(&rtwdev->mutex);
2781
2782         rtw89_btc_ntfy_poweroff(rtwdev);
2783         rtw89_hci_flush_queues(rtwdev, BIT(rtwdev->hw->queues) - 1, true);
2784         rtw89_mac_flush_txq(rtwdev, BIT(rtwdev->hw->queues) - 1, true);
2785         rtw89_hci_stop(rtwdev);
2786         rtw89_hci_deinit(rtwdev);
2787         rtw89_mac_pwr_off(rtwdev);
2788         rtw89_hci_reset(rtwdev);
2789 }
2790
2791 int rtw89_core_init(struct rtw89_dev *rtwdev)
2792 {
2793         struct rtw89_btc *btc = &rtwdev->btc;
2794         int ret;
2795         u8 band;
2796
2797         INIT_LIST_HEAD(&rtwdev->ba_list);
2798         INIT_LIST_HEAD(&rtwdev->rtwvifs_list);
2799         INIT_LIST_HEAD(&rtwdev->early_h2c_list);
2800         for (band = NL80211_BAND_2GHZ; band < NUM_NL80211_BANDS; band++) {
2801                 if (!(rtwdev->chip->support_bands & BIT(band)))
2802                         continue;
2803                 INIT_LIST_HEAD(&rtwdev->scan_info.pkt_list[band]);
2804         }
2805         INIT_WORK(&rtwdev->ba_work, rtw89_core_ba_work);
2806         INIT_WORK(&rtwdev->txq_work, rtw89_core_txq_work);
2807         INIT_DELAYED_WORK(&rtwdev->txq_reinvoke_work, rtw89_core_txq_reinvoke_work);
2808         INIT_DELAYED_WORK(&rtwdev->track_work, rtw89_track_work);
2809         INIT_DELAYED_WORK(&rtwdev->coex_act1_work, rtw89_coex_act1_work);
2810         INIT_DELAYED_WORK(&rtwdev->coex_bt_devinfo_work, rtw89_coex_bt_devinfo_work);
2811         INIT_DELAYED_WORK(&rtwdev->coex_rfk_chk_work, rtw89_coex_rfk_chk_work);
2812         INIT_DELAYED_WORK(&rtwdev->cfo_track_work, rtw89_phy_cfo_track_work);
2813         rtwdev->txq_wq = alloc_workqueue("rtw89_tx_wq", WQ_UNBOUND | WQ_HIGHPRI, 0);
2814         spin_lock_init(&rtwdev->ba_lock);
2815         spin_lock_init(&rtwdev->rpwm_lock);
2816         mutex_init(&rtwdev->mutex);
2817         mutex_init(&rtwdev->rf_mutex);
2818         rtwdev->total_sta_assoc = 0;
2819
2820         INIT_WORK(&rtwdev->c2h_work, rtw89_fw_c2h_work);
2821         INIT_WORK(&rtwdev->ips_work, rtw89_ips_work);
2822         skb_queue_head_init(&rtwdev->c2h_queue);
2823         rtw89_core_ppdu_sts_init(rtwdev);
2824         rtw89_traffic_stats_init(rtwdev, &rtwdev->stats);
2825
2826         rtwdev->ps_mode = rtw89_update_ps_mode(rtwdev);
2827         rtwdev->hal.rx_fltr = DEFAULT_AX_RX_FLTR;
2828
2829         INIT_WORK(&btc->eapol_notify_work, rtw89_btc_ntfy_eapol_packet_work);
2830         INIT_WORK(&btc->arp_notify_work, rtw89_btc_ntfy_arp_packet_work);
2831         INIT_WORK(&btc->dhcp_notify_work, rtw89_btc_ntfy_dhcp_packet_work);
2832         INIT_WORK(&btc->icmp_notify_work, rtw89_btc_ntfy_icmp_packet_work);
2833
2834         ret = rtw89_load_firmware(rtwdev);
2835         if (ret) {
2836                 rtw89_warn(rtwdev, "no firmware loaded\n");
2837                 return ret;
2838         }
2839         rtw89_ser_init(rtwdev);
2840
2841         return 0;
2842 }
2843 EXPORT_SYMBOL(rtw89_core_init);
2844
2845 void rtw89_core_deinit(struct rtw89_dev *rtwdev)
2846 {
2847         rtw89_ser_deinit(rtwdev);
2848         rtw89_unload_firmware(rtwdev);
2849         rtw89_fw_free_all_early_h2c(rtwdev);
2850
2851         destroy_workqueue(rtwdev->txq_wq);
2852         mutex_destroy(&rtwdev->rf_mutex);
2853         mutex_destroy(&rtwdev->mutex);
2854 }
2855 EXPORT_SYMBOL(rtw89_core_deinit);
2856
2857 void rtw89_core_scan_start(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif,
2858                            const u8 *mac_addr, bool hw_scan)
2859 {
2860         struct rtw89_hal *hal = &rtwdev->hal;
2861
2862         rtwdev->scanning = true;
2863         rtw89_leave_lps(rtwdev);
2864         if (hw_scan && (rtwdev->hw->conf.flags & IEEE80211_CONF_IDLE))
2865                 rtw89_leave_ips(rtwdev);
2866
2867         ether_addr_copy(rtwvif->mac_addr, mac_addr);
2868         rtw89_btc_ntfy_scan_start(rtwdev, RTW89_PHY_0, hal->current_band_type);
2869         rtw89_chip_rfk_scan(rtwdev, true);
2870         rtw89_hci_recalc_int_mit(rtwdev);
2871
2872         rtw89_fw_h2c_cam(rtwdev, rtwvif, NULL, mac_addr);
2873 }
2874
2875 void rtw89_core_scan_complete(struct rtw89_dev *rtwdev,
2876                               struct ieee80211_vif *vif, bool hw_scan)
2877 {
2878         struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv;
2879
2880         ether_addr_copy(rtwvif->mac_addr, vif->addr);
2881         rtw89_fw_h2c_cam(rtwdev, rtwvif, NULL, NULL);
2882
2883         rtw89_chip_rfk_scan(rtwdev, false);
2884         rtw89_btc_ntfy_scan_finish(rtwdev, RTW89_PHY_0);
2885
2886         rtwdev->scanning = false;
2887         rtwdev->dig.bypass_dig = true;
2888         if (hw_scan && (rtwdev->hw->conf.flags & IEEE80211_CONF_IDLE))
2889                 ieee80211_queue_work(rtwdev->hw, &rtwdev->ips_work);
2890 }
2891
2892 static void rtw89_read_chip_ver(struct rtw89_dev *rtwdev)
2893 {
2894         const struct rtw89_chip_info *chip = rtwdev->chip;
2895         u8 cv;
2896
2897         cv = rtw89_read32_mask(rtwdev, R_AX_SYS_CFG1, B_AX_CHIP_VER_MASK);
2898         if (chip->chip_id == RTL8852A && cv <= CHIP_CBV) {
2899                 if (rtw89_read32(rtwdev, R_AX_GPIO0_7_FUNC_SEL) == RTW89_R32_DEAD)
2900                         cv = CHIP_CAV;
2901                 else
2902                         cv = CHIP_CBV;
2903         }
2904
2905         rtwdev->hal.cv = cv;
2906 }
2907
2908 static void rtw89_core_setup_phycap(struct rtw89_dev *rtwdev)
2909 {
2910         rtwdev->hal.support_cckpd =
2911                 !(rtwdev->chip->chip_id == RTL8852A && rtwdev->hal.cv <= CHIP_CBV) &&
2912                 !(rtwdev->chip->chip_id == RTL8852B && rtwdev->hal.cv <= CHIP_CAV);
2913         rtwdev->hal.support_igi =
2914                 rtwdev->chip->chip_id == RTL8852A && rtwdev->hal.cv <= CHIP_CBV;
2915 }
2916
2917 static int rtw89_chip_efuse_info_setup(struct rtw89_dev *rtwdev)
2918 {
2919         int ret;
2920
2921         ret = rtw89_mac_partial_init(rtwdev);
2922         if (ret)
2923                 return ret;
2924
2925         ret = rtw89_parse_efuse_map(rtwdev);
2926         if (ret)
2927                 return ret;
2928
2929         ret = rtw89_parse_phycap_map(rtwdev);
2930         if (ret)
2931                 return ret;
2932
2933         ret = rtw89_mac_setup_phycap(rtwdev);
2934         if (ret)
2935                 return ret;
2936
2937         rtw89_core_setup_phycap(rtwdev);
2938
2939         rtw89_mac_pwr_off(rtwdev);
2940
2941         return 0;
2942 }
2943
2944 static int rtw89_chip_board_info_setup(struct rtw89_dev *rtwdev)
2945 {
2946         rtw89_chip_fem_setup(rtwdev);
2947
2948         return 0;
2949 }
2950
2951 int rtw89_chip_info_setup(struct rtw89_dev *rtwdev)
2952 {
2953         int ret;
2954
2955         rtw89_read_chip_ver(rtwdev);
2956
2957         ret = rtw89_wait_firmware_completion(rtwdev);
2958         if (ret) {
2959                 rtw89_err(rtwdev, "failed to wait firmware completion\n");
2960                 return ret;
2961         }
2962
2963         ret = rtw89_fw_recognize(rtwdev);
2964         if (ret) {
2965                 rtw89_err(rtwdev, "failed to recognize firmware\n");
2966                 return ret;
2967         }
2968
2969         ret = rtw89_chip_efuse_info_setup(rtwdev);
2970         if (ret)
2971                 return ret;
2972
2973         ret = rtw89_chip_board_info_setup(rtwdev);
2974         if (ret)
2975                 return ret;
2976
2977         return 0;
2978 }
2979 EXPORT_SYMBOL(rtw89_chip_info_setup);
2980
2981 static int rtw89_core_register_hw(struct rtw89_dev *rtwdev)
2982 {
2983         struct ieee80211_hw *hw = rtwdev->hw;
2984         struct rtw89_efuse *efuse = &rtwdev->efuse;
2985         int ret;
2986         int tx_headroom = IEEE80211_HT_CTL_LEN;
2987
2988         hw->vif_data_size = sizeof(struct rtw89_vif);
2989         hw->sta_data_size = sizeof(struct rtw89_sta);
2990         hw->txq_data_size = sizeof(struct rtw89_txq);
2991
2992         SET_IEEE80211_PERM_ADDR(hw, efuse->addr);
2993
2994         hw->extra_tx_headroom = tx_headroom;
2995         hw->queues = IEEE80211_NUM_ACS;
2996         hw->max_rx_aggregation_subframes = RTW89_MAX_RX_AGG_NUM;
2997         hw->max_tx_aggregation_subframes = RTW89_MAX_TX_AGG_NUM;
2998
2999         ieee80211_hw_set(hw, SIGNAL_DBM);
3000         ieee80211_hw_set(hw, HAS_RATE_CONTROL);
3001         ieee80211_hw_set(hw, MFP_CAPABLE);
3002         ieee80211_hw_set(hw, REPORTS_TX_ACK_STATUS);
3003         ieee80211_hw_set(hw, AMPDU_AGGREGATION);
3004         ieee80211_hw_set(hw, RX_INCLUDES_FCS);
3005         ieee80211_hw_set(hw, TX_AMSDU);
3006         ieee80211_hw_set(hw, SUPPORT_FAST_XMIT);
3007         ieee80211_hw_set(hw, SUPPORTS_AMSDU_IN_AMPDU);
3008         ieee80211_hw_set(hw, SUPPORTS_PS);
3009         ieee80211_hw_set(hw, SUPPORTS_DYNAMIC_PS);
3010         ieee80211_hw_set(hw, SINGLE_SCAN_ON_ALL_BANDS);
3011
3012         hw->wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION) |
3013                                      BIT(NL80211_IFTYPE_AP);
3014         hw->wiphy->available_antennas_tx = BIT(rtwdev->chip->rf_path_num) - 1;
3015         hw->wiphy->available_antennas_rx = BIT(rtwdev->chip->rf_path_num) - 1;
3016
3017         hw->wiphy->features |= NL80211_FEATURE_SCAN_RANDOM_MAC_ADDR;
3018
3019         hw->wiphy->max_scan_ssids = RTW89_SCANOFLD_MAX_SSID;
3020         hw->wiphy->max_scan_ie_len = RTW89_SCANOFLD_MAX_IE_LEN;
3021
3022         wiphy_ext_feature_set(hw->wiphy, NL80211_EXT_FEATURE_CAN_REPLACE_PTK0);
3023
3024         ret = rtw89_core_set_supported_band(rtwdev);
3025         if (ret) {
3026                 rtw89_err(rtwdev, "failed to set supported band\n");
3027                 return ret;
3028         }
3029
3030         hw->wiphy->reg_notifier = rtw89_regd_notifier;
3031         hw->wiphy->sar_capa = &rtw89_sar_capa;
3032
3033         ret = ieee80211_register_hw(hw);
3034         if (ret) {
3035                 rtw89_err(rtwdev, "failed to register hw\n");
3036                 goto err;
3037         }
3038
3039         ret = rtw89_regd_init(rtwdev, rtw89_regd_notifier);
3040         if (ret) {
3041                 rtw89_err(rtwdev, "failed to init regd\n");
3042                 goto err;
3043         }
3044
3045         return 0;
3046
3047 err:
3048         return ret;
3049 }
3050
3051 static void rtw89_core_unregister_hw(struct rtw89_dev *rtwdev)
3052 {
3053         struct ieee80211_hw *hw = rtwdev->hw;
3054
3055         ieee80211_unregister_hw(hw);
3056         rtw89_core_clr_supported_band(rtwdev);
3057 }
3058
3059 int rtw89_core_register(struct rtw89_dev *rtwdev)
3060 {
3061         int ret;
3062
3063         ret = rtw89_core_register_hw(rtwdev);
3064         if (ret) {
3065                 rtw89_err(rtwdev, "failed to register core hw\n");
3066                 return ret;
3067         }
3068
3069         rtw89_debugfs_init(rtwdev);
3070
3071         return 0;
3072 }
3073 EXPORT_SYMBOL(rtw89_core_register);
3074
3075 void rtw89_core_unregister(struct rtw89_dev *rtwdev)
3076 {
3077         rtw89_core_unregister_hw(rtwdev);
3078 }
3079 EXPORT_SYMBOL(rtw89_core_unregister);
3080
3081 MODULE_AUTHOR("Realtek Corporation");
3082 MODULE_DESCRIPTION("Realtek 802.11ax wireless core module");
3083 MODULE_LICENSE("Dual BSD/GPL");