1 /******************************************************************************
3 * Copyright(c) 2009-2012 Realtek Corporation.
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * The full GNU General Public License is included in this distribution in the
15 * file called LICENSE.
17 * Contact Information:
18 * wlanfae <wlanfae@realtek.com>
19 * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
20 * Hsinchu 300, Taiwan.
22 * Larry Finger <Larry.Finger@lwfinger.net>
24 *****************************************************************************/
34 #include "../rtl8723com/fw_common.h"
41 #include "../btcoexist/rtl_btc.h"
42 #include "../rtl8723com/phy_common.h"
44 #include <linux/vmalloc.h>
45 #include <linux/module.h>
47 static void rtl8723e_init_aspm_vars(struct ieee80211_hw *hw)
49 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
51 /*close ASPM for AMD defaultly */
52 rtlpci->const_amdpci_aspm = 0;
57 * 1 - Enable ASPM without Clock Req,
58 * 2 - Enable ASPM with Clock Req,
59 * 3 - Alwyas Enable ASPM with Clock Req,
60 * 4 - Always Enable ASPM without Clock Req.
61 * set defult to RTL8192CE:3 RTL8192E:2
63 rtlpci->const_pci_aspm = 3;
65 /*Setting for PCI-E device */
66 rtlpci->const_devicepci_aspm_setting = 0x03;
68 /*Setting for PCI-E bridge */
69 rtlpci->const_hostpci_aspm_setting = 0x02;
72 * In Hw/Sw Radio Off situation.
74 * 1 - From ASPM setting without low Mac Pwr,
75 * 2 - From ASPM setting with low Mac Pwr,
77 * set default to RTL8192CE:0 RTL8192SE:2
79 rtlpci->const_hwsw_rfoff_d3 = 0;
82 * This setting works for those device with
83 * backdoor ASPM setting such as EPHY setting.
84 * 0 - Not support ASPM,
86 * 2 - According to chipset.
88 rtlpci->const_support_pciaspm = 1;
91 int rtl8723e_init_sw_vars(struct ieee80211_hw *hw)
93 struct rtl_priv *rtlpriv = rtl_priv(hw);
94 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
95 struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
97 char *fw_name = "/*(DEBLOBBED)*/";
99 rtl8723e_bt_reg_init(hw);
101 rtlpriv->btcoexist.btc_ops = rtl_btc_get_ops_pointer();
103 rtlpriv->dm.dm_initialgain_enable = 1;
104 rtlpriv->dm.dm_flag = 0;
105 rtlpriv->dm.disable_framebursting = 0;
106 rtlpriv->dm.thermalvalue = 0;
107 rtlpci->transmit_config = CFENDFORM | BIT(12) | BIT(13);
109 /* compatible 5G band 88ce just 2.4G band & smsp */
110 rtlpriv->rtlhal.current_bandtype = BAND_ON_2_4G;
111 rtlpriv->rtlhal.bandset = BAND_ON_2_4G;
112 rtlpriv->rtlhal.macphymode = SINGLEMAC_SINGLEPHY;
114 rtlpci->receive_config = (RCR_APPFCS |
128 rtlpci->irq_mask[0] =
139 PHIMR_TSF_BIT32_TOGGLE |
144 rtlpci->irq_mask[1] =
149 rtlpriv->psc.inactiveps = rtlpriv->cfg->mod_params->inactiveps;
150 rtlpriv->psc.swctrl_lps = rtlpriv->cfg->mod_params->swctrl_lps;
151 rtlpriv->psc.fwctrl_lps = rtlpriv->cfg->mod_params->fwctrl_lps;
152 rtlpci->msi_support = rtlpriv->cfg->mod_params->msi_support;
153 rtlpriv->cfg->mod_params->sw_crypto =
154 rtlpriv->cfg->mod_params->sw_crypto;
155 rtlpriv->cfg->mod_params->disable_watchdog =
156 rtlpriv->cfg->mod_params->disable_watchdog;
157 if (rtlpriv->cfg->mod_params->disable_watchdog)
158 pr_info("watchdog disabled\n");
159 rtlpriv->psc.reg_fwctrl_lps = 3;
160 rtlpriv->psc.reg_max_lps_awakeintvl = 5;
161 rtl8723e_init_aspm_vars(hw);
163 if (rtlpriv->psc.reg_fwctrl_lps == 1)
164 rtlpriv->psc.fwctrl_psmode = FW_PS_MIN_MODE;
165 else if (rtlpriv->psc.reg_fwctrl_lps == 2)
166 rtlpriv->psc.fwctrl_psmode = FW_PS_MAX_MODE;
167 else if (rtlpriv->psc.reg_fwctrl_lps == 3)
168 rtlpriv->psc.fwctrl_psmode = FW_PS_DTIM_MODE;
170 /* for firmware buf */
171 rtlpriv->rtlhal.pfirmware = vzalloc(0x6000);
172 if (!rtlpriv->rtlhal.pfirmware) {
173 pr_err("Can't alloc buffer for fw.\n");
177 if (IS_81xxC_VENDOR_UMC_B_CUT(rtlhal->version))
178 fw_name = "/*(DEBLOBBED)*/";
180 rtlpriv->max_fw_size = 0x6000;
181 pr_info("Using firmware %s\n", fw_name);
182 err = reject_firmware_nowait(THIS_MODULE, 1, fw_name,
183 rtlpriv->io.dev, GFP_KERNEL, hw,
186 pr_err("Failed to request firmware!\n");
187 vfree(rtlpriv->rtlhal.pfirmware);
188 rtlpriv->rtlhal.pfirmware = NULL;
194 void rtl8723e_deinit_sw_vars(struct ieee80211_hw *hw)
196 struct rtl_priv *rtlpriv = rtl_priv(hw);
198 if (rtlpriv->rtlhal.pfirmware) {
199 vfree(rtlpriv->rtlhal.pfirmware);
200 rtlpriv->rtlhal.pfirmware = NULL;
204 /* get bt coexist status */
205 bool rtl8723e_get_btc_status(void)
210 static bool is_fw_header(struct rtlwifi_firmware_header *hdr)
212 return (le16_to_cpu(hdr->signature) & 0xfff0) == 0x2300;
215 static struct rtl_hal_ops rtl8723e_hal_ops = {
216 .init_sw_vars = rtl8723e_init_sw_vars,
217 .deinit_sw_vars = rtl8723e_deinit_sw_vars,
218 .read_eeprom_info = rtl8723e_read_eeprom_info,
219 .interrupt_recognized = rtl8723e_interrupt_recognized,
220 .hw_init = rtl8723e_hw_init,
221 .hw_disable = rtl8723e_card_disable,
222 .hw_suspend = rtl8723e_suspend,
223 .hw_resume = rtl8723e_resume,
224 .enable_interrupt = rtl8723e_enable_interrupt,
225 .disable_interrupt = rtl8723e_disable_interrupt,
226 .set_network_type = rtl8723e_set_network_type,
227 .set_chk_bssid = rtl8723e_set_check_bssid,
228 .set_qos = rtl8723e_set_qos,
229 .set_bcn_reg = rtl8723e_set_beacon_related_registers,
230 .set_bcn_intv = rtl8723e_set_beacon_interval,
231 .update_interrupt_mask = rtl8723e_update_interrupt_mask,
232 .get_hw_reg = rtl8723e_get_hw_reg,
233 .set_hw_reg = rtl8723e_set_hw_reg,
234 .update_rate_tbl = rtl8723e_update_hal_rate_tbl,
235 .fill_tx_desc = rtl8723e_tx_fill_desc,
236 .fill_tx_cmddesc = rtl8723e_tx_fill_cmddesc,
237 .query_rx_desc = rtl8723e_rx_query_desc,
238 .set_channel_access = rtl8723e_update_channel_access_setting,
239 .radio_onoff_checking = rtl8723e_gpio_radio_on_off_checking,
240 .set_bw_mode = rtl8723e_phy_set_bw_mode,
241 .switch_channel = rtl8723e_phy_sw_chnl,
242 .dm_watchdog = rtl8723e_dm_watchdog,
243 .scan_operation_backup = rtl8723e_phy_scan_operation_backup,
244 .set_rf_power_state = rtl8723e_phy_set_rf_power_state,
245 .led_control = rtl8723e_led_control,
246 .set_desc = rtl8723e_set_desc,
247 .get_desc = rtl8723e_get_desc,
248 .is_tx_desc_closed = rtl8723e_is_tx_desc_closed,
249 .tx_polling = rtl8723e_tx_polling,
250 .enable_hw_sec = rtl8723e_enable_hw_security_config,
251 .set_key = rtl8723e_set_key,
252 .init_sw_leds = rtl8723e_init_sw_leds,
253 .get_bbreg = rtl8723_phy_query_bb_reg,
254 .set_bbreg = rtl8723_phy_set_bb_reg,
255 .get_rfreg = rtl8723e_phy_query_rf_reg,
256 .set_rfreg = rtl8723e_phy_set_rf_reg,
257 .c2h_command_handle = rtl_8723e_c2h_command_handle,
258 .bt_wifi_media_status_notify = rtl_8723e_bt_wifi_media_status_notify,
259 .bt_coex_off_before_lps =
260 rtl8723e_dm_bt_turn_off_bt_coexist_before_enter_lps,
261 .get_btc_status = rtl8723e_get_btc_status,
262 .rx_command_packet = rtl8723e_rx_command_packet,
263 .is_fw_header = is_fw_header,
266 static struct rtl_mod_params rtl8723e_mod_params = {
273 .msi_support = false,
274 .disable_watchdog = false,
277 static const struct rtl_hal_cfg rtl8723e_hal_cfg = {
279 .write_readback = true,
280 .name = "rtl8723e_pci",
281 .ops = &rtl8723e_hal_ops,
282 .mod_params = &rtl8723e_mod_params,
283 .maps[SYS_ISO_CTRL] = REG_SYS_ISO_CTRL,
284 .maps[SYS_FUNC_EN] = REG_SYS_FUNC_EN,
285 .maps[SYS_CLK] = REG_SYS_CLKR,
286 .maps[MAC_RCR_AM] = AM,
287 .maps[MAC_RCR_AB] = AB,
288 .maps[MAC_RCR_ACRC32] = ACRC32,
289 .maps[MAC_RCR_ACF] = ACF,
290 .maps[MAC_RCR_AAP] = AAP,
291 .maps[MAC_HIMR] = REG_HIMR,
292 .maps[MAC_HIMRE] = REG_HIMRE,
293 .maps[EFUSE_TEST] = REG_EFUSE_TEST,
294 .maps[EFUSE_CTRL] = REG_EFUSE_CTRL,
295 .maps[EFUSE_CLK] = 0,
296 .maps[EFUSE_CLK_CTRL] = REG_EFUSE_CTRL,
297 .maps[EFUSE_PWC_EV12V] = PWC_EV12V,
298 .maps[EFUSE_FEN_ELDR] = FEN_ELDR,
299 .maps[EFUSE_LOADER_CLK_EN] = LOADER_CLK_EN,
300 .maps[EFUSE_ANA8M] = ANA8M,
301 .maps[EFUSE_HWSET_MAX_SIZE] = HWSET_MAX_SIZE,
302 .maps[EFUSE_MAX_SECTION_MAP] = EFUSE_MAX_SECTION,
303 .maps[EFUSE_REAL_CONTENT_SIZE] = EFUSE_REAL_CONTENT_LEN,
304 .maps[EFUSE_OOB_PROTECT_BYTES_LEN] = EFUSE_OOB_PROTECT_BYTES,
306 .maps[RWCAM] = REG_CAMCMD,
307 .maps[WCAMI] = REG_CAMWRITE,
308 .maps[RCAMO] = REG_CAMREAD,
309 .maps[CAMDBG] = REG_CAMDBG,
310 .maps[SECR] = REG_SECCFG,
311 .maps[SEC_CAM_NONE] = CAM_NONE,
312 .maps[SEC_CAM_WEP40] = CAM_WEP40,
313 .maps[SEC_CAM_TKIP] = CAM_TKIP,
314 .maps[SEC_CAM_AES] = CAM_AES,
315 .maps[SEC_CAM_WEP104] = CAM_WEP104,
317 .maps[RTL_IMR_BCNDMAINT6] = IMR_BCNDMAINT6,
318 .maps[RTL_IMR_BCNDMAINT5] = IMR_BCNDMAINT5,
319 .maps[RTL_IMR_BCNDMAINT4] = IMR_BCNDMAINT4,
320 .maps[RTL_IMR_BCNDMAINT3] = IMR_BCNDMAINT3,
321 .maps[RTL_IMR_BCNDMAINT2] = IMR_BCNDMAINT2,
322 .maps[RTL_IMR_BCNDMAINT1] = IMR_BCNDMAINT1,
323 .maps[RTL_IMR_BCNDOK8] = IMR_BCNDOK8,
324 .maps[RTL_IMR_BCNDOK7] = IMR_BCNDOK7,
325 .maps[RTL_IMR_BCNDOK6] = IMR_BCNDOK6,
326 .maps[RTL_IMR_BCNDOK5] = IMR_BCNDOK5,
327 .maps[RTL_IMR_BCNDOK4] = IMR_BCNDOK4,
328 .maps[RTL_IMR_BCNDOK3] = IMR_BCNDOK3,
329 .maps[RTL_IMR_BCNDOK2] = IMR_BCNDOK2,
330 .maps[RTL_IMR_BCNDOK1] = IMR_BCNDOK1,
331 .maps[RTL_IMR_TIMEOUT2] = IMR_TIMEOUT2,
332 .maps[RTL_IMR_TIMEOUT1] = IMR_TIMEOUT1,
334 .maps[RTL_IMR_TXFOVW] = PHIMR_TXFOVW,
335 .maps[RTL_IMR_PSTIMEOUT] = PHIMR_PSTIMEOUT,
336 .maps[RTL_IMR_BCNINT] = PHIMR_BCNDMAINT0,
337 .maps[RTL_IMR_RXFOVW] = PHIMR_RXFOVW,
338 .maps[RTL_IMR_RDU] = PHIMR_RDU,
339 .maps[RTL_IMR_ATIMEND] = PHIMR_ATIMEND_E,
340 .maps[RTL_IMR_BDOK] = PHIMR_BCNDOK0,
341 .maps[RTL_IMR_MGNTDOK] = PHIMR_MGNTDOK,
342 .maps[RTL_IMR_TBDER] = PHIMR_TXBCNERR,
343 .maps[RTL_IMR_HIGHDOK] = PHIMR_HIGHDOK,
344 .maps[RTL_IMR_TBDOK] = PHIMR_TXBCNOK,
345 .maps[RTL_IMR_BKDOK] = PHIMR_BKDOK,
346 .maps[RTL_IMR_BEDOK] = PHIMR_BEDOK,
347 .maps[RTL_IMR_VIDOK] = PHIMR_VIDOK,
348 .maps[RTL_IMR_VODOK] = PHIMR_VODOK,
349 .maps[RTL_IMR_ROK] = PHIMR_ROK,
350 .maps[RTL_IBSS_INT_MASKS] =
351 (PHIMR_BCNDMAINT0 | PHIMR_TXBCNOK | PHIMR_TXBCNERR),
352 .maps[RTL_IMR_C2HCMD] = PHIMR_C2HCMD,
355 .maps[RTL_RC_CCK_RATE1M] = DESC92C_RATE1M,
356 .maps[RTL_RC_CCK_RATE2M] = DESC92C_RATE2M,
357 .maps[RTL_RC_CCK_RATE5_5M] = DESC92C_RATE5_5M,
358 .maps[RTL_RC_CCK_RATE11M] = DESC92C_RATE11M,
359 .maps[RTL_RC_OFDM_RATE6M] = DESC92C_RATE6M,
360 .maps[RTL_RC_OFDM_RATE9M] = DESC92C_RATE9M,
361 .maps[RTL_RC_OFDM_RATE12M] = DESC92C_RATE12M,
362 .maps[RTL_RC_OFDM_RATE18M] = DESC92C_RATE18M,
363 .maps[RTL_RC_OFDM_RATE24M] = DESC92C_RATE24M,
364 .maps[RTL_RC_OFDM_RATE36M] = DESC92C_RATE36M,
365 .maps[RTL_RC_OFDM_RATE48M] = DESC92C_RATE48M,
366 .maps[RTL_RC_OFDM_RATE54M] = DESC92C_RATE54M,
368 .maps[RTL_RC_HT_RATEMCS7] = DESC92C_RATEMCS7,
369 .maps[RTL_RC_HT_RATEMCS15] = DESC92C_RATEMCS15,
372 static const struct pci_device_id rtl8723e_pci_ids[] = {
373 {RTL_PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0x8723, rtl8723e_hal_cfg)},
377 MODULE_DEVICE_TABLE(pci, rtl8723e_pci_ids);
379 MODULE_AUTHOR("lizhaoming <chaoming_li@realsil.com.cn>");
380 MODULE_AUTHOR("Realtek WlanFAE <wlanfae@realtek.com>");
381 MODULE_LICENSE("GPL");
382 MODULE_DESCRIPTION("Realtek 8723E 802.11n PCI wireless");
385 module_param_named(swenc, rtl8723e_mod_params.sw_crypto, bool, 0444);
386 module_param_named(debug_level, rtl8723e_mod_params.debug_level, int, 0644);
387 module_param_named(debug_mask, rtl8723e_mod_params.debug_mask, ullong, 0644);
388 module_param_named(ips, rtl8723e_mod_params.inactiveps, bool, 0444);
389 module_param_named(swlps, rtl8723e_mod_params.swctrl_lps, bool, 0444);
390 module_param_named(fwlps, rtl8723e_mod_params.fwctrl_lps, bool, 0444);
391 module_param_named(msi, rtl8723e_mod_params.msi_support, bool, 0444);
392 module_param_named(disable_watchdog, rtl8723e_mod_params.disable_watchdog,
394 MODULE_PARM_DESC(swenc, "Set to 1 for software crypto (default 0)\n");
395 MODULE_PARM_DESC(ips, "Set to 0 to not use link power save (default 1)\n");
396 MODULE_PARM_DESC(swlps, "Set to 1 to use SW control power save (default 0)\n");
397 MODULE_PARM_DESC(fwlps, "Set to 1 to use FW control power save (default 1)\n");
398 MODULE_PARM_DESC(msi, "Set to 1 to use MSI interrupts mode (default 0)\n");
399 MODULE_PARM_DESC(debug_level, "Set debug level (0-5) (default 0)");
400 MODULE_PARM_DESC(debug_mask, "Set debug mask (default 0)");
401 MODULE_PARM_DESC(disable_watchdog, "Set to 1 to disable the watchdog (default 0)\n");
403 static SIMPLE_DEV_PM_OPS(rtlwifi_pm_ops, rtl_pci_suspend, rtl_pci_resume);
405 static struct pci_driver rtl8723e_driver = {
406 .name = KBUILD_MODNAME,
407 .id_table = rtl8723e_pci_ids,
408 .probe = rtl_pci_probe,
409 .remove = rtl_pci_disconnect,
410 .driver.pm = &rtlwifi_pm_ops,
413 module_pci_driver(rtl8723e_driver);