drivers/net/wireless/realtek/rtlwifi/pci.c

   1 /******************************************************************************
   2  *
   3  * Copyright(c) 2009-2012  Realtek Corporation.
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms of version 2 of the GNU General Public License as
   7  * published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  12  * more details.
  13  *
  14  * You should have received a copy of the GNU General Public License along with
  15  * this program; if not, write to the Free Software Foundation, Inc.,
  16  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  17  *
  18  * The full GNU General Public License is included in this distribution in the
  19  * file called LICENSE.
  20  *
  21  * Contact Information:
  22  * wlanfae <wlanfae@realtek.com>
  23  * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
  24  * Hsinchu 300, Taiwan.
  25  *
  26  * Larry Finger <Larry.Finger@lwfinger.net>
  27  *
  28  *****************************************************************************/
  29
  30 #include "wifi.h"
  31 #include "core.h"
  32 #include "pci.h"
  33 #include "base.h"
  34 #include "ps.h"
  35 #include "efuse.h"
  36 #include <linux/interrupt.h>
  37 #include <linux/export.h>
  38 #include <linux/kmemleak.h>
  39 #include <linux/module.h>
  40
  41 MODULE_AUTHOR("lizhaoming       <chaoming_li@realsil.com.cn>");
  42 MODULE_AUTHOR("Realtek WlanFAE  <wlanfae@realtek.com>");
  43 MODULE_AUTHOR("Larry Finger     <Larry.FInger@lwfinger.net>");
  44 MODULE_LICENSE("GPL");
  45 MODULE_DESCRIPTION("PCI basic driver for rtlwifi");
  46
  47 static const u16 pcibridge_vendors[PCI_BRIDGE_VENDOR_MAX] = {
  48         INTEL_VENDOR_ID,
  49         ATI_VENDOR_ID,
  50         AMD_VENDOR_ID,
  51         SIS_VENDOR_ID
  52 };
  53
  54 static const u8 ac_to_hwq[] = {
  55         VO_QUEUE,
  56         VI_QUEUE,
  57         BE_QUEUE,
  58         BK_QUEUE
  59 };
  60
  61 static u8 _rtl_mac_to_hwqueue(struct ieee80211_hw *hw,
  62                        struct sk_buff *skb)
  63 {
  64         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
  65         __le16 fc = rtl_get_fc(skb);
  66         u8 queue_index = skb_get_queue_mapping(skb);
  67
  68         if (unlikely(ieee80211_is_beacon(fc)))
  69                 return BEACON_QUEUE;
  70         if (ieee80211_is_mgmt(fc) || ieee80211_is_ctl(fc))
  71                 return MGNT_QUEUE;
  72         if (rtlhal->hw_type == HARDWARE_TYPE_RTL8192SE)
  73                 if (ieee80211_is_nullfunc(fc))
  74                         return HIGH_QUEUE;
  75
  76         return ac_to_hwq[queue_index];
  77 }
  78
  79 /* Update PCI dependent default settings*/
  80 static void _rtl_pci_update_default_setting(struct ieee80211_hw *hw)
  81 {
  82         struct rtl_priv *rtlpriv = rtl_priv(hw);
  83         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
  84         struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
  85         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
  86         u8 pcibridge_vendor = pcipriv->ndis_adapter.pcibridge_vendor;
  87         u8 init_aspm;
  88
  89         ppsc->reg_rfps_level = 0;
  90         ppsc->support_aspm = false;
  91
  92         /*Update PCI ASPM setting */
  93         ppsc->const_amdpci_aspm = rtlpci->const_amdpci_aspm;
  94         switch (rtlpci->const_pci_aspm) {
  95         case 0:
  96                 /*No ASPM */
  97                 break;
  98
  99         case 1:
 100                 /*ASPM dynamically enabled/disable. */
 101                 ppsc->reg_rfps_level |= RT_RF_LPS_LEVEL_ASPM;
 102                 break;
 103
 104         case 2:
 105                 /*ASPM with Clock Req dynamically enabled/disable. */
 106                 ppsc->reg_rfps_level |= (RT_RF_LPS_LEVEL_ASPM |
 107                                          RT_RF_OFF_LEVL_CLK_REQ);
 108                 break;
 109
 110         case 3:
 111                 /*
 112                  * Always enable ASPM and Clock Req
 113                  * from initialization to halt.
 114                  * */
 115                 ppsc->reg_rfps_level &= ~(RT_RF_LPS_LEVEL_ASPM);
 116                 ppsc->reg_rfps_level |= (RT_RF_PS_LEVEL_ALWAYS_ASPM |
 117                                          RT_RF_OFF_LEVL_CLK_REQ);
 118                 break;
 119
 120         case 4:
 121                 /*
 122                  * Always enable ASPM without Clock Req
 123                  * from initialization to halt.
 124                  * */
 125                 ppsc->reg_rfps_level &= ~(RT_RF_LPS_LEVEL_ASPM |
 126                                           RT_RF_OFF_LEVL_CLK_REQ);
 127                 ppsc->reg_rfps_level |= RT_RF_PS_LEVEL_ALWAYS_ASPM;
 128                 break;
 129         }
 130
 131         ppsc->reg_rfps_level |= RT_RF_OFF_LEVL_HALT_NIC;
 132
 133         /*Update Radio OFF setting */
 134         switch (rtlpci->const_hwsw_rfoff_d3) {
 135         case 1:
 136                 if (ppsc->reg_rfps_level & RT_RF_LPS_LEVEL_ASPM)
 137                         ppsc->reg_rfps_level |= RT_RF_OFF_LEVL_ASPM;
 138                 break;
 139
 140         case 2:
 141                 if (ppsc->reg_rfps_level & RT_RF_LPS_LEVEL_ASPM)
 142                         ppsc->reg_rfps_level |= RT_RF_OFF_LEVL_ASPM;
 143                 ppsc->reg_rfps_level |= RT_RF_OFF_LEVL_HALT_NIC;
 144                 break;
 145
 146         case 3:
 147                 ppsc->reg_rfps_level |= RT_RF_OFF_LEVL_PCI_D3;
 148                 break;
 149         }
 150
 151         /*Set HW definition to determine if it supports ASPM. */
 152         switch (rtlpci->const_support_pciaspm) {
 153         case 0:{
 154                         /*Not support ASPM. */
 155                         bool support_aspm = false;
 156                         ppsc->support_aspm = support_aspm;
 157                         break;
 158                 }
 159         case 1:{
 160                         /*Support ASPM. */
 161                         bool support_aspm = true;
 162                         bool support_backdoor = true;
 163                         ppsc->support_aspm = support_aspm;
 164
 165                         /*if (priv->oem_id == RT_CID_TOSHIBA &&
 166                            !priv->ndis_adapter.amd_l1_patch)
 167                            support_backdoor = false; */
 168
 169                         ppsc->support_backdoor = support_backdoor;
 170
 171                         break;
 172                 }
 173         case 2:
 174                 /*ASPM value set by chipset. */
 175                 if (pcibridge_vendor == PCI_BRIDGE_VENDOR_INTEL) {
 176                         bool support_aspm = true;
 177                         ppsc->support_aspm = support_aspm;
 178                 }
 179                 break;
 180         default:
 181                 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
 182                          "switch case %#x not processed\n",
 183                          rtlpci->const_support_pciaspm);
 184                 break;
 185         }
 186
 187         /* toshiba aspm issue, toshiba will set aspm selfly
 188          * so we should not set aspm in driver */
 189         pci_read_config_byte(rtlpci->pdev, 0x80, &init_aspm);
 190         if (rtlpriv->rtlhal.hw_type == HARDWARE_TYPE_RTL8192SE &&
 191                 init_aspm == 0x43)
 192                 ppsc->support_aspm = false;
 193 }
 194
 195 static bool _rtl_pci_platform_switch_device_pci_aspm(
 196                         struct ieee80211_hw *hw,
 197                         u8 value)
 198 {
 199         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 200         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
 201
 202         if (rtlhal->hw_type != HARDWARE_TYPE_RTL8192SE)
 203                 value |= 0x40;
 204
 205         pci_write_config_byte(rtlpci->pdev, 0x80, value);
 206
 207         return false;
 208 }
 209
 210 /*When we set 0x01 to enable clk request. Set 0x0 to disable clk req.*/
 211 static void _rtl_pci_switch_clk_req(struct ieee80211_hw *hw, u8 value)
 212 {
 213         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 214         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
 215
 216         pci_write_config_byte(rtlpci->pdev, 0x81, value);
 217
 218         if (rtlhal->hw_type == HARDWARE_TYPE_RTL8192SE)
 219                 udelay(100);
 220 }
 221
 222 /*Disable RTL8192SE ASPM & Disable Pci Bridge ASPM*/
 223 static void rtl_pci_disable_aspm(struct ieee80211_hw *hw)
 224 {
 225         struct rtl_priv *rtlpriv = rtl_priv(hw);
 226         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
 227         struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
 228         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 229         u8 pcibridge_vendor = pcipriv->ndis_adapter.pcibridge_vendor;
 230         u8 num4bytes = pcipriv->ndis_adapter.num4bytes;
 231         /*Retrieve original configuration settings. */
 232         u8 linkctrl_reg = pcipriv->ndis_adapter.linkctrl_reg;
 233         u16 pcibridge_linkctrlreg = pcipriv->ndis_adapter.
 234                                 pcibridge_linkctrlreg;
 235         u16 aspmlevel = 0;
 236         u8 tmp_u1b = 0;
 237
 238         if (!ppsc->support_aspm)
 239                 return;
 240
 241         if (pcibridge_vendor == PCI_BRIDGE_VENDOR_UNKNOWN) {
 242                 RT_TRACE(rtlpriv, COMP_POWER, DBG_TRACE,
 243                          "PCI(Bridge) UNKNOWN\n");
 244
 245                 return;
 246         }
 247
 248         if (ppsc->reg_rfps_level & RT_RF_OFF_LEVL_CLK_REQ) {
 249                 RT_CLEAR_PS_LEVEL(ppsc, RT_RF_OFF_LEVL_CLK_REQ);
 250                 _rtl_pci_switch_clk_req(hw, 0x0);
 251         }
 252
 253         /*for promising device will in L0 state after an I/O. */
 254         pci_read_config_byte(rtlpci->pdev, 0x80, &tmp_u1b);
 255
 256         /*Set corresponding value. */
 257         aspmlevel |= BIT(0) | BIT(1);
 258         linkctrl_reg &= ~aspmlevel;
 259         pcibridge_linkctrlreg &= ~(BIT(0) | BIT(1));
 260
 261         _rtl_pci_platform_switch_device_pci_aspm(hw, linkctrl_reg);
 262         udelay(50);
 263
 264         /*4 Disable Pci Bridge ASPM */
 265         pci_write_config_byte(rtlpci->pdev, (num4bytes << 2),
 266                               pcibridge_linkctrlreg);
 267
 268         udelay(50);
 269 }
 270
 271 /*
 272  *Enable RTL8192SE ASPM & Enable Pci Bridge ASPM for
 273  *power saving We should follow the sequence to enable
 274  *RTL8192SE first then enable Pci Bridge ASPM
 275  *or the system will show bluescreen.
 276  */
 277 static void rtl_pci_enable_aspm(struct ieee80211_hw *hw)
 278 {
 279         struct rtl_priv *rtlpriv = rtl_priv(hw);
 280         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
 281         struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
 282         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 283         u8 pcibridge_vendor = pcipriv->ndis_adapter.pcibridge_vendor;
 284         u8 num4bytes = pcipriv->ndis_adapter.num4bytes;
 285         u16 aspmlevel;
 286         u8 u_pcibridge_aspmsetting;
 287         u8 u_device_aspmsetting;
 288
 289         if (!ppsc->support_aspm)
 290                 return;
 291
 292         if (pcibridge_vendor == PCI_BRIDGE_VENDOR_UNKNOWN) {
 293                 RT_TRACE(rtlpriv, COMP_POWER, DBG_TRACE,
 294                          "PCI(Bridge) UNKNOWN\n");
 295                 return;
 296         }
 297
 298         /*4 Enable Pci Bridge ASPM */
 299
 300         u_pcibridge_aspmsetting =
 301             pcipriv->ndis_adapter.pcibridge_linkctrlreg |
 302             rtlpci->const_hostpci_aspm_setting;
 303
 304         if (pcibridge_vendor == PCI_BRIDGE_VENDOR_INTEL)
 305                 u_pcibridge_aspmsetting &= ~BIT(0);
 306
 307         pci_write_config_byte(rtlpci->pdev, (num4bytes << 2),
 308                               u_pcibridge_aspmsetting);
 309
 310         RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
 311                  "PlatformEnableASPM(): Write reg[%x] = %x\n",
 312                  (pcipriv->ndis_adapter.pcibridge_pciehdr_offset + 0x10),
 313                  u_pcibridge_aspmsetting);
 314
 315         udelay(50);
 316
 317         /*Get ASPM level (with/without Clock Req) */
 318         aspmlevel = rtlpci->const_devicepci_aspm_setting;
 319         u_device_aspmsetting = pcipriv->ndis_adapter.linkctrl_reg;
 320
 321         /*_rtl_pci_platform_switch_device_pci_aspm(dev,*/
 322         /*(priv->ndis_adapter.linkctrl_reg | ASPMLevel)); */
 323
 324         u_device_aspmsetting |= aspmlevel;
 325
 326         _rtl_pci_platform_switch_device_pci_aspm(hw, u_device_aspmsetting);
 327
 328         if (ppsc->reg_rfps_level & RT_RF_OFF_LEVL_CLK_REQ) {
 329                 _rtl_pci_switch_clk_req(hw, (ppsc->reg_rfps_level &
 330                                              RT_RF_OFF_LEVL_CLK_REQ) ? 1 : 0);
 331                 RT_SET_PS_LEVEL(ppsc, RT_RF_OFF_LEVL_CLK_REQ);
 332         }
 333         udelay(100);
 334 }
 335
 336 static bool rtl_pci_get_amd_l1_patch(struct ieee80211_hw *hw)
 337 {
 338         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 339
 340         bool status = false;
 341         u8 offset_e0;
 342         unsigned offset_e4;
 343
 344         pci_write_config_byte(rtlpci->pdev, 0xe0, 0xa0);
 345
 346         pci_read_config_byte(rtlpci->pdev, 0xe0, &offset_e0);
 347
 348         if (offset_e0 == 0xA0) {
 349                 pci_read_config_dword(rtlpci->pdev, 0xe4, &offset_e4);
 350                 if (offset_e4 & BIT(23))
 351                         status = true;
 352         }
 353
 354         return status;
 355 }
 356
 357 static bool rtl_pci_check_buddy_priv(struct ieee80211_hw *hw,
 358                                      struct rtl_priv **buddy_priv)
 359 {
 360         struct rtl_priv *rtlpriv = rtl_priv(hw);
 361         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
 362         bool find_buddy_priv = false;
 363         struct rtl_priv *tpriv;
 364         struct rtl_pci_priv *tpcipriv = NULL;
 365
 366         if (!list_empty(&rtlpriv->glb_var->glb_priv_list)) {
 367                 list_for_each_entry(tpriv, &rtlpriv->glb_var->glb_priv_list,
 368                                     list) {
 369                         tpcipriv = (struct rtl_pci_priv *)tpriv->priv;
 370                         RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
 371                                  "pcipriv->ndis_adapter.funcnumber %x\n",
 372                                 pcipriv->ndis_adapter.funcnumber);
 373                         RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
 374                                  "tpcipriv->ndis_adapter.funcnumber %x\n",
 375                                 tpcipriv->ndis_adapter.funcnumber);
 376
 377                         if ((pcipriv->ndis_adapter.busnumber ==
 378                              tpcipriv->ndis_adapter.busnumber) &&
 379                             (pcipriv->ndis_adapter.devnumber ==
 380                             tpcipriv->ndis_adapter.devnumber) &&
 381                             (pcipriv->ndis_adapter.funcnumber !=
 382                             tpcipriv->ndis_adapter.funcnumber)) {
 383                                 find_buddy_priv = true;
 384                                 break;
 385                         }
 386                 }
 387         }
 388
 389         RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
 390                  "find_buddy_priv %d\n", find_buddy_priv);
 391
 392         if (find_buddy_priv)
 393                 *buddy_priv = tpriv;
 394
 395         return find_buddy_priv;
 396 }
 397
 398 static void rtl_pci_get_linkcontrol_field(struct ieee80211_hw *hw)
 399 {
 400         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
 401         struct rtl_pci *rtlpci = rtl_pcidev(pcipriv);
 402         u8 capabilityoffset = pcipriv->ndis_adapter.pcibridge_pciehdr_offset;
 403         u8 linkctrl_reg;
 404         u8 num4bbytes;
 405
 406         num4bbytes = (capabilityoffset + 0x10) / 4;
 407
 408         /*Read  Link Control Register */
 409         pci_read_config_byte(rtlpci->pdev, (num4bbytes << 2), &linkctrl_reg);
 410
 411         pcipriv->ndis_adapter.pcibridge_linkctrlreg = linkctrl_reg;
 412 }
 413
 414 static void rtl_pci_parse_configuration(struct pci_dev *pdev,
 415                 struct ieee80211_hw *hw)
 416 {
 417         struct rtl_priv *rtlpriv = rtl_priv(hw);
 418         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
 419
 420         u8 tmp;
 421         u16 linkctrl_reg;
 422
 423         /*Link Control Register */
 424         pcie_capability_read_word(pdev, PCI_EXP_LNKCTL, &linkctrl_reg);
 425         pcipriv->ndis_adapter.linkctrl_reg = (u8)linkctrl_reg;
 426
 427         RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE, "Link Control Register =%x\n",
 428                  pcipriv->ndis_adapter.linkctrl_reg);
 429
 430         pci_read_config_byte(pdev, 0x98, &tmp);
 431         tmp |= BIT(4);
 432         pci_write_config_byte(pdev, 0x98, tmp);
 433
 434         tmp = 0x17;
 435         pci_write_config_byte(pdev, 0x70f, tmp);
 436 }
 437
 438 static void rtl_pci_init_aspm(struct ieee80211_hw *hw)
 439 {
 440         struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
 441
 442         _rtl_pci_update_default_setting(hw);
 443
 444         if (ppsc->reg_rfps_level & RT_RF_PS_LEVEL_ALWAYS_ASPM) {
 445                 /*Always enable ASPM & Clock Req. */
 446                 rtl_pci_enable_aspm(hw);
 447                 RT_SET_PS_LEVEL(ppsc, RT_RF_PS_LEVEL_ALWAYS_ASPM);
 448         }
 449
 450 }
 451
 452 static void _rtl_pci_io_handler_init(struct device *dev,
 453                                      struct ieee80211_hw *hw)
 454 {
 455         struct rtl_priv *rtlpriv = rtl_priv(hw);
 456
 457         rtlpriv->io.dev = dev;
 458
 459         rtlpriv->io.write8_async = pci_write8_async;
 460         rtlpriv->io.write16_async = pci_write16_async;
 461         rtlpriv->io.write32_async = pci_write32_async;
 462
 463         rtlpriv->io.read8_sync = pci_read8_sync;
 464         rtlpriv->io.read16_sync = pci_read16_sync;
 465         rtlpriv->io.read32_sync = pci_read32_sync;
 466
 467 }
 468
 469 static bool _rtl_update_earlymode_info(struct ieee80211_hw *hw,
 470                 struct sk_buff *skb, struct rtl_tcb_desc *tcb_desc, u8 tid)
 471 {
 472         struct rtl_priv *rtlpriv = rtl_priv(hw);
 473         struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
 474         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
 475         struct sk_buff *next_skb;
 476         u8 additionlen = FCS_LEN;
 477
 478         /* here open is 4, wep/tkip is 8, aes is 12*/
 479         if (info->control.hw_key)
 480                 additionlen += info->control.hw_key->icv_len;
 481
 482         /* The most skb num is 6 */
 483         tcb_desc->empkt_num = 0;
 484         spin_lock_bh(&rtlpriv->locks.waitq_lock);
 485         skb_queue_walk(&rtlpriv->mac80211.skb_waitq[tid], next_skb) {
 486                 struct ieee80211_tx_info *next_info;
 487
 488                 next_info = IEEE80211_SKB_CB(next_skb);
 489                 if (next_info->flags & IEEE80211_TX_CTL_AMPDU) {
 490                         tcb_desc->empkt_len[tcb_desc->empkt_num] =
 491                                 next_skb->len + additionlen;
 492                         tcb_desc->empkt_num++;
 493                 } else {
 494                         break;
 495                 }
 496
 497                 if (skb_queue_is_last(&rtlpriv->mac80211.skb_waitq[tid],
 498                                       next_skb))
 499                         break;
 500
 501                 if (tcb_desc->empkt_num >= rtlhal->max_earlymode_num)
 502                         break;
 503         }
 504         spin_unlock_bh(&rtlpriv->locks.waitq_lock);
 505
 506         return true;
 507 }
 508
 509 /* just for early mode now */
 510 static void _rtl_pci_tx_chk_waitq(struct ieee80211_hw *hw)
 511 {
 512         struct rtl_priv *rtlpriv = rtl_priv(hw);
 513         struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
 514         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 515         struct sk_buff *skb = NULL;
 516         struct ieee80211_tx_info *info = NULL;
 517         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
 518         int tid;
 519
 520         if (!rtlpriv->rtlhal.earlymode_enable)
 521                 return;
 522
 523         if (rtlpriv->dm.supp_phymode_switch &&
 524             (rtlpriv->easy_concurrent_ctl.switch_in_process ||
 525             (rtlpriv->buddy_priv &&
 526             rtlpriv->buddy_priv->easy_concurrent_ctl.switch_in_process)))
 527                 return;
 528         /* we juse use em for BE/BK/VI/VO */
 529         for (tid = 7; tid >= 0; tid--) {
 530                 u8 hw_queue = ac_to_hwq[rtl_tid_to_ac(tid)];
 531                 struct rtl8192_tx_ring *ring = &rtlpci->tx_ring[hw_queue];
 532                 while (!mac->act_scanning &&
 533                        rtlpriv->psc.rfpwr_state == ERFON) {
 534                         struct rtl_tcb_desc tcb_desc;
 535                         memset(&tcb_desc, 0, sizeof(struct rtl_tcb_desc));
 536
 537                         spin_lock_bh(&rtlpriv->locks.waitq_lock);
 538                         if (!skb_queue_empty(&mac->skb_waitq[tid]) &&
 539                             (ring->entries - skb_queue_len(&ring->queue) >
 540                              rtlhal->max_earlymode_num)) {
 541                                 skb = skb_dequeue(&mac->skb_waitq[tid]);
 542                         } else {
 543                                 spin_unlock_bh(&rtlpriv->locks.waitq_lock);
 544                                 break;
 545                         }
 546                         spin_unlock_bh(&rtlpriv->locks.waitq_lock);
 547
 548                         /* Some macaddr can't do early mode. like
 549                          * multicast/broadcast/no_qos data */
 550                         info = IEEE80211_SKB_CB(skb);
 551                         if (info->flags & IEEE80211_TX_CTL_AMPDU)
 552                                 _rtl_update_earlymode_info(hw, skb,
 553                                                            &tcb_desc, tid);
 554
 555                         rtlpriv->intf_ops->adapter_tx(hw, NULL, skb, &tcb_desc);
 556                 }
 557         }
 558 }
 559
 560
 561 static void _rtl_pci_tx_isr(struct ieee80211_hw *hw, int prio)
 562 {
 563         struct rtl_priv *rtlpriv = rtl_priv(hw);
 564         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 565
 566         struct rtl8192_tx_ring *ring = &rtlpci->tx_ring[prio];
 567
 568         while (skb_queue_len(&ring->queue)) {
 569                 struct sk_buff *skb;
 570                 struct ieee80211_tx_info *info;
 571                 __le16 fc;
 572                 u8 tid;
 573                 u8 *entry;
 574
 575                 if (rtlpriv->use_new_trx_flow)
 576                         entry = (u8 *)(&ring->buffer_desc[ring->idx]);
 577                 else
 578                         entry = (u8 *)(&ring->desc[ring->idx]);
 579
 580                 if (rtlpriv->cfg->ops->get_available_desc &&
 581                     rtlpriv->cfg->ops->get_available_desc(hw, prio) <= 1) {
 582                         RT_TRACE(rtlpriv, (COMP_INTR | COMP_SEND), DBG_DMESG,
 583                                  "no available desc!\n");
 584                         return;
 585                 }
 586
 587                 if (!rtlpriv->cfg->ops->is_tx_desc_closed(hw, prio, ring->idx))
 588                         return;
 589                 ring->idx = (ring->idx + 1) % ring->entries;
 590
 591                 skb = __skb_dequeue(&ring->queue);
 592                 pci_unmap_single(rtlpci->pdev,
 593                                  rtlpriv->cfg->ops->
 594                                              get_desc((u8 *)entry, true,
 595                                                       HW_DESC_TXBUFF_ADDR),
 596                                  skb->len, PCI_DMA_TODEVICE);
 597
 598                 /* remove early mode header */
 599                 if (rtlpriv->rtlhal.earlymode_enable)
 600                         skb_pull(skb, EM_HDR_LEN);
 601
 602                 RT_TRACE(rtlpriv, (COMP_INTR | COMP_SEND), DBG_TRACE,
 603                          "new ring->idx:%d, free: skb_queue_len:%d, free: seq:%x\n",
 604                          ring->idx,
 605                          skb_queue_len(&ring->queue),
 606                          *(u16 *)(skb->data + 22));
 607
 608                 if (prio == TXCMD_QUEUE) {
 609                         dev_kfree_skb(skb);
 610                         goto tx_status_ok;
 611
 612                 }
 613
 614                 /* for sw LPS, just after NULL skb send out, we can
 615                  * sure AP knows we are sleeping, we should not let
 616                  * rf sleep
 617                  */
 618                 fc = rtl_get_fc(skb);
 619                 if (ieee80211_is_nullfunc(fc)) {
 620                         if (ieee80211_has_pm(fc)) {
 621                                 rtlpriv->mac80211.offchan_delay = true;
 622                                 rtlpriv->psc.state_inap = true;
 623                         } else {
 624                                 rtlpriv->psc.state_inap = false;
 625                         }
 626                 }
 627                 if (ieee80211_is_action(fc)) {
 628                         struct ieee80211_mgmt *action_frame =
 629                                 (struct ieee80211_mgmt *)skb->data;
 630                         if (action_frame->u.action.u.ht_smps.action ==
 631                             WLAN_HT_ACTION_SMPS) {
 632                                 dev_kfree_skb(skb);
 633                                 goto tx_status_ok;
 634                         }
 635                 }
 636
 637                 /* update tid tx pkt num */
 638                 tid = rtl_get_tid(skb);
 639                 if (tid <= 7)
 640                         rtlpriv->link_info.tidtx_inperiod[tid]++;
 641
 642                 info = IEEE80211_SKB_CB(skb);
 643                 ieee80211_tx_info_clear_status(info);
 644
 645                 info->flags |= IEEE80211_TX_STAT_ACK;
 646                 /*info->status.rates[0].count = 1; */
 647
 648                 ieee80211_tx_status_irqsafe(hw, skb);
 649
 650                 if ((ring->entries - skb_queue_len(&ring->queue)) <= 4) {
 651
 652                         RT_TRACE(rtlpriv, COMP_ERR, DBG_DMESG,
 653                                  "more desc left, wake skb_queue@%d, ring->idx = %d, skb_queue_len = 0x%x\n",
 654                                  prio, ring->idx,
 655                                  skb_queue_len(&ring->queue));
 656
 657                         ieee80211_wake_queue(hw,
 658                                         skb_get_queue_mapping
 659                                         (skb));
 660                 }
 661 tx_status_ok:
 662                 skb = NULL;
 663         }
 664
 665         if (((rtlpriv->link_info.num_rx_inperiod +
 666               rtlpriv->link_info.num_tx_inperiod) > 8) ||
 667               (rtlpriv->link_info.num_rx_inperiod > 2))
 668                 rtl_lps_leave(hw);
 669 }
 670
 671 static int _rtl_pci_init_one_rxdesc(struct ieee80211_hw *hw,
 672                                     struct sk_buff *new_skb, u8 *entry,
 673                                     int rxring_idx, int desc_idx)
 674 {
 675         struct rtl_priv *rtlpriv = rtl_priv(hw);
 676         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 677         u32 bufferaddress;
 678         u8 tmp_one = 1;
 679         struct sk_buff *skb;
 680
 681         if (likely(new_skb)) {
 682                 skb = new_skb;
 683                 goto remap;
 684         }
 685         skb = dev_alloc_skb(rtlpci->rxbuffersize);
 686         if (!skb)
 687                 return 0;
 688
 689 remap:
 690         /* just set skb->cb to mapping addr for pci_unmap_single use */
 691         *((dma_addr_t *)skb->cb) =
 692                 pci_map_single(rtlpci->pdev, skb_tail_pointer(skb),
 693                                rtlpci->rxbuffersize, PCI_DMA_FROMDEVICE);
 694         bufferaddress = *((dma_addr_t *)skb->cb);
 695         if (pci_dma_mapping_error(rtlpci->pdev, bufferaddress))
 696                 return 0;
 697         rtlpci->rx_ring[rxring_idx].rx_buf[desc_idx] = skb;
 698         if (rtlpriv->use_new_trx_flow) {
 699                 rtlpriv->cfg->ops->set_desc(hw, (u8 *)entry, false,
 700                                             HW_DESC_RX_PREPARE,
 701                                             (u8 *)&bufferaddress);
 702         } else {
 703                 rtlpriv->cfg->ops->set_desc(hw, (u8 *)entry, false,
 704                                             HW_DESC_RXBUFF_ADDR,
 705                                             (u8 *)&bufferaddress);
 706                 rtlpriv->cfg->ops->set_desc(hw, (u8 *)entry, false,
 707                                             HW_DESC_RXPKT_LEN,
 708                                             (u8 *)&rtlpci->rxbuffersize);
 709                 rtlpriv->cfg->ops->set_desc(hw, (u8 *)entry, false,
 710                                             HW_DESC_RXOWN,
 711                                             (u8 *)&tmp_one);
 712         }
 713         return 1;
 714 }
 715
 716 /* inorder to receive 8K AMSDU we have set skb to
 717  * 9100bytes in init rx ring, but if this packet is
 718  * not a AMSDU, this large packet will be sent to
 719  * TCP/IP directly, this cause big packet ping fail
 720  * like: "ping -s 65507", so here we will realloc skb
 721  * based on the true size of packet, Mac80211
 722  * Probably will do it better, but does not yet.
 723  *
 724  * Some platform will fail when alloc skb sometimes.
 725  * in this condition, we will send the old skb to
 726  * mac80211 directly, this will not cause any other
 727  * issues, but only this packet will be lost by TCP/IP
 728  */
 729 static void _rtl_pci_rx_to_mac80211(struct ieee80211_hw *hw,
 730                                     struct sk_buff *skb,
 731                                     struct ieee80211_rx_status rx_status)
 732 {
 733         if (unlikely(!rtl_action_proc(hw, skb, false))) {
 734                 dev_kfree_skb_any(skb);
 735         } else {
 736                 struct sk_buff *uskb = NULL;
 737                 u8 *pdata;
 738
 739                 uskb = dev_alloc_skb(skb->len + 128);
 740                 if (likely(uskb)) {
 741                         memcpy(IEEE80211_SKB_RXCB(uskb), &rx_status,
 742                                sizeof(rx_status));
 743                         pdata = (u8 *)skb_put(uskb, skb->len);
 744                         memcpy(pdata, skb->data, skb->len);
 745                         dev_kfree_skb_any(skb);
 746                         ieee80211_rx_irqsafe(hw, uskb);
 747                 } else {
 748                         ieee80211_rx_irqsafe(hw, skb);
 749                 }
 750         }
 751 }
 752
 753 /*hsisr interrupt handler*/
 754 static void _rtl_pci_hs_interrupt(struct ieee80211_hw *hw)
 755 {
 756         struct rtl_priv *rtlpriv = rtl_priv(hw);
 757         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 758
 759         rtl_write_byte(rtlpriv, rtlpriv->cfg->maps[MAC_HSISR],
 760                        rtl_read_byte(rtlpriv, rtlpriv->cfg->maps[MAC_HSISR]) |
 761                        rtlpci->sys_irq_mask);
 762 }
 763
 764 static void _rtl_pci_rx_interrupt(struct ieee80211_hw *hw)
 765 {
 766         struct rtl_priv *rtlpriv = rtl_priv(hw);
 767         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 768         int rxring_idx = RTL_PCI_RX_MPDU_QUEUE;
 769         struct ieee80211_rx_status rx_status = { 0 };
 770         unsigned int count = rtlpci->rxringcount;
 771         u8 own;
 772         u8 tmp_one;
 773         bool unicast = false;
 774         u8 hw_queue = 0;
 775         unsigned int rx_remained_cnt;
 776         struct rtl_stats stats = {
 777                 .signal = 0,
 778                 .rate = 0,
 779         };
 780
 781         /*RX NORMAL PKT */
 782         while (count--) {
 783                 struct ieee80211_hdr *hdr;
 784                 __le16 fc;
 785                 u16 len;
 786                 /*rx buffer descriptor */
 787                 struct rtl_rx_buffer_desc *buffer_desc = NULL;
 788                 /*if use new trx flow, it means wifi info */
 789                 struct rtl_rx_desc *pdesc = NULL;
 790                 /*rx pkt */
 791                 struct sk_buff *skb = rtlpci->rx_ring[rxring_idx].rx_buf[
 792                                       rtlpci->rx_ring[rxring_idx].idx];
 793                 struct sk_buff *new_skb;
 794
 795                 if (rtlpriv->use_new_trx_flow) {
 796                         rx_remained_cnt =
 797                                 rtlpriv->cfg->ops->rx_desc_buff_remained_cnt(hw,
 798                                                                       hw_queue);
 799                         if (rx_remained_cnt == 0)
 800                                 return;
 801                         buffer_desc = &rtlpci->rx_ring[rxring_idx].buffer_desc[
 802                                 rtlpci->rx_ring[rxring_idx].idx];
 803                         pdesc = (struct rtl_rx_desc *)skb->data;
 804                 } else {        /* rx descriptor */
 805                         pdesc = &rtlpci->rx_ring[rxring_idx].desc[
 806                                 rtlpci->rx_ring[rxring_idx].idx];
 807
 808                         own = (u8)rtlpriv->cfg->ops->get_desc((u8 *)pdesc,
 809                                                               false,
 810                                                               HW_DESC_OWN);
 811                         if (own) /* wait data to be filled by hardware */
 812                                 return;
 813                 }
 814
 815                 /* Reaching this point means: data is filled already
 816                  * AAAAAAttention !!!
 817                  * We can NOT access 'skb' before 'pci_unmap_single'
 818                  */
 819                 pci_unmap_single(rtlpci->pdev, *((dma_addr_t *)skb->cb),
 820                                  rtlpci->rxbuffersize, PCI_DMA_FROMDEVICE);
 821
 822                 /* get a new skb - if fail, old one will be reused */
 823                 new_skb = dev_alloc_skb(rtlpci->rxbuffersize);
 824                 if (unlikely(!new_skb))
 825                         goto no_new;
 826                 memset(&rx_status , 0 , sizeof(rx_status));
 827                 rtlpriv->cfg->ops->query_rx_desc(hw, &stats,
 828                                                  &rx_status, (u8 *)pdesc, skb);
 829
 830                 if (rtlpriv->use_new_trx_flow)
 831                         rtlpriv->cfg->ops->rx_check_dma_ok(hw,
 832                                                            (u8 *)buffer_desc,
 833                                                            hw_queue);
 834
 835                 len = rtlpriv->cfg->ops->get_desc((u8 *)pdesc, false,
 836                                                   HW_DESC_RXPKT_LEN);
 837
 838                 if (skb->end - skb->tail > len) {
 839                         skb_put(skb, len);
 840                         if (rtlpriv->use_new_trx_flow)
 841                                 skb_reserve(skb, stats.rx_drvinfo_size +
 842                                             stats.rx_bufshift + 24);
 843                         else
 844                                 skb_reserve(skb, stats.rx_drvinfo_size +
 845                                             stats.rx_bufshift);
 846                 } else {
 847                         RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
 848                                  "skb->end - skb->tail = %d, len is %d\n",
 849                                  skb->end - skb->tail, len);
 850                         dev_kfree_skb_any(skb);
 851                         goto new_trx_end;
 852                 }
 853                 /* handle command packet here */
 854                 if (rtlpriv->cfg->ops->rx_command_packet &&
 855                     rtlpriv->cfg->ops->rx_command_packet(hw, &stats, skb)) {
 856                                 dev_kfree_skb_any(skb);
 857                                 goto new_trx_end;
 858                 }
 859
 860                 /*
 861                  * NOTICE This can not be use for mac80211,
 862                  * this is done in mac80211 code,
 863                  * if done here sec DHCP will fail
 864                  * skb_trim(skb, skb->len - 4);
 865                  */
 866
 867                 hdr = rtl_get_hdr(skb);
 868                 fc = rtl_get_fc(skb);
 869
 870                 if (!stats.crc && !stats.hwerror) {
 871                         memcpy(IEEE80211_SKB_RXCB(skb), &rx_status,
 872                                sizeof(rx_status));
 873
 874                         if (is_broadcast_ether_addr(hdr->addr1)) {
 875                                 ;/*TODO*/
 876                         } else if (is_multicast_ether_addr(hdr->addr1)) {
 877                                 ;/*TODO*/
 878                         } else {
 879                                 unicast = true;
 880                                 rtlpriv->stats.rxbytesunicast += skb->len;
 881                         }
 882                         rtl_is_special_data(hw, skb, false, true);
 883
 884                         if (ieee80211_is_data(fc)) {
 885                                 rtlpriv->cfg->ops->led_control(hw, LED_CTL_RX);
 886                                 if (unicast)
 887                                         rtlpriv->link_info.num_rx_inperiod++;
 888                         }
 889                         /* static bcn for roaming */
 890                         rtl_beacon_statistic(hw, skb);
 891                         rtl_p2p_info(hw, (void *)skb->data, skb->len);
 892                         /* for sw lps */
 893                         rtl_swlps_beacon(hw, (void *)skb->data, skb->len);
 894                         rtl_recognize_peer(hw, (void *)skb->data, skb->len);
 895                         if ((rtlpriv->mac80211.opmode == NL80211_IFTYPE_AP) &&
 896                             (rtlpriv->rtlhal.current_bandtype ==
 897                              BAND_ON_2_4G) &&
 898                             (ieee80211_is_beacon(fc) ||
 899                              ieee80211_is_probe_resp(fc))) {
 900                                 dev_kfree_skb_any(skb);
 901                         } else {
 902                                 _rtl_pci_rx_to_mac80211(hw, skb, rx_status);
 903                         }
 904                 } else {
 905                         dev_kfree_skb_any(skb);
 906                 }
 907 new_trx_end:
 908                 if (rtlpriv->use_new_trx_flow) {
 909                         rtlpci->rx_ring[hw_queue].next_rx_rp += 1;
 910                         rtlpci->rx_ring[hw_queue].next_rx_rp %=
 911                                         RTL_PCI_MAX_RX_COUNT;
 912
 913                         rx_remained_cnt--;
 914                         rtl_write_word(rtlpriv, 0x3B4,
 915                                        rtlpci->rx_ring[hw_queue].next_rx_rp);
 916                 }
 917                 if (((rtlpriv->link_info.num_rx_inperiod +
 918                       rtlpriv->link_info.num_tx_inperiod) > 8) ||
 919                       (rtlpriv->link_info.num_rx_inperiod > 2))
 920                         rtl_lps_leave(hw);
 921                 skb = new_skb;
 922 no_new:
 923                 if (rtlpriv->use_new_trx_flow) {
 924                         _rtl_pci_init_one_rxdesc(hw, skb, (u8 *)buffer_desc,
 925                                                  rxring_idx,
 926                                                  rtlpci->rx_ring[rxring_idx].idx);
 927                 } else {
 928                         _rtl_pci_init_one_rxdesc(hw, skb, (u8 *)pdesc,
 929                                                  rxring_idx,
 930                                                  rtlpci->rx_ring[rxring_idx].idx);
 931                         if (rtlpci->rx_ring[rxring_idx].idx ==
 932                             rtlpci->rxringcount - 1)
 933                                 rtlpriv->cfg->ops->set_desc(hw, (u8 *)pdesc,
 934                                                             false,
 935                                                             HW_DESC_RXERO,
 936                                                             (u8 *)&tmp_one);
 937                 }
 938                 rtlpci->rx_ring[rxring_idx].idx =
 939                                 (rtlpci->rx_ring[rxring_idx].idx + 1) %
 940                                 rtlpci->rxringcount;
 941         }
 942 }
 943
 944 static irqreturn_t _rtl_pci_interrupt(int irq, void *dev_id)
 945 {
 946         struct ieee80211_hw *hw = dev_id;
 947         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 948         struct rtl_priv *rtlpriv = rtl_priv(hw);
 949         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
 950         unsigned long flags;
 951         u32 inta = 0;
 952         u32 intb = 0;
 953         irqreturn_t ret = IRQ_HANDLED;
 954
 955         if (rtlpci->irq_enabled == 0)
 956                 return ret;
 957
 958         spin_lock_irqsave(&rtlpriv->locks.irq_th_lock , flags);
 959         rtlpriv->cfg->ops->disable_interrupt(hw);
 960
 961         /*read ISR: 4/8bytes */
 962         rtlpriv->cfg->ops->interrupt_recognized(hw, &inta, &intb);
 963
 964         /*Shared IRQ or HW disappared */
 965         if (!inta || inta == 0xffff)
 966                 goto done;
 967
 968         /*<1> beacon related */
 969         if (inta & rtlpriv->cfg->maps[RTL_IMR_TBDOK]) {
 970                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
 971                          "beacon ok interrupt!\n");
 972         }
 973
 974         if (unlikely(inta & rtlpriv->cfg->maps[RTL_IMR_TBDER])) {
 975                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
 976                          "beacon err interrupt!\n");
 977         }
 978
 979         if (inta & rtlpriv->cfg->maps[RTL_IMR_BDOK]) {
 980                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE, "beacon interrupt!\n");
 981         }
 982
 983         if (inta & rtlpriv->cfg->maps[RTL_IMR_BCNINT]) {
 984                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
 985                          "prepare beacon for interrupt!\n");
 986                 tasklet_schedule(&rtlpriv->works.irq_prepare_bcn_tasklet);
 987         }
 988
 989         /*<2> Tx related */
 990         if (unlikely(intb & rtlpriv->cfg->maps[RTL_IMR_TXFOVW]))
 991                 RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING, "IMR_TXFOVW!\n");
 992
 993         if (inta & rtlpriv->cfg->maps[RTL_IMR_MGNTDOK]) {
 994                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
 995                          "Manage ok interrupt!\n");
 996                 _rtl_pci_tx_isr(hw, MGNT_QUEUE);
 997         }
 998
 999         if (inta & rtlpriv->cfg->maps[RTL_IMR_HIGHDOK]) {
1000                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
1001                          "HIGH_QUEUE ok interrupt!\n");
1002                 _rtl_pci_tx_isr(hw, HIGH_QUEUE);
1003         }
1004
1005         if (inta & rtlpriv->cfg->maps[RTL_IMR_BKDOK]) {
1006                 rtlpriv->link_info.num_tx_inperiod++;
1007
1008                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
1009                          "BK Tx OK interrupt!\n");
1010                 _rtl_pci_tx_isr(hw, BK_QUEUE);
1011         }
1012
1013         if (inta & rtlpriv->cfg->maps[RTL_IMR_BEDOK]) {
1014                 rtlpriv->link_info.num_tx_inperiod++;
1015
1016                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
1017                          "BE TX OK interrupt!\n");
1018                 _rtl_pci_tx_isr(hw, BE_QUEUE);
1019         }
1020
1021         if (inta & rtlpriv->cfg->maps[RTL_IMR_VIDOK]) {
1022                 rtlpriv->link_info.num_tx_inperiod++;
1023
1024                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
1025                          "VI TX OK interrupt!\n");
1026                 _rtl_pci_tx_isr(hw, VI_QUEUE);
1027         }
1028
1029         if (inta & rtlpriv->cfg->maps[RTL_IMR_VODOK]) {
1030                 rtlpriv->link_info.num_tx_inperiod++;
1031
1032                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
1033                          "Vo TX OK interrupt!\n");
1034                 _rtl_pci_tx_isr(hw, VO_QUEUE);
1035         }
1036
1037         if (rtlhal->hw_type == HARDWARE_TYPE_RTL8192SE) {
1038                 if (inta & rtlpriv->cfg->maps[RTL_IMR_COMDOK]) {
1039                         rtlpriv->link_info.num_tx_inperiod++;
1040
1041                         RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
1042                                  "CMD TX OK interrupt!\n");
1043                         _rtl_pci_tx_isr(hw, TXCMD_QUEUE);
1044                 }
1045         }
1046
1047         /*<3> Rx related */
1048         if (inta & rtlpriv->cfg->maps[RTL_IMR_ROK]) {
1049                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE, "Rx ok interrupt!\n");
1050                 _rtl_pci_rx_interrupt(hw);
1051         }
1052
1053         if (unlikely(inta & rtlpriv->cfg->maps[RTL_IMR_RDU])) {
1054                 RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
1055                          "rx descriptor unavailable!\n");
1056                 _rtl_pci_rx_interrupt(hw);
1057         }
1058
1059         if (unlikely(intb & rtlpriv->cfg->maps[RTL_IMR_RXFOVW])) {
1060                 RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING, "rx overflow !\n");
1061                 _rtl_pci_rx_interrupt(hw);
1062         }
1063
1064         /*<4> fw related*/
1065         if (rtlhal->hw_type == HARDWARE_TYPE_RTL8723AE) {
1066                 if (inta & rtlpriv->cfg->maps[RTL_IMR_C2HCMD]) {
1067                         RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
1068                                  "firmware interrupt!\n");
1069                         queue_delayed_work(rtlpriv->works.rtl_wq,
1070                                            &rtlpriv->works.fwevt_wq, 0);
1071                 }
1072         }
1073
1074         /*<5> hsisr related*/
1075         /* Only 8188EE & 8723BE Supported.
1076          * If Other ICs Come in, System will corrupt,
1077          * because maps[RTL_IMR_HSISR_IND] & maps[MAC_HSISR]
1078          * are not initialized
1079          */
1080         if (rtlhal->hw_type == HARDWARE_TYPE_RTL8188EE ||
1081             rtlhal->hw_type == HARDWARE_TYPE_RTL8723BE) {
1082                 if (unlikely(inta & rtlpriv->cfg->maps[RTL_IMR_HSISR_IND])) {
1083                         RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
1084                                  "hsisr interrupt!\n");
1085                         _rtl_pci_hs_interrupt(hw);
1086                 }
1087         }
1088
1089         if (rtlpriv->rtlhal.earlymode_enable)
1090                 tasklet_schedule(&rtlpriv->works.irq_tasklet);
1091
1092 done:
1093         rtlpriv->cfg->ops->enable_interrupt(hw);
1094         spin_unlock_irqrestore(&rtlpriv->locks.irq_th_lock, flags);
1095         return ret;
1096 }
1097
1098 static void _rtl_pci_irq_tasklet(unsigned long data)
1099 {
1100         struct ieee80211_hw *hw = (struct ieee80211_hw *)data;
1101         _rtl_pci_tx_chk_waitq(hw);
1102 }
1103
1104 static void _rtl_pci_prepare_bcn_tasklet(unsigned long data)
1105 {
1106         struct ieee80211_hw *hw = (struct ieee80211_hw *)data;
1107         struct rtl_priv *rtlpriv = rtl_priv(hw);
1108         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1109         struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
1110         struct rtl8192_tx_ring *ring = NULL;
1111         struct ieee80211_hdr *hdr = NULL;
1112         struct ieee80211_tx_info *info = NULL;
1113         struct sk_buff *pskb = NULL;
1114         struct rtl_tx_desc *pdesc = NULL;
1115         struct rtl_tcb_desc tcb_desc;
1116         /*This is for new trx flow*/
1117         struct rtl_tx_buffer_desc *pbuffer_desc = NULL;
1118         u8 temp_one = 1;
1119         u8 *entry;
1120
1121         memset(&tcb_desc, 0, sizeof(struct rtl_tcb_desc));
1122         ring = &rtlpci->tx_ring[BEACON_QUEUE];
1123         pskb = __skb_dequeue(&ring->queue);
1124         if (rtlpriv->use_new_trx_flow)
1125                 entry = (u8 *)(&ring->buffer_desc[ring->idx]);
1126         else
1127                 entry = (u8 *)(&ring->desc[ring->idx]);
1128         if (pskb) {
1129                 pci_unmap_single(rtlpci->pdev,
1130                                  rtlpriv->cfg->ops->get_desc(
1131                                  (u8 *)entry, true, HW_DESC_TXBUFF_ADDR),
1132                                  pskb->len, PCI_DMA_TODEVICE);
1133                 kfree_skb(pskb);
1134         }
1135
1136         /*NB: the beacon data buffer must be 32-bit aligned. */
1137         pskb = ieee80211_beacon_get(hw, mac->vif);
1138         if (pskb == NULL)
1139                 return;
1140         hdr = rtl_get_hdr(pskb);
1141         info = IEEE80211_SKB_CB(pskb);
1142         pdesc = &ring->desc[0];
1143         if (rtlpriv->use_new_trx_flow)
1144                 pbuffer_desc = &ring->buffer_desc[0];
1145
1146         rtlpriv->cfg->ops->fill_tx_desc(hw, hdr, (u8 *)pdesc,
1147                                         (u8 *)pbuffer_desc, info, NULL, pskb,
1148                                         BEACON_QUEUE, &tcb_desc);
1149
1150         __skb_queue_tail(&ring->queue, pskb);
1151
1152         if (rtlpriv->use_new_trx_flow) {
1153                 temp_one = 4;
1154                 rtlpriv->cfg->ops->set_desc(hw, (u8 *)pbuffer_desc, true,
1155                                             HW_DESC_OWN, (u8 *)&temp_one);
1156         } else {
1157                 rtlpriv->cfg->ops->set_desc(hw, (u8 *)pdesc, true, HW_DESC_OWN,
1158                                             &temp_one);
1159         }
1160         return;
1161 }
1162
1163 static void _rtl_pci_init_trx_var(struct ieee80211_hw *hw)
1164 {
1165         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1166         struct rtl_priv *rtlpriv = rtl_priv(hw);
1167         struct rtl_hal *rtlhal = rtl_hal(rtlpriv);
1168         u8 i;
1169         u16 desc_num;
1170
1171         if (rtlhal->hw_type == HARDWARE_TYPE_RTL8192EE)
1172                 desc_num = TX_DESC_NUM_92E;
1173         else
1174                 desc_num = RT_TXDESC_NUM;
1175
1176         for (i = 0; i < RTL_PCI_MAX_TX_QUEUE_COUNT; i++)
1177                 rtlpci->txringcount[i] = desc_num;
1178
1179         /*
1180          *we just alloc 2 desc for beacon queue,
1181          *because we just need first desc in hw beacon.
1182          */
1183         rtlpci->txringcount[BEACON_QUEUE] = 2;
1184
1185         /*BE queue need more descriptor for performance
1186          *consideration or, No more tx desc will happen,
1187          *and may cause mac80211 mem leakage.
1188          */
1189         if (!rtl_priv(hw)->use_new_trx_flow)
1190                 rtlpci->txringcount[BE_QUEUE] = RT_TXDESC_NUM_BE_QUEUE;
1191
1192         rtlpci->rxbuffersize = 9100;    /*2048/1024; */
1193         rtlpci->rxringcount = RTL_PCI_MAX_RX_COUNT;     /*64; */
1194 }
1195
1196 static void _rtl_pci_init_struct(struct ieee80211_hw *hw,
1197                 struct pci_dev *pdev)
1198 {
1199         struct rtl_priv *rtlpriv = rtl_priv(hw);
1200         struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
1201         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1202         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
1203
1204         rtlpci->up_first_time = true;
1205         rtlpci->being_init_adapter = false;
1206
1207         rtlhal->hw = hw;
1208         rtlpci->pdev = pdev;
1209
1210         /*Tx/Rx related var */
1211         _rtl_pci_init_trx_var(hw);
1212
1213         /*IBSS*/
1214         mac->beacon_interval = 100;
1215
1216         /*AMPDU*/
1217         mac->min_space_cfg = 0;
1218         mac->max_mss_density = 0;
1219         /*set sane AMPDU defaults */
1220         mac->current_ampdu_density = 7;
1221         mac->current_ampdu_factor = 3;
1222
1223         /*QOS*/
1224         rtlpci->acm_method = EACMWAY2_SW;
1225
1226         /*task */
1227         tasklet_init(&rtlpriv->works.irq_tasklet,
1228                      _rtl_pci_irq_tasklet,
1229                      (unsigned long)hw);
1230         tasklet_init(&rtlpriv->works.irq_prepare_bcn_tasklet,
1231                      _rtl_pci_prepare_bcn_tasklet,
1232                      (unsigned long)hw);
1233         INIT_WORK(&rtlpriv->works.lps_change_work,
1234                   rtl_lps_change_work_callback);
1235 }
1236
1237 static int _rtl_pci_init_tx_ring(struct ieee80211_hw *hw,
1238                                  unsigned int prio, unsigned int entries)
1239 {
1240         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1241         struct rtl_priv *rtlpriv = rtl_priv(hw);
1242         struct rtl_tx_buffer_desc *buffer_desc;
1243         struct rtl_tx_desc *desc;
1244         dma_addr_t buffer_desc_dma, desc_dma;
1245         u32 nextdescaddress;
1246         int i;
1247
1248         /* alloc tx buffer desc for new trx flow*/
1249         if (rtlpriv->use_new_trx_flow) {
1250                 buffer_desc =
1251                    pci_zalloc_consistent(rtlpci->pdev,
1252                                          sizeof(*buffer_desc) * entries,
1253                                          &buffer_desc_dma);
1254
1255                 if (!buffer_desc || (unsigned long)buffer_desc & 0xFF) {
1256                         RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
1257                                  "Cannot allocate TX ring (prio = %d)\n",
1258                                  prio);
1259                         return -ENOMEM;
1260                 }
1261
1262                 rtlpci->tx_ring[prio].buffer_desc = buffer_desc;
1263                 rtlpci->tx_ring[prio].buffer_desc_dma = buffer_desc_dma;
1264
1265                 rtlpci->tx_ring[prio].cur_tx_rp = 0;
1266                 rtlpci->tx_ring[prio].cur_tx_wp = 0;
1267                 rtlpci->tx_ring[prio].avl_desc = entries;
1268         }
1269
1270         /* alloc dma for this ring */
1271         desc = pci_zalloc_consistent(rtlpci->pdev,
1272                                      sizeof(*desc) * entries, &desc_dma);
1273
1274         if (!desc || (unsigned long)desc & 0xFF) {
1275                 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
1276                          "Cannot allocate TX ring (prio = %d)\n", prio);
1277                 return -ENOMEM;
1278         }
1279
1280         rtlpci->tx_ring[prio].desc = desc;
1281         rtlpci->tx_ring[prio].dma = desc_dma;
1282
1283         rtlpci->tx_ring[prio].idx = 0;
1284         rtlpci->tx_ring[prio].entries = entries;
1285         skb_queue_head_init(&rtlpci->tx_ring[prio].queue);
1286
1287         RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, "queue:%d, ring_addr:%p\n",
1288                  prio, desc);
1289
1290         /* init every desc in this ring */
1291         if (!rtlpriv->use_new_trx_flow) {
1292                 for (i = 0; i < entries; i++) {
1293                         nextdescaddress = (u32)desc_dma +
1294                                           ((i + 1) % entries) *
1295                                           sizeof(*desc);
1296
1297                         rtlpriv->cfg->ops->set_desc(hw, (u8 *)&desc[i],
1298                                                     true,
1299                                                     HW_DESC_TX_NEXTDESC_ADDR,
1300                                                     (u8 *)&nextdescaddress);
1301                 }
1302         }
1303         return 0;
1304 }
1305
1306 static int _rtl_pci_init_rx_ring(struct ieee80211_hw *hw, int rxring_idx)
1307 {
1308         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1309         struct rtl_priv *rtlpriv = rtl_priv(hw);
1310         int i;
1311
1312         if (rtlpriv->use_new_trx_flow) {
1313                 struct rtl_rx_buffer_desc *entry = NULL;
1314                 /* alloc dma for this ring */
1315                 rtlpci->rx_ring[rxring_idx].buffer_desc =
1316                     pci_zalloc_consistent(rtlpci->pdev,
1317                                           sizeof(*rtlpci->rx_ring[rxring_idx].
1318                                                  buffer_desc) *
1319                                                  rtlpci->rxringcount,
1320                                           &rtlpci->rx_ring[rxring_idx].dma);
1321                 if (!rtlpci->rx_ring[rxring_idx].buffer_desc ||
1322                     (ulong)rtlpci->rx_ring[rxring_idx].buffer_desc & 0xFF) {
1323                         RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
1324                                  "Cannot allocate RX ring\n");
1325                         return -ENOMEM;
1326                 }
1327
1328                 /* init every desc in this ring */
1329                 rtlpci->rx_ring[rxring_idx].idx = 0;
1330                 for (i = 0; i < rtlpci->rxringcount; i++) {
1331                         entry = &rtlpci->rx_ring[rxring_idx].buffer_desc[i];
1332                         if (!_rtl_pci_init_one_rxdesc(hw, NULL, (u8 *)entry,
1333                                                       rxring_idx, i))
1334                                 return -ENOMEM;
1335                 }
1336         } else {
1337                 struct rtl_rx_desc *entry = NULL;
1338                 u8 tmp_one = 1;
1339                 /* alloc dma for this ring */
1340                 rtlpci->rx_ring[rxring_idx].desc =
1341                     pci_zalloc_consistent(rtlpci->pdev,
1342                                           sizeof(*rtlpci->rx_ring[rxring_idx].
1343                                           desc) * rtlpci->rxringcount,
1344                                           &rtlpci->rx_ring[rxring_idx].dma);
1345                 if (!rtlpci->rx_ring[rxring_idx].desc ||
1346                     (unsigned long)rtlpci->rx_ring[rxring_idx].desc & 0xFF) {
1347                         RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
1348                                  "Cannot allocate RX ring\n");
1349                         return -ENOMEM;
1350                 }
1351
1352                 /* init every desc in this ring */
1353                 rtlpci->rx_ring[rxring_idx].idx = 0;
1354
1355                 for (i = 0; i < rtlpci->rxringcount; i++) {
1356                         entry = &rtlpci->rx_ring[rxring_idx].desc[i];
1357                         if (!_rtl_pci_init_one_rxdesc(hw, NULL, (u8 *)entry,
1358                                                       rxring_idx, i))
1359                                 return -ENOMEM;
1360                 }
1361
1362                 rtlpriv->cfg->ops->set_desc(hw, (u8 *)entry, false,
1363                                             HW_DESC_RXERO, &tmp_one);
1364         }
1365         return 0;
1366 }
1367
1368 static void _rtl_pci_free_tx_ring(struct ieee80211_hw *hw,
1369                 unsigned int prio)
1370 {
1371         struct rtl_priv *rtlpriv = rtl_priv(hw);
1372         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1373         struct rtl8192_tx_ring *ring = &rtlpci->tx_ring[prio];
1374
1375         /* free every desc in this ring */
1376         while (skb_queue_len(&ring->queue)) {
1377                 u8 *entry;
1378                 struct sk_buff *skb = __skb_dequeue(&ring->queue);
1379
1380                 if (rtlpriv->use_new_trx_flow)
1381                         entry = (u8 *)(&ring->buffer_desc[ring->idx]);
1382                 else
1383                         entry = (u8 *)(&ring->desc[ring->idx]);
1384
1385                 pci_unmap_single(rtlpci->pdev,
1386                                  rtlpriv->cfg->
1387                                              ops->get_desc((u8 *)entry, true,
1388                                                    HW_DESC_TXBUFF_ADDR),
1389                                  skb->len, PCI_DMA_TODEVICE);
1390                 kfree_skb(skb);
1391                 ring->idx = (ring->idx + 1) % ring->entries;
1392         }
1393
1394         /* free dma of this ring */
1395         pci_free_consistent(rtlpci->pdev,
1396                             sizeof(*ring->desc) * ring->entries,
1397                             ring->desc, ring->dma);
1398         ring->desc = NULL;
1399         if (rtlpriv->use_new_trx_flow) {
1400                 pci_free_consistent(rtlpci->pdev,
1401                                     sizeof(*ring->buffer_desc) * ring->entries,
1402                                     ring->buffer_desc, ring->buffer_desc_dma);
1403                 ring->buffer_desc = NULL;
1404         }
1405 }
1406
1407 static void _rtl_pci_free_rx_ring(struct ieee80211_hw *hw, int rxring_idx)
1408 {
1409         struct rtl_priv *rtlpriv = rtl_priv(hw);
1410         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1411         int i;
1412
1413         /* free every desc in this ring */
1414         for (i = 0; i < rtlpci->rxringcount; i++) {
1415                 struct sk_buff *skb = rtlpci->rx_ring[rxring_idx].rx_buf[i];
1416
1417                 if (!skb)
1418                         continue;
1419                 pci_unmap_single(rtlpci->pdev, *((dma_addr_t *)skb->cb),
1420                                  rtlpci->rxbuffersize, PCI_DMA_FROMDEVICE);
1421                 kfree_skb(skb);
1422         }
1423
1424         /* free dma of this ring */
1425         if (rtlpriv->use_new_trx_flow) {
1426                 pci_free_consistent(rtlpci->pdev,
1427                                     sizeof(*rtlpci->rx_ring[rxring_idx].
1428                                     buffer_desc) * rtlpci->rxringcount,
1429                                     rtlpci->rx_ring[rxring_idx].buffer_desc,
1430                                     rtlpci->rx_ring[rxring_idx].dma);
1431                 rtlpci->rx_ring[rxring_idx].buffer_desc = NULL;
1432         } else {
1433                 pci_free_consistent(rtlpci->pdev,
1434                                     sizeof(*rtlpci->rx_ring[rxring_idx].desc) *
1435                                     rtlpci->rxringcount,
1436                                     rtlpci->rx_ring[rxring_idx].desc,
1437                                     rtlpci->rx_ring[rxring_idx].dma);
1438                 rtlpci->rx_ring[rxring_idx].desc = NULL;
1439         }
1440 }
1441
1442 static int _rtl_pci_init_trx_ring(struct ieee80211_hw *hw)
1443 {
1444         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1445         int ret;
1446         int i, rxring_idx;
1447
1448         /* rxring_idx 0:RX_MPDU_QUEUE
1449          * rxring_idx 1:RX_CMD_QUEUE
1450          */
1451         for (rxring_idx = 0; rxring_idx < RTL_PCI_MAX_RX_QUEUE; rxring_idx++) {
1452                 ret = _rtl_pci_init_rx_ring(hw, rxring_idx);
1453                 if (ret)
1454                         return ret;
1455         }
1456
1457         for (i = 0; i < RTL_PCI_MAX_TX_QUEUE_COUNT; i++) {
1458                 ret = _rtl_pci_init_tx_ring(hw, i,
1459                                  rtlpci->txringcount[i]);
1460                 if (ret)
1461                         goto err_free_rings;
1462         }
1463
1464         return 0;
1465
1466 err_free_rings:
1467         for (rxring_idx = 0; rxring_idx < RTL_PCI_MAX_RX_QUEUE; rxring_idx++)
1468                 _rtl_pci_free_rx_ring(hw, rxring_idx);
1469
1470         for (i = 0; i < RTL_PCI_MAX_TX_QUEUE_COUNT; i++)
1471                 if (rtlpci->tx_ring[i].desc ||
1472                     rtlpci->tx_ring[i].buffer_desc)
1473                         _rtl_pci_free_tx_ring(hw, i);
1474
1475         return 1;
1476 }
1477
1478 static int _rtl_pci_deinit_trx_ring(struct ieee80211_hw *hw)
1479 {
1480         u32 i, rxring_idx;
1481
1482         /*free rx rings */
1483         for (rxring_idx = 0; rxring_idx < RTL_PCI_MAX_RX_QUEUE; rxring_idx++)
1484                 _rtl_pci_free_rx_ring(hw, rxring_idx);
1485
1486         /*free tx rings */
1487         for (i = 0; i < RTL_PCI_MAX_TX_QUEUE_COUNT; i++)
1488                 _rtl_pci_free_tx_ring(hw, i);
1489
1490         return 0;
1491 }
1492
1493 int rtl_pci_reset_trx_ring(struct ieee80211_hw *hw)
1494 {
1495         struct rtl_priv *rtlpriv = rtl_priv(hw);
1496         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1497         int i, rxring_idx;
1498         unsigned long flags;
1499         u8 tmp_one = 1;
1500         u32 bufferaddress;
1501         /* rxring_idx 0:RX_MPDU_QUEUE */
1502         /* rxring_idx 1:RX_CMD_QUEUE */
1503         for (rxring_idx = 0; rxring_idx < RTL_PCI_MAX_RX_QUEUE; rxring_idx++) {
1504                 /* force the rx_ring[RX_MPDU_QUEUE/
1505                  * RX_CMD_QUEUE].idx to the first one
1506                  *new trx flow, do nothing
1507                 */
1508                 if (!rtlpriv->use_new_trx_flow &&
1509                     rtlpci->rx_ring[rxring_idx].desc) {
1510                         struct rtl_rx_desc *entry = NULL;
1511
1512                         rtlpci->rx_ring[rxring_idx].idx = 0;
1513                         for (i = 0; i < rtlpci->rxringcount; i++) {
1514                                 entry = &rtlpci->rx_ring[rxring_idx].desc[i];
1515                                 bufferaddress =
1516                                   rtlpriv->cfg->ops->get_desc((u8 *)entry,
1517                                   false , HW_DESC_RXBUFF_ADDR);
1518                                 memset((u8 *)entry , 0 ,
1519                                        sizeof(*rtlpci->rx_ring
1520                                        [rxring_idx].desc));/*clear one entry*/
1521                                 if (rtlpriv->use_new_trx_flow) {
1522                                         rtlpriv->cfg->ops->set_desc(hw,
1523                                             (u8 *)entry, false,
1524                                             HW_DESC_RX_PREPARE,
1525                                             (u8 *)&bufferaddress);
1526                                 } else {
1527                                         rtlpriv->cfg->ops->set_desc(hw,
1528                                             (u8 *)entry, false,
1529                                             HW_DESC_RXBUFF_ADDR,
1530                                             (u8 *)&bufferaddress);
1531                                         rtlpriv->cfg->ops->set_desc(hw,
1532                                             (u8 *)entry, false,
1533                                             HW_DESC_RXPKT_LEN,
1534                                             (u8 *)&rtlpci->rxbuffersize);
1535                                         rtlpriv->cfg->ops->set_desc(hw,
1536                                             (u8 *)entry, false,
1537                                             HW_DESC_RXOWN,
1538                                             (u8 *)&tmp_one);
1539                                 }
1540                         }
1541                         rtlpriv->cfg->ops->set_desc(hw, (u8 *)entry, false,
1542                                             HW_DESC_RXERO, (u8 *)&tmp_one);
1543                 }
1544                 rtlpci->rx_ring[rxring_idx].idx = 0;
1545         }
1546
1547         /*
1548          *after reset, release previous pending packet,
1549          *and force the  tx idx to the first one
1550          */
1551         spin_lock_irqsave(&rtlpriv->locks.irq_th_lock, flags);
1552         for (i = 0; i < RTL_PCI_MAX_TX_QUEUE_COUNT; i++) {
1553                 if (rtlpci->tx_ring[i].desc ||
1554                     rtlpci->tx_ring[i].buffer_desc) {
1555                         struct rtl8192_tx_ring *ring = &rtlpci->tx_ring[i];
1556
1557                         while (skb_queue_len(&ring->queue)) {
1558                                 u8 *entry;
1559                                 struct sk_buff *skb =
1560                                         __skb_dequeue(&ring->queue);
1561                                 if (rtlpriv->use_new_trx_flow)
1562                                         entry = (u8 *)(&ring->buffer_desc
1563                                                                 [ring->idx]);
1564                                 else
1565                                         entry = (u8 *)(&ring->desc[ring->idx]);
1566
1567                                 pci_unmap_single(rtlpci->pdev,
1568                                                  rtlpriv->cfg->ops->
1569                                                          get_desc((u8 *)
1570                                                          entry,
1571                                                          true,
1572                                                          HW_DESC_TXBUFF_ADDR),
1573                                                  skb->len, PCI_DMA_TODEVICE);
1574                                 dev_kfree_skb_irq(skb);
1575                                 ring->idx = (ring->idx + 1) % ring->entries;
1576                         }
1577
1578                         if (rtlpriv->use_new_trx_flow) {
1579                                 rtlpci->tx_ring[i].cur_tx_rp = 0;
1580                                 rtlpci->tx_ring[i].cur_tx_wp = 0;
1581                         }
1582
1583                         ring->idx = 0;
1584                         ring->entries = rtlpci->txringcount[i];
1585                 }
1586         }
1587         spin_unlock_irqrestore(&rtlpriv->locks.irq_th_lock, flags);
1588
1589         return 0;
1590 }
1591
1592 static bool rtl_pci_tx_chk_waitq_insert(struct ieee80211_hw *hw,
1593                                         struct ieee80211_sta *sta,
1594                                         struct sk_buff *skb)
1595 {
1596         struct rtl_priv *rtlpriv = rtl_priv(hw);
1597         struct rtl_sta_info *sta_entry = NULL;
1598         u8 tid = rtl_get_tid(skb);
1599         __le16 fc = rtl_get_fc(skb);
1600
1601         if (!sta)
1602                 return false;
1603         sta_entry = (struct rtl_sta_info *)sta->drv_priv;
1604
1605         if (!rtlpriv->rtlhal.earlymode_enable)
1606                 return false;
1607         if (ieee80211_is_nullfunc(fc))
1608                 return false;
1609         if (ieee80211_is_qos_nullfunc(fc))
1610                 return false;
1611         if (ieee80211_is_pspoll(fc))
1612                 return false;
1613         if (sta_entry->tids[tid].agg.agg_state != RTL_AGG_OPERATIONAL)
1614                 return false;
1615         if (_rtl_mac_to_hwqueue(hw, skb) > VO_QUEUE)
1616                 return false;
1617         if (tid > 7)
1618                 return false;
1619
1620         /* maybe every tid should be checked */
1621         if (!rtlpriv->link_info.higher_busytxtraffic[tid])
1622                 return false;
1623
1624         spin_lock_bh(&rtlpriv->locks.waitq_lock);
1625         skb_queue_tail(&rtlpriv->mac80211.skb_waitq[tid], skb);
1626         spin_unlock_bh(&rtlpriv->locks.waitq_lock);
1627
1628         return true;
1629 }
1630
1631 static int rtl_pci_tx(struct ieee80211_hw *hw,
1632                       struct ieee80211_sta *sta,
1633                       struct sk_buff *skb,
1634                       struct rtl_tcb_desc *ptcb_desc)
1635 {
1636         struct rtl_priv *rtlpriv = rtl_priv(hw);
1637         struct rtl_sta_info *sta_entry = NULL;
1638         struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
1639         struct rtl8192_tx_ring *ring;
1640         struct rtl_tx_desc *pdesc;
1641         struct rtl_tx_buffer_desc *ptx_bd_desc = NULL;
1642         u16 idx;
1643         u8 hw_queue = _rtl_mac_to_hwqueue(hw, skb);
1644         unsigned long flags;
1645         struct ieee80211_hdr *hdr = rtl_get_hdr(skb);
1646         __le16 fc = rtl_get_fc(skb);
1647         u8 *pda_addr = hdr->addr1;
1648         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1649         /*ssn */
1650         u8 tid = 0;
1651         u16 seq_number = 0;
1652         u8 own;
1653         u8 temp_one = 1;
1654
1655         if (ieee80211_is_mgmt(fc))
1656                 rtl_tx_mgmt_proc(hw, skb);
1657
1658         if (rtlpriv->psc.sw_ps_enabled) {
1659                 if (ieee80211_is_data(fc) && !ieee80211_is_nullfunc(fc) &&
1660                         !ieee80211_has_pm(fc))
1661                         hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
1662         }
1663
1664         rtl_action_proc(hw, skb, true);
1665
1666         if (is_multicast_ether_addr(pda_addr))
1667                 rtlpriv->stats.txbytesmulticast += skb->len;
1668         else if (is_broadcast_ether_addr(pda_addr))
1669                 rtlpriv->stats.txbytesbroadcast += skb->len;
1670         else
1671                 rtlpriv->stats.txbytesunicast += skb->len;
1672
1673         spin_lock_irqsave(&rtlpriv->locks.irq_th_lock, flags);
1674         ring = &rtlpci->tx_ring[hw_queue];
1675         if (hw_queue != BEACON_QUEUE) {
1676                 if (rtlpriv->use_new_trx_flow)
1677                         idx = ring->cur_tx_wp;
1678                 else
1679                         idx = (ring->idx + skb_queue_len(&ring->queue)) %
1680                               ring->entries;
1681         } else {
1682                 idx = 0;
1683         }
1684
1685         pdesc = &ring->desc[idx];
1686         if (rtlpriv->use_new_trx_flow) {
1687                 ptx_bd_desc = &ring->buffer_desc[idx];
1688         } else {
1689                 own = (u8) rtlpriv->cfg->ops->get_desc((u8 *)pdesc,
1690                                 true, HW_DESC_OWN);
1691
1692                 if ((own == 1) && (hw_queue != BEACON_QUEUE)) {
1693                         RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
1694                                  "No more TX desc@%d, ring->idx = %d, idx = %d, skb_queue_len = 0x%x\n",
1695                                  hw_queue, ring->idx, idx,
1696                                  skb_queue_len(&ring->queue));
1697
1698                         spin_unlock_irqrestore(&rtlpriv->locks.irq_th_lock,
1699                                                flags);
1700                         return skb->len;
1701                 }
1702         }
1703
1704         if (rtlpriv->cfg->ops->get_available_desc &&
1705             rtlpriv->cfg->ops->get_available_desc(hw, hw_queue) == 0) {
1706                         RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
1707                                  "get_available_desc fail\n");
1708                         spin_unlock_irqrestore(&rtlpriv->locks.irq_th_lock,
1709                                                flags);
1710                         return skb->len;
1711         }
1712
1713         if (ieee80211_is_data_qos(fc)) {
1714                 tid = rtl_get_tid(skb);
1715                 if (sta) {
1716                         sta_entry = (struct rtl_sta_info *)sta->drv_priv;
1717                         seq_number = (le16_to_cpu(hdr->seq_ctrl) &
1718                                       IEEE80211_SCTL_SEQ) >> 4;
1719                         seq_number += 1;
1720
1721                         if (!ieee80211_has_morefrags(hdr->frame_control))
1722                                 sta_entry->tids[tid].seq_number = seq_number;
1723                 }
1724         }
1725
1726         if (ieee80211_is_data(fc))
1727                 rtlpriv->cfg->ops->led_control(hw, LED_CTL_TX);
1728
1729         rtlpriv->cfg->ops->fill_tx_desc(hw, hdr, (u8 *)pdesc,
1730                         (u8 *)ptx_bd_desc, info, sta, skb, hw_queue, ptcb_desc);
1731
1732         __skb_queue_tail(&ring->queue, skb);
1733
1734         if (rtlpriv->use_new_trx_flow) {
1735                 rtlpriv->cfg->ops->set_desc(hw, (u8 *)pdesc, true,
1736                                             HW_DESC_OWN, &hw_queue);
1737         } else {
1738                 rtlpriv->cfg->ops->set_desc(hw, (u8 *)pdesc, true,
1739                                             HW_DESC_OWN, &temp_one);
1740         }
1741
1742         if ((ring->entries - skb_queue_len(&ring->queue)) < 2 &&
1743             hw_queue != BEACON_QUEUE) {
1744                 RT_TRACE(rtlpriv, COMP_ERR, DBG_LOUD,
1745                          "less desc left, stop skb_queue@%d, ring->idx = %d, idx = %d, skb_queue_len = 0x%x\n",
1746                          hw_queue, ring->idx, idx,
1747                          skb_queue_len(&ring->queue));
1748
1749                 ieee80211_stop_queue(hw, skb_get_queue_mapping(skb));
1750         }
1751
1752         spin_unlock_irqrestore(&rtlpriv->locks.irq_th_lock, flags);
1753
1754         rtlpriv->cfg->ops->tx_polling(hw, hw_queue);
1755
1756         return 0;
1757 }
1758
1759 static void rtl_pci_flush(struct ieee80211_hw *hw, u32 queues, bool drop)
1760 {
1761         struct rtl_priv *rtlpriv = rtl_priv(hw);
1762         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
1763         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
1764         struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
1765         u16 i = 0;
1766         int queue_id;
1767         struct rtl8192_tx_ring *ring;
1768
1769         if (mac->skip_scan)
1770                 return;
1771
1772         for (queue_id = RTL_PCI_MAX_TX_QUEUE_COUNT - 1; queue_id >= 0;) {
1773                 u32 queue_len;
1774
1775                 if (((queues >> queue_id) & 0x1) == 0) {
1776                         queue_id--;
1777                         continue;
1778                 }
1779                 ring = &pcipriv->dev.tx_ring[queue_id];
1780                 queue_len = skb_queue_len(&ring->queue);
1781                 if (queue_len == 0 || queue_id == BEACON_QUEUE ||
1782                         queue_id == TXCMD_QUEUE) {
1783                         queue_id--;
1784                         continue;
1785                 } else {
1786                         msleep(20);
1787                         i++;
1788                 }
1789
1790                 /* we just wait 1s for all queues */
1791                 if (rtlpriv->psc.rfpwr_state == ERFOFF ||
1792                         is_hal_stop(rtlhal) || i >= 200)
1793                         return;
1794         }
1795 }
1796
1797 static void rtl_pci_deinit(struct ieee80211_hw *hw)
1798 {
1799         struct rtl_priv *rtlpriv = rtl_priv(hw);
1800         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1801
1802         _rtl_pci_deinit_trx_ring(hw);
1803
1804         synchronize_irq(rtlpci->pdev->irq);
1805         tasklet_kill(&rtlpriv->works.irq_tasklet);
1806         cancel_work_sync(&rtlpriv->works.lps_change_work);
1807
1808         flush_workqueue(rtlpriv->works.rtl_wq);
1809         destroy_workqueue(rtlpriv->works.rtl_wq);
1810
1811 }
1812
1813 static int rtl_pci_init(struct ieee80211_hw *hw, struct pci_dev *pdev)
1814 {
1815         struct rtl_priv *rtlpriv = rtl_priv(hw);
1816         int err;
1817
1818         _rtl_pci_init_struct(hw, pdev);
1819
1820         err = _rtl_pci_init_trx_ring(hw);
1821         if (err) {
1822                 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
1823                          "tx ring initialization failed\n");
1824                 return err;
1825         }
1826
1827         return 0;
1828 }
1829
1830 static int rtl_pci_start(struct ieee80211_hw *hw)
1831 {
1832         struct rtl_priv *rtlpriv = rtl_priv(hw);
1833         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
1834         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1835         struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
1836
1837         int err;
1838
1839         rtl_pci_reset_trx_ring(hw);
1840
1841         rtlpci->driver_is_goingto_unload = false;
1842         if (rtlpriv->cfg->ops->get_btc_status &&
1843             rtlpriv->cfg->ops->get_btc_status()) {
1844                 rtlpriv->btcoexist.btc_ops->btc_init_variables(rtlpriv);
1845                 rtlpriv->btcoexist.btc_ops->btc_init_hal_vars(rtlpriv);
1846         }
1847         err = rtlpriv->cfg->ops->hw_init(hw);
1848         if (err) {
1849                 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1850                          "Failed to config hardware!\n");
1851                 return err;
1852         }
1853
1854         rtlpriv->cfg->ops->enable_interrupt(hw);
1855         RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, "enable_interrupt OK\n");
1856
1857         rtl_init_rx_config(hw);
1858
1859         /*should be after adapter start and interrupt enable. */
1860         set_hal_start(rtlhal);
1861
1862         RT_CLEAR_PS_LEVEL(ppsc, RT_RF_OFF_LEVL_HALT_NIC);
1863
1864         rtlpci->up_first_time = false;
1865
1866         RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "rtl_pci_start OK\n");
1867         return 0;
1868 }
1869
1870 static void rtl_pci_stop(struct ieee80211_hw *hw)
1871 {
1872         struct rtl_priv *rtlpriv = rtl_priv(hw);
1873         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1874         struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
1875         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
1876         unsigned long flags;
1877         u8 RFInProgressTimeOut = 0;
1878
1879         if (rtlpriv->cfg->ops->get_btc_status())
1880                 rtlpriv->btcoexist.btc_ops->btc_halt_notify();
1881
1882         /*
1883          *should be before disable interrupt&adapter
1884          *and will do it immediately.
1885          */
1886         set_hal_stop(rtlhal);
1887
1888         rtlpci->driver_is_goingto_unload = true;
1889         rtlpriv->cfg->ops->disable_interrupt(hw);
1890         cancel_work_sync(&rtlpriv->works.lps_change_work);
1891
1892         spin_lock_irqsave(&rtlpriv->locks.rf_ps_lock, flags);
1893         while (ppsc->rfchange_inprogress) {
1894                 spin_unlock_irqrestore(&rtlpriv->locks.rf_ps_lock, flags);
1895                 if (RFInProgressTimeOut > 100) {
1896                         spin_lock_irqsave(&rtlpriv->locks.rf_ps_lock, flags);
1897                         break;
1898                 }
1899                 mdelay(1);
1900                 RFInProgressTimeOut++;
1901                 spin_lock_irqsave(&rtlpriv->locks.rf_ps_lock, flags);
1902         }
1903         ppsc->rfchange_inprogress = true;
1904         spin_unlock_irqrestore(&rtlpriv->locks.rf_ps_lock, flags);
1905
1906         rtlpriv->cfg->ops->hw_disable(hw);
1907         /* some things are not needed if firmware not available */
1908         if (!rtlpriv->max_fw_size)
1909                 return;
1910         rtlpriv->cfg->ops->led_control(hw, LED_CTL_POWER_OFF);
1911
1912         spin_lock_irqsave(&rtlpriv->locks.rf_ps_lock, flags);
1913         ppsc->rfchange_inprogress = false;
1914         spin_unlock_irqrestore(&rtlpriv->locks.rf_ps_lock, flags);
1915
1916         rtl_pci_enable_aspm(hw);
1917 }
1918
1919 static bool _rtl_pci_find_adapter(struct pci_dev *pdev,
1920                 struct ieee80211_hw *hw)
1921 {
1922         struct rtl_priv *rtlpriv = rtl_priv(hw);
1923         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
1924         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
1925         struct pci_dev *bridge_pdev = pdev->bus->self;
1926         u16 venderid;
1927         u16 deviceid;
1928         u8 revisionid;
1929         u16 irqline;
1930         u8 tmp;
1931
1932         pcipriv->ndis_adapter.pcibridge_vendor = PCI_BRIDGE_VENDOR_UNKNOWN;
1933         venderid = pdev->vendor;
1934         deviceid = pdev->device;
1935         pci_read_config_byte(pdev, 0x8, &revisionid);
1936         pci_read_config_word(pdev, 0x3C, &irqline);
1937
1938         /* PCI ID 0x10ec:0x8192 occurs for both RTL8192E, which uses
1939          * r8192e_pci, and RTL8192SE, which uses this driver. If the
1940          * revision ID is RTL_PCI_REVISION_ID_8192PCIE (0x01), then
1941          * the correct driver is r8192e_pci, thus this routine should
1942          * return false.
1943          */
1944         if (deviceid == RTL_PCI_8192SE_DID &&
1945             revisionid == RTL_PCI_REVISION_ID_8192PCIE)
1946                 return false;
1947
1948         if (deviceid == RTL_PCI_8192_DID ||
1949             deviceid == RTL_PCI_0044_DID ||
1950             deviceid == RTL_PCI_0047_DID ||
1951             deviceid == RTL_PCI_8192SE_DID ||
1952             deviceid == RTL_PCI_8174_DID ||
1953             deviceid == RTL_PCI_8173_DID ||
1954             deviceid == RTL_PCI_8172_DID ||
1955             deviceid == RTL_PCI_8171_DID) {
1956                 switch (revisionid) {
1957                 case RTL_PCI_REVISION_ID_8192PCIE:
1958                         RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1959                                  "8192 PCI-E is found - vid/did=%x/%x\n",
1960                                  venderid, deviceid);
1961                         rtlhal->hw_type = HARDWARE_TYPE_RTL8192E;
1962                         return false;
1963                 case RTL_PCI_REVISION_ID_8192SE:
1964                         RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1965                                  "8192SE is found - vid/did=%x/%x\n",
1966                                  venderid, deviceid);
1967                         rtlhal->hw_type = HARDWARE_TYPE_RTL8192SE;
1968                         break;
1969                 default:
1970                         RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
1971                                  "Err: Unknown device - vid/did=%x/%x\n",
1972                                  venderid, deviceid);
1973                         rtlhal->hw_type = HARDWARE_TYPE_RTL8192SE;
1974                         break;
1975
1976                 }
1977         } else if (deviceid == RTL_PCI_8723AE_DID) {
1978                 rtlhal->hw_type = HARDWARE_TYPE_RTL8723AE;
1979                 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1980                          "8723AE PCI-E is found - "
1981                          "vid/did=%x/%x\n", venderid, deviceid);
1982         } else if (deviceid == RTL_PCI_8192CET_DID ||
1983                    deviceid == RTL_PCI_8192CE_DID ||
1984                    deviceid == RTL_PCI_8191CE_DID ||
1985                    deviceid == RTL_PCI_8188CE_DID) {
1986                 rtlhal->hw_type = HARDWARE_TYPE_RTL8192CE;
1987                 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1988                          "8192C PCI-E is found - vid/did=%x/%x\n",
1989                          venderid, deviceid);
1990         } else if (deviceid == RTL_PCI_8192DE_DID ||
1991                    deviceid == RTL_PCI_8192DE_DID2) {
1992                 rtlhal->hw_type = HARDWARE_TYPE_RTL8192DE;
1993                 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1994                          "8192D PCI-E is found - vid/did=%x/%x\n",
1995                          venderid, deviceid);
1996         } else if (deviceid == RTL_PCI_8188EE_DID) {
1997                 rtlhal->hw_type = HARDWARE_TYPE_RTL8188EE;
1998                 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
1999                          "Find adapter, Hardware type is 8188EE\n");
2000         } else if (deviceid == RTL_PCI_8723BE_DID) {
2001                         rtlhal->hw_type = HARDWARE_TYPE_RTL8723BE;
2002                         RT_TRACE(rtlpriv, COMP_INIT , DBG_LOUD,
2003                                  "Find adapter, Hardware type is 8723BE\n");
2004         } else if (deviceid == RTL_PCI_8192EE_DID) {
2005                         rtlhal->hw_type = HARDWARE_TYPE_RTL8192EE;
2006                         RT_TRACE(rtlpriv, COMP_INIT , DBG_LOUD,
2007                                  "Find adapter, Hardware type is 8192EE\n");
2008         } else if (deviceid == RTL_PCI_8821AE_DID) {
2009                         rtlhal->hw_type = HARDWARE_TYPE_RTL8821AE;
2010                         RT_TRACE(rtlpriv, COMP_INIT , DBG_LOUD,
2011                                  "Find adapter, Hardware type is 8821AE\n");
2012         } else if (deviceid == RTL_PCI_8812AE_DID) {
2013                         rtlhal->hw_type = HARDWARE_TYPE_RTL8812AE;
2014                         RT_TRACE(rtlpriv, COMP_INIT , DBG_LOUD,
2015                                  "Find adapter, Hardware type is 8812AE\n");
2016         } else {
2017                 RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
2018                          "Err: Unknown device - vid/did=%x/%x\n",
2019                          venderid, deviceid);
2020
2021                 rtlhal->hw_type = RTL_DEFAULT_HARDWARE_TYPE;
2022         }
2023
2024         if (rtlhal->hw_type == HARDWARE_TYPE_RTL8192DE) {
2025                 if (revisionid == 0 || revisionid == 1) {
2026                         if (revisionid == 0) {
2027                                 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
2028                                          "Find 92DE MAC0\n");
2029                                 rtlhal->interfaceindex = 0;
2030                         } else if (revisionid == 1) {
2031                                 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
2032                                          "Find 92DE MAC1\n");
2033                                 rtlhal->interfaceindex = 1;
2034                         }
2035                 } else {
2036                         RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
2037                                  "Unknown device - VendorID/DeviceID=%x/%x, Revision=%x\n",
2038                                  venderid, deviceid, revisionid);
2039                         rtlhal->interfaceindex = 0;
2040                 }
2041         }
2042
2043         /* 92ee use new trx flow */
2044         if (rtlhal->hw_type == HARDWARE_TYPE_RTL8192EE)
2045                 rtlpriv->use_new_trx_flow = true;
2046         else
2047                 rtlpriv->use_new_trx_flow = false;
2048
2049         /*find bus info */
2050         pcipriv->ndis_adapter.busnumber = pdev->bus->number;
2051         pcipriv->ndis_adapter.devnumber = PCI_SLOT(pdev->devfn);
2052         pcipriv->ndis_adapter.funcnumber = PCI_FUNC(pdev->devfn);
2053
2054         /*find bridge info */
2055         pcipriv->ndis_adapter.pcibridge_vendor = PCI_BRIDGE_VENDOR_UNKNOWN;
2056         /* some ARM have no bridge_pdev and will crash here
2057          * so we should check if bridge_pdev is NULL
2058          */
2059         if (bridge_pdev) {
2060                 /*find bridge info if available */
2061                 pcipriv->ndis_adapter.pcibridge_vendorid = bridge_pdev->vendor;
2062                 for (tmp = 0; tmp < PCI_BRIDGE_VENDOR_MAX; tmp++) {
2063                         if (bridge_pdev->vendor == pcibridge_vendors[tmp]) {
2064                                 pcipriv->ndis_adapter.pcibridge_vendor = tmp;
2065                                 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
2066                                          "Pci Bridge Vendor is found index: %d\n",
2067                                          tmp);
2068                                 break;
2069                         }
2070                 }
2071         }
2072
2073         if (pcipriv->ndis_adapter.pcibridge_vendor !=
2074                 PCI_BRIDGE_VENDOR_UNKNOWN) {
2075                 pcipriv->ndis_adapter.pcibridge_busnum =
2076                     bridge_pdev->bus->number;
2077                 pcipriv->ndis_adapter.pcibridge_devnum =
2078                     PCI_SLOT(bridge_pdev->devfn);
2079                 pcipriv->ndis_adapter.pcibridge_funcnum =
2080                     PCI_FUNC(bridge_pdev->devfn);
2081                 pcipriv->ndis_adapter.pcibridge_pciehdr_offset =
2082                     pci_pcie_cap(bridge_pdev);
2083                 pcipriv->ndis_adapter.num4bytes =
2084                     (pcipriv->ndis_adapter.pcibridge_pciehdr_offset + 0x10) / 4;
2085
2086                 rtl_pci_get_linkcontrol_field(hw);
2087
2088                 if (pcipriv->ndis_adapter.pcibridge_vendor ==
2089                     PCI_BRIDGE_VENDOR_AMD) {
2090                         pcipriv->ndis_adapter.amd_l1_patch =
2091                             rtl_pci_get_amd_l1_patch(hw);
2092                 }
2093         }
2094
2095         RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
2096                  "pcidev busnumber:devnumber:funcnumber:vendor:link_ctl %d:%d:%d:%x:%x\n",
2097                  pcipriv->ndis_adapter.busnumber,
2098                  pcipriv->ndis_adapter.devnumber,
2099                  pcipriv->ndis_adapter.funcnumber,
2100                  pdev->vendor, pcipriv->ndis_adapter.linkctrl_reg);
2101
2102         RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
2103                  "pci_bridge busnumber:devnumber:funcnumber:vendor:pcie_cap:link_ctl_reg:amd %d:%d:%d:%x:%x:%x:%x\n",
2104                  pcipriv->ndis_adapter.pcibridge_busnum,
2105                  pcipriv->ndis_adapter.pcibridge_devnum,
2106                  pcipriv->ndis_adapter.pcibridge_funcnum,
2107                  pcibridge_vendors[pcipriv->ndis_adapter.pcibridge_vendor],
2108                  pcipriv->ndis_adapter.pcibridge_pciehdr_offset,
2109                  pcipriv->ndis_adapter.pcibridge_linkctrlreg,
2110                  pcipriv->ndis_adapter.amd_l1_patch);
2111
2112         rtl_pci_parse_configuration(pdev, hw);
2113         list_add_tail(&rtlpriv->list, &rtlpriv->glb_var->glb_priv_list);
2114
2115         return true;
2116 }
2117
2118 static int rtl_pci_intr_mode_msi(struct ieee80211_hw *hw)
2119 {
2120         struct rtl_priv *rtlpriv = rtl_priv(hw);
2121         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
2122         struct rtl_pci *rtlpci = rtl_pcidev(pcipriv);
2123         int ret;
2124
2125         ret = pci_enable_msi(rtlpci->pdev);
2126         if (ret < 0)
2127                 return ret;
2128
2129         ret = request_irq(rtlpci->pdev->irq, &_rtl_pci_interrupt,
2130                           IRQF_SHARED, KBUILD_MODNAME, hw);
2131         if (ret < 0) {
2132                 pci_disable_msi(rtlpci->pdev);
2133                 return ret;
2134         }
2135
2136         rtlpci->using_msi = true;
2137
2138         RT_TRACE(rtlpriv, COMP_INIT|COMP_INTR, DBG_DMESG,
2139                  "MSI Interrupt Mode!\n");
2140         return 0;
2141 }
2142
2143 static int rtl_pci_intr_mode_legacy(struct ieee80211_hw *hw)
2144 {
2145         struct rtl_priv *rtlpriv = rtl_priv(hw);
2146         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
2147         struct rtl_pci *rtlpci = rtl_pcidev(pcipriv);
2148         int ret;
2149
2150         ret = request_irq(rtlpci->pdev->irq, &_rtl_pci_interrupt,
2151                           IRQF_SHARED, KBUILD_MODNAME, hw);
2152         if (ret < 0)
2153                 return ret;
2154
2155         rtlpci->using_msi = false;
2156         RT_TRACE(rtlpriv, COMP_INIT|COMP_INTR, DBG_DMESG,
2157                  "Pin-based Interrupt Mode!\n");
2158         return 0;
2159 }
2160
2161 static int rtl_pci_intr_mode_decide(struct ieee80211_hw *hw)
2162 {
2163         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
2164         struct rtl_pci *rtlpci = rtl_pcidev(pcipriv);
2165         int ret;
2166
2167         if (rtlpci->msi_support) {
2168                 ret = rtl_pci_intr_mode_msi(hw);
2169                 if (ret < 0)
2170                         ret = rtl_pci_intr_mode_legacy(hw);
2171         } else {
2172                 ret = rtl_pci_intr_mode_legacy(hw);
2173         }
2174         return ret;
2175 }
2176
2177 int rtl_pci_probe(struct pci_dev *pdev,
2178                             const struct pci_device_id *id)
2179 {
2180         struct ieee80211_hw *hw = NULL;
2181
2182         struct rtl_priv *rtlpriv = NULL;
2183         struct rtl_pci_priv *pcipriv = NULL;
2184         struct rtl_pci *rtlpci;
2185         unsigned long pmem_start, pmem_len, pmem_flags;
2186         int err;
2187
2188         err = pci_enable_device(pdev);
2189         if (err) {
2190                 RT_ASSERT(false, "%s : Cannot enable new PCI device\n",
2191                           pci_name(pdev));
2192                 return err;
2193         }
2194
2195         if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32))) {
2196                 if (pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32))) {
2197                         RT_ASSERT(false,
2198                                   "Unable to obtain 32bit DMA for consistent allocations\n");
2199                         err = -ENOMEM;
2200                         goto fail1;
2201                 }
2202         }
2203
2204         pci_set_master(pdev);
2205
2206         hw = ieee80211_alloc_hw(sizeof(struct rtl_pci_priv) +
2207                                 sizeof(struct rtl_priv), &rtl_ops);
2208         if (!hw) {
2209                 RT_ASSERT(false,
2210                           "%s : ieee80211 alloc failed\n", pci_name(pdev));
2211                 err = -ENOMEM;
2212                 goto fail1;
2213         }
2214
2215         SET_IEEE80211_DEV(hw, &pdev->dev);
2216         pci_set_drvdata(pdev, hw);
2217
2218         rtlpriv = hw->priv;
2219         rtlpriv->hw = hw;
2220         pcipriv = (void *)rtlpriv->priv;
2221         pcipriv->dev.pdev = pdev;
2222         init_completion(&rtlpriv->firmware_loading_complete);
2223         /*proximity init here*/
2224         rtlpriv->proximity.proxim_on = false;
2225
2226         pcipriv = (void *)rtlpriv->priv;
2227         pcipriv->dev.pdev = pdev;
2228
2229         /* init cfg & intf_ops */
2230         rtlpriv->rtlhal.interface = INTF_PCI;
2231         rtlpriv->cfg = (struct rtl_hal_cfg *)(id->driver_data);
2232         rtlpriv->intf_ops = &rtl_pci_ops;
2233         rtlpriv->glb_var = &rtl_global_var;
2234
2235         /*
2236          *init dbgp flags before all
2237          *other functions, because we will
2238          *use it in other funtions like
2239          *RT_TRACE/RT_PRINT/RTL_PRINT_DATA
2240          *you can not use these macro
2241          *before this
2242          */
2243         rtl_dbgp_flag_init(hw);
2244
2245         /* MEM map */
2246         err = pci_request_regions(pdev, KBUILD_MODNAME);
2247         if (err) {
2248                 RT_ASSERT(false, "Can't obtain PCI resources\n");
2249                 goto fail1;
2250         }
2251
2252         pmem_start = pci_resource_start(pdev, rtlpriv->cfg->bar_id);
2253         pmem_len = pci_resource_len(pdev, rtlpriv->cfg->bar_id);
2254         pmem_flags = pci_resource_flags(pdev, rtlpriv->cfg->bar_id);
2255
2256         /*shared mem start */
2257         rtlpriv->io.pci_mem_start =
2258                         (unsigned long)pci_iomap(pdev,
2259                         rtlpriv->cfg->bar_id, pmem_len);
2260         if (rtlpriv->io.pci_mem_start == 0) {
2261                 RT_ASSERT(false, "Can't map PCI mem\n");
2262                 err = -ENOMEM;
2263                 goto fail2;
2264         }
2265
2266         RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
2267                  "mem mapped space: start: 0x%08lx len:%08lx flags:%08lx, after map:0x%08lx\n",
2268                  pmem_start, pmem_len, pmem_flags,
2269                  rtlpriv->io.pci_mem_start);
2270
2271         /* Disable Clk Request */
2272         pci_write_config_byte(pdev, 0x81, 0);
2273         /* leave D3 mode */
2274         pci_write_config_byte(pdev, 0x44, 0);
2275         pci_write_config_byte(pdev, 0x04, 0x06);
2276         pci_write_config_byte(pdev, 0x04, 0x07);
2277
2278         /* find adapter */
2279         if (!_rtl_pci_find_adapter(pdev, hw)) {
2280                 err = -ENODEV;
2281                 goto fail2;
2282         }
2283
2284         /* Init IO handler */
2285         _rtl_pci_io_handler_init(&pdev->dev, hw);
2286
2287         /*like read eeprom and so on */
2288         rtlpriv->cfg->ops->read_eeprom_info(hw);
2289
2290         if (rtlpriv->cfg->ops->init_sw_vars(hw)) {
2291                 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "Can't init_sw_vars\n");
2292                 err = -ENODEV;
2293                 goto fail3;
2294         }
2295         rtlpriv->cfg->ops->init_sw_leds(hw);
2296
2297         /*aspm */
2298         rtl_pci_init_aspm(hw);
2299
2300         /* Init mac80211 sw */
2301         err = rtl_init_core(hw);
2302         if (err) {
2303                 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
2304                          "Can't allocate sw for mac80211\n");
2305                 goto fail3;
2306         }
2307
2308         /* Init PCI sw */
2309         err = rtl_pci_init(hw, pdev);
2310         if (err) {
2311                 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "Failed to init PCI\n");
2312                 goto fail3;
2313         }
2314
2315         err = ieee80211_register_hw(hw);
2316         if (err) {
2317                 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
2318                          "Can't register mac80211 hw.\n");
2319                 err = -ENODEV;
2320                 goto fail3;
2321         }
2322         rtlpriv->mac80211.mac80211_registered = 1;
2323
2324         err = sysfs_create_group(&pdev->dev.kobj, &rtl_attribute_group);
2325         if (err) {
2326                 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
2327                          "failed to create sysfs device attributes\n");
2328                 goto fail3;
2329         }
2330
2331         /*init rfkill */
2332         rtl_init_rfkill(hw);    /* Init PCI sw */
2333
2334         rtlpci = rtl_pcidev(pcipriv);
2335         err = rtl_pci_intr_mode_decide(hw);
2336         if (err) {
2337                 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
2338                          "%s: failed to register IRQ handler\n",
2339                          wiphy_name(hw->wiphy));
2340                 goto fail3;
2341         }
2342         rtlpci->irq_alloc = 1;
2343
2344         set_bit(RTL_STATUS_INTERFACE_START, &rtlpriv->status);
2345         return 0;
2346
2347 fail3:
2348         pci_set_drvdata(pdev, NULL);
2349         rtl_deinit_core(hw);
2350
2351 fail2:
2352         if (rtlpriv->io.pci_mem_start != 0)
2353                 pci_iounmap(pdev, (void __iomem *)rtlpriv->io.pci_mem_start);
2354
2355         pci_release_regions(pdev);
2356         complete(&rtlpriv->firmware_loading_complete);
2357
2358 fail1:
2359         if (hw)
2360                 ieee80211_free_hw(hw);
2361         pci_disable_device(pdev);
2362
2363         return err;
2364
2365 }
2366 EXPORT_SYMBOL(rtl_pci_probe);
2367
2368 void rtl_pci_disconnect(struct pci_dev *pdev)
2369 {
2370         struct ieee80211_hw *hw = pci_get_drvdata(pdev);
2371         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
2372         struct rtl_priv *rtlpriv = rtl_priv(hw);
2373         struct rtl_pci *rtlpci = rtl_pcidev(pcipriv);
2374         struct rtl_mac *rtlmac = rtl_mac(rtlpriv);
2375
2376         /* just in case driver is removed before firmware callback */
2377         wait_for_completion(&rtlpriv->firmware_loading_complete);
2378         clear_bit(RTL_STATUS_INTERFACE_START, &rtlpriv->status);
2379
2380         sysfs_remove_group(&pdev->dev.kobj, &rtl_attribute_group);
2381
2382         /*ieee80211_unregister_hw will call ops_stop */
2383         if (rtlmac->mac80211_registered == 1) {
2384                 ieee80211_unregister_hw(hw);
2385                 rtlmac->mac80211_registered = 0;
2386         } else {
2387                 rtl_deinit_deferred_work(hw);
2388                 rtlpriv->intf_ops->adapter_stop(hw);
2389         }
2390         rtlpriv->cfg->ops->disable_interrupt(hw);
2391
2392         /*deinit rfkill */
2393         rtl_deinit_rfkill(hw);
2394
2395         rtl_pci_deinit(hw);
2396         rtl_deinit_core(hw);
2397         rtlpriv->cfg->ops->deinit_sw_vars(hw);
2398
2399         if (rtlpci->irq_alloc) {
2400                 free_irq(rtlpci->pdev->irq, hw);
2401                 rtlpci->irq_alloc = 0;
2402         }
2403
2404         if (rtlpci->using_msi)
2405                 pci_disable_msi(rtlpci->pdev);
2406
2407         list_del(&rtlpriv->list);
2408         if (rtlpriv->io.pci_mem_start != 0) {
2409                 pci_iounmap(pdev, (void __iomem *)rtlpriv->io.pci_mem_start);
2410                 pci_release_regions(pdev);
2411         }
2412
2413         pci_disable_device(pdev);
2414
2415         rtl_pci_disable_aspm(hw);
2416
2417         pci_set_drvdata(pdev, NULL);
2418
2419         ieee80211_free_hw(hw);
2420 }
2421 EXPORT_SYMBOL(rtl_pci_disconnect);
2422
2423 #ifdef CONFIG_PM_SLEEP
2424 /***************************************
2425 kernel pci power state define:
2426 PCI_D0         ((pci_power_t __force) 0)
2427 PCI_D1         ((pci_power_t __force) 1)
2428 PCI_D2         ((pci_power_t __force) 2)
2429 PCI_D3hot      ((pci_power_t __force) 3)
2430 PCI_D3cold     ((pci_power_t __force) 4)
2431 PCI_UNKNOWN    ((pci_power_t __force) 5)
2432
2433 This function is called when system
2434 goes into suspend state mac80211 will
2435 call rtl_mac_stop() from the mac80211
2436 suspend function first, So there is
2437 no need to call hw_disable here.
2438 ****************************************/
2439 int rtl_pci_suspend(struct device *dev)
2440 {
2441         struct pci_dev *pdev = to_pci_dev(dev);
2442         struct ieee80211_hw *hw = pci_get_drvdata(pdev);
2443         struct rtl_priv *rtlpriv = rtl_priv(hw);
2444
2445         rtlpriv->cfg->ops->hw_suspend(hw);
2446         rtl_deinit_rfkill(hw);
2447
2448         return 0;
2449 }
2450 EXPORT_SYMBOL(rtl_pci_suspend);
2451
2452 int rtl_pci_resume(struct device *dev)
2453 {
2454         struct pci_dev *pdev = to_pci_dev(dev);
2455         struct ieee80211_hw *hw = pci_get_drvdata(pdev);
2456         struct rtl_priv *rtlpriv = rtl_priv(hw);
2457
2458         rtlpriv->cfg->ops->hw_resume(hw);
2459         rtl_init_rfkill(hw);
2460         return 0;
2461 }
2462 EXPORT_SYMBOL(rtl_pci_resume);
2463 #endif /* CONFIG_PM_SLEEP */
2464
2465 const struct rtl_intf_ops rtl_pci_ops = {
2466         .read_efuse_byte = read_efuse_byte,
2467         .adapter_start = rtl_pci_start,
2468         .adapter_stop = rtl_pci_stop,
2469         .check_buddy_priv = rtl_pci_check_buddy_priv,
2470         .adapter_tx = rtl_pci_tx,
2471         .flush = rtl_pci_flush,
2472         .reset_trx_ring = rtl_pci_reset_trx_ring,
2473         .waitq_insert = rtl_pci_tx_chk_waitq_insert,
2474
2475         .disable_aspm = rtl_pci_disable_aspm,
2476         .enable_aspm = rtl_pci_enable_aspm,
2477 };