2 * Linux device driver for RTL8187
4 * Copyright 2007 Michael Wu <flamingice@sourmilk.net>
5 * Copyright 2007 Andrea Merello <andrea.merello@gmail.com>
7 * Based on the r8187 driver, which is:
8 * Copyright 2005 Andrea Merello <andrea.merello@gmail.com>, et al.
10 * The driver was extended to the RTL8187B in 2008 by:
11 * Herton Ronaldo Krzesinski <herton@mandriva.com.br>
12 * Hin-Tak Leung <htl10@users.sourceforge.net>
13 * Larry Finger <Larry.Finger@lwfinger.net>
15 * Magic delays and register offsets below are taken from the original
16 * r8187 driver sources. Thanks to Realtek for their support!
18 * This program is free software; you can redistribute it and/or modify
19 * it under the terms of the GNU General Public License version 2 as
20 * published by the Free Software Foundation.
23 #include <linux/usb.h>
24 #include <linux/slab.h>
25 #include <linux/delay.h>
26 #include <linux/etherdevice.h>
27 #include <linux/eeprom_93cx6.h>
28 #include <linux/module.h>
29 #include <net/mac80211.h>
33 #ifdef CONFIG_RTL8187_LEDS
38 MODULE_AUTHOR("Michael Wu <flamingice@sourmilk.net>");
39 MODULE_AUTHOR("Andrea Merello <andrea.merello@gmail.com>");
40 MODULE_AUTHOR("Herton Ronaldo Krzesinski <herton@mandriva.com.br>");
41 MODULE_AUTHOR("Hin-Tak Leung <htl10@users.sourceforge.net>");
42 MODULE_AUTHOR("Larry Finger <Larry.Finger@lwfinger.net>");
43 MODULE_DESCRIPTION("RTL8187/RTL8187B USB wireless driver");
44 MODULE_LICENSE("GPL");
46 static struct usb_device_id rtl8187_table[] = {
48 {USB_DEVICE(0x0b05, 0x171d), .driver_info = DEVICE_RTL8187},
50 {USB_DEVICE(0x050d, 0x705e), .driver_info = DEVICE_RTL8187B},
52 {USB_DEVICE(0x0bda, 0x8187), .driver_info = DEVICE_RTL8187},
53 {USB_DEVICE(0x0bda, 0x8189), .driver_info = DEVICE_RTL8187B},
54 {USB_DEVICE(0x0bda, 0x8197), .driver_info = DEVICE_RTL8187B},
55 {USB_DEVICE(0x0bda, 0x8198), .driver_info = DEVICE_RTL8187B},
57 {USB_DEVICE(0x0769, 0x11F2), .driver_info = DEVICE_RTL8187},
59 {USB_DEVICE(0x0789, 0x010C), .driver_info = DEVICE_RTL8187},
61 {USB_DEVICE(0x0846, 0x6100), .driver_info = DEVICE_RTL8187},
62 {USB_DEVICE(0x0846, 0x6a00), .driver_info = DEVICE_RTL8187},
63 {USB_DEVICE(0x0846, 0x4260), .driver_info = DEVICE_RTL8187B},
65 {USB_DEVICE(0x03f0, 0xca02), .driver_info = DEVICE_RTL8187},
67 {USB_DEVICE(0x0df6, 0x000d), .driver_info = DEVICE_RTL8187},
68 {USB_DEVICE(0x0df6, 0x0028), .driver_info = DEVICE_RTL8187B},
69 {USB_DEVICE(0x0df6, 0x0029), .driver_info = DEVICE_RTL8187B},
70 /* Sphairon Access Systems GmbH */
71 {USB_DEVICE(0x114B, 0x0150), .driver_info = DEVICE_RTL8187},
72 /* Dick Smith Electronics */
73 {USB_DEVICE(0x1371, 0x9401), .driver_info = DEVICE_RTL8187},
75 {USB_DEVICE(0x13d1, 0xabe6), .driver_info = DEVICE_RTL8187},
77 {USB_DEVICE(0x18E8, 0x6232), .driver_info = DEVICE_RTL8187},
79 {USB_DEVICE(0x1b75, 0x8187), .driver_info = DEVICE_RTL8187},
81 {USB_DEVICE(0x1737, 0x0073), .driver_info = DEVICE_RTL8187B},
85 MODULE_DEVICE_TABLE(usb, rtl8187_table);
87 static const struct ieee80211_rate rtl818x_rates[] = {
88 { .bitrate = 10, .hw_value = 0, },
89 { .bitrate = 20, .hw_value = 1, },
90 { .bitrate = 55, .hw_value = 2, },
91 { .bitrate = 110, .hw_value = 3, },
92 { .bitrate = 60, .hw_value = 4, },
93 { .bitrate = 90, .hw_value = 5, },
94 { .bitrate = 120, .hw_value = 6, },
95 { .bitrate = 180, .hw_value = 7, },
96 { .bitrate = 240, .hw_value = 8, },
97 { .bitrate = 360, .hw_value = 9, },
98 { .bitrate = 480, .hw_value = 10, },
99 { .bitrate = 540, .hw_value = 11, },
102 static const struct ieee80211_channel rtl818x_channels[] = {
103 { .center_freq = 2412 },
104 { .center_freq = 2417 },
105 { .center_freq = 2422 },
106 { .center_freq = 2427 },
107 { .center_freq = 2432 },
108 { .center_freq = 2437 },
109 { .center_freq = 2442 },
110 { .center_freq = 2447 },
111 { .center_freq = 2452 },
112 { .center_freq = 2457 },
113 { .center_freq = 2462 },
114 { .center_freq = 2467 },
115 { .center_freq = 2472 },
116 { .center_freq = 2484 },
119 static void rtl8187_iowrite_async_cb(struct urb *urb)
124 static void rtl8187_iowrite_async(struct rtl8187_priv *priv, __le16 addr,
127 struct usb_ctrlrequest *dr;
129 struct rtl8187_async_write_data {
131 struct usb_ctrlrequest dr;
135 buf = kmalloc(sizeof(*buf), GFP_ATOMIC);
139 urb = usb_alloc_urb(0, GFP_ATOMIC);
147 dr->bRequestType = RTL8187_REQT_WRITE;
148 dr->bRequest = RTL8187_REQ_SET_REG;
151 dr->wLength = cpu_to_le16(len);
153 memcpy(buf, data, len);
155 usb_fill_control_urb(urb, priv->udev, usb_sndctrlpipe(priv->udev, 0),
156 (unsigned char *)dr, buf, len,
157 rtl8187_iowrite_async_cb, buf);
158 usb_anchor_urb(urb, &priv->anchored);
159 rc = usb_submit_urb(urb, GFP_ATOMIC);
162 usb_unanchor_urb(urb);
167 static inline void rtl818x_iowrite32_async(struct rtl8187_priv *priv,
168 __le32 *addr, u32 val)
170 __le32 buf = cpu_to_le32(val);
172 rtl8187_iowrite_async(priv, cpu_to_le16((unsigned long)addr),
176 void rtl8187_write_phy(struct ieee80211_hw *dev, u8 addr, u32 data)
178 struct rtl8187_priv *priv = dev->priv;
183 rtl818x_iowrite8(priv, &priv->map->PHY[3], (data >> 24) & 0xFF);
184 rtl818x_iowrite8(priv, &priv->map->PHY[2], (data >> 16) & 0xFF);
185 rtl818x_iowrite8(priv, &priv->map->PHY[1], (data >> 8) & 0xFF);
186 rtl818x_iowrite8(priv, &priv->map->PHY[0], data & 0xFF);
189 static void rtl8187_tx_cb(struct urb *urb)
191 struct sk_buff *skb = (struct sk_buff *)urb->context;
192 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
193 struct ieee80211_hw *hw = info->rate_driver_data[0];
194 struct rtl8187_priv *priv = hw->priv;
196 skb_pull(skb, priv->is_rtl8187b ? sizeof(struct rtl8187b_tx_hdr) :
197 sizeof(struct rtl8187_tx_hdr));
198 ieee80211_tx_info_clear_status(info);
200 if (!(urb->status) && !(info->flags & IEEE80211_TX_CTL_NO_ACK)) {
201 if (priv->is_rtl8187b) {
202 skb_queue_tail(&priv->b_tx_status.queue, skb);
204 /* queue is "full", discard last items */
205 while (skb_queue_len(&priv->b_tx_status.queue) > 5) {
206 struct sk_buff *old_skb;
208 dev_dbg(&priv->udev->dev,
209 "transmit status queue full\n");
211 old_skb = skb_dequeue(&priv->b_tx_status.queue);
212 ieee80211_tx_status_irqsafe(hw, old_skb);
216 info->flags |= IEEE80211_TX_STAT_ACK;
219 if (priv->is_rtl8187b)
220 ieee80211_tx_status_irqsafe(hw, skb);
222 /* Retry information for the RTI8187 is only available by
223 * reading a register in the device. We are in interrupt mode
224 * here, thus queue the skb and finish on a work queue. */
225 skb_queue_tail(&priv->b_tx_status.queue, skb);
226 ieee80211_queue_delayed_work(hw, &priv->work, 0);
230 static void rtl8187_tx(struct ieee80211_hw *dev,
231 struct ieee80211_tx_control *control,
234 struct rtl8187_priv *priv = dev->priv;
235 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
236 struct ieee80211_hdr *tx_hdr = (struct ieee80211_hdr *)(skb->data);
244 urb = usb_alloc_urb(0, GFP_ATOMIC);
251 flags |= RTL818X_TX_DESC_FLAG_NO_ENC;
253 flags |= ieee80211_get_tx_rate(dev, info)->hw_value << 24;
254 if (ieee80211_has_morefrags(tx_hdr->frame_control))
255 flags |= RTL818X_TX_DESC_FLAG_MOREFRAG;
257 /* HW will perform RTS-CTS when only RTS flags is set.
258 * HW will perform CTS-to-self when both RTS and CTS flags are set.
259 * RTS rate and RTS duration will be used also for CTS-to-self.
261 if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_RTS_CTS) {
262 flags |= RTL818X_TX_DESC_FLAG_RTS;
263 flags |= ieee80211_get_rts_cts_rate(dev, info)->hw_value << 19;
264 rts_dur = ieee80211_rts_duration(dev, priv->vif,
266 } else if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_CTS_PROTECT) {
267 flags |= RTL818X_TX_DESC_FLAG_RTS | RTL818X_TX_DESC_FLAG_CTS;
268 flags |= ieee80211_get_rts_cts_rate(dev, info)->hw_value << 19;
269 rts_dur = ieee80211_ctstoself_duration(dev, priv->vif,
273 if (info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
274 if (info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT)
276 tx_hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
277 tx_hdr->seq_ctrl |= cpu_to_le16(priv->seqno);
280 if (!priv->is_rtl8187b) {
281 struct rtl8187_tx_hdr *hdr =
282 (struct rtl8187_tx_hdr *)skb_push(skb, sizeof(*hdr));
283 hdr->flags = cpu_to_le32(flags);
285 hdr->rts_duration = rts_dur;
286 hdr->retry = cpu_to_le32((info->control.rates[0].count - 1) << 8);
291 /* fc needs to be calculated before skb_push() */
292 unsigned int epmap[4] = { 6, 7, 5, 4 };
293 u16 fc = le16_to_cpu(tx_hdr->frame_control);
295 struct rtl8187b_tx_hdr *hdr =
296 (struct rtl8187b_tx_hdr *)skb_push(skb, sizeof(*hdr));
297 struct ieee80211_rate *txrate =
298 ieee80211_get_tx_rate(dev, info);
299 memset(hdr, 0, sizeof(*hdr));
300 hdr->flags = cpu_to_le32(flags);
301 hdr->rts_duration = rts_dur;
302 hdr->retry = cpu_to_le32((info->control.rates[0].count - 1) << 8);
304 ieee80211_generic_frame_duration(dev, priv->vif,
309 if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT)
312 ep = epmap[skb_get_queue_mapping(skb)];
315 info->rate_driver_data[0] = dev;
316 info->rate_driver_data[1] = urb;
318 usb_fill_bulk_urb(urb, priv->udev, usb_sndbulkpipe(priv->udev, ep),
319 buf, skb->len, rtl8187_tx_cb, skb);
320 urb->transfer_flags |= URB_ZERO_PACKET;
321 usb_anchor_urb(urb, &priv->anchored);
322 rc = usb_submit_urb(urb, GFP_ATOMIC);
324 usb_unanchor_urb(urb);
330 static void rtl8187_rx_cb(struct urb *urb)
332 struct sk_buff *skb = (struct sk_buff *)urb->context;
333 struct rtl8187_rx_info *info = (struct rtl8187_rx_info *)skb->cb;
334 struct ieee80211_hw *dev = info->dev;
335 struct rtl8187_priv *priv = dev->priv;
336 struct ieee80211_rx_status rx_status = { 0 };
341 spin_lock_irqsave(&priv->rx_queue.lock, f);
342 __skb_unlink(skb, &priv->rx_queue);
343 spin_unlock_irqrestore(&priv->rx_queue.lock, f);
344 skb_put(skb, urb->actual_length);
346 if (unlikely(urb->status)) {
347 dev_kfree_skb_irq(skb);
351 if (!priv->is_rtl8187b) {
352 struct rtl8187_rx_hdr *hdr =
353 (typeof(hdr))(skb_tail_pointer(skb) - sizeof(*hdr));
354 flags = le32_to_cpu(hdr->flags);
355 /* As with the RTL8187B below, the AGC is used to calculate
356 * signal strength. In this case, the scaling
357 * constants are derived from the output of p54usb.
359 signal = -4 - ((27 * hdr->agc) >> 6);
360 rx_status.antenna = (hdr->signal >> 7) & 1;
361 rx_status.mactime = le64_to_cpu(hdr->mac_time);
363 struct rtl8187b_rx_hdr *hdr =
364 (typeof(hdr))(skb_tail_pointer(skb) - sizeof(*hdr));
365 /* The Realtek datasheet for the RTL8187B shows that the RX
366 * header contains the following quantities: signal quality,
367 * RSSI, AGC, the received power in dB, and the measured SNR.
368 * In testing, none of these quantities show qualitative
369 * agreement with AP signal strength, except for the AGC,
370 * which is inversely proportional to the strength of the
371 * signal. In the following, the signal strength
372 * is derived from the AGC. The arbitrary scaling constants
373 * are chosen to make the results close to the values obtained
374 * for a BCM4312 using b43 as the driver. The noise is ignored
377 flags = le32_to_cpu(hdr->flags);
378 signal = 14 - hdr->agc / 2;
379 rx_status.antenna = (hdr->rssi >> 7) & 1;
380 rx_status.mactime = le64_to_cpu(hdr->mac_time);
383 rx_status.signal = signal;
384 priv->signal = signal;
385 rate = (flags >> 20) & 0xF;
386 skb_trim(skb, flags & 0x0FFF);
387 rx_status.rate_idx = rate;
388 rx_status.freq = dev->conf.chandef.chan->center_freq;
389 rx_status.band = dev->conf.chandef.chan->band;
390 rx_status.flag |= RX_FLAG_MACTIME_START;
391 if (flags & RTL818X_RX_DESC_FLAG_SPLCP)
392 rx_status.flag |= RX_FLAG_SHORTPRE;
393 if (flags & RTL818X_RX_DESC_FLAG_CRC32_ERR)
394 rx_status.flag |= RX_FLAG_FAILED_FCS_CRC;
395 memcpy(IEEE80211_SKB_RXCB(skb), &rx_status, sizeof(rx_status));
396 ieee80211_rx_irqsafe(dev, skb);
398 skb = dev_alloc_skb(RTL8187_MAX_RX);
399 if (unlikely(!skb)) {
400 /* TODO check rx queue length and refill *somewhere* */
404 info = (struct rtl8187_rx_info *)skb->cb;
407 urb->transfer_buffer = skb_tail_pointer(skb);
409 skb_queue_tail(&priv->rx_queue, skb);
411 usb_anchor_urb(urb, &priv->anchored);
412 if (usb_submit_urb(urb, GFP_ATOMIC)) {
413 usb_unanchor_urb(urb);
414 skb_unlink(skb, &priv->rx_queue);
415 dev_kfree_skb_irq(skb);
419 static int rtl8187_init_urbs(struct ieee80211_hw *dev)
421 struct rtl8187_priv *priv = dev->priv;
422 struct urb *entry = NULL;
424 struct rtl8187_rx_info *info;
427 while (skb_queue_len(&priv->rx_queue) < 32) {
428 skb = __dev_alloc_skb(RTL8187_MAX_RX, GFP_KERNEL);
433 entry = usb_alloc_urb(0, GFP_KERNEL);
438 usb_fill_bulk_urb(entry, priv->udev,
439 usb_rcvbulkpipe(priv->udev,
440 priv->is_rtl8187b ? 3 : 1),
441 skb_tail_pointer(skb),
442 RTL8187_MAX_RX, rtl8187_rx_cb, skb);
443 info = (struct rtl8187_rx_info *)skb->cb;
446 skb_queue_tail(&priv->rx_queue, skb);
447 usb_anchor_urb(entry, &priv->anchored);
448 ret = usb_submit_urb(entry, GFP_KERNEL);
450 skb_unlink(skb, &priv->rx_queue);
451 usb_unanchor_urb(entry);
461 usb_kill_anchored_urbs(&priv->anchored);
465 static void rtl8187b_status_cb(struct urb *urb)
467 struct ieee80211_hw *hw = (struct ieee80211_hw *)urb->context;
468 struct rtl8187_priv *priv = hw->priv;
470 unsigned int cmd_type;
472 if (unlikely(urb->status))
476 * Read from status buffer:
478 * bits [30:31] = cmd type:
479 * - 0 indicates tx beacon interrupt
480 * - 1 indicates tx close descriptor
482 * In the case of tx beacon interrupt:
483 * [0:9] = Last Beacon CW
486 * [32:63] = Last Beacon TSF
488 * If it's tx close descriptor:
489 * [0:7] = Packet Retry Count
490 * [8:14] = RTS Retry Count
492 * [16:27] = Sequence No
496 * [32:47] = unused (reserved?)
497 * [48:63] = MAC Used Time
499 val = le64_to_cpu(priv->b_tx_status.buf);
501 cmd_type = (val >> 30) & 0x3;
503 unsigned int pkt_rc, seq_no;
506 struct ieee80211_hdr *ieee80211hdr;
510 tok = val & (1 << 15);
511 seq_no = (val >> 16) & 0xFFF;
513 spin_lock_irqsave(&priv->b_tx_status.queue.lock, flags);
514 skb_queue_reverse_walk(&priv->b_tx_status.queue, skb) {
515 ieee80211hdr = (struct ieee80211_hdr *)skb->data;
518 * While testing, it was discovered that the seq_no
519 * doesn't actually contains the sequence number.
520 * Instead of returning just the 12 bits of sequence
521 * number, hardware is returning entire sequence control
522 * (fragment number plus sequence number) in a 12 bit
523 * only field overflowing after some time. As a
524 * workaround, just consider the lower bits, and expect
525 * it's unlikely we wrongly ack some sent data
527 if ((le16_to_cpu(ieee80211hdr->seq_ctrl)
531 if (skb != (struct sk_buff *) &priv->b_tx_status.queue) {
532 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
534 __skb_unlink(skb, &priv->b_tx_status.queue);
536 info->flags |= IEEE80211_TX_STAT_ACK;
537 info->status.rates[0].count = pkt_rc + 1;
539 ieee80211_tx_status_irqsafe(hw, skb);
541 spin_unlock_irqrestore(&priv->b_tx_status.queue.lock, flags);
544 usb_anchor_urb(urb, &priv->anchored);
545 if (usb_submit_urb(urb, GFP_ATOMIC))
546 usb_unanchor_urb(urb);
549 static int rtl8187b_init_status_urb(struct ieee80211_hw *dev)
551 struct rtl8187_priv *priv = dev->priv;
555 entry = usb_alloc_urb(0, GFP_KERNEL);
559 usb_fill_bulk_urb(entry, priv->udev, usb_rcvbulkpipe(priv->udev, 9),
560 &priv->b_tx_status.buf, sizeof(priv->b_tx_status.buf),
561 rtl8187b_status_cb, dev);
563 usb_anchor_urb(entry, &priv->anchored);
564 ret = usb_submit_urb(entry, GFP_KERNEL);
566 usb_unanchor_urb(entry);
572 static void rtl8187_set_anaparam(struct rtl8187_priv *priv, bool rfon)
574 u32 anaparam, anaparam2;
577 if (!priv->is_rtl8187b) {
579 anaparam = RTL8187_RTL8225_ANAPARAM_ON;
580 anaparam2 = RTL8187_RTL8225_ANAPARAM2_ON;
582 anaparam = RTL8187_RTL8225_ANAPARAM_OFF;
583 anaparam2 = RTL8187_RTL8225_ANAPARAM2_OFF;
587 anaparam = RTL8187B_RTL8225_ANAPARAM_ON;
588 anaparam2 = RTL8187B_RTL8225_ANAPARAM2_ON;
589 anaparam3 = RTL8187B_RTL8225_ANAPARAM3_ON;
591 anaparam = RTL8187B_RTL8225_ANAPARAM_OFF;
592 anaparam2 = RTL8187B_RTL8225_ANAPARAM2_OFF;
593 anaparam3 = RTL8187B_RTL8225_ANAPARAM3_OFF;
597 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
598 RTL818X_EEPROM_CMD_CONFIG);
599 reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
600 reg |= RTL818X_CONFIG3_ANAPARAM_WRITE;
601 rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg);
602 rtl818x_iowrite32(priv, &priv->map->ANAPARAM, anaparam);
603 rtl818x_iowrite32(priv, &priv->map->ANAPARAM2, anaparam2);
604 if (priv->is_rtl8187b)
605 rtl818x_iowrite8(priv, &priv->map->ANAPARAM3A, anaparam3);
606 reg &= ~RTL818X_CONFIG3_ANAPARAM_WRITE;
607 rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg);
608 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
609 RTL818X_EEPROM_CMD_NORMAL);
612 static int rtl8187_cmd_reset(struct ieee80211_hw *dev)
614 struct rtl8187_priv *priv = dev->priv;
618 reg = rtl818x_ioread8(priv, &priv->map->CMD);
620 reg |= RTL818X_CMD_RESET;
621 rtl818x_iowrite8(priv, &priv->map->CMD, reg);
626 if (!(rtl818x_ioread8(priv, &priv->map->CMD) &
632 wiphy_err(dev->wiphy, "Reset timeout!\n");
636 /* reload registers from eeprom */
637 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_LOAD);
642 if (!(rtl818x_ioread8(priv, &priv->map->EEPROM_CMD) &
643 RTL818X_EEPROM_CMD_CONFIG))
648 wiphy_err(dev->wiphy, "eeprom reset timeout!\n");
655 static int rtl8187_init_hw(struct ieee80211_hw *dev)
657 struct rtl8187_priv *priv = dev->priv;
662 rtl8187_set_anaparam(priv, true);
664 rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0);
667 rtl818x_iowrite8(priv, (u8 *)0xFE18, 0x10);
668 rtl818x_iowrite8(priv, (u8 *)0xFE18, 0x11);
669 rtl818x_iowrite8(priv, (u8 *)0xFE18, 0x00);
672 res = rtl8187_cmd_reset(dev);
676 rtl8187_set_anaparam(priv, true);
679 rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0);
680 rtl818x_iowrite8(priv, &priv->map->GPIO0, 0);
682 rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, (4 << 8));
683 rtl818x_iowrite8(priv, &priv->map->GPIO0, 1);
684 rtl818x_iowrite8(priv, &priv->map->GP_ENABLE, 0);
686 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
688 rtl818x_iowrite16(priv, (__le16 *)0xFFF4, 0xFFFF);
689 reg = rtl818x_ioread8(priv, &priv->map->CONFIG1);
692 rtl818x_iowrite8(priv, &priv->map->CONFIG1, reg);
694 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
696 rtl818x_iowrite32(priv, &priv->map->INT_TIMEOUT, 0);
697 rtl818x_iowrite8(priv, &priv->map->WPA_CONF, 0);
698 rtl818x_iowrite8(priv, &priv->map->RATE_FALLBACK, 0);
700 // TODO: set RESP_RATE and BRSR properly
701 rtl818x_iowrite8(priv, &priv->map->RESP_RATE, (8 << 4) | 0);
702 rtl818x_iowrite16(priv, &priv->map->BRSR, 0x01F3);
705 rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0);
706 rtl818x_iowrite8(priv, &priv->map->GPIO0, 0);
707 reg = rtl818x_ioread8(priv, (u8 *)0xFE53);
708 rtl818x_iowrite8(priv, (u8 *)0xFE53, reg | (1 << 7));
709 rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, (4 << 8));
710 rtl818x_iowrite8(priv, &priv->map->GPIO0, 0x20);
711 rtl818x_iowrite8(priv, &priv->map->GP_ENABLE, 0);
712 rtl818x_iowrite16(priv, &priv->map->RFPinsOutput, 0x80);
713 rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0x80);
714 rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, 0x80);
717 rtl818x_iowrite32(priv, &priv->map->RF_TIMING, 0x000a8008);
718 rtl818x_iowrite16(priv, &priv->map->BRSR, 0xFFFF);
719 rtl818x_iowrite32(priv, &priv->map->RF_PARA, 0x00100044);
720 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
721 RTL818X_EEPROM_CMD_CONFIG);
722 rtl818x_iowrite8(priv, &priv->map->CONFIG3, 0x44);
723 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
724 RTL818X_EEPROM_CMD_NORMAL);
725 rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, 0x1FF7);
730 rtl818x_iowrite16(priv, &priv->map->BRSR, 0x01F3);
731 reg = rtl818x_ioread8(priv, &priv->map->PGSELECT) & ~1;
732 rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg | 1);
733 rtl818x_iowrite16(priv, (__le16 *)0xFFFE, 0x10);
734 rtl818x_iowrite8(priv, &priv->map->TALLY_SEL, 0x80);
735 rtl818x_iowrite8(priv, (u8 *)0xFFFF, 0x60);
736 rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg);
741 static const u8 rtl8187b_reg_table[][3] = {
742 {0xF0, 0x32, 0}, {0xF1, 0x32, 0}, {0xF2, 0x00, 0}, {0xF3, 0x00, 0},
743 {0xF4, 0x32, 0}, {0xF5, 0x43, 0}, {0xF6, 0x00, 0}, {0xF7, 0x00, 0},
744 {0xF8, 0x46, 0}, {0xF9, 0xA4, 0}, {0xFA, 0x00, 0}, {0xFB, 0x00, 0},
745 {0xFC, 0x96, 0}, {0xFD, 0xA4, 0}, {0xFE, 0x00, 0}, {0xFF, 0x00, 0},
747 {0x58, 0x4B, 1}, {0x59, 0x00, 1}, {0x5A, 0x4B, 1}, {0x5B, 0x00, 1},
748 {0x60, 0x4B, 1}, {0x61, 0x09, 1}, {0x62, 0x4B, 1}, {0x63, 0x09, 1},
749 {0xCE, 0x0F, 1}, {0xCF, 0x00, 1}, {0xF0, 0x4E, 1}, {0xF1, 0x01, 1},
750 {0xF2, 0x02, 1}, {0xF3, 0x03, 1}, {0xF4, 0x04, 1}, {0xF5, 0x05, 1},
751 {0xF6, 0x06, 1}, {0xF7, 0x07, 1}, {0xF8, 0x08, 1},
753 {0x4E, 0x00, 2}, {0x0C, 0x04, 2}, {0x21, 0x61, 2}, {0x22, 0x68, 2},
754 {0x23, 0x6F, 2}, {0x24, 0x76, 2}, {0x25, 0x7D, 2}, {0x26, 0x84, 2},
755 {0x27, 0x8D, 2}, {0x4D, 0x08, 2}, {0x50, 0x05, 2}, {0x51, 0xF5, 2},
756 {0x52, 0x04, 2}, {0x53, 0xA0, 2}, {0x54, 0x1F, 2}, {0x55, 0x23, 2},
757 {0x56, 0x45, 2}, {0x57, 0x67, 2}, {0x58, 0x08, 2}, {0x59, 0x08, 2},
758 {0x5A, 0x08, 2}, {0x5B, 0x08, 2}, {0x60, 0x08, 2}, {0x61, 0x08, 2},
759 {0x62, 0x08, 2}, {0x63, 0x08, 2}, {0x64, 0xCF, 2},
761 {0x5B, 0x40, 0}, {0x84, 0x88, 0}, {0x85, 0x24, 0}, {0x88, 0x54, 0},
762 {0x8B, 0xB8, 0}, {0x8C, 0x07, 0}, {0x8D, 0x00, 0}, {0x94, 0x1B, 0},
763 {0x95, 0x12, 0}, {0x96, 0x00, 0}, {0x97, 0x06, 0}, {0x9D, 0x1A, 0},
764 {0x9F, 0x10, 0}, {0xB4, 0x22, 0}, {0xBE, 0x80, 0}, {0xDB, 0x00, 0},
765 {0xEE, 0x00, 0}, {0x4C, 0x00, 2},
767 {0x9F, 0x00, 3}, {0x8C, 0x01, 0}, {0x8D, 0x10, 0}, {0x8E, 0x08, 0},
771 static int rtl8187b_init_hw(struct ieee80211_hw *dev)
773 struct rtl8187_priv *priv = dev->priv;
777 rtl8187_set_anaparam(priv, true);
779 /* Reset PLL sequence on 8187B. Realtek note: reduces power
780 * consumption about 30 mA */
781 rtl818x_iowrite8(priv, (u8 *)0xFF61, 0x10);
782 reg = rtl818x_ioread8(priv, (u8 *)0xFF62);
783 rtl818x_iowrite8(priv, (u8 *)0xFF62, reg & ~(1 << 5));
784 rtl818x_iowrite8(priv, (u8 *)0xFF62, reg | (1 << 5));
786 res = rtl8187_cmd_reset(dev);
790 rtl8187_set_anaparam(priv, true);
792 /* BRSR (Basic Rate Set Register) on 8187B looks to be the same as
793 * RESP_RATE on 8187L in Realtek sources: each bit should be each
794 * one of the 12 rates, all are enabled */
795 rtl818x_iowrite16(priv, (__le16 *)0xFF34, 0x0FFF);
797 reg = rtl818x_ioread8(priv, &priv->map->CW_CONF);
798 reg |= RTL818X_CW_CONF_PERPACKET_RETRY;
799 rtl818x_iowrite8(priv, &priv->map->CW_CONF, reg);
801 /* Auto Rate Fallback Register (ARFR): 1M-54M setting */
802 rtl818x_iowrite16_idx(priv, (__le16 *)0xFFE0, 0x0FFF, 1);
803 rtl818x_iowrite8_idx(priv, (u8 *)0xFFE2, 0x00, 1);
805 rtl818x_iowrite16_idx(priv, (__le16 *)0xFFD4, 0xFFFF, 1);
807 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
808 RTL818X_EEPROM_CMD_CONFIG);
809 reg = rtl818x_ioread8(priv, &priv->map->CONFIG1);
810 rtl818x_iowrite8(priv, &priv->map->CONFIG1, (reg & 0x3F) | 0x80);
811 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
812 RTL818X_EEPROM_CMD_NORMAL);
814 rtl818x_iowrite8(priv, &priv->map->WPA_CONF, 0);
815 for (i = 0; i < ARRAY_SIZE(rtl8187b_reg_table); i++) {
816 rtl818x_iowrite8_idx(priv,
818 (rtl8187b_reg_table[i][0] | 0xFF00),
819 rtl8187b_reg_table[i][1],
820 rtl8187b_reg_table[i][2]);
823 rtl818x_iowrite16(priv, &priv->map->TID_AC_MAP, 0xFA50);
824 rtl818x_iowrite16(priv, &priv->map->INT_MIG, 0);
826 rtl818x_iowrite32_idx(priv, (__le32 *)0xFFF0, 0, 1);
827 rtl818x_iowrite32_idx(priv, (__le32 *)0xFFF4, 0, 1);
828 rtl818x_iowrite8_idx(priv, (u8 *)0xFFF8, 0, 1);
830 rtl818x_iowrite32(priv, &priv->map->RF_TIMING, 0x00004001);
832 /* RFSW_CTRL register */
833 rtl818x_iowrite16_idx(priv, (__le16 *)0xFF72, 0x569A, 2);
835 rtl818x_iowrite16(priv, &priv->map->RFPinsOutput, 0x0480);
836 rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0x2488);
837 rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, 0x1FFF);
842 reg = RTL818X_CMD_TX_ENABLE | RTL818X_CMD_RX_ENABLE;
843 rtl818x_iowrite8(priv, &priv->map->CMD, reg);
844 rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0xFFFF);
846 rtl818x_iowrite8(priv, (u8 *)0xFE41, 0xF4);
847 rtl818x_iowrite8(priv, (u8 *)0xFE40, 0x00);
848 rtl818x_iowrite8(priv, (u8 *)0xFE42, 0x00);
849 rtl818x_iowrite8(priv, (u8 *)0xFE42, 0x01);
850 rtl818x_iowrite8(priv, (u8 *)0xFE40, 0x0F);
851 rtl818x_iowrite8(priv, (u8 *)0xFE42, 0x00);
852 rtl818x_iowrite8(priv, (u8 *)0xFE42, 0x01);
854 reg = rtl818x_ioread8(priv, (u8 *)0xFFDB);
855 rtl818x_iowrite8(priv, (u8 *)0xFFDB, reg | (1 << 2));
856 rtl818x_iowrite16_idx(priv, (__le16 *)0xFF72, 0x59FA, 3);
857 rtl818x_iowrite16_idx(priv, (__le16 *)0xFF74, 0x59D2, 3);
858 rtl818x_iowrite16_idx(priv, (__le16 *)0xFF76, 0x59D2, 3);
859 rtl818x_iowrite16_idx(priv, (__le16 *)0xFF78, 0x19FA, 3);
860 rtl818x_iowrite16_idx(priv, (__le16 *)0xFF7A, 0x19FA, 3);
861 rtl818x_iowrite16_idx(priv, (__le16 *)0xFF7C, 0x00D0, 3);
862 rtl818x_iowrite8(priv, (u8 *)0xFF61, 0);
863 rtl818x_iowrite8_idx(priv, (u8 *)0xFF80, 0x0F, 1);
864 rtl818x_iowrite8_idx(priv, (u8 *)0xFF83, 0x03, 1);
865 rtl818x_iowrite8(priv, (u8 *)0xFFDA, 0x10);
866 rtl818x_iowrite8_idx(priv, (u8 *)0xFF4D, 0x08, 2);
868 rtl818x_iowrite32(priv, &priv->map->HSSI_PARA, 0x0600321B);
870 rtl818x_iowrite16_idx(priv, (__le16 *)0xFFEC, 0x0800, 1);
872 priv->slot_time = 0x9;
873 priv->aifsn[0] = 2; /* AIFSN[AC_VO] */
874 priv->aifsn[1] = 2; /* AIFSN[AC_VI] */
875 priv->aifsn[2] = 7; /* AIFSN[AC_BK] */
876 priv->aifsn[3] = 3; /* AIFSN[AC_BE] */
877 rtl818x_iowrite8(priv, &priv->map->ACM_CONTROL, 0);
879 /* ENEDCA flag must always be set, transmit issues? */
880 rtl818x_iowrite8(priv, &priv->map->MSR, RTL818X_MSR_ENEDCA);
885 static void rtl8187_work(struct work_struct *work)
887 /* The RTL8187 returns the retry count through register 0xFFFA. In
888 * addition, it appears to be a cumulative retry count, not the
889 * value for the current TX packet. When multiple TX entries are
890 * waiting in the queue, the retry count will be the total for all.
891 * The "error" may matter for purposes of rate setting, but there is
892 * no other choice with this hardware.
894 struct rtl8187_priv *priv = container_of(work, struct rtl8187_priv,
896 struct ieee80211_tx_info *info;
897 struct ieee80211_hw *dev = priv->dev;
903 mutex_lock(&priv->conf_mutex);
904 tmp = rtl818x_ioread16(priv, (__le16 *)0xFFFA);
905 length = skb_queue_len(&priv->b_tx_status.queue);
906 if (unlikely(!length))
908 if (unlikely(tmp < retry))
910 avg_retry = (tmp - retry) / length;
911 while (skb_queue_len(&priv->b_tx_status.queue) > 0) {
912 struct sk_buff *old_skb;
914 old_skb = skb_dequeue(&priv->b_tx_status.queue);
915 info = IEEE80211_SKB_CB(old_skb);
916 info->status.rates[0].count = avg_retry + 1;
917 if (info->status.rates[0].count > RETRY_COUNT)
918 info->flags &= ~IEEE80211_TX_STAT_ACK;
919 ieee80211_tx_status_irqsafe(dev, old_skb);
922 mutex_unlock(&priv->conf_mutex);
925 static int rtl8187_start(struct ieee80211_hw *dev)
927 struct rtl8187_priv *priv = dev->priv;
931 mutex_lock(&priv->conf_mutex);
933 ret = (!priv->is_rtl8187b) ? rtl8187_init_hw(dev) :
934 rtl8187b_init_hw(dev);
936 goto rtl8187_start_exit;
938 init_usb_anchor(&priv->anchored);
941 if (priv->is_rtl8187b) {
942 reg = RTL818X_RX_CONF_MGMT |
943 RTL818X_RX_CONF_DATA |
944 RTL818X_RX_CONF_BROADCAST |
945 RTL818X_RX_CONF_NICMAC |
946 RTL818X_RX_CONF_BSSID |
947 (7 << 13 /* RX FIFO threshold NONE */) |
948 (7 << 10 /* MAX RX DMA */) |
949 RTL818X_RX_CONF_RX_AUTORESETPHY |
950 RTL818X_RX_CONF_ONLYERLPKT |
951 RTL818X_RX_CONF_MULTICAST;
953 rtl818x_iowrite32(priv, &priv->map->RX_CONF, reg);
955 reg = rtl818x_ioread8(priv, &priv->map->TX_AGC_CTL);
956 reg &= ~RTL818X_TX_AGC_CTL_PERPACKET_GAIN;
957 reg &= ~RTL818X_TX_AGC_CTL_PERPACKET_ANTSEL;
958 reg &= ~RTL818X_TX_AGC_CTL_FEEDBACK_ANT;
959 rtl818x_iowrite8(priv, &priv->map->TX_AGC_CTL, reg);
961 rtl818x_iowrite32(priv, &priv->map->TX_CONF,
962 RTL818X_TX_CONF_HW_SEQNUM |
963 RTL818X_TX_CONF_DISREQQSIZE |
964 (RETRY_COUNT << 8 /* short retry limit */) |
965 (RETRY_COUNT << 0 /* long retry limit */) |
966 (7 << 21 /* MAX TX DMA */));
967 ret = rtl8187_init_urbs(dev);
969 goto rtl8187_start_exit;
970 ret = rtl8187b_init_status_urb(dev);
972 usb_kill_anchored_urbs(&priv->anchored);
973 goto rtl8187_start_exit;
976 rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0xFFFF);
978 rtl818x_iowrite32(priv, &priv->map->MAR[0], ~0);
979 rtl818x_iowrite32(priv, &priv->map->MAR[1], ~0);
981 ret = rtl8187_init_urbs(dev);
983 goto rtl8187_start_exit;
985 reg = RTL818X_RX_CONF_ONLYERLPKT |
986 RTL818X_RX_CONF_RX_AUTORESETPHY |
987 RTL818X_RX_CONF_BSSID |
988 RTL818X_RX_CONF_MGMT |
989 RTL818X_RX_CONF_DATA |
990 (7 << 13 /* RX FIFO threshold NONE */) |
991 (7 << 10 /* MAX RX DMA */) |
992 RTL818X_RX_CONF_BROADCAST |
993 RTL818X_RX_CONF_NICMAC;
996 rtl818x_iowrite32(priv, &priv->map->RX_CONF, reg);
998 reg = rtl818x_ioread8(priv, &priv->map->CW_CONF);
999 reg &= ~RTL818X_CW_CONF_PERPACKET_CW;
1000 reg |= RTL818X_CW_CONF_PERPACKET_RETRY;
1001 rtl818x_iowrite8(priv, &priv->map->CW_CONF, reg);
1003 reg = rtl818x_ioread8(priv, &priv->map->TX_AGC_CTL);
1004 reg &= ~RTL818X_TX_AGC_CTL_PERPACKET_GAIN;
1005 reg &= ~RTL818X_TX_AGC_CTL_PERPACKET_ANTSEL;
1006 reg &= ~RTL818X_TX_AGC_CTL_FEEDBACK_ANT;
1007 rtl818x_iowrite8(priv, &priv->map->TX_AGC_CTL, reg);
1009 reg = RTL818X_TX_CONF_CW_MIN |
1010 (7 << 21 /* MAX TX DMA */) |
1011 RTL818X_TX_CONF_NO_ICV;
1012 rtl818x_iowrite32(priv, &priv->map->TX_CONF, reg);
1014 reg = rtl818x_ioread8(priv, &priv->map->CMD);
1015 reg |= RTL818X_CMD_TX_ENABLE;
1016 reg |= RTL818X_CMD_RX_ENABLE;
1017 rtl818x_iowrite8(priv, &priv->map->CMD, reg);
1018 INIT_DELAYED_WORK(&priv->work, rtl8187_work);
1021 mutex_unlock(&priv->conf_mutex);
1025 static void rtl8187_stop(struct ieee80211_hw *dev)
1027 struct rtl8187_priv *priv = dev->priv;
1028 struct sk_buff *skb;
1031 mutex_lock(&priv->conf_mutex);
1032 rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0);
1034 reg = rtl818x_ioread8(priv, &priv->map->CMD);
1035 reg &= ~RTL818X_CMD_TX_ENABLE;
1036 reg &= ~RTL818X_CMD_RX_ENABLE;
1037 rtl818x_iowrite8(priv, &priv->map->CMD, reg);
1039 priv->rf->stop(dev);
1040 rtl8187_set_anaparam(priv, false);
1042 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
1043 reg = rtl818x_ioread8(priv, &priv->map->CONFIG4);
1044 rtl818x_iowrite8(priv, &priv->map->CONFIG4, reg | RTL818X_CONFIG4_VCOOFF);
1045 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
1047 while ((skb = skb_dequeue(&priv->b_tx_status.queue)))
1048 dev_kfree_skb_any(skb);
1050 usb_kill_anchored_urbs(&priv->anchored);
1051 mutex_unlock(&priv->conf_mutex);
1053 if (!priv->is_rtl8187b)
1054 cancel_delayed_work_sync(&priv->work);
1057 static u64 rtl8187_get_tsf(struct ieee80211_hw *dev, struct ieee80211_vif *vif)
1059 struct rtl8187_priv *priv = dev->priv;
1061 return rtl818x_ioread32(priv, &priv->map->TSFT[0]) |
1062 (u64)(rtl818x_ioread32(priv, &priv->map->TSFT[1])) << 32;
1066 static void rtl8187_beacon_work(struct work_struct *work)
1068 struct rtl8187_vif *vif_priv =
1069 container_of(work, struct rtl8187_vif, beacon_work.work);
1070 struct ieee80211_vif *vif =
1071 container_of((void *)vif_priv, struct ieee80211_vif, drv_priv);
1072 struct ieee80211_hw *dev = vif_priv->dev;
1073 struct ieee80211_mgmt *mgmt;
1074 struct sk_buff *skb;
1076 /* don't overflow the tx ring */
1077 if (ieee80211_queue_stopped(dev, 0))
1080 /* grab a fresh beacon */
1081 skb = ieee80211_beacon_get(dev, vif);
1086 * update beacon timestamp w/ TSF value
1087 * TODO: make hardware update beacon timestamp
1089 mgmt = (struct ieee80211_mgmt *)skb->data;
1090 mgmt->u.beacon.timestamp = cpu_to_le64(rtl8187_get_tsf(dev, vif));
1092 /* TODO: use actual beacon queue */
1093 skb_set_queue_mapping(skb, 0);
1095 rtl8187_tx(dev, NULL, skb);
1099 * schedule next beacon
1100 * TODO: use hardware support for beacon timing
1102 schedule_delayed_work(&vif_priv->beacon_work,
1103 usecs_to_jiffies(1024 * vif->bss_conf.beacon_int));
1107 static int rtl8187_add_interface(struct ieee80211_hw *dev,
1108 struct ieee80211_vif *vif)
1110 struct rtl8187_priv *priv = dev->priv;
1111 struct rtl8187_vif *vif_priv;
1113 int ret = -EOPNOTSUPP;
1115 mutex_lock(&priv->conf_mutex);
1119 switch (vif->type) {
1120 case NL80211_IFTYPE_STATION:
1121 case NL80211_IFTYPE_ADHOC:
1130 /* Initialize driver private area */
1131 vif_priv = (struct rtl8187_vif *)&vif->drv_priv;
1132 vif_priv->dev = dev;
1133 INIT_DELAYED_WORK(&vif_priv->beacon_work, rtl8187_beacon_work);
1134 vif_priv->enable_beacon = false;
1137 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
1138 for (i = 0; i < ETH_ALEN; i++)
1139 rtl818x_iowrite8(priv, &priv->map->MAC[i],
1140 ((u8 *)vif->addr)[i]);
1141 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
1144 mutex_unlock(&priv->conf_mutex);
1148 static void rtl8187_remove_interface(struct ieee80211_hw *dev,
1149 struct ieee80211_vif *vif)
1151 struct rtl8187_priv *priv = dev->priv;
1152 mutex_lock(&priv->conf_mutex);
1154 mutex_unlock(&priv->conf_mutex);
1157 static int rtl8187_config(struct ieee80211_hw *dev, u32 changed)
1159 struct rtl8187_priv *priv = dev->priv;
1160 struct ieee80211_conf *conf = &dev->conf;
1163 mutex_lock(&priv->conf_mutex);
1164 reg = rtl818x_ioread32(priv, &priv->map->TX_CONF);
1165 /* Enable TX loopback on MAC level to avoid TX during channel
1166 * changes, as this has be seen to causes problems and the
1167 * card will stop work until next reset
1169 rtl818x_iowrite32(priv, &priv->map->TX_CONF,
1170 reg | RTL818X_TX_CONF_LOOPBACK_MAC);
1171 priv->rf->set_chan(dev, conf);
1173 rtl818x_iowrite32(priv, &priv->map->TX_CONF, reg);
1175 rtl818x_iowrite16(priv, &priv->map->ATIM_WND, 2);
1176 rtl818x_iowrite16(priv, &priv->map->ATIMTR_INTERVAL, 100);
1177 rtl818x_iowrite16(priv, &priv->map->BEACON_INTERVAL, 100);
1178 rtl818x_iowrite16(priv, &priv->map->BEACON_INTERVAL_TIME, 100);
1179 mutex_unlock(&priv->conf_mutex);
1184 * With 8187B, AC_*_PARAM clashes with FEMR definition in struct rtl818x_csr for
1185 * example. Thus we have to use raw values for AC_*_PARAM register addresses.
1187 static __le32 *rtl8187b_ac_addr[4] = {
1188 (__le32 *) 0xFFF0, /* AC_VO */
1189 (__le32 *) 0xFFF4, /* AC_VI */
1190 (__le32 *) 0xFFFC, /* AC_BK */
1191 (__le32 *) 0xFFF8, /* AC_BE */
1194 #define SIFS_TIME 0xa
1196 static void rtl8187_conf_erp(struct rtl8187_priv *priv, bool use_short_slot,
1197 bool use_short_preamble)
1199 if (priv->is_rtl8187b) {
1204 if (use_short_slot) {
1205 priv->slot_time = 0x9;
1209 priv->slot_time = 0x14;
1213 rtl818x_iowrite8(priv, &priv->map->SIFS, 0x22);
1214 rtl818x_iowrite8(priv, &priv->map->SLOT, priv->slot_time);
1215 rtl818x_iowrite8(priv, &priv->map->DIFS, difs);
1218 * BRSR+1 on 8187B is in fact EIFS register
1219 * Value in units of 4 us
1221 rtl818x_iowrite8(priv, (u8 *)&priv->map->BRSR + 1, eifs);
1224 * For 8187B, CARRIER_SENSE_COUNTER is in fact ack timeout
1225 * register. In units of 4 us like eifs register
1226 * ack_timeout = ack duration + plcp + difs + preamble
1228 ack_timeout = 112 + 48 + difs;
1229 if (use_short_preamble)
1233 rtl818x_iowrite8(priv, &priv->map->CARRIER_SENSE_COUNTER,
1234 DIV_ROUND_UP(ack_timeout, 4));
1236 for (queue = 0; queue < 4; queue++)
1237 rtl818x_iowrite8(priv, (u8 *) rtl8187b_ac_addr[queue],
1238 priv->aifsn[queue] * priv->slot_time +
1241 rtl818x_iowrite8(priv, &priv->map->SIFS, 0x22);
1242 if (use_short_slot) {
1243 rtl818x_iowrite8(priv, &priv->map->SLOT, 0x9);
1244 rtl818x_iowrite8(priv, &priv->map->DIFS, 0x14);
1245 rtl818x_iowrite8(priv, &priv->map->EIFS, 91 - 0x14);
1247 rtl818x_iowrite8(priv, &priv->map->SLOT, 0x14);
1248 rtl818x_iowrite8(priv, &priv->map->DIFS, 0x24);
1249 rtl818x_iowrite8(priv, &priv->map->EIFS, 91 - 0x24);
1254 static void rtl8187_bss_info_changed(struct ieee80211_hw *dev,
1255 struct ieee80211_vif *vif,
1256 struct ieee80211_bss_conf *info,
1259 struct rtl8187_priv *priv = dev->priv;
1260 struct rtl8187_vif *vif_priv;
1264 vif_priv = (struct rtl8187_vif *)&vif->drv_priv;
1266 if (changed & BSS_CHANGED_BSSID) {
1267 mutex_lock(&priv->conf_mutex);
1268 for (i = 0; i < ETH_ALEN; i++)
1269 rtl818x_iowrite8(priv, &priv->map->BSSID[i],
1272 if (priv->is_rtl8187b)
1273 reg = RTL818X_MSR_ENEDCA;
1277 if (is_valid_ether_addr(info->bssid)) {
1278 if (vif->type == NL80211_IFTYPE_ADHOC)
1279 reg |= RTL818X_MSR_ADHOC;
1281 reg |= RTL818X_MSR_INFRA;
1284 reg |= RTL818X_MSR_NO_LINK;
1286 rtl818x_iowrite8(priv, &priv->map->MSR, reg);
1288 mutex_unlock(&priv->conf_mutex);
1291 if (changed & (BSS_CHANGED_ERP_SLOT | BSS_CHANGED_ERP_PREAMBLE))
1292 rtl8187_conf_erp(priv, info->use_short_slot,
1293 info->use_short_preamble);
1295 if (changed & BSS_CHANGED_BEACON_ENABLED)
1296 vif_priv->enable_beacon = info->enable_beacon;
1298 if (changed & (BSS_CHANGED_BEACON_ENABLED | BSS_CHANGED_BEACON)) {
1299 cancel_delayed_work_sync(&vif_priv->beacon_work);
1300 if (vif_priv->enable_beacon)
1301 schedule_work(&vif_priv->beacon_work.work);
1306 static u64 rtl8187_prepare_multicast(struct ieee80211_hw *dev,
1307 struct netdev_hw_addr_list *mc_list)
1309 return netdev_hw_addr_list_count(mc_list);
1312 static void rtl8187_configure_filter(struct ieee80211_hw *dev,
1313 unsigned int changed_flags,
1314 unsigned int *total_flags,
1317 struct rtl8187_priv *priv = dev->priv;
1319 if (changed_flags & FIF_FCSFAIL)
1320 priv->rx_conf ^= RTL818X_RX_CONF_FCS;
1321 if (changed_flags & FIF_CONTROL)
1322 priv->rx_conf ^= RTL818X_RX_CONF_CTRL;
1323 if (changed_flags & FIF_OTHER_BSS)
1324 priv->rx_conf ^= RTL818X_RX_CONF_MONITOR;
1325 if (*total_flags & FIF_ALLMULTI || multicast > 0)
1326 priv->rx_conf |= RTL818X_RX_CONF_MULTICAST;
1328 priv->rx_conf &= ~RTL818X_RX_CONF_MULTICAST;
1332 if (priv->rx_conf & RTL818X_RX_CONF_FCS)
1333 *total_flags |= FIF_FCSFAIL;
1334 if (priv->rx_conf & RTL818X_RX_CONF_CTRL)
1335 *total_flags |= FIF_CONTROL;
1336 if (priv->rx_conf & RTL818X_RX_CONF_MONITOR)
1337 *total_flags |= FIF_OTHER_BSS;
1338 if (priv->rx_conf & RTL818X_RX_CONF_MULTICAST)
1339 *total_flags |= FIF_ALLMULTI;
1341 rtl818x_iowrite32_async(priv, &priv->map->RX_CONF, priv->rx_conf);
1344 static int rtl8187_conf_tx(struct ieee80211_hw *dev,
1345 struct ieee80211_vif *vif, u16 queue,
1346 const struct ieee80211_tx_queue_params *params)
1348 struct rtl8187_priv *priv = dev->priv;
1354 cw_min = fls(params->cw_min);
1355 cw_max = fls(params->cw_max);
1357 if (priv->is_rtl8187b) {
1358 priv->aifsn[queue] = params->aifs;
1361 * This is the structure of AC_*_PARAM registers in 8187B:
1362 * - TXOP limit field, bit offset = 16
1363 * - ECWmax, bit offset = 12
1364 * - ECWmin, bit offset = 8
1365 * - AIFS, bit offset = 0
1367 rtl818x_iowrite32(priv, rtl8187b_ac_addr[queue],
1368 (params->txop << 16) | (cw_max << 12) |
1369 (cw_min << 8) | (params->aifs *
1370 priv->slot_time + SIFS_TIME));
1375 rtl818x_iowrite8(priv, &priv->map->CW_VAL,
1376 cw_min | (cw_max << 4));
1382 static const struct ieee80211_ops rtl8187_ops = {
1384 .start = rtl8187_start,
1385 .stop = rtl8187_stop,
1386 .add_interface = rtl8187_add_interface,
1387 .remove_interface = rtl8187_remove_interface,
1388 .config = rtl8187_config,
1389 .bss_info_changed = rtl8187_bss_info_changed,
1390 .prepare_multicast = rtl8187_prepare_multicast,
1391 .configure_filter = rtl8187_configure_filter,
1392 .conf_tx = rtl8187_conf_tx,
1393 .rfkill_poll = rtl8187_rfkill_poll,
1394 .get_tsf = rtl8187_get_tsf,
1397 static void rtl8187_eeprom_register_read(struct eeprom_93cx6 *eeprom)
1399 struct ieee80211_hw *dev = eeprom->data;
1400 struct rtl8187_priv *priv = dev->priv;
1401 u8 reg = rtl818x_ioread8(priv, &priv->map->EEPROM_CMD);
1403 eeprom->reg_data_in = reg & RTL818X_EEPROM_CMD_WRITE;
1404 eeprom->reg_data_out = reg & RTL818X_EEPROM_CMD_READ;
1405 eeprom->reg_data_clock = reg & RTL818X_EEPROM_CMD_CK;
1406 eeprom->reg_chip_select = reg & RTL818X_EEPROM_CMD_CS;
1409 static void rtl8187_eeprom_register_write(struct eeprom_93cx6 *eeprom)
1411 struct ieee80211_hw *dev = eeprom->data;
1412 struct rtl8187_priv *priv = dev->priv;
1413 u8 reg = RTL818X_EEPROM_CMD_PROGRAM;
1415 if (eeprom->reg_data_in)
1416 reg |= RTL818X_EEPROM_CMD_WRITE;
1417 if (eeprom->reg_data_out)
1418 reg |= RTL818X_EEPROM_CMD_READ;
1419 if (eeprom->reg_data_clock)
1420 reg |= RTL818X_EEPROM_CMD_CK;
1421 if (eeprom->reg_chip_select)
1422 reg |= RTL818X_EEPROM_CMD_CS;
1424 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, reg);
1428 static int rtl8187_probe(struct usb_interface *intf,
1429 const struct usb_device_id *id)
1431 struct usb_device *udev = interface_to_usbdev(intf);
1432 struct ieee80211_hw *dev;
1433 struct rtl8187_priv *priv;
1434 struct eeprom_93cx6 eeprom;
1435 struct ieee80211_channel *channel;
1436 const char *chip_name;
1438 u16 product_id = le16_to_cpu(udev->descriptor.idProduct);
1440 u8 mac_addr[ETH_ALEN];
1442 dev = ieee80211_alloc_hw(sizeof(*priv), &rtl8187_ops);
1444 printk(KERN_ERR "rtl8187: ieee80211 alloc failed\n");
1449 priv->is_rtl8187b = (id->driver_info == DEVICE_RTL8187B);
1451 /* allocate "DMA aware" buffer for register accesses */
1452 priv->io_dmabuf = kmalloc(sizeof(*priv->io_dmabuf), GFP_KERNEL);
1453 if (!priv->io_dmabuf) {
1457 mutex_init(&priv->io_mutex);
1458 mutex_init(&priv->conf_mutex);
1460 SET_IEEE80211_DEV(dev, &intf->dev);
1461 usb_set_intfdata(intf, dev);
1466 skb_queue_head_init(&priv->rx_queue);
1468 BUILD_BUG_ON(sizeof(priv->channels) != sizeof(rtl818x_channels));
1469 BUILD_BUG_ON(sizeof(priv->rates) != sizeof(rtl818x_rates));
1471 memcpy(priv->channels, rtl818x_channels, sizeof(rtl818x_channels));
1472 memcpy(priv->rates, rtl818x_rates, sizeof(rtl818x_rates));
1473 priv->map = (struct rtl818x_csr *)0xFF00;
1475 priv->band.band = NL80211_BAND_2GHZ;
1476 priv->band.channels = priv->channels;
1477 priv->band.n_channels = ARRAY_SIZE(rtl818x_channels);
1478 priv->band.bitrates = priv->rates;
1479 priv->band.n_bitrates = ARRAY_SIZE(rtl818x_rates);
1480 dev->wiphy->bands[NL80211_BAND_2GHZ] = &priv->band;
1483 ieee80211_hw_set(dev, RX_INCLUDES_FCS);
1484 ieee80211_hw_set(dev, HOST_BROADCAST_PS_BUFFERING);
1485 ieee80211_hw_set(dev, SIGNAL_DBM);
1486 /* Initialize rate-control variables */
1488 dev->max_rate_tries = RETRY_COUNT;
1491 eeprom.register_read = rtl8187_eeprom_register_read;
1492 eeprom.register_write = rtl8187_eeprom_register_write;
1493 if (rtl818x_ioread32(priv, &priv->map->RX_CONF) & (1 << 6))
1494 eeprom.width = PCI_EEPROM_WIDTH_93C66;
1496 eeprom.width = PCI_EEPROM_WIDTH_93C46;
1498 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
1501 eeprom_93cx6_multiread(&eeprom, RTL8187_EEPROM_MAC_ADDR,
1502 (__le16 __force *)mac_addr, 3);
1503 if (!is_valid_ether_addr(mac_addr)) {
1504 printk(KERN_WARNING "rtl8187: Invalid hwaddr! Using randomly "
1505 "generated MAC address\n");
1506 eth_random_addr(mac_addr);
1508 SET_IEEE80211_PERM_ADDR(dev, mac_addr);
1510 channel = priv->channels;
1511 for (i = 0; i < 3; i++) {
1512 eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_CHAN_1 + i,
1514 (*channel++).hw_value = txpwr & 0xFF;
1515 (*channel++).hw_value = txpwr >> 8;
1517 for (i = 0; i < 2; i++) {
1518 eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_CHAN_4 + i,
1520 (*channel++).hw_value = txpwr & 0xFF;
1521 (*channel++).hw_value = txpwr >> 8;
1524 eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_BASE,
1527 reg = rtl818x_ioread8(priv, &priv->map->PGSELECT) & ~1;
1528 rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg | 1);
1529 /* 0 means asic B-cut, we should use SW 3 wire
1530 * bit-by-bit banging for radio. 1 means we can use
1531 * USB specific request to write radio registers */
1532 priv->asic_rev = rtl818x_ioread8(priv, (u8 *)0xFFFE) & 0x3;
1533 rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg);
1534 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
1536 if (!priv->is_rtl8187b) {
1538 reg32 = rtl818x_ioread32(priv, &priv->map->TX_CONF);
1539 reg32 &= RTL818X_TX_CONF_HWVER_MASK;
1541 case RTL818X_TX_CONF_R8187vD_B:
1542 /* Some RTL8187B devices have a USB ID of 0x8187
1543 * detect them here */
1544 chip_name = "RTL8187BvB(early)";
1545 priv->is_rtl8187b = 1;
1546 priv->hw_rev = RTL8187BvB;
1548 case RTL818X_TX_CONF_R8187vD:
1549 chip_name = "RTL8187vD";
1552 chip_name = "RTL8187vB (default)";
1556 * Force USB request to write radio registers for 8187B, Realtek
1557 * only uses it in their sources
1559 /*if (priv->asic_rev == 0) {
1560 printk(KERN_WARNING "rtl8187: Forcing use of USB "
1561 "requests to write to radio registers\n");
1564 switch (rtl818x_ioread8(priv, (u8 *)0xFFE1)) {
1565 case RTL818X_R8187B_B:
1566 chip_name = "RTL8187BvB";
1567 priv->hw_rev = RTL8187BvB;
1569 case RTL818X_R8187B_D:
1570 chip_name = "RTL8187BvD";
1571 priv->hw_rev = RTL8187BvD;
1573 case RTL818X_R8187B_E:
1574 chip_name = "RTL8187BvE";
1575 priv->hw_rev = RTL8187BvE;
1578 chip_name = "RTL8187BvB (default)";
1579 priv->hw_rev = RTL8187BvB;
1583 if (!priv->is_rtl8187b) {
1584 for (i = 0; i < 2; i++) {
1585 eeprom_93cx6_read(&eeprom,
1586 RTL8187_EEPROM_TXPWR_CHAN_6 + i,
1588 (*channel++).hw_value = txpwr & 0xFF;
1589 (*channel++).hw_value = txpwr >> 8;
1592 eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_CHAN_6,
1594 (*channel++).hw_value = txpwr & 0xFF;
1596 eeprom_93cx6_read(&eeprom, 0x0A, &txpwr);
1597 (*channel++).hw_value = txpwr & 0xFF;
1599 eeprom_93cx6_read(&eeprom, 0x1C, &txpwr);
1600 (*channel++).hw_value = txpwr & 0xFF;
1601 (*channel++).hw_value = txpwr >> 8;
1603 /* Handle the differing rfkill GPIO bit in different models */
1604 priv->rfkill_mask = RFKILL_MASK_8187_89_97;
1605 if (product_id == 0x8197 || product_id == 0x8198) {
1606 eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_SELECT_GPIO, ®);
1608 priv->rfkill_mask = RFKILL_MASK_8198;
1610 dev->vif_data_size = sizeof(struct rtl8187_vif);
1611 dev->wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION) |
1612 BIT(NL80211_IFTYPE_ADHOC) ;
1614 if ((id->driver_info == DEVICE_RTL8187) && priv->is_rtl8187b)
1615 printk(KERN_INFO "rtl8187: inconsistency between id with OEM"
1618 priv->rf = rtl8187_detect_rf(dev);
1619 dev->extra_tx_headroom = (!priv->is_rtl8187b) ?
1620 sizeof(struct rtl8187_tx_hdr) :
1621 sizeof(struct rtl8187b_tx_hdr);
1622 if (!priv->is_rtl8187b)
1627 err = ieee80211_register_hw(dev);
1629 printk(KERN_ERR "rtl8187: Cannot register device\n");
1630 goto err_free_dmabuf;
1632 skb_queue_head_init(&priv->b_tx_status.queue);
1634 wiphy_info(dev->wiphy, "hwaddr %pM, %s V%d + %s, rfkill mask %d\n",
1635 mac_addr, chip_name, priv->asic_rev, priv->rf->name,
1638 #ifdef CONFIG_RTL8187_LEDS
1639 eeprom_93cx6_read(&eeprom, 0x3F, ®);
1641 rtl8187_leds_init(dev, reg);
1643 rtl8187_rfkill_init(dev);
1648 kfree(priv->io_dmabuf);
1649 usb_set_intfdata(intf, NULL);
1652 ieee80211_free_hw(dev);
1656 static void rtl8187_disconnect(struct usb_interface *intf)
1658 struct ieee80211_hw *dev = usb_get_intfdata(intf);
1659 struct rtl8187_priv *priv;
1664 #ifdef CONFIG_RTL8187_LEDS
1665 rtl8187_leds_exit(dev);
1667 rtl8187_rfkill_exit(dev);
1668 ieee80211_unregister_hw(dev);
1671 usb_reset_device(priv->udev);
1672 usb_put_dev(interface_to_usbdev(intf));
1673 kfree(priv->io_dmabuf);
1674 ieee80211_free_hw(dev);
1677 static struct usb_driver rtl8187_driver = {
1678 .name = KBUILD_MODNAME,
1679 .id_table = rtl8187_table,
1680 .probe = rtl8187_probe,
1681 .disconnect = rtl8187_disconnect,
1682 .disable_hub_initiated_lpm = 1,
1685 module_usb_driver(rtl8187_driver);