drivers/net/wireless/realtek/rtl818x/rtl8180/rtl8225se.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2
   3 /* Radio tuning for RTL8225 on RTL8187SE
   4  *
   5  * Copyright 2009 Larry Finger <Larry.Finger@lwfinger.net>
   6  * Copyright 2014 Andrea Merello <andrea.merello@gmail.com>
   7  *
   8  * Based on the r8180 and Realtek r8187se drivers, which are:
   9  * Copyright 2004-2005 Andrea Merello <andrea.merello@gmail.com>, et al.
  10  *
  11  * Also based on the rtl8187 driver, which is:
  12  * Copyright 2007 Michael Wu <flamingice@sourmilk.net>
  13  * Copyright 2007 Andrea Merello <andrea.merello@gmail.com>
  14  */
  15
  16 #include <net/mac80211.h>
  17
  18 #include "rtl8180.h"
  19 #include "rtl8225se.h"
  20
  21 #define PFX "rtl8225 (se) "
  22
  23 static const u32 RF_GAIN_TABLE[] = {
  24         0x0096, 0x0076, 0x0056, 0x0036, 0x0016, 0x01f6, 0x01d6, 0x01b6,
  25         0x0196, 0x0176, 0x00F7, 0x00D7, 0x00B7, 0x0097, 0x0077, 0x0057,
  26         0x0037, 0x00FB, 0x00DB, 0x00BB, 0x00FF, 0x00E3, 0x00C3, 0x00A3,
  27         0x0083, 0x0063, 0x0043, 0x0023, 0x0003, 0x01E3, 0x01C3, 0x01A3,
  28         0x0183, 0x0163, 0x0143, 0x0123, 0x0103
  29 };
  30
  31 static const u8 cck_ofdm_gain_settings[] = {
  32         0x00, 0x01, 0x02, 0x03, 0x04, 0x05,
  33         0x06, 0x07, 0x08, 0x09, 0x0a, 0x0b,
  34         0x0c, 0x0d, 0x0e, 0x0f, 0x10, 0x11,
  35         0x12, 0x13, 0x14, 0x15, 0x16, 0x17,
  36         0x18, 0x19, 0x1a, 0x1b, 0x1c, 0x1d,
  37         0x1e, 0x1f, 0x20, 0x21, 0x22, 0x23,
  38 };
  39
  40 static const u32 rtl8225se_chan[] = {
  41         0x0080, 0x0100, 0x0180, 0x0200, 0x0280, 0x0300, 0x0380,
  42         0x0400, 0x0480, 0x0500, 0x0580, 0x0600, 0x0680, 0x074A,
  43 };
  44
  45 static const u8 ZEBRA_AGC[] = {
  46         0x7E, 0x7E, 0x7E, 0x7E, 0x7D, 0x7C, 0x7B, 0x7A,
  47         0x79, 0x78, 0x77, 0x76, 0x75, 0x74, 0x73, 0x72,
  48         0x71, 0x70, 0x6F, 0x6E, 0x6D, 0x6C, 0x6B, 0x6A,
  49         0x69, 0x68, 0x67, 0x66, 0x65, 0x64, 0x63, 0x62,
  50         0x48, 0x47, 0x46, 0x45, 0x44, 0x29, 0x28, 0x27,
  51         0x26, 0x25, 0x24, 0x23, 0x22, 0x21, 0x08, 0x07,
  52         0x06, 0x05, 0x04, 0x03, 0x02, 0x01, 0x00, 0x00,
  53         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  54         0x0f, 0x0f, 0x0f, 0x0f, 0x0f, 0x0f, 0x0f, 0x0f,
  55         0x0f, 0x0f, 0x10, 0x11, 0x12, 0x13, 0x15, 0x16,
  56         0x17, 0x17, 0x18, 0x18, 0x19, 0x1a, 0x1a, 0x1b,
  57         0x1b, 0x1c, 0x1c, 0x1d, 0x1d, 0x1d, 0x1e, 0x1e,
  58         0x1f, 0x1f, 0x1f, 0x20, 0x20, 0x20, 0x20, 0x21,
  59         0x21, 0x21, 0x22, 0x22, 0x22, 0x23, 0x23, 0x24,
  60         0x24, 0x25, 0x25, 0x25, 0x26, 0x26, 0x27, 0x27,
  61         0x2F, 0x2F, 0x2F, 0x2F, 0x2F, 0x2F, 0x2F, 0x2F
  62 };
  63
  64 static const u8 OFDM_CONFIG[] = {
  65         0x10, 0x0F, 0x0A, 0x0C, 0x14, 0xFA, 0xFF, 0x50,
  66         0x00, 0x50, 0x00, 0x00, 0x00, 0x5C, 0x00, 0x00,
  67         0x40, 0x00, 0x40, 0x00, 0x00, 0x00, 0xA8, 0x26,
  68         0x32, 0x33, 0x06, 0xA5, 0x6F, 0x55, 0xC8, 0xBB,
  69         0x0A, 0xE1, 0x2C, 0x4A, 0x86, 0x83, 0x34, 0x00,
  70         0x4F, 0x24, 0x6F, 0xC2, 0x03, 0x40, 0x80, 0x00,
  71         0xC0, 0xC1, 0x58, 0xF1, 0x00, 0xC4, 0x90, 0x3e,
  72         0xD8, 0x3C, 0x7B, 0x10, 0x10
  73 };
  74
  75 static void rtl8187se_three_wire_io(struct ieee80211_hw *dev, u8 *data,
  76                                     u8 len, bool write)
  77 {
  78         struct rtl8180_priv *priv = dev->priv;
  79         int i;
  80         u8 tmp;
  81
  82         do {
  83                 for (i = 0; i < 5; i++) {
  84                         tmp = rtl818x_ioread8(priv, SW_3W_CMD1);
  85                         if (!(tmp & 0x3))
  86                                 break;
  87                         udelay(10);
  88                 }
  89                 if (i == 5)
  90                         wiphy_err(dev->wiphy, PFX
  91                                 "CmdReg: 0x%x RE/WE bits aren't clear\n", tmp);
  92
  93                 tmp = rtl818x_ioread8(priv, &priv->map->rf_sw_config) | 0x02;
  94                 rtl818x_iowrite8(priv, &priv->map->rf_sw_config, tmp);
  95
  96                 tmp = rtl818x_ioread8(priv, REG_ADDR1(0x84)) & 0xF7;
  97                 rtl818x_iowrite8(priv, REG_ADDR1(0x84), tmp);
  98                 if (write) {
  99                         if (len == 16) {
 100                                 rtl818x_iowrite16(priv, SW_3W_DB0,
 101                                   *(u16 *)data);
 102                         } else if (len == 64) {
 103                                 rtl818x_iowrite32(priv, SW_3W_DB0_4,
 104                                   *((u32 *)data));
 105                                 rtl818x_iowrite32(priv, SW_3W_DB1_4,
 106                                   *((u32 *)(data + 4)));
 107                         } else
 108                                 wiphy_err(dev->wiphy, PFX
 109                                         "Unimplemented length\n");
 110                 } else {
 111                         rtl818x_iowrite16(priv, SW_3W_DB0, *(u16 *)data);
 112                 }
 113                 if (write)
 114                         tmp = 2;
 115                 else
 116                         tmp = 1;
 117                 rtl818x_iowrite8(priv, SW_3W_CMD1, tmp);
 118                 for (i = 0; i < 5; i++) {
 119                         tmp = rtl818x_ioread8(priv, SW_3W_CMD1);
 120                         if (!(tmp & 0x3))
 121                                 break;
 122                         udelay(10);
 123                 }
 124                 rtl818x_iowrite8(priv, SW_3W_CMD1, 0);
 125                 if (!write) {
 126                         *((u16 *)data) = rtl818x_ioread16(priv, SI_DATA_REG);
 127                         *((u16 *)data) &= 0x0FFF;
 128                 }
 129         } while (0);
 130 }
 131
 132 static u32 rtl8187se_rf_readreg(struct ieee80211_hw *dev, u8 addr)
 133 {
 134         u32 dataread = addr & 0x0F;
 135         rtl8187se_three_wire_io(dev, (u8 *)&dataread, 16, 0);
 136         return dataread;
 137 }
 138
 139 static void rtl8187se_rf_writereg(struct ieee80211_hw *dev, u8 addr, u32 data)
 140 {
 141         u32 outdata = (data << 4) | (u32)(addr & 0x0F);
 142         rtl8187se_three_wire_io(dev, (u8 *)&outdata, 16, 1);
 143 }
 144
 145
 146 static void rtl8225se_write_zebra_agc(struct ieee80211_hw *dev)
 147 {
 148         int i;
 149
 150         for (i = 0; i < 128; i++) {
 151                 rtl8225se_write_phy_ofdm(dev, 0xF, ZEBRA_AGC[i]);
 152                 rtl8225se_write_phy_ofdm(dev, 0xE, i+0x80);
 153                 rtl8225se_write_phy_ofdm(dev, 0xE, 0);
 154         }
 155 }
 156
 157 static void rtl8187se_write_ofdm_config(struct ieee80211_hw *dev)
 158 {
 159         /* write OFDM_CONFIG table */
 160         int i;
 161
 162         for (i = 0; i < 60; i++)
 163                 rtl8225se_write_phy_ofdm(dev, i, OFDM_CONFIG[i]);
 164
 165 }
 166
 167 static void rtl8225sez2_rf_set_tx_power(struct ieee80211_hw *dev, int channel)
 168 {
 169         struct rtl8180_priv *priv = dev->priv;
 170         u8 cck_power, ofdm_power;
 171
 172         cck_power = priv->channels[channel - 1].hw_value & 0xFF;
 173         if (cck_power > 35)
 174                 cck_power = 35;
 175         rtl818x_iowrite8(priv, &priv->map->TX_GAIN_CCK,
 176                          cck_ofdm_gain_settings[cck_power]);
 177
 178         usleep_range(1000, 5000);
 179         ofdm_power = priv->channels[channel - 1].hw_value >> 8;
 180         if (ofdm_power > 35)
 181                 ofdm_power = 35;
 182
 183         rtl818x_iowrite8(priv, &priv->map->TX_GAIN_OFDM,
 184                          cck_ofdm_gain_settings[ofdm_power]);
 185         if (ofdm_power < 12) {
 186                 rtl8225se_write_phy_ofdm(dev, 7, 0x5C);
 187                 rtl8225se_write_phy_ofdm(dev, 9, 0x5C);
 188         }
 189         if (ofdm_power < 18) {
 190                 rtl8225se_write_phy_ofdm(dev, 7, 0x54);
 191                 rtl8225se_write_phy_ofdm(dev, 9, 0x54);
 192         } else {
 193                 rtl8225se_write_phy_ofdm(dev, 7, 0x50);
 194                 rtl8225se_write_phy_ofdm(dev, 9, 0x50);
 195         }
 196
 197         usleep_range(1000, 5000);
 198 }
 199
 200 static void rtl8187se_write_rf_gain(struct ieee80211_hw *dev)
 201 {
 202         int i;
 203
 204         for (i = 0; i <= 36; i++) {
 205                 rtl8187se_rf_writereg(dev, 0x01, i); mdelay(1);
 206                 rtl8187se_rf_writereg(dev, 0x02, RF_GAIN_TABLE[i]); mdelay(1);
 207         }
 208 }
 209
 210 static void rtl8187se_write_initial_gain(struct ieee80211_hw *dev,
 211                                         int init_gain)
 212 {
 213         switch (init_gain) {
 214         default:
 215                 rtl8225se_write_phy_ofdm(dev, 0x17, 0x26); mdelay(1);
 216                 rtl8225se_write_phy_ofdm(dev, 0x24, 0x86); mdelay(1);
 217                 rtl8225se_write_phy_ofdm(dev, 0x05, 0xFA); mdelay(1);
 218                 break;
 219         case 2:
 220                 rtl8225se_write_phy_ofdm(dev, 0x17, 0x36); mdelay(1);
 221                 rtl8225se_write_phy_ofdm(dev, 0x24, 0x86); mdelay(1);
 222                 rtl8225se_write_phy_ofdm(dev, 0x05, 0xFA); mdelay(1);
 223                 break;
 224         case 3:
 225                 rtl8225se_write_phy_ofdm(dev, 0x17, 0x36); mdelay(1);
 226                 rtl8225se_write_phy_ofdm(dev, 0x24, 0x86); mdelay(1);
 227                 rtl8225se_write_phy_ofdm(dev, 0x05, 0xFB); mdelay(1);
 228                 break;
 229         case 4:
 230                 rtl8225se_write_phy_ofdm(dev, 0x17, 0x46); mdelay(1);
 231                 rtl8225se_write_phy_ofdm(dev, 0x24, 0x86); mdelay(1);
 232                 rtl8225se_write_phy_ofdm(dev, 0x05, 0xFB); mdelay(1);
 233                 break;
 234         case 5:
 235                 rtl8225se_write_phy_ofdm(dev, 0x17, 0x46); mdelay(1);
 236                 rtl8225se_write_phy_ofdm(dev, 0x24, 0x96); mdelay(1);
 237                 rtl8225se_write_phy_ofdm(dev, 0x05, 0xFB); mdelay(1);
 238                 break;
 239         case 6:
 240                 rtl8225se_write_phy_ofdm(dev, 0x17, 0x56); mdelay(1);
 241                 rtl8225se_write_phy_ofdm(dev, 0x24, 0x96); mdelay(1);
 242                 rtl8225se_write_phy_ofdm(dev, 0x05, 0xFC); mdelay(1);
 243                 break;
 244         case 7:
 245                 rtl8225se_write_phy_ofdm(dev, 0x17, 0x56); mdelay(1);
 246                 rtl8225se_write_phy_ofdm(dev, 0x24, 0xA6); mdelay(1);
 247                 rtl8225se_write_phy_ofdm(dev, 0x05, 0xFC); mdelay(1);
 248                 break;
 249         case 8:
 250                 rtl8225se_write_phy_ofdm(dev, 0x17, 0x66); mdelay(1);
 251                 rtl8225se_write_phy_ofdm(dev, 0x24, 0xB6); mdelay(1);
 252                 rtl8225se_write_phy_ofdm(dev, 0x05, 0xFC); mdelay(1);
 253                 break;
 254         }
 255 }
 256
 257 void rtl8225se_rf_init(struct ieee80211_hw *dev)
 258 {
 259         struct rtl8180_priv *priv = dev->priv;
 260         u32 rf23, rf24;
 261         u8 d_cut = 0;
 262         u8 tmp;
 263
 264         /* Page 1 */
 265         rtl8187se_rf_writereg(dev, 0x00, 0x013F); mdelay(1);
 266         rf23 = rtl8187se_rf_readreg(dev, 0x08); mdelay(1);
 267         rf24 = rtl8187se_rf_readreg(dev, 0x09); mdelay(1);
 268         if (rf23 == 0x0818 && rf24 == 0x070C)
 269                 d_cut = 1;
 270
 271         wiphy_info(dev->wiphy, "RTL8225-SE version %s\n",
 272                 d_cut ? "D" : "not-D");
 273
 274         /* Page 0: reg 0 - 15 */
 275         rtl8187se_rf_writereg(dev, 0x00, 0x009F); mdelay(1);
 276         rtl8187se_rf_writereg(dev, 0x01, 0x06E0); mdelay(1);
 277         rtl8187se_rf_writereg(dev, 0x02, 0x004D); mdelay(1);
 278         rtl8187se_rf_writereg(dev, 0x03, 0x07F1); mdelay(1);
 279         rtl8187se_rf_writereg(dev, 0x04, 0x0975); mdelay(1);
 280         rtl8187se_rf_writereg(dev, 0x05, 0x0C72); mdelay(1);
 281         rtl8187se_rf_writereg(dev, 0x06, 0x0AE6); mdelay(1);
 282         rtl8187se_rf_writereg(dev, 0x07, 0x00CA); mdelay(1);
 283         rtl8187se_rf_writereg(dev, 0x08, 0x0E1C); mdelay(1);
 284         rtl8187se_rf_writereg(dev, 0x09, 0x02F0); mdelay(1);
 285         rtl8187se_rf_writereg(dev, 0x0A, 0x09D0); mdelay(1);
 286         rtl8187se_rf_writereg(dev, 0x0B, 0x01BA); mdelay(1);
 287         rtl8187se_rf_writereg(dev, 0x0C, 0x0640); mdelay(1);
 288         rtl8187se_rf_writereg(dev, 0x0D, 0x08DF); mdelay(1);
 289         rtl8187se_rf_writereg(dev, 0x0E, 0x0020); mdelay(1);
 290         rtl8187se_rf_writereg(dev, 0x0F, 0x0990); mdelay(1);
 291         /* page 1: reg 16-30 */
 292         rtl8187se_rf_writereg(dev, 0x00, 0x013F); mdelay(1);
 293         rtl8187se_rf_writereg(dev, 0x03, 0x0806); mdelay(1);
 294         rtl8187se_rf_writereg(dev, 0x04, 0x03A7); mdelay(1);
 295         rtl8187se_rf_writereg(dev, 0x05, 0x059B); mdelay(1);
 296         rtl8187se_rf_writereg(dev, 0x06, 0x0081); mdelay(1);
 297         rtl8187se_rf_writereg(dev, 0x07, 0x01A0); mdelay(1);
 298         rtl8187se_rf_writereg(dev, 0x0A, 0x0001); mdelay(1);
 299         rtl8187se_rf_writereg(dev, 0x0B, 0x0418); mdelay(1);
 300         rtl8187se_rf_writereg(dev, 0x0C, 0x0FBE); mdelay(1);
 301         rtl8187se_rf_writereg(dev, 0x0D, 0x0008); mdelay(1);
 302         if (d_cut)
 303                 rtl8187se_rf_writereg(dev, 0x0E, 0x0807);
 304         else
 305                 rtl8187se_rf_writereg(dev, 0x0E, 0x0806);
 306         mdelay(1);
 307         rtl8187se_rf_writereg(dev, 0x0F, 0x0ACC); mdelay(1);
 308         rtl8187se_rf_writereg(dev, 0x00, 0x01D7); mdelay(1);
 309         rtl8187se_rf_writereg(dev, 0x03, 0x0E00); mdelay(1);
 310         rtl8187se_rf_writereg(dev, 0x04, 0x0E50); mdelay(1);
 311
 312         rtl8187se_write_rf_gain(dev);
 313
 314         rtl8187se_rf_writereg(dev, 0x05, 0x0203); mdelay(1);
 315         rtl8187se_rf_writereg(dev, 0x06, 0x0200); mdelay(1);
 316         rtl8187se_rf_writereg(dev, 0x00, 0x0137); mdelay(11);
 317         rtl8187se_rf_writereg(dev, 0x0D, 0x0008); mdelay(11);
 318         rtl8187se_rf_writereg(dev, 0x00, 0x0037); mdelay(11);
 319         rtl8187se_rf_writereg(dev, 0x04, 0x0160); mdelay(11);
 320         rtl8187se_rf_writereg(dev, 0x07, 0x0080); mdelay(11);
 321         rtl8187se_rf_writereg(dev, 0x02, 0x088D); msleep(221);
 322         rtl8187se_rf_writereg(dev, 0x00, 0x0137); mdelay(11);
 323         rtl8187se_rf_writereg(dev, 0x07, 0x0000); mdelay(1);
 324         rtl8187se_rf_writereg(dev, 0x07, 0x0180); mdelay(1);
 325         rtl8187se_rf_writereg(dev, 0x07, 0x0220); mdelay(1);
 326         rtl8187se_rf_writereg(dev, 0x07, 0x03E0); mdelay(1);
 327         rtl8187se_rf_writereg(dev, 0x06, 0x00C1); mdelay(1);
 328         rtl8187se_rf_writereg(dev, 0x0A, 0x0001); mdelay(1);
 329         if (priv->xtal_cal) {
 330                 tmp = (priv->xtal_in << 4) | (priv->xtal_out << 1) |
 331                       (1 << 11) | (1 << 9);
 332                 rtl8187se_rf_writereg(dev, 0x0F, tmp);
 333                 wiphy_info(dev->wiphy, "Xtal cal\n");
 334                 mdelay(1);
 335         } else {
 336                 wiphy_info(dev->wiphy, "NO Xtal cal\n");
 337                 rtl8187se_rf_writereg(dev, 0x0F, 0x0ACC);
 338                 mdelay(1);
 339         }
 340         /* page 0 */
 341         rtl8187se_rf_writereg(dev, 0x00, 0x00BF); mdelay(1);
 342         rtl8187se_rf_writereg(dev, 0x0D, 0x08DF); mdelay(1);
 343         rtl8187se_rf_writereg(dev, 0x02, 0x004D); mdelay(1);
 344         rtl8187se_rf_writereg(dev, 0x04, 0x0975); msleep(31);
 345         rtl8187se_rf_writereg(dev, 0x00, 0x0197); mdelay(1);
 346         rtl8187se_rf_writereg(dev, 0x05, 0x05AB); mdelay(1);
 347
 348         rtl8187se_rf_writereg(dev, 0x00, 0x009F); mdelay(1);
 349         rtl8187se_rf_writereg(dev, 0x01, 0x0000); mdelay(1);
 350         rtl8187se_rf_writereg(dev, 0x02, 0x0000); mdelay(1);
 351         /* power save parameters */
 352         /* TODO: move to dev.c */
 353         rtl818x_iowrite8(priv, REG_ADDR1(0x024E),
 354                  rtl818x_ioread8(priv, REG_ADDR1(0x24E)) & 0x9F);
 355         rtl8225se_write_phy_cck(dev, 0x00, 0xC8);
 356         rtl8225se_write_phy_cck(dev, 0x06, 0x1C);
 357         rtl8225se_write_phy_cck(dev, 0x10, 0x78);
 358         rtl8225se_write_phy_cck(dev, 0x2E, 0xD0);
 359         rtl8225se_write_phy_cck(dev, 0x2F, 0x06);
 360         rtl8225se_write_phy_cck(dev, 0x01, 0x46);
 361
 362         /* power control */
 363         rtl818x_iowrite8(priv, &priv->map->TX_GAIN_CCK, 0x10);
 364         rtl818x_iowrite8(priv, &priv->map->TX_GAIN_OFDM, 0x1B);
 365
 366         rtl818x_iowrite8(priv, &priv->map->TX_ANTENNA, 0x03);
 367         rtl8225se_write_phy_ofdm(dev, 0x00, 0x12);
 368
 369         rtl8225se_write_zebra_agc(dev);
 370
 371         rtl8225se_write_phy_ofdm(dev, 0x10, 0x00);
 372
 373         rtl8187se_write_ofdm_config(dev);
 374
 375         /* turn on RF */
 376         rtl8187se_rf_writereg(dev, 0x00, 0x009F); udelay(500);
 377         rtl8187se_rf_writereg(dev, 0x04, 0x0972); udelay(500);
 378         /* turn on RF again */
 379         rtl8187se_rf_writereg(dev, 0x00, 0x009F); udelay(500);
 380         rtl8187se_rf_writereg(dev, 0x04, 0x0972); udelay(500);
 381         /* turn on BB */
 382         rtl8225se_write_phy_ofdm(dev, 0x10, 0x40);
 383         rtl8225se_write_phy_ofdm(dev, 0x12, 0x40);
 384
 385         rtl8187se_write_initial_gain(dev, 4);
 386 }
 387
 388 void rtl8225se_rf_stop(struct ieee80211_hw *dev)
 389 {
 390         /* checked for 8187se */
 391         struct rtl8180_priv *priv = dev->priv;
 392
 393         /* turn off BB RXIQ matrix to cut off rx signal */
 394         rtl8225se_write_phy_ofdm(dev, 0x10, 0x00);
 395         rtl8225se_write_phy_ofdm(dev, 0x12, 0x00);
 396         /* turn off RF */
 397         rtl8187se_rf_writereg(dev, 0x04, 0x0000);
 398         rtl8187se_rf_writereg(dev, 0x00, 0x0000);
 399
 400         usleep_range(1000, 5000);
 401         /* turn off A/D and D/A */
 402         rtl8180_set_anaparam(priv, RTL8225SE_ANAPARAM_OFF);
 403         rtl8180_set_anaparam2(priv, RTL8225SE_ANAPARAM2_OFF);
 404 }
 405
 406 void rtl8225se_rf_set_channel(struct ieee80211_hw *dev,
 407                                    struct ieee80211_conf *conf)
 408 {
 409         int chan =
 410                 ieee80211_frequency_to_channel(conf->chandef.chan->center_freq);
 411
 412         rtl8225sez2_rf_set_tx_power(dev, chan);
 413         rtl8187se_rf_writereg(dev, 0x7, rtl8225se_chan[chan - 1]);
 414         if ((rtl8187se_rf_readreg(dev, 0x7) & 0x0F80) !=
 415                 rtl8225se_chan[chan - 1])
 416                 rtl8187se_rf_writereg(dev, 0x7, rtl8225se_chan[chan - 1]);
 417         usleep_range(10000, 20000);
 418 }
 419
 420 static const struct rtl818x_rf_ops rtl8225se_ops = {
 421         .name           = "rtl8225-se",
 422         .init           = rtl8225se_rf_init,
 423         .stop           = rtl8225se_rf_stop,
 424         .set_chan       = rtl8225se_rf_set_channel,
 425 };
 426
 427 const struct rtl818x_rf_ops *rtl8187se_detect_rf(struct ieee80211_hw *dev)
 428 {
 429         return &rtl8225se_ops;
 430 }