1 // SPDX-License-Identifier: ISC
2 /* Copyright (C) 2020 MediaTek Inc.
4 * Author: Felix Fietkau <nbd@nbd.name>
5 * Lorenzo Bianconi <lorenzo@kernel.org>
6 * Sean Wang <sean.wang@mediatek.com>
9 #include <linux/kernel.h>
10 #include <linux/iopoll.h>
11 #include <linux/module.h>
13 #include <linux/mmc/host.h>
14 #include <linux/mmc/sdio_ids.h>
15 #include <linux/mmc/sdio_func.h>
21 static int mt76s_refill_sched_quota(struct mt76_dev *dev, u32 *data)
23 u32 ple_ac_data_quota[] = {
24 FIELD_GET(TXQ_CNT_L, data[4]), /* VO */
25 FIELD_GET(TXQ_CNT_H, data[3]), /* VI */
26 FIELD_GET(TXQ_CNT_L, data[3]), /* BE */
27 FIELD_GET(TXQ_CNT_H, data[2]), /* BK */
29 u32 pse_ac_data_quota[] = {
30 FIELD_GET(TXQ_CNT_H, data[1]), /* VO */
31 FIELD_GET(TXQ_CNT_L, data[1]), /* VI */
32 FIELD_GET(TXQ_CNT_H, data[0]), /* BE */
33 FIELD_GET(TXQ_CNT_L, data[0]), /* BK */
35 u32 pse_mcu_quota = FIELD_GET(TXQ_CNT_L, data[2]);
36 u32 pse_data_quota = 0, ple_data_quota = 0;
37 struct mt76_sdio *sdio = &dev->sdio;
40 for (i = 0; i < ARRAY_SIZE(pse_ac_data_quota); i++) {
41 pse_data_quota += pse_ac_data_quota[i];
42 ple_data_quota += ple_ac_data_quota[i];
45 if (!pse_data_quota && !ple_data_quota && !pse_mcu_quota)
48 sdio->sched.pse_mcu_quota += pse_mcu_quota;
49 sdio->sched.pse_data_quota += pse_data_quota;
50 sdio->sched.ple_data_quota += ple_data_quota;
52 return pse_data_quota + ple_data_quota + pse_mcu_quota;
55 static struct sk_buff *
56 mt76s_build_rx_skb(void *data, int data_len, int buf_len)
58 int len = min_t(int, data_len, MT_SKB_HEAD_LEN);
61 skb = alloc_skb(len, GFP_KERNEL);
65 skb_put_data(skb, data, len);
70 page = virt_to_head_page(data);
71 skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags,
72 page, data - page_address(page),
73 data_len - len, buf_len);
81 mt76s_rx_run_queue(struct mt76_dev *dev, enum mt76_rxq_id qid,
82 struct mt76s_intr *intr)
84 struct mt76_queue *q = &dev->q_rx[qid];
85 struct mt76_sdio *sdio = &dev->sdio;
90 for (i = 0; i < intr->rx.num[qid]; i++)
91 len += round_up(intr->rx.len[qid][i] + 4, 4);
96 if (len > sdio->func->cur_blksize)
97 len = roundup(len, sdio->func->cur_blksize);
99 page = __dev_alloc_pages(GFP_KERNEL, get_order(len));
103 buf = page_address(page);
105 sdio_claim_host(sdio->func);
106 err = sdio_readsb(sdio->func, buf, MCR_WRDR(qid), len);
107 sdio_release_host(sdio->func);
110 dev_err(dev->dev, "sdio read data failed:%d\n", err);
115 for (i = 0; i < intr->rx.num[qid]; i++) {
116 int index = (q->head + i) % q->ndesc;
117 struct mt76_queue_entry *e = &q->entry[index];
118 __le32 *rxd = (__le32 *)buf;
120 /* parse rxd to get the actual packet length */
121 len = le32_get_bits(rxd[0], GENMASK(15, 0));
122 e->skb = mt76s_build_rx_skb(buf, len, round_up(len + 4, 4));
126 buf += round_up(len + 4, 4);
127 if (q->queued + i + 1 == q->ndesc)
132 spin_lock_bh(&q->lock);
133 q->head = (q->head + i) % q->ndesc;
135 spin_unlock_bh(&q->lock);
140 static int mt76s_rx_handler(struct mt76_dev *dev)
142 struct mt76_sdio *sdio = &dev->sdio;
143 struct mt76s_intr intr;
144 int nframes = 0, ret;
146 ret = sdio->parse_irq(dev, &intr);
150 trace_dev_irq(dev, intr.isr, 0);
152 if (intr.isr & WHIER_RX0_DONE_INT_EN) {
153 ret = mt76s_rx_run_queue(dev, 0, &intr);
155 mt76_worker_schedule(&sdio->net_worker);
160 if (intr.isr & WHIER_RX1_DONE_INT_EN) {
161 ret = mt76s_rx_run_queue(dev, 1, &intr);
163 mt76_worker_schedule(&sdio->net_worker);
168 nframes += !!mt76s_refill_sched_quota(dev, intr.tx.wtqcr);
174 mt76s_tx_pick_quota(struct mt76_sdio *sdio, bool mcu, int buf_sz,
175 int *pse_size, int *ple_size)
179 pse_sz = DIV_ROUND_UP(buf_sz + sdio->sched.deficit,
180 sdio->sched.pse_page_size);
182 if (mcu && sdio->hw_ver == MT76_CONNAC2_SDIO)
186 if (sdio->sched.pse_mcu_quota < *pse_size + pse_sz)
189 if (sdio->sched.pse_data_quota < *pse_size + pse_sz ||
190 sdio->sched.ple_data_quota < *ple_size + 1)
193 *ple_size = *ple_size + 1;
195 *pse_size = *pse_size + pse_sz;
201 mt76s_tx_update_quota(struct mt76_sdio *sdio, bool mcu, int pse_size,
205 sdio->sched.pse_mcu_quota -= pse_size;
207 sdio->sched.pse_data_quota -= pse_size;
208 sdio->sched.ple_data_quota -= ple_size;
212 static int __mt76s_xmit_queue(struct mt76_dev *dev, u8 *data, int len)
214 struct mt76_sdio *sdio = &dev->sdio;
217 if (len > sdio->func->cur_blksize)
218 len = roundup(len, sdio->func->cur_blksize);
220 sdio_claim_host(sdio->func);
221 err = sdio_writesb(sdio->func, MCR_WTDR1, data, len);
222 sdio_release_host(sdio->func);
225 dev_err(dev->dev, "sdio write failed: %d\n", err);
230 static int mt76s_tx_run_queue(struct mt76_dev *dev, struct mt76_queue *q)
232 int err, nframes = 0, len = 0, pse_sz = 0, ple_sz = 0;
233 bool mcu = q == dev->q_mcu[MT_MCUQ_WM];
234 struct mt76_sdio *sdio = &dev->sdio;
237 while (q->first != q->head) {
238 struct mt76_queue_entry *e = &q->entry[q->first];
239 struct sk_buff *iter;
243 if (test_bit(MT76_MCU_RESET, &dev->phy.state))
246 if (!test_bit(MT76_STATE_MCU_RUNNING, &dev->phy.state)) {
247 __skb_put_zero(e->skb, 4);
248 err = __mt76s_xmit_queue(dev, e->skb->data,
256 pad = roundup(e->skb->len, 4) - e->skb->len;
257 if (len + e->skb->len + pad + 4 > dev->sdio.xmit_buf_sz)
260 if (mt76s_tx_pick_quota(sdio, mcu, e->buf_sz, &pse_sz,
264 memcpy(sdio->xmit_buf + len, e->skb->data, skb_headlen(e->skb));
265 len += skb_headlen(e->skb);
268 skb_walk_frags(e->skb, iter) {
269 memcpy(sdio->xmit_buf + len, iter->data, iter->len);
275 memset(sdio->xmit_buf + len, 0, pad);
279 q->first = (q->first + 1) % q->ndesc;
284 memset(sdio->xmit_buf + len, 0, 4);
285 err = __mt76s_xmit_queue(dev, sdio->xmit_buf, len + 4);
289 mt76s_tx_update_quota(sdio, mcu, pse_sz, ple_sz);
291 mt76_worker_schedule(&sdio->status_worker);
296 void mt76s_txrx_worker(struct mt76_sdio *sdio)
298 struct mt76_dev *dev = container_of(sdio, struct mt76_dev, sdio);
301 /* disable interrupt */
302 sdio_claim_host(sdio->func);
303 sdio_writel(sdio->func, WHLPCR_INT_EN_CLR, MCR_WHLPCR, NULL);
304 sdio_release_host(sdio->func);
310 for (i = 0; i <= MT_TXQ_PSD; i++) {
311 ret = mt76s_tx_run_queue(dev, dev->phy.q_tx[i]);
315 ret = mt76s_tx_run_queue(dev, dev->q_mcu[MT_MCUQ_WM]);
320 ret = mt76s_rx_handler(dev);
324 if (test_bit(MT76_MCU_RESET, &dev->phy.state) ||
325 test_bit(MT76_STATE_SUSPEND, &dev->phy.state)) {
326 if (!mt76s_txqs_empty(dev))
329 wake_up(&sdio->wait);
331 } while (nframes > 0);
333 /* enable interrupt */
334 sdio_claim_host(sdio->func);
335 sdio_writel(sdio->func, WHLPCR_INT_EN_SET, MCR_WHLPCR, NULL);
336 sdio_release_host(sdio->func);
338 EXPORT_SYMBOL_GPL(mt76s_txrx_worker);
340 void mt76s_sdio_irq(struct sdio_func *func)
342 struct mt76_dev *dev = sdio_get_drvdata(func);
343 struct mt76_sdio *sdio = &dev->sdio;
345 if (!test_bit(MT76_STATE_INITIALIZED, &dev->phy.state) ||
346 test_bit(MT76_MCU_RESET, &dev->phy.state))
349 sdio_writel(sdio->func, WHLPCR_INT_EN_CLR, MCR_WHLPCR, NULL);
350 mt76_worker_schedule(&sdio->txrx_worker);
352 EXPORT_SYMBOL_GPL(mt76s_sdio_irq);
354 bool mt76s_txqs_empty(struct mt76_dev *dev)
356 struct mt76_queue *q;
359 for (i = 0; i <= MT_TXQ_PSD + 1; i++) {
361 q = dev->phy.q_tx[i];
363 q = dev->q_mcu[MT_MCUQ_WM];
365 if (q->first != q->head)
371 EXPORT_SYMBOL_GPL(mt76s_txqs_empty);