2 * Copyright (C) 2016 Felix Fietkau <nbd@nbd.name>
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 #include <linux/delay.h>
19 #include "mt76x2_mcu.h"
20 #include "mt76x2_eeprom.h"
23 mt76x2_phy_tssi_init_cal(struct mt76x2_dev *dev)
25 struct ieee80211_channel *chan = dev->mt76.chandef.chan;
28 if (!mt76x2_tssi_enabled(dev))
31 if (mt76x2_channel_silent(dev))
34 if (chan->band == NL80211_BAND_5GHZ)
37 if (mt76x2_ext_pa_enabled(dev, chan->band))
40 mt76x2_mcu_calibrate(dev, MCU_CAL_TSSI, flag);
41 dev->cal.tssi_cal_done = true;
46 mt76x2_phy_channel_calibrate(struct mt76x2_dev *dev, bool mac_stopped)
48 struct ieee80211_channel *chan = dev->mt76.chandef.chan;
49 bool is_5ghz = chan->band == NL80211_BAND_5GHZ;
51 if (dev->cal.channel_cal_done)
54 if (mt76x2_channel_silent(dev))
57 if (!dev->cal.tssi_cal_done)
58 mt76x2_phy_tssi_init_cal(dev);
61 mt76x2_mac_stop(dev, false);
64 mt76x2_mcu_calibrate(dev, MCU_CAL_LC, 0);
66 mt76x2_mcu_calibrate(dev, MCU_CAL_TX_LOFT, is_5ghz);
67 mt76x2_mcu_calibrate(dev, MCU_CAL_TXIQ, is_5ghz);
68 mt76x2_mcu_calibrate(dev, MCU_CAL_RXIQC_FI, is_5ghz);
69 mt76x2_mcu_calibrate(dev, MCU_CAL_TEMP_SENSOR, 0);
70 mt76x2_mcu_calibrate(dev, MCU_CAL_TX_SHAPING, 0);
73 mt76x2_mac_resume(dev);
75 mt76x2_apply_gain_adj(dev);
77 dev->cal.channel_cal_done = true;
80 void mt76x2_phy_set_antenna(struct mt76x2_dev *dev)
84 val = mt76_rr(dev, MT_BBP(AGC, 0));
85 val &= ~(BIT(4) | BIT(1));
86 switch (dev->mt76.antenna_mask) {
88 /* disable mac DAC control */
89 mt76_clear(dev, MT_BBP(IBI, 9), BIT(11));
90 mt76_clear(dev, MT_BBP(TXBE, 5), 3);
91 mt76_rmw_field(dev, MT_TX_PIN_CFG, MT_TX_PIN_CFG_TXANT, 0x3);
92 mt76_rmw_field(dev, MT_BBP(CORE, 32), GENMASK(21, 20), 2);
94 mt76_rmw_field(dev, MT_BBP(CORE, 33), GENMASK(12, 9), 4);
96 val &= ~(BIT(3) | BIT(0));
99 /* disable mac DAC control */
100 mt76_clear(dev, MT_BBP(IBI, 9), BIT(11));
101 mt76_rmw_field(dev, MT_BBP(TXBE, 5), 3, 1);
102 mt76_rmw_field(dev, MT_TX_PIN_CFG, MT_TX_PIN_CFG_TXANT, 0xc);
103 mt76_rmw_field(dev, MT_BBP(CORE, 32), GENMASK(21, 20), 1);
105 mt76_rmw_field(dev, MT_BBP(CORE, 33), GENMASK(12, 9), 1);
112 /* enable mac DAC control */
113 mt76_set(dev, MT_BBP(IBI, 9), BIT(11));
114 mt76_set(dev, MT_BBP(TXBE, 5), 3);
115 mt76_rmw_field(dev, MT_TX_PIN_CFG, MT_TX_PIN_CFG_TXANT, 0xf);
116 mt76_clear(dev, MT_BBP(CORE, 32), GENMASK(21, 20));
117 mt76_clear(dev, MT_BBP(CORE, 33), GENMASK(12, 9));
123 mt76_wr(dev, MT_BBP(AGC, 0), val);
127 mt76x2_get_agc_gain(struct mt76x2_dev *dev, u8 *dest)
129 dest[0] = mt76_get_field(dev, MT_BBP(AGC, 8), MT_BBP_AGC_GAIN);
130 dest[1] = mt76_get_field(dev, MT_BBP(AGC, 9), MT_BBP_AGC_GAIN);
134 mt76x2_get_rssi_gain_thresh(struct mt76x2_dev *dev)
136 switch (dev->mt76.chandef.width) {
137 case NL80211_CHAN_WIDTH_80:
139 case NL80211_CHAN_WIDTH_40:
147 mt76x2_get_low_rssi_gain_thresh(struct mt76x2_dev *dev)
149 switch (dev->mt76.chandef.width) {
150 case NL80211_CHAN_WIDTH_80:
152 case NL80211_CHAN_WIDTH_40:
160 mt76x2_phy_set_gain_val(struct mt76x2_dev *dev)
165 gain_val[0] = dev->cal.agc_gain_cur[0] - dev->cal.agc_gain_adjust;
166 gain_val[1] = dev->cal.agc_gain_cur[1] - dev->cal.agc_gain_adjust;
168 if (dev->mt76.chandef.width >= NL80211_CHAN_WIDTH_40)
175 mt76_wr(dev, MT_BBP(AGC, 8),
176 val | FIELD_PREP(MT_BBP_AGC_GAIN, gain_val[0]));
177 mt76_wr(dev, MT_BBP(AGC, 9),
178 val | FIELD_PREP(MT_BBP_AGC_GAIN, gain_val[1]));
180 if (dev->mt76.chandef.chan->flags & IEEE80211_CHAN_RADAR)
181 mt76x2_dfs_adjust_agc(dev);
185 mt76x2_phy_adjust_vga_gain(struct mt76x2_dev *dev)
188 u8 limit = dev->cal.low_gain > 0 ? 16 : 4;
190 false_cca = FIELD_GET(MT_RX_STAT_1_CCA_ERRORS, mt76_rr(dev, MT_RX_STAT_1));
191 dev->cal.false_cca = false_cca;
192 if (false_cca > 800 && dev->cal.agc_gain_adjust < limit)
193 dev->cal.agc_gain_adjust += 2;
194 else if ((false_cca < 10 && dev->cal.agc_gain_adjust > 0) ||
195 (dev->cal.agc_gain_adjust >= limit && false_cca < 500))
196 dev->cal.agc_gain_adjust -= 2;
200 mt76x2_phy_set_gain_val(dev);
204 mt76x2_phy_update_channel_gain(struct mt76x2_dev *dev)
206 u8 *gain = dev->cal.agc_gain_init;
207 u8 low_gain_delta, gain_delta;
212 dev->cal.avg_rssi_all = mt76x2_phy_get_min_avg_rssi(dev);
214 low_gain = (dev->cal.avg_rssi_all > mt76x2_get_rssi_gain_thresh(dev)) +
215 (dev->cal.avg_rssi_all > mt76x2_get_low_rssi_gain_thresh(dev));
217 gain_change = (dev->cal.low_gain & 2) ^ (low_gain & 2);
218 dev->cal.low_gain = low_gain;
221 mt76x2_phy_adjust_vga_gain(dev);
225 if (dev->mt76.chandef.width == NL80211_CHAN_WIDTH_80) {
226 mt76_wr(dev, MT_BBP(RXO, 14), 0x00560211);
227 val = mt76_rr(dev, MT_BBP(AGC, 26)) & ~0xf;
232 mt76_wr(dev, MT_BBP(AGC, 26), val);
234 mt76_wr(dev, MT_BBP(RXO, 14), 0x00560423);
237 if (mt76x2_has_ext_lna(dev))
243 mt76_wr(dev, MT_BBP(RXO, 18), 0xf000a990);
244 mt76_wr(dev, MT_BBP(AGC, 35), 0x08080808);
245 mt76_wr(dev, MT_BBP(AGC, 37), 0x08080808);
246 gain_delta = low_gain_delta;
247 dev->cal.agc_gain_adjust = 0;
249 mt76_wr(dev, MT_BBP(RXO, 18), 0xf000a991);
250 if (dev->mt76.chandef.width == NL80211_CHAN_WIDTH_80)
251 mt76_wr(dev, MT_BBP(AGC, 35), 0x10101014);
253 mt76_wr(dev, MT_BBP(AGC, 35), 0x11111116);
254 mt76_wr(dev, MT_BBP(AGC, 37), 0x2121262C);
256 dev->cal.agc_gain_adjust = low_gain_delta;
259 dev->cal.agc_gain_cur[0] = gain[0] - gain_delta;
260 dev->cal.agc_gain_cur[1] = gain[1] - gain_delta;
261 mt76x2_phy_set_gain_val(dev);
263 /* clear false CCA counters */
264 mt76_rr(dev, MT_RX_STAT_1);
267 int mt76x2_phy_set_channel(struct mt76x2_dev *dev,
268 struct cfg80211_chan_def *chandef)
270 struct ieee80211_channel *chan = chandef->chan;
271 bool scan = test_bit(MT76_SCANNING, &dev->mt76.state);
272 enum nl80211_band band = chan->band;
275 u32 ext_cca_chan[4] = {
276 [0] = FIELD_PREP(MT_EXT_CCA_CFG_CCA0, 0) |
277 FIELD_PREP(MT_EXT_CCA_CFG_CCA1, 1) |
278 FIELD_PREP(MT_EXT_CCA_CFG_CCA2, 2) |
279 FIELD_PREP(MT_EXT_CCA_CFG_CCA3, 3) |
280 FIELD_PREP(MT_EXT_CCA_CFG_CCA_MASK, BIT(0)),
281 [1] = FIELD_PREP(MT_EXT_CCA_CFG_CCA0, 1) |
282 FIELD_PREP(MT_EXT_CCA_CFG_CCA1, 0) |
283 FIELD_PREP(MT_EXT_CCA_CFG_CCA2, 2) |
284 FIELD_PREP(MT_EXT_CCA_CFG_CCA3, 3) |
285 FIELD_PREP(MT_EXT_CCA_CFG_CCA_MASK, BIT(1)),
286 [2] = FIELD_PREP(MT_EXT_CCA_CFG_CCA0, 2) |
287 FIELD_PREP(MT_EXT_CCA_CFG_CCA1, 3) |
288 FIELD_PREP(MT_EXT_CCA_CFG_CCA2, 1) |
289 FIELD_PREP(MT_EXT_CCA_CFG_CCA3, 0) |
290 FIELD_PREP(MT_EXT_CCA_CFG_CCA_MASK, BIT(2)),
291 [3] = FIELD_PREP(MT_EXT_CCA_CFG_CCA0, 3) |
292 FIELD_PREP(MT_EXT_CCA_CFG_CCA1, 2) |
293 FIELD_PREP(MT_EXT_CCA_CFG_CCA2, 1) |
294 FIELD_PREP(MT_EXT_CCA_CFG_CCA3, 0) |
295 FIELD_PREP(MT_EXT_CCA_CFG_CCA_MASK, BIT(3)),
302 dev->cal.channel_cal_done = false;
303 freq = chandef->chan->center_freq;
304 freq1 = chandef->center_freq1;
305 channel = chan->hw_value;
307 switch (chandef->width) {
308 case NL80211_CHAN_WIDTH_40:
317 channel += 2 - ch_group_index * 4;
319 case NL80211_CHAN_WIDTH_80:
320 ch_group_index = (freq - freq1 + 30) / 20;
321 if (WARN_ON(ch_group_index < 0 || ch_group_index > 3))
324 bw_index = ch_group_index;
325 channel += 6 - ch_group_index * 4;
334 mt76x2_read_rx_gain(dev);
335 mt76x2_phy_set_txpower_regs(dev, band);
336 mt76x2_configure_tx_delay(dev, band, bw);
337 mt76x2_phy_set_txpower(dev);
339 mt76x2_phy_set_band(dev, chan->band, ch_group_index & 1);
340 mt76x2_phy_set_bw(dev, chandef->width, ch_group_index);
342 mt76_rmw(dev, MT_EXT_CCA_CFG,
343 (MT_EXT_CCA_CFG_CCA0 |
344 MT_EXT_CCA_CFG_CCA1 |
345 MT_EXT_CCA_CFG_CCA2 |
346 MT_EXT_CCA_CFG_CCA3 |
347 MT_EXT_CCA_CFG_CCA_MASK),
348 ext_cca_chan[ch_group_index]);
350 ret = mt76x2_mcu_set_channel(dev, channel, bw, bw_index, scan);
354 mt76x2_mcu_init_gain(dev, channel, dev->cal.rx.mcu_gain, true);
356 mt76x2_phy_set_antenna(dev);
359 if (mt76xx_rev(dev) >= MT76XX_REV_E3)
360 mt76_set(dev, MT_BBP(RXO, 13), BIT(10));
362 if (!dev->cal.init_cal_done) {
363 u8 val = mt76x2_eeprom_get(dev, MT_EE_BT_RCAL_RESULT);
366 mt76x2_mcu_calibrate(dev, MCU_CAL_R, 0);
369 mt76x2_mcu_calibrate(dev, MCU_CAL_RXDCOC, channel);
371 /* Rx LPF calibration */
372 if (!dev->cal.init_cal_done)
373 mt76x2_mcu_calibrate(dev, MCU_CAL_RC, 0);
375 dev->cal.init_cal_done = true;
377 mt76_wr(dev, MT_BBP(AGC, 61), 0xFF64A4E2);
378 mt76_wr(dev, MT_BBP(AGC, 7), 0x08081010);
379 mt76_wr(dev, MT_BBP(AGC, 11), 0x00000404);
380 mt76_wr(dev, MT_BBP(AGC, 2), 0x00007070);
381 mt76_wr(dev, MT_TXOP_CTRL_CFG, 0x04101B3F);
386 dev->cal.low_gain = -1;
387 mt76x2_phy_channel_calibrate(dev, true);
388 mt76x2_get_agc_gain(dev, dev->cal.agc_gain_init);
389 memcpy(dev->cal.agc_gain_cur, dev->cal.agc_gain_init,
390 sizeof(dev->cal.agc_gain_cur));
392 /* init default values for temp compensation */
393 if (mt76x2_tssi_enabled(dev)) {
394 mt76_rmw_field(dev, MT_TX_ALC_CFG_1, MT_TX_ALC_CFG_1_TEMP_COMP,
396 mt76_rmw_field(dev, MT_TX_ALC_CFG_2, MT_TX_ALC_CFG_2_TEMP_COMP,
400 ieee80211_queue_delayed_work(mt76_hw(dev), &dev->cal_work,
401 MT_CALIBRATE_INTERVAL);
407 mt76x2_phy_tssi_compensate(struct mt76x2_dev *dev)
409 struct ieee80211_channel *chan = dev->mt76.chandef.chan;
410 struct mt76x2_tx_power_info txp;
411 struct mt76x2_tssi_comp t = {};
413 if (!dev->cal.tssi_cal_done)
416 if (!dev->cal.tssi_comp_pending) {
419 mt76x2_mcu_tssi_comp(dev, &t);
420 dev->cal.tssi_comp_pending = true;
422 if (mt76_rr(dev, MT_BBP(CORE, 34)) & BIT(4))
425 dev->cal.tssi_comp_pending = false;
426 mt76x2_get_power_info(dev, &txp, chan);
428 if (mt76x2_ext_pa_enabled(dev, chan->band))
432 t.slope0 = txp.chain[0].tssi_slope;
433 t.offset0 = txp.chain[0].tssi_offset;
434 t.slope1 = txp.chain[1].tssi_slope;
435 t.offset1 = txp.chain[1].tssi_offset;
436 mt76x2_mcu_tssi_comp(dev, &t);
438 if (t.pa_mode || dev->cal.dpd_cal_done)
441 usleep_range(10000, 20000);
442 mt76x2_mcu_calibrate(dev, MCU_CAL_DPD, chan->hw_value);
443 dev->cal.dpd_cal_done = true;
448 mt76x2_phy_temp_compensate(struct mt76x2_dev *dev)
450 struct mt76x2_temp_comp t;
453 if (mt76x2_get_temp_comp(dev, &t))
456 temp = mt76_get_field(dev, MT_TEMP_SENSOR, MT_TEMP_SENSOR_VAL);
457 temp -= t.temp_25_ref;
458 temp = (temp * 1789) / 1000 + 25;
459 dev->cal.temp = temp;
462 db_diff = (temp - 25) / t.high_slope;
464 db_diff = (25 - temp) / t.low_slope;
466 db_diff = min(db_diff, t.upper_bound);
467 db_diff = max(db_diff, t.lower_bound);
469 mt76_rmw_field(dev, MT_TX_ALC_CFG_1, MT_TX_ALC_CFG_1_TEMP_COMP,
471 mt76_rmw_field(dev, MT_TX_ALC_CFG_2, MT_TX_ALC_CFG_2_TEMP_COMP,
475 void mt76x2_phy_calibrate(struct work_struct *work)
477 struct mt76x2_dev *dev;
479 dev = container_of(work, struct mt76x2_dev, cal_work.work);
480 mt76x2_phy_channel_calibrate(dev, false);
481 mt76x2_phy_tssi_compensate(dev);
482 mt76x2_phy_temp_compensate(dev);
483 mt76x2_phy_update_channel_gain(dev);
484 ieee80211_queue_delayed_work(mt76_hw(dev), &dev->cal_work,
485 MT_CALIBRATE_INTERVAL);
488 int mt76x2_phy_start(struct mt76x2_dev *dev)
492 ret = mt76x2_mcu_set_radio_state(dev, true);
496 mt76x2_mcu_load_cr(dev, MT_RF_BBP_CR, 0, 0);