2 * NXP Wireless LAN device driver: PCIE specific handling
4 * Copyright 2011-2020 NXP
6 * This software file (the "File") is distributed by NXP
7 * under the terms of the GNU General Public License Version 2, June 1991
8 * (the "License"). You may use, redistribute and/or modify this File in
9 * accordance with the terms and conditions of the License, a copy of which
10 * is available by writing to the Free Software Foundation, Inc.,
11 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA or on the
12 * worldwide web at http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt.
14 * THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE
15 * IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE
16 * ARE EXPRESSLY DISCLAIMED. The License provides additional details about
17 * this warranty disclaimer.
20 #include <linux/iopoll.h>
21 #include <linux/firmware.h>
31 #include "pcie_quirks.h"
33 #define PCIE_VERSION "1.0"
34 #define DRV_NAME "Marvell mwifiex PCIe"
36 static struct mwifiex_if_ops pcie_ops;
38 static const struct mwifiex_pcie_card_reg mwifiex_reg_8766 = {
39 .cmd_addr_lo = PCIE_SCRATCH_0_REG,
40 .cmd_addr_hi = PCIE_SCRATCH_1_REG,
41 .cmd_size = PCIE_SCRATCH_2_REG,
42 .fw_status = PCIE_SCRATCH_3_REG,
43 .cmdrsp_addr_lo = PCIE_SCRATCH_4_REG,
44 .cmdrsp_addr_hi = PCIE_SCRATCH_5_REG,
45 .tx_rdptr = PCIE_SCRATCH_6_REG,
46 .tx_wrptr = PCIE_SCRATCH_7_REG,
47 .rx_rdptr = PCIE_SCRATCH_8_REG,
48 .rx_wrptr = PCIE_SCRATCH_9_REG,
49 .evt_rdptr = PCIE_SCRATCH_10_REG,
50 .evt_wrptr = PCIE_SCRATCH_11_REG,
51 .drv_rdy = PCIE_SCRATCH_12_REG,
53 .tx_mask = MWIFIEX_TXBD_MASK,
55 .rx_mask = MWIFIEX_RXBD_MASK,
57 .tx_rollover_ind = MWIFIEX_BD_FLAG_ROLLOVER_IND,
58 .rx_rollover_ind = MWIFIEX_BD_FLAG_ROLLOVER_IND,
59 .evt_rollover_ind = MWIFIEX_BD_FLAG_ROLLOVER_IND,
62 .ring_flag_xs_sop = 0,
63 .ring_flag_xs_eop = 0,
64 .ring_tx_start_ptr = 0,
70 static const struct mwifiex_pcie_card_reg mwifiex_reg_8897 = {
71 .cmd_addr_lo = PCIE_SCRATCH_0_REG,
72 .cmd_addr_hi = PCIE_SCRATCH_1_REG,
73 .cmd_size = PCIE_SCRATCH_2_REG,
74 .fw_status = PCIE_SCRATCH_3_REG,
75 .cmdrsp_addr_lo = PCIE_SCRATCH_4_REG,
76 .cmdrsp_addr_hi = PCIE_SCRATCH_5_REG,
77 .tx_rdptr = PCIE_RD_DATA_PTR_Q0_Q1,
78 .tx_wrptr = PCIE_WR_DATA_PTR_Q0_Q1,
79 .rx_rdptr = PCIE_WR_DATA_PTR_Q0_Q1,
80 .rx_wrptr = PCIE_RD_DATA_PTR_Q0_Q1,
81 .evt_rdptr = PCIE_SCRATCH_10_REG,
82 .evt_wrptr = PCIE_SCRATCH_11_REG,
83 .drv_rdy = PCIE_SCRATCH_12_REG,
85 .tx_mask = 0x03FF0000,
86 .tx_wrap_mask = 0x07FF0000,
87 .rx_mask = 0x000003FF,
88 .rx_wrap_mask = 0x000007FF,
89 .tx_rollover_ind = MWIFIEX_BD_FLAG_TX_ROLLOVER_IND,
90 .rx_rollover_ind = MWIFIEX_BD_FLAG_RX_ROLLOVER_IND,
91 .evt_rollover_ind = MWIFIEX_BD_FLAG_EVT_ROLLOVER_IND,
92 .ring_flag_sop = MWIFIEX_BD_FLAG_SOP,
93 .ring_flag_eop = MWIFIEX_BD_FLAG_EOP,
94 .ring_flag_xs_sop = MWIFIEX_BD_FLAG_XS_SOP,
95 .ring_flag_xs_eop = MWIFIEX_BD_FLAG_XS_EOP,
96 .ring_tx_start_ptr = MWIFIEX_BD_FLAG_TX_START_PTR,
99 .fw_dump_ctrl = PCIE_SCRATCH_13_REG,
100 .fw_dump_start = PCIE_SCRATCH_14_REG,
101 .fw_dump_end = 0xcff,
102 .fw_dump_host_ready = 0xee,
103 .fw_dump_read_done = 0xfe,
107 static const struct mwifiex_pcie_card_reg mwifiex_reg_8997 = {
108 .cmd_addr_lo = PCIE_SCRATCH_0_REG,
109 .cmd_addr_hi = PCIE_SCRATCH_1_REG,
110 .cmd_size = PCIE_SCRATCH_2_REG,
111 .fw_status = PCIE_SCRATCH_3_REG,
112 .cmdrsp_addr_lo = PCIE_SCRATCH_4_REG,
113 .cmdrsp_addr_hi = PCIE_SCRATCH_5_REG,
118 .evt_rdptr = PCIE_SCRATCH_10_REG,
119 .evt_wrptr = PCIE_SCRATCH_11_REG,
120 .drv_rdy = PCIE_SCRATCH_12_REG,
122 .tx_mask = 0x0FFF0000,
123 .tx_wrap_mask = 0x1FFF0000,
124 .rx_mask = 0x00000FFF,
125 .rx_wrap_mask = 0x00001FFF,
126 .tx_rollover_ind = BIT(28),
127 .rx_rollover_ind = BIT(12),
128 .evt_rollover_ind = MWIFIEX_BD_FLAG_EVT_ROLLOVER_IND,
129 .ring_flag_sop = MWIFIEX_BD_FLAG_SOP,
130 .ring_flag_eop = MWIFIEX_BD_FLAG_EOP,
131 .ring_flag_xs_sop = MWIFIEX_BD_FLAG_XS_SOP,
132 .ring_flag_xs_eop = MWIFIEX_BD_FLAG_XS_EOP,
133 .ring_tx_start_ptr = MWIFIEX_BD_FLAG_TX_START_PTR,
136 .fw_dump_ctrl = PCIE_SCRATCH_13_REG,
137 .fw_dump_start = PCIE_SCRATCH_14_REG,
138 .fw_dump_end = 0xcff,
139 .fw_dump_host_ready = 0xcc,
140 .fw_dump_read_done = 0xdd,
144 static struct memory_type_mapping mem_type_mapping_tbl_w8897[] = {
145 {"ITCM", NULL, 0, 0xF0},
146 {"DTCM", NULL, 0, 0xF1},
147 {"SQRAM", NULL, 0, 0xF2},
148 {"IRAM", NULL, 0, 0xF3},
149 {"APU", NULL, 0, 0xF4},
150 {"CIU", NULL, 0, 0xF5},
151 {"ICU", NULL, 0, 0xF6},
152 {"MAC", NULL, 0, 0xF7},
155 static struct memory_type_mapping mem_type_mapping_tbl_w8997[] = {
156 {"DUMP", NULL, 0, 0xDD},
159 static const struct mwifiex_pcie_device mwifiex_pcie8766 = {
160 .reg = &mwifiex_reg_8766,
161 .blksz_fw_dl = MWIFIEX_PCIE_BLOCK_SIZE_FW_DNLD,
162 .tx_buf_size = MWIFIEX_TX_DATA_BUF_SIZE_2K,
163 .can_dump_fw = false,
164 .can_ext_scan = true,
167 static const struct mwifiex_pcie_device mwifiex_pcie8897 = {
168 .reg = &mwifiex_reg_8897,
169 .blksz_fw_dl = MWIFIEX_PCIE_BLOCK_SIZE_FW_DNLD,
170 .tx_buf_size = MWIFIEX_TX_DATA_BUF_SIZE_4K,
172 .mem_type_mapping_tbl = mem_type_mapping_tbl_w8897,
173 .num_mem_types = ARRAY_SIZE(mem_type_mapping_tbl_w8897),
174 .can_ext_scan = true,
177 static const struct mwifiex_pcie_device mwifiex_pcie8997 = {
178 .reg = &mwifiex_reg_8997,
179 .blksz_fw_dl = MWIFIEX_PCIE_BLOCK_SIZE_FW_DNLD,
180 .tx_buf_size = MWIFIEX_TX_DATA_BUF_SIZE_4K,
182 .mem_type_mapping_tbl = mem_type_mapping_tbl_w8997,
183 .num_mem_types = ARRAY_SIZE(mem_type_mapping_tbl_w8997),
184 .can_ext_scan = true,
187 static const struct of_device_id mwifiex_pcie_of_match_table[] = {
188 { .compatible = "pci11ab,2b42" },
189 { .compatible = "pci1b4b,2b42" },
193 static int mwifiex_pcie_probe_of(struct device *dev)
195 if (!of_match_node(mwifiex_pcie_of_match_table, dev->of_node)) {
196 dev_err(dev, "required compatible string missing\n");
203 static void mwifiex_pcie_work(struct work_struct *work);
206 mwifiex_map_pci_memory(struct mwifiex_adapter *adapter, struct sk_buff *skb,
207 size_t size, int flags)
209 struct pcie_service_card *card = adapter->card;
210 struct mwifiex_dma_mapping mapping;
212 mapping.addr = dma_map_single(&card->dev->dev, skb->data, size, flags);
213 if (dma_mapping_error(&card->dev->dev, mapping.addr)) {
214 mwifiex_dbg(adapter, ERROR, "failed to map pci memory!\n");
218 mwifiex_store_mapping(skb, &mapping);
222 static void mwifiex_unmap_pci_memory(struct mwifiex_adapter *adapter,
223 struct sk_buff *skb, int flags)
225 struct pcie_service_card *card = adapter->card;
226 struct mwifiex_dma_mapping mapping;
228 mwifiex_get_mapping(skb, &mapping);
229 dma_unmap_single(&card->dev->dev, mapping.addr, mapping.len, flags);
233 * This function writes data into PCIE card register.
235 static int mwifiex_write_reg(struct mwifiex_adapter *adapter, int reg, u32 data)
237 struct pcie_service_card *card = adapter->card;
239 iowrite32(data, card->pci_mmap1 + reg);
244 /* This function reads data from PCIE card register.
246 static int mwifiex_read_reg(struct mwifiex_adapter *adapter, int reg, u32 *data)
248 struct pcie_service_card *card = adapter->card;
250 *data = ioread32(card->pci_mmap1 + reg);
251 if (*data == 0xffffffff)
257 /* This function reads u8 data from PCIE card register. */
258 static int mwifiex_read_reg_byte(struct mwifiex_adapter *adapter,
261 struct pcie_service_card *card = adapter->card;
263 *data = ioread8(card->pci_mmap1 + reg);
269 * This function reads sleep cookie and checks if FW is ready
271 static bool mwifiex_pcie_ok_to_access_hw(struct mwifiex_adapter *adapter)
274 struct pcie_service_card *card = adapter->card;
275 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
277 if (!reg->sleep_cookie)
280 if (card->sleep_cookie_vbase) {
281 cookie_value = get_unaligned_le32(card->sleep_cookie_vbase);
282 mwifiex_dbg(adapter, INFO,
283 "info: ACCESS_HW: sleep cookie=0x%x\n",
285 if (cookie_value == FW_AWAKE_COOKIE)
292 #ifdef CONFIG_PM_SLEEP
294 * Kernel needs to suspend all functions separately. Therefore all
295 * registered functions must have drivers with suspend and resume
296 * methods. Failing that the kernel simply removes the whole card.
298 * If already not suspended, this function allocates and sends a host
299 * sleep activate request to the firmware and turns off the traffic.
301 static int mwifiex_pcie_suspend(struct device *dev)
303 struct mwifiex_adapter *adapter;
304 struct pcie_service_card *card = dev_get_drvdata(dev);
307 /* Might still be loading firmware */
308 wait_for_completion(&card->fw_done);
310 adapter = card->adapter;
312 dev_err(dev, "adapter is not valid\n");
316 mwifiex_enable_wake(adapter);
318 /* Enable the Host Sleep */
319 if (!mwifiex_enable_hs(adapter)) {
320 mwifiex_dbg(adapter, ERROR,
321 "cmd: failed to suspend\n");
322 clear_bit(MWIFIEX_IS_HS_ENABLING, &adapter->work_flags);
323 mwifiex_disable_wake(adapter);
327 flush_workqueue(adapter->workqueue);
329 /* Indicate device suspended */
330 set_bit(MWIFIEX_IS_SUSPENDED, &adapter->work_flags);
331 clear_bit(MWIFIEX_IS_HS_ENABLING, &adapter->work_flags);
337 * Kernel needs to suspend all functions separately. Therefore all
338 * registered functions must have drivers with suspend and resume
339 * methods. Failing that the kernel simply removes the whole card.
341 * If already not resumed, this function turns on the traffic and
342 * sends a host sleep cancel request to the firmware.
344 static int mwifiex_pcie_resume(struct device *dev)
346 struct mwifiex_adapter *adapter;
347 struct pcie_service_card *card = dev_get_drvdata(dev);
350 if (!card->adapter) {
351 dev_err(dev, "adapter structure is not valid\n");
355 adapter = card->adapter;
357 if (!test_bit(MWIFIEX_IS_SUSPENDED, &adapter->work_flags)) {
358 mwifiex_dbg(adapter, WARN,
359 "Device already resumed\n");
363 clear_bit(MWIFIEX_IS_SUSPENDED, &adapter->work_flags);
365 mwifiex_cancel_hs(mwifiex_get_priv(adapter, MWIFIEX_BSS_ROLE_STA),
367 mwifiex_disable_wake(adapter);
374 * This function probes an mwifiex device and registers it. It allocates
375 * the card structure, enables PCIE function number and initiates the
376 * device registration and initialization procedure by adding a logical
379 static int mwifiex_pcie_probe(struct pci_dev *pdev,
380 const struct pci_device_id *ent)
382 struct pcie_service_card *card;
385 pr_debug("info: vendor=0x%4.04X device=0x%4.04X rev=%d\n",
386 pdev->vendor, pdev->device, pdev->revision);
388 card = devm_kzalloc(&pdev->dev, sizeof(*card), GFP_KERNEL);
392 init_completion(&card->fw_done);
396 if (ent->driver_data) {
397 struct mwifiex_pcie_device *data = (void *)ent->driver_data;
398 card->pcie.reg = data->reg;
399 card->pcie.blksz_fw_dl = data->blksz_fw_dl;
400 card->pcie.tx_buf_size = data->tx_buf_size;
401 card->pcie.can_dump_fw = data->can_dump_fw;
402 card->pcie.mem_type_mapping_tbl = data->mem_type_mapping_tbl;
403 card->pcie.num_mem_types = data->num_mem_types;
404 card->pcie.can_ext_scan = data->can_ext_scan;
405 INIT_WORK(&card->work, mwifiex_pcie_work);
408 /* device tree node parsing and platform specific configuration*/
409 if (pdev->dev.of_node) {
410 ret = mwifiex_pcie_probe_of(&pdev->dev);
416 mwifiex_initialize_quirks(card);
418 if (mwifiex_add_card(card, &card->fw_done, &pcie_ops,
419 MWIFIEX_PCIE, &pdev->dev)) {
420 pr_err("%s failed\n", __func__);
428 * This function removes the interface and frees up the card structure.
430 static void mwifiex_pcie_remove(struct pci_dev *pdev)
432 struct pcie_service_card *card;
433 struct mwifiex_adapter *adapter;
434 struct mwifiex_private *priv;
435 const struct mwifiex_pcie_card_reg *reg;
438 card = pci_get_drvdata(pdev);
440 wait_for_completion(&card->fw_done);
442 adapter = card->adapter;
443 if (!adapter || !adapter->priv_num)
446 reg = card->pcie.reg;
448 mwifiex_read_reg(adapter, reg->fw_status, &fw_status);
452 if (fw_status == FIRMWARE_READY_PCIE && !adapter->mfg_mode) {
453 mwifiex_deauthenticate_all(adapter);
455 priv = mwifiex_get_priv(adapter, MWIFIEX_BSS_ROLE_ANY);
457 mwifiex_disable_auto_ds(priv);
459 mwifiex_init_shutdown_fw(priv, MWIFIEX_FUNC_SHUTDOWN);
462 mwifiex_remove_card(adapter);
465 static void mwifiex_pcie_shutdown(struct pci_dev *pdev)
467 mwifiex_pcie_remove(pdev);
472 static void mwifiex_pcie_coredump(struct device *dev)
474 struct pci_dev *pdev;
475 struct pcie_service_card *card;
477 pdev = container_of(dev, struct pci_dev, dev);
478 card = pci_get_drvdata(pdev);
480 if (!test_and_set_bit(MWIFIEX_IFACE_WORK_DEVICE_DUMP,
482 schedule_work(&card->work);
485 static const struct pci_device_id mwifiex_ids[] = {
487 PCIE_VENDOR_ID_MARVELL, PCIE_DEVICE_ID_MARVELL_88W8766P,
488 PCI_ANY_ID, PCI_ANY_ID, 0, 0,
489 .driver_data = (unsigned long)&mwifiex_pcie8766,
492 PCIE_VENDOR_ID_MARVELL, PCIE_DEVICE_ID_MARVELL_88W8897,
493 PCI_ANY_ID, PCI_ANY_ID, 0, 0,
494 .driver_data = (unsigned long)&mwifiex_pcie8897,
497 PCIE_VENDOR_ID_MARVELL, PCIE_DEVICE_ID_MARVELL_88W8997,
498 PCI_ANY_ID, PCI_ANY_ID, 0, 0,
499 .driver_data = (unsigned long)&mwifiex_pcie8997,
502 PCIE_VENDOR_ID_V2_MARVELL, PCIE_DEVICE_ID_MARVELL_88W8997,
503 PCI_ANY_ID, PCI_ANY_ID, 0, 0,
504 .driver_data = (unsigned long)&mwifiex_pcie8997,
509 MODULE_DEVICE_TABLE(pci, mwifiex_ids);
512 * Cleanup all software without cleaning anything related to PCIe and HW.
514 static void mwifiex_pcie_reset_prepare(struct pci_dev *pdev)
516 struct pcie_service_card *card = pci_get_drvdata(pdev);
517 struct mwifiex_adapter *adapter = card->adapter;
520 dev_err(&pdev->dev, "%s: adapter structure is not valid\n",
525 mwifiex_dbg(adapter, INFO,
526 "%s: vendor=0x%4.04x device=0x%4.04x rev=%d Pre-FLR\n",
527 __func__, pdev->vendor, pdev->device, pdev->revision);
529 mwifiex_shutdown_sw(adapter);
530 clear_bit(MWIFIEX_IFACE_WORK_DEVICE_DUMP, &card->work_flags);
531 clear_bit(MWIFIEX_IFACE_WORK_CARD_RESET, &card->work_flags);
533 /* On MS Surface gen4+ devices FLR isn't effective to recover from
534 * hangups, so we power-cycle the card instead.
536 if (card->quirks & QUIRK_FW_RST_D3COLD)
537 mwifiex_pcie_reset_d3cold_quirk(pdev);
539 mwifiex_dbg(adapter, INFO, "%s, successful\n", __func__);
541 card->pci_reset_ongoing = true;
545 * Kernel stores and restores PCIe function context before and after performing
546 * FLR respectively. Reconfigure the software and firmware including firmware
549 static void mwifiex_pcie_reset_done(struct pci_dev *pdev)
551 struct pcie_service_card *card = pci_get_drvdata(pdev);
552 struct mwifiex_adapter *adapter = card->adapter;
556 dev_err(&pdev->dev, "%s: adapter structure is not valid\n",
561 mwifiex_dbg(adapter, INFO,
562 "%s: vendor=0x%4.04x device=0x%4.04x rev=%d Post-FLR\n",
563 __func__, pdev->vendor, pdev->device, pdev->revision);
565 ret = mwifiex_reinit_sw(adapter);
567 dev_err(&pdev->dev, "reinit failed: %d\n", ret);
569 mwifiex_dbg(adapter, INFO, "%s, successful\n", __func__);
571 card->pci_reset_ongoing = false;
574 static const struct pci_error_handlers mwifiex_pcie_err_handler = {
575 .reset_prepare = mwifiex_pcie_reset_prepare,
576 .reset_done = mwifiex_pcie_reset_done,
579 #ifdef CONFIG_PM_SLEEP
580 /* Power Management Hooks */
581 static SIMPLE_DEV_PM_OPS(mwifiex_pcie_pm_ops, mwifiex_pcie_suspend,
582 mwifiex_pcie_resume);
585 /* PCI Device Driver */
586 static struct pci_driver mwifiex_pcie = {
587 .name = "mwifiex_pcie",
588 .id_table = mwifiex_ids,
589 .probe = mwifiex_pcie_probe,
590 .remove = mwifiex_pcie_remove,
592 .coredump = mwifiex_pcie_coredump,
593 #ifdef CONFIG_PM_SLEEP
594 .pm = &mwifiex_pcie_pm_ops,
597 .shutdown = mwifiex_pcie_shutdown,
598 .err_handler = &mwifiex_pcie_err_handler,
602 * This function adds delay loop to ensure FW is awake before proceeding.
604 static void mwifiex_pcie_dev_wakeup_delay(struct mwifiex_adapter *adapter)
608 while (mwifiex_pcie_ok_to_access_hw(adapter)) {
610 usleep_range(10, 20);
619 static void mwifiex_delay_for_sleep_cookie(struct mwifiex_adapter *adapter,
620 u32 max_delay_loop_cnt)
622 struct pcie_service_card *card = adapter->card;
624 u32 sleep_cookie, count;
625 struct sk_buff *cmdrsp = card->cmdrsp_buf;
627 for (count = 0; count < max_delay_loop_cnt; count++) {
628 dma_sync_single_for_cpu(&card->dev->dev,
629 MWIFIEX_SKB_DMA_ADDR(cmdrsp),
630 sizeof(sleep_cookie), DMA_FROM_DEVICE);
631 buffer = cmdrsp->data;
632 sleep_cookie = get_unaligned_le32(buffer);
634 if (sleep_cookie == MWIFIEX_DEF_SLEEP_COOKIE) {
635 mwifiex_dbg(adapter, INFO,
636 "sleep cookie found at count %d\n", count);
639 dma_sync_single_for_device(&card->dev->dev,
640 MWIFIEX_SKB_DMA_ADDR(cmdrsp),
641 sizeof(sleep_cookie),
643 usleep_range(20, 30);
646 if (count >= max_delay_loop_cnt)
647 mwifiex_dbg(adapter, INFO,
648 "max count reached while accessing sleep cookie\n");
651 #define N_WAKEUP_TRIES_SHORT_INTERVAL 15
652 #define N_WAKEUP_TRIES_LONG_INTERVAL 35
654 /* This function wakes up the card by reading fw_status register. */
655 static int mwifiex_pm_wakeup_card(struct mwifiex_adapter *adapter)
657 struct pcie_service_card *card = adapter->card;
658 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
661 mwifiex_dbg(adapter, EVENT,
662 "event: Wakeup device...\n");
664 if (reg->sleep_cookie)
665 mwifiex_pcie_dev_wakeup_delay(adapter);
667 /* The 88W8897 PCIe+USB firmware (latest version 15.68.19.p21) sometimes
668 * appears to ignore or miss our wakeup request, so we continue trying
669 * until we receive an interrupt from the card.
671 if (read_poll_timeout(mwifiex_write_reg, retval,
672 READ_ONCE(adapter->int_status) != 0,
673 500, 500 * N_WAKEUP_TRIES_SHORT_INTERVAL,
675 adapter, reg->fw_status, FIRMWARE_READY_PCIE)) {
676 if (read_poll_timeout(mwifiex_write_reg, retval,
677 READ_ONCE(adapter->int_status) != 0,
678 10000, 10000 * N_WAKEUP_TRIES_LONG_INTERVAL,
680 adapter, reg->fw_status, FIRMWARE_READY_PCIE)) {
681 mwifiex_dbg(adapter, ERROR,
682 "Firmware didn't wake up\n");
687 if (reg->sleep_cookie) {
688 mwifiex_pcie_dev_wakeup_delay(adapter);
689 mwifiex_dbg(adapter, INFO,
690 "PCIE wakeup: Setting PS_STATE_AWAKE\n");
691 adapter->ps_state = PS_STATE_AWAKE;
698 * This function is called after the card has woken up.
700 * The card configuration register is reset.
702 static int mwifiex_pm_wakeup_card_complete(struct mwifiex_adapter *adapter)
704 mwifiex_dbg(adapter, CMD,
705 "cmd: Wakeup device completed\n");
711 * This function disables the host interrupt.
713 * The host interrupt mask is read, the disable bit is reset and
714 * written back to the card host interrupt mask register.
716 static int mwifiex_pcie_disable_host_int(struct mwifiex_adapter *adapter)
718 if (mwifiex_pcie_ok_to_access_hw(adapter)) {
719 if (mwifiex_write_reg(adapter, PCIE_HOST_INT_MASK,
721 mwifiex_dbg(adapter, ERROR,
722 "Disable host interrupt failed\n");
727 atomic_set(&adapter->tx_hw_pending, 0);
731 static void mwifiex_pcie_disable_host_int_noerr(struct mwifiex_adapter *adapter)
733 WARN_ON(mwifiex_pcie_disable_host_int(adapter));
737 * This function enables the host interrupt.
739 * The host interrupt enable mask is written to the card
740 * host interrupt mask register.
742 static int mwifiex_pcie_enable_host_int(struct mwifiex_adapter *adapter)
744 if (mwifiex_pcie_ok_to_access_hw(adapter)) {
745 /* Simply write the mask to the register */
746 if (mwifiex_write_reg(adapter, PCIE_HOST_INT_MASK,
748 mwifiex_dbg(adapter, ERROR,
749 "Enable host interrupt failed\n");
758 * This function initializes TX buffer ring descriptors
760 static int mwifiex_init_txq_ring(struct mwifiex_adapter *adapter)
762 struct pcie_service_card *card = adapter->card;
763 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
764 struct mwifiex_pcie_buf_desc *desc;
765 struct mwifiex_pfu_buf_desc *desc2;
768 for (i = 0; i < MWIFIEX_MAX_TXRX_BD; i++) {
769 card->tx_buf_list[i] = NULL;
770 if (reg->pfu_enabled) {
771 card->txbd_ring[i] = (void *)card->txbd_ring_vbase +
772 (sizeof(*desc2) * i);
773 desc2 = card->txbd_ring[i];
774 memset(desc2, 0, sizeof(*desc2));
776 card->txbd_ring[i] = (void *)card->txbd_ring_vbase +
778 desc = card->txbd_ring[i];
779 memset(desc, 0, sizeof(*desc));
786 /* This function initializes RX buffer ring descriptors. Each SKB is allocated
787 * here and after mapping PCI memory, its physical address is assigned to
788 * PCIE Rx buffer descriptor's physical address.
790 static int mwifiex_init_rxq_ring(struct mwifiex_adapter *adapter)
792 struct pcie_service_card *card = adapter->card;
793 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
795 struct mwifiex_pcie_buf_desc *desc;
796 struct mwifiex_pfu_buf_desc *desc2;
800 for (i = 0; i < MWIFIEX_MAX_TXRX_BD; i++) {
801 /* Allocate skb here so that firmware can DMA data from it */
802 skb = mwifiex_alloc_dma_align_buf(MWIFIEX_RX_DATA_BUF_SIZE,
805 mwifiex_dbg(adapter, ERROR,
806 "Unable to allocate skb for RX ring.\n");
807 kfree(card->rxbd_ring_vbase);
811 if (mwifiex_map_pci_memory(adapter, skb,
812 MWIFIEX_RX_DATA_BUF_SIZE,
816 buf_pa = MWIFIEX_SKB_DMA_ADDR(skb);
818 mwifiex_dbg(adapter, INFO,
819 "info: RX ring: skb=%p len=%d data=%p buf_pa=%#x:%x\n",
820 skb, skb->len, skb->data, (u32)buf_pa,
821 (u32)((u64)buf_pa >> 32));
823 card->rx_buf_list[i] = skb;
824 if (reg->pfu_enabled) {
825 card->rxbd_ring[i] = (void *)card->rxbd_ring_vbase +
826 (sizeof(*desc2) * i);
827 desc2 = card->rxbd_ring[i];
828 desc2->paddr = buf_pa;
829 desc2->len = (u16)skb->len;
830 desc2->frag_len = (u16)skb->len;
831 desc2->flags = reg->ring_flag_eop | reg->ring_flag_sop;
834 card->rxbd_ring[i] = (void *)(card->rxbd_ring_vbase +
835 (sizeof(*desc) * i));
836 desc = card->rxbd_ring[i];
837 desc->paddr = buf_pa;
838 desc->len = (u16)skb->len;
846 /* This function initializes event buffer ring descriptors. Each SKB is
847 * allocated here and after mapping PCI memory, its physical address is assigned
848 * to PCIE Rx buffer descriptor's physical address
850 static int mwifiex_pcie_init_evt_ring(struct mwifiex_adapter *adapter)
852 struct pcie_service_card *card = adapter->card;
853 struct mwifiex_evt_buf_desc *desc;
858 for (i = 0; i < MWIFIEX_MAX_EVT_BD; i++) {
859 /* Allocate skb here so that firmware can DMA data from it */
860 skb = dev_alloc_skb(MAX_EVENT_SIZE);
862 mwifiex_dbg(adapter, ERROR,
863 "Unable to allocate skb for EVENT buf.\n");
864 kfree(card->evtbd_ring_vbase);
867 skb_put(skb, MAX_EVENT_SIZE);
869 if (mwifiex_map_pci_memory(adapter, skb, MAX_EVENT_SIZE,
872 kfree(card->evtbd_ring_vbase);
876 buf_pa = MWIFIEX_SKB_DMA_ADDR(skb);
878 mwifiex_dbg(adapter, EVENT,
879 "info: EVT ring: skb=%p len=%d data=%p buf_pa=%#x:%x\n",
880 skb, skb->len, skb->data, (u32)buf_pa,
881 (u32)((u64)buf_pa >> 32));
883 card->evt_buf_list[i] = skb;
884 card->evtbd_ring[i] = (void *)(card->evtbd_ring_vbase +
885 (sizeof(*desc) * i));
886 desc = card->evtbd_ring[i];
887 desc->paddr = buf_pa;
888 desc->len = (u16)skb->len;
895 /* This function cleans up TX buffer rings. If any of the buffer list has valid
896 * SKB address, associated SKB is freed.
898 static void mwifiex_cleanup_txq_ring(struct mwifiex_adapter *adapter)
900 struct pcie_service_card *card = adapter->card;
901 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
903 struct mwifiex_pcie_buf_desc *desc;
904 struct mwifiex_pfu_buf_desc *desc2;
907 for (i = 0; i < MWIFIEX_MAX_TXRX_BD; i++) {
908 if (reg->pfu_enabled) {
909 desc2 = card->txbd_ring[i];
910 if (card->tx_buf_list[i]) {
911 skb = card->tx_buf_list[i];
912 mwifiex_unmap_pci_memory(adapter, skb,
914 dev_kfree_skb_any(skb);
916 memset(desc2, 0, sizeof(*desc2));
918 desc = card->txbd_ring[i];
919 if (card->tx_buf_list[i]) {
920 skb = card->tx_buf_list[i];
921 mwifiex_unmap_pci_memory(adapter, skb,
923 dev_kfree_skb_any(skb);
925 memset(desc, 0, sizeof(*desc));
927 card->tx_buf_list[i] = NULL;
930 atomic_set(&adapter->tx_hw_pending, 0);
934 /* This function cleans up RX buffer rings. If any of the buffer list has valid
935 * SKB address, associated SKB is freed.
937 static void mwifiex_cleanup_rxq_ring(struct mwifiex_adapter *adapter)
939 struct pcie_service_card *card = adapter->card;
940 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
941 struct mwifiex_pcie_buf_desc *desc;
942 struct mwifiex_pfu_buf_desc *desc2;
946 for (i = 0; i < MWIFIEX_MAX_TXRX_BD; i++) {
947 if (reg->pfu_enabled) {
948 desc2 = card->rxbd_ring[i];
949 if (card->rx_buf_list[i]) {
950 skb = card->rx_buf_list[i];
951 mwifiex_unmap_pci_memory(adapter, skb,
953 dev_kfree_skb_any(skb);
955 memset(desc2, 0, sizeof(*desc2));
957 desc = card->rxbd_ring[i];
958 if (card->rx_buf_list[i]) {
959 skb = card->rx_buf_list[i];
960 mwifiex_unmap_pci_memory(adapter, skb,
962 dev_kfree_skb_any(skb);
964 memset(desc, 0, sizeof(*desc));
966 card->rx_buf_list[i] = NULL;
972 /* This function cleans up event buffer rings. If any of the buffer list has
973 * valid SKB address, associated SKB is freed.
975 static void mwifiex_cleanup_evt_ring(struct mwifiex_adapter *adapter)
977 struct pcie_service_card *card = adapter->card;
978 struct mwifiex_evt_buf_desc *desc;
982 for (i = 0; i < MWIFIEX_MAX_EVT_BD; i++) {
983 desc = card->evtbd_ring[i];
984 if (card->evt_buf_list[i]) {
985 skb = card->evt_buf_list[i];
986 mwifiex_unmap_pci_memory(adapter, skb,
988 dev_kfree_skb_any(skb);
990 card->evt_buf_list[i] = NULL;
991 memset(desc, 0, sizeof(*desc));
997 /* This function creates buffer descriptor ring for TX
999 static int mwifiex_pcie_create_txbd_ring(struct mwifiex_adapter *adapter)
1001 struct pcie_service_card *card = adapter->card;
1002 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
1005 * driver maintaines the write pointer and firmware maintaines the read
1006 * pointer. The write pointer starts at 0 (zero) while the read pointer
1007 * starts at zero with rollover bit set
1009 card->txbd_wrptr = 0;
1011 if (reg->pfu_enabled)
1012 card->txbd_rdptr = 0;
1014 card->txbd_rdptr |= reg->tx_rollover_ind;
1016 /* allocate shared memory for the BD ring and divide the same in to
1017 several descriptors */
1018 if (reg->pfu_enabled)
1019 card->txbd_ring_size = sizeof(struct mwifiex_pfu_buf_desc) *
1020 MWIFIEX_MAX_TXRX_BD;
1022 card->txbd_ring_size = sizeof(struct mwifiex_pcie_buf_desc) *
1023 MWIFIEX_MAX_TXRX_BD;
1025 mwifiex_dbg(adapter, INFO,
1026 "info: txbd_ring: Allocating %d bytes\n",
1027 card->txbd_ring_size);
1028 card->txbd_ring_vbase = dma_alloc_coherent(&card->dev->dev,
1029 card->txbd_ring_size,
1030 &card->txbd_ring_pbase,
1032 if (!card->txbd_ring_vbase) {
1033 mwifiex_dbg(adapter, ERROR,
1034 "allocate coherent memory (%d bytes) failed!\n",
1035 card->txbd_ring_size);
1039 mwifiex_dbg(adapter, DATA,
1040 "info: txbd_ring - base: %p, pbase: %#x:%x, len: %#x\n",
1041 card->txbd_ring_vbase, (u32)card->txbd_ring_pbase,
1042 (u32)((u64)card->txbd_ring_pbase >> 32),
1043 card->txbd_ring_size);
1045 return mwifiex_init_txq_ring(adapter);
1048 static int mwifiex_pcie_delete_txbd_ring(struct mwifiex_adapter *adapter)
1050 struct pcie_service_card *card = adapter->card;
1051 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
1053 mwifiex_cleanup_txq_ring(adapter);
1055 if (card->txbd_ring_vbase)
1056 dma_free_coherent(&card->dev->dev, card->txbd_ring_size,
1057 card->txbd_ring_vbase,
1058 card->txbd_ring_pbase);
1059 card->txbd_ring_size = 0;
1060 card->txbd_wrptr = 0;
1061 card->txbd_rdptr = 0 | reg->tx_rollover_ind;
1062 card->txbd_ring_vbase = NULL;
1063 card->txbd_ring_pbase = 0;
1069 * This function creates buffer descriptor ring for RX
1071 static int mwifiex_pcie_create_rxbd_ring(struct mwifiex_adapter *adapter)
1073 struct pcie_service_card *card = adapter->card;
1074 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
1077 * driver maintaines the read pointer and firmware maintaines the write
1078 * pointer. The write pointer starts at 0 (zero) while the read pointer
1079 * starts at zero with rollover bit set
1081 card->rxbd_wrptr = 0;
1082 card->rxbd_rdptr = reg->rx_rollover_ind;
1084 if (reg->pfu_enabled)
1085 card->rxbd_ring_size = sizeof(struct mwifiex_pfu_buf_desc) *
1086 MWIFIEX_MAX_TXRX_BD;
1088 card->rxbd_ring_size = sizeof(struct mwifiex_pcie_buf_desc) *
1089 MWIFIEX_MAX_TXRX_BD;
1091 mwifiex_dbg(adapter, INFO,
1092 "info: rxbd_ring: Allocating %d bytes\n",
1093 card->rxbd_ring_size);
1094 card->rxbd_ring_vbase = dma_alloc_coherent(&card->dev->dev,
1095 card->rxbd_ring_size,
1096 &card->rxbd_ring_pbase,
1098 if (!card->rxbd_ring_vbase) {
1099 mwifiex_dbg(adapter, ERROR,
1100 "allocate coherent memory (%d bytes) failed!\n",
1101 card->rxbd_ring_size);
1105 mwifiex_dbg(adapter, DATA,
1106 "info: rxbd_ring - base: %p, pbase: %#x:%x, len: %#x\n",
1107 card->rxbd_ring_vbase, (u32)card->rxbd_ring_pbase,
1108 (u32)((u64)card->rxbd_ring_pbase >> 32),
1109 card->rxbd_ring_size);
1111 return mwifiex_init_rxq_ring(adapter);
1115 * This function deletes Buffer descriptor ring for RX
1117 static int mwifiex_pcie_delete_rxbd_ring(struct mwifiex_adapter *adapter)
1119 struct pcie_service_card *card = adapter->card;
1120 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
1122 mwifiex_cleanup_rxq_ring(adapter);
1124 if (card->rxbd_ring_vbase)
1125 dma_free_coherent(&card->dev->dev, card->rxbd_ring_size,
1126 card->rxbd_ring_vbase,
1127 card->rxbd_ring_pbase);
1128 card->rxbd_ring_size = 0;
1129 card->rxbd_wrptr = 0;
1130 card->rxbd_rdptr = 0 | reg->rx_rollover_ind;
1131 card->rxbd_ring_vbase = NULL;
1132 card->rxbd_ring_pbase = 0;
1138 * This function creates buffer descriptor ring for Events
1140 static int mwifiex_pcie_create_evtbd_ring(struct mwifiex_adapter *adapter)
1142 struct pcie_service_card *card = adapter->card;
1143 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
1146 * driver maintaines the read pointer and firmware maintaines the write
1147 * pointer. The write pointer starts at 0 (zero) while the read pointer
1148 * starts at zero with rollover bit set
1150 card->evtbd_wrptr = 0;
1151 card->evtbd_rdptr = reg->evt_rollover_ind;
1153 card->evtbd_ring_size = sizeof(struct mwifiex_evt_buf_desc) *
1156 mwifiex_dbg(adapter, INFO,
1157 "info: evtbd_ring: Allocating %d bytes\n",
1158 card->evtbd_ring_size);
1159 card->evtbd_ring_vbase = dma_alloc_coherent(&card->dev->dev,
1160 card->evtbd_ring_size,
1161 &card->evtbd_ring_pbase,
1163 if (!card->evtbd_ring_vbase) {
1164 mwifiex_dbg(adapter, ERROR,
1165 "allocate coherent memory (%d bytes) failed!\n",
1166 card->evtbd_ring_size);
1170 mwifiex_dbg(adapter, EVENT,
1171 "info: CMDRSP/EVT bd_ring - base: %p pbase: %#x:%x len: %#x\n",
1172 card->evtbd_ring_vbase, (u32)card->evtbd_ring_pbase,
1173 (u32)((u64)card->evtbd_ring_pbase >> 32),
1174 card->evtbd_ring_size);
1176 return mwifiex_pcie_init_evt_ring(adapter);
1180 * This function deletes Buffer descriptor ring for Events
1182 static int mwifiex_pcie_delete_evtbd_ring(struct mwifiex_adapter *adapter)
1184 struct pcie_service_card *card = adapter->card;
1185 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
1187 mwifiex_cleanup_evt_ring(adapter);
1189 if (card->evtbd_ring_vbase)
1190 dma_free_coherent(&card->dev->dev, card->evtbd_ring_size,
1191 card->evtbd_ring_vbase,
1192 card->evtbd_ring_pbase);
1193 card->evtbd_wrptr = 0;
1194 card->evtbd_rdptr = 0 | reg->evt_rollover_ind;
1195 card->evtbd_ring_size = 0;
1196 card->evtbd_ring_vbase = NULL;
1197 card->evtbd_ring_pbase = 0;
1203 * This function allocates a buffer for CMDRSP
1205 static int mwifiex_pcie_alloc_cmdrsp_buf(struct mwifiex_adapter *adapter)
1207 struct pcie_service_card *card = adapter->card;
1208 struct sk_buff *skb;
1210 /* Allocate memory for receiving command response data */
1211 skb = dev_alloc_skb(MWIFIEX_UPLD_SIZE);
1213 mwifiex_dbg(adapter, ERROR,
1214 "Unable to allocate skb for command response data.\n");
1217 skb_put(skb, MWIFIEX_UPLD_SIZE);
1218 if (mwifiex_map_pci_memory(adapter, skb, MWIFIEX_UPLD_SIZE,
1224 card->cmdrsp_buf = skb;
1230 * This function deletes a buffer for CMDRSP
1232 static int mwifiex_pcie_delete_cmdrsp_buf(struct mwifiex_adapter *adapter)
1234 struct pcie_service_card *card;
1239 card = adapter->card;
1241 if (card && card->cmdrsp_buf) {
1242 mwifiex_unmap_pci_memory(adapter, card->cmdrsp_buf,
1244 dev_kfree_skb_any(card->cmdrsp_buf);
1245 card->cmdrsp_buf = NULL;
1248 if (card && card->cmd_buf) {
1249 mwifiex_unmap_pci_memory(adapter, card->cmd_buf,
1251 dev_kfree_skb_any(card->cmd_buf);
1252 card->cmd_buf = NULL;
1258 * This function allocates a buffer for sleep cookie
1260 static int mwifiex_pcie_alloc_sleep_cookie_buf(struct mwifiex_adapter *adapter)
1262 struct pcie_service_card *card = adapter->card;
1265 card->sleep_cookie_vbase = dma_alloc_coherent(&card->dev->dev,
1267 &card->sleep_cookie_pbase,
1269 if (!card->sleep_cookie_vbase) {
1270 mwifiex_dbg(adapter, ERROR,
1271 "dma_alloc_coherent failed!\n");
1274 cookie = (u32 *)card->sleep_cookie_vbase;
1275 /* Init val of Sleep Cookie */
1276 *cookie = FW_AWAKE_COOKIE;
1278 mwifiex_dbg(adapter, INFO, "alloc_scook: sleep cookie=0x%x\n", *cookie);
1284 * This function deletes buffer for sleep cookie
1286 static int mwifiex_pcie_delete_sleep_cookie_buf(struct mwifiex_adapter *adapter)
1288 struct pcie_service_card *card;
1293 card = adapter->card;
1295 if (card && card->sleep_cookie_vbase) {
1296 dma_free_coherent(&card->dev->dev, sizeof(u32),
1297 card->sleep_cookie_vbase,
1298 card->sleep_cookie_pbase);
1299 card->sleep_cookie_vbase = NULL;
1305 /* This function flushes the TX buffer descriptor ring
1306 * This function defined as handler is also called while cleaning TXRX
1307 * during disconnect/ bss stop.
1309 static int mwifiex_clean_pcie_ring_buf(struct mwifiex_adapter *adapter)
1311 struct pcie_service_card *card = adapter->card;
1313 if (!mwifiex_pcie_txbd_empty(card, card->txbd_rdptr)) {
1314 card->txbd_flush = 1;
1315 /* write pointer already set at last send
1316 * send dnld-rdy intr again, wait for completion.
1318 if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT,
1319 CPU_INTR_DNLD_RDY)) {
1320 mwifiex_dbg(adapter, ERROR,
1321 "failed to assert dnld-rdy interrupt.\n");
1329 * This function unmaps and frees downloaded data buffer
1331 static int mwifiex_pcie_send_data_complete(struct mwifiex_adapter *adapter)
1333 struct sk_buff *skb;
1334 u32 wrdoneidx, rdptr, num_tx_buffs, unmap_count = 0;
1335 struct mwifiex_pcie_buf_desc *desc;
1336 struct mwifiex_pfu_buf_desc *desc2;
1337 struct pcie_service_card *card = adapter->card;
1338 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
1340 if (!mwifiex_pcie_ok_to_access_hw(adapter))
1341 mwifiex_pm_wakeup_card(adapter);
1343 /* Read the TX ring read pointer set by firmware */
1344 if (mwifiex_read_reg(adapter, reg->tx_rdptr, &rdptr)) {
1345 mwifiex_dbg(adapter, ERROR,
1346 "SEND COMP: failed to read reg->tx_rdptr\n");
1350 mwifiex_dbg(adapter, DATA,
1351 "SEND COMP: rdptr_prev=0x%x, rdptr=0x%x\n",
1352 card->txbd_rdptr, rdptr);
1354 num_tx_buffs = MWIFIEX_MAX_TXRX_BD << reg->tx_start_ptr;
1355 /* free from previous txbd_rdptr to current txbd_rdptr */
1356 while (((card->txbd_rdptr & reg->tx_mask) !=
1357 (rdptr & reg->tx_mask)) ||
1358 ((card->txbd_rdptr & reg->tx_rollover_ind) !=
1359 (rdptr & reg->tx_rollover_ind))) {
1360 wrdoneidx = (card->txbd_rdptr & reg->tx_mask) >>
1363 skb = card->tx_buf_list[wrdoneidx];
1366 mwifiex_dbg(adapter, DATA,
1367 "SEND COMP: Detach skb %p at txbd_rdidx=%d\n",
1369 mwifiex_unmap_pci_memory(adapter, skb,
1374 if (card->txbd_flush)
1375 mwifiex_write_data_complete(adapter, skb, 0,
1378 mwifiex_write_data_complete(adapter, skb, 0, 0);
1379 atomic_dec(&adapter->tx_hw_pending);
1382 card->tx_buf_list[wrdoneidx] = NULL;
1384 if (reg->pfu_enabled) {
1385 desc2 = card->txbd_ring[wrdoneidx];
1386 memset(desc2, 0, sizeof(*desc2));
1388 desc = card->txbd_ring[wrdoneidx];
1389 memset(desc, 0, sizeof(*desc));
1391 switch (card->dev->device) {
1392 case PCIE_DEVICE_ID_MARVELL_88W8766P:
1395 case PCIE_DEVICE_ID_MARVELL_88W8897:
1396 case PCIE_DEVICE_ID_MARVELL_88W8997:
1397 card->txbd_rdptr += reg->ring_tx_start_ptr;
1402 if ((card->txbd_rdptr & reg->tx_mask) == num_tx_buffs)
1403 card->txbd_rdptr = ((card->txbd_rdptr &
1404 reg->tx_rollover_ind) ^
1405 reg->tx_rollover_ind);
1409 adapter->data_sent = false;
1411 if (card->txbd_flush) {
1412 if (mwifiex_pcie_txbd_empty(card, card->txbd_rdptr))
1413 card->txbd_flush = 0;
1415 mwifiex_clean_pcie_ring_buf(adapter);
1421 /* This function sends data buffer to device. First 4 bytes of payload
1422 * are filled with payload length and payload type. Then this payload
1423 * is mapped to PCI device memory. Tx ring pointers are advanced accordingly.
1424 * Download ready interrupt to FW is deffered if Tx ring is not full and
1425 * additional payload can be accomodated.
1426 * Caller must ensure tx_param parameter to this function is not NULL.
1429 mwifiex_pcie_send_data(struct mwifiex_adapter *adapter, struct sk_buff *skb,
1430 struct mwifiex_tx_param *tx_param)
1432 struct pcie_service_card *card = adapter->card;
1433 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
1434 u32 wrindx, num_tx_buffs, rx_val;
1437 struct mwifiex_pcie_buf_desc *desc = NULL;
1438 struct mwifiex_pfu_buf_desc *desc2 = NULL;
1440 if (!(skb->data && skb->len)) {
1441 mwifiex_dbg(adapter, ERROR,
1442 "%s(): invalid parameter <%p, %#x>\n",
1443 __func__, skb->data, skb->len);
1447 if (!mwifiex_pcie_ok_to_access_hw(adapter))
1448 mwifiex_pm_wakeup_card(adapter);
1450 num_tx_buffs = MWIFIEX_MAX_TXRX_BD << reg->tx_start_ptr;
1451 mwifiex_dbg(adapter, DATA,
1452 "info: SEND DATA: <Rd: %#x, Wr: %#x>\n",
1453 card->txbd_rdptr, card->txbd_wrptr);
1454 if (mwifiex_pcie_txbd_not_full(card)) {
1457 adapter->data_sent = true;
1458 payload = skb->data;
1459 put_unaligned_le16((u16)skb->len, payload + 0);
1460 put_unaligned_le16(MWIFIEX_TYPE_DATA, payload + 2);
1462 if (mwifiex_map_pci_memory(adapter, skb, skb->len,
1466 wrindx = (card->txbd_wrptr & reg->tx_mask) >> reg->tx_start_ptr;
1467 buf_pa = MWIFIEX_SKB_DMA_ADDR(skb);
1468 card->tx_buf_list[wrindx] = skb;
1469 atomic_inc(&adapter->tx_hw_pending);
1471 if (reg->pfu_enabled) {
1472 desc2 = card->txbd_ring[wrindx];
1473 desc2->paddr = buf_pa;
1474 desc2->len = (u16)skb->len;
1475 desc2->frag_len = (u16)skb->len;
1477 desc2->flags = MWIFIEX_BD_FLAG_FIRST_DESC |
1478 MWIFIEX_BD_FLAG_LAST_DESC;
1480 desc = card->txbd_ring[wrindx];
1481 desc->paddr = buf_pa;
1482 desc->len = (u16)skb->len;
1483 desc->flags = MWIFIEX_BD_FLAG_FIRST_DESC |
1484 MWIFIEX_BD_FLAG_LAST_DESC;
1487 switch (card->dev->device) {
1488 case PCIE_DEVICE_ID_MARVELL_88W8766P:
1491 case PCIE_DEVICE_ID_MARVELL_88W8897:
1492 case PCIE_DEVICE_ID_MARVELL_88W8997:
1493 card->txbd_wrptr += reg->ring_tx_start_ptr;
1497 if ((card->txbd_wrptr & reg->tx_mask) == num_tx_buffs)
1498 card->txbd_wrptr = ((card->txbd_wrptr &
1499 reg->tx_rollover_ind) ^
1500 reg->tx_rollover_ind);
1502 rx_val = card->rxbd_rdptr & reg->rx_wrap_mask;
1503 /* Write the TX ring write pointer in to reg->tx_wrptr */
1504 if (mwifiex_write_reg(adapter, reg->tx_wrptr,
1505 card->txbd_wrptr | rx_val)) {
1506 mwifiex_dbg(adapter, ERROR,
1507 "SEND DATA: failed to write reg->tx_wrptr\n");
1512 /* The firmware (latest version 15.68.19.p21) of the 88W8897 PCIe+USB card
1513 * seems to crash randomly after setting the TX ring write pointer when
1514 * ASPM powersaving is enabled. A workaround seems to be keeping the bus
1515 * busy by reading a random register afterwards.
1517 mwifiex_read_reg(adapter, PCI_VENDOR_ID, &rx_val);
1519 if ((mwifiex_pcie_txbd_not_full(card)) &&
1520 tx_param->next_pkt_len) {
1521 /* have more packets and TxBD still can hold more */
1522 mwifiex_dbg(adapter, DATA,
1523 "SEND DATA: delay dnld-rdy interrupt.\n");
1524 adapter->data_sent = false;
1526 /* Send the TX ready interrupt */
1527 if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT,
1528 CPU_INTR_DNLD_RDY)) {
1529 mwifiex_dbg(adapter, ERROR,
1530 "SEND DATA: failed to assert dnld-rdy interrupt.\n");
1535 mwifiex_dbg(adapter, DATA,
1536 "info: SEND DATA: Updated <Rd: %#x, Wr:\t"
1537 "%#x> and sent packet to firmware successfully\n",
1538 card->txbd_rdptr, card->txbd_wrptr);
1540 mwifiex_dbg(adapter, DATA,
1541 "info: TX Ring full, can't send packets to fw\n");
1542 adapter->data_sent = true;
1543 /* Send the TX ready interrupt */
1544 if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT,
1546 mwifiex_dbg(adapter, ERROR,
1547 "SEND DATA: failed to assert door-bell intr\n");
1551 return -EINPROGRESS;
1553 mwifiex_unmap_pci_memory(adapter, skb, DMA_TO_DEVICE);
1554 card->tx_buf_list[wrindx] = NULL;
1555 atomic_dec(&adapter->tx_hw_pending);
1556 if (reg->pfu_enabled)
1557 memset(desc2, 0, sizeof(*desc2));
1559 memset(desc, 0, sizeof(*desc));
1565 * This function handles received buffer ring and
1566 * dispatches packets to upper
1568 static int mwifiex_pcie_process_recv_data(struct mwifiex_adapter *adapter)
1570 struct pcie_service_card *card = adapter->card;
1571 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
1572 u32 wrptr, rd_index, tx_val;
1575 struct sk_buff *skb_tmp = NULL;
1576 struct mwifiex_pcie_buf_desc *desc;
1577 struct mwifiex_pfu_buf_desc *desc2;
1579 if (!mwifiex_pcie_ok_to_access_hw(adapter))
1580 mwifiex_pm_wakeup_card(adapter);
1582 /* Read the RX ring Write pointer set by firmware */
1583 if (mwifiex_read_reg(adapter, reg->rx_wrptr, &wrptr)) {
1584 mwifiex_dbg(adapter, ERROR,
1585 "RECV DATA: failed to read reg->rx_wrptr\n");
1589 card->rxbd_wrptr = wrptr;
1591 while (((wrptr & reg->rx_mask) !=
1592 (card->rxbd_rdptr & reg->rx_mask)) ||
1593 ((wrptr & reg->rx_rollover_ind) ==
1594 (card->rxbd_rdptr & reg->rx_rollover_ind))) {
1595 struct sk_buff *skb_data;
1598 rd_index = card->rxbd_rdptr & reg->rx_mask;
1599 skb_data = card->rx_buf_list[rd_index];
1601 /* If skb allocation was failed earlier for Rx packet,
1602 * rx_buf_list[rd_index] would have been left with a NULL.
1607 mwifiex_unmap_pci_memory(adapter, skb_data, DMA_FROM_DEVICE);
1608 card->rx_buf_list[rd_index] = NULL;
1610 /* Get data length from interface header -
1611 * first 2 bytes for len, next 2 bytes is for type
1613 rx_len = get_unaligned_le16(skb_data->data);
1614 if (WARN_ON(rx_len <= adapter->intf_hdr_len ||
1615 rx_len > MWIFIEX_RX_DATA_BUF_SIZE)) {
1616 mwifiex_dbg(adapter, ERROR,
1617 "Invalid RX len %d, Rd=%#x, Wr=%#x\n",
1618 rx_len, card->rxbd_rdptr, wrptr);
1619 dev_kfree_skb_any(skb_data);
1621 skb_put(skb_data, rx_len);
1622 mwifiex_dbg(adapter, DATA,
1623 "info: RECV DATA: Rd=%#x, Wr=%#x, Len=%d\n",
1624 card->rxbd_rdptr, wrptr, rx_len);
1625 skb_pull(skb_data, adapter->intf_hdr_len);
1626 if (adapter->rx_work_enabled) {
1627 skb_queue_tail(&adapter->rx_data_q, skb_data);
1628 adapter->data_received = true;
1629 atomic_inc(&adapter->rx_pending);
1631 mwifiex_handle_rx_packet(adapter, skb_data);
1635 skb_tmp = mwifiex_alloc_dma_align_buf(MWIFIEX_RX_DATA_BUF_SIZE,
1638 mwifiex_dbg(adapter, ERROR,
1639 "Unable to allocate skb.\n");
1643 if (mwifiex_map_pci_memory(adapter, skb_tmp,
1644 MWIFIEX_RX_DATA_BUF_SIZE,
1648 buf_pa = MWIFIEX_SKB_DMA_ADDR(skb_tmp);
1650 mwifiex_dbg(adapter, INFO,
1651 "RECV DATA: Attach new sk_buff %p at rxbd_rdidx=%d\n",
1653 card->rx_buf_list[rd_index] = skb_tmp;
1655 if (reg->pfu_enabled) {
1656 desc2 = card->rxbd_ring[rd_index];
1657 desc2->paddr = buf_pa;
1658 desc2->len = skb_tmp->len;
1659 desc2->frag_len = skb_tmp->len;
1661 desc2->flags = reg->ring_flag_sop | reg->ring_flag_eop;
1663 desc = card->rxbd_ring[rd_index];
1664 desc->paddr = buf_pa;
1665 desc->len = skb_tmp->len;
1669 if ((++card->rxbd_rdptr & reg->rx_mask) ==
1670 MWIFIEX_MAX_TXRX_BD) {
1671 card->rxbd_rdptr = ((card->rxbd_rdptr &
1672 reg->rx_rollover_ind) ^
1673 reg->rx_rollover_ind);
1675 mwifiex_dbg(adapter, DATA,
1676 "info: RECV DATA: <Rd: %#x, Wr: %#x>\n",
1677 card->rxbd_rdptr, wrptr);
1679 tx_val = card->txbd_wrptr & reg->tx_wrap_mask;
1680 /* Write the RX ring read pointer in to reg->rx_rdptr */
1681 if (mwifiex_write_reg(adapter, reg->rx_rdptr,
1682 card->rxbd_rdptr | tx_val)) {
1683 mwifiex_dbg(adapter, DATA,
1684 "RECV DATA: failed to write reg->rx_rdptr\n");
1689 /* Read the RX ring Write pointer set by firmware */
1690 if (mwifiex_read_reg(adapter, reg->rx_wrptr, &wrptr)) {
1691 mwifiex_dbg(adapter, ERROR,
1692 "RECV DATA: failed to read reg->rx_wrptr\n");
1696 mwifiex_dbg(adapter, DATA,
1697 "info: RECV DATA: Rcvd packet from fw successfully\n");
1698 card->rxbd_wrptr = wrptr;
1706 * This function downloads the boot command to device
1709 mwifiex_pcie_send_boot_cmd(struct mwifiex_adapter *adapter, struct sk_buff *skb)
1712 struct pcie_service_card *card = adapter->card;
1713 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
1715 if (!(skb->data && skb->len)) {
1716 mwifiex_dbg(adapter, ERROR,
1717 "Invalid parameter in %s <%p. len %d>\n",
1718 __func__, skb->data, skb->len);
1722 if (mwifiex_map_pci_memory(adapter, skb, skb->len, DMA_TO_DEVICE))
1725 buf_pa = MWIFIEX_SKB_DMA_ADDR(skb);
1727 /* Write the lower 32bits of the physical address to low command
1728 * address scratch register
1730 if (mwifiex_write_reg(adapter, reg->cmd_addr_lo, (u32)buf_pa)) {
1731 mwifiex_dbg(adapter, ERROR,
1732 "%s: failed to write download command to boot code.\n",
1734 mwifiex_unmap_pci_memory(adapter, skb, DMA_TO_DEVICE);
1738 /* Write the upper 32bits of the physical address to high command
1739 * address scratch register
1741 if (mwifiex_write_reg(adapter, reg->cmd_addr_hi,
1742 (u32)((u64)buf_pa >> 32))) {
1743 mwifiex_dbg(adapter, ERROR,
1744 "%s: failed to write download command to boot code.\n",
1746 mwifiex_unmap_pci_memory(adapter, skb, DMA_TO_DEVICE);
1750 /* Write the command length to cmd_size scratch register */
1751 if (mwifiex_write_reg(adapter, reg->cmd_size, skb->len)) {
1752 mwifiex_dbg(adapter, ERROR,
1753 "%s: failed to write command len to cmd_size scratch reg\n",
1755 mwifiex_unmap_pci_memory(adapter, skb, DMA_TO_DEVICE);
1759 /* Ring the door bell */
1760 if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT,
1761 CPU_INTR_DOOR_BELL)) {
1762 mwifiex_dbg(adapter, ERROR,
1763 "%s: failed to assert door-bell intr\n", __func__);
1764 mwifiex_unmap_pci_memory(adapter, skb, DMA_TO_DEVICE);
1771 /* This function init rx port in firmware which in turn enables to receive data
1772 * from device before transmitting any packet.
1774 static int mwifiex_pcie_init_fw_port(struct mwifiex_adapter *adapter)
1776 struct pcie_service_card *card = adapter->card;
1777 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
1778 int tx_wrap = card->txbd_wrptr & reg->tx_wrap_mask;
1780 /* Write the RX ring read pointer in to reg->rx_rdptr */
1781 if (mwifiex_write_reg(adapter, reg->rx_rdptr, card->rxbd_rdptr |
1783 mwifiex_dbg(adapter, ERROR,
1784 "RECV DATA: failed to write reg->rx_rdptr\n");
1790 /* This function downloads commands to the device
1793 mwifiex_pcie_send_cmd(struct mwifiex_adapter *adapter, struct sk_buff *skb)
1795 struct pcie_service_card *card = adapter->card;
1796 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
1798 dma_addr_t cmd_buf_pa, cmdrsp_buf_pa;
1799 u8 *payload = (u8 *)skb->data;
1801 if (!(skb->data && skb->len)) {
1802 mwifiex_dbg(adapter, ERROR,
1803 "Invalid parameter in %s <%p, %#x>\n",
1804 __func__, skb->data, skb->len);
1808 /* Make sure a command response buffer is available */
1809 if (!card->cmdrsp_buf) {
1810 mwifiex_dbg(adapter, ERROR,
1811 "No response buffer available, send command failed\n");
1815 if (!mwifiex_pcie_ok_to_access_hw(adapter))
1816 mwifiex_pm_wakeup_card(adapter);
1818 adapter->cmd_sent = true;
1820 put_unaligned_le16((u16)skb->len, &payload[0]);
1821 put_unaligned_le16(MWIFIEX_TYPE_CMD, &payload[2]);
1823 if (mwifiex_map_pci_memory(adapter, skb, skb->len, DMA_TO_DEVICE))
1826 card->cmd_buf = skb;
1828 * Need to keep a reference, since core driver might free up this
1829 * buffer before we've unmapped it.
1833 /* To send a command, the driver will:
1834 1. Write the 64bit physical address of the data buffer to
1835 cmd response address low + cmd response address high
1836 2. Ring the door bell (i.e. set the door bell interrupt)
1838 In response to door bell interrupt, the firmware will perform
1839 the DMA of the command packet (first header to obtain the total
1840 length and then rest of the command).
1843 if (card->cmdrsp_buf) {
1844 cmdrsp_buf_pa = MWIFIEX_SKB_DMA_ADDR(card->cmdrsp_buf);
1845 /* Write the lower 32bits of the cmdrsp buffer physical
1847 if (mwifiex_write_reg(adapter, reg->cmdrsp_addr_lo,
1848 (u32)cmdrsp_buf_pa)) {
1849 mwifiex_dbg(adapter, ERROR,
1850 "Failed to write download cmd to boot code.\n");
1854 /* Write the upper 32bits of the cmdrsp buffer physical
1856 if (mwifiex_write_reg(adapter, reg->cmdrsp_addr_hi,
1857 (u32)((u64)cmdrsp_buf_pa >> 32))) {
1858 mwifiex_dbg(adapter, ERROR,
1859 "Failed to write download cmd to boot code.\n");
1865 cmd_buf_pa = MWIFIEX_SKB_DMA_ADDR(card->cmd_buf);
1866 /* Write the lower 32bits of the physical address to reg->cmd_addr_lo */
1867 if (mwifiex_write_reg(adapter, reg->cmd_addr_lo,
1869 mwifiex_dbg(adapter, ERROR,
1870 "Failed to write download cmd to boot code.\n");
1874 /* Write the upper 32bits of the physical address to reg->cmd_addr_hi */
1875 if (mwifiex_write_reg(adapter, reg->cmd_addr_hi,
1876 (u32)((u64)cmd_buf_pa >> 32))) {
1877 mwifiex_dbg(adapter, ERROR,
1878 "Failed to write download cmd to boot code.\n");
1883 /* Write the command length to reg->cmd_size */
1884 if (mwifiex_write_reg(adapter, reg->cmd_size,
1885 card->cmd_buf->len)) {
1886 mwifiex_dbg(adapter, ERROR,
1887 "Failed to write cmd len to reg->cmd_size\n");
1892 /* Ring the door bell */
1893 if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT,
1894 CPU_INTR_DOOR_BELL)) {
1895 mwifiex_dbg(adapter, ERROR,
1896 "Failed to assert door-bell intr\n");
1903 adapter->cmd_sent = false;
1909 * This function handles command complete interrupt
1911 static int mwifiex_pcie_process_cmd_complete(struct mwifiex_adapter *adapter)
1913 struct pcie_service_card *card = adapter->card;
1914 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
1915 struct sk_buff *skb = card->cmdrsp_buf;
1919 mwifiex_dbg(adapter, CMD,
1920 "info: Rx CMD Response\n");
1922 if (adapter->curr_cmd)
1923 mwifiex_unmap_pci_memory(adapter, skb, DMA_FROM_DEVICE);
1925 dma_sync_single_for_cpu(&card->dev->dev,
1926 MWIFIEX_SKB_DMA_ADDR(skb),
1927 MWIFIEX_UPLD_SIZE, DMA_FROM_DEVICE);
1929 /* Unmap the command as a response has been received. */
1930 if (card->cmd_buf) {
1931 mwifiex_unmap_pci_memory(adapter, card->cmd_buf,
1933 dev_kfree_skb_any(card->cmd_buf);
1934 card->cmd_buf = NULL;
1937 rx_len = get_unaligned_le16(skb->data);
1938 skb_put(skb, MWIFIEX_UPLD_SIZE - skb->len);
1939 skb_trim(skb, rx_len);
1941 if (!adapter->curr_cmd) {
1942 if (adapter->ps_state == PS_STATE_SLEEP_CFM) {
1943 dma_sync_single_for_device(&card->dev->dev,
1944 MWIFIEX_SKB_DMA_ADDR(skb),
1945 MWIFIEX_SLEEP_COOKIE_SIZE,
1947 if (mwifiex_write_reg(adapter,
1949 CPU_INTR_SLEEP_CFM_DONE)) {
1950 mwifiex_dbg(adapter, ERROR,
1951 "Write register failed\n");
1954 mwifiex_delay_for_sleep_cookie(adapter,
1955 MWIFIEX_MAX_DELAY_COUNT);
1956 mwifiex_unmap_pci_memory(adapter, skb,
1958 skb_pull(skb, adapter->intf_hdr_len);
1959 while (reg->sleep_cookie && (count++ < 10) &&
1960 mwifiex_pcie_ok_to_access_hw(adapter))
1961 usleep_range(50, 60);
1962 mwifiex_pcie_enable_host_int(adapter);
1963 mwifiex_process_sleep_confirm_resp(adapter, skb->data,
1966 mwifiex_dbg(adapter, ERROR,
1967 "There is no command but got cmdrsp\n");
1969 memcpy(adapter->upld_buf, skb->data,
1970 min_t(u32, MWIFIEX_SIZE_OF_CMD_BUFFER, skb->len));
1971 skb_push(skb, adapter->intf_hdr_len);
1972 if (mwifiex_map_pci_memory(adapter, skb, MWIFIEX_UPLD_SIZE,
1975 } else if (mwifiex_pcie_ok_to_access_hw(adapter)) {
1976 skb_pull(skb, adapter->intf_hdr_len);
1977 adapter->curr_cmd->resp_skb = skb;
1978 adapter->cmd_resp_received = true;
1979 /* Take the pointer and set it to CMD node and will
1980 return in the response complete callback */
1981 card->cmdrsp_buf = NULL;
1983 /* Clear the cmd-rsp buffer address in scratch registers. This
1984 will prevent firmware from writing to the same response
1986 if (mwifiex_write_reg(adapter, reg->cmdrsp_addr_lo, 0)) {
1987 mwifiex_dbg(adapter, ERROR,
1988 "cmd_done: failed to clear cmd_rsp_addr_lo\n");
1991 /* Write the upper 32bits of the cmdrsp buffer physical
1993 if (mwifiex_write_reg(adapter, reg->cmdrsp_addr_hi, 0)) {
1994 mwifiex_dbg(adapter, ERROR,
1995 "cmd_done: failed to clear cmd_rsp_addr_hi\n");
2004 * Command Response processing complete handler
2006 static int mwifiex_pcie_cmdrsp_complete(struct mwifiex_adapter *adapter,
2007 struct sk_buff *skb)
2009 struct pcie_service_card *card = adapter->card;
2012 card->cmdrsp_buf = skb;
2013 skb_push(card->cmdrsp_buf, adapter->intf_hdr_len);
2014 if (mwifiex_map_pci_memory(adapter, skb, MWIFIEX_UPLD_SIZE,
2023 * This function handles firmware event ready interrupt
2025 static int mwifiex_pcie_process_event_ready(struct mwifiex_adapter *adapter)
2027 struct pcie_service_card *card = adapter->card;
2028 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
2029 u32 rdptr = card->evtbd_rdptr & MWIFIEX_EVTBD_MASK;
2031 struct mwifiex_evt_buf_desc *desc;
2033 if (!mwifiex_pcie_ok_to_access_hw(adapter))
2034 mwifiex_pm_wakeup_card(adapter);
2036 if (adapter->event_received) {
2037 mwifiex_dbg(adapter, EVENT,
2038 "info: Event being processed,\t"
2039 "do not process this interrupt just yet\n");
2043 if (rdptr >= MWIFIEX_MAX_EVT_BD) {
2044 mwifiex_dbg(adapter, ERROR,
2045 "info: Invalid read pointer...\n");
2049 /* Read the event ring write pointer set by firmware */
2050 if (mwifiex_read_reg(adapter, reg->evt_wrptr, &wrptr)) {
2051 mwifiex_dbg(adapter, ERROR,
2052 "EventReady: failed to read reg->evt_wrptr\n");
2056 mwifiex_dbg(adapter, EVENT,
2057 "info: EventReady: Initial <Rd: 0x%x, Wr: 0x%x>",
2058 card->evtbd_rdptr, wrptr);
2059 if (((wrptr & MWIFIEX_EVTBD_MASK) != (card->evtbd_rdptr
2060 & MWIFIEX_EVTBD_MASK)) ||
2061 ((wrptr & reg->evt_rollover_ind) ==
2062 (card->evtbd_rdptr & reg->evt_rollover_ind))) {
2063 struct sk_buff *skb_cmd;
2064 __le16 data_len = 0;
2067 mwifiex_dbg(adapter, INFO,
2068 "info: Read Index: %d\n", rdptr);
2069 skb_cmd = card->evt_buf_list[rdptr];
2070 mwifiex_unmap_pci_memory(adapter, skb_cmd, DMA_FROM_DEVICE);
2072 /* Take the pointer and set it to event pointer in adapter
2073 and will return back after event handling callback */
2074 card->evt_buf_list[rdptr] = NULL;
2075 desc = card->evtbd_ring[rdptr];
2076 memset(desc, 0, sizeof(*desc));
2078 event = get_unaligned_le32(
2079 &skb_cmd->data[adapter->intf_hdr_len]);
2080 adapter->event_cause = event;
2081 /* The first 4bytes will be the event transfer header
2082 len is 2 bytes followed by type which is 2 bytes */
2083 memcpy(&data_len, skb_cmd->data, sizeof(__le16));
2084 evt_len = le16_to_cpu(data_len);
2085 skb_trim(skb_cmd, evt_len);
2086 skb_pull(skb_cmd, adapter->intf_hdr_len);
2087 mwifiex_dbg(adapter, EVENT,
2088 "info: Event length: %d\n", evt_len);
2090 if (evt_len > MWIFIEX_EVENT_HEADER_LEN &&
2091 evt_len < MAX_EVENT_SIZE)
2092 memcpy(adapter->event_body, skb_cmd->data +
2093 MWIFIEX_EVENT_HEADER_LEN, evt_len -
2094 MWIFIEX_EVENT_HEADER_LEN);
2096 adapter->event_received = true;
2097 adapter->event_skb = skb_cmd;
2099 /* Do not update the event read pointer here, wait till the
2100 buffer is released. This is just to make things simpler,
2101 we need to find a better method of managing these buffers.
2104 if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT,
2105 CPU_INTR_EVENT_DONE)) {
2106 mwifiex_dbg(adapter, ERROR,
2107 "Write register failed\n");
2116 * Event processing complete handler
2118 static int mwifiex_pcie_event_complete(struct mwifiex_adapter *adapter,
2119 struct sk_buff *skb)
2121 struct pcie_service_card *card = adapter->card;
2122 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
2124 u32 rdptr = card->evtbd_rdptr & MWIFIEX_EVTBD_MASK;
2126 struct mwifiex_evt_buf_desc *desc;
2131 if (rdptr >= MWIFIEX_MAX_EVT_BD) {
2132 mwifiex_dbg(adapter, ERROR,
2133 "event_complete: Invalid rdptr 0x%x\n",
2138 /* Read the event ring write pointer set by firmware */
2139 if (mwifiex_read_reg(adapter, reg->evt_wrptr, &wrptr)) {
2140 mwifiex_dbg(adapter, ERROR,
2141 "event_complete: failed to read reg->evt_wrptr\n");
2145 if (!card->evt_buf_list[rdptr]) {
2146 skb_push(skb, adapter->intf_hdr_len);
2147 skb_put(skb, MAX_EVENT_SIZE - skb->len);
2148 if (mwifiex_map_pci_memory(adapter, skb,
2152 card->evt_buf_list[rdptr] = skb;
2153 desc = card->evtbd_ring[rdptr];
2154 desc->paddr = MWIFIEX_SKB_DMA_ADDR(skb);
2155 desc->len = (u16)skb->len;
2159 mwifiex_dbg(adapter, ERROR,
2160 "info: ERROR: buf still valid at index %d, <%p, %p>\n",
2161 rdptr, card->evt_buf_list[rdptr], skb);
2164 if ((++card->evtbd_rdptr & MWIFIEX_EVTBD_MASK) == MWIFIEX_MAX_EVT_BD) {
2165 card->evtbd_rdptr = ((card->evtbd_rdptr &
2166 reg->evt_rollover_ind) ^
2167 reg->evt_rollover_ind);
2170 mwifiex_dbg(adapter, EVENT,
2171 "info: Updated <Rd: 0x%x, Wr: 0x%x>",
2172 card->evtbd_rdptr, wrptr);
2174 /* Write the event ring read pointer in to reg->evt_rdptr */
2175 if (mwifiex_write_reg(adapter, reg->evt_rdptr,
2176 card->evtbd_rdptr)) {
2177 mwifiex_dbg(adapter, ERROR,
2178 "event_complete: failed to read reg->evt_rdptr\n");
2182 mwifiex_dbg(adapter, EVENT,
2183 "info: Check Events Again\n");
2184 ret = mwifiex_pcie_process_event_ready(adapter);
2189 /* Combo firmware image is a combination of
2190 * (1) combo crc heaer, start with CMD5
2191 * (2) bluetooth image, start with CMD7, end with CMD6, data wrapped in CMD1.
2194 * This function bypass the header and bluetooth part, return
2195 * the offset of tail wifi-only part. If the image is already wifi-only,
2196 * that is start with CMD1, return 0.
2199 static int mwifiex_extract_wifi_fw(struct mwifiex_adapter *adapter,
2200 const void *firmware, u32 firmware_len) {
2201 const struct mwifiex_fw_data *fwdata;
2202 u32 offset = 0, data_len, dnld_cmd;
2204 bool cmd7_before = false, first_cmd = false;
2207 /* Check for integer and buffer overflow */
2208 if (offset + sizeof(fwdata->header) < sizeof(fwdata->header) ||
2209 offset + sizeof(fwdata->header) >= firmware_len) {
2210 mwifiex_dbg(adapter, ERROR,
2211 "extract wifi-only fw failure!\n");
2216 fwdata = firmware + offset;
2217 dnld_cmd = le32_to_cpu(fwdata->header.dnld_cmd);
2218 data_len = le32_to_cpu(fwdata->header.data_length);
2220 /* Skip past header */
2221 offset += sizeof(fwdata->header);
2224 case MWIFIEX_FW_DNLD_CMD_1:
2225 if (offset + data_len < data_len) {
2226 mwifiex_dbg(adapter, ERROR, "bad FW parse\n");
2231 /* Image start with cmd1, already wifi-only firmware */
2233 mwifiex_dbg(adapter, MSG,
2234 "input wifi-only firmware\n");
2239 mwifiex_dbg(adapter, ERROR,
2240 "no cmd7 before cmd1!\n");
2246 case MWIFIEX_FW_DNLD_CMD_5:
2248 /* Check for integer overflow */
2249 if (offset + data_len < data_len) {
2250 mwifiex_dbg(adapter, ERROR, "bad FW parse\n");
2256 case MWIFIEX_FW_DNLD_CMD_6:
2258 /* Check for integer overflow */
2259 if (offset + data_len < data_len) {
2260 mwifiex_dbg(adapter, ERROR, "bad FW parse\n");
2265 if (offset >= firmware_len) {
2266 mwifiex_dbg(adapter, ERROR,
2267 "extract wifi-only fw failure!\n");
2273 case MWIFIEX_FW_DNLD_CMD_7:
2278 mwifiex_dbg(adapter, ERROR, "unknown dnld_cmd %d\n",
2290 * This function downloads the firmware to the card.
2292 * Firmware is downloaded to the card in blocks. Every block download
2293 * is tested for CRC errors, and retried a number of times before
2294 * returning failure.
2296 static int mwifiex_prog_fw_w_helper(struct mwifiex_adapter *adapter,
2297 struct mwifiex_fw_image *fw)
2300 u8 *firmware = fw->fw_buf;
2301 u32 firmware_len = fw->fw_len;
2303 struct sk_buff *skb;
2304 u32 txlen, tx_blocks = 0, tries, len, val;
2305 u32 block_retry_cnt = 0;
2306 struct pcie_service_card *card = adapter->card;
2307 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
2309 if (!firmware || !firmware_len) {
2310 mwifiex_dbg(adapter, ERROR,
2311 "No firmware image found! Terminating download\n");
2315 mwifiex_dbg(adapter, INFO,
2316 "info: Downloading FW image (%d bytes)\n",
2319 if (mwifiex_pcie_disable_host_int(adapter)) {
2320 mwifiex_dbg(adapter, ERROR,
2321 "%s: Disabling interrupts failed.\n", __func__);
2325 skb = dev_alloc_skb(MWIFIEX_UPLD_SIZE);
2331 ret = mwifiex_read_reg(adapter, PCIE_SCRATCH_13_REG, &val);
2333 mwifiex_dbg(adapter, FATAL, "Failed to read scratch register 13\n");
2337 /* PCIE FLR case: extract wifi part from combo firmware*/
2338 if (val == MWIFIEX_PCIE_FLR_HAPPENS) {
2339 ret = mwifiex_extract_wifi_fw(adapter, firmware, firmware_len);
2341 mwifiex_dbg(adapter, ERROR, "Failed to extract wifi fw\n");
2345 mwifiex_dbg(adapter, MSG,
2346 "info: dnld wifi firmware from %d bytes\n", offset);
2349 /* Perform firmware data transfer */
2354 if (offset >= firmware_len)
2357 for (tries = 0; tries < MAX_POLL_TRIES; tries++) {
2358 ret = mwifiex_read_reg(adapter, reg->cmd_size,
2361 mwifiex_dbg(adapter, FATAL,
2362 "Failed reading len from boot code\n");
2367 usleep_range(10, 20);
2372 } else if (len > MWIFIEX_UPLD_SIZE) {
2373 mwifiex_dbg(adapter, ERROR,
2374 "FW download failure @ %d, invalid length %d\n",
2384 if (block_retry_cnt > MAX_WRITE_IOMEM_RETRY) {
2385 mwifiex_dbg(adapter, ERROR,
2386 "FW download failure @ %d, over max\t"
2387 "retry count\n", offset);
2391 mwifiex_dbg(adapter, ERROR,
2392 "FW CRC error indicated by the\t"
2393 "helper: len = 0x%04X, txlen = %d\n",
2396 /* Setting this to 0 to resend from same offset */
2399 block_retry_cnt = 0;
2400 /* Set blocksize to transfer - checking for
2402 if (firmware_len - offset < txlen)
2403 txlen = firmware_len - offset;
2405 tx_blocks = (txlen + card->pcie.blksz_fw_dl - 1) /
2406 card->pcie.blksz_fw_dl;
2408 /* Copy payload to buffer */
2409 memmove(skb->data, &firmware[offset], txlen);
2412 skb_put(skb, MWIFIEX_UPLD_SIZE - skb->len);
2413 skb_trim(skb, tx_blocks * card->pcie.blksz_fw_dl);
2415 /* Send the boot command to device */
2416 if (mwifiex_pcie_send_boot_cmd(adapter, skb)) {
2417 mwifiex_dbg(adapter, ERROR,
2418 "Failed to send firmware download command\n");
2423 /* Wait for the command done interrupt */
2424 for (tries = 0; tries < MAX_POLL_TRIES; tries++) {
2425 if (mwifiex_read_reg(adapter, PCIE_CPU_INT_STATUS,
2427 mwifiex_dbg(adapter, ERROR,
2428 "%s: Failed to read\t"
2429 "interrupt status during fw dnld.\n",
2431 mwifiex_unmap_pci_memory(adapter, skb,
2436 if (!(ireg_intr & CPU_INTR_DOOR_BELL))
2438 usleep_range(10, 20);
2440 if (ireg_intr & CPU_INTR_DOOR_BELL) {
2441 mwifiex_dbg(adapter, ERROR, "%s: Card failed to ACK download\n",
2443 mwifiex_unmap_pci_memory(adapter, skb,
2449 mwifiex_unmap_pci_memory(adapter, skb, DMA_TO_DEVICE);
2454 mwifiex_dbg(adapter, MSG,
2455 "info: FW download over, size %d bytes\n", offset);
2460 dev_kfree_skb_any(skb);
2465 * This function checks the firmware status in card.
2468 mwifiex_check_fw_status(struct mwifiex_adapter *adapter, u32 poll_num)
2472 struct pcie_service_card *card = adapter->card;
2473 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
2476 /* Mask spurios interrupts */
2477 if (mwifiex_write_reg(adapter, PCIE_HOST_INT_STATUS_MASK,
2479 mwifiex_dbg(adapter, ERROR,
2480 "Write register failed\n");
2484 mwifiex_dbg(adapter, INFO,
2485 "Setting driver ready signature\n");
2486 if (mwifiex_write_reg(adapter, reg->drv_rdy,
2487 FIRMWARE_READY_PCIE)) {
2488 mwifiex_dbg(adapter, ERROR,
2489 "Failed to write driver ready signature\n");
2493 /* Wait for firmware initialization event */
2494 for (tries = 0; tries < poll_num; tries++) {
2495 if (mwifiex_read_reg(adapter, reg->fw_status,
2501 mwifiex_dbg(adapter, INFO, "Try %d if FW is ready <%d,%#x>",
2502 tries, ret, firmware_stat);
2506 if (firmware_stat == FIRMWARE_READY_PCIE) {
2518 /* This function checks if WLAN is the winner.
2521 mwifiex_check_winner_status(struct mwifiex_adapter *adapter)
2525 struct pcie_service_card *card = adapter->card;
2526 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
2528 if (mwifiex_read_reg(adapter, reg->fw_status, &winner)) {
2530 } else if (!winner) {
2531 mwifiex_dbg(adapter, INFO, "PCI-E is the winner\n");
2532 adapter->winner = 1;
2534 mwifiex_dbg(adapter, ERROR,
2535 "PCI-E is not the winner <%#x>", winner);
2542 * This function reads the interrupt status from card.
2544 static void mwifiex_interrupt_status(struct mwifiex_adapter *adapter,
2548 unsigned long flags;
2549 struct pcie_service_card *card = adapter->card;
2551 if (card->msi_enable) {
2552 spin_lock_irqsave(&adapter->int_lock, flags);
2553 adapter->int_status = 1;
2554 spin_unlock_irqrestore(&adapter->int_lock, flags);
2558 if (!mwifiex_pcie_ok_to_access_hw(adapter))
2561 if (card->msix_enable && msg_id >= 0) {
2562 pcie_ireg = BIT(msg_id);
2564 if (mwifiex_read_reg(adapter, PCIE_HOST_INT_STATUS,
2566 mwifiex_dbg(adapter, ERROR, "Read register failed\n");
2570 if ((pcie_ireg == 0xFFFFFFFF) || !pcie_ireg)
2574 mwifiex_pcie_disable_host_int(adapter);
2576 /* Clear the pending interrupts */
2577 if (mwifiex_write_reg(adapter, PCIE_HOST_INT_STATUS,
2579 mwifiex_dbg(adapter, ERROR,
2580 "Write register failed\n");
2585 if (!adapter->pps_uapsd_mode &&
2586 adapter->ps_state == PS_STATE_SLEEP &&
2587 mwifiex_pcie_ok_to_access_hw(adapter)) {
2588 /* Potentially for PCIe we could get other
2589 * interrupts like shared. Don't change power
2590 * state until cookie is set
2592 adapter->ps_state = PS_STATE_AWAKE;
2593 adapter->pm_wakeup_fw_try = false;
2594 del_timer(&adapter->wakeup_timer);
2597 spin_lock_irqsave(&adapter->int_lock, flags);
2598 adapter->int_status |= pcie_ireg;
2599 spin_unlock_irqrestore(&adapter->int_lock, flags);
2600 mwifiex_dbg(adapter, INTR, "ireg: 0x%08x\n", pcie_ireg);
2604 * Interrupt handler for PCIe root port
2606 * This function reads the interrupt status from firmware and assigns
2607 * the main process in workqueue which will handle the interrupt.
2609 static irqreturn_t mwifiex_pcie_interrupt(int irq, void *context)
2611 struct mwifiex_msix_context *ctx = context;
2612 struct pci_dev *pdev = ctx->dev;
2613 struct pcie_service_card *card;
2614 struct mwifiex_adapter *adapter;
2616 card = pci_get_drvdata(pdev);
2618 if (!card->adapter) {
2619 pr_err("info: %s: card=%p adapter=%p\n", __func__, card,
2620 card ? card->adapter : NULL);
2623 adapter = card->adapter;
2625 if (test_bit(MWIFIEX_SURPRISE_REMOVED, &adapter->work_flags))
2628 if (card->msix_enable)
2629 mwifiex_interrupt_status(adapter, ctx->msg_id);
2631 mwifiex_interrupt_status(adapter, -1);
2633 mwifiex_queue_main_work(adapter);
2640 * This function checks the current interrupt status.
2642 * The following interrupts are checked and handled by this function -
2645 * - Command received
2646 * - Packets received
2649 * In case of Rx packets received, the packets are uploaded from card to
2650 * host and processed accordingly.
2652 static int mwifiex_process_int_status(struct mwifiex_adapter *adapter)
2656 unsigned long flags;
2657 struct pcie_service_card *card = adapter->card;
2659 spin_lock_irqsave(&adapter->int_lock, flags);
2660 if (!card->msi_enable) {
2661 /* Clear out unused interrupts */
2662 pcie_ireg = adapter->int_status;
2664 adapter->int_status = 0;
2665 spin_unlock_irqrestore(&adapter->int_lock, flags);
2667 if (card->msi_enable) {
2668 if (mwifiex_pcie_ok_to_access_hw(adapter)) {
2669 if (mwifiex_read_reg(adapter, PCIE_HOST_INT_STATUS,
2671 mwifiex_dbg(adapter, ERROR,
2672 "Read register failed\n");
2676 if ((pcie_ireg != 0xFFFFFFFF) && (pcie_ireg)) {
2677 if (mwifiex_write_reg(adapter,
2678 PCIE_HOST_INT_STATUS,
2680 mwifiex_dbg(adapter, ERROR,
2681 "Write register failed\n");
2684 if (!adapter->pps_uapsd_mode &&
2685 adapter->ps_state == PS_STATE_SLEEP) {
2686 adapter->ps_state = PS_STATE_AWAKE;
2687 adapter->pm_wakeup_fw_try = false;
2688 del_timer(&adapter->wakeup_timer);
2694 if (pcie_ireg & HOST_INTR_DNLD_DONE) {
2695 mwifiex_dbg(adapter, INTR, "info: TX DNLD Done\n");
2696 ret = mwifiex_pcie_send_data_complete(adapter);
2700 if (pcie_ireg & HOST_INTR_UPLD_RDY) {
2701 mwifiex_dbg(adapter, INTR, "info: Rx DATA\n");
2702 ret = mwifiex_pcie_process_recv_data(adapter);
2706 if (pcie_ireg & HOST_INTR_EVENT_RDY) {
2707 mwifiex_dbg(adapter, INTR, "info: Rx EVENT\n");
2708 ret = mwifiex_pcie_process_event_ready(adapter);
2712 if (pcie_ireg & HOST_INTR_CMD_DONE) {
2713 if (adapter->cmd_sent) {
2714 mwifiex_dbg(adapter, INTR,
2715 "info: CMD sent Interrupt\n");
2716 adapter->cmd_sent = false;
2718 /* Handle command response */
2719 ret = mwifiex_pcie_process_cmd_complete(adapter);
2724 mwifiex_dbg(adapter, INTR,
2725 "info: cmd_sent=%d data_sent=%d\n",
2726 adapter->cmd_sent, adapter->data_sent);
2727 if (!card->msi_enable && !card->msix_enable &&
2728 adapter->ps_state != PS_STATE_SLEEP)
2729 mwifiex_pcie_enable_host_int(adapter);
2735 * This function downloads data from driver to card.
2737 * Both commands and data packets are transferred to the card by this
2740 * This function adds the PCIE specific header to the front of the buffer
2741 * before transferring. The header contains the length of the packet and
2742 * the type. The firmware handles the packets based upon this set type.
2744 static int mwifiex_pcie_host_to_card(struct mwifiex_adapter *adapter, u8 type,
2745 struct sk_buff *skb,
2746 struct mwifiex_tx_param *tx_param)
2749 mwifiex_dbg(adapter, ERROR,
2750 "Passed NULL skb to %s\n", __func__);
2754 if (type == MWIFIEX_TYPE_DATA)
2755 return mwifiex_pcie_send_data(adapter, skb, tx_param);
2756 else if (type == MWIFIEX_TYPE_CMD)
2757 return mwifiex_pcie_send_cmd(adapter, skb);
2762 /* Function to dump PCIE scratch registers in case of FW crash
2765 mwifiex_pcie_reg_dump(struct mwifiex_adapter *adapter, char *drv_buf)
2768 char buf[256], *ptr;
2771 struct pcie_service_card *card = adapter->card;
2772 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
2773 int pcie_scratch_reg[] = {PCIE_SCRATCH_12_REG,
2774 PCIE_SCRATCH_14_REG,
2775 PCIE_SCRATCH_15_REG};
2780 mwifiex_dbg(adapter, MSG, "PCIE register dump start\n");
2782 if (mwifiex_read_reg(adapter, reg->fw_status, &value)) {
2783 mwifiex_dbg(adapter, ERROR, "failed to read firmware status");
2788 mwifiex_dbg(adapter, MSG, "pcie scratch register:");
2789 for (i = 0; i < ARRAY_SIZE(pcie_scratch_reg); i++) {
2790 mwifiex_read_reg(adapter, pcie_scratch_reg[i], &value);
2791 ptr += sprintf(ptr, "reg:0x%x, value=0x%x\n",
2792 pcie_scratch_reg[i], value);
2795 mwifiex_dbg(adapter, MSG, "%s\n", buf);
2796 p += sprintf(p, "%s\n", buf);
2798 mwifiex_dbg(adapter, MSG, "PCIE register dump end\n");
2803 /* This function read/write firmware */
2804 static enum rdwr_status
2805 mwifiex_pcie_rdwr_firmware(struct mwifiex_adapter *adapter, u8 doneflag)
2810 struct pcie_service_card *card = adapter->card;
2811 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
2813 if (mwifiex_read_reg(adapter, reg->fw_status, &fw_status))
2814 return RDWR_STATUS_FAILURE;
2816 ret = mwifiex_write_reg(adapter, reg->fw_dump_ctrl,
2817 reg->fw_dump_host_ready);
2819 mwifiex_dbg(adapter, ERROR,
2820 "PCIE write err\n");
2821 return RDWR_STATUS_FAILURE;
2824 for (tries = 0; tries < MAX_POLL_TRIES; tries++) {
2825 mwifiex_read_reg_byte(adapter, reg->fw_dump_ctrl, &ctrl_data);
2826 if (ctrl_data == FW_DUMP_DONE)
2827 return RDWR_STATUS_SUCCESS;
2828 if (doneflag && ctrl_data == doneflag)
2829 return RDWR_STATUS_DONE;
2830 if (ctrl_data != reg->fw_dump_host_ready) {
2831 mwifiex_dbg(adapter, WARN,
2832 "The ctrl reg was changed, re-try again!\n");
2833 ret = mwifiex_write_reg(adapter, reg->fw_dump_ctrl,
2834 reg->fw_dump_host_ready);
2836 mwifiex_dbg(adapter, ERROR,
2837 "PCIE write err\n");
2838 return RDWR_STATUS_FAILURE;
2841 usleep_range(100, 200);
2844 mwifiex_dbg(adapter, ERROR, "Fail to pull ctrl_data\n");
2845 return RDWR_STATUS_FAILURE;
2848 /* This function dump firmware memory to file */
2849 static void mwifiex_pcie_fw_dump(struct mwifiex_adapter *adapter)
2851 struct pcie_service_card *card = adapter->card;
2852 const struct mwifiex_pcie_card_reg *creg = card->pcie.reg;
2853 unsigned int reg, reg_start, reg_end;
2854 u8 *dbg_ptr, *end_ptr, *tmp_ptr, fw_dump_num, dump_num;
2855 u8 idx, i, read_reg, doneflag = 0;
2856 enum rdwr_status stat;
2860 if (!card->pcie.can_dump_fw)
2863 for (idx = 0; idx < adapter->num_mem_types; idx++) {
2864 struct memory_type_mapping *entry =
2865 &adapter->mem_type_mapping_tbl[idx];
2867 if (entry->mem_ptr) {
2868 vfree(entry->mem_ptr);
2869 entry->mem_ptr = NULL;
2871 entry->mem_size = 0;
2874 mwifiex_dbg(adapter, MSG, "== mwifiex firmware dump start ==\n");
2876 /* Read the number of the memories which will dump */
2877 stat = mwifiex_pcie_rdwr_firmware(adapter, doneflag);
2878 if (stat == RDWR_STATUS_FAILURE)
2881 reg = creg->fw_dump_start;
2882 mwifiex_read_reg_byte(adapter, reg, &fw_dump_num);
2884 /* W8997 chipset firmware dump will be restore in single region*/
2885 if (fw_dump_num == 0)
2888 dump_num = fw_dump_num;
2890 /* Read the length of every memory which will dump */
2891 for (idx = 0; idx < dump_num; idx++) {
2892 struct memory_type_mapping *entry =
2893 &adapter->mem_type_mapping_tbl[idx];
2895 if (fw_dump_num != 0) {
2896 stat = mwifiex_pcie_rdwr_firmware(adapter, doneflag);
2897 if (stat == RDWR_STATUS_FAILURE)
2900 reg = creg->fw_dump_start;
2901 for (i = 0; i < 4; i++) {
2902 mwifiex_read_reg_byte(adapter, reg, &read_reg);
2903 memory_size |= (read_reg << (i * 8));
2907 memory_size = MWIFIEX_FW_DUMP_MAX_MEMSIZE;
2910 if (memory_size == 0) {
2911 mwifiex_dbg(adapter, MSG, "Firmware dump Finished!\n");
2912 ret = mwifiex_write_reg(adapter, creg->fw_dump_ctrl,
2913 creg->fw_dump_read_done);
2915 mwifiex_dbg(adapter, ERROR, "PCIE write err\n");
2921 mwifiex_dbg(adapter, DUMP,
2922 "%s_SIZE=0x%x\n", entry->mem_name, memory_size);
2923 entry->mem_ptr = vmalloc(memory_size + 1);
2924 entry->mem_size = memory_size;
2925 if (!entry->mem_ptr) {
2926 mwifiex_dbg(adapter, ERROR,
2927 "Vmalloc %s failed\n", entry->mem_name);
2930 dbg_ptr = entry->mem_ptr;
2931 end_ptr = dbg_ptr + memory_size;
2933 doneflag = entry->done_flag;
2934 mwifiex_dbg(adapter, DUMP, "Start %s output, please wait...\n",
2938 stat = mwifiex_pcie_rdwr_firmware(adapter, doneflag);
2939 if (RDWR_STATUS_FAILURE == stat)
2942 reg_start = creg->fw_dump_start;
2943 reg_end = creg->fw_dump_end;
2944 for (reg = reg_start; reg <= reg_end; reg++) {
2945 mwifiex_read_reg_byte(adapter, reg, dbg_ptr);
2946 if (dbg_ptr < end_ptr) {
2950 mwifiex_dbg(adapter, ERROR,
2951 "pre-allocated buf not enough\n");
2953 vzalloc(memory_size + MWIFIEX_SIZE_4K);
2956 memcpy(tmp_ptr, entry->mem_ptr, memory_size);
2957 vfree(entry->mem_ptr);
2958 entry->mem_ptr = tmp_ptr;
2960 dbg_ptr = entry->mem_ptr + memory_size;
2961 memory_size += MWIFIEX_SIZE_4K;
2962 end_ptr = entry->mem_ptr + memory_size;
2965 if (stat != RDWR_STATUS_DONE)
2968 mwifiex_dbg(adapter, DUMP,
2969 "%s done: size=0x%tx\n",
2970 entry->mem_name, dbg_ptr - entry->mem_ptr);
2974 mwifiex_dbg(adapter, MSG, "== mwifiex firmware dump end ==\n");
2977 static void mwifiex_pcie_device_dump_work(struct mwifiex_adapter *adapter)
2979 adapter->devdump_data = vzalloc(MWIFIEX_FW_DUMP_SIZE);
2980 if (!adapter->devdump_data) {
2981 mwifiex_dbg(adapter, ERROR,
2982 "vzalloc devdump data failure!\n");
2986 mwifiex_drv_info_dump(adapter);
2987 mwifiex_pcie_fw_dump(adapter);
2988 mwifiex_prepare_fw_dump_info(adapter);
2989 mwifiex_upload_device_dump(adapter);
2992 static void mwifiex_pcie_card_reset_work(struct mwifiex_adapter *adapter)
2994 struct pcie_service_card *card = adapter->card;
2996 /* We can't afford to wait here; remove() might be waiting on us. If we
2997 * can't grab the device lock, maybe we'll get another chance later.
2999 pci_try_reset_function(card->dev);
3002 static void mwifiex_pcie_work(struct work_struct *work)
3004 struct pcie_service_card *card =
3005 container_of(work, struct pcie_service_card, work);
3007 if (test_and_clear_bit(MWIFIEX_IFACE_WORK_DEVICE_DUMP,
3009 mwifiex_pcie_device_dump_work(card->adapter);
3010 if (test_and_clear_bit(MWIFIEX_IFACE_WORK_CARD_RESET,
3012 mwifiex_pcie_card_reset_work(card->adapter);
3015 /* This function dumps FW information */
3016 static void mwifiex_pcie_device_dump(struct mwifiex_adapter *adapter)
3018 struct pcie_service_card *card = adapter->card;
3020 if (!test_and_set_bit(MWIFIEX_IFACE_WORK_DEVICE_DUMP,
3022 schedule_work(&card->work);
3025 static void mwifiex_pcie_card_reset(struct mwifiex_adapter *adapter)
3027 struct pcie_service_card *card = adapter->card;
3029 if (!test_and_set_bit(MWIFIEX_IFACE_WORK_CARD_RESET, &card->work_flags))
3030 schedule_work(&card->work);
3033 static int mwifiex_pcie_alloc_buffers(struct mwifiex_adapter *adapter)
3035 struct pcie_service_card *card = adapter->card;
3036 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
3039 card->cmdrsp_buf = NULL;
3040 ret = mwifiex_pcie_create_txbd_ring(adapter);
3042 mwifiex_dbg(adapter, ERROR, "Failed to create txbd ring\n");
3046 ret = mwifiex_pcie_create_rxbd_ring(adapter);
3048 mwifiex_dbg(adapter, ERROR, "Failed to create rxbd ring\n");
3052 ret = mwifiex_pcie_create_evtbd_ring(adapter);
3054 mwifiex_dbg(adapter, ERROR, "Failed to create evtbd ring\n");
3058 ret = mwifiex_pcie_alloc_cmdrsp_buf(adapter);
3060 mwifiex_dbg(adapter, ERROR, "Failed to allocate cmdbuf buffer\n");
3061 goto err_alloc_cmdbuf;
3064 if (reg->sleep_cookie) {
3065 ret = mwifiex_pcie_alloc_sleep_cookie_buf(adapter);
3067 mwifiex_dbg(adapter, ERROR, "Failed to allocate sleep_cookie buffer\n");
3068 goto err_alloc_cookie;
3071 card->sleep_cookie_vbase = NULL;
3077 mwifiex_pcie_delete_cmdrsp_buf(adapter);
3079 mwifiex_pcie_delete_evtbd_ring(adapter);
3081 mwifiex_pcie_delete_rxbd_ring(adapter);
3083 mwifiex_pcie_delete_txbd_ring(adapter);
3088 static void mwifiex_pcie_free_buffers(struct mwifiex_adapter *adapter)
3090 struct pcie_service_card *card = adapter->card;
3091 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
3093 if (reg->sleep_cookie)
3094 mwifiex_pcie_delete_sleep_cookie_buf(adapter);
3096 mwifiex_pcie_delete_cmdrsp_buf(adapter);
3097 mwifiex_pcie_delete_evtbd_ring(adapter);
3098 mwifiex_pcie_delete_rxbd_ring(adapter);
3099 mwifiex_pcie_delete_txbd_ring(adapter);
3103 * This function initializes the PCI-E host memory space, WCB rings, etc.
3105 static int mwifiex_init_pcie(struct mwifiex_adapter *adapter)
3107 struct pcie_service_card *card = adapter->card;
3109 struct pci_dev *pdev = card->dev;
3111 pci_set_drvdata(pdev, card);
3113 ret = pci_enable_device(pdev);
3115 goto err_enable_dev;
3117 pci_set_master(pdev);
3119 ret = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
3121 pr_err("dma_set_mask(32) failed: %d\n", ret);
3122 goto err_set_dma_mask;
3125 ret = pci_request_region(pdev, 0, DRV_NAME);
3127 pr_err("req_reg(0) error\n");
3128 goto err_req_region0;
3130 card->pci_mmap = pci_iomap(pdev, 0, 0);
3131 if (!card->pci_mmap) {
3132 pr_err("iomap(0) error\n");
3136 ret = pci_request_region(pdev, 2, DRV_NAME);
3138 pr_err("req_reg(2) error\n");
3139 goto err_req_region2;
3141 card->pci_mmap1 = pci_iomap(pdev, 2, 0);
3142 if (!card->pci_mmap1) {
3143 pr_err("iomap(2) error\n");
3148 pr_notice("PCI memory map Virt0: %pK PCI memory map Virt2: %pK\n",
3149 card->pci_mmap, card->pci_mmap1);
3151 ret = mwifiex_pcie_alloc_buffers(adapter);
3153 goto err_alloc_buffers;
3155 if (pdev->device == PCIE_DEVICE_ID_MARVELL_88W8897)
3156 adapter->ignore_btcoex_events = true;
3161 pci_iounmap(pdev, card->pci_mmap1);
3163 pci_release_region(pdev, 2);
3165 pci_iounmap(pdev, card->pci_mmap);
3167 pci_release_region(pdev, 0);
3170 pci_disable_device(pdev);
3176 * This function cleans up the allocated card buffers.
3178 static void mwifiex_cleanup_pcie(struct mwifiex_adapter *adapter)
3180 struct pcie_service_card *card = adapter->card;
3181 struct pci_dev *pdev = card->dev;
3182 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
3185 /* Perform the cancel_work_sync() only when we're not resetting
3186 * the card. It's because that function never returns if we're
3187 * in reset path. If we're here when resetting the card, it means
3188 * that we failed to reset the card (reset failure path).
3190 if (!card->pci_reset_ongoing) {
3191 mwifiex_dbg(adapter, MSG, "performing cancel_work_sync()...\n");
3192 cancel_work_sync(&card->work);
3193 mwifiex_dbg(adapter, MSG, "cancel_work_sync() done\n");
3195 mwifiex_dbg(adapter, MSG,
3196 "skipped cancel_work_sync() because we're in card reset failure path\n");
3199 mwifiex_read_reg(adapter, reg->fw_status, &fw_status);
3200 if (fw_status == FIRMWARE_READY_PCIE) {
3201 mwifiex_dbg(adapter, INFO,
3202 "Clearing driver ready signature\n");
3203 if (mwifiex_write_reg(adapter, reg->drv_rdy, 0x00000000))
3204 mwifiex_dbg(adapter, ERROR,
3205 "Failed to write driver not-ready signature\n");
3208 pci_disable_device(pdev);
3210 pci_iounmap(pdev, card->pci_mmap);
3211 pci_iounmap(pdev, card->pci_mmap1);
3212 pci_release_region(pdev, 2);
3213 pci_release_region(pdev, 0);
3215 mwifiex_pcie_free_buffers(adapter);
3218 static int mwifiex_pcie_request_irq(struct mwifiex_adapter *adapter)
3221 struct pcie_service_card *card = adapter->card;
3222 struct pci_dev *pdev = card->dev;
3224 if (card->pcie.reg->msix_support) {
3225 for (i = 0; i < MWIFIEX_NUM_MSIX_VECTORS; i++)
3226 card->msix_entries[i].entry = i;
3227 ret = pci_enable_msix_exact(pdev, card->msix_entries,
3228 MWIFIEX_NUM_MSIX_VECTORS);
3230 for (i = 0; i < MWIFIEX_NUM_MSIX_VECTORS; i++) {
3231 card->msix_ctx[i].dev = pdev;
3232 card->msix_ctx[i].msg_id = i;
3234 ret = request_irq(card->msix_entries[i].vector,
3235 mwifiex_pcie_interrupt, 0,
3236 "MWIFIEX_PCIE_MSIX",
3237 &card->msix_ctx[i]);
3243 mwifiex_dbg(adapter, INFO, "request_irq fail: %d\n",
3245 for (j = 0; j < i; j++)
3246 free_irq(card->msix_entries[j].vector,
3247 &card->msix_ctx[i]);
3248 pci_disable_msix(pdev);
3250 mwifiex_dbg(adapter, MSG, "MSIx enabled!");
3251 card->msix_enable = 1;
3257 if (pci_enable_msi(pdev) != 0)
3258 pci_disable_msi(pdev);
3260 card->msi_enable = 1;
3262 mwifiex_dbg(adapter, INFO, "msi_enable = %d\n", card->msi_enable);
3264 card->share_irq_ctx.dev = pdev;
3265 card->share_irq_ctx.msg_id = -1;
3266 ret = request_irq(pdev->irq, mwifiex_pcie_interrupt, IRQF_SHARED,
3267 "MRVL_PCIE", &card->share_irq_ctx);
3269 pr_err("request_irq failed: ret=%d\n", ret);
3277 * This function gets the firmware name for downloading by revision id
3279 * Read revision id register to get revision id
3281 static void mwifiex_pcie_get_fw_name(struct mwifiex_adapter *adapter)
3283 int revision_id = 0;
3285 struct pcie_service_card *card = adapter->card;
3287 switch (card->dev->device) {
3288 case PCIE_DEVICE_ID_MARVELL_88W8766P:
3289 strcpy(adapter->fw_name, PCIE8766_DEFAULT_FW_NAME);
3291 case PCIE_DEVICE_ID_MARVELL_88W8897:
3292 mwifiex_write_reg(adapter, 0x0c58, 0x80c00000);
3293 mwifiex_read_reg(adapter, 0x0c58, &revision_id);
3294 revision_id &= 0xff00;
3295 switch (revision_id) {
3297 strcpy(adapter->fw_name, PCIE8897_A0_FW_NAME);
3300 strcpy(adapter->fw_name, PCIE8897_B0_FW_NAME);
3303 strcpy(adapter->fw_name, PCIE8897_DEFAULT_FW_NAME);
3308 case PCIE_DEVICE_ID_MARVELL_88W8997:
3309 mwifiex_read_reg(adapter, 0x8, &revision_id);
3310 mwifiex_read_reg(adapter, 0x0cd0, &version);
3311 mwifiex_read_reg(adapter, 0x0cd4, &magic);
3312 revision_id &= 0xff;
3315 if (revision_id == PCIE8997_A1 &&
3316 magic == CHIP_MAGIC_VALUE &&
3317 version == CHIP_VER_PCIEUART)
3318 strcpy(adapter->fw_name, PCIEUART8997_FW_NAME_V4);
3320 strcpy(adapter->fw_name, PCIEUSB8997_FW_NAME_V4);
3328 * This function registers the PCIE device.
3330 * PCIE IRQ is claimed, block size is set and driver data is initialized.
3332 static int mwifiex_register_dev(struct mwifiex_adapter *adapter)
3334 struct pcie_service_card *card = adapter->card;
3336 /* save adapter pointer in card */
3337 card->adapter = adapter;
3339 if (mwifiex_pcie_request_irq(adapter))
3342 adapter->tx_buf_size = card->pcie.tx_buf_size;
3343 adapter->mem_type_mapping_tbl = card->pcie.mem_type_mapping_tbl;
3344 adapter->num_mem_types = card->pcie.num_mem_types;
3345 adapter->ext_scan = card->pcie.can_ext_scan;
3346 mwifiex_pcie_get_fw_name(adapter);
3352 * This function unregisters the PCIE device.
3354 * The PCIE IRQ is released, the function is disabled and driver
3355 * data is set to null.
3357 static void mwifiex_unregister_dev(struct mwifiex_adapter *adapter)
3359 struct pcie_service_card *card = adapter->card;
3360 struct pci_dev *pdev = card->dev;
3363 if (card->msix_enable) {
3364 for (i = 0; i < MWIFIEX_NUM_MSIX_VECTORS; i++)
3365 synchronize_irq(card->msix_entries[i].vector);
3367 for (i = 0; i < MWIFIEX_NUM_MSIX_VECTORS; i++)
3368 free_irq(card->msix_entries[i].vector,
3369 &card->msix_ctx[i]);
3371 card->msix_enable = 0;
3372 pci_disable_msix(pdev);
3374 mwifiex_dbg(adapter, INFO,
3375 "%s(): calling free_irq()\n", __func__);
3376 free_irq(card->dev->irq, &card->share_irq_ctx);
3378 if (card->msi_enable)
3379 pci_disable_msi(pdev);
3381 card->adapter = NULL;
3385 * This function initializes the PCI-E host memory space, WCB rings, etc.,
3386 * similar to mwifiex_init_pcie(), but without resetting PCI-E state.
3388 static void mwifiex_pcie_up_dev(struct mwifiex_adapter *adapter)
3390 struct pcie_service_card *card = adapter->card;
3391 struct pci_dev *pdev = card->dev;
3393 /* tx_buf_size might be changed to 3584 by firmware during
3394 * data transfer, we should reset it to default size.
3396 adapter->tx_buf_size = card->pcie.tx_buf_size;
3398 mwifiex_pcie_alloc_buffers(adapter);
3400 pci_set_master(pdev);
3403 /* This function cleans up the PCI-E host memory space. */
3404 static void mwifiex_pcie_down_dev(struct mwifiex_adapter *adapter)
3406 struct pcie_service_card *card = adapter->card;
3407 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
3408 struct pci_dev *pdev = card->dev;
3410 if (mwifiex_write_reg(adapter, reg->drv_rdy, 0x00000000))
3411 mwifiex_dbg(adapter, ERROR, "Failed to write driver not-ready signature\n");
3413 pci_clear_master(pdev);
3415 adapter->seq_num = 0;
3417 mwifiex_pcie_free_buffers(adapter);
3420 static struct mwifiex_if_ops pcie_ops = {
3421 .init_if = mwifiex_init_pcie,
3422 .cleanup_if = mwifiex_cleanup_pcie,
3423 .check_fw_status = mwifiex_check_fw_status,
3424 .check_winner_status = mwifiex_check_winner_status,
3425 .prog_fw = mwifiex_prog_fw_w_helper,
3426 .register_dev = mwifiex_register_dev,
3427 .unregister_dev = mwifiex_unregister_dev,
3428 .enable_int = mwifiex_pcie_enable_host_int,
3429 .disable_int = mwifiex_pcie_disable_host_int_noerr,
3430 .process_int_status = mwifiex_process_int_status,
3431 .host_to_card = mwifiex_pcie_host_to_card,
3432 .wakeup = mwifiex_pm_wakeup_card,
3433 .wakeup_complete = mwifiex_pm_wakeup_card_complete,
3436 .cmdrsp_complete = mwifiex_pcie_cmdrsp_complete,
3437 .event_complete = mwifiex_pcie_event_complete,
3438 .update_mp_end_port = NULL,
3439 .cleanup_mpa_buf = NULL,
3440 .init_fw_port = mwifiex_pcie_init_fw_port,
3441 .clean_pcie_ring = mwifiex_clean_pcie_ring_buf,
3442 .card_reset = mwifiex_pcie_card_reset,
3443 .reg_dump = mwifiex_pcie_reg_dump,
3444 .device_dump = mwifiex_pcie_device_dump,
3445 .down_dev = mwifiex_pcie_down_dev,
3446 .up_dev = mwifiex_pcie_up_dev,
3449 module_pci_driver(mwifiex_pcie);
3451 MODULE_AUTHOR("Marvell International Ltd.");
3452 MODULE_DESCRIPTION("Marvell WiFi-Ex PCI-Express Driver version " PCIE_VERSION);
3453 MODULE_VERSION(PCIE_VERSION);
3454 MODULE_LICENSE("GPL v2");