1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2008 Christian Lamparter <chunkeey@web.de>
4 * Copyright 2008 Johannes Berg <johannes@sipsolutions.net>
6 * This driver is a port from stlc45xx:
7 * Copyright (C) 2008 Nokia Corporation and/or its subsidiary(-ies).
10 #include <linux/module.h>
11 #include <linux/platform_device.h>
12 #include <linux/interrupt.h>
13 #include <linux/firmware.h>
14 #include <linux/delay.h>
15 #include <linux/irq.h>
16 #include <linux/spi/spi.h>
17 #include <linux/etherdevice.h>
18 #include <linux/gpio.h>
19 #include <linux/slab.h>
26 #ifdef CONFIG_P54_SPI_DEFAULT_EEPROM
27 #include "p54spi_eeprom.h"
28 #endif /* CONFIG_P54_SPI_DEFAULT_EEPROM */
32 /* gpios should be handled in board files and provided via platform data,
33 * but because it's currently impossible for p54spi to have a header file
34 * in include/linux, let's use module paramaters for now
37 static int p54spi_gpio_power = 97;
38 module_param(p54spi_gpio_power, int, 0444);
39 MODULE_PARM_DESC(p54spi_gpio_power, "gpio number for power line");
41 static int p54spi_gpio_irq = 87;
42 module_param(p54spi_gpio_irq, int, 0444);
43 MODULE_PARM_DESC(p54spi_gpio_irq, "gpio number for irq line");
45 static void p54spi_spi_read(struct p54s_priv *priv, u8 address,
46 void *buf, size_t len)
48 struct spi_transfer t[2];
52 /* We first push the address */
53 addr = cpu_to_le16(address << 8 | SPI_ADRS_READ_BIT_15);
56 memset(t, 0, sizeof(t));
59 t[0].len = sizeof(addr);
60 spi_message_add_tail(&t[0], &m);
64 spi_message_add_tail(&t[1], &m);
66 spi_sync(priv->spi, &m);
70 static void p54spi_spi_write(struct p54s_priv *priv, u8 address,
71 const void *buf, size_t len)
73 struct spi_transfer t[3];
77 /* We first push the address */
78 addr = cpu_to_le16(address << 8);
81 memset(t, 0, sizeof(t));
84 t[0].len = sizeof(addr);
85 spi_message_add_tail(&t[0], &m);
89 spi_message_add_tail(&t[1], &m);
93 last_word = cpu_to_le16(((u8 *)buf)[len - 1]);
95 t[2].tx_buf = &last_word;
96 t[2].len = sizeof(last_word);
97 spi_message_add_tail(&t[2], &m);
100 spi_sync(priv->spi, &m);
103 static u32 p54spi_read32(struct p54s_priv *priv, u8 addr)
107 p54spi_spi_read(priv, addr, &val, sizeof(val));
109 return le32_to_cpu(val);
112 static inline void p54spi_write16(struct p54s_priv *priv, u8 addr, __le16 val)
114 p54spi_spi_write(priv, addr, &val, sizeof(val));
117 static inline void p54spi_write32(struct p54s_priv *priv, u8 addr, __le32 val)
119 p54spi_spi_write(priv, addr, &val, sizeof(val));
122 static int p54spi_wait_bit(struct p54s_priv *priv, u16 reg, u32 bits)
126 for (i = 0; i < 2000; i++) {
127 u32 buffer = p54spi_read32(priv, reg);
128 if ((buffer & bits) == bits)
134 static int p54spi_spi_write_dma(struct p54s_priv *priv, __le32 base,
135 const void *buf, size_t len)
137 if (!p54spi_wait_bit(priv, SPI_ADRS_DMA_WRITE_CTRL, HOST_ALLOWED)) {
138 dev_err(&priv->spi->dev, "spi_write_dma not allowed "
143 p54spi_write16(priv, SPI_ADRS_DMA_WRITE_CTRL,
144 cpu_to_le16(SPI_DMA_WRITE_CTRL_ENABLE));
146 p54spi_write16(priv, SPI_ADRS_DMA_WRITE_LEN, cpu_to_le16(len));
147 p54spi_write32(priv, SPI_ADRS_DMA_WRITE_BASE, base);
148 p54spi_spi_write(priv, SPI_ADRS_DMA_DATA, buf, len);
152 static int p54spi_request_firmware(struct ieee80211_hw *dev)
154 struct p54s_priv *priv = dev->priv;
157 /* FIXME: should driver use it's own struct device? */
158 ret = reject_firmware(&priv->firmware, "/*(DEBLOBBED)*/", &priv->spi->dev);
161 dev_err(&priv->spi->dev, "reject_firmware() failed: %d", ret);
165 ret = p54_parse_firmware(dev, priv->firmware);
167 release_firmware(priv->firmware);
174 static int p54spi_request_eeprom(struct ieee80211_hw *dev)
176 struct p54s_priv *priv = dev->priv;
177 const struct firmware *eeprom;
180 /* allow users to customize their eeprom.
183 ret = reject_firmware_direct(&eeprom, "/*(DEBLOBBED)*/", &priv->spi->dev);
185 #ifdef CONFIG_P54_SPI_DEFAULT_EEPROM
186 dev_info(&priv->spi->dev, "loading default eeprom...\n");
187 ret = p54_parse_eeprom(dev, (void *) p54spi_eeprom,
188 sizeof(p54spi_eeprom));
190 dev_err(&priv->spi->dev, "Failed to request user eeprom\n");
191 #endif /* CONFIG_P54_SPI_DEFAULT_EEPROM */
193 dev_info(&priv->spi->dev, "loading user eeprom...\n");
194 ret = p54_parse_eeprom(dev, (void *) eeprom->data,
196 release_firmware(eeprom);
201 static int p54spi_upload_firmware(struct ieee80211_hw *dev)
203 struct p54s_priv *priv = dev->priv;
204 unsigned long fw_len, _fw_len;
205 unsigned int offset = 0;
209 fw_len = priv->firmware->size;
210 fw = kmemdup(priv->firmware->data, fw_len, GFP_KERNEL);
214 /* stop the device */
215 p54spi_write16(priv, SPI_ADRS_DEV_CTRL_STAT, cpu_to_le16(
216 SPI_CTRL_STAT_HOST_OVERRIDE | SPI_CTRL_STAT_HOST_RESET |
217 SPI_CTRL_STAT_START_HALTED));
219 msleep(TARGET_BOOT_SLEEP);
221 p54spi_write16(priv, SPI_ADRS_DEV_CTRL_STAT, cpu_to_le16(
222 SPI_CTRL_STAT_HOST_OVERRIDE |
223 SPI_CTRL_STAT_START_HALTED));
225 msleep(TARGET_BOOT_SLEEP);
228 _fw_len = min_t(long, fw_len, SPI_MAX_PACKET_SIZE);
230 err = p54spi_spi_write_dma(priv, cpu_to_le32(
231 ISL38XX_DEV_FIRMWARE_ADDR + offset),
232 (fw + offset), _fw_len);
242 /* enable host interrupts */
243 p54spi_write32(priv, SPI_ADRS_HOST_INT_EN,
244 cpu_to_le32(SPI_HOST_INTS_DEFAULT));
246 /* boot the device */
247 p54spi_write16(priv, SPI_ADRS_DEV_CTRL_STAT, cpu_to_le16(
248 SPI_CTRL_STAT_HOST_OVERRIDE | SPI_CTRL_STAT_HOST_RESET |
249 SPI_CTRL_STAT_RAM_BOOT));
251 msleep(TARGET_BOOT_SLEEP);
253 p54spi_write16(priv, SPI_ADRS_DEV_CTRL_STAT, cpu_to_le16(
254 SPI_CTRL_STAT_HOST_OVERRIDE | SPI_CTRL_STAT_RAM_BOOT));
255 msleep(TARGET_BOOT_SLEEP);
262 static void p54spi_power_off(struct p54s_priv *priv)
264 disable_irq(gpio_to_irq(p54spi_gpio_irq));
265 gpio_set_value(p54spi_gpio_power, 0);
268 static void p54spi_power_on(struct p54s_priv *priv)
270 gpio_set_value(p54spi_gpio_power, 1);
271 enable_irq(gpio_to_irq(p54spi_gpio_irq));
273 /* need to wait a while before device can be accessed, the length
279 static inline void p54spi_int_ack(struct p54s_priv *priv, u32 val)
281 p54spi_write32(priv, SPI_ADRS_HOST_INT_ACK, cpu_to_le32(val));
284 static int p54spi_wakeup(struct p54s_priv *priv)
287 p54spi_write32(priv, SPI_ADRS_ARM_INTERRUPTS,
288 cpu_to_le32(SPI_TARGET_INT_WAKEUP));
290 /* And wait for the READY interrupt */
291 if (!p54spi_wait_bit(priv, SPI_ADRS_HOST_INTERRUPTS,
292 SPI_HOST_INT_READY)) {
293 dev_err(&priv->spi->dev, "INT_READY timeout\n");
297 p54spi_int_ack(priv, SPI_HOST_INT_READY);
301 static inline void p54spi_sleep(struct p54s_priv *priv)
303 p54spi_write32(priv, SPI_ADRS_ARM_INTERRUPTS,
304 cpu_to_le32(SPI_TARGET_INT_SLEEP));
307 static void p54spi_int_ready(struct p54s_priv *priv)
309 p54spi_write32(priv, SPI_ADRS_HOST_INT_EN, cpu_to_le32(
310 SPI_HOST_INT_UPDATE | SPI_HOST_INT_SW_UPDATE));
312 switch (priv->fw_state) {
313 case FW_STATE_BOOTING:
314 priv->fw_state = FW_STATE_READY;
315 complete(&priv->fw_comp);
317 case FW_STATE_RESETTING:
318 priv->fw_state = FW_STATE_READY;
319 /* TODO: reinitialize state */
326 static int p54spi_rx(struct p54s_priv *priv)
331 #define READAHEAD_SZ (sizeof(rx_head)-sizeof(u16))
333 if (p54spi_wakeup(priv) < 0)
336 /* Read data size and first data word in one SPI transaction
337 * This is workaround for firmware/DMA bug,
338 * when first data word gets lost under high load.
340 p54spi_spi_read(priv, SPI_ADRS_DMA_DATA, rx_head, sizeof(rx_head));
345 dev_err(&priv->spi->dev, "rx request of zero bytes\n");
349 /* Firmware may insert up to 4 padding bytes after the lmac header,
350 * but it does not amend the size of SPI data transfer.
351 * Such packets has correct data size in header, thus referencing
352 * past the end of allocated skb. Reserve extra 4 bytes for this case
354 skb = dev_alloc_skb(len + 4);
357 dev_err(&priv->spi->dev, "could not alloc skb");
361 if (len <= READAHEAD_SZ) {
362 skb_put_data(skb, rx_head + 1, len);
364 skb_put_data(skb, rx_head + 1, READAHEAD_SZ);
365 p54spi_spi_read(priv, SPI_ADRS_DMA_DATA,
366 skb_put(skb, len - READAHEAD_SZ),
370 /* Put additional bytes to compensate for the possible
371 * alignment-caused truncation
375 if (p54_rx(priv->hw, skb) == 0)
382 static irqreturn_t p54spi_interrupt(int irq, void *config)
384 struct spi_device *spi = config;
385 struct p54s_priv *priv = spi_get_drvdata(spi);
387 ieee80211_queue_work(priv->hw, &priv->work);
392 static int p54spi_tx_frame(struct p54s_priv *priv, struct sk_buff *skb)
394 struct p54_hdr *hdr = (struct p54_hdr *) skb->data;
397 if (p54spi_wakeup(priv) < 0)
400 ret = p54spi_spi_write_dma(priv, hdr->req_id, skb->data, skb->len);
404 if (!p54spi_wait_bit(priv, SPI_ADRS_HOST_INTERRUPTS,
405 SPI_HOST_INT_WR_READY)) {
406 dev_err(&priv->spi->dev, "WR_READY timeout\n");
411 p54spi_int_ack(priv, SPI_HOST_INT_WR_READY);
413 if (FREE_AFTER_TX(skb))
414 p54_free_skb(priv->hw, skb);
420 static int p54spi_wq_tx(struct p54s_priv *priv)
422 struct p54s_tx_info *entry;
424 struct ieee80211_tx_info *info;
425 struct p54_tx_info *minfo;
426 struct p54s_tx_info *dinfo;
430 spin_lock_irqsave(&priv->tx_lock, flags);
432 while (!list_empty(&priv->tx_pending)) {
433 entry = list_entry(priv->tx_pending.next,
434 struct p54s_tx_info, tx_list);
436 list_del_init(&entry->tx_list);
438 spin_unlock_irqrestore(&priv->tx_lock, flags);
440 dinfo = container_of((void *) entry, struct p54s_tx_info,
442 minfo = container_of((void *) dinfo, struct p54_tx_info,
444 info = container_of((void *) minfo, struct ieee80211_tx_info,
446 skb = container_of((void *) info, struct sk_buff, cb);
448 ret = p54spi_tx_frame(priv, skb);
451 p54_free_skb(priv->hw, skb);
455 spin_lock_irqsave(&priv->tx_lock, flags);
457 spin_unlock_irqrestore(&priv->tx_lock, flags);
461 static void p54spi_op_tx(struct ieee80211_hw *dev, struct sk_buff *skb)
463 struct p54s_priv *priv = dev->priv;
464 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
465 struct p54_tx_info *mi = (struct p54_tx_info *) info->rate_driver_data;
466 struct p54s_tx_info *di = (struct p54s_tx_info *) mi->data;
469 BUILD_BUG_ON(sizeof(*di) > sizeof((mi->data)));
471 spin_lock_irqsave(&priv->tx_lock, flags);
472 list_add_tail(&di->tx_list, &priv->tx_pending);
473 spin_unlock_irqrestore(&priv->tx_lock, flags);
475 ieee80211_queue_work(priv->hw, &priv->work);
478 static void p54spi_work(struct work_struct *work)
480 struct p54s_priv *priv = container_of(work, struct p54s_priv, work);
484 mutex_lock(&priv->mutex);
486 if (priv->fw_state == FW_STATE_OFF)
489 ints = p54spi_read32(priv, SPI_ADRS_HOST_INTERRUPTS);
491 if (ints & SPI_HOST_INT_READY) {
492 p54spi_int_ready(priv);
493 p54spi_int_ack(priv, SPI_HOST_INT_READY);
496 if (priv->fw_state != FW_STATE_READY)
499 if (ints & SPI_HOST_INT_UPDATE) {
500 p54spi_int_ack(priv, SPI_HOST_INT_UPDATE);
501 ret = p54spi_rx(priv);
505 if (ints & SPI_HOST_INT_SW_UPDATE) {
506 p54spi_int_ack(priv, SPI_HOST_INT_SW_UPDATE);
507 ret = p54spi_rx(priv);
512 ret = p54spi_wq_tx(priv);
514 mutex_unlock(&priv->mutex);
517 static int p54spi_op_start(struct ieee80211_hw *dev)
519 struct p54s_priv *priv = dev->priv;
520 unsigned long timeout;
523 if (mutex_lock_interruptible(&priv->mutex)) {
528 priv->fw_state = FW_STATE_BOOTING;
530 p54spi_power_on(priv);
532 ret = p54spi_upload_firmware(dev);
534 p54spi_power_off(priv);
538 mutex_unlock(&priv->mutex);
540 timeout = msecs_to_jiffies(2000);
541 timeout = wait_for_completion_interruptible_timeout(&priv->fw_comp,
544 dev_err(&priv->spi->dev, "firmware boot failed");
545 p54spi_power_off(priv);
550 if (mutex_lock_interruptible(&priv->mutex)) {
552 p54spi_power_off(priv);
556 WARN_ON(priv->fw_state != FW_STATE_READY);
559 mutex_unlock(&priv->mutex);
565 static void p54spi_op_stop(struct ieee80211_hw *dev)
567 struct p54s_priv *priv = dev->priv;
570 mutex_lock(&priv->mutex);
571 WARN_ON(priv->fw_state != FW_STATE_READY);
573 p54spi_power_off(priv);
574 spin_lock_irqsave(&priv->tx_lock, flags);
575 INIT_LIST_HEAD(&priv->tx_pending);
576 spin_unlock_irqrestore(&priv->tx_lock, flags);
578 priv->fw_state = FW_STATE_OFF;
579 mutex_unlock(&priv->mutex);
581 cancel_work_sync(&priv->work);
584 static int p54spi_probe(struct spi_device *spi)
586 struct p54s_priv *priv = NULL;
587 struct ieee80211_hw *hw;
590 hw = p54_init_common(sizeof(*priv));
592 dev_err(&spi->dev, "could not alloc ieee80211_hw");
598 spi_set_drvdata(spi, priv);
601 spi->bits_per_word = 16;
602 spi->max_speed_hz = 24000000;
604 ret = spi_setup(spi);
606 dev_err(&priv->spi->dev, "spi_setup failed");
610 ret = gpio_request(p54spi_gpio_power, "p54spi power");
612 dev_err(&priv->spi->dev, "power GPIO request failed: %d", ret);
616 ret = gpio_request(p54spi_gpio_irq, "p54spi irq");
618 dev_err(&priv->spi->dev, "irq GPIO request failed: %d", ret);
619 goto err_free_gpio_power;
622 gpio_direction_output(p54spi_gpio_power, 0);
623 gpio_direction_input(p54spi_gpio_irq);
625 ret = request_irq(gpio_to_irq(p54spi_gpio_irq),
626 p54spi_interrupt, 0, "p54spi",
629 dev_err(&priv->spi->dev, "request_irq() failed");
630 goto err_free_gpio_irq;
633 irq_set_irq_type(gpio_to_irq(p54spi_gpio_irq), IRQ_TYPE_EDGE_RISING);
635 disable_irq(gpio_to_irq(p54spi_gpio_irq));
637 INIT_WORK(&priv->work, p54spi_work);
638 init_completion(&priv->fw_comp);
639 INIT_LIST_HEAD(&priv->tx_pending);
640 mutex_init(&priv->mutex);
641 spin_lock_init(&priv->tx_lock);
642 SET_IEEE80211_DEV(hw, &spi->dev);
643 priv->common.open = p54spi_op_start;
644 priv->common.stop = p54spi_op_stop;
645 priv->common.tx = p54spi_op_tx;
647 ret = p54spi_request_firmware(hw);
649 goto err_free_common;
651 ret = p54spi_request_eeprom(hw);
653 goto err_free_common;
655 ret = p54_register_common(hw, &priv->spi->dev);
657 goto err_free_common;
662 free_irq(gpio_to_irq(p54spi_gpio_irq), spi);
664 gpio_free(p54spi_gpio_irq);
666 gpio_free(p54spi_gpio_power);
668 p54_free_common(priv->hw);
672 static void p54spi_remove(struct spi_device *spi)
674 struct p54s_priv *priv = spi_get_drvdata(spi);
676 p54_unregister_common(priv->hw);
678 free_irq(gpio_to_irq(p54spi_gpio_irq), spi);
680 gpio_free(p54spi_gpio_power);
681 gpio_free(p54spi_gpio_irq);
682 release_firmware(priv->firmware);
684 mutex_destroy(&priv->mutex);
686 p54_free_common(priv->hw);
690 static struct spi_driver p54spi_driver = {
695 .probe = p54spi_probe,
696 .remove = p54spi_remove,
699 module_spi_driver(p54spi_driver);
701 MODULE_LICENSE("GPL");
702 MODULE_AUTHOR("Christian Lamparter <chunkeey@web.de>");
703 MODULE_ALIAS("spi:cx3110x");
704 MODULE_ALIAS("spi:p54spi");
705 MODULE_ALIAS("spi:stlc45xx");