2 * LMAC Interface specific definitions for mac80211 Prism54 drivers
4 * Copyright (c) 2006, Michael Wu <flamingice@sourmilk.net>
5 * Copyright (c) 2007 - 2009, Christian Lamparter <chunkeey@web.de>
8 * - the islsm (softmac prism54) driver, which is:
9 * Copyright 2004-2006 Jean-Baptiste Note <jbnote@gmail.com>, et al.
11 * - LMAC API interface header file for STLC4560 (lmac_longbow.h)
12 * Copyright (C) 2007 Conexant Systems, Inc.
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License version 2 as
16 * published by the Free Software Foundation.
22 enum p54_control_frame_types {
23 P54_CONTROL_TYPE_SETUP = 0,
24 P54_CONTROL_TYPE_SCAN,
25 P54_CONTROL_TYPE_TRAP,
26 P54_CONTROL_TYPE_DCFINIT,
27 P54_CONTROL_TYPE_RX_KEYCACHE,
30 P54_CONTROL_TYPE_TXCANCEL,
31 P54_CONTROL_TYPE_TXDONE,
32 P54_CONTROL_TYPE_BURST,
33 P54_CONTROL_TYPE_STAT_READBACK,
35 P54_CONTROL_TYPE_EEPROM_READBACK,
37 P54_CONTROL_TYPE_GPIO,
38 P54_CONTROL_TYPE_TIMER,
39 P54_CONTROL_TYPE_MODULATION,
40 P54_CONTROL_TYPE_SYNTH_CONFIG,
41 P54_CONTROL_TYPE_DETECTOR_VALUE,
42 P54_CONTROL_TYPE_XBOW_SYNTH_CFG,
43 P54_CONTROL_TYPE_CCE_QUIET,
44 P54_CONTROL_TYPE_PSM_STA_UNLOCK,
46 P54_CONTROL_TYPE_BT_BALANCER = 28,
47 P54_CONTROL_TYPE_GROUP_ADDRESS_TABLE = 30,
48 P54_CONTROL_TYPE_ARPTABLE = 31,
49 P54_CONTROL_TYPE_BT_OPTIONS = 35,
52 #define P54_HDR_FLAG_CONTROL BIT(15)
53 #define P54_HDR_FLAG_CONTROL_OPSET (BIT(15) + BIT(0))
54 #define P54_HDR_FLAG_DATA_ALIGN BIT(14)
56 #define P54_HDR_FLAG_DATA_OUT_PROMISC BIT(0)
57 #define P54_HDR_FLAG_DATA_OUT_TIMESTAMP BIT(1)
58 #define P54_HDR_FLAG_DATA_OUT_SEQNR BIT(2)
59 #define P54_HDR_FLAG_DATA_OUT_BIT3 BIT(3)
60 #define P54_HDR_FLAG_DATA_OUT_BURST BIT(4)
61 #define P54_HDR_FLAG_DATA_OUT_NOCANCEL BIT(5)
62 #define P54_HDR_FLAG_DATA_OUT_CLEARTIM BIT(6)
63 #define P54_HDR_FLAG_DATA_OUT_HITCHHIKE BIT(7)
64 #define P54_HDR_FLAG_DATA_OUT_COMPRESS BIT(8)
65 #define P54_HDR_FLAG_DATA_OUT_CONCAT BIT(9)
66 #define P54_HDR_FLAG_DATA_OUT_PCS_ACCEPT BIT(10)
67 #define P54_HDR_FLAG_DATA_OUT_WAITEOSP BIT(11)
69 #define P54_HDR_FLAG_DATA_IN_FCS_GOOD BIT(0)
70 #define P54_HDR_FLAG_DATA_IN_MATCH_MAC BIT(1)
71 #define P54_HDR_FLAG_DATA_IN_MCBC BIT(2)
72 #define P54_HDR_FLAG_DATA_IN_BEACON BIT(3)
73 #define P54_HDR_FLAG_DATA_IN_MATCH_BSS BIT(4)
74 #define P54_HDR_FLAG_DATA_IN_BCAST_BSS BIT(5)
75 #define P54_HDR_FLAG_DATA_IN_DATA BIT(6)
76 #define P54_HDR_FLAG_DATA_IN_TRUNCATED BIT(7)
77 #define P54_HDR_FLAG_DATA_IN_BIT8 BIT(8)
78 #define P54_HDR_FLAG_DATA_IN_TRANSPARENT BIT(9)
84 __le16 type; /* enum p54_control_frame_types */
90 #define GET_REQ_ID(skb) \
91 (((struct p54_hdr *) ((struct sk_buff *) skb)->data)->req_id) \
93 #define FREE_AFTER_TX(skb) \
94 ((((struct p54_hdr *) ((struct sk_buff *) skb)->data)-> \
95 flags) == cpu_to_le16(P54_HDR_FLAG_CONTROL_OPSET))
97 #define IS_DATA_FRAME(skb) \
98 (!((((struct p54_hdr *) ((struct sk_buff *) skb)->data)-> \
99 flags) & cpu_to_le16(P54_HDR_FLAG_CONTROL)))
101 #define GET_HW_QUEUE(skb) \
102 (((struct p54_tx_data *)((struct p54_hdr *) \
103 skb->data)->data)->hw_queue)
106 * shared interface ID definitions
107 * The interface ID is a unique identification of a specific interface.
108 * The following values are reserved: 0x0000, 0x0002, 0x0012, 0x0014, 0x0015
110 #define IF_ID_ISL36356A 0x0001 /* ISL36356A <-> Firmware */
111 #define IF_ID_MVC 0x0003 /* MAC Virtual Coprocessor */
112 #define IF_ID_DEBUG 0x0008 /* PolDebug Interface */
113 #define IF_ID_PRODUCT 0x0009
114 #define IF_ID_OEM 0x000a
115 #define IF_ID_PCI3877 0x000b /* 3877 <-> Host PCI */
116 #define IF_ID_ISL37704C 0x000c /* ISL37704C <-> Fw */
117 #define IF_ID_ISL39000 0x000f /* ISL39000 <-> Fw */
118 #define IF_ID_ISL39300A 0x0010 /* ISL39300A <-> Fw */
119 #define IF_ID_ISL37700_UAP 0x0016 /* ISL37700 uAP Fw <-> Fw */
120 #define IF_ID_ISL39000_UAP 0x0017 /* ISL39000 uAP Fw <-> Fw */
121 #define IF_ID_LMAC 0x001a /* Interface exposed by LMAC */
137 /* driver <-> lmac definitions */
138 struct p54_eeprom_lm86 {
156 enum p54_rx_decrypt_status {
157 P54_DECRYPT_NONE = 0,
160 P54_DECRYPT_NOMICHAEL,
161 P54_DECRYPT_NOCKIPMIC,
162 P54_DECRYPT_FAIL_WEP,
163 P54_DECRYPT_FAIL_TKIP,
164 P54_DECRYPT_FAIL_MICHAEL,
165 P54_DECRYPT_FAIL_CKIPKP,
166 P54_DECRYPT_FAIL_CKIPMIC,
167 P54_DECRYPT_FAIL_AESCCMP
189 P54_TRAP_FAA_RADIO_ON,
190 P54_TRAP_FAA_RADIO_OFF,
203 enum p54_frame_sent_status {
207 P54_TX_PSM_CANCELLED = 4
210 struct p54_frame_sent {
220 enum p54_tx_data_crypt {
224 P54_CRYPTO_TKIPMICHAEL,
225 P54_CRYPTO_CCX_WEPMIC,
226 P54_CRYPTO_CCX_KPMIC,
231 enum p54_tx_data_queue {
232 P54_QUEUE_BEACON = 0,
233 P54_QUEUE_FWSCAN = 1,
238 P54_QUEUE_AC_NUM = 4,
248 #define IS_QOS_QUEUE(n) (n >= P54_QUEUE_DATA)
277 #define P54_TX_FRAME_LIFETIME 2000
278 #define P54_TX_TIMEOUT 4000
279 #define P54_STATISTICS_UPDATE 5000
281 #define P54_FILTER_TYPE_NONE 0
282 #define P54_FILTER_TYPE_STATION BIT(0)
283 #define P54_FILTER_TYPE_IBSS BIT(1)
284 #define P54_FILTER_TYPE_AP BIT(2)
285 #define P54_FILTER_TYPE_TRANSPARENT BIT(3)
286 #define P54_FILTER_TYPE_PROMISCUOUS BIT(4)
287 #define P54_FILTER_TYPE_HIBERNATE BIT(5)
288 #define P54_FILTER_TYPE_NOACK BIT(6)
289 #define P54_FILTER_TYPE_RX_DISABLED BIT(7)
291 struct p54_setup_mac {
293 u8 mac_addr[ETH_ALEN];
299 __le32 basic_rate_mask;
313 __le32 basic_rate_mask;
316 u8 rx_rssi_threshold;
319 __le16 lpf_bandwidth;
320 __le16 osc_start_delay;
325 #define P54_SETUP_V1_LEN 40
326 #define P54_SETUP_V2_LEN (sizeof(struct p54_setup_mac))
328 #define P54_SCAN_EXIT BIT(0)
329 #define P54_SCAN_TRAP BIT(1)
330 #define P54_SCAN_ACTIVE BIT(2)
331 #define P54_SCAN_FILTER BIT(3)
333 struct p54_scan_head {
340 struct p54_pa_curve_data_sample {
351 struct p54_scan_body {
352 u8 pa_points_per_curve;
358 struct p54_pa_curve_data_sample curve_data[8];
366 * Warning: Longbow's structures are bogus.
368 struct p54_channel_output_limit_longbow {
369 __le16 rf_power_points[12];
372 struct p54_pa_curve_data_sample_longbow {
377 } points[3] __packed;
380 struct p54_scan_body_longbow {
381 struct p54_channel_output_limit_longbow power_limits;
382 struct p54_pa_curve_data_sample_longbow curve_data[8];
383 __le16 unkn[6]; /* maybe more power_limits or rate_mask */
386 union p54_scan_body_union {
387 struct p54_scan_body normal;
388 struct p54_scan_body_longbow longbow;
391 struct p54_scan_tail_rate {
392 __le32 basic_rate_mask;
407 struct p54_edcf_queue_param queue[8];
410 __le16 round_trip_delay;
413 struct p54_statistics {
423 __le32 sample_noise[8];
428 struct p54_xbow_synth {
439 struct p54_keycache {
454 __le16 durations[32];
457 struct p54_psm_interval {
462 #define P54_PSM_CAM 0
463 #define P54_PSM BIT(0)
464 #define P54_PSM_DTIM BIT(1)
465 #define P54_PSM_MCBC BIT(2)
466 #define P54_PSM_CHECKSUM BIT(3)
467 #define P54_PSM_SKIP_MORE_DATA BIT(4)
468 #define P54_PSM_BEACON_TIMEOUT BIT(5)
469 #define P54_PSM_HFOSLEEP BIT(6)
470 #define P54_PSM_AUTOSWITCH_SLEEP BIT(7)
471 #define P54_PSM_LPIT BIT(8)
472 #define P54_PSM_BF_UCAST_SKIP BIT(9)
473 #define P54_PSM_BF_MCAST_SKIP BIT(10)
478 struct p54_psm_interval intervals[4];
479 u8 beacon_rssi_skip_max;
480 u8 rssi_delta_threshold;
485 #define MC_FILTER_ADDRESS_NUM 4
487 struct p54_group_address_table {
488 __le16 filter_enable;
490 u8 mac_list[MC_FILTER_ADDRESS_NUM][ETH_ALEN];
493 struct p54_txcancel {
497 struct p54_sta_unlock {
502 #define P54_TIM_CLEAR BIT(15)
509 struct p54_cce_quiet {
513 struct p54_bt_balancer {
518 struct p54_arp_table {
519 __le16 filter_enable;
524 int p54_set_leds(struct p54_common *priv);
525 int p54_init_leds(struct p54_common *priv);
526 void p54_unregister_leds(struct p54_common *priv);
529 void p54_tx_80211(struct ieee80211_hw *dev,
530 struct ieee80211_tx_control *control,
531 struct sk_buff *skb);
532 int p54_tx_cancel(struct p54_common *priv, __le32 req_id);
533 void p54_tx(struct p54_common *priv, struct sk_buff *skb);
535 /* synth/phy configuration */
536 int p54_init_xbow_synth(struct p54_common *priv);
537 int p54_scan(struct p54_common *priv, u16 mode, u16 dwell);
540 int p54_sta_unlock(struct p54_common *priv, u8 *addr);
541 int p54_update_beacon_tim(struct p54_common *priv, u16 aid, bool set);
542 int p54_setup_mac(struct p54_common *priv);
543 int p54_set_ps(struct p54_common *priv);
544 int p54_fetch_statistics(struct p54_common *priv);
545 int p54_set_groupfilter(struct p54_common *priv);
548 int p54_set_edcf(struct p54_common *priv);
550 /* cryptographic engine */
551 int p54_upload_key(struct p54_common *priv, u8 algo, int slot,
552 u8 idx, u8 len, u8 *addr, u8* key);
555 int p54_download_eeprom(struct p54_common *priv, void *buf,
556 u16 offset, u16 len);
557 struct p54_rssi_db_entry *p54_rssi_find(struct p54_common *p, const u16 freq);
560 u8 *p54_find_ie(struct sk_buff *skb, u8 ie);