drivers/net/wireless/intel/iwlwifi/iwl-context-info.h

   1 /******************************************************************************
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   6  * GPL LICENSE SUMMARY
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  10  * This program is free software; you can redistribute it and/or modify
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  12  * published by the Free Software Foundation.
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  51
  52 #ifndef __iwl_context_info_file_h__
  53 #define __iwl_context_info_file_h__
  54
  55 /* maximmum number of DRAM map entries supported by FW */
  56 #define IWL_MAX_DRAM_ENTRY      64
  57 #define CSR_CTXT_INFO_BA        0x40
  58
  59 /**
  60  * enum iwl_context_info_flags - Context information control flags
  61  * @IWL_CTXT_INFO_AUTO_FUNC_INIT: If set, FW will not wait before interrupting
  62  *      the init done for driver command that configures several system modes
  63  * @IWL_CTXT_INFO_EARLY_DEBUG: enable early debug
  64  * @IWL_CTXT_INFO_ENABLE_CDMP: enable core dump
  65  * @IWL_CTXT_INFO_RB_SIZE_4K: Use 4K RB size (the default is 2K)
  66  * @IWL_CTXT_INFO_RB_CB_SIZE_POS: position of the RBD Cyclic Buffer Size
  67  *      exponent, the actual size is 2**value, valid sizes are 8-2048.
  68  *      The value is four bits long. Maximum valid exponent is 12
  69  * @IWL_CTXT_INFO_TFD_FORMAT_LONG: use long TFD Format (the
  70  *      default is short format - not supported by the driver)
  71  */
  72 enum iwl_context_info_flags {
  73         IWL_CTXT_INFO_AUTO_FUNC_INIT    = BIT(0),
  74         IWL_CTXT_INFO_EARLY_DEBUG       = BIT(1),
  75         IWL_CTXT_INFO_ENABLE_CDMP       = BIT(2),
  76         IWL_CTXT_INFO_RB_SIZE_4K        = BIT(3),
  77         IWL_CTXT_INFO_RB_CB_SIZE_POS    = 4,
  78         IWL_CTXT_INFO_TFD_FORMAT_LONG   = BIT(8),
  79 };
  80
  81 /*
  82  * struct iwl_context_info_version - version structure
  83  * @mac_id: SKU and revision id
  84  * @version: context information version id
  85  * @size: the size of the context information in DWs
  86  */
  87 struct iwl_context_info_version {
  88         __le16 mac_id;
  89         __le16 version;
  90         __le16 size;
  91         __le16 reserved;
  92 } __packed;
  93
  94 /*
  95  * struct iwl_context_info_control - version structure
  96  * @control_flags: context information flags see &enum iwl_context_info_flags
  97  */
  98 struct iwl_context_info_control {
  99         __le32 control_flags;
 100         __le32 reserved;
 101 } __packed;
 102
 103 /*
 104  * struct iwl_context_info_dram - images DRAM map
 105  * each entry in the map represents a DRAM chunk of up to 32 KB
 106  * @umac_img: UMAC image DRAM map
 107  * @lmac_img: LMAC image DRAM map
 108  * @virtual_img: paged image DRAM map
 109  */
 110 struct iwl_context_info_dram {
 111         __le64 umac_img[IWL_MAX_DRAM_ENTRY];
 112         __le64 lmac_img[IWL_MAX_DRAM_ENTRY];
 113         __le64 virtual_img[IWL_MAX_DRAM_ENTRY];
 114 } __packed;
 115
 116 /*
 117  * struct iwl_context_info_rbd_cfg - RBDs configuration
 118  * @free_rbd_addr: default queue free RB CB base address
 119  * @used_rbd_addr: default queue used RB CB base address
 120  * @status_wr_ptr: default queue used RB status write pointer
 121  */
 122 struct iwl_context_info_rbd_cfg {
 123         __le64 free_rbd_addr;
 124         __le64 used_rbd_addr;
 125         __le64 status_wr_ptr;
 126 } __packed;
 127
 128 /*
 129  * struct iwl_context_info_hcmd_cfg  - command queue configuration
 130  * @cmd_queue_addr: address of command queue
 131  * @cmd_queue_size: number of entries
 132  */
 133 struct iwl_context_info_hcmd_cfg {
 134         __le64 cmd_queue_addr;
 135         u8 cmd_queue_size;
 136         u8 reserved[7];
 137 } __packed;
 138
 139 /*
 140  * struct iwl_context_info_dump_cfg - Core Dump configuration
 141  * @core_dump_addr: core dump (debug DRAM address) start address
 142  * @core_dump_size: size, in DWs
 143  */
 144 struct iwl_context_info_dump_cfg {
 145         __le64 core_dump_addr;
 146         __le32 core_dump_size;
 147         __le32 reserved;
 148 } __packed;
 149
 150 /*
 151  * struct iwl_context_info_pnvm_cfg - platform NVM data configuration
 152  * @platform_nvm_addr: Platform NVM data start address
 153  * @platform_nvm_size: size in DWs
 154  */
 155 struct iwl_context_info_pnvm_cfg {
 156         __le64 platform_nvm_addr;
 157         __le32 platform_nvm_size;
 158         __le32 reserved;
 159 } __packed;
 160
 161 /*
 162  * struct iwl_context_info_early_dbg_cfg - early debug configuration for
 163  *      dumping DRAM addresses
 164  * @early_debug_addr: early debug start address
 165  * @early_debug_size: size in DWs
 166  */
 167 struct iwl_context_info_early_dbg_cfg {
 168         __le64 early_debug_addr;
 169         __le32 early_debug_size;
 170         __le32 reserved;
 171 } __packed;
 172
 173 /*
 174  * struct iwl_context_info - device INIT configuration
 175  * @version: version information of context info and HW
 176  * @control: control flags of FH configurations
 177  * @rbd_cfg: default RX queue configuration
 178  * @hcmd_cfg: command queue configuration
 179  * @dump_cfg: core dump data
 180  * @edbg_cfg: early debug configuration
 181  * @pnvm_cfg: platform nvm configuration
 182  * @dram: firmware image addresses in DRAM
 183  */
 184 struct iwl_context_info {
 185         struct iwl_context_info_version version;
 186         struct iwl_context_info_control control;
 187         __le64 reserved0;
 188         struct iwl_context_info_rbd_cfg rbd_cfg;
 189         struct iwl_context_info_hcmd_cfg hcmd_cfg;
 190         __le32 reserved1[4];
 191         struct iwl_context_info_dump_cfg dump_cfg;
 192         struct iwl_context_info_early_dbg_cfg edbg_cfg;
 193         struct iwl_context_info_pnvm_cfg pnvm_cfg;
 194         __le32 reserved2[16];
 195         struct iwl_context_info_dram dram;
 196         __le32 reserved3[16];
 197 } __packed;
 198
 199 int iwl_pcie_ctxt_info_init(struct iwl_trans *trans, const struct fw_img *fw);
 200 void iwl_pcie_ctxt_info_free(struct iwl_trans *trans);
 201 void iwl_pcie_ctxt_info_free_paging(struct iwl_trans *trans);
 202
 203 #endif /* __iwl_context_info_file_h__ */