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54 #ifndef __iwl_context_info_file_h__
55 #define __iwl_context_info_file_h__
57 /* maximmum number of DRAM map entries supported by FW */
58 #define IWL_MAX_DRAM_ENTRY 64
59 #define CSR_CTXT_INFO_BA 0x40
62 * enum iwl_context_info_flags - Context information control flags
63 * @IWL_CTXT_INFO_AUTO_FUNC_INIT: If set, FW will not wait before interrupting
64 * the init done for driver command that configures several system modes
65 * @IWL_CTXT_INFO_EARLY_DEBUG: enable early debug
66 * @IWL_CTXT_INFO_ENABLE_CDMP: enable core dump
67 * @IWL_CTXT_INFO_RB_SIZE_4K: Use 4K RB size (the default is 2K)
68 * @IWL_CTXT_INFO_RB_CB_SIZE_POS: position of the RBD Cyclic Buffer Size
69 * exponent, the actual size is 2**value, valid sizes are 8-2048.
70 * The value is four bits long. Maximum valid exponent is 12
71 * @IWL_CTXT_INFO_TFD_FORMAT_LONG: use long TFD Format (the
72 * default is short format - not supported by the driver)
74 enum iwl_context_info_flags {
75 IWL_CTXT_INFO_AUTO_FUNC_INIT = BIT(0),
76 IWL_CTXT_INFO_EARLY_DEBUG = BIT(1),
77 IWL_CTXT_INFO_ENABLE_CDMP = BIT(2),
78 IWL_CTXT_INFO_RB_SIZE_4K = BIT(3),
79 IWL_CTXT_INFO_RB_CB_SIZE_POS = 4,
80 IWL_CTXT_INFO_TFD_FORMAT_LONG = BIT(8),
84 * struct iwl_context_info_version - version structure
85 * @mac_id: SKU and revision id
86 * @version: context information version id
87 * @size: the size of the context information in DWs
89 struct iwl_context_info_version {
97 * struct iwl_context_info_control - version structure
98 * @control_flags: context information flags see &enum iwl_context_info_flags
100 struct iwl_context_info_control {
101 __le32 control_flags;
106 * struct iwl_context_info_dram - images DRAM map
107 * each entry in the map represents a DRAM chunk of up to 32 KB
108 * @umac_img: UMAC image DRAM map
109 * @lmac_img: LMAC image DRAM map
110 * @virtual_img: paged image DRAM map
112 struct iwl_context_info_dram {
113 __le64 umac_img[IWL_MAX_DRAM_ENTRY];
114 __le64 lmac_img[IWL_MAX_DRAM_ENTRY];
115 __le64 virtual_img[IWL_MAX_DRAM_ENTRY];
119 * struct iwl_context_info_rbd_cfg - RBDs configuration
120 * @free_rbd_addr: default queue free RB CB base address
121 * @used_rbd_addr: default queue used RB CB base address
122 * @status_wr_ptr: default queue used RB status write pointer
124 struct iwl_context_info_rbd_cfg {
125 __le64 free_rbd_addr;
126 __le64 used_rbd_addr;
127 __le64 status_wr_ptr;
131 * struct iwl_context_info_hcmd_cfg - command queue configuration
132 * @cmd_queue_addr: address of command queue
133 * @cmd_queue_size: number of entries
135 struct iwl_context_info_hcmd_cfg {
136 __le64 cmd_queue_addr;
142 * struct iwl_context_info_dump_cfg - Core Dump configuration
143 * @core_dump_addr: core dump (debug DRAM address) start address
144 * @core_dump_size: size, in DWs
146 struct iwl_context_info_dump_cfg {
147 __le64 core_dump_addr;
148 __le32 core_dump_size;
153 * struct iwl_context_info_pnvm_cfg - platform NVM data configuration
154 * @platform_nvm_addr: Platform NVM data start address
155 * @platform_nvm_size: size in DWs
157 struct iwl_context_info_pnvm_cfg {
158 __le64 platform_nvm_addr;
159 __le32 platform_nvm_size;
164 * struct iwl_context_info_early_dbg_cfg - early debug configuration for
165 * dumping DRAM addresses
166 * @early_debug_addr: early debug start address
167 * @early_debug_size: size in DWs
169 struct iwl_context_info_early_dbg_cfg {
170 __le64 early_debug_addr;
171 __le32 early_debug_size;
176 * struct iwl_context_info - device INIT configuration
177 * @version: version information of context info and HW
178 * @control: control flags of FH configurations
179 * @rbd_cfg: default RX queue configuration
180 * @hcmd_cfg: command queue configuration
181 * @dump_cfg: core dump data
182 * @edbg_cfg: early debug configuration
183 * @pnvm_cfg: platform nvm configuration
184 * @dram: firmware image addresses in DRAM
186 struct iwl_context_info {
187 struct iwl_context_info_version version;
188 struct iwl_context_info_control control;
190 struct iwl_context_info_rbd_cfg rbd_cfg;
191 struct iwl_context_info_hcmd_cfg hcmd_cfg;
193 struct iwl_context_info_dump_cfg dump_cfg;
194 struct iwl_context_info_early_dbg_cfg edbg_cfg;
195 struct iwl_context_info_pnvm_cfg pnvm_cfg;
196 __le32 reserved2[16];
197 struct iwl_context_info_dram dram;
198 __le32 reserved3[16];
201 int iwl_pcie_ctxt_info_init(struct iwl_trans *trans, const struct fw_img *fw);
202 void iwl_pcie_ctxt_info_free(struct iwl_trans *trans);
203 void iwl_pcie_ctxt_info_free_paging(struct iwl_trans *trans);
204 int iwl_pcie_init_fw_sec(struct iwl_trans *trans,
205 const struct fw_img *fw,
206 struct iwl_context_info_dram *ctxt_dram);
208 #endif /* __iwl_context_info_file_h__ */