drivers/net/wireless/intel/iwlwifi/fw/dbg.c

   1 /******************************************************************************
   2  *
   3  * This file is provided under a dual BSD/GPLv2 license.  When using or
   4  * redistributing this file, you may do so under either license.
   5  *
   6  * GPL LICENSE SUMMARY
   7  *
   8  * Copyright(c) 2008 - 2014 Intel Corporation. All rights reserved.
   9  * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
  10  * Copyright(c) 2015 - 2017 Intel Deutschland GmbH
  11  * Copyright(c) 2018        Intel Corporation
  12  *
  13  * This program is free software; you can redistribute it and/or modify
  14  * it under the terms of version 2 of the GNU General Public License as
  15  * published by the Free Software Foundation.
  16  *
  17  * This program is distributed in the hope that it will be useful, but
  18  * WITHOUT ANY WARRANTY; without even the implied warranty of
  19  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  20  * General Public License for more details.
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  22  * You should have received a copy of the GNU General Public License
  23  * along with this program;
  24  *
  25  * The full GNU General Public License is included in this distribution
  26  * in the file called COPYING.
  27  *
  28  * Contact Information:
  29  *  Intel Linux Wireless <linuxwifi@intel.com>
  30  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  31  *
  32  * BSD LICENSE
  33  *
  34  * Copyright(c) 2005 - 2014 Intel Corporation. All rights reserved.
  35  * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
  36  * Copyright(c) 2015 - 2017 Intel Deutschland GmbH
  37  * Copyright(c) 2018        Intel Corporation
  38  * All rights reserved.
  39  *
  40  * Redistribution and use in source and binary forms, with or without
  41  * modification, are permitted provided that the following conditions
  42  * are met:
  43  *
  44  *  * Redistributions of source code must retain the above copyright
  45  *    notice, this list of conditions and the following disclaimer.
  46  *  * Redistributions in binary form must reproduce the above copyright
  47  *    notice, this list of conditions and the following disclaimer in
  48  *    the documentation and/or other materials provided with the
  49  *    distribution.
  50  *  * Neither the name Intel Corporation nor the names of its
  51  *    contributors may be used to endorse or promote products derived
  52  *    from this software without specific prior written permission.
  53  *
  54  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  55  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  56  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  57  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  58  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  59  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  60  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  61  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  62  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  63  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  64  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  65  *
  66  *****************************************************************************/
  67 #include <linux/devcoredump.h>
  68 #include "iwl-drv.h"
  69 #include "runtime.h"
  70 #include "dbg.h"
  71 #include "iwl-io.h"
  72 #include "iwl-prph.h"
  73 #include "iwl-csr.h"
  74
  75 /**
  76  * struct iwl_fw_dump_ptrs - set of pointers needed for the fw-error-dump
  77  *
  78  * @fwrt_ptr: pointer to the buffer coming from fwrt
  79  * @trans_ptr: pointer to struct %iwl_trans_dump_data which contains the
  80  *      transport's data.
  81  * @trans_len: length of the valid data in trans_ptr
  82  * @fwrt_len: length of the valid data in fwrt_ptr
  83  */
  84 struct iwl_fw_dump_ptrs {
  85         struct iwl_trans_dump_data *trans_ptr;
  86         void *fwrt_ptr;
  87         u32 fwrt_len;
  88 };
  89
  90 #define RADIO_REG_MAX_READ 0x2ad
  91 static void iwl_read_radio_regs(struct iwl_fw_runtime *fwrt,
  92                                 struct iwl_fw_error_dump_data **dump_data)
  93 {
  94         u8 *pos = (void *)(*dump_data)->data;
  95         unsigned long flags;
  96         int i;
  97
  98         if (!iwl_trans_grab_nic_access(fwrt->trans, &flags))
  99                 return;
 100
 101         (*dump_data)->type = cpu_to_le32(IWL_FW_ERROR_DUMP_RADIO_REG);
 102         (*dump_data)->len = cpu_to_le32(RADIO_REG_MAX_READ);
 103
 104         for (i = 0; i < RADIO_REG_MAX_READ; i++) {
 105                 u32 rd_cmd = RADIO_RSP_RD_CMD;
 106
 107                 rd_cmd |= i << RADIO_RSP_ADDR_POS;
 108                 iwl_write_prph_no_grab(fwrt->trans, RSP_RADIO_CMD, rd_cmd);
 109                 *pos = (u8)iwl_read_prph_no_grab(fwrt->trans, RSP_RADIO_RDDAT);
 110
 111                 pos++;
 112         }
 113
 114         *dump_data = iwl_fw_error_next_data(*dump_data);
 115
 116         iwl_trans_release_nic_access(fwrt->trans, &flags);
 117 }
 118
 119 static void iwl_fwrt_dump_rxf(struct iwl_fw_runtime *fwrt,
 120                               struct iwl_fw_error_dump_data **dump_data,
 121                               int size, u32 offset, int fifo_num)
 122 {
 123         struct iwl_fw_error_dump_fifo *fifo_hdr;
 124         u32 *fifo_data;
 125         u32 fifo_len;
 126         int i;
 127
 128         fifo_hdr = (void *)(*dump_data)->data;
 129         fifo_data = (void *)fifo_hdr->data;
 130         fifo_len = size;
 131
 132         /* No need to try to read the data if the length is 0 */
 133         if (fifo_len == 0)
 134                 return;
 135
 136         /* Add a TLV for the RXF */
 137         (*dump_data)->type = cpu_to_le32(IWL_FW_ERROR_DUMP_RXF);
 138         (*dump_data)->len = cpu_to_le32(fifo_len + sizeof(*fifo_hdr));
 139
 140         fifo_hdr->fifo_num = cpu_to_le32(fifo_num);
 141         fifo_hdr->available_bytes =
 142                 cpu_to_le32(iwl_trans_read_prph(fwrt->trans,
 143                                                 RXF_RD_D_SPACE + offset));
 144         fifo_hdr->wr_ptr =
 145                 cpu_to_le32(iwl_trans_read_prph(fwrt->trans,
 146                                                 RXF_RD_WR_PTR + offset));
 147         fifo_hdr->rd_ptr =
 148                 cpu_to_le32(iwl_trans_read_prph(fwrt->trans,
 149                                                 RXF_RD_RD_PTR + offset));
 150         fifo_hdr->fence_ptr =
 151                 cpu_to_le32(iwl_trans_read_prph(fwrt->trans,
 152                                                 RXF_RD_FENCE_PTR + offset));
 153         fifo_hdr->fence_mode =
 154                 cpu_to_le32(iwl_trans_read_prph(fwrt->trans,
 155                                                 RXF_SET_FENCE_MODE + offset));
 156
 157         /* Lock fence */
 158         iwl_trans_write_prph(fwrt->trans, RXF_SET_FENCE_MODE + offset, 0x1);
 159         /* Set fence pointer to the same place like WR pointer */
 160         iwl_trans_write_prph(fwrt->trans, RXF_LD_WR2FENCE + offset, 0x1);
 161         /* Set fence offset */
 162         iwl_trans_write_prph(fwrt->trans,
 163                              RXF_LD_FENCE_OFFSET_ADDR + offset, 0x0);
 164
 165         /* Read FIFO */
 166         fifo_len /= sizeof(u32); /* Size in DWORDS */
 167         for (i = 0; i < fifo_len; i++)
 168                 fifo_data[i] = iwl_trans_read_prph(fwrt->trans,
 169                                                  RXF_FIFO_RD_FENCE_INC +
 170                                                  offset);
 171         *dump_data = iwl_fw_error_next_data(*dump_data);
 172 }
 173
 174 static void iwl_fwrt_dump_txf(struct iwl_fw_runtime *fwrt,
 175                               struct iwl_fw_error_dump_data **dump_data,
 176                               int size, u32 offset, int fifo_num)
 177 {
 178         struct iwl_fw_error_dump_fifo *fifo_hdr;
 179         u32 *fifo_data;
 180         u32 fifo_len;
 181         int i;
 182
 183         fifo_hdr = (void *)(*dump_data)->data;
 184         fifo_data = (void *)fifo_hdr->data;
 185         fifo_len = size;
 186
 187         /* No need to try to read the data if the length is 0 */
 188         if (fifo_len == 0)
 189                 return;
 190
 191         /* Add a TLV for the FIFO */
 192         (*dump_data)->type = cpu_to_le32(IWL_FW_ERROR_DUMP_TXF);
 193         (*dump_data)->len = cpu_to_le32(fifo_len + sizeof(*fifo_hdr));
 194
 195         fifo_hdr->fifo_num = cpu_to_le32(fifo_num);
 196         fifo_hdr->available_bytes =
 197                 cpu_to_le32(iwl_trans_read_prph(fwrt->trans,
 198                                                 TXF_FIFO_ITEM_CNT + offset));
 199         fifo_hdr->wr_ptr =
 200                 cpu_to_le32(iwl_trans_read_prph(fwrt->trans,
 201                                                 TXF_WR_PTR + offset));
 202         fifo_hdr->rd_ptr =
 203                 cpu_to_le32(iwl_trans_read_prph(fwrt->trans,
 204                                                 TXF_RD_PTR + offset));
 205         fifo_hdr->fence_ptr =
 206                 cpu_to_le32(iwl_trans_read_prph(fwrt->trans,
 207                                                 TXF_FENCE_PTR + offset));
 208         fifo_hdr->fence_mode =
 209                 cpu_to_le32(iwl_trans_read_prph(fwrt->trans,
 210                                                 TXF_LOCK_FENCE + offset));
 211
 212         /* Set the TXF_READ_MODIFY_ADDR to TXF_WR_PTR */
 213         iwl_trans_write_prph(fwrt->trans, TXF_READ_MODIFY_ADDR + offset,
 214                              TXF_WR_PTR + offset);
 215
 216         /* Dummy-read to advance the read pointer to the head */
 217         iwl_trans_read_prph(fwrt->trans, TXF_READ_MODIFY_DATA + offset);
 218
 219         /* Read FIFO */
 220         fifo_len /= sizeof(u32); /* Size in DWORDS */
 221         for (i = 0; i < fifo_len; i++)
 222                 fifo_data[i] = iwl_trans_read_prph(fwrt->trans,
 223                                                   TXF_READ_MODIFY_DATA +
 224                                                   offset);
 225         *dump_data = iwl_fw_error_next_data(*dump_data);
 226 }
 227
 228 static void iwl_fw_dump_fifos(struct iwl_fw_runtime *fwrt,
 229                               struct iwl_fw_error_dump_data **dump_data)
 230 {
 231         struct iwl_fw_error_dump_fifo *fifo_hdr;
 232         struct iwl_fwrt_shared_mem_cfg *cfg = &fwrt->smem_cfg;
 233         u32 *fifo_data;
 234         u32 fifo_len;
 235         unsigned long flags;
 236         int i, j;
 237
 238         if (!iwl_trans_grab_nic_access(fwrt->trans, &flags))
 239                 return;
 240
 241         /* Pull RXF1 */
 242         iwl_fwrt_dump_rxf(fwrt, dump_data, cfg->lmac[0].rxfifo1_size, 0, 0);
 243         /* Pull RXF2 */
 244         iwl_fwrt_dump_rxf(fwrt, dump_data, cfg->rxfifo2_size,
 245                           RXF_DIFF_FROM_PREV, 1);
 246         /* Pull LMAC2 RXF1 */
 247         if (fwrt->smem_cfg.num_lmacs > 1)
 248                 iwl_fwrt_dump_rxf(fwrt, dump_data, cfg->lmac[1].rxfifo1_size,
 249                                   LMAC2_PRPH_OFFSET, 2);
 250
 251         /* Pull TXF data from LMAC1 */
 252         for (i = 0; i < fwrt->smem_cfg.num_txfifo_entries; i++) {
 253                 /* Mark the number of TXF we're pulling now */
 254                 iwl_trans_write_prph(fwrt->trans, TXF_LARC_NUM, i);
 255                 iwl_fwrt_dump_txf(fwrt, dump_data, cfg->lmac[0].txfifo_size[i],
 256                                   0, i);
 257         }
 258
 259         /* Pull TXF data from LMAC2 */
 260         if (fwrt->smem_cfg.num_lmacs > 1) {
 261                 for (i = 0; i < fwrt->smem_cfg.num_txfifo_entries; i++) {
 262                         /* Mark the number of TXF we're pulling now */
 263                         iwl_trans_write_prph(fwrt->trans,
 264                                              TXF_LARC_NUM + LMAC2_PRPH_OFFSET,
 265                                              i);
 266                         iwl_fwrt_dump_txf(fwrt, dump_data,
 267                                           cfg->lmac[1].txfifo_size[i],
 268                                           LMAC2_PRPH_OFFSET,
 269                                           i + cfg->num_txfifo_entries);
 270                 }
 271         }
 272
 273         if (fw_has_capa(&fwrt->fw->ucode_capa,
 274                         IWL_UCODE_TLV_CAPA_EXTEND_SHARED_MEM_CFG)) {
 275                 /* Pull UMAC internal TXF data from all TXFs */
 276                 for (i = 0;
 277                      i < ARRAY_SIZE(fwrt->smem_cfg.internal_txfifo_size);
 278                      i++) {
 279                         fifo_hdr = (void *)(*dump_data)->data;
 280                         fifo_data = (void *)fifo_hdr->data;
 281                         fifo_len = fwrt->smem_cfg.internal_txfifo_size[i];
 282
 283                         /* No need to try to read the data if the length is 0 */
 284                         if (fifo_len == 0)
 285                                 continue;
 286
 287                         /* Add a TLV for the internal FIFOs */
 288                         (*dump_data)->type =
 289                                 cpu_to_le32(IWL_FW_ERROR_DUMP_INTERNAL_TXF);
 290                         (*dump_data)->len =
 291                                 cpu_to_le32(fifo_len + sizeof(*fifo_hdr));
 292
 293                         fifo_hdr->fifo_num = cpu_to_le32(i);
 294
 295                         /* Mark the number of TXF we're pulling now */
 296                         iwl_trans_write_prph(fwrt->trans, TXF_CPU2_NUM, i +
 297                                 fwrt->smem_cfg.num_txfifo_entries);
 298
 299                         fifo_hdr->available_bytes =
 300                                 cpu_to_le32(iwl_trans_read_prph(fwrt->trans,
 301                                                                 TXF_CPU2_FIFO_ITEM_CNT));
 302                         fifo_hdr->wr_ptr =
 303                                 cpu_to_le32(iwl_trans_read_prph(fwrt->trans,
 304                                                                 TXF_CPU2_WR_PTR));
 305                         fifo_hdr->rd_ptr =
 306                                 cpu_to_le32(iwl_trans_read_prph(fwrt->trans,
 307                                                                 TXF_CPU2_RD_PTR));
 308                         fifo_hdr->fence_ptr =
 309                                 cpu_to_le32(iwl_trans_read_prph(fwrt->trans,
 310                                                                 TXF_CPU2_FENCE_PTR));
 311                         fifo_hdr->fence_mode =
 312                                 cpu_to_le32(iwl_trans_read_prph(fwrt->trans,
 313                                                                 TXF_CPU2_LOCK_FENCE));
 314
 315                         /* Set TXF_CPU2_READ_MODIFY_ADDR to TXF_CPU2_WR_PTR */
 316                         iwl_trans_write_prph(fwrt->trans,
 317                                              TXF_CPU2_READ_MODIFY_ADDR,
 318                                              TXF_CPU2_WR_PTR);
 319
 320                         /* Dummy-read to advance the read pointer to head */
 321                         iwl_trans_read_prph(fwrt->trans,
 322                                             TXF_CPU2_READ_MODIFY_DATA);
 323
 324                         /* Read FIFO */
 325                         fifo_len /= sizeof(u32); /* Size in DWORDS */
 326                         for (j = 0; j < fifo_len; j++)
 327                                 fifo_data[j] =
 328                                         iwl_trans_read_prph(fwrt->trans,
 329                                                             TXF_CPU2_READ_MODIFY_DATA);
 330                         *dump_data = iwl_fw_error_next_data(*dump_data);
 331                 }
 332         }
 333
 334         iwl_trans_release_nic_access(fwrt->trans, &flags);
 335 }
 336
 337 #define IWL8260_ICCM_OFFSET             0x44000 /* Only for B-step */
 338 #define IWL8260_ICCM_LEN                0xC000 /* Only for B-step */
 339
 340 struct iwl_prph_range {
 341         u32 start, end;
 342 };
 343
 344 static const struct iwl_prph_range iwl_prph_dump_addr_comm[] = {
 345         { .start = 0x00a00000, .end = 0x00a00000 },
 346         { .start = 0x00a0000c, .end = 0x00a00024 },
 347         { .start = 0x00a0002c, .end = 0x00a0003c },
 348         { .start = 0x00a00410, .end = 0x00a00418 },
 349         { .start = 0x00a00420, .end = 0x00a00420 },
 350         { .start = 0x00a00428, .end = 0x00a00428 },
 351         { .start = 0x00a00430, .end = 0x00a0043c },
 352         { .start = 0x00a00444, .end = 0x00a00444 },
 353         { .start = 0x00a004c0, .end = 0x00a004cc },
 354         { .start = 0x00a004d8, .end = 0x00a004d8 },
 355         { .start = 0x00a004e0, .end = 0x00a004f0 },
 356         { .start = 0x00a00840, .end = 0x00a00840 },
 357         { .start = 0x00a00850, .end = 0x00a00858 },
 358         { .start = 0x00a01004, .end = 0x00a01008 },
 359         { .start = 0x00a01010, .end = 0x00a01010 },
 360         { .start = 0x00a01018, .end = 0x00a01018 },
 361         { .start = 0x00a01024, .end = 0x00a01024 },
 362         { .start = 0x00a0102c, .end = 0x00a01034 },
 363         { .start = 0x00a0103c, .end = 0x00a01040 },
 364         { .start = 0x00a01048, .end = 0x00a01094 },
 365         { .start = 0x00a01c00, .end = 0x00a01c20 },
 366         { .start = 0x00a01c58, .end = 0x00a01c58 },
 367         { .start = 0x00a01c7c, .end = 0x00a01c7c },
 368         { .start = 0x00a01c28, .end = 0x00a01c54 },
 369         { .start = 0x00a01c5c, .end = 0x00a01c5c },
 370         { .start = 0x00a01c60, .end = 0x00a01cdc },
 371         { .start = 0x00a01ce0, .end = 0x00a01d0c },
 372         { .start = 0x00a01d18, .end = 0x00a01d20 },
 373         { .start = 0x00a01d2c, .end = 0x00a01d30 },
 374         { .start = 0x00a01d40, .end = 0x00a01d5c },
 375         { .start = 0x00a01d80, .end = 0x00a01d80 },
 376         { .start = 0x00a01d98, .end = 0x00a01d9c },
 377         { .start = 0x00a01da8, .end = 0x00a01da8 },
 378         { .start = 0x00a01db8, .end = 0x00a01df4 },
 379         { .start = 0x00a01dc0, .end = 0x00a01dfc },
 380         { .start = 0x00a01e00, .end = 0x00a01e2c },
 381         { .start = 0x00a01e40, .end = 0x00a01e60 },
 382         { .start = 0x00a01e68, .end = 0x00a01e6c },
 383         { .start = 0x00a01e74, .end = 0x00a01e74 },
 384         { .start = 0x00a01e84, .end = 0x00a01e90 },
 385         { .start = 0x00a01e9c, .end = 0x00a01ec4 },
 386         { .start = 0x00a01ed0, .end = 0x00a01ee0 },
 387         { .start = 0x00a01f00, .end = 0x00a01f1c },
 388         { .start = 0x00a01f44, .end = 0x00a01ffc },
 389         { .start = 0x00a02000, .end = 0x00a02048 },
 390         { .start = 0x00a02068, .end = 0x00a020f0 },
 391         { .start = 0x00a02100, .end = 0x00a02118 },
 392         { .start = 0x00a02140, .end = 0x00a0214c },
 393         { .start = 0x00a02168, .end = 0x00a0218c },
 394         { .start = 0x00a021c0, .end = 0x00a021c0 },
 395         { .start = 0x00a02400, .end = 0x00a02410 },
 396         { .start = 0x00a02418, .end = 0x00a02420 },
 397         { .start = 0x00a02428, .end = 0x00a0242c },
 398         { .start = 0x00a02434, .end = 0x00a02434 },
 399         { .start = 0x00a02440, .end = 0x00a02460 },
 400         { .start = 0x00a02468, .end = 0x00a024b0 },
 401         { .start = 0x00a024c8, .end = 0x00a024cc },
 402         { .start = 0x00a02500, .end = 0x00a02504 },
 403         { .start = 0x00a0250c, .end = 0x00a02510 },
 404         { .start = 0x00a02540, .end = 0x00a02554 },
 405         { .start = 0x00a02580, .end = 0x00a025f4 },
 406         { .start = 0x00a02600, .end = 0x00a0260c },
 407         { .start = 0x00a02648, .end = 0x00a02650 },
 408         { .start = 0x00a02680, .end = 0x00a02680 },
 409         { .start = 0x00a026c0, .end = 0x00a026d0 },
 410         { .start = 0x00a02700, .end = 0x00a0270c },
 411         { .start = 0x00a02804, .end = 0x00a02804 },
 412         { .start = 0x00a02818, .end = 0x00a0281c },
 413         { .start = 0x00a02c00, .end = 0x00a02db4 },
 414         { .start = 0x00a02df4, .end = 0x00a02fb0 },
 415         { .start = 0x00a03000, .end = 0x00a03014 },
 416         { .start = 0x00a0301c, .end = 0x00a0302c },
 417         { .start = 0x00a03034, .end = 0x00a03038 },
 418         { .start = 0x00a03040, .end = 0x00a03048 },
 419         { .start = 0x00a03060, .end = 0x00a03068 },
 420         { .start = 0x00a03070, .end = 0x00a03074 },
 421         { .start = 0x00a0307c, .end = 0x00a0307c },
 422         { .start = 0x00a03080, .end = 0x00a03084 },
 423         { .start = 0x00a0308c, .end = 0x00a03090 },
 424         { .start = 0x00a03098, .end = 0x00a03098 },
 425         { .start = 0x00a030a0, .end = 0x00a030a0 },
 426         { .start = 0x00a030a8, .end = 0x00a030b4 },
 427         { .start = 0x00a030bc, .end = 0x00a030bc },
 428         { .start = 0x00a030c0, .end = 0x00a0312c },
 429         { .start = 0x00a03c00, .end = 0x00a03c5c },
 430         { .start = 0x00a04400, .end = 0x00a04454 },
 431         { .start = 0x00a04460, .end = 0x00a04474 },
 432         { .start = 0x00a044c0, .end = 0x00a044ec },
 433         { .start = 0x00a04500, .end = 0x00a04504 },
 434         { .start = 0x00a04510, .end = 0x00a04538 },
 435         { .start = 0x00a04540, .end = 0x00a04548 },
 436         { .start = 0x00a04560, .end = 0x00a0457c },
 437         { .start = 0x00a04590, .end = 0x00a04598 },
 438         { .start = 0x00a045c0, .end = 0x00a045f4 },
 439 };
 440
 441 static const struct iwl_prph_range iwl_prph_dump_addr_9000[] = {
 442         { .start = 0x00a05c00, .end = 0x00a05c18 },
 443         { .start = 0x00a05400, .end = 0x00a056e8 },
 444         { .start = 0x00a08000, .end = 0x00a098bc },
 445         { .start = 0x00a02400, .end = 0x00a02758 },
 446 };
 447
 448 static void _iwl_read_prph_block(struct iwl_trans *trans, u32 start,
 449                                  u32 len_bytes, __le32 *data)
 450 {
 451         u32 i;
 452
 453         for (i = 0; i < len_bytes; i += 4)
 454                 *data++ = cpu_to_le32(iwl_read_prph_no_grab(trans, start + i));
 455 }
 456
 457 static bool iwl_read_prph_block(struct iwl_trans *trans, u32 start,
 458                                 u32 len_bytes, __le32 *data)
 459 {
 460         unsigned long flags;
 461         bool success = false;
 462
 463         if (iwl_trans_grab_nic_access(trans, &flags)) {
 464                 success = true;
 465                 _iwl_read_prph_block(trans, start, len_bytes, data);
 466                 iwl_trans_release_nic_access(trans, &flags);
 467         }
 468
 469         return success;
 470 }
 471
 472 static void iwl_dump_prph(struct iwl_trans *trans,
 473                           struct iwl_fw_error_dump_data **data,
 474                           const struct iwl_prph_range *iwl_prph_dump_addr,
 475                           u32 range_len)
 476 {
 477         struct iwl_fw_error_dump_prph *prph;
 478         unsigned long flags;
 479         u32 i;
 480
 481         if (!iwl_trans_grab_nic_access(trans, &flags))
 482                 return;
 483
 484         for (i = 0; i < range_len; i++) {
 485                 /* The range includes both boundaries */
 486                 int num_bytes_in_chunk = iwl_prph_dump_addr[i].end -
 487                          iwl_prph_dump_addr[i].start + 4;
 488
 489                 (*data)->type = cpu_to_le32(IWL_FW_ERROR_DUMP_PRPH);
 490                 (*data)->len = cpu_to_le32(sizeof(*prph) +
 491                                         num_bytes_in_chunk);
 492                 prph = (void *)(*data)->data;
 493                 prph->prph_start = cpu_to_le32(iwl_prph_dump_addr[i].start);
 494
 495                 _iwl_read_prph_block(trans, iwl_prph_dump_addr[i].start,
 496                                      /* our range is inclusive, hence + 4 */
 497                                      iwl_prph_dump_addr[i].end -
 498                                      iwl_prph_dump_addr[i].start + 4,
 499                                      (void *)prph->data);
 500
 501                 *data = iwl_fw_error_next_data(*data);
 502         }
 503
 504         iwl_trans_release_nic_access(trans, &flags);
 505 }
 506
 507 /*
 508  * alloc_sgtable - allocates scallerlist table in the given size,
 509  * fills it with pages and returns it
 510  * @size: the size (in bytes) of the table
 511 */
 512 static struct scatterlist *alloc_sgtable(int size)
 513 {
 514         int alloc_size, nents, i;
 515         struct page *new_page;
 516         struct scatterlist *iter;
 517         struct scatterlist *table;
 518
 519         nents = DIV_ROUND_UP(size, PAGE_SIZE);
 520         table = kcalloc(nents, sizeof(*table), GFP_KERNEL);
 521         if (!table)
 522                 return NULL;
 523         sg_init_table(table, nents);
 524         iter = table;
 525         for_each_sg(table, iter, sg_nents(table), i) {
 526                 new_page = alloc_page(GFP_KERNEL);
 527                 if (!new_page) {
 528                         /* release all previous allocated pages in the table */
 529                         iter = table;
 530                         for_each_sg(table, iter, sg_nents(table), i) {
 531                                 new_page = sg_page(iter);
 532                                 if (new_page)
 533                                         __free_page(new_page);
 534                         }
 535                         kfree(table);
 536                         return NULL;
 537                 }
 538                 alloc_size = min_t(int, size, PAGE_SIZE);
 539                 size -= PAGE_SIZE;
 540                 sg_set_page(iter, new_page, alloc_size, 0);
 541         }
 542         return table;
 543 }
 544
 545 void iwl_fw_error_dump(struct iwl_fw_runtime *fwrt)
 546 {
 547         struct iwl_fw_error_dump_file *dump_file;
 548         struct iwl_fw_error_dump_data *dump_data;
 549         struct iwl_fw_error_dump_info *dump_info;
 550         struct iwl_fw_error_dump_mem *dump_mem;
 551         struct iwl_fw_error_dump_smem_cfg *dump_smem_cfg;
 552         struct iwl_fw_error_dump_trigger_desc *dump_trig;
 553         struct iwl_fw_dump_ptrs *fw_error_dump;
 554         struct scatterlist *sg_dump_data;
 555         u32 sram_len, sram_ofs;
 556         const struct iwl_fw_dbg_mem_seg_tlv *fw_dbg_mem = fwrt->fw->dbg_mem_tlv;
 557         struct iwl_fwrt_shared_mem_cfg *mem_cfg = &fwrt->smem_cfg;
 558         u32 file_len, fifo_data_len = 0, prph_len = 0, radio_len = 0;
 559         u32 smem_len = fwrt->fw->n_dbg_mem_tlv ? 0 : fwrt->trans->cfg->smem_len;
 560         u32 sram2_len = fwrt->fw->n_dbg_mem_tlv ?
 561                                 0 : fwrt->trans->cfg->dccm2_len;
 562         bool monitor_dump_only = false;
 563         int i;
 564
 565         /* there's no point in fw dump if the bus is dead */
 566         if (test_bit(STATUS_TRANS_DEAD, &fwrt->trans->status)) {
 567                 IWL_ERR(fwrt, "Skip fw error dump since bus is dead\n");
 568                 goto out;
 569         }
 570
 571         if (fwrt->dump.trig &&
 572             fwrt->dump.trig->mode & IWL_FW_DBG_TRIGGER_MONITOR_ONLY)
 573                 monitor_dump_only = true;
 574
 575         fw_error_dump = kzalloc(sizeof(*fw_error_dump), GFP_KERNEL);
 576         if (!fw_error_dump)
 577                 goto out;
 578
 579         /* SRAM - include stack CCM if driver knows the values for it */
 580         if (!fwrt->trans->cfg->dccm_offset || !fwrt->trans->cfg->dccm_len) {
 581                 const struct fw_img *img;
 582
 583                 img = &fwrt->fw->img[fwrt->cur_fw_img];
 584                 sram_ofs = img->sec[IWL_UCODE_SECTION_DATA].offset;
 585                 sram_len = img->sec[IWL_UCODE_SECTION_DATA].len;
 586         } else {
 587                 sram_ofs = fwrt->trans->cfg->dccm_offset;
 588                 sram_len = fwrt->trans->cfg->dccm_len;
 589         }
 590
 591         /* reading RXF/TXF sizes */
 592         if (test_bit(STATUS_FW_ERROR, &fwrt->trans->status)) {
 593                 fifo_data_len = 0;
 594
 595                 /* Count RXF2 size */
 596                 if (mem_cfg->rxfifo2_size) {
 597                         /* Add header info */
 598                         fifo_data_len += mem_cfg->rxfifo2_size +
 599                                          sizeof(*dump_data) +
 600                                          sizeof(struct iwl_fw_error_dump_fifo);
 601                 }
 602
 603                 /* Count RXF1 sizes */
 604                 for (i = 0; i < mem_cfg->num_lmacs; i++) {
 605                         if (!mem_cfg->lmac[i].rxfifo1_size)
 606                                 continue;
 607
 608                         /* Add header info */
 609                         fifo_data_len += mem_cfg->lmac[i].rxfifo1_size +
 610                                          sizeof(*dump_data) +
 611                                          sizeof(struct iwl_fw_error_dump_fifo);
 612                 }
 613
 614                 /* Count TXF sizes */
 615                 for (i = 0; i < mem_cfg->num_lmacs; i++) {
 616                         int j;
 617
 618                         for (j = 0; j < mem_cfg->num_txfifo_entries; j++) {
 619                                 if (!mem_cfg->lmac[i].txfifo_size[j])
 620                                         continue;
 621
 622                                 /* Add header info */
 623                                 fifo_data_len +=
 624                                         mem_cfg->lmac[i].txfifo_size[j] +
 625                                         sizeof(*dump_data) +
 626                                         sizeof(struct iwl_fw_error_dump_fifo);
 627                         }
 628                 }
 629
 630                 if (fw_has_capa(&fwrt->fw->ucode_capa,
 631                                 IWL_UCODE_TLV_CAPA_EXTEND_SHARED_MEM_CFG)) {
 632                         for (i = 0;
 633                              i < ARRAY_SIZE(mem_cfg->internal_txfifo_size);
 634                              i++) {
 635                                 if (!mem_cfg->internal_txfifo_size[i])
 636                                         continue;
 637
 638                                 /* Add header info */
 639                                 fifo_data_len +=
 640                                         mem_cfg->internal_txfifo_size[i] +
 641                                         sizeof(*dump_data) +
 642                                         sizeof(struct iwl_fw_error_dump_fifo);
 643                         }
 644                 }
 645
 646                 /* Make room for PRPH registers */
 647                 if (!fwrt->trans->cfg->gen2) {
 648                         for (i = 0; i < ARRAY_SIZE(iwl_prph_dump_addr_comm);
 649                              i++) {
 650                                 /* The range includes both boundaries */
 651                                 int num_bytes_in_chunk =
 652                                         iwl_prph_dump_addr_comm[i].end -
 653                                         iwl_prph_dump_addr_comm[i].start + 4;
 654
 655                                 prph_len += sizeof(*dump_data) +
 656                                         sizeof(struct iwl_fw_error_dump_prph) +
 657                                         num_bytes_in_chunk;
 658                         }
 659                 }
 660
 661                 if (!fwrt->trans->cfg->gen2 &&
 662                     fwrt->trans->cfg->mq_rx_supported) {
 663                         for (i = 0; i <
 664                                 ARRAY_SIZE(iwl_prph_dump_addr_9000); i++) {
 665                                 /* The range includes both boundaries */
 666                                 int num_bytes_in_chunk =
 667                                         iwl_prph_dump_addr_9000[i].end -
 668                                         iwl_prph_dump_addr_9000[i].start + 4;
 669
 670                                 prph_len += sizeof(*dump_data) +
 671                                         sizeof(struct iwl_fw_error_dump_prph) +
 672                                         num_bytes_in_chunk;
 673                         }
 674                 }
 675
 676                 if (fwrt->trans->cfg->device_family == IWL_DEVICE_FAMILY_7000)
 677                         radio_len = sizeof(*dump_data) + RADIO_REG_MAX_READ;
 678         }
 679
 680         file_len = sizeof(*dump_file) +
 681                    sizeof(*dump_data) * 3 +
 682                    sizeof(*dump_smem_cfg) +
 683                    fifo_data_len +
 684                    prph_len +
 685                    radio_len +
 686                    sizeof(*dump_info);
 687
 688         /* Make room for the SMEM, if it exists */
 689         if (smem_len)
 690                 file_len += sizeof(*dump_data) + sizeof(*dump_mem) + smem_len;
 691
 692         /* Make room for the secondary SRAM, if it exists */
 693         if (sram2_len)
 694                 file_len += sizeof(*dump_data) + sizeof(*dump_mem) + sram2_len;
 695
 696         /* Make room for MEM segments */
 697         for (i = 0; i < fwrt->fw->n_dbg_mem_tlv; i++) {
 698                 file_len += sizeof(*dump_data) + sizeof(*dump_mem) +
 699                             le32_to_cpu(fw_dbg_mem[i].len);
 700         }
 701
 702         /* Make room for fw's virtual image pages, if it exists */
 703         if (!fwrt->trans->cfg->gen2 &&
 704             fwrt->fw->img[fwrt->cur_fw_img].paging_mem_size &&
 705             fwrt->fw_paging_db[0].fw_paging_block)
 706                 file_len += fwrt->num_of_paging_blk *
 707                         (sizeof(*dump_data) +
 708                          sizeof(struct iwl_fw_error_dump_paging) +
 709                          PAGING_BLOCK_SIZE);
 710
 711         /* If we only want a monitor dump, reset the file length */
 712         if (monitor_dump_only) {
 713                 file_len = sizeof(*dump_file) + sizeof(*dump_data) * 2 +
 714                            sizeof(*dump_info) + sizeof(*dump_smem_cfg);
 715         }
 716
 717         if (fwrt->dump.desc)
 718                 file_len += sizeof(*dump_data) + sizeof(*dump_trig) +
 719                             fwrt->dump.desc->len;
 720
 721         if (!fwrt->fw->n_dbg_mem_tlv)
 722                 file_len += sram_len + sizeof(*dump_mem);
 723
 724         dump_file = vzalloc(file_len);
 725         if (!dump_file) {
 726                 kfree(fw_error_dump);
 727                 goto out;
 728         }
 729
 730         fw_error_dump->fwrt_ptr = dump_file;
 731
 732         dump_file->barker = cpu_to_le32(IWL_FW_ERROR_DUMP_BARKER);
 733         dump_data = (void *)dump_file->data;
 734
 735         dump_data->type = cpu_to_le32(IWL_FW_ERROR_DUMP_DEV_FW_INFO);
 736         dump_data->len = cpu_to_le32(sizeof(*dump_info));
 737         dump_info = (void *)dump_data->data;
 738         dump_info->device_family =
 739                 fwrt->trans->cfg->device_family == IWL_DEVICE_FAMILY_7000 ?
 740                         cpu_to_le32(IWL_FW_ERROR_DUMP_FAMILY_7) :
 741                         cpu_to_le32(IWL_FW_ERROR_DUMP_FAMILY_8);
 742         dump_info->hw_step = cpu_to_le32(CSR_HW_REV_STEP(fwrt->trans->hw_rev));
 743         memcpy(dump_info->fw_human_readable, fwrt->fw->human_readable,
 744                sizeof(dump_info->fw_human_readable));
 745         strncpy(dump_info->dev_human_readable, fwrt->trans->cfg->name,
 746                 sizeof(dump_info->dev_human_readable));
 747         strncpy(dump_info->bus_human_readable, fwrt->dev->bus->name,
 748                 sizeof(dump_info->bus_human_readable));
 749
 750         dump_data = iwl_fw_error_next_data(dump_data);
 751
 752         /* Dump shared memory configuration */
 753         dump_data->type = cpu_to_le32(IWL_FW_ERROR_DUMP_MEM_CFG);
 754         dump_data->len = cpu_to_le32(sizeof(*dump_smem_cfg));
 755         dump_smem_cfg = (void *)dump_data->data;
 756         dump_smem_cfg->num_lmacs = cpu_to_le32(mem_cfg->num_lmacs);
 757         dump_smem_cfg->num_txfifo_entries =
 758                 cpu_to_le32(mem_cfg->num_txfifo_entries);
 759         for (i = 0; i < MAX_NUM_LMAC; i++) {
 760                 int j;
 761
 762                 for (j = 0; j < TX_FIFO_MAX_NUM; j++)
 763                         dump_smem_cfg->lmac[i].txfifo_size[j] =
 764                                 cpu_to_le32(mem_cfg->lmac[i].txfifo_size[j]);
 765                 dump_smem_cfg->lmac[i].rxfifo1_size =
 766                         cpu_to_le32(mem_cfg->lmac[i].rxfifo1_size);
 767         }
 768         dump_smem_cfg->rxfifo2_size = cpu_to_le32(mem_cfg->rxfifo2_size);
 769         dump_smem_cfg->internal_txfifo_addr =
 770                 cpu_to_le32(mem_cfg->internal_txfifo_addr);
 771         for (i = 0; i < TX_FIFO_INTERNAL_MAX_NUM; i++) {
 772                 dump_smem_cfg->internal_txfifo_size[i] =
 773                         cpu_to_le32(mem_cfg->internal_txfifo_size[i]);
 774         }
 775
 776         dump_data = iwl_fw_error_next_data(dump_data);
 777
 778         /* We only dump the FIFOs if the FW is in error state */
 779         if (fifo_data_len) {
 780                 iwl_fw_dump_fifos(fwrt, &dump_data);
 781                 if (radio_len)
 782                         iwl_read_radio_regs(fwrt, &dump_data);
 783         }
 784
 785         if (fwrt->dump.desc) {
 786                 dump_data->type = cpu_to_le32(IWL_FW_ERROR_DUMP_ERROR_INFO);
 787                 dump_data->len = cpu_to_le32(sizeof(*dump_trig) +
 788                                              fwrt->dump.desc->len);
 789                 dump_trig = (void *)dump_data->data;
 790                 memcpy(dump_trig, &fwrt->dump.desc->trig_desc,
 791                        sizeof(*dump_trig) + fwrt->dump.desc->len);
 792
 793                 dump_data = iwl_fw_error_next_data(dump_data);
 794         }
 795
 796         /* In case we only want monitor dump, skip to dump trasport data */
 797         if (monitor_dump_only)
 798                 goto dump_trans_data;
 799
 800         if (!fwrt->fw->n_dbg_mem_tlv) {
 801                 dump_data->type = cpu_to_le32(IWL_FW_ERROR_DUMP_MEM);
 802                 dump_data->len = cpu_to_le32(sram_len + sizeof(*dump_mem));
 803                 dump_mem = (void *)dump_data->data;
 804                 dump_mem->type = cpu_to_le32(IWL_FW_ERROR_DUMP_MEM_SRAM);
 805                 dump_mem->offset = cpu_to_le32(sram_ofs);
 806                 iwl_trans_read_mem_bytes(fwrt->trans, sram_ofs, dump_mem->data,
 807                                          sram_len);
 808                 dump_data = iwl_fw_error_next_data(dump_data);
 809         }
 810
 811         for (i = 0; i < fwrt->fw->n_dbg_mem_tlv; i++) {
 812                 u32 len = le32_to_cpu(fw_dbg_mem[i].len);
 813                 u32 ofs = le32_to_cpu(fw_dbg_mem[i].ofs);
 814                 bool success;
 815
 816                 dump_data->type = cpu_to_le32(IWL_FW_ERROR_DUMP_MEM);
 817                 dump_data->len = cpu_to_le32(len + sizeof(*dump_mem));
 818                 dump_mem = (void *)dump_data->data;
 819                 dump_mem->type = fw_dbg_mem[i].data_type;
 820                 dump_mem->offset = cpu_to_le32(ofs);
 821
 822                 switch (dump_mem->type & cpu_to_le32(FW_DBG_MEM_TYPE_MASK)) {
 823                 case cpu_to_le32(FW_DBG_MEM_TYPE_REGULAR):
 824                         iwl_trans_read_mem_bytes(fwrt->trans, ofs,
 825                                                  dump_mem->data,
 826                                                  len);
 827                         success = true;
 828                         break;
 829                 case cpu_to_le32(FW_DBG_MEM_TYPE_PRPH):
 830                         success = iwl_read_prph_block(fwrt->trans, ofs, len,
 831                                                       (void *)dump_mem->data);
 832                         break;
 833                 default:
 834                         /*
 835                          * shouldn't get here, we ignored this kind
 836                          * of TLV earlier during the TLV parsing?!
 837                          */
 838                         WARN_ON(1);
 839                         success = false;
 840                 }
 841
 842                 if (success)
 843                         dump_data = iwl_fw_error_next_data(dump_data);
 844         }
 845
 846         if (smem_len) {
 847                 dump_data->type = cpu_to_le32(IWL_FW_ERROR_DUMP_MEM);
 848                 dump_data->len = cpu_to_le32(smem_len + sizeof(*dump_mem));
 849                 dump_mem = (void *)dump_data->data;
 850                 dump_mem->type = cpu_to_le32(IWL_FW_ERROR_DUMP_MEM_SMEM);
 851                 dump_mem->offset = cpu_to_le32(fwrt->trans->cfg->smem_offset);
 852                 iwl_trans_read_mem_bytes(fwrt->trans,
 853                                          fwrt->trans->cfg->smem_offset,
 854                                          dump_mem->data, smem_len);
 855                 dump_data = iwl_fw_error_next_data(dump_data);
 856         }
 857
 858         if (sram2_len) {
 859                 dump_data->type = cpu_to_le32(IWL_FW_ERROR_DUMP_MEM);
 860                 dump_data->len = cpu_to_le32(sram2_len + sizeof(*dump_mem));
 861                 dump_mem = (void *)dump_data->data;
 862                 dump_mem->type = cpu_to_le32(IWL_FW_ERROR_DUMP_MEM_SRAM);
 863                 dump_mem->offset = cpu_to_le32(fwrt->trans->cfg->dccm2_offset);
 864                 iwl_trans_read_mem_bytes(fwrt->trans,
 865                                          fwrt->trans->cfg->dccm2_offset,
 866                                          dump_mem->data, sram2_len);
 867                 dump_data = iwl_fw_error_next_data(dump_data);
 868         }
 869
 870         /* Dump fw's virtual image */
 871         if (!fwrt->trans->cfg->gen2 &&
 872             fwrt->fw->img[fwrt->cur_fw_img].paging_mem_size &&
 873             fwrt->fw_paging_db[0].fw_paging_block) {
 874                 for (i = 1; i < fwrt->num_of_paging_blk + 1; i++) {
 875                         struct iwl_fw_error_dump_paging *paging;
 876                         struct page *pages =
 877                                 fwrt->fw_paging_db[i].fw_paging_block;
 878                         dma_addr_t addr = fwrt->fw_paging_db[i].fw_paging_phys;
 879
 880                         dump_data->type = cpu_to_le32(IWL_FW_ERROR_DUMP_PAGING);
 881                         dump_data->len = cpu_to_le32(sizeof(*paging) +
 882                                                      PAGING_BLOCK_SIZE);
 883                         paging = (void *)dump_data->data;
 884                         paging->index = cpu_to_le32(i);
 885                         dma_sync_single_for_cpu(fwrt->trans->dev, addr,
 886                                                 PAGING_BLOCK_SIZE,
 887                                                 DMA_BIDIRECTIONAL);
 888                         memcpy(paging->data, page_address(pages),
 889                                PAGING_BLOCK_SIZE);
 890                         dump_data = iwl_fw_error_next_data(dump_data);
 891                 }
 892         }
 893
 894         if (prph_len) {
 895                 iwl_dump_prph(fwrt->trans, &dump_data,
 896                               iwl_prph_dump_addr_comm,
 897                               ARRAY_SIZE(iwl_prph_dump_addr_comm));
 898
 899                 if (fwrt->trans->cfg->mq_rx_supported)
 900                         iwl_dump_prph(fwrt->trans, &dump_data,
 901                                       iwl_prph_dump_addr_9000,
 902                                       ARRAY_SIZE(iwl_prph_dump_addr_9000));
 903         }
 904
 905 dump_trans_data:
 906         fw_error_dump->trans_ptr = iwl_trans_dump_data(fwrt->trans,
 907                                                        fwrt->dump.trig);
 908         fw_error_dump->fwrt_len = file_len;
 909         if (fw_error_dump->trans_ptr)
 910                 file_len += fw_error_dump->trans_ptr->len;
 911         dump_file->file_len = cpu_to_le32(file_len);
 912
 913         sg_dump_data = alloc_sgtable(file_len);
 914         if (sg_dump_data) {
 915                 sg_pcopy_from_buffer(sg_dump_data,
 916                                      sg_nents(sg_dump_data),
 917                                      fw_error_dump->fwrt_ptr,
 918                                      fw_error_dump->fwrt_len, 0);
 919                 if (fw_error_dump->trans_ptr)
 920                         sg_pcopy_from_buffer(sg_dump_data,
 921                                              sg_nents(sg_dump_data),
 922                                              fw_error_dump->trans_ptr->data,
 923                                              fw_error_dump->trans_ptr->len,
 924                                              fw_error_dump->fwrt_len);
 925                 dev_coredumpsg(fwrt->trans->dev, sg_dump_data, file_len,
 926                                GFP_KERNEL);
 927         }
 928         vfree(fw_error_dump->fwrt_ptr);
 929         vfree(fw_error_dump->trans_ptr);
 930         kfree(fw_error_dump);
 931
 932 out:
 933         iwl_fw_free_dump_desc(fwrt);
 934         clear_bit(IWL_FWRT_STATUS_DUMPING, &fwrt->status);
 935 }
 936 IWL_EXPORT_SYMBOL(iwl_fw_error_dump);
 937
 938 const struct iwl_fw_dump_desc iwl_dump_desc_assert = {
 939         .trig_desc = {
 940                 .type = cpu_to_le32(FW_DBG_TRIGGER_FW_ASSERT),
 941         },
 942 };
 943 IWL_EXPORT_SYMBOL(iwl_dump_desc_assert);
 944
 945 int iwl_fw_dbg_collect_desc(struct iwl_fw_runtime *fwrt,
 946                             const struct iwl_fw_dump_desc *desc,
 947                             const struct iwl_fw_dbg_trigger_tlv *trigger)
 948 {
 949         unsigned int delay = 0;
 950
 951         if (trigger)
 952                 delay = msecs_to_jiffies(le32_to_cpu(trigger->stop_delay));
 953
 954         /*
 955          * If the loading of the FW completed successfully, the next step is to
 956          * get the SMEM config data. Thus, if fwrt->smem_cfg.num_lmacs is non
 957          * zero, the FW was already loaded successully. If the state is "NO_FW"
 958          * in such a case - exit, since FW may be dead. Otherwise, we
 959          * can try to collect the data, since FW might just not be fully
 960          * loaded (no "ALIVE" yet), and the debug data is accessible.
 961          *
 962          * Corner case: got the FW alive but crashed before getting the SMEM
 963          *      config. In such a case, due to HW access problems, we might
 964          *      collect garbage.
 965          */
 966         if (fwrt->trans->state == IWL_TRANS_NO_FW &&
 967             fwrt->smem_cfg.num_lmacs)
 968                 return -EIO;
 969
 970         if (test_and_set_bit(IWL_FWRT_STATUS_DUMPING, &fwrt->status))
 971                 return -EBUSY;
 972
 973         if (WARN_ON(fwrt->dump.desc))
 974                 iwl_fw_free_dump_desc(fwrt);
 975
 976         IWL_WARN(fwrt, "Collecting data: trigger %d fired.\n",
 977                  le32_to_cpu(desc->trig_desc.type));
 978
 979         fwrt->dump.desc = desc;
 980         fwrt->dump.trig = trigger;
 981
 982         schedule_delayed_work(&fwrt->dump.wk, delay);
 983
 984         return 0;
 985 }
 986 IWL_EXPORT_SYMBOL(iwl_fw_dbg_collect_desc);
 987
 988 int iwl_fw_dbg_collect(struct iwl_fw_runtime *fwrt,
 989                        enum iwl_fw_dbg_trigger trig,
 990                        const char *str, size_t len,
 991                        const struct iwl_fw_dbg_trigger_tlv *trigger)
 992 {
 993         struct iwl_fw_dump_desc *desc;
 994
 995         desc = kzalloc(sizeof(*desc) + len, GFP_ATOMIC);
 996         if (!desc)
 997                 return -ENOMEM;
 998
 999         desc->len = len;
1000         desc->trig_desc.type = cpu_to_le32(trig);
1001         memcpy(desc->trig_desc.data, str, len);
1002
1003         return iwl_fw_dbg_collect_desc(fwrt, desc, trigger);
1004 }
1005 IWL_EXPORT_SYMBOL(iwl_fw_dbg_collect);
1006
1007 int iwl_fw_dbg_collect_trig(struct iwl_fw_runtime *fwrt,
1008                             struct iwl_fw_dbg_trigger_tlv *trigger,
1009                             const char *fmt, ...)
1010 {
1011         u16 occurrences = le16_to_cpu(trigger->occurrences);
1012         int ret, len = 0;
1013         char buf[64];
1014
1015         if (!occurrences)
1016                 return 0;
1017
1018         if (fmt) {
1019                 va_list ap;
1020
1021                 buf[sizeof(buf) - 1] = '\0';
1022
1023                 va_start(ap, fmt);
1024                 vsnprintf(buf, sizeof(buf), fmt, ap);
1025                 va_end(ap);
1026
1027                 /* check for truncation */
1028                 if (WARN_ON_ONCE(buf[sizeof(buf) - 1]))
1029                         buf[sizeof(buf) - 1] = '\0';
1030
1031                 len = strlen(buf) + 1;
1032         }
1033
1034         ret = iwl_fw_dbg_collect(fwrt, le32_to_cpu(trigger->id), buf, len,
1035                                  trigger);
1036
1037         if (ret)
1038                 return ret;
1039
1040         trigger->occurrences = cpu_to_le16(occurrences - 1);
1041         return 0;
1042 }
1043 IWL_EXPORT_SYMBOL(iwl_fw_dbg_collect_trig);
1044
1045 int iwl_fw_start_dbg_conf(struct iwl_fw_runtime *fwrt, u8 conf_id)
1046 {
1047         u8 *ptr;
1048         int ret;
1049         int i;
1050
1051         if (WARN_ONCE(conf_id >= ARRAY_SIZE(fwrt->fw->dbg_conf_tlv),
1052                       "Invalid configuration %d\n", conf_id))
1053                 return -EINVAL;
1054
1055         /* EARLY START - firmware's configuration is hard coded */
1056         if ((!fwrt->fw->dbg_conf_tlv[conf_id] ||
1057              !fwrt->fw->dbg_conf_tlv[conf_id]->num_of_hcmds) &&
1058             conf_id == FW_DBG_START_FROM_ALIVE)
1059                 return 0;
1060
1061         if (!fwrt->fw->dbg_conf_tlv[conf_id])
1062                 return -EINVAL;
1063
1064         if (fwrt->dump.conf != FW_DBG_INVALID)
1065                 IWL_WARN(fwrt, "FW already configured (%d) - re-configuring\n",
1066                          fwrt->dump.conf);
1067
1068         /* Send all HCMDs for configuring the FW debug */
1069         ptr = (void *)&fwrt->fw->dbg_conf_tlv[conf_id]->hcmd;
1070         for (i = 0; i < fwrt->fw->dbg_conf_tlv[conf_id]->num_of_hcmds; i++) {
1071                 struct iwl_fw_dbg_conf_hcmd *cmd = (void *)ptr;
1072                 struct iwl_host_cmd hcmd = {
1073                         .id = cmd->id,
1074                         .len = { le16_to_cpu(cmd->len), },
1075                         .data = { cmd->data, },
1076                 };
1077
1078                 ret = iwl_trans_send_cmd(fwrt->trans, &hcmd);
1079                 if (ret)
1080                         return ret;
1081
1082                 ptr += sizeof(*cmd);
1083                 ptr += le16_to_cpu(cmd->len);
1084         }
1085
1086         fwrt->dump.conf = conf_id;
1087
1088         return 0;
1089 }
1090 IWL_EXPORT_SYMBOL(iwl_fw_start_dbg_conf);
1091
1092 void iwl_fw_error_dump_wk(struct work_struct *work)
1093 {
1094         struct iwl_fw_runtime *fwrt =
1095                 container_of(work, struct iwl_fw_runtime, dump.wk.work);
1096
1097         if (fwrt->ops && fwrt->ops->dump_start &&
1098             fwrt->ops->dump_start(fwrt->ops_ctx))
1099                 return;
1100
1101         if (fwrt->ops && fwrt->ops->fw_running &&
1102             !fwrt->ops->fw_running(fwrt->ops_ctx)) {
1103                 IWL_ERR(fwrt, "Firmware not running - cannot dump error\n");
1104                 iwl_fw_free_dump_desc(fwrt);
1105                 clear_bit(IWL_FWRT_STATUS_DUMPING, &fwrt->status);
1106                 goto out;
1107         }
1108
1109         if (fwrt->trans->cfg->device_family == IWL_DEVICE_FAMILY_7000) {
1110                 /* stop recording */
1111                 iwl_fw_dbg_stop_recording(fwrt);
1112
1113                 iwl_fw_error_dump(fwrt);
1114
1115                 /* start recording again if the firmware is not crashed */
1116                 if (!test_bit(STATUS_FW_ERROR, &fwrt->trans->status) &&
1117                     fwrt->fw->dbg_dest_tlv) {
1118                         iwl_clear_bits_prph(fwrt->trans,
1119                                             MON_BUFF_SAMPLE_CTL, 0x100);
1120                         iwl_clear_bits_prph(fwrt->trans,
1121                                             MON_BUFF_SAMPLE_CTL, 0x1);
1122                         iwl_set_bits_prph(fwrt->trans,
1123                                           MON_BUFF_SAMPLE_CTL, 0x1);
1124                 }
1125         } else {
1126                 u32 in_sample = iwl_read_prph(fwrt->trans, DBGC_IN_SAMPLE);
1127                 u32 out_ctrl = iwl_read_prph(fwrt->trans, DBGC_OUT_CTRL);
1128
1129                 iwl_fw_dbg_stop_recording(fwrt);
1130                 /* wait before we collect the data till the DBGC stop */
1131                 udelay(500);
1132
1133                 iwl_fw_error_dump(fwrt);
1134
1135                 /* start recording again if the firmware is not crashed */
1136                 if (!test_bit(STATUS_FW_ERROR, &fwrt->trans->status) &&
1137                     fwrt->fw->dbg_dest_tlv) {
1138                         iwl_write_prph(fwrt->trans, DBGC_IN_SAMPLE, in_sample);
1139                         iwl_write_prph(fwrt->trans, DBGC_OUT_CTRL, out_ctrl);
1140                 }
1141         }
1142 out:
1143         if (fwrt->ops && fwrt->ops->dump_end)
1144                 fwrt->ops->dump_end(fwrt->ops_ctx);
1145 }
1146