1 /******************************************************************************
3 * Copyright(c) 2003 - 2011 Intel Corporation. All rights reserved.
5 * Portions of this file are derived from the ipw3945 project, as well
6 * as portions of the ieee80211 subsystem header files.
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of version 2 of the GNU General Public License as
10 * published by the Free Software Foundation.
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
21 * The full GNU General Public License is included in this distribution in the
22 * file called LICENSE.
24 * Contact Information:
25 * Intel Linux Wireless <ilw@linux.intel.com>
26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
28 *****************************************************************************/
30 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
32 #include <linux/kernel.h>
33 #include <linux/module.h>
34 #include <linux/init.h>
35 #include <linux/pci.h>
36 #include <linux/pci-aspm.h>
37 #include <linux/slab.h>
38 #include <linux/dma-mapping.h>
39 #include <linux/delay.h>
40 #include <linux/sched.h>
41 #include <linux/skbuff.h>
42 #include <linux/netdevice.h>
43 #include <linux/firmware.h>
44 #include <linux/etherdevice.h>
45 #include <linux/if_arp.h>
47 #include <net/ieee80211_radiotap.h>
48 #include <net/mac80211.h>
50 #include <asm/div64.h>
52 #define DRV_NAME "iwl3945"
57 #include "iwl-spectrum.h"
60 * module name, copyright, version, etc.
63 #define DRV_DESCRIPTION \
64 "Intel(R) PRO/Wireless 3945ABG/BG Network Connection driver for Linux"
66 #ifdef CONFIG_IWLEGACY_DEBUG
73 * add "s" to indicate spectrum measurement included.
74 * we add it here to be consistent with previous releases in which
75 * this was configurable.
77 #define DRV_VERSION IWLWIFI_VERSION VD "s"
78 #define DRV_COPYRIGHT "Copyright(c) 2003-2011 Intel Corporation"
79 #define DRV_AUTHOR "<ilw@linux.intel.com>"
81 MODULE_DESCRIPTION(DRV_DESCRIPTION);
82 MODULE_VERSION(DRV_VERSION);
83 MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
84 MODULE_LICENSE("GPL");
86 /* module parameters */
87 struct il_mod_params il3945_mod_params = {
91 /* the rest are 0 by default */
95 * il3945_get_antenna_flags - Get antenna flags for RXON command
96 * @il: eeprom and antenna fields are used to determine antenna flags
98 * il->eeprom39 is used to determine if antenna AUX/MAIN are reversed
99 * il3945_mod_params.antenna specifies the antenna diversity mode:
101 * IL_ANTENNA_DIVERSITY - NIC selects best antenna by itself
102 * IL_ANTENNA_MAIN - Force MAIN antenna
103 * IL_ANTENNA_AUX - Force AUX antenna
106 il3945_get_antenna_flags(const struct il_priv *il)
108 struct il3945_eeprom *eeprom = (struct il3945_eeprom *)il->eeprom;
110 switch (il3945_mod_params.antenna) {
111 case IL_ANTENNA_DIVERSITY:
114 case IL_ANTENNA_MAIN:
115 if (eeprom->antenna_switch_type)
116 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
117 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
120 if (eeprom->antenna_switch_type)
121 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
122 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
125 /* bad antenna selector value */
126 IL_ERR("Bad antenna selector value (0x%x)\n",
127 il3945_mod_params.antenna);
129 return 0; /* "diversity" is default if error */
133 il3945_set_ccmp_dynamic_key_info(struct il_priv *il,
134 struct ieee80211_key_conf *keyconf, u8 sta_id)
137 __le16 key_flags = 0;
140 key_flags |= (STA_KEY_FLG_CCMP | STA_KEY_FLG_MAP_KEY_MSK);
141 key_flags |= cpu_to_le16(keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
143 if (sta_id == il->hw_params.bcast_id)
144 key_flags |= STA_KEY_MULTICAST_MSK;
146 keyconf->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
147 keyconf->hw_key_idx = keyconf->keyidx;
148 key_flags &= ~STA_KEY_FLG_INVALID;
150 spin_lock_irqsave(&il->sta_lock, flags);
151 il->stations[sta_id].keyinfo.cipher = keyconf->cipher;
152 il->stations[sta_id].keyinfo.keylen = keyconf->keylen;
153 memcpy(il->stations[sta_id].keyinfo.key, keyconf->key, keyconf->keylen);
155 memcpy(il->stations[sta_id].sta.key.key, keyconf->key, keyconf->keylen);
157 if ((il->stations[sta_id].sta.key.
158 key_flags & STA_KEY_FLG_ENCRYPT_MSK) == STA_KEY_FLG_NO_ENC)
159 il->stations[sta_id].sta.key.key_offset =
160 il_get_free_ucode_key_idx(il);
161 /* else, we are overriding an existing key => no need to allocated room
164 WARN(il->stations[sta_id].sta.key.key_offset == WEP_INVALID_OFFSET,
165 "no space for a new key");
167 il->stations[sta_id].sta.key.key_flags = key_flags;
168 il->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
169 il->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
171 D_INFO("hwcrypto: modify ucode station key info\n");
173 ret = il_send_add_sta(il, &il->stations[sta_id].sta, CMD_ASYNC);
175 spin_unlock_irqrestore(&il->sta_lock, flags);
181 il3945_set_tkip_dynamic_key_info(struct il_priv *il,
182 struct ieee80211_key_conf *keyconf, u8 sta_id)
188 il3945_set_wep_dynamic_key_info(struct il_priv *il,
189 struct ieee80211_key_conf *keyconf, u8 sta_id)
195 il3945_clear_sta_key_info(struct il_priv *il, u8 sta_id)
198 struct il_addsta_cmd sta_cmd;
200 spin_lock_irqsave(&il->sta_lock, flags);
201 memset(&il->stations[sta_id].keyinfo, 0, sizeof(struct il_hw_key));
202 memset(&il->stations[sta_id].sta.key, 0, sizeof(struct il4965_keyinfo));
203 il->stations[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC;
204 il->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
205 il->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
206 memcpy(&sta_cmd, &il->stations[sta_id].sta,
207 sizeof(struct il_addsta_cmd));
208 spin_unlock_irqrestore(&il->sta_lock, flags);
210 D_INFO("hwcrypto: clear ucode station key info\n");
211 return il_send_add_sta(il, &sta_cmd, CMD_SYNC);
215 il3945_set_dynamic_key(struct il_priv *il, struct ieee80211_key_conf *keyconf,
220 keyconf->hw_key_idx = HW_KEY_DYNAMIC;
222 switch (keyconf->cipher) {
223 case WLAN_CIPHER_SUITE_CCMP:
224 ret = il3945_set_ccmp_dynamic_key_info(il, keyconf, sta_id);
226 case WLAN_CIPHER_SUITE_TKIP:
227 ret = il3945_set_tkip_dynamic_key_info(il, keyconf, sta_id);
229 case WLAN_CIPHER_SUITE_WEP40:
230 case WLAN_CIPHER_SUITE_WEP104:
231 ret = il3945_set_wep_dynamic_key_info(il, keyconf, sta_id);
234 IL_ERR("Unknown alg: %s alg=%x\n", __func__, keyconf->cipher);
238 D_WEP("Set dynamic key: alg=%x len=%d idx=%d sta=%d ret=%d\n",
239 keyconf->cipher, keyconf->keylen, keyconf->keyidx, sta_id, ret);
245 il3945_remove_static_key(struct il_priv *il)
247 int ret = -EOPNOTSUPP;
253 il3945_set_static_key(struct il_priv *il, struct ieee80211_key_conf *key)
255 if (key->cipher == WLAN_CIPHER_SUITE_WEP40 ||
256 key->cipher == WLAN_CIPHER_SUITE_WEP104)
259 IL_ERR("Static key invalid: cipher %x\n", key->cipher);
264 il3945_clear_free_frames(struct il_priv *il)
266 struct list_head *element;
268 D_INFO("%d frames on pre-allocated heap on clear.\n", il->frames_count);
270 while (!list_empty(&il->free_frames)) {
271 element = il->free_frames.next;
273 kfree(list_entry(element, struct il3945_frame, list));
277 if (il->frames_count) {
278 IL_WARN("%d frames still in use. Did we lose one?\n",
280 il->frames_count = 0;
284 static struct il3945_frame *
285 il3945_get_free_frame(struct il_priv *il)
287 struct il3945_frame *frame;
288 struct list_head *element;
289 if (list_empty(&il->free_frames)) {
290 frame = kzalloc(sizeof(*frame), GFP_KERNEL);
292 IL_ERR("Could not allocate frame!\n");
300 element = il->free_frames.next;
302 return list_entry(element, struct il3945_frame, list);
306 il3945_free_frame(struct il_priv *il, struct il3945_frame *frame)
308 memset(frame, 0, sizeof(*frame));
309 list_add(&frame->list, &il->free_frames);
313 il3945_fill_beacon_frame(struct il_priv *il, struct ieee80211_hdr *hdr,
317 if (!il_is_associated(il) || !il->beacon_skb)
320 if (il->beacon_skb->len > left)
323 memcpy(hdr, il->beacon_skb->data, il->beacon_skb->len);
325 return il->beacon_skb->len;
329 il3945_send_beacon_cmd(struct il_priv *il)
331 struct il3945_frame *frame;
332 unsigned int frame_size;
336 frame = il3945_get_free_frame(il);
339 IL_ERR("Could not obtain free frame buffer for beacon "
344 rate = il_get_lowest_plcp(il);
346 frame_size = il3945_hw_get_beacon_cmd(il, frame, rate);
348 rc = il_send_cmd_pdu(il, C_TX_BEACON, frame_size, &frame->u.cmd[0]);
350 il3945_free_frame(il, frame);
356 il3945_unset_hw_params(struct il_priv *il)
358 if (il->_3945.shared_virt)
359 dma_free_coherent(&il->pci_dev->dev,
360 sizeof(struct il3945_shared),
361 il->_3945.shared_virt, il->_3945.shared_phys);
365 il3945_build_tx_cmd_hwcrypto(struct il_priv *il, struct ieee80211_tx_info *info,
366 struct il_device_cmd *cmd,
367 struct sk_buff *skb_frag, int sta_id)
369 struct il3945_tx_cmd *tx_cmd = (struct il3945_tx_cmd *)cmd->cmd.payload;
370 struct il_hw_key *keyinfo = &il->stations[sta_id].keyinfo;
374 switch (keyinfo->cipher) {
375 case WLAN_CIPHER_SUITE_CCMP:
376 tx_cmd->sec_ctl = TX_CMD_SEC_CCM;
377 memcpy(tx_cmd->key, keyinfo->key, keyinfo->keylen);
378 D_TX("tx_cmd with AES hwcrypto\n");
381 case WLAN_CIPHER_SUITE_TKIP:
384 case WLAN_CIPHER_SUITE_WEP104:
385 tx_cmd->sec_ctl |= TX_CMD_SEC_KEY128;
387 case WLAN_CIPHER_SUITE_WEP40:
389 TX_CMD_SEC_WEP | (info->control.hw_key->
390 hw_key_idx & TX_CMD_SEC_MSK) <<
393 memcpy(&tx_cmd->key[3], keyinfo->key, keyinfo->keylen);
395 D_TX("Configuring packet for WEP encryption " "with key %d\n",
396 info->control.hw_key->hw_key_idx);
400 IL_ERR("Unknown encode cipher %x\n", keyinfo->cipher);
406 * handle build C_TX command notification.
409 il3945_build_tx_cmd_basic(struct il_priv *il, struct il_device_cmd *cmd,
410 struct ieee80211_tx_info *info,
411 struct ieee80211_hdr *hdr, u8 std_id)
413 struct il3945_tx_cmd *tx_cmd = (struct il3945_tx_cmd *)cmd->cmd.payload;
414 __le32 tx_flags = tx_cmd->tx_flags;
415 __le16 fc = hdr->frame_control;
417 tx_cmd->stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
418 if (!(info->flags & IEEE80211_TX_CTL_NO_ACK)) {
419 tx_flags |= TX_CMD_FLG_ACK_MSK;
420 if (ieee80211_is_mgmt(fc))
421 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
422 if (ieee80211_is_probe_resp(fc) &&
423 !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
424 tx_flags |= TX_CMD_FLG_TSF_MSK;
426 tx_flags &= (~TX_CMD_FLG_ACK_MSK);
427 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
430 tx_cmd->sta_id = std_id;
431 if (ieee80211_has_morefrags(fc))
432 tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;
434 if (ieee80211_is_data_qos(fc)) {
435 u8 *qc = ieee80211_get_qos_ctl(hdr);
436 tx_cmd->tid_tspec = qc[0] & 0xf;
437 tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
439 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
442 il_tx_cmd_protection(il, info, fc, &tx_flags);
444 tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
445 if (ieee80211_is_mgmt(fc)) {
446 if (ieee80211_is_assoc_req(fc) || ieee80211_is_reassoc_req(fc))
447 tx_cmd->timeout.pm_frame_timeout = cpu_to_le16(3);
449 tx_cmd->timeout.pm_frame_timeout = cpu_to_le16(2);
451 tx_cmd->timeout.pm_frame_timeout = 0;
454 tx_cmd->driver_txop = 0;
455 tx_cmd->tx_flags = tx_flags;
456 tx_cmd->next_frame_len = 0;
460 * start C_TX command process
463 il3945_tx_skb(struct il_priv *il,
464 struct ieee80211_sta *sta,
467 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
468 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
469 struct il3945_tx_cmd *tx_cmd;
470 struct il_tx_queue *txq = NULL;
471 struct il_queue *q = NULL;
472 struct il_device_cmd *out_cmd;
473 struct il_cmd_meta *out_meta;
474 dma_addr_t phys_addr;
475 dma_addr_t txcmd_phys;
476 int txq_id = skb_get_queue_mapping(skb);
477 u16 len, idx, hdr_len;
478 u16 firstlen, secondlen;
484 u8 wait_write_ptr = 0;
487 spin_lock_irqsave(&il->lock, flags);
488 if (il_is_rfkill(il)) {
489 D_DROP("Dropping - RF KILL\n");
493 if ((ieee80211_get_tx_rate(il->hw, info)->hw_value & 0xFF) ==
495 IL_ERR("ERROR: No TX rate available.\n");
499 unicast = !is_multicast_ether_addr(hdr->addr1);
502 fc = hdr->frame_control;
504 #ifdef CONFIG_IWLEGACY_DEBUG
505 if (ieee80211_is_auth(fc))
506 D_TX("Sending AUTH frame\n");
507 else if (ieee80211_is_assoc_req(fc))
508 D_TX("Sending ASSOC frame\n");
509 else if (ieee80211_is_reassoc_req(fc))
510 D_TX("Sending REASSOC frame\n");
513 spin_unlock_irqrestore(&il->lock, flags);
515 hdr_len = ieee80211_hdrlen(fc);
517 /* Find idx into station table for destination station */
518 sta_id = il_sta_id_or_broadcast(il, sta);
519 if (sta_id == IL_INVALID_STATION) {
520 D_DROP("Dropping - INVALID STATION: %pM\n", hdr->addr1);
524 D_RATE("station Id %d\n", sta_id);
526 if (ieee80211_is_data_qos(fc)) {
527 u8 *qc = ieee80211_get_qos_ctl(hdr);
528 tid = qc[0] & IEEE80211_QOS_CTL_TID_MASK;
529 if (unlikely(tid >= MAX_TID_COUNT))
533 /* Descriptor for chosen Tx queue */
534 txq = &il->txq[txq_id];
537 if ((il_queue_space(q) < q->high_mark))
540 spin_lock_irqsave(&il->lock, flags);
542 idx = il_get_cmd_idx(q, q->write_ptr, 0);
544 txq->skbs[q->write_ptr] = skb;
546 /* Init first empty entry in queue's array of Tx/cmd buffers */
547 out_cmd = txq->cmd[idx];
548 out_meta = &txq->meta[idx];
549 tx_cmd = (struct il3945_tx_cmd *)out_cmd->cmd.payload;
550 memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
551 memset(tx_cmd, 0, sizeof(*tx_cmd));
554 * Set up the Tx-command (not MAC!) header.
555 * Store the chosen Tx queue and TFD idx within the sequence field;
556 * after Tx, uCode's Tx response will return this value so driver can
557 * locate the frame within the tx queue and do post-tx processing.
559 out_cmd->hdr.cmd = C_TX;
560 out_cmd->hdr.sequence =
562 (QUEUE_TO_SEQ(txq_id) | IDX_TO_SEQ(q->write_ptr)));
564 /* Copy MAC header from skb into command buffer */
565 memcpy(tx_cmd->hdr, hdr, hdr_len);
567 if (info->control.hw_key)
568 il3945_build_tx_cmd_hwcrypto(il, info, out_cmd, skb, sta_id);
570 /* TODO need this for burst mode later on */
571 il3945_build_tx_cmd_basic(il, out_cmd, info, hdr, sta_id);
573 il3945_hw_build_tx_cmd_rate(il, out_cmd, info, hdr, sta_id);
575 /* Total # bytes to be transmitted */
576 tx_cmd->len = cpu_to_le16((u16) skb->len);
578 tx_cmd->tx_flags &= ~TX_CMD_FLG_ANT_A_MSK;
579 tx_cmd->tx_flags &= ~TX_CMD_FLG_ANT_B_MSK;
582 * Use the first empty entry in this queue's command buffer array
583 * to contain the Tx command and MAC header concatenated together
584 * (payload data will be in another buffer).
585 * Size of this varies, due to varying MAC header length.
586 * If end is not dword aligned, we'll have 2 extra bytes at the end
587 * of the MAC header (device reads on dword boundaries).
588 * We'll tell device about this padding later.
591 sizeof(struct il3945_tx_cmd) + sizeof(struct il_cmd_header) +
593 firstlen = (len + 3) & ~3;
595 /* Physical address of this Tx command's header (not MAC header!),
596 * within command buffer array. */
598 pci_map_single(il->pci_dev, &out_cmd->hdr, firstlen,
600 if (unlikely(pci_dma_mapping_error(il->pci_dev, txcmd_phys)))
603 /* Set up TFD's 2nd entry to point directly to remainder of skb,
604 * if any (802.11 null frames have no payload). */
605 secondlen = skb->len - hdr_len;
608 pci_map_single(il->pci_dev, skb->data + hdr_len, secondlen,
610 if (unlikely(pci_dma_mapping_error(il->pci_dev, phys_addr)))
614 /* Add buffer containing Tx command and MAC(!) header to TFD's
616 il->ops->txq_attach_buf_to_tfd(il, txq, txcmd_phys, firstlen, 1, 0);
617 dma_unmap_addr_set(out_meta, mapping, txcmd_phys);
618 dma_unmap_len_set(out_meta, len, firstlen);
620 il->ops->txq_attach_buf_to_tfd(il, txq, phys_addr, secondlen, 0,
623 if (!ieee80211_has_morefrags(hdr->frame_control)) {
624 txq->need_update = 1;
627 txq->need_update = 0;
630 il_update_stats(il, true, fc, skb->len);
632 D_TX("sequence nr = 0X%x\n", le16_to_cpu(out_cmd->hdr.sequence));
633 D_TX("tx_flags = 0X%x\n", le32_to_cpu(tx_cmd->tx_flags));
634 il_print_hex_dump(il, IL_DL_TX, tx_cmd, sizeof(*tx_cmd));
635 il_print_hex_dump(il, IL_DL_TX, (u8 *) tx_cmd->hdr,
636 ieee80211_hdrlen(fc));
638 /* Tell device the write idx *just past* this latest filled TFD */
639 q->write_ptr = il_queue_inc_wrap(q->write_ptr, q->n_bd);
640 il_txq_update_write_ptr(il, txq);
641 spin_unlock_irqrestore(&il->lock, flags);
643 if (il_queue_space(q) < q->high_mark && il->mac80211_registered) {
644 if (wait_write_ptr) {
645 spin_lock_irqsave(&il->lock, flags);
646 txq->need_update = 1;
647 il_txq_update_write_ptr(il, txq);
648 spin_unlock_irqrestore(&il->lock, flags);
651 il_stop_queue(il, txq);
657 spin_unlock_irqrestore(&il->lock, flags);
663 il3945_get_measurement(struct il_priv *il,
664 struct ieee80211_measurement_params *params, u8 type)
666 struct il_spectrum_cmd spectrum;
667 struct il_rx_pkt *pkt;
668 struct il_host_cmd cmd = {
669 .id = C_SPECTRUM_MEASUREMENT,
670 .data = (void *)&spectrum,
671 .flags = CMD_WANT_SKB,
673 u32 add_time = le64_to_cpu(params->start_time);
675 int spectrum_resp_status;
676 int duration = le16_to_cpu(params->duration);
678 if (il_is_associated(il))
680 il_usecs_to_beacons(il,
681 le64_to_cpu(params->start_time) -
683 le16_to_cpu(il->timing.beacon_interval));
685 memset(&spectrum, 0, sizeof(spectrum));
687 spectrum.channel_count = cpu_to_le16(1);
689 RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
690 spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
691 cmd.len = sizeof(spectrum);
692 spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
694 if (il_is_associated(il))
695 spectrum.start_time =
696 il_add_beacon_time(il, il->_3945.last_beacon_time, add_time,
697 le16_to_cpu(il->timing.beacon_interval));
699 spectrum.start_time = 0;
701 spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
702 spectrum.channels[0].channel = params->channel;
703 spectrum.channels[0].type = type;
704 if (il->active.flags & RXON_FLG_BAND_24G_MSK)
706 RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK |
707 RXON_FLG_TGG_PROTECT_MSK;
709 rc = il_send_cmd_sync(il, &cmd);
713 pkt = (struct il_rx_pkt *)cmd.reply_page;
714 if (pkt->hdr.flags & IL_CMD_FAILED_MSK) {
715 IL_ERR("Bad return from N_RX_ON_ASSOC command\n");
719 spectrum_resp_status = le16_to_cpu(pkt->u.spectrum.status);
720 switch (spectrum_resp_status) {
721 case 0: /* Command will be handled */
722 if (pkt->u.spectrum.id != 0xff) {
723 D_INFO("Replaced existing measurement: %d\n",
725 il->measurement_status &= ~MEASUREMENT_READY;
727 il->measurement_status |= MEASUREMENT_ACTIVE;
731 case 1: /* Command will not be handled */
736 il_free_pages(il, cmd.reply_page);
742 il3945_hdl_alive(struct il_priv *il, struct il_rx_buf *rxb)
744 struct il_rx_pkt *pkt = rxb_addr(rxb);
745 struct il_alive_resp *palive;
746 struct delayed_work *pwork;
748 palive = &pkt->u.alive_frame;
750 D_INFO("Alive ucode status 0x%08X revision " "0x%01X 0x%01X\n",
751 palive->is_valid, palive->ver_type, palive->ver_subtype);
753 if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
754 D_INFO("Initialization Alive received.\n");
755 memcpy(&il->card_alive_init, &pkt->u.alive_frame,
756 sizeof(struct il_alive_resp));
757 pwork = &il->init_alive_start;
759 D_INFO("Runtime Alive received.\n");
760 memcpy(&il->card_alive, &pkt->u.alive_frame,
761 sizeof(struct il_alive_resp));
762 pwork = &il->alive_start;
763 il3945_disable_events(il);
766 /* We delay the ALIVE response by 5ms to
767 * give the HW RF Kill time to activate... */
768 if (palive->is_valid == UCODE_VALID_OK)
769 queue_delayed_work(il->workqueue, pwork, msecs_to_jiffies(5));
771 IL_WARN("uCode did not respond OK.\n");
775 il3945_hdl_add_sta(struct il_priv *il, struct il_rx_buf *rxb)
777 #ifdef CONFIG_IWLEGACY_DEBUG
778 struct il_rx_pkt *pkt = rxb_addr(rxb);
781 D_RX("Received C_ADD_STA: 0x%02X\n", pkt->u.status);
785 il3945_hdl_beacon(struct il_priv *il, struct il_rx_buf *rxb)
787 struct il_rx_pkt *pkt = rxb_addr(rxb);
788 struct il3945_beacon_notif *beacon = &(pkt->u.beacon_status);
789 #ifdef CONFIG_IWLEGACY_DEBUG
790 u8 rate = beacon->beacon_notify_hdr.rate;
792 D_RX("beacon status %x retries %d iss %d " "tsf %d %d rate %d\n",
793 le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK,
794 beacon->beacon_notify_hdr.failure_frame,
795 le32_to_cpu(beacon->ibss_mgr_status),
796 le32_to_cpu(beacon->high_tsf), le32_to_cpu(beacon->low_tsf), rate);
799 il->ibss_manager = le32_to_cpu(beacon->ibss_mgr_status);
803 /* Handle notification from uCode that card's power state is changing
804 * due to software, hardware, or critical temperature RFKILL */
806 il3945_hdl_card_state(struct il_priv *il, struct il_rx_buf *rxb)
808 struct il_rx_pkt *pkt = rxb_addr(rxb);
809 u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
810 unsigned long status = il->status;
812 IL_WARN("Card state received: HW:%s SW:%s\n",
813 (flags & HW_CARD_DISABLED) ? "Kill" : "On",
814 (flags & SW_CARD_DISABLED) ? "Kill" : "On");
816 _il_wr(il, CSR_UCODE_DRV_GP1_SET, CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
818 if (flags & HW_CARD_DISABLED)
819 set_bit(S_RFKILL, &il->status);
821 clear_bit(S_RFKILL, &il->status);
825 if ((test_bit(S_RFKILL, &status) !=
826 test_bit(S_RFKILL, &il->status)))
827 wiphy_rfkill_set_hw_state(il->hw->wiphy,
828 test_bit(S_RFKILL, &il->status));
830 wake_up(&il->wait_command_queue);
834 * il3945_setup_handlers - Initialize Rx handler callbacks
836 * Setup the RX handlers for each of the reply types sent from the uCode
839 * This function chains into the hardware specific files for them to setup
840 * any hardware specific handlers as well.
843 il3945_setup_handlers(struct il_priv *il)
845 il->handlers[N_ALIVE] = il3945_hdl_alive;
846 il->handlers[C_ADD_STA] = il3945_hdl_add_sta;
847 il->handlers[N_ERROR] = il_hdl_error;
848 il->handlers[N_CHANNEL_SWITCH] = il_hdl_csa;
849 il->handlers[N_SPECTRUM_MEASUREMENT] = il_hdl_spectrum_measurement;
850 il->handlers[N_PM_SLEEP] = il_hdl_pm_sleep;
851 il->handlers[N_PM_DEBUG_STATS] = il_hdl_pm_debug_stats;
852 il->handlers[N_BEACON] = il3945_hdl_beacon;
855 * The same handler is used for both the REPLY to a discrete
856 * stats request from the host as well as for the periodic
857 * stats notifications (after received beacons) from the uCode.
859 il->handlers[C_STATS] = il3945_hdl_c_stats;
860 il->handlers[N_STATS] = il3945_hdl_stats;
862 il_setup_rx_scan_handlers(il);
863 il->handlers[N_CARD_STATE] = il3945_hdl_card_state;
865 /* Set up hardware specific Rx handlers */
866 il3945_hw_handler_setup(il);
869 /************************** RX-FUNCTIONS ****************************/
871 * Rx theory of operation
873 * The host allocates 32 DMA target addresses and passes the host address
874 * to the firmware at register IL_RFDS_TBL_LOWER + N * RFD_SIZE where N is
878 * The host/firmware share two idx registers for managing the Rx buffers.
880 * The READ idx maps to the first position that the firmware may be writing
881 * to -- the driver can read up to (but not including) this position and get
883 * The READ idx is managed by the firmware once the card is enabled.
885 * The WRITE idx maps to the last position the driver has read from -- the
886 * position preceding WRITE is the last slot the firmware can place a packet.
888 * The queue is empty (no good data) if WRITE = READ - 1, and is full if
891 * During initialization, the host sets up the READ queue position to the first
892 * IDX position, and WRITE to the last (READ - 1 wrapped)
894 * When the firmware places a packet in a buffer, it will advance the READ idx
895 * and fire the RX interrupt. The driver can then query the READ idx and
896 * process as many packets as possible, moving the WRITE idx forward as it
897 * resets the Rx queue buffers with new memory.
899 * The management in the driver is as follows:
900 * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
901 * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
902 * to replenish the iwl->rxq->rx_free.
903 * + In il3945_rx_replenish (scheduled) if 'processed' != 'read' then the
904 * iwl->rxq is replenished and the READ IDX is updated (updating the
905 * 'processed' and 'read' driver idxes as well)
906 * + A received packet is processed and handed to the kernel network stack,
907 * detached from the iwl->rxq. The driver 'processed' idx is updated.
908 * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
909 * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
910 * IDX is not incremented and iwl->status(RX_STALLED) is set. If there
911 * were enough free buffers and RX_STALLED is set it is cleared.
916 * il3945_rx_replenish() Replenishes rx_free list from rx_used, and calls
917 * il3945_rx_queue_restock
918 * il3945_rx_queue_restock() Moves available buffers from rx_free into Rx
919 * queue, updates firmware pointers, and updates
920 * the WRITE idx. If insufficient rx_free buffers
921 * are available, schedules il3945_rx_replenish
923 * -- enable interrupts --
924 * ISR - il3945_rx() Detach il_rx_bufs from pool up to the
925 * READ IDX, detaching the SKB from the pool.
926 * Moves the packet buffer from queue to rx_used.
927 * Calls il3945_rx_queue_restock to refill any empty
934 * il3945_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
937 il3945_dma_addr2rbd_ptr(struct il_priv *il, dma_addr_t dma_addr)
939 return cpu_to_le32((u32) dma_addr);
943 * il3945_rx_queue_restock - refill RX queue from pre-allocated pool
945 * If there are slots in the RX queue that need to be restocked,
946 * and we have free pre-allocated buffers, fill the ranks as much
947 * as we can, pulling from rx_free.
949 * This moves the 'write' idx forward to catch up with 'processed', and
950 * also updates the memory address in the firmware to reference the new
954 il3945_rx_queue_restock(struct il_priv *il)
956 struct il_rx_queue *rxq = &il->rxq;
957 struct list_head *element;
958 struct il_rx_buf *rxb;
962 spin_lock_irqsave(&rxq->lock, flags);
963 write = rxq->write & ~0x7;
964 while (il_rx_queue_space(rxq) > 0 && rxq->free_count) {
965 /* Get next free Rx buffer, remove from free list */
966 element = rxq->rx_free.next;
967 rxb = list_entry(element, struct il_rx_buf, list);
970 /* Point to Rx buffer via next RBD in circular buffer */
971 rxq->bd[rxq->write] =
972 il3945_dma_addr2rbd_ptr(il, rxb->page_dma);
973 rxq->queue[rxq->write] = rxb;
974 rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
977 spin_unlock_irqrestore(&rxq->lock, flags);
978 /* If the pre-allocated buffer pool is dropping low, schedule to
980 if (rxq->free_count <= RX_LOW_WATERMARK)
981 queue_work(il->workqueue, &il->rx_replenish);
983 /* If we've added more space for the firmware to place data, tell it.
984 * Increment device's write pointer in multiples of 8. */
985 if (rxq->write_actual != (rxq->write & ~0x7) ||
986 abs(rxq->write - rxq->read) > 7) {
987 spin_lock_irqsave(&rxq->lock, flags);
988 rxq->need_update = 1;
989 spin_unlock_irqrestore(&rxq->lock, flags);
990 il_rx_queue_update_write_ptr(il, rxq);
995 * il3945_rx_replenish - Move all used packet from rx_used to rx_free
997 * When moving to rx_free an SKB is allocated for the slot.
999 * Also restock the Rx queue via il3945_rx_queue_restock.
1000 * This is called as a scheduled work item (except for during initialization)
1003 il3945_rx_allocate(struct il_priv *il, gfp_t priority)
1005 struct il_rx_queue *rxq = &il->rxq;
1006 struct list_head *element;
1007 struct il_rx_buf *rxb;
1009 dma_addr_t page_dma;
1010 unsigned long flags;
1011 gfp_t gfp_mask = priority;
1014 spin_lock_irqsave(&rxq->lock, flags);
1015 if (list_empty(&rxq->rx_used)) {
1016 spin_unlock_irqrestore(&rxq->lock, flags);
1019 spin_unlock_irqrestore(&rxq->lock, flags);
1021 if (rxq->free_count > RX_LOW_WATERMARK)
1022 gfp_mask |= __GFP_NOWARN;
1024 if (il->hw_params.rx_page_order > 0)
1025 gfp_mask |= __GFP_COMP;
1027 /* Alloc a new receive buffer */
1028 page = alloc_pages(gfp_mask, il->hw_params.rx_page_order);
1030 if (net_ratelimit())
1031 D_INFO("Failed to allocate SKB buffer.\n");
1032 if (rxq->free_count <= RX_LOW_WATERMARK &&
1034 IL_ERR("Failed to allocate SKB buffer with %0x."
1035 "Only %u free buffers remaining.\n",
1036 priority, rxq->free_count);
1037 /* We don't reschedule replenish work here -- we will
1038 * call the restock method and if it still needs
1039 * more buffers it will schedule replenish */
1043 /* Get physical address of RB/SKB */
1045 pci_map_page(il->pci_dev, page, 0,
1046 PAGE_SIZE << il->hw_params.rx_page_order,
1047 PCI_DMA_FROMDEVICE);
1049 if (unlikely(pci_dma_mapping_error(il->pci_dev, page_dma))) {
1050 __free_pages(page, il->hw_params.rx_page_order);
1054 spin_lock_irqsave(&rxq->lock, flags);
1056 if (list_empty(&rxq->rx_used)) {
1057 spin_unlock_irqrestore(&rxq->lock, flags);
1058 pci_unmap_page(il->pci_dev, page_dma,
1059 PAGE_SIZE << il->hw_params.rx_page_order,
1060 PCI_DMA_FROMDEVICE);
1061 __free_pages(page, il->hw_params.rx_page_order);
1065 element = rxq->rx_used.next;
1066 rxb = list_entry(element, struct il_rx_buf, list);
1070 rxb->page_dma = page_dma;
1071 list_add_tail(&rxb->list, &rxq->rx_free);
1073 il->alloc_rxb_page++;
1075 spin_unlock_irqrestore(&rxq->lock, flags);
1080 il3945_rx_queue_reset(struct il_priv *il, struct il_rx_queue *rxq)
1082 unsigned long flags;
1084 spin_lock_irqsave(&rxq->lock, flags);
1085 INIT_LIST_HEAD(&rxq->rx_free);
1086 INIT_LIST_HEAD(&rxq->rx_used);
1087 /* Fill the rx_used queue with _all_ of the Rx buffers */
1088 for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
1089 /* In the reset function, these buffers may have been allocated
1090 * to an SKB, so we need to unmap and free potential storage */
1091 if (rxq->pool[i].page != NULL) {
1092 pci_unmap_page(il->pci_dev, rxq->pool[i].page_dma,
1093 PAGE_SIZE << il->hw_params.rx_page_order,
1094 PCI_DMA_FROMDEVICE);
1095 __il_free_pages(il, rxq->pool[i].page);
1096 rxq->pool[i].page = NULL;
1098 list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
1101 /* Set us so that we have processed and used all buffers, but have
1102 * not restocked the Rx queue with fresh buffers */
1103 rxq->read = rxq->write = 0;
1104 rxq->write_actual = 0;
1105 rxq->free_count = 0;
1106 spin_unlock_irqrestore(&rxq->lock, flags);
1110 il3945_rx_replenish(void *data)
1112 struct il_priv *il = data;
1113 unsigned long flags;
1115 il3945_rx_allocate(il, GFP_KERNEL);
1117 spin_lock_irqsave(&il->lock, flags);
1118 il3945_rx_queue_restock(il);
1119 spin_unlock_irqrestore(&il->lock, flags);
1123 il3945_rx_replenish_now(struct il_priv *il)
1125 il3945_rx_allocate(il, GFP_ATOMIC);
1127 il3945_rx_queue_restock(il);
1130 /* Assumes that the skb field of the buffers in 'pool' is kept accurate.
1131 * If an SKB has been detached, the POOL needs to have its SKB set to NULL
1132 * This free routine walks the list of POOL entries and if SKB is set to
1133 * non NULL it is unmapped and freed
1136 il3945_rx_queue_free(struct il_priv *il, struct il_rx_queue *rxq)
1139 for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
1140 if (rxq->pool[i].page != NULL) {
1141 pci_unmap_page(il->pci_dev, rxq->pool[i].page_dma,
1142 PAGE_SIZE << il->hw_params.rx_page_order,
1143 PCI_DMA_FROMDEVICE);
1144 __il_free_pages(il, rxq->pool[i].page);
1145 rxq->pool[i].page = NULL;
1149 dma_free_coherent(&il->pci_dev->dev, 4 * RX_QUEUE_SIZE, rxq->bd,
1151 dma_free_coherent(&il->pci_dev->dev, sizeof(struct il_rb_status),
1152 rxq->rb_stts, rxq->rb_stts_dma);
1154 rxq->rb_stts = NULL;
1157 /* Convert linear signal-to-noise ratio into dB */
1158 static u8 ratio2dB[100] = {
1159 /* 0 1 2 3 4 5 6 7 8 9 */
1160 0, 0, 6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */
1161 20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */
1162 26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */
1163 29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */
1164 32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */
1165 34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */
1166 36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */
1167 37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */
1168 38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */
1169 39, 39, 39, 39, 39, 40, 40, 40, 40, 40 /* 90 - 99 */
1172 /* Calculates a relative dB value from a ratio of linear
1173 * (i.e. not dB) signal levels.
1174 * Conversion assumes that levels are voltages (20*log), not powers (10*log). */
1176 il3945_calc_db_from_ratio(int sig_ratio)
1178 /* 1000:1 or higher just report as 60 dB */
1179 if (sig_ratio >= 1000)
1182 /* 100:1 or higher, divide by 10 and use table,
1183 * add 20 dB to make up for divide by 10 */
1184 if (sig_ratio >= 100)
1185 return 20 + (int)ratio2dB[sig_ratio / 10];
1187 /* We shouldn't see this */
1191 /* Use table for ratios 1:1 - 99:1 */
1192 return (int)ratio2dB[sig_ratio];
1196 * il3945_rx_handle - Main entry function for receiving responses from uCode
1198 * Uses the il->handlers callback function array to invoke
1199 * the appropriate handlers, including command responses,
1200 * frame-received notifications, and other notifications.
1203 il3945_rx_handle(struct il_priv *il)
1205 struct il_rx_buf *rxb;
1206 struct il_rx_pkt *pkt;
1207 struct il_rx_queue *rxq = &il->rxq;
1210 unsigned long flags;
1213 int total_empty = 0;
1215 /* uCode's read idx (stored in shared DRAM) indicates the last Rx
1216 * buffer that the driver may process (last buffer filled by ucode). */
1217 r = le16_to_cpu(rxq->rb_stts->closed_rb_num) & 0x0FFF;
1220 /* calculate total frames need to be restock after handling RX */
1221 total_empty = r - rxq->write_actual;
1222 if (total_empty < 0)
1223 total_empty += RX_QUEUE_SIZE;
1225 if (total_empty > (RX_QUEUE_SIZE / 2))
1227 /* Rx interrupt, but nothing sent from uCode */
1229 D_RX("r = %d, i = %d\n", r, i);
1234 rxb = rxq->queue[i];
1236 /* If an RXB doesn't have a Rx queue slot associated with it,
1237 * then a bug has been introduced in the queue refilling
1238 * routines -- catch it here */
1239 BUG_ON(rxb == NULL);
1241 rxq->queue[i] = NULL;
1243 pci_unmap_page(il->pci_dev, rxb->page_dma,
1244 PAGE_SIZE << il->hw_params.rx_page_order,
1245 PCI_DMA_FROMDEVICE);
1246 pkt = rxb_addr(rxb);
1248 len = le32_to_cpu(pkt->len_n_flags) & IL_RX_FRAME_SIZE_MSK;
1249 len += sizeof(u32); /* account for status word */
1251 reclaim = il_need_reclaim(il, pkt);
1253 /* Based on type of command response or notification,
1254 * handle those that need handling via function in
1255 * handlers table. See il3945_setup_handlers() */
1256 if (il->handlers[pkt->hdr.cmd]) {
1257 D_RX("r = %d, i = %d, %s, 0x%02x\n", r, i,
1258 il_get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
1259 il->isr_stats.handlers[pkt->hdr.cmd]++;
1260 il->handlers[pkt->hdr.cmd] (il, rxb);
1262 /* No handling needed */
1263 D_RX("r %d i %d No handler needed for %s, 0x%02x\n", r,
1264 i, il_get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
1268 * XXX: After here, we should always check rxb->page
1269 * against NULL before touching it or its virtual
1270 * memory (pkt). Because some handler might have
1271 * already taken or freed the pages.
1275 /* Invoke any callbacks, transfer the buffer to caller,
1276 * and fire off the (possibly) blocking il_send_cmd()
1277 * as we reclaim the driver command queue */
1279 il_tx_cmd_complete(il, rxb);
1281 IL_WARN("Claim null rxb?\n");
1284 /* Reuse the page if possible. For notification packets and
1285 * SKBs that fail to Rx correctly, add them back into the
1286 * rx_free list for reuse later. */
1287 spin_lock_irqsave(&rxq->lock, flags);
1288 if (rxb->page != NULL) {
1290 pci_map_page(il->pci_dev, rxb->page, 0,
1291 PAGE_SIZE << il->hw_params.
1292 rx_page_order, PCI_DMA_FROMDEVICE);
1293 if (unlikely(pci_dma_mapping_error(il->pci_dev,
1295 __il_free_pages(il, rxb->page);
1297 list_add_tail(&rxb->list, &rxq->rx_used);
1299 list_add_tail(&rxb->list, &rxq->rx_free);
1303 list_add_tail(&rxb->list, &rxq->rx_used);
1305 spin_unlock_irqrestore(&rxq->lock, flags);
1307 i = (i + 1) & RX_QUEUE_MASK;
1308 /* If there are a lot of unused frames,
1309 * restock the Rx queue so ucode won't assert. */
1314 il3945_rx_replenish_now(il);
1320 /* Backtrack one entry */
1323 il3945_rx_replenish_now(il);
1325 il3945_rx_queue_restock(il);
1328 /* call this function to flush any scheduled tasklet */
1330 il3945_synchronize_irq(struct il_priv *il)
1332 /* wait to make sure we flush pending tasklet */
1333 synchronize_irq(il->pci_dev->irq);
1334 tasklet_kill(&il->irq_tasklet);
1338 il3945_desc_lookup(int i)
1346 return "BAD_CHECKSUM";
1348 return "NMI_INTERRUPT";
1352 return "FATAL_ERROR";
1358 #define ERROR_START_OFFSET (1 * sizeof(u32))
1359 #define ERROR_ELEM_SIZE (7 * sizeof(u32))
1362 il3945_dump_nic_error_log(struct il_priv *il)
1365 u32 desc, time, count, base, data1;
1366 u32 blink1, blink2, ilink1, ilink2;
1368 base = le32_to_cpu(il->card_alive.error_event_table_ptr);
1370 if (!il3945_hw_valid_rtc_data_addr(base)) {
1371 IL_ERR("Not valid error log pointer 0x%08X\n", base);
1375 count = il_read_targ_mem(il, base);
1377 if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
1378 IL_ERR("Start IWL Error Log Dump:\n");
1379 IL_ERR("Status: 0x%08lX, count: %d\n", il->status, count);
1382 IL_ERR("Desc Time asrtPC blink2 "
1383 "ilink1 nmiPC Line\n");
1384 for (i = ERROR_START_OFFSET;
1385 i < (count * ERROR_ELEM_SIZE) + ERROR_START_OFFSET;
1386 i += ERROR_ELEM_SIZE) {
1387 desc = il_read_targ_mem(il, base + i);
1388 time = il_read_targ_mem(il, base + i + 1 * sizeof(u32));
1389 blink1 = il_read_targ_mem(il, base + i + 2 * sizeof(u32));
1390 blink2 = il_read_targ_mem(il, base + i + 3 * sizeof(u32));
1391 ilink1 = il_read_targ_mem(il, base + i + 4 * sizeof(u32));
1392 ilink2 = il_read_targ_mem(il, base + i + 5 * sizeof(u32));
1393 data1 = il_read_targ_mem(il, base + i + 6 * sizeof(u32));
1395 IL_ERR("%-13s (0x%X) %010u 0x%05X 0x%05X 0x%05X 0x%05X %u\n\n",
1396 il3945_desc_lookup(desc), desc, time, blink1, blink2,
1397 ilink1, ilink2, data1);
1402 il3945_irq_tasklet(unsigned long data)
1404 struct il_priv *il = (struct il_priv *)data;
1405 u32 inta, handled = 0;
1407 unsigned long flags;
1408 #ifdef CONFIG_IWLEGACY_DEBUG
1412 spin_lock_irqsave(&il->lock, flags);
1414 /* Ack/clear/reset pending uCode interrupts.
1415 * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
1416 * and will clear only when CSR_FH_INT_STATUS gets cleared. */
1417 inta = _il_rd(il, CSR_INT);
1418 _il_wr(il, CSR_INT, inta);
1420 /* Ack/clear/reset pending flow-handler (DMA) interrupts.
1421 * Any new interrupts that happen after this, either while we're
1422 * in this tasklet, or later, will show up in next ISR/tasklet. */
1423 inta_fh = _il_rd(il, CSR_FH_INT_STATUS);
1424 _il_wr(il, CSR_FH_INT_STATUS, inta_fh);
1426 #ifdef CONFIG_IWLEGACY_DEBUG
1427 if (il_get_debug_level(il) & IL_DL_ISR) {
1428 /* just for debug */
1429 inta_mask = _il_rd(il, CSR_INT_MASK);
1430 D_ISR("inta 0x%08x, enabled 0x%08x, fh 0x%08x\n", inta,
1431 inta_mask, inta_fh);
1435 spin_unlock_irqrestore(&il->lock, flags);
1437 /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
1438 * atomic, make sure that inta covers all the interrupts that
1439 * we've discovered, even if FH interrupt came in just after
1440 * reading CSR_INT. */
1441 if (inta_fh & CSR39_FH_INT_RX_MASK)
1442 inta |= CSR_INT_BIT_FH_RX;
1443 if (inta_fh & CSR39_FH_INT_TX_MASK)
1444 inta |= CSR_INT_BIT_FH_TX;
1446 /* Now service all interrupt bits discovered above. */
1447 if (inta & CSR_INT_BIT_HW_ERR) {
1448 IL_ERR("Hardware error detected. Restarting.\n");
1450 /* Tell the device to stop sending interrupts */
1451 il_disable_interrupts(il);
1454 il_irq_handle_error(il);
1456 handled |= CSR_INT_BIT_HW_ERR;
1460 #ifdef CONFIG_IWLEGACY_DEBUG
1461 if (il_get_debug_level(il) & (IL_DL_ISR)) {
1462 /* NIC fires this, but we don't use it, redundant with WAKEUP */
1463 if (inta & CSR_INT_BIT_SCD) {
1464 D_ISR("Scheduler finished to transmit "
1465 "the frame/frames.\n");
1466 il->isr_stats.sch++;
1469 /* Alive notification via Rx interrupt will do the real work */
1470 if (inta & CSR_INT_BIT_ALIVE) {
1471 D_ISR("Alive interrupt\n");
1472 il->isr_stats.alive++;
1476 /* Safely ignore these bits for debug checks below */
1477 inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
1479 /* Error detected by uCode */
1480 if (inta & CSR_INT_BIT_SW_ERR) {
1481 IL_ERR("Microcode SW error detected. " "Restarting 0x%X.\n",
1484 il_irq_handle_error(il);
1485 handled |= CSR_INT_BIT_SW_ERR;
1488 /* uCode wakes up after power-down sleep */
1489 if (inta & CSR_INT_BIT_WAKEUP) {
1490 D_ISR("Wakeup interrupt\n");
1491 il_rx_queue_update_write_ptr(il, &il->rxq);
1493 spin_lock_irqsave(&il->lock, flags);
1494 il_txq_update_write_ptr(il, &il->txq[0]);
1495 il_txq_update_write_ptr(il, &il->txq[1]);
1496 il_txq_update_write_ptr(il, &il->txq[2]);
1497 il_txq_update_write_ptr(il, &il->txq[3]);
1498 il_txq_update_write_ptr(il, &il->txq[4]);
1499 spin_unlock_irqrestore(&il->lock, flags);
1501 il->isr_stats.wakeup++;
1502 handled |= CSR_INT_BIT_WAKEUP;
1505 /* All uCode command responses, including Tx command responses,
1506 * Rx "responses" (frame-received notification), and other
1507 * notifications from uCode come through here*/
1508 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
1509 il3945_rx_handle(il);
1511 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
1514 if (inta & CSR_INT_BIT_FH_TX) {
1515 D_ISR("Tx interrupt\n");
1518 _il_wr(il, CSR_FH_INT_STATUS, (1 << 6));
1519 il_wr(il, FH39_TCSR_CREDIT(FH39_SRVC_CHNL), 0x0);
1520 handled |= CSR_INT_BIT_FH_TX;
1523 if (inta & ~handled) {
1524 IL_ERR("Unhandled INTA bits 0x%08x\n", inta & ~handled);
1525 il->isr_stats.unhandled++;
1528 if (inta & ~il->inta_mask) {
1529 IL_WARN("Disabled INTA bits 0x%08x were pending\n",
1530 inta & ~il->inta_mask);
1531 IL_WARN(" with inta_fh = 0x%08x\n", inta_fh);
1534 /* Re-enable all interrupts */
1535 /* only Re-enable if disabled by irq */
1536 if (test_bit(S_INT_ENABLED, &il->status))
1537 il_enable_interrupts(il);
1539 #ifdef CONFIG_IWLEGACY_DEBUG
1540 if (il_get_debug_level(il) & (IL_DL_ISR)) {
1541 inta = _il_rd(il, CSR_INT);
1542 inta_mask = _il_rd(il, CSR_INT_MASK);
1543 inta_fh = _il_rd(il, CSR_FH_INT_STATUS);
1544 D_ISR("End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
1545 "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
1551 il3945_get_channels_for_scan(struct il_priv *il, enum nl80211_band band,
1552 u8 is_active, u8 n_probes,
1553 struct il3945_scan_channel *scan_ch,
1554 struct ieee80211_vif *vif)
1556 struct ieee80211_channel *chan;
1557 const struct ieee80211_supported_band *sband;
1558 const struct il_channel_info *ch_info;
1559 u16 passive_dwell = 0;
1560 u16 active_dwell = 0;
1563 sband = il_get_hw_mode(il, band);
1567 active_dwell = il_get_active_dwell_time(il, band, n_probes);
1568 passive_dwell = il_get_passive_dwell_time(il, band, vif);
1570 if (passive_dwell <= active_dwell)
1571 passive_dwell = active_dwell + 1;
1573 for (i = 0, added = 0; i < il->scan_request->n_channels; i++) {
1574 chan = il->scan_request->channels[i];
1576 if (chan->band != band)
1579 scan_ch->channel = chan->hw_value;
1581 ch_info = il_get_channel_info(il, band, scan_ch->channel);
1582 if (!il_is_channel_valid(ch_info)) {
1583 D_SCAN("Channel %d is INVALID for this band.\n",
1588 scan_ch->active_dwell = cpu_to_le16(active_dwell);
1589 scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
1590 /* If passive , set up for auto-switch
1591 * and use long active_dwell time.
1593 if (!is_active || il_is_channel_passive(ch_info) ||
1594 (chan->flags & IEEE80211_CHAN_NO_IR)) {
1595 scan_ch->type = 0; /* passive */
1596 if (IL_UCODE_API(il->ucode_ver) == 1)
1597 scan_ch->active_dwell =
1598 cpu_to_le16(passive_dwell - 1);
1600 scan_ch->type = 1; /* active */
1603 /* Set direct probe bits. These may be used both for active
1604 * scan channels (probes gets sent right away),
1605 * or for passive channels (probes get se sent only after
1606 * hearing clear Rx packet).*/
1607 if (IL_UCODE_API(il->ucode_ver) >= 2) {
1609 scan_ch->type |= IL39_SCAN_PROBE_MASK(n_probes);
1611 /* uCode v1 does not allow setting direct probe bits on
1612 * passive channel. */
1613 if ((scan_ch->type & 1) && n_probes)
1614 scan_ch->type |= IL39_SCAN_PROBE_MASK(n_probes);
1617 /* Set txpower levels to defaults */
1618 scan_ch->tpc.dsp_atten = 110;
1619 /* scan_pwr_info->tpc.dsp_atten; */
1621 /*scan_pwr_info->tpc.tx_gain; */
1622 if (band == NL80211_BAND_5GHZ)
1623 scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
1625 scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
1626 /* NOTE: if we were doing 6Mb OFDM for scans we'd use
1628 * scan_ch->tpc.tx_gain = ((1 << 5) | (2 << 3)) | 3;
1632 D_SCAN("Scanning %d [%s %d]\n", scan_ch->channel,
1633 (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE",
1634 (scan_ch->type & 1) ? active_dwell : passive_dwell);
1640 D_SCAN("total channels to scan %d\n", added);
1645 il3945_init_hw_rates(struct il_priv *il, struct ieee80211_rate *rates)
1649 for (i = 0; i < RATE_COUNT_LEGACY; i++) {
1650 rates[i].bitrate = il3945_rates[i].ieee * 5;
1651 rates[i].hw_value = i; /* Rate scaling will work on idxes */
1652 rates[i].hw_value_short = i;
1654 if (i > IL39_LAST_OFDM_RATE || i < IL_FIRST_OFDM_RATE) {
1656 * If CCK != 1M then set short preamble rate flag.
1659 (il3945_rates[i].plcp ==
1660 10) ? 0 : IEEE80211_RATE_SHORT_PREAMBLE;
1665 /******************************************************************************
1667 * uCode download functions
1669 ******************************************************************************/
1672 il3945_dealloc_ucode_pci(struct il_priv *il)
1674 il_free_fw_desc(il->pci_dev, &il->ucode_code);
1675 il_free_fw_desc(il->pci_dev, &il->ucode_data);
1676 il_free_fw_desc(il->pci_dev, &il->ucode_data_backup);
1677 il_free_fw_desc(il->pci_dev, &il->ucode_init);
1678 il_free_fw_desc(il->pci_dev, &il->ucode_init_data);
1679 il_free_fw_desc(il->pci_dev, &il->ucode_boot);
1683 * il3945_verify_inst_full - verify runtime uCode image in card vs. host,
1684 * looking at all data.
1687 il3945_verify_inst_full(struct il_priv *il, __le32 * image, u32 len)
1694 D_INFO("ucode inst image size is %u\n", len);
1696 il_wr(il, HBUS_TARG_MEM_RADDR, IL39_RTC_INST_LOWER_BOUND);
1699 for (; len > 0; len -= sizeof(u32), image++) {
1700 /* read data comes through single port, auto-incr addr */
1701 /* NOTE: Use the debugless read so we don't flood kernel log
1702 * if IL_DL_IO is set */
1703 val = _il_rd(il, HBUS_TARG_MEM_RDAT);
1704 if (val != le32_to_cpu(*image)) {
1705 IL_ERR("uCode INST section is invalid at "
1706 "offset 0x%x, is 0x%x, s/b 0x%x\n",
1707 save_len - len, val, le32_to_cpu(*image));
1716 D_INFO("ucode image in INSTRUCTION memory is good\n");
1722 * il3945_verify_inst_sparse - verify runtime uCode image in card vs. host,
1723 * using sample data 100 bytes apart. If these sample points are good,
1724 * it's a pretty good bet that everything between them is good, too.
1727 il3945_verify_inst_sparse(struct il_priv *il, __le32 * image, u32 len)
1734 D_INFO("ucode inst image size is %u\n", len);
1736 for (i = 0; i < len; i += 100, image += 100 / sizeof(u32)) {
1737 /* read data comes through single port, auto-incr addr */
1738 /* NOTE: Use the debugless read so we don't flood kernel log
1739 * if IL_DL_IO is set */
1740 il_wr(il, HBUS_TARG_MEM_RADDR, i + IL39_RTC_INST_LOWER_BOUND);
1741 val = _il_rd(il, HBUS_TARG_MEM_RDAT);
1742 if (val != le32_to_cpu(*image)) {
1743 #if 0 /* Enable this if you want to see details */
1744 IL_ERR("uCode INST section is invalid at "
1745 "offset 0x%x, is 0x%x, s/b 0x%x\n", i, val,
1759 * il3945_verify_ucode - determine which instruction image is in SRAM,
1760 * and verify its contents
1763 il3945_verify_ucode(struct il_priv *il)
1770 image = (__le32 *) il->ucode_boot.v_addr;
1771 len = il->ucode_boot.len;
1772 rc = il3945_verify_inst_sparse(il, image, len);
1774 D_INFO("Bootstrap uCode is good in inst SRAM\n");
1778 /* Try initialize */
1779 image = (__le32 *) il->ucode_init.v_addr;
1780 len = il->ucode_init.len;
1781 rc = il3945_verify_inst_sparse(il, image, len);
1783 D_INFO("Initialize uCode is good in inst SRAM\n");
1787 /* Try runtime/protocol */
1788 image = (__le32 *) il->ucode_code.v_addr;
1789 len = il->ucode_code.len;
1790 rc = il3945_verify_inst_sparse(il, image, len);
1792 D_INFO("Runtime uCode is good in inst SRAM\n");
1796 IL_ERR("NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
1798 /* Since nothing seems to match, show first several data entries in
1799 * instruction SRAM, so maybe visual inspection will give a clue.
1800 * Selection of bootstrap image (vs. other images) is arbitrary. */
1801 image = (__le32 *) il->ucode_boot.v_addr;
1802 len = il->ucode_boot.len;
1803 rc = il3945_verify_inst_full(il, image, len);
1809 il3945_nic_start(struct il_priv *il)
1811 /* Remove all resets to allow NIC to operate */
1812 _il_wr(il, CSR_RESET, 0);
1815 #define IL3945_UCODE_GET(item) \
1816 static u32 il3945_ucode_get_##item(const struct il_ucode_header *ucode)\
1818 return le32_to_cpu(ucode->v1.item); \
1822 il3945_ucode_get_header_size(u32 api_ver)
1828 il3945_ucode_get_data(const struct il_ucode_header *ucode)
1830 return (u8 *) ucode->v1.data;
1833 IL3945_UCODE_GET(inst_size);
1834 IL3945_UCODE_GET(data_size);
1835 IL3945_UCODE_GET(init_size);
1836 IL3945_UCODE_GET(init_data_size);
1837 IL3945_UCODE_GET(boot_size);
1840 * il3945_read_ucode - Read uCode images from disk file.
1842 * Copy into buffers for card to fetch via bus-mastering
1845 il3945_read_ucode(struct il_priv *il)
1847 const struct il_ucode_header *ucode;
1848 int ret = -EINVAL, idx;
1849 const struct firmware *ucode_raw;
1850 /* firmware file name contains uCode/driver compatibility version */
1851 const char *name_pre = il->cfg->fw_name_pre;
1852 const unsigned int api_max = il->cfg->ucode_api_max;
1853 const unsigned int api_min = il->cfg->ucode_api_min;
1857 u32 api_ver, inst_size, data_size, init_size, init_data_size, boot_size;
1859 /* Ask kernel firmware_class module to get the boot firmware off disk.
1860 * reject_firmware() is synchronous, file is in memory on return. */
1861 for (idx = api_max; idx >= api_min; idx--) {
1862 sprintf(buf, "/*(DEBLOBBED)*/");
1863 ret = reject_firmware(&ucode_raw, buf, &il->pci_dev->dev);
1865 IL_ERR("%s firmware file req failed: %d\n", buf, ret);
1872 IL_ERR("Loaded firmware %s, "
1873 "which is deprecated. "
1874 " Please use API v%u instead.\n", buf,
1876 D_INFO("Got firmware '%s' file "
1877 "(%zd bytes) from disk\n", buf, ucode_raw->size);
1885 /* Make sure that we got at least our header! */
1886 if (ucode_raw->size < il3945_ucode_get_header_size(1)) {
1887 IL_ERR("File size way too small!\n");
1892 /* Data from ucode file: header followed by uCode images */
1893 ucode = (struct il_ucode_header *)ucode_raw->data;
1895 il->ucode_ver = le32_to_cpu(ucode->ver);
1896 api_ver = IL_UCODE_API(il->ucode_ver);
1897 inst_size = il3945_ucode_get_inst_size(ucode);
1898 data_size = il3945_ucode_get_data_size(ucode);
1899 init_size = il3945_ucode_get_init_size(ucode);
1900 init_data_size = il3945_ucode_get_init_data_size(ucode);
1901 boot_size = il3945_ucode_get_boot_size(ucode);
1902 src = il3945_ucode_get_data(ucode);
1904 /* api_ver should match the api version forming part of the
1905 * firmware filename ... but we don't check for that and only rely
1906 * on the API version read from firmware header from here on forward */
1908 if (api_ver < api_min || api_ver > api_max) {
1909 IL_ERR("Driver unable to support your firmware API. "
1910 "Driver supports v%u, firmware is v%u.\n", api_max,
1916 if (api_ver != api_max)
1917 IL_ERR("Firmware has old API version. Expected %u, "
1918 "got %u. New firmware can be obtained "
1919 "from http://www.intellinuxwireless.org.\n", api_max,
1922 IL_INFO("loaded firmware version %u.%u.%u.%u\n",
1923 IL_UCODE_MAJOR(il->ucode_ver), IL_UCODE_MINOR(il->ucode_ver),
1924 IL_UCODE_API(il->ucode_ver), IL_UCODE_SERIAL(il->ucode_ver));
1926 snprintf(il->hw->wiphy->fw_version, sizeof(il->hw->wiphy->fw_version),
1927 "%u.%u.%u.%u", IL_UCODE_MAJOR(il->ucode_ver),
1928 IL_UCODE_MINOR(il->ucode_ver), IL_UCODE_API(il->ucode_ver),
1929 IL_UCODE_SERIAL(il->ucode_ver));
1931 D_INFO("f/w package hdr ucode version raw = 0x%x\n", il->ucode_ver);
1932 D_INFO("f/w package hdr runtime inst size = %u\n", inst_size);
1933 D_INFO("f/w package hdr runtime data size = %u\n", data_size);
1934 D_INFO("f/w package hdr init inst size = %u\n", init_size);
1935 D_INFO("f/w package hdr init data size = %u\n", init_data_size);
1936 D_INFO("f/w package hdr boot inst size = %u\n", boot_size);
1938 /* Verify size of file vs. image size info in file's header */
1939 if (ucode_raw->size !=
1940 il3945_ucode_get_header_size(api_ver) + inst_size + data_size +
1941 init_size + init_data_size + boot_size) {
1943 D_INFO("uCode file size %zd does not match expected size\n",
1949 /* Verify that uCode images will fit in card's SRAM */
1950 if (inst_size > IL39_MAX_INST_SIZE) {
1951 D_INFO("uCode instr len %d too large to fit in\n", inst_size);
1956 if (data_size > IL39_MAX_DATA_SIZE) {
1957 D_INFO("uCode data len %d too large to fit in\n", data_size);
1961 if (init_size > IL39_MAX_INST_SIZE) {
1962 D_INFO("uCode init instr len %d too large to fit in\n",
1967 if (init_data_size > IL39_MAX_DATA_SIZE) {
1968 D_INFO("uCode init data len %d too large to fit in\n",
1973 if (boot_size > IL39_MAX_BSM_SIZE) {
1974 D_INFO("uCode boot instr len %d too large to fit in\n",
1980 /* Allocate ucode buffers for card's bus-master loading ... */
1982 /* Runtime instructions and 2 copies of data:
1983 * 1) unmodified from disk
1984 * 2) backup cache for save/restore during power-downs */
1985 il->ucode_code.len = inst_size;
1986 il_alloc_fw_desc(il->pci_dev, &il->ucode_code);
1988 il->ucode_data.len = data_size;
1989 il_alloc_fw_desc(il->pci_dev, &il->ucode_data);
1991 il->ucode_data_backup.len = data_size;
1992 il_alloc_fw_desc(il->pci_dev, &il->ucode_data_backup);
1994 if (!il->ucode_code.v_addr || !il->ucode_data.v_addr ||
1995 !il->ucode_data_backup.v_addr)
1998 /* Initialization instructions and data */
1999 if (init_size && init_data_size) {
2000 il->ucode_init.len = init_size;
2001 il_alloc_fw_desc(il->pci_dev, &il->ucode_init);
2003 il->ucode_init_data.len = init_data_size;
2004 il_alloc_fw_desc(il->pci_dev, &il->ucode_init_data);
2006 if (!il->ucode_init.v_addr || !il->ucode_init_data.v_addr)
2010 /* Bootstrap (instructions only, no data) */
2012 il->ucode_boot.len = boot_size;
2013 il_alloc_fw_desc(il->pci_dev, &il->ucode_boot);
2015 if (!il->ucode_boot.v_addr)
2019 /* Copy images into buffers for card's bus-master reads ... */
2021 /* Runtime instructions (first block of data in file) */
2023 D_INFO("Copying (but not loading) uCode instr len %zd\n", len);
2024 memcpy(il->ucode_code.v_addr, src, len);
2027 D_INFO("uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
2028 il->ucode_code.v_addr, (u32) il->ucode_code.p_addr);
2030 /* Runtime data (2nd block)
2031 * NOTE: Copy into backup buffer will be done in il3945_up() */
2033 D_INFO("Copying (but not loading) uCode data len %zd\n", len);
2034 memcpy(il->ucode_data.v_addr, src, len);
2035 memcpy(il->ucode_data_backup.v_addr, src, len);
2038 /* Initialization instructions (3rd block) */
2041 D_INFO("Copying (but not loading) init instr len %zd\n", len);
2042 memcpy(il->ucode_init.v_addr, src, len);
2046 /* Initialization data (4th block) */
2047 if (init_data_size) {
2048 len = init_data_size;
2049 D_INFO("Copying (but not loading) init data len %zd\n", len);
2050 memcpy(il->ucode_init_data.v_addr, src, len);
2054 /* Bootstrap instructions (5th block) */
2056 D_INFO("Copying (but not loading) boot instr len %zd\n", len);
2057 memcpy(il->ucode_boot.v_addr, src, len);
2059 /* We have our copies now, allow OS release its copies */
2060 release_firmware(ucode_raw);
2064 IL_ERR("failed to allocate pci memory\n");
2066 il3945_dealloc_ucode_pci(il);
2069 release_firmware(ucode_raw);
2076 * il3945_set_ucode_ptrs - Set uCode address location
2078 * Tell initialization uCode where to find runtime uCode.
2080 * BSM registers initially contain pointers to initialization uCode.
2081 * We need to replace them to load runtime uCode inst and data,
2082 * and to save runtime data when powering down.
2085 il3945_set_ucode_ptrs(struct il_priv *il)
2090 /* bits 31:0 for 3945 */
2091 pinst = il->ucode_code.p_addr;
2092 pdata = il->ucode_data_backup.p_addr;
2094 /* Tell bootstrap uCode where to find image to load */
2095 il_wr_prph(il, BSM_DRAM_INST_PTR_REG, pinst);
2096 il_wr_prph(il, BSM_DRAM_DATA_PTR_REG, pdata);
2097 il_wr_prph(il, BSM_DRAM_DATA_BYTECOUNT_REG, il->ucode_data.len);
2099 /* Inst byte count must be last to set up, bit 31 signals uCode
2100 * that all new ptr/size info is in place */
2101 il_wr_prph(il, BSM_DRAM_INST_BYTECOUNT_REG,
2102 il->ucode_code.len | BSM_DRAM_INST_LOAD);
2104 D_INFO("Runtime uCode pointers are set.\n");
2110 * il3945_init_alive_start - Called after N_ALIVE notification received
2112 * Called after N_ALIVE notification received from "initialize" uCode.
2114 * Tell "initialize" uCode to go ahead and load the runtime uCode.
2117 il3945_init_alive_start(struct il_priv *il)
2119 /* Check alive response for "valid" sign from uCode */
2120 if (il->card_alive_init.is_valid != UCODE_VALID_OK) {
2121 /* We had an error bringing up the hardware, so take it
2122 * all the way back down so we can try again */
2123 D_INFO("Initialize Alive failed.\n");
2127 /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
2128 * This is a paranoid check, because we would not have gotten the
2129 * "initialize" alive if code weren't properly loaded. */
2130 if (il3945_verify_ucode(il)) {
2131 /* Runtime instruction load was bad;
2132 * take it all the way back down so we can try again */
2133 D_INFO("Bad \"initialize\" uCode load.\n");
2137 /* Send pointers to protocol/runtime uCode image ... init code will
2138 * load and launch runtime uCode, which will send us another "Alive"
2140 D_INFO("Initialization Alive received.\n");
2141 if (il3945_set_ucode_ptrs(il)) {
2142 /* Runtime instruction load won't happen;
2143 * take it all the way back down so we can try again */
2144 D_INFO("Couldn't set up uCode pointers.\n");
2150 queue_work(il->workqueue, &il->restart);
2154 * il3945_alive_start - called after N_ALIVE notification received
2155 * from protocol/runtime uCode (initialization uCode's
2156 * Alive gets handled by il3945_init_alive_start()).
2159 il3945_alive_start(struct il_priv *il)
2161 int thermal_spin = 0;
2164 D_INFO("Runtime Alive received.\n");
2166 if (il->card_alive.is_valid != UCODE_VALID_OK) {
2167 /* We had an error bringing up the hardware, so take it
2168 * all the way back down so we can try again */
2169 D_INFO("Alive failed.\n");
2173 /* Initialize uCode has loaded Runtime uCode ... verify inst image.
2174 * This is a paranoid check, because we would not have gotten the
2175 * "runtime" alive if code weren't properly loaded. */
2176 if (il3945_verify_ucode(il)) {
2177 /* Runtime instruction load was bad;
2178 * take it all the way back down so we can try again */
2179 D_INFO("Bad runtime uCode load.\n");
2183 rfkill = il_rd_prph(il, APMG_RFKILL_REG);
2184 D_INFO("RFKILL status: 0x%x\n", rfkill);
2187 clear_bit(S_RFKILL, &il->status);
2188 /* if RFKILL is not on, then wait for thermal
2189 * sensor in adapter to kick in */
2190 while (il3945_hw_get_temperature(il) == 0) {
2196 D_INFO("Thermal calibration took %dus\n",
2199 set_bit(S_RFKILL, &il->status);
2201 /* After the ALIVE response, we can send commands to 3945 uCode */
2202 set_bit(S_ALIVE, &il->status);
2204 /* Enable watchdog to monitor the driver tx queues */
2205 il_setup_watchdog(il);
2207 if (il_is_rfkill(il))
2210 ieee80211_wake_queues(il->hw);
2212 il->active_rate = RATES_MASK_3945;
2214 il_power_update_mode(il, true);
2216 if (il_is_associated(il)) {
2217 struct il3945_rxon_cmd *active_rxon =
2218 (struct il3945_rxon_cmd *)(&il->active);
2220 il->staging.filter_flags |= RXON_FILTER_ASSOC_MSK;
2221 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2223 /* Initialize our rx_config data */
2224 il_connection_init_rx_config(il);
2227 /* Configure Bluetooth device coexistence support */
2228 il_send_bt_config(il);
2230 set_bit(S_READY, &il->status);
2232 /* Configure the adapter for unassociated operation */
2233 il3945_commit_rxon(il);
2235 il3945_reg_txpower_periodic(il);
2237 D_INFO("ALIVE processing complete.\n");
2238 wake_up(&il->wait_command_queue);
2243 queue_work(il->workqueue, &il->restart);
2246 static void il3945_cancel_deferred_work(struct il_priv *il);
2249 __il3945_down(struct il_priv *il)
2251 unsigned long flags;
2254 D_INFO(DRV_NAME " is going down\n");
2256 il_scan_cancel_timeout(il, 200);
2258 exit_pending = test_and_set_bit(S_EXIT_PENDING, &il->status);
2260 /* Stop TX queues watchdog. We need to have S_EXIT_PENDING bit set
2261 * to prevent rearm timer */
2262 del_timer_sync(&il->watchdog);
2264 /* Station information will now be cleared in device */
2265 il_clear_ucode_stations(il);
2266 il_dealloc_bcast_stations(il);
2267 il_clear_driver_stations(il);
2269 /* Unblock any waiting calls */
2270 wake_up_all(&il->wait_command_queue);
2272 /* Wipe out the EXIT_PENDING status bit if we are not actually
2273 * exiting the module */
2275 clear_bit(S_EXIT_PENDING, &il->status);
2277 /* stop and reset the on-board processor */
2278 _il_wr(il, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
2280 /* tell the device to stop sending interrupts */
2281 spin_lock_irqsave(&il->lock, flags);
2282 il_disable_interrupts(il);
2283 spin_unlock_irqrestore(&il->lock, flags);
2284 il3945_synchronize_irq(il);
2286 if (il->mac80211_registered)
2287 ieee80211_stop_queues(il->hw);
2289 /* If we have not previously called il3945_init() then
2290 * clear all bits but the RF Kill bits and return */
2291 if (!il_is_init(il)) {
2293 test_bit(S_RFKILL, &il->status) << S_RFKILL |
2294 test_bit(S_GEO_CONFIGURED, &il->status) << S_GEO_CONFIGURED |
2295 test_bit(S_EXIT_PENDING, &il->status) << S_EXIT_PENDING;
2299 /* ...otherwise clear out all the status bits but the RF Kill
2300 * bit and continue taking the NIC down. */
2302 test_bit(S_RFKILL, &il->status) << S_RFKILL |
2303 test_bit(S_GEO_CONFIGURED, &il->status) << S_GEO_CONFIGURED |
2304 test_bit(S_FW_ERROR, &il->status) << S_FW_ERROR |
2305 test_bit(S_EXIT_PENDING, &il->status) << S_EXIT_PENDING;
2308 * We disabled and synchronized interrupt, and priv->mutex is taken, so
2309 * here is the only thread which will program device registers, but
2310 * still have lockdep assertions, so we are taking reg_lock.
2312 spin_lock_irq(&il->reg_lock);
2313 /* FIXME: il_grab_nic_access if rfkill is off ? */
2315 il3945_hw_txq_ctx_stop(il);
2316 il3945_hw_rxq_stop(il);
2317 /* Power-down device's busmaster DMA clocks */
2318 _il_wr_prph(il, APMG_CLK_DIS_REG, APMG_CLK_VAL_DMA_CLK_RQT);
2320 /* Stop the device, and put it in low power state */
2323 spin_unlock_irq(&il->reg_lock);
2325 il3945_hw_txq_ctx_free(il);
2327 memset(&il->card_alive, 0, sizeof(struct il_alive_resp));
2330 dev_kfree_skb(il->beacon_skb);
2331 il->beacon_skb = NULL;
2333 /* clear out any free frames */
2334 il3945_clear_free_frames(il);
2338 il3945_down(struct il_priv *il)
2340 mutex_lock(&il->mutex);
2342 mutex_unlock(&il->mutex);
2344 il3945_cancel_deferred_work(il);
2347 #define MAX_HW_RESTARTS 5
2350 il3945_alloc_bcast_station(struct il_priv *il)
2352 unsigned long flags;
2355 spin_lock_irqsave(&il->sta_lock, flags);
2356 sta_id = il_prep_station(il, il_bcast_addr, false, NULL);
2357 if (sta_id == IL_INVALID_STATION) {
2358 IL_ERR("Unable to prepare broadcast station\n");
2359 spin_unlock_irqrestore(&il->sta_lock, flags);
2364 il->stations[sta_id].used |= IL_STA_DRIVER_ACTIVE;
2365 il->stations[sta_id].used |= IL_STA_BCAST;
2366 spin_unlock_irqrestore(&il->sta_lock, flags);
2372 __il3945_up(struct il_priv *il)
2376 rc = il3945_alloc_bcast_station(il);
2380 if (test_bit(S_EXIT_PENDING, &il->status)) {
2381 IL_WARN("Exit pending; will not bring the NIC up\n");
2385 if (!il->ucode_data_backup.v_addr || !il->ucode_data.v_addr) {
2386 IL_ERR("ucode not available for device bring up\n");
2390 /* If platform's RF_KILL switch is NOT set to KILL */
2391 if (_il_rd(il, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
2392 clear_bit(S_RFKILL, &il->status);
2394 set_bit(S_RFKILL, &il->status);
2398 _il_wr(il, CSR_INT, 0xFFFFFFFF);
2400 rc = il3945_hw_nic_init(il);
2402 IL_ERR("Unable to int nic\n");
2406 /* make sure rfkill handshake bits are cleared */
2407 _il_wr(il, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2408 _il_wr(il, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
2410 /* clear (again), then enable host interrupts */
2411 _il_wr(il, CSR_INT, 0xFFFFFFFF);
2412 il_enable_interrupts(il);
2414 /* really make sure rfkill handshake bits are cleared */
2415 _il_wr(il, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2416 _il_wr(il, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2418 /* Copy original ucode data image from disk into backup cache.
2419 * This will be used to initialize the on-board processor's
2420 * data SRAM for a clean start when the runtime program first loads. */
2421 memcpy(il->ucode_data_backup.v_addr, il->ucode_data.v_addr,
2422 il->ucode_data.len);
2424 /* We return success when we resume from suspend and rf_kill is on. */
2425 if (test_bit(S_RFKILL, &il->status))
2428 for (i = 0; i < MAX_HW_RESTARTS; i++) {
2430 /* load bootstrap state machine,
2431 * load bootstrap program into processor's memory,
2432 * prepare to load the "initialize" uCode */
2433 rc = il->ops->load_ucode(il);
2436 IL_ERR("Unable to set up bootstrap uCode: %d\n", rc);
2440 /* start card; "initialize" will load runtime ucode */
2441 il3945_nic_start(il);
2443 D_INFO(DRV_NAME " is coming up\n");
2448 set_bit(S_EXIT_PENDING, &il->status);
2450 clear_bit(S_EXIT_PENDING, &il->status);
2452 /* tried to restart and config the device for as long as our
2453 * patience could withstand */
2454 IL_ERR("Unable to initialize device after %d attempts.\n", i);
2458 /*****************************************************************************
2460 * Workqueue callbacks
2462 *****************************************************************************/
2465 il3945_bg_init_alive_start(struct work_struct *data)
2467 struct il_priv *il =
2468 container_of(data, struct il_priv, init_alive_start.work);
2470 mutex_lock(&il->mutex);
2471 if (test_bit(S_EXIT_PENDING, &il->status))
2474 il3945_init_alive_start(il);
2476 mutex_unlock(&il->mutex);
2480 il3945_bg_alive_start(struct work_struct *data)
2482 struct il_priv *il =
2483 container_of(data, struct il_priv, alive_start.work);
2485 mutex_lock(&il->mutex);
2486 if (test_bit(S_EXIT_PENDING, &il->status) || il->txq == NULL)
2489 il3945_alive_start(il);
2491 mutex_unlock(&il->mutex);
2495 * 3945 cannot interrupt driver when hardware rf kill switch toggles;
2496 * driver must poll CSR_GP_CNTRL_REG register for change. This register
2497 * *is* readable even when device has been SW_RESET into low power mode
2498 * (e.g. during RF KILL).
2501 il3945_rfkill_poll(struct work_struct *data)
2503 struct il_priv *il =
2504 container_of(data, struct il_priv, _3945.rfkill_poll.work);
2505 bool old_rfkill = test_bit(S_RFKILL, &il->status);
2507 !(_il_rd(il, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW);
2509 if (new_rfkill != old_rfkill) {
2511 set_bit(S_RFKILL, &il->status);
2513 clear_bit(S_RFKILL, &il->status);
2515 wiphy_rfkill_set_hw_state(il->hw->wiphy, new_rfkill);
2517 D_RF_KILL("RF_KILL bit toggled to %s.\n",
2518 new_rfkill ? "disable radio" : "enable radio");
2521 /* Keep this running, even if radio now enabled. This will be
2522 * cancelled in mac_start() if system decides to start again */
2523 queue_delayed_work(il->workqueue, &il->_3945.rfkill_poll,
2524 round_jiffies_relative(2 * HZ));
2529 il3945_request_scan(struct il_priv *il, struct ieee80211_vif *vif)
2531 struct il_host_cmd cmd = {
2533 .len = sizeof(struct il3945_scan_cmd),
2534 .flags = CMD_SIZE_HUGE,
2536 struct il3945_scan_cmd *scan;
2538 enum nl80211_band band;
2539 bool is_active = false;
2543 lockdep_assert_held(&il->mutex);
2545 if (!il->scan_cmd) {
2547 kmalloc(sizeof(struct il3945_scan_cmd) + IL_MAX_SCAN_SIZE,
2549 if (!il->scan_cmd) {
2550 D_SCAN("Fail to allocate scan memory\n");
2554 scan = il->scan_cmd;
2555 memset(scan, 0, sizeof(struct il3945_scan_cmd) + IL_MAX_SCAN_SIZE);
2557 scan->quiet_plcp_th = IL_PLCP_QUIET_THRESH;
2558 scan->quiet_time = IL_ACTIVE_QUIET_TIME;
2560 if (il_is_associated(il)) {
2563 u32 suspend_time = 100;
2564 u32 scan_suspend_time = 100;
2566 D_INFO("Scanning while associated...\n");
2568 interval = vif->bss_conf.beacon_int;
2570 scan->suspend_time = 0;
2571 scan->max_out_time = cpu_to_le32(200 * 1024);
2573 interval = suspend_time;
2575 * suspend time format:
2576 * 0-19: beacon interval in usec (time before exec.)
2578 * 24-31: number of beacons (suspend between channels)
2581 extra = (suspend_time / interval) << 24;
2583 0xFF0FFFFF & (extra | ((suspend_time % interval) * 1024));
2585 scan->suspend_time = cpu_to_le32(scan_suspend_time);
2586 D_SCAN("suspend_time 0x%X beacon interval %d\n",
2587 scan_suspend_time, interval);
2590 if (il->scan_request->n_ssids) {
2592 D_SCAN("Kicking off active scan\n");
2593 for (i = 0; i < il->scan_request->n_ssids; i++) {
2594 /* always does wildcard anyway */
2595 if (!il->scan_request->ssids[i].ssid_len)
2597 scan->direct_scan[p].id = WLAN_EID_SSID;
2598 scan->direct_scan[p].len =
2599 il->scan_request->ssids[i].ssid_len;
2600 memcpy(scan->direct_scan[p].ssid,
2601 il->scan_request->ssids[i].ssid,
2602 il->scan_request->ssids[i].ssid_len);
2608 D_SCAN("Kicking off passive scan.\n");
2610 /* We don't build a direct scan probe request; the uCode will do
2611 * that based on the direct_mask added to each channel entry */
2612 scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
2613 scan->tx_cmd.sta_id = il->hw_params.bcast_id;
2614 scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
2616 /* flags + rate selection */
2618 switch (il->scan_band) {
2619 case NL80211_BAND_2GHZ:
2620 scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
2621 scan->tx_cmd.rate = RATE_1M_PLCP;
2622 band = NL80211_BAND_2GHZ;
2624 case NL80211_BAND_5GHZ:
2625 scan->tx_cmd.rate = RATE_6M_PLCP;
2626 band = NL80211_BAND_5GHZ;
2629 IL_WARN("Invalid scan band\n");
2634 * If active scaning is requested but a certain channel is marked
2635 * passive, we can do active scanning if we detect transmissions. For
2636 * passive only scanning disable switching to active on any channel.
2639 is_active ? IL_GOOD_CRC_TH_DEFAULT : IL_GOOD_CRC_TH_NEVER;
2642 il_fill_probe_req(il, (struct ieee80211_mgmt *)scan->data,
2643 vif->addr, il->scan_request->ie,
2644 il->scan_request->ie_len,
2645 IL_MAX_SCAN_SIZE - sizeof(*scan));
2646 scan->tx_cmd.len = cpu_to_le16(len);
2648 /* select Rx antennas */
2649 scan->flags |= il3945_get_antenna_flags(il);
2651 scan->channel_count =
2652 il3945_get_channels_for_scan(il, band, is_active, n_probes,
2653 (void *)&scan->data[len], vif);
2654 if (scan->channel_count == 0) {
2655 D_SCAN("channel count %d\n", scan->channel_count);
2660 le16_to_cpu(scan->tx_cmd.len) +
2661 scan->channel_count * sizeof(struct il3945_scan_channel);
2663 scan->len = cpu_to_le16(cmd.len);
2665 set_bit(S_SCAN_HW, &il->status);
2666 ret = il_send_cmd_sync(il, &cmd);
2668 clear_bit(S_SCAN_HW, &il->status);
2673 il3945_post_scan(struct il_priv *il)
2676 * Since setting the RXON may have been deferred while
2677 * performing the scan, fire one off if needed
2679 if (memcmp(&il->staging, &il->active, sizeof(il->staging)))
2680 il3945_commit_rxon(il);
2684 il3945_bg_restart(struct work_struct *data)
2686 struct il_priv *il = container_of(data, struct il_priv, restart);
2688 if (test_bit(S_EXIT_PENDING, &il->status))
2691 if (test_and_clear_bit(S_FW_ERROR, &il->status)) {
2692 mutex_lock(&il->mutex);
2694 mutex_unlock(&il->mutex);
2696 ieee80211_restart_hw(il->hw);
2700 mutex_lock(&il->mutex);
2701 if (test_bit(S_EXIT_PENDING, &il->status)) {
2702 mutex_unlock(&il->mutex);
2707 mutex_unlock(&il->mutex);
2712 il3945_bg_rx_replenish(struct work_struct *data)
2714 struct il_priv *il = container_of(data, struct il_priv, rx_replenish);
2716 mutex_lock(&il->mutex);
2717 if (test_bit(S_EXIT_PENDING, &il->status))
2720 il3945_rx_replenish(il);
2722 mutex_unlock(&il->mutex);
2726 il3945_post_associate(struct il_priv *il)
2729 struct ieee80211_conf *conf = NULL;
2731 if (!il->vif || !il->is_open)
2734 D_ASSOC("Associated as %d to: %pM\n", il->vif->bss_conf.aid,
2735 il->active.bssid_addr);
2737 if (test_bit(S_EXIT_PENDING, &il->status))
2740 il_scan_cancel_timeout(il, 200);
2742 conf = &il->hw->conf;
2744 il->staging.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2745 il3945_commit_rxon(il);
2747 rc = il_send_rxon_timing(il);
2749 IL_WARN("C_RXON_TIMING failed - " "Attempting to continue.\n");
2751 il->staging.filter_flags |= RXON_FILTER_ASSOC_MSK;
2753 il->staging.assoc_id = cpu_to_le16(il->vif->bss_conf.aid);
2755 D_ASSOC("assoc id %d beacon interval %d\n", il->vif->bss_conf.aid,
2756 il->vif->bss_conf.beacon_int);
2758 if (il->vif->bss_conf.use_short_preamble)
2759 il->staging.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
2761 il->staging.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
2763 if (il->staging.flags & RXON_FLG_BAND_24G_MSK) {
2764 if (il->vif->bss_conf.use_short_slot)
2765 il->staging.flags |= RXON_FLG_SHORT_SLOT_MSK;
2767 il->staging.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2770 il3945_commit_rxon(il);
2772 switch (il->vif->type) {
2773 case NL80211_IFTYPE_STATION:
2774 il3945_rate_scale_init(il->hw, IL_AP_ID);
2776 case NL80211_IFTYPE_ADHOC:
2777 il3945_send_beacon_cmd(il);
2780 IL_ERR("%s Should not be called in %d mode\n", __func__,
2786 /*****************************************************************************
2788 * mac80211 entry point functions
2790 *****************************************************************************/
2792 #define UCODE_READY_TIMEOUT (2 * HZ)
2795 il3945_mac_start(struct ieee80211_hw *hw)
2797 struct il_priv *il = hw->priv;
2800 /* we should be verifying the device is ready to be opened */
2801 mutex_lock(&il->mutex);
2802 D_MAC80211("enter\n");
2804 /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
2805 * ucode filename and max sizes are card-specific. */
2807 if (!il->ucode_code.len) {
2808 ret = il3945_read_ucode(il);
2810 IL_ERR("Could not read microcode: %d\n", ret);
2811 mutex_unlock(&il->mutex);
2812 goto out_release_irq;
2816 ret = __il3945_up(il);
2818 mutex_unlock(&il->mutex);
2821 goto out_release_irq;
2823 D_INFO("Start UP work.\n");
2825 /* Wait for START_ALIVE from ucode. Otherwise callbacks from
2826 * mac80211 will not be run successfully. */
2827 ret = wait_event_timeout(il->wait_command_queue,
2828 test_bit(S_READY, &il->status),
2829 UCODE_READY_TIMEOUT);
2831 if (!test_bit(S_READY, &il->status)) {
2832 IL_ERR("Wait for START_ALIVE timeout after %dms.\n",
2833 jiffies_to_msecs(UCODE_READY_TIMEOUT));
2835 goto out_release_irq;
2839 /* ucode is running and will send rfkill notifications,
2840 * no need to poll the killswitch state anymore */
2841 cancel_delayed_work(&il->_3945.rfkill_poll);
2844 D_MAC80211("leave\n");
2849 D_MAC80211("leave - failed\n");
2854 il3945_mac_stop(struct ieee80211_hw *hw)
2856 struct il_priv *il = hw->priv;
2858 D_MAC80211("enter\n");
2861 D_MAC80211("leave - skip\n");
2869 flush_workqueue(il->workqueue);
2871 /* start polling the killswitch state again */
2872 queue_delayed_work(il->workqueue, &il->_3945.rfkill_poll,
2873 round_jiffies_relative(2 * HZ));
2875 D_MAC80211("leave\n");
2879 il3945_mac_tx(struct ieee80211_hw *hw,
2880 struct ieee80211_tx_control *control,
2881 struct sk_buff *skb)
2883 struct il_priv *il = hw->priv;
2885 D_MAC80211("enter\n");
2887 D_TX("dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
2888 ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
2890 if (il3945_tx_skb(il, control->sta, skb))
2891 dev_kfree_skb_any(skb);
2893 D_MAC80211("leave\n");
2897 il3945_config_ap(struct il_priv *il)
2899 struct ieee80211_vif *vif = il->vif;
2902 if (test_bit(S_EXIT_PENDING, &il->status))
2905 /* The following should be done only at AP bring up */
2906 if (!(il_is_associated(il))) {
2908 /* RXON - unassoc (to set timing command) */
2909 il->staging.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2910 il3945_commit_rxon(il);
2913 rc = il_send_rxon_timing(il);
2915 IL_WARN("C_RXON_TIMING failed - "
2916 "Attempting to continue.\n");
2918 il->staging.assoc_id = 0;
2920 if (vif->bss_conf.use_short_preamble)
2921 il->staging.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
2923 il->staging.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
2925 if (il->staging.flags & RXON_FLG_BAND_24G_MSK) {
2926 if (vif->bss_conf.use_short_slot)
2927 il->staging.flags |= RXON_FLG_SHORT_SLOT_MSK;
2929 il->staging.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2931 /* restore RXON assoc */
2932 il->staging.filter_flags |= RXON_FILTER_ASSOC_MSK;
2933 il3945_commit_rxon(il);
2935 il3945_send_beacon_cmd(il);
2939 il3945_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
2940 struct ieee80211_vif *vif, struct ieee80211_sta *sta,
2941 struct ieee80211_key_conf *key)
2943 struct il_priv *il = hw->priv;
2945 u8 sta_id = IL_INVALID_STATION;
2948 D_MAC80211("enter\n");
2950 if (il3945_mod_params.sw_crypto) {
2951 D_MAC80211("leave - hwcrypto disabled\n");
2956 * To support IBSS RSN, don't program group keys in IBSS, the
2957 * hardware will then not attempt to decrypt the frames.
2959 if (vif->type == NL80211_IFTYPE_ADHOC &&
2960 !(key->flags & IEEE80211_KEY_FLAG_PAIRWISE)) {
2961 D_MAC80211("leave - IBSS RSN\n");
2965 static_key = !il_is_associated(il);
2968 sta_id = il_sta_id_or_broadcast(il, sta);
2969 if (sta_id == IL_INVALID_STATION) {
2970 D_MAC80211("leave - station not found\n");
2975 mutex_lock(&il->mutex);
2976 il_scan_cancel_timeout(il, 100);
2981 ret = il3945_set_static_key(il, key);
2983 ret = il3945_set_dynamic_key(il, key, sta_id);
2984 D_MAC80211("enable hwcrypto key\n");
2988 ret = il3945_remove_static_key(il);
2990 ret = il3945_clear_sta_key_info(il, sta_id);
2991 D_MAC80211("disable hwcrypto key\n");
2997 D_MAC80211("leave ret %d\n", ret);
2998 mutex_unlock(&il->mutex);
3004 il3945_mac_sta_add(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
3005 struct ieee80211_sta *sta)
3007 struct il_priv *il = hw->priv;
3008 struct il3945_sta_priv *sta_priv = (void *)sta->drv_priv;
3010 bool is_ap = vif->type == NL80211_IFTYPE_STATION;
3013 mutex_lock(&il->mutex);
3014 D_INFO("station %pM\n", sta->addr);
3015 sta_priv->common.sta_id = IL_INVALID_STATION;
3017 ret = il_add_station_common(il, sta->addr, is_ap, sta, &sta_id);
3019 IL_ERR("Unable to add station %pM (%d)\n", sta->addr, ret);
3020 /* Should we return success if return code is EEXIST ? */
3021 mutex_unlock(&il->mutex);
3025 sta_priv->common.sta_id = sta_id;
3027 /* Initialize rate scaling */
3028 D_INFO("Initializing rate scaling for station %pM\n", sta->addr);
3029 il3945_rs_rate_init(il, sta, sta_id);
3030 mutex_unlock(&il->mutex);
3036 il3945_configure_filter(struct ieee80211_hw *hw, unsigned int changed_flags,
3037 unsigned int *total_flags, u64 multicast)
3039 struct il_priv *il = hw->priv;
3040 __le32 filter_or = 0, filter_nand = 0;
3042 #define CHK(test, flag) do { \
3043 if (*total_flags & (test)) \
3044 filter_or |= (flag); \
3046 filter_nand |= (flag); \
3049 D_MAC80211("Enter: changed: 0x%x, total: 0x%x\n", changed_flags,
3052 CHK(FIF_OTHER_BSS, RXON_FILTER_PROMISC_MSK);
3053 CHK(FIF_CONTROL, RXON_FILTER_CTL2HOST_MSK);
3054 CHK(FIF_BCN_PRBRESP_PROMISC, RXON_FILTER_BCON_AWARE_MSK);
3058 mutex_lock(&il->mutex);
3060 il->staging.filter_flags &= ~filter_nand;
3061 il->staging.filter_flags |= filter_or;
3064 * Not committing directly because hardware can perform a scan,
3065 * but even if hw is ready, committing here breaks for some reason,
3066 * we'll eventually commit the filter flags change anyway.
3069 mutex_unlock(&il->mutex);
3072 * Receiving all multicast frames is always enabled by the
3073 * default flags setup in il_connection_init_rx_config()
3074 * since we currently do not support programming multicast
3075 * filters into the device.
3078 FIF_OTHER_BSS | FIF_ALLMULTI |
3079 FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL;
3082 /*****************************************************************************
3086 *****************************************************************************/
3088 #ifdef CONFIG_IWLEGACY_DEBUG
3091 * The following adds a new attribute to the sysfs representation
3092 * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/)
3093 * used for controlling the debug level.
3095 * See the level definitions in iwl for details.
3097 * The debug_level being managed using sysfs below is a per device debug
3098 * level that is used instead of the global debug level if it (the per
3099 * device debug level) is set.
3102 il3945_show_debug_level(struct device *d, struct device_attribute *attr,
3105 struct il_priv *il = dev_get_drvdata(d);
3106 return sprintf(buf, "0x%08X\n", il_get_debug_level(il));
3110 il3945_store_debug_level(struct device *d, struct device_attribute *attr,
3111 const char *buf, size_t count)
3113 struct il_priv *il = dev_get_drvdata(d);
3117 ret = kstrtoul(buf, 0, &val);
3119 IL_INFO("%s is not in hex or decimal form.\n", buf);
3121 il->debug_level = val;
3123 return strnlen(buf, count);
3126 static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO, il3945_show_debug_level,
3127 il3945_store_debug_level);
3129 #endif /* CONFIG_IWLEGACY_DEBUG */
3132 il3945_show_temperature(struct device *d, struct device_attribute *attr,
3135 struct il_priv *il = dev_get_drvdata(d);
3137 if (!il_is_alive(il))
3140 return sprintf(buf, "%d\n", il3945_hw_get_temperature(il));
3143 static DEVICE_ATTR(temperature, S_IRUGO, il3945_show_temperature, NULL);
3146 il3945_show_tx_power(struct device *d, struct device_attribute *attr, char *buf)
3148 struct il_priv *il = dev_get_drvdata(d);
3149 return sprintf(buf, "%d\n", il->tx_power_user_lmt);
3153 il3945_store_tx_power(struct device *d, struct device_attribute *attr,
3154 const char *buf, size_t count)
3156 struct il_priv *il = dev_get_drvdata(d);
3157 char *p = (char *)buf;
3160 val = simple_strtoul(p, &p, 10);
3162 IL_INFO(": %s is not in decimal form.\n", buf);
3164 il3945_hw_reg_set_txpower(il, val);
3169 static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, il3945_show_tx_power,
3170 il3945_store_tx_power);
3173 il3945_show_flags(struct device *d, struct device_attribute *attr, char *buf)
3175 struct il_priv *il = dev_get_drvdata(d);
3177 return sprintf(buf, "0x%04X\n", il->active.flags);
3181 il3945_store_flags(struct device *d, struct device_attribute *attr,
3182 const char *buf, size_t count)
3184 struct il_priv *il = dev_get_drvdata(d);
3185 u32 flags = simple_strtoul(buf, NULL, 0);
3187 mutex_lock(&il->mutex);
3188 if (le32_to_cpu(il->staging.flags) != flags) {
3189 /* Cancel any currently running scans... */
3190 if (il_scan_cancel_timeout(il, 100))
3191 IL_WARN("Could not cancel scan.\n");
3193 D_INFO("Committing rxon.flags = 0x%04X\n", flags);
3194 il->staging.flags = cpu_to_le32(flags);
3195 il3945_commit_rxon(il);
3198 mutex_unlock(&il->mutex);
3203 static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, il3945_show_flags,
3204 il3945_store_flags);
3207 il3945_show_filter_flags(struct device *d, struct device_attribute *attr,
3210 struct il_priv *il = dev_get_drvdata(d);
3212 return sprintf(buf, "0x%04X\n", le32_to_cpu(il->active.filter_flags));
3216 il3945_store_filter_flags(struct device *d, struct device_attribute *attr,
3217 const char *buf, size_t count)
3219 struct il_priv *il = dev_get_drvdata(d);
3220 u32 filter_flags = simple_strtoul(buf, NULL, 0);
3222 mutex_lock(&il->mutex);
3223 if (le32_to_cpu(il->staging.filter_flags) != filter_flags) {
3224 /* Cancel any currently running scans... */
3225 if (il_scan_cancel_timeout(il, 100))
3226 IL_WARN("Could not cancel scan.\n");
3228 D_INFO("Committing rxon.filter_flags = " "0x%04X\n",
3230 il->staging.filter_flags = cpu_to_le32(filter_flags);
3231 il3945_commit_rxon(il);
3234 mutex_unlock(&il->mutex);
3239 static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, il3945_show_filter_flags,
3240 il3945_store_filter_flags);
3243 il3945_show_measurement(struct device *d, struct device_attribute *attr,
3246 struct il_priv *il = dev_get_drvdata(d);
3247 struct il_spectrum_notification measure_report;
3248 u32 size = sizeof(measure_report), len = 0, ofs = 0;
3249 u8 *data = (u8 *) &measure_report;
3250 unsigned long flags;
3252 spin_lock_irqsave(&il->lock, flags);
3253 if (!(il->measurement_status & MEASUREMENT_READY)) {
3254 spin_unlock_irqrestore(&il->lock, flags);
3257 memcpy(&measure_report, &il->measure_report, size);
3258 il->measurement_status = 0;
3259 spin_unlock_irqrestore(&il->lock, flags);
3261 while (size && PAGE_SIZE - len) {
3262 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
3263 PAGE_SIZE - len, true);
3265 if (PAGE_SIZE - len)
3269 size -= min(size, 16U);
3276 il3945_store_measurement(struct device *d, struct device_attribute *attr,
3277 const char *buf, size_t count)
3279 struct il_priv *il = dev_get_drvdata(d);
3280 struct ieee80211_measurement_params params = {
3281 .channel = le16_to_cpu(il->active.channel),
3282 .start_time = cpu_to_le64(il->_3945.last_tsf),
3283 .duration = cpu_to_le16(1),
3285 u8 type = IL_MEASURE_BASIC;
3291 strlcpy(buffer, buf, sizeof(buffer));
3292 channel = simple_strtoul(p, NULL, 0);
3294 params.channel = channel;
3297 while (*p && *p != ' ')
3300 type = simple_strtoul(p + 1, NULL, 0);
3303 D_INFO("Invoking measurement of type %d on " "channel %d (for '%s')\n",
3304 type, params.channel, buf);
3305 il3945_get_measurement(il, ¶ms, type);
3310 static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR, il3945_show_measurement,
3311 il3945_store_measurement);
3314 il3945_store_retry_rate(struct device *d, struct device_attribute *attr,
3315 const char *buf, size_t count)
3317 struct il_priv *il = dev_get_drvdata(d);
3319 il->retry_rate = simple_strtoul(buf, NULL, 0);
3320 if (il->retry_rate <= 0)
3327 il3945_show_retry_rate(struct device *d, struct device_attribute *attr,
3330 struct il_priv *il = dev_get_drvdata(d);
3331 return sprintf(buf, "%d", il->retry_rate);
3334 static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, il3945_show_retry_rate,
3335 il3945_store_retry_rate);
3338 il3945_show_channels(struct device *d, struct device_attribute *attr, char *buf)
3340 /* all this shit doesn't belong into sysfs anyway */
3344 static DEVICE_ATTR(channels, S_IRUSR, il3945_show_channels, NULL);
3347 il3945_show_antenna(struct device *d, struct device_attribute *attr, char *buf)
3349 struct il_priv *il = dev_get_drvdata(d);
3351 if (!il_is_alive(il))
3354 return sprintf(buf, "%d\n", il3945_mod_params.antenna);
3358 il3945_store_antenna(struct device *d, struct device_attribute *attr,
3359 const char *buf, size_t count)
3361 struct il_priv *il __maybe_unused = dev_get_drvdata(d);
3367 if (sscanf(buf, "%1i", &ant) != 1) {
3368 D_INFO("not in hex or decimal form.\n");
3372 if (ant >= 0 && ant <= 2) {
3373 D_INFO("Setting antenna select to %d.\n", ant);
3374 il3945_mod_params.antenna = (enum il3945_antenna)ant;
3376 D_INFO("Bad antenna select value %d.\n", ant);
3381 static DEVICE_ATTR(antenna, S_IWUSR | S_IRUGO, il3945_show_antenna,
3382 il3945_store_antenna);
3385 il3945_show_status(struct device *d, struct device_attribute *attr, char *buf)
3387 struct il_priv *il = dev_get_drvdata(d);
3388 if (!il_is_alive(il))
3390 return sprintf(buf, "0x%08x\n", (int)il->status);
3393 static DEVICE_ATTR(status, S_IRUGO, il3945_show_status, NULL);
3396 il3945_dump_error_log(struct device *d, struct device_attribute *attr,
3397 const char *buf, size_t count)
3399 struct il_priv *il = dev_get_drvdata(d);
3400 char *p = (char *)buf;
3403 il3945_dump_nic_error_log(il);
3405 return strnlen(buf, count);
3408 static DEVICE_ATTR(dump_errors, S_IWUSR, NULL, il3945_dump_error_log);
3410 /*****************************************************************************
3412 * driver setup and tear down
3414 *****************************************************************************/
3417 il3945_setup_deferred_work(struct il_priv *il)
3419 il->workqueue = create_singlethread_workqueue(DRV_NAME);
3421 init_waitqueue_head(&il->wait_command_queue);
3423 INIT_WORK(&il->restart, il3945_bg_restart);
3424 INIT_WORK(&il->rx_replenish, il3945_bg_rx_replenish);
3425 INIT_DELAYED_WORK(&il->init_alive_start, il3945_bg_init_alive_start);
3426 INIT_DELAYED_WORK(&il->alive_start, il3945_bg_alive_start);
3427 INIT_DELAYED_WORK(&il->_3945.rfkill_poll, il3945_rfkill_poll);
3429 il_setup_scan_deferred_work(il);
3431 il3945_hw_setup_deferred_work(il);
3433 setup_timer(&il->watchdog, il_bg_watchdog, (unsigned long)il);
3435 tasklet_init(&il->irq_tasklet,
3441 il3945_cancel_deferred_work(struct il_priv *il)
3443 il3945_hw_cancel_deferred_work(il);
3445 cancel_delayed_work_sync(&il->init_alive_start);
3446 cancel_delayed_work(&il->alive_start);
3448 il_cancel_scan_deferred_work(il);
3451 static struct attribute *il3945_sysfs_entries[] = {
3452 &dev_attr_antenna.attr,
3453 &dev_attr_channels.attr,
3454 &dev_attr_dump_errors.attr,
3455 &dev_attr_flags.attr,
3456 &dev_attr_filter_flags.attr,
3457 &dev_attr_measurement.attr,
3458 &dev_attr_retry_rate.attr,
3459 &dev_attr_status.attr,
3460 &dev_attr_temperature.attr,
3461 &dev_attr_tx_power.attr,
3462 #ifdef CONFIG_IWLEGACY_DEBUG
3463 &dev_attr_debug_level.attr,
3468 static struct attribute_group il3945_attribute_group = {
3469 .name = NULL, /* put in device directory */
3470 .attrs = il3945_sysfs_entries,
3473 static struct ieee80211_ops il3945_mac_ops __read_mostly = {
3474 .tx = il3945_mac_tx,
3475 .start = il3945_mac_start,
3476 .stop = il3945_mac_stop,
3477 .add_interface = il_mac_add_interface,
3478 .remove_interface = il_mac_remove_interface,
3479 .change_interface = il_mac_change_interface,
3480 .config = il_mac_config,
3481 .configure_filter = il3945_configure_filter,
3482 .set_key = il3945_mac_set_key,
3483 .conf_tx = il_mac_conf_tx,
3484 .reset_tsf = il_mac_reset_tsf,
3485 .bss_info_changed = il_mac_bss_info_changed,
3486 .hw_scan = il_mac_hw_scan,
3487 .sta_add = il3945_mac_sta_add,
3488 .sta_remove = il_mac_sta_remove,
3489 .tx_last_beacon = il_mac_tx_last_beacon,
3490 .flush = il_mac_flush,
3494 il3945_init_drv(struct il_priv *il)
3497 struct il3945_eeprom *eeprom = (struct il3945_eeprom *)il->eeprom;
3500 il->beacon_skb = NULL;
3502 spin_lock_init(&il->sta_lock);
3503 spin_lock_init(&il->hcmd_lock);
3505 INIT_LIST_HEAD(&il->free_frames);
3507 mutex_init(&il->mutex);
3509 il->ieee_channels = NULL;
3510 il->ieee_rates = NULL;
3511 il->band = NL80211_BAND_2GHZ;
3513 il->iw_mode = NL80211_IFTYPE_STATION;
3514 il->missed_beacon_threshold = IL_MISSED_BEACON_THRESHOLD_DEF;
3516 /* initialize force reset */
3517 il->force_reset.reset_duration = IL_DELAY_NEXT_FORCE_FW_RELOAD;
3519 if (eeprom->version < EEPROM_3945_EEPROM_VERSION) {
3520 IL_WARN("Unsupported EEPROM version: 0x%04X\n",
3525 ret = il_init_channel_map(il);
3527 IL_ERR("initializing regulatory failed: %d\n", ret);
3531 /* Set up txpower settings in driver for all channels */
3532 if (il3945_txpower_set_from_eeprom(il)) {
3534 goto err_free_channel_map;
3537 ret = il_init_geos(il);
3539 IL_ERR("initializing geos failed: %d\n", ret);
3540 goto err_free_channel_map;
3542 il3945_init_hw_rates(il, il->ieee_rates);
3546 err_free_channel_map:
3547 il_free_channel_map(il);
3552 #define IL3945_MAX_PROBE_REQUEST 200
3555 il3945_setup_mac(struct il_priv *il)
3558 struct ieee80211_hw *hw = il->hw;
3560 hw->rate_control_algorithm = "iwl-3945-rs";
3561 hw->sta_data_size = sizeof(struct il3945_sta_priv);
3562 hw->vif_data_size = sizeof(struct il_vif_priv);
3564 /* Tell mac80211 our characteristics */
3565 ieee80211_hw_set(hw, SUPPORTS_DYNAMIC_PS);
3566 ieee80211_hw_set(hw, SUPPORTS_PS);
3567 ieee80211_hw_set(hw, SIGNAL_DBM);
3568 ieee80211_hw_set(hw, SPECTRUM_MGMT);
3570 hw->wiphy->interface_modes =
3571 BIT(NL80211_IFTYPE_STATION) | BIT(NL80211_IFTYPE_ADHOC);
3573 hw->wiphy->flags |= WIPHY_FLAG_IBSS_RSN;
3574 hw->wiphy->regulatory_flags |= REGULATORY_CUSTOM_REG |
3575 REGULATORY_DISABLE_BEACON_HINTS;
3577 hw->wiphy->flags &= ~WIPHY_FLAG_PS_ON_BY_DEFAULT;
3579 hw->wiphy->max_scan_ssids = PROBE_OPTION_MAX_3945;
3580 /* we create the 802.11 header and a zero-length SSID element */
3581 hw->wiphy->max_scan_ie_len = IL3945_MAX_PROBE_REQUEST - 24 - 2;
3583 /* Default value; 4 EDCA QOS priorities */
3586 if (il->bands[NL80211_BAND_2GHZ].n_channels)
3587 il->hw->wiphy->bands[NL80211_BAND_2GHZ] =
3588 &il->bands[NL80211_BAND_2GHZ];
3590 if (il->bands[NL80211_BAND_5GHZ].n_channels)
3591 il->hw->wiphy->bands[NL80211_BAND_5GHZ] =
3592 &il->bands[NL80211_BAND_5GHZ];
3596 ret = ieee80211_register_hw(il->hw);
3598 IL_ERR("Failed to register hw (error %d)\n", ret);
3601 il->mac80211_registered = 1;
3607 il3945_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
3611 struct ieee80211_hw *hw;
3612 struct il_cfg *cfg = (struct il_cfg *)(ent->driver_data);
3613 struct il3945_eeprom *eeprom;
3614 unsigned long flags;
3616 /***********************
3617 * 1. Allocating HW data
3618 * ********************/
3620 hw = ieee80211_alloc_hw(sizeof(struct il_priv), &il3945_mac_ops);
3627 SET_IEEE80211_DEV(hw, &pdev->dev);
3629 il->cmd_queue = IL39_CMD_QUEUE_NUM;
3632 * Disabling hardware scan means that mac80211 will perform scans
3633 * "the hard way", rather than using device's scan.
3635 if (il3945_mod_params.disable_hw_scan) {
3636 D_INFO("Disabling hw_scan\n");
3637 il3945_mac_ops.hw_scan = NULL;
3640 D_INFO("*** LOAD DRIVER ***\n");
3642 il->ops = &il3945_ops;
3643 #ifdef CONFIG_IWLEGACY_DEBUGFS
3644 il->debugfs_ops = &il3945_debugfs_ops;
3647 il->inta_mask = CSR_INI_SET_MASK;
3649 /***************************
3650 * 2. Initializing PCI bus
3651 * *************************/
3652 pci_disable_link_state(pdev,
3653 PCIE_LINK_STATE_L0S | PCIE_LINK_STATE_L1 |
3654 PCIE_LINK_STATE_CLKPM);
3656 if (pci_enable_device(pdev)) {
3658 goto out_ieee80211_free_hw;
3661 pci_set_master(pdev);
3663 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
3665 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
3667 IL_WARN("No suitable DMA available.\n");
3668 goto out_pci_disable_device;
3671 pci_set_drvdata(pdev, il);
3672 err = pci_request_regions(pdev, DRV_NAME);
3674 goto out_pci_disable_device;
3676 /***********************
3677 * 3. Read REV Register
3678 * ********************/
3679 il->hw_base = pci_ioremap_bar(pdev, 0);
3682 goto out_pci_release_regions;
3685 D_INFO("pci_resource_len = 0x%08llx\n",
3686 (unsigned long long)pci_resource_len(pdev, 0));
3687 D_INFO("pci_resource_base = %p\n", il->hw_base);
3689 /* We disable the RETRY_TIMEOUT register (0x41) to keep
3690 * PCI Tx retries from interfering with C3 CPU state */
3691 pci_write_config_byte(pdev, 0x41, 0x00);
3693 /* these spin locks will be used in apm_init and EEPROM access
3694 * we should init now
3696 spin_lock_init(&il->reg_lock);
3697 spin_lock_init(&il->lock);
3700 * stop and reset the on-board processor just in case it is in a
3701 * strange state ... like being left stranded by a primary kernel
3702 * and this is now the kdump kernel trying to start up
3704 _il_wr(il, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
3706 /***********************
3708 * ********************/
3710 /* Read the EEPROM */
3711 err = il_eeprom_init(il);
3713 IL_ERR("Unable to init EEPROM\n");
3716 /* MAC Address location in EEPROM same for 3945/4965 */
3717 eeprom = (struct il3945_eeprom *)il->eeprom;
3718 D_INFO("MAC address: %pM\n", eeprom->mac_address);
3719 SET_IEEE80211_PERM_ADDR(il->hw, eeprom->mac_address);
3721 /***********************
3722 * 5. Setup HW Constants
3723 * ********************/
3724 /* Device-specific setup */
3725 err = il3945_hw_set_hw_params(il);
3727 IL_ERR("failed to set hw settings\n");
3728 goto out_eeprom_free;
3731 /***********************
3733 * ********************/
3735 err = il3945_init_drv(il);
3737 IL_ERR("initializing driver failed\n");
3738 goto out_unset_hw_params;
3741 IL_INFO("Detected Intel Wireless WiFi Link %s\n", il->cfg->name);
3743 /***********************
3745 * ********************/
3747 spin_lock_irqsave(&il->lock, flags);
3748 il_disable_interrupts(il);
3749 spin_unlock_irqrestore(&il->lock, flags);
3751 pci_enable_msi(il->pci_dev);
3753 err = request_irq(il->pci_dev->irq, il_isr, IRQF_SHARED, DRV_NAME, il);
3755 IL_ERR("Error allocating IRQ %d\n", il->pci_dev->irq);
3756 goto out_disable_msi;
3759 err = sysfs_create_group(&pdev->dev.kobj, &il3945_attribute_group);
3761 IL_ERR("failed to create sysfs device attributes\n");
3762 goto out_release_irq;
3765 il_set_rxon_channel(il, &il->bands[NL80211_BAND_2GHZ].channels[5]);
3766 il3945_setup_deferred_work(il);
3767 il3945_setup_handlers(il);
3768 il_power_initialize(il);
3770 /*********************************
3771 * 8. Setup and Register mac80211
3772 * *******************************/
3774 il_enable_interrupts(il);
3776 err = il3945_setup_mac(il);
3778 goto out_remove_sysfs;
3780 err = il_dbgfs_register(il, DRV_NAME);
3782 IL_ERR("failed to create debugfs files. Ignoring error: %d\n",
3785 /* Start monitoring the killswitch */
3786 queue_delayed_work(il->workqueue, &il->_3945.rfkill_poll, 2 * HZ);
3791 destroy_workqueue(il->workqueue);
3792 il->workqueue = NULL;
3793 sysfs_remove_group(&pdev->dev.kobj, &il3945_attribute_group);
3795 free_irq(il->pci_dev->irq, il);
3797 pci_disable_msi(il->pci_dev);
3799 il_free_channel_map(il);
3800 out_unset_hw_params:
3801 il3945_unset_hw_params(il);
3805 iounmap(il->hw_base);
3806 out_pci_release_regions:
3807 pci_release_regions(pdev);
3808 out_pci_disable_device:
3809 pci_disable_device(pdev);
3810 out_ieee80211_free_hw:
3811 ieee80211_free_hw(il->hw);
3817 il3945_pci_remove(struct pci_dev *pdev)
3819 struct il_priv *il = pci_get_drvdata(pdev);
3820 unsigned long flags;
3825 D_INFO("*** UNLOAD DRIVER ***\n");
3827 il_dbgfs_unregister(il);
3829 set_bit(S_EXIT_PENDING, &il->status);
3833 if (il->mac80211_registered) {
3834 ieee80211_unregister_hw(il->hw);
3835 il->mac80211_registered = 0;
3841 * Make sure device is reset to low power before unloading driver.
3842 * This may be redundant with il_down(), but there are paths to
3843 * run il_down() without calling apm_ops.stop(), and there are
3844 * paths to avoid running il_down() at all before leaving driver.
3845 * This (inexpensive) call *makes sure* device is reset.
3849 /* make sure we flush any pending irq or
3850 * tasklet for the driver
3852 spin_lock_irqsave(&il->lock, flags);
3853 il_disable_interrupts(il);
3854 spin_unlock_irqrestore(&il->lock, flags);
3856 il3945_synchronize_irq(il);
3858 sysfs_remove_group(&pdev->dev.kobj, &il3945_attribute_group);
3860 cancel_delayed_work_sync(&il->_3945.rfkill_poll);
3862 il3945_dealloc_ucode_pci(il);
3865 il3945_rx_queue_free(il, &il->rxq);
3866 il3945_hw_txq_ctx_free(il);
3868 il3945_unset_hw_params(il);
3870 /*netif_stop_queue(dev); */
3871 flush_workqueue(il->workqueue);
3873 /* ieee80211_unregister_hw calls il3945_mac_stop, which flushes
3874 * il->workqueue... so we can't take down the workqueue
3876 destroy_workqueue(il->workqueue);
3877 il->workqueue = NULL;
3879 free_irq(pdev->irq, il);
3880 pci_disable_msi(pdev);
3882 iounmap(il->hw_base);
3883 pci_release_regions(pdev);
3884 pci_disable_device(pdev);
3886 il_free_channel_map(il);
3888 kfree(il->scan_cmd);
3890 dev_kfree_skb(il->beacon_skb);
3892 ieee80211_free_hw(il->hw);
3895 /*****************************************************************************
3897 * driver and module entry point
3899 *****************************************************************************/
3901 static struct pci_driver il3945_driver = {
3903 .id_table = il3945_hw_card_ids,
3904 .probe = il3945_pci_probe,
3905 .remove = il3945_pci_remove,
3906 .driver.pm = IL_LEGACY_PM_OPS,
3914 pr_info(DRV_DESCRIPTION ", " DRV_VERSION "\n");
3915 pr_info(DRV_COPYRIGHT "\n");
3917 ret = il3945_rate_control_register();
3919 pr_err("Unable to register rate control algorithm: %d\n", ret);
3923 ret = pci_register_driver(&il3945_driver);
3925 pr_err("Unable to initialize PCI module\n");
3926 goto error_register;
3932 il3945_rate_control_unregister();
3939 pci_unregister_driver(&il3945_driver);
3940 il3945_rate_control_unregister();
3945 module_param_named(antenna, il3945_mod_params.antenna, int, S_IRUGO);
3946 MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
3947 module_param_named(swcrypto, il3945_mod_params.sw_crypto, int, S_IRUGO);
3948 MODULE_PARM_DESC(swcrypto, "using software crypto (default 1 [software])");
3949 module_param_named(disable_hw_scan, il3945_mod_params.disable_hw_scan, int,
3951 MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 1)");
3952 #ifdef CONFIG_IWLEGACY_DEBUG
3953 module_param_named(debug, il_debug_level, uint, S_IRUGO | S_IWUSR);
3954 MODULE_PARM_DESC(debug, "debug output mask");
3956 module_param_named(fw_restart, il3945_mod_params.restart_fw, int, S_IRUGO);
3957 MODULE_PARM_DESC(fw_restart, "restart firmware in case of error");
3959 module_exit(il3945_exit);
3960 module_init(il3945_init);