drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c

   1 /*
   2  * Copyright (c) 2010 Broadcom Corporation
   3  *
   4  * Permission to use, copy, modify, and/or distribute this software for any
   5  * purpose with or without fee is hereby granted, provided that the above
   6  * copyright notice and this permission notice appear in all copies.
   7  *
   8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
   9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
  11  * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
  13  * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
  14  * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15  */
  16
  17 #include <linux/types.h>
  18 #include <linux/atomic.h>
  19 #include <linux/kernel.h>
  20 #include <linux/kthread.h>
  21 #include <linux/printk.h>
  22 #include <linux/pci_ids.h>
  23 #include <linux/netdevice.h>
  24 #include <linux/interrupt.h>
  25 #include <linux/sched/signal.h>
  26 #include <linux/mmc/sdio.h>
  27 #include <linux/mmc/sdio_ids.h>
  28 #include <linux/mmc/sdio_func.h>
  29 #include <linux/mmc/card.h>
  30 #include <linux/semaphore.h>
  31 #include <linux/firmware.h>
  32 #include <linux/module.h>
  33 #include <linux/bcma/bcma.h>
  34 #include <linux/debugfs.h>
  35 #include <linux/vmalloc.h>
  36 #include <asm/unaligned.h>
  37 #include <defs.h>
  38 #include <brcmu_wifi.h>
  39 #include <brcmu_utils.h>
  40 #include <brcm_hw_ids.h>
  41 #include <soc.h>
  42 #include "sdio.h"
  43 #include "chip.h"
  44 #include "firmware.h"
  45 #include "core.h"
  46 #include "common.h"
  47 #include "bcdc.h"
  48
  49 #define DCMD_RESP_TIMEOUT       msecs_to_jiffies(2500)
  50 #define CTL_DONE_TIMEOUT        msecs_to_jiffies(2500)
  51
  52 #ifdef DEBUG
  53
  54 #define BRCMF_TRAP_INFO_SIZE    80
  55
  56 #define CBUF_LEN        (128)
  57
  58 /* Device console log buffer state */
  59 #define CONSOLE_BUFFER_MAX      2024
  60
  61 struct rte_log_le {
  62         __le32 buf;             /* Can't be pointer on (64-bit) hosts */
  63         __le32 buf_size;
  64         __le32 idx;
  65         char *_buf_compat;      /* Redundant pointer for backward compat. */
  66 };
  67
  68 struct rte_console {
  69         /* Virtual UART
  70          * When there is no UART (e.g. Quickturn),
  71          * the host should write a complete
  72          * input line directly into cbuf and then write
  73          * the length into vcons_in.
  74          * This may also be used when there is a real UART
  75          * (at risk of conflicting with
  76          * the real UART).  vcons_out is currently unused.
  77          */
  78         uint vcons_in;
  79         uint vcons_out;
  80
  81         /* Output (logging) buffer
  82          * Console output is written to a ring buffer log_buf at index log_idx.
  83          * The host may read the output when it sees log_idx advance.
  84          * Output will be lost if the output wraps around faster than the host
  85          * polls.
  86          */
  87         struct rte_log_le log_le;
  88
  89         /* Console input line buffer
  90          * Characters are read one at a time into cbuf
  91          * until <CR> is received, then
  92          * the buffer is processed as a command line.
  93          * Also used for virtual UART.
  94          */
  95         uint cbuf_idx;
  96         char cbuf[CBUF_LEN];
  97 };
  98
  99 #endif                          /* DEBUG */
 100 #include <chipcommon.h>
 101
 102 #include "bus.h"
 103 #include "debug.h"
 104 #include "tracepoint.h"
 105
 106 #define TXQLEN          2048    /* bulk tx queue length */
 107 #define TXHI            (TXQLEN - 256)  /* turn on flow control above TXHI */
 108 #define TXLOW           (TXHI - 256)    /* turn off flow control below TXLOW */
 109 #define PRIOMASK        7
 110
 111 #define TXRETRIES       2       /* # of retries for tx frames */
 112
 113 #define BRCMF_RXBOUND   50      /* Default for max rx frames in
 114                                  one scheduling */
 115
 116 #define BRCMF_TXBOUND   20      /* Default for max tx frames in
 117                                  one scheduling */
 118
 119 #define BRCMF_TXMINMAX  1       /* Max tx frames if rx still pending */
 120
 121 #define MEMBLOCK        2048    /* Block size used for downloading
 122                                  of dongle image */
 123 #define MAX_DATA_BUF    (32 * 1024)     /* Must be large enough to hold
 124                                  biggest possible glom */
 125
 126 #define BRCMF_FIRSTREAD (1 << 6)
 127
 128 #define BRCMF_CONSOLE   10      /* watchdog interval to poll console */
 129
 130 /* SBSDIO_DEVICE_CTL */
 131
 132 /* 1: device will assert busy signal when receiving CMD53 */
 133 #define SBSDIO_DEVCTL_SETBUSY           0x01
 134 /* 1: assertion of sdio interrupt is synchronous to the sdio clock */
 135 #define SBSDIO_DEVCTL_SPI_INTR_SYNC     0x02
 136 /* 1: mask all interrupts to host except the chipActive (rev 8) */
 137 #define SBSDIO_DEVCTL_CA_INT_ONLY       0x04
 138 /* 1: isolate internal sdio signals, put external pads in tri-state; requires
 139  * sdio bus power cycle to clear (rev 9) */
 140 #define SBSDIO_DEVCTL_PADS_ISO          0x08
 141 /* Force SD->SB reset mapping (rev 11) */
 142 #define SBSDIO_DEVCTL_SB_RST_CTL        0x30
 143 /*   Determined by CoreControl bit */
 144 #define SBSDIO_DEVCTL_RST_CORECTL       0x00
 145 /*   Force backplane reset */
 146 #define SBSDIO_DEVCTL_RST_BPRESET       0x10
 147 /*   Force no backplane reset */
 148 #define SBSDIO_DEVCTL_RST_NOBPRESET     0x20
 149
 150 /* direct(mapped) cis space */
 151
 152 /* MAPPED common CIS address */
 153 #define SBSDIO_CIS_BASE_COMMON          0x1000
 154 /* maximum bytes in one CIS */
 155 #define SBSDIO_CIS_SIZE_LIMIT           0x200
 156 /* cis offset addr is < 17 bits */
 157 #define SBSDIO_CIS_OFT_ADDR_MASK        0x1FFFF
 158
 159 /* manfid tuple length, include tuple, link bytes */
 160 #define SBSDIO_CIS_MANFID_TUPLE_LEN     6
 161
 162 #define CORE_BUS_REG(base, field) \
 163                 (base + offsetof(struct sdpcmd_regs, field))
 164
 165 /* SDIO function 1 register CHIPCLKCSR */
 166 /* Force ALP request to backplane */
 167 #define SBSDIO_FORCE_ALP                0x01
 168 /* Force HT request to backplane */
 169 #define SBSDIO_FORCE_HT                 0x02
 170 /* Force ILP request to backplane */
 171 #define SBSDIO_FORCE_ILP                0x04
 172 /* Make ALP ready (power up xtal) */
 173 #define SBSDIO_ALP_AVAIL_REQ            0x08
 174 /* Make HT ready (power up PLL) */
 175 #define SBSDIO_HT_AVAIL_REQ             0x10
 176 /* Squelch clock requests from HW */
 177 #define SBSDIO_FORCE_HW_CLKREQ_OFF      0x20
 178 /* Status: ALP is ready */
 179 #define SBSDIO_ALP_AVAIL                0x40
 180 /* Status: HT is ready */
 181 #define SBSDIO_HT_AVAIL                 0x80
 182 #define SBSDIO_CSR_MASK                 0x1F
 183 #define SBSDIO_AVBITS           (SBSDIO_HT_AVAIL | SBSDIO_ALP_AVAIL)
 184 #define SBSDIO_ALPAV(regval)    ((regval) & SBSDIO_AVBITS)
 185 #define SBSDIO_HTAV(regval)     (((regval) & SBSDIO_AVBITS) == SBSDIO_AVBITS)
 186 #define SBSDIO_ALPONLY(regval)  (SBSDIO_ALPAV(regval) && !SBSDIO_HTAV(regval))
 187 #define SBSDIO_CLKAV(regval, alponly) \
 188         (SBSDIO_ALPAV(regval) && (alponly ? 1 : SBSDIO_HTAV(regval)))
 189
 190 /* intstatus */
 191 #define I_SMB_SW0       (1 << 0)        /* To SB Mail S/W interrupt 0 */
 192 #define I_SMB_SW1       (1 << 1)        /* To SB Mail S/W interrupt 1 */
 193 #define I_SMB_SW2       (1 << 2)        /* To SB Mail S/W interrupt 2 */
 194 #define I_SMB_SW3       (1 << 3)        /* To SB Mail S/W interrupt 3 */
 195 #define I_SMB_SW_MASK   0x0000000f      /* To SB Mail S/W interrupts mask */
 196 #define I_SMB_SW_SHIFT  0       /* To SB Mail S/W interrupts shift */
 197 #define I_HMB_SW0       (1 << 4)        /* To Host Mail S/W interrupt 0 */
 198 #define I_HMB_SW1       (1 << 5)        /* To Host Mail S/W interrupt 1 */
 199 #define I_HMB_SW2       (1 << 6)        /* To Host Mail S/W interrupt 2 */
 200 #define I_HMB_SW3       (1 << 7)        /* To Host Mail S/W interrupt 3 */
 201 #define I_HMB_SW_MASK   0x000000f0      /* To Host Mail S/W interrupts mask */
 202 #define I_HMB_SW_SHIFT  4       /* To Host Mail S/W interrupts shift */
 203 #define I_WR_OOSYNC     (1 << 8)        /* Write Frame Out Of Sync */
 204 #define I_RD_OOSYNC     (1 << 9)        /* Read Frame Out Of Sync */
 205 #define I_PC            (1 << 10)       /* descriptor error */
 206 #define I_PD            (1 << 11)       /* data error */
 207 #define I_DE            (1 << 12)       /* Descriptor protocol Error */
 208 #define I_RU            (1 << 13)       /* Receive descriptor Underflow */
 209 #define I_RO            (1 << 14)       /* Receive fifo Overflow */
 210 #define I_XU            (1 << 15)       /* Transmit fifo Underflow */
 211 #define I_RI            (1 << 16)       /* Receive Interrupt */
 212 #define I_BUSPWR        (1 << 17)       /* SDIO Bus Power Change (rev 9) */
 213 #define I_XMTDATA_AVAIL (1 << 23)       /* bits in fifo */
 214 #define I_XI            (1 << 24)       /* Transmit Interrupt */
 215 #define I_RF_TERM       (1 << 25)       /* Read Frame Terminate */
 216 #define I_WF_TERM       (1 << 26)       /* Write Frame Terminate */
 217 #define I_PCMCIA_XU     (1 << 27)       /* PCMCIA Transmit FIFO Underflow */
 218 #define I_SBINT         (1 << 28)       /* sbintstatus Interrupt */
 219 #define I_CHIPACTIVE    (1 << 29)       /* chip from doze to active state */
 220 #define I_SRESET        (1 << 30)       /* CCCR RES interrupt */
 221 #define I_IOE2          (1U << 31)      /* CCCR IOE2 Bit Changed */
 222 #define I_ERRORS        (I_PC | I_PD | I_DE | I_RU | I_RO | I_XU)
 223 #define I_DMA           (I_RI | I_XI | I_ERRORS)
 224
 225 /* corecontrol */
 226 #define CC_CISRDY               (1 << 0)        /* CIS Ready */
 227 #define CC_BPRESEN              (1 << 1)        /* CCCR RES signal */
 228 #define CC_F2RDY                (1 << 2)        /* set CCCR IOR2 bit */
 229 #define CC_CLRPADSISO           (1 << 3)        /* clear SDIO pads isolation */
 230 #define CC_XMTDATAAVAIL_MODE    (1 << 4)
 231 #define CC_XMTDATAAVAIL_CTRL    (1 << 5)
 232
 233 /* SDA_FRAMECTRL */
 234 #define SFC_RF_TERM     (1 << 0)        /* Read Frame Terminate */
 235 #define SFC_WF_TERM     (1 << 1)        /* Write Frame Terminate */
 236 #define SFC_CRC4WOOS    (1 << 2)        /* CRC error for write out of sync */
 237 #define SFC_ABORTALL    (1 << 3)        /* Abort all in-progress frames */
 238
 239 /*
 240  * Software allocation of To SB Mailbox resources
 241  */
 242
 243 /* tosbmailbox bits corresponding to intstatus bits */
 244 #define SMB_NAK         (1 << 0)        /* Frame NAK */
 245 #define SMB_INT_ACK     (1 << 1)        /* Host Interrupt ACK */
 246 #define SMB_USE_OOB     (1 << 2)        /* Use OOB Wakeup */
 247 #define SMB_DEV_INT     (1 << 3)        /* Miscellaneous Interrupt */
 248
 249 /* tosbmailboxdata */
 250 #define SMB_DATA_VERSION_SHIFT  16      /* host protocol version */
 251
 252 /*
 253  * Software allocation of To Host Mailbox resources
 254  */
 255
 256 /* intstatus bits */
 257 #define I_HMB_FC_STATE  I_HMB_SW0       /* Flow Control State */
 258 #define I_HMB_FC_CHANGE I_HMB_SW1       /* Flow Control State Changed */
 259 #define I_HMB_FRAME_IND I_HMB_SW2       /* Frame Indication */
 260 #define I_HMB_HOST_INT  I_HMB_SW3       /* Miscellaneous Interrupt */
 261
 262 /* tohostmailboxdata */
 263 #define HMB_DATA_NAKHANDLED     1       /* retransmit NAK'd frame */
 264 #define HMB_DATA_DEVREADY       2       /* talk to host after enable */
 265 #define HMB_DATA_FC             4       /* per prio flowcontrol update flag */
 266 #define HMB_DATA_FWREADY        8       /* fw ready for protocol activity */
 267
 268 #define HMB_DATA_FCDATA_MASK    0xff000000
 269 #define HMB_DATA_FCDATA_SHIFT   24
 270
 271 #define HMB_DATA_VERSION_MASK   0x00ff0000
 272 #define HMB_DATA_VERSION_SHIFT  16
 273
 274 /*
 275  * Software-defined protocol header
 276  */
 277
 278 /* Current protocol version */
 279 #define SDPCM_PROT_VERSION      4
 280
 281 /*
 282  * Shared structure between dongle and the host.
 283  * The structure contains pointers to trap or assert information.
 284  */
 285 #define SDPCM_SHARED_VERSION       0x0003
 286 #define SDPCM_SHARED_VERSION_MASK  0x00FF
 287 #define SDPCM_SHARED_ASSERT_BUILT  0x0100
 288 #define SDPCM_SHARED_ASSERT        0x0200
 289 #define SDPCM_SHARED_TRAP          0x0400
 290
 291 /* Space for header read, limit for data packets */
 292 #define MAX_HDR_READ    (1 << 6)
 293 #define MAX_RX_DATASZ   2048
 294
 295 /* Bump up limit on waiting for HT to account for first startup;
 296  * if the image is doing a CRC calculation before programming the PMU
 297  * for HT availability, it could take a couple hundred ms more, so
 298  * max out at a 1 second (1000000us).
 299  */
 300 #undef PMU_MAX_TRANSITION_DLY
 301 #define PMU_MAX_TRANSITION_DLY 1000000
 302
 303 /* Value for ChipClockCSR during initial setup */
 304 #define BRCMF_INIT_CLKCTL1      (SBSDIO_FORCE_HW_CLKREQ_OFF |   \
 305                                         SBSDIO_ALP_AVAIL_REQ)
 306
 307 /* Flags for SDH calls */
 308 #define F2SYNC  (SDIO_REQ_4BYTE | SDIO_REQ_FIXED)
 309
 310 #define BRCMF_IDLE_ACTIVE       0       /* Do not request any SD clock change
 311                                          * when idle
 312                                          */
 313 #define BRCMF_IDLE_INTERVAL     1
 314
 315 #define KSO_WAIT_US 50
 316 #define MAX_KSO_ATTEMPTS (PMU_MAX_TRANSITION_DLY/KSO_WAIT_US)
 317 #define BRCMF_SDIO_MAX_ACCESS_ERRORS    5
 318
 319 /*
 320  * Conversion of 802.1D priority to precedence level
 321  */
 322 static uint prio2prec(u32 prio)
 323 {
 324         return (prio == PRIO_8021D_NONE || prio == PRIO_8021D_BE) ?
 325                (prio^2) : prio;
 326 }
 327
 328 #ifdef DEBUG
 329 /* Device console log buffer state */
 330 struct brcmf_console {
 331         uint count;             /* Poll interval msec counter */
 332         uint log_addr;          /* Log struct address (fixed) */
 333         struct rte_log_le log_le;       /* Log struct (host copy) */
 334         uint bufsize;           /* Size of log buffer */
 335         u8 *buf;                /* Log buffer (host copy) */
 336         uint last;              /* Last buffer read index */
 337 };
 338
 339 struct brcmf_trap_info {
 340         __le32          type;
 341         __le32          epc;
 342         __le32          cpsr;
 343         __le32          spsr;
 344         __le32          r0;     /* a1 */
 345         __le32          r1;     /* a2 */
 346         __le32          r2;     /* a3 */
 347         __le32          r3;     /* a4 */
 348         __le32          r4;     /* v1 */
 349         __le32          r5;     /* v2 */
 350         __le32          r6;     /* v3 */
 351         __le32          r7;     /* v4 */
 352         __le32          r8;     /* v5 */
 353         __le32          r9;     /* sb/v6 */
 354         __le32          r10;    /* sl/v7 */
 355         __le32          r11;    /* fp/v8 */
 356         __le32          r12;    /* ip */
 357         __le32          r13;    /* sp */
 358         __le32          r14;    /* lr */
 359         __le32          pc;     /* r15 */
 360 };
 361 #endif                          /* DEBUG */
 362
 363 struct sdpcm_shared {
 364         u32 flags;
 365         u32 trap_addr;
 366         u32 assert_exp_addr;
 367         u32 assert_file_addr;
 368         u32 assert_line;
 369         u32 console_addr;       /* Address of struct rte_console */
 370         u32 msgtrace_addr;
 371         u8 tag[32];
 372         u32 brpt_addr;
 373 };
 374
 375 struct sdpcm_shared_le {
 376         __le32 flags;
 377         __le32 trap_addr;
 378         __le32 assert_exp_addr;
 379         __le32 assert_file_addr;
 380         __le32 assert_line;
 381         __le32 console_addr;    /* Address of struct rte_console */
 382         __le32 msgtrace_addr;
 383         u8 tag[32];
 384         __le32 brpt_addr;
 385 };
 386
 387 /* dongle SDIO bus specific header info */
 388 struct brcmf_sdio_hdrinfo {
 389         u8 seq_num;
 390         u8 channel;
 391         u16 len;
 392         u16 len_left;
 393         u16 len_nxtfrm;
 394         u8 dat_offset;
 395         bool lastfrm;
 396         u16 tail_pad;
 397 };
 398
 399 /*
 400  * hold counter variables
 401  */
 402 struct brcmf_sdio_count {
 403         uint intrcount;         /* Count of device interrupt callbacks */
 404         uint lastintrs;         /* Count as of last watchdog timer */
 405         uint pollcnt;           /* Count of active polls */
 406         uint regfails;          /* Count of R_REG failures */
 407         uint tx_sderrs;         /* Count of tx attempts with sd errors */
 408         uint fcqueued;          /* Tx packets that got queued */
 409         uint rxrtx;             /* Count of rtx requests (NAK to dongle) */
 410         uint rx_toolong;        /* Receive frames too long to receive */
 411         uint rxc_errors;        /* SDIO errors when reading control frames */
 412         uint rx_hdrfail;        /* SDIO errors on header reads */
 413         uint rx_badhdr;         /* Bad received headers (roosync?) */
 414         uint rx_badseq;         /* Mismatched rx sequence number */
 415         uint fc_rcvd;           /* Number of flow-control events received */
 416         uint fc_xoff;           /* Number which turned on flow-control */
 417         uint fc_xon;            /* Number which turned off flow-control */
 418         uint rxglomfail;        /* Failed deglom attempts */
 419         uint rxglomframes;      /* Number of glom frames (superframes) */
 420         uint rxglompkts;        /* Number of packets from glom frames */
 421         uint f2rxhdrs;          /* Number of header reads */
 422         uint f2rxdata;          /* Number of frame data reads */
 423         uint f2txdata;          /* Number of f2 frame writes */
 424         uint f1regdata;         /* Number of f1 register accesses */
 425         uint tickcnt;           /* Number of watchdog been schedule */
 426         ulong tx_ctlerrs;       /* Err of sending ctrl frames */
 427         ulong tx_ctlpkts;       /* Ctrl frames sent to dongle */
 428         ulong rx_ctlerrs;       /* Err of processing rx ctrl frames */
 429         ulong rx_ctlpkts;       /* Ctrl frames processed from dongle */
 430         ulong rx_readahead_cnt; /* packets where header read-ahead was used */
 431 };
 432
 433 /* misc chip info needed by some of the routines */
 434 /* Private data for SDIO bus interaction */
 435 struct brcmf_sdio {
 436         struct brcmf_sdio_dev *sdiodev; /* sdio device handler */
 437         struct brcmf_chip *ci;  /* Chip info struct */
 438
 439         u32 hostintmask;        /* Copy of Host Interrupt Mask */
 440         atomic_t intstatus;     /* Intstatus bits (events) pending */
 441         atomic_t fcstate;       /* State of dongle flow-control */
 442
 443         uint blocksize;         /* Block size of SDIO transfers */
 444         uint roundup;           /* Max roundup limit */
 445
 446         struct pktq txq;        /* Queue length used for flow-control */
 447         u8 flowcontrol; /* per prio flow control bitmask */
 448         u8 tx_seq;              /* Transmit sequence number (next) */
 449         u8 tx_max;              /* Maximum transmit sequence allowed */
 450
 451         u8 *hdrbuf;             /* buffer for handling rx frame */
 452         u8 *rxhdr;              /* Header of current rx frame (in hdrbuf) */
 453         u8 rx_seq;              /* Receive sequence number (expected) */
 454         struct brcmf_sdio_hdrinfo cur_read;
 455                                 /* info of current read frame */
 456         bool rxskip;            /* Skip receive (awaiting NAK ACK) */
 457         bool rxpending;         /* Data frame pending in dongle */
 458
 459         uint rxbound;           /* Rx frames to read before resched */
 460         uint txbound;           /* Tx frames to send before resched */
 461         uint txminmax;
 462
 463         struct sk_buff *glomd;  /* Packet containing glomming descriptor */
 464         struct sk_buff_head glom; /* Packet list for glommed superframe */
 465
 466         u8 *rxbuf;              /* Buffer for receiving control packets */
 467         uint rxblen;            /* Allocated length of rxbuf */
 468         u8 *rxctl;              /* Aligned pointer into rxbuf */
 469         u8 *rxctl_orig;         /* pointer for freeing rxctl */
 470         uint rxlen;             /* Length of valid data in buffer */
 471         spinlock_t rxctl_lock;  /* protection lock for ctrl frame resources */
 472
 473         u8 sdpcm_ver;   /* Bus protocol reported by dongle */
 474
 475         bool intr;              /* Use interrupts */
 476         bool poll;              /* Use polling */
 477         atomic_t ipend;         /* Device interrupt is pending */
 478         uint spurious;          /* Count of spurious interrupts */
 479         uint pollrate;          /* Ticks between device polls */
 480         uint polltick;          /* Tick counter */
 481
 482 #ifdef DEBUG
 483         uint console_interval;
 484         struct brcmf_console console;   /* Console output polling support */
 485         uint console_addr;      /* Console address from shared struct */
 486 #endif                          /* DEBUG */
 487
 488         uint clkstate;          /* State of sd and backplane clock(s) */
 489         s32 idletime;           /* Control for activity timeout */
 490         s32 idlecount;          /* Activity timeout counter */
 491         s32 idleclock;          /* How to set bus driver when idle */
 492         bool rxflow_mode;       /* Rx flow control mode */
 493         bool rxflow;            /* Is rx flow control on */
 494         bool alp_only;          /* Don't use HT clock (ALP only) */
 495
 496         u8 *ctrl_frame_buf;
 497         u16 ctrl_frame_len;
 498         bool ctrl_frame_stat;
 499         int ctrl_frame_err;
 500
 501         spinlock_t txq_lock;            /* protect bus->txq */
 502         wait_queue_head_t ctrl_wait;
 503         wait_queue_head_t dcmd_resp_wait;
 504
 505         struct timer_list timer;
 506         struct completion watchdog_wait;
 507         struct task_struct *watchdog_tsk;
 508         bool wd_active;
 509
 510         struct workqueue_struct *brcmf_wq;
 511         struct work_struct datawork;
 512         bool dpc_triggered;
 513         bool dpc_running;
 514
 515         bool txoff;             /* Transmit flow-controlled */
 516         struct brcmf_sdio_count sdcnt;
 517         bool sr_enabled; /* SaveRestore enabled */
 518         bool sleeping;
 519
 520         u8 tx_hdrlen;           /* sdio bus header length for tx packet */
 521         bool txglom;            /* host tx glomming enable flag */
 522         u16 head_align;         /* buffer pointer alignment */
 523         u16 sgentry_align;      /* scatter-gather buffer alignment */
 524 };
 525
 526 /* clkstate */
 527 #define CLK_NONE        0
 528 #define CLK_SDONLY      1
 529 #define CLK_PENDING     2
 530 #define CLK_AVAIL       3
 531
 532 #ifdef DEBUG
 533 static int qcount[NUMPRIO];
 534 #endif                          /* DEBUG */
 535
 536 #define DEFAULT_SDIO_DRIVE_STRENGTH     6       /* in milliamps */
 537
 538 #define RETRYCHAN(chan) ((chan) == SDPCM_EVENT_CHANNEL)
 539
 540 /* Limit on rounding up frames */
 541 static const uint max_roundup = 512;
 542
 543 #ifdef CONFIG_ARCH_DMA_ADDR_T_64BIT
 544 #define ALIGNMENT  8
 545 #else
 546 #define ALIGNMENT  4
 547 #endif
 548
 549 enum brcmf_sdio_frmtype {
 550         BRCMF_SDIO_FT_NORMAL,
 551         BRCMF_SDIO_FT_SUPER,
 552         BRCMF_SDIO_FT_SUB,
 553 };
 554
 555 #define SDIOD_DRVSTR_KEY(chip, pmu)     (((unsigned int)(chip) << 16) | (pmu))
 556
 557 /* SDIO Pad drive strength to select value mappings */
 558 struct sdiod_drive_str {
 559         u8 strength;    /* Pad Drive Strength in mA */
 560         u8 sel;         /* Chip-specific select value */
 561 };
 562
 563 /* SDIO Drive Strength to sel value table for PMU Rev 11 (1.8V) */
 564 static const struct sdiod_drive_str sdiod_drvstr_tab1_1v8[] = {
 565         {32, 0x6},
 566         {26, 0x7},
 567         {22, 0x4},
 568         {16, 0x5},
 569         {12, 0x2},
 570         {8, 0x3},
 571         {4, 0x0},
 572         {0, 0x1}
 573 };
 574
 575 /* SDIO Drive Strength to sel value table for PMU Rev 13 (1.8v) */
 576 static const struct sdiod_drive_str sdiod_drive_strength_tab5_1v8[] = {
 577         {6, 0x7},
 578         {5, 0x6},
 579         {4, 0x5},
 580         {3, 0x4},
 581         {2, 0x2},
 582         {1, 0x1},
 583         {0, 0x0}
 584 };
 585
 586 /* SDIO Drive Strength to sel value table for PMU Rev 17 (1.8v) */
 587 static const struct sdiod_drive_str sdiod_drvstr_tab6_1v8[] = {
 588         {3, 0x3},
 589         {2, 0x2},
 590         {1, 0x1},
 591         {0, 0x0} };
 592
 593 /* SDIO Drive Strength to sel value table for 43143 PMU Rev 17 (3.3V) */
 594 static const struct sdiod_drive_str sdiod_drvstr_tab2_3v3[] = {
 595         {16, 0x7},
 596         {12, 0x5},
 597         {8,  0x3},
 598         {4,  0x1}
 599 };
 600
 601 BRCMF_FW_NVRAM_DEF(43143, "/*(DEBLOBBED)*/", "/*(DEBLOBBED)*/");
 602 BRCMF_FW_NVRAM_DEF(43241B0, "/*(DEBLOBBED)*/",
 603                    "/*(DEBLOBBED)*/");
 604 BRCMF_FW_NVRAM_DEF(43241B4, "/*(DEBLOBBED)*/",
 605                    "/*(DEBLOBBED)*/");
 606 BRCMF_FW_NVRAM_DEF(43241B5, "/*(DEBLOBBED)*/",
 607                    "/*(DEBLOBBED)*/");
 608 BRCMF_FW_NVRAM_DEF(4329, "/*(DEBLOBBED)*/", "/*(DEBLOBBED)*/");
 609 BRCMF_FW_NVRAM_DEF(4330, "/*(DEBLOBBED)*/", "/*(DEBLOBBED)*/");
 610 BRCMF_FW_NVRAM_DEF(4334, "/*(DEBLOBBED)*/", "/*(DEBLOBBED)*/");
 611 BRCMF_FW_NVRAM_DEF(43340, "/*(DEBLOBBED)*/", "/*(DEBLOBBED)*/");
 612 BRCMF_FW_NVRAM_DEF(4335, "/*(DEBLOBBED)*/", "/*(DEBLOBBED)*/");
 613 BRCMF_FW_NVRAM_DEF(43362, "/*(DEBLOBBED)*/", "/*(DEBLOBBED)*/");
 614 BRCMF_FW_NVRAM_DEF(4339, "/*(DEBLOBBED)*/", "/*(DEBLOBBED)*/");
 615 BRCMF_FW_NVRAM_DEF(43430A0, "/*(DEBLOBBED)*/", "/*(DEBLOBBED)*/");
 616 /* Note the names are not postfixed with a1 for backward compatibility */
 617 BRCMF_FW_NVRAM_DEF(43430A1, "/*(DEBLOBBED)*/", "/*(DEBLOBBED)*/");
 618 BRCMF_FW_NVRAM_DEF(43455, "/*(DEBLOBBED)*/", "/*(DEBLOBBED)*/");
 619 BRCMF_FW_NVRAM_DEF(4354, "/*(DEBLOBBED)*/", "/*(DEBLOBBED)*/");
 620 BRCMF_FW_NVRAM_DEF(4356, "/*(DEBLOBBED)*/", "/*(DEBLOBBED)*/");
 621 BRCMF_FW_NVRAM_DEF(4373, "/*(DEBLOBBED)*/", "/*(DEBLOBBED)*/");
 622
 623 static struct brcmf_firmware_mapping brcmf_sdio_fwnames[] = {
 624         BRCMF_FW_NVRAM_ENTRY(BRCM_CC_43143_CHIP_ID, 0xFFFFFFFF, 43143),
 625         BRCMF_FW_NVRAM_ENTRY(BRCM_CC_43241_CHIP_ID, 0x0000001F, 43241B0),
 626         BRCMF_FW_NVRAM_ENTRY(BRCM_CC_43241_CHIP_ID, 0x00000020, 43241B4),
 627         BRCMF_FW_NVRAM_ENTRY(BRCM_CC_43241_CHIP_ID, 0xFFFFFFC0, 43241B5),
 628         BRCMF_FW_NVRAM_ENTRY(BRCM_CC_4329_CHIP_ID, 0xFFFFFFFF, 4329),
 629         BRCMF_FW_NVRAM_ENTRY(BRCM_CC_4330_CHIP_ID, 0xFFFFFFFF, 4330),
 630         BRCMF_FW_NVRAM_ENTRY(BRCM_CC_4334_CHIP_ID, 0xFFFFFFFF, 4334),
 631         BRCMF_FW_NVRAM_ENTRY(BRCM_CC_43340_CHIP_ID, 0xFFFFFFFF, 43340),
 632         BRCMF_FW_NVRAM_ENTRY(BRCM_CC_43341_CHIP_ID, 0xFFFFFFFF, 43340),
 633         BRCMF_FW_NVRAM_ENTRY(BRCM_CC_4335_CHIP_ID, 0xFFFFFFFF, 4335),
 634         BRCMF_FW_NVRAM_ENTRY(BRCM_CC_43362_CHIP_ID, 0xFFFFFFFE, 43362),
 635         BRCMF_FW_NVRAM_ENTRY(BRCM_CC_4339_CHIP_ID, 0xFFFFFFFF, 4339),
 636         BRCMF_FW_NVRAM_ENTRY(BRCM_CC_43430_CHIP_ID, 0x00000001, 43430A0),
 637         BRCMF_FW_NVRAM_ENTRY(BRCM_CC_43430_CHIP_ID, 0xFFFFFFFE, 43430A1),
 638         BRCMF_FW_NVRAM_ENTRY(BRCM_CC_4345_CHIP_ID, 0xFFFFFFC0, 43455),
 639         BRCMF_FW_NVRAM_ENTRY(BRCM_CC_4354_CHIP_ID, 0xFFFFFFFF, 4354),
 640         BRCMF_FW_NVRAM_ENTRY(BRCM_CC_4356_CHIP_ID, 0xFFFFFFFF, 4356),
 641         BRCMF_FW_NVRAM_ENTRY(CY_CC_4373_CHIP_ID, 0xFFFFFFFF, 4373)
 642 };
 643
 644 static void pkt_align(struct sk_buff *p, int len, int align)
 645 {
 646         uint datalign;
 647         datalign = (unsigned long)(p->data);
 648         datalign = roundup(datalign, (align)) - datalign;
 649         if (datalign)
 650                 skb_pull(p, datalign);
 651         __skb_trim(p, len);
 652 }
 653
 654 /* To check if there's window offered */
 655 static bool data_ok(struct brcmf_sdio *bus)
 656 {
 657         return (u8)(bus->tx_max - bus->tx_seq) != 0 &&
 658                ((u8)(bus->tx_max - bus->tx_seq) & 0x80) == 0;
 659 }
 660
 661 /*
 662  * Reads a register in the SDIO hardware block. This block occupies a series of
 663  * adresses on the 32 bit backplane bus.
 664  */
 665 static int r_sdreg32(struct brcmf_sdio *bus, u32 *regvar, u32 offset)
 666 {
 667         struct brcmf_core *core;
 668         int ret;
 669
 670         core = brcmf_chip_get_core(bus->ci, BCMA_CORE_SDIO_DEV);
 671         *regvar = brcmf_sdiod_regrl(bus->sdiodev, core->base + offset, &ret);
 672
 673         return ret;
 674 }
 675
 676 static int w_sdreg32(struct brcmf_sdio *bus, u32 regval, u32 reg_offset)
 677 {
 678         struct brcmf_core *core;
 679         int ret;
 680
 681         core = brcmf_chip_get_core(bus->ci, BCMA_CORE_SDIO_DEV);
 682         brcmf_sdiod_regwl(bus->sdiodev, core->base + reg_offset, regval, &ret);
 683
 684         return ret;
 685 }
 686
 687 static int
 688 brcmf_sdio_kso_control(struct brcmf_sdio *bus, bool on)
 689 {
 690         u8 wr_val = 0, rd_val, cmp_val, bmask;
 691         int err = 0;
 692         int err_cnt = 0;
 693         int try_cnt = 0;
 694
 695         brcmf_dbg(TRACE, "Enter: on=%d\n", on);
 696
 697         wr_val = (on << SBSDIO_FUNC1_SLEEPCSR_KSO_SHIFT);
 698         /* 1st KSO write goes to AOS wake up core if device is asleep  */
 699         brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR,
 700                           wr_val, &err);
 701
 702         if (on) {
 703                 /* device WAKEUP through KSO:
 704                  * write bit 0 & read back until
 705                  * both bits 0 (kso bit) & 1 (dev on status) are set
 706                  */
 707                 cmp_val = SBSDIO_FUNC1_SLEEPCSR_KSO_MASK |
 708                           SBSDIO_FUNC1_SLEEPCSR_DEVON_MASK;
 709                 bmask = cmp_val;
 710                 usleep_range(2000, 3000);
 711         } else {
 712                 /* Put device to sleep, turn off KSO */
 713                 cmp_val = 0;
 714                 /* only check for bit0, bit1(dev on status) may not
 715                  * get cleared right away
 716                  */
 717                 bmask = SBSDIO_FUNC1_SLEEPCSR_KSO_MASK;
 718         }
 719
 720         do {
 721                 /* reliable KSO bit set/clr:
 722                  * the sdiod sleep write access is synced to PMU 32khz clk
 723                  * just one write attempt may fail,
 724                  * read it back until it matches written value
 725                  */
 726                 rd_val = brcmf_sdiod_regrb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR,
 727                                            &err);
 728                 if (!err) {
 729                         if ((rd_val & bmask) == cmp_val)
 730                                 break;
 731                         err_cnt = 0;
 732                 }
 733                 /* bail out upon subsequent access errors */
 734                 if (err && (err_cnt++ > BRCMF_SDIO_MAX_ACCESS_ERRORS))
 735                         break;
 736                 udelay(KSO_WAIT_US);
 737                 brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR,
 738                                   wr_val, &err);
 739         } while (try_cnt++ < MAX_KSO_ATTEMPTS);
 740
 741         if (try_cnt > 2)
 742                 brcmf_dbg(SDIO, "try_cnt=%d rd_val=0x%x err=%d\n", try_cnt,
 743                           rd_val, err);
 744
 745         if (try_cnt > MAX_KSO_ATTEMPTS)
 746                 brcmf_err("max tries: rd_val=0x%x err=%d\n", rd_val, err);
 747
 748         return err;
 749 }
 750
 751 #define HOSTINTMASK             (I_HMB_SW_MASK | I_CHIPACTIVE)
 752
 753 /* Turn backplane clock on or off */
 754 static int brcmf_sdio_htclk(struct brcmf_sdio *bus, bool on, bool pendok)
 755 {
 756         int err;
 757         u8 clkctl, clkreq, devctl;
 758         unsigned long timeout;
 759
 760         brcmf_dbg(SDIO, "Enter\n");
 761
 762         clkctl = 0;
 763
 764         if (bus->sr_enabled) {
 765                 bus->clkstate = (on ? CLK_AVAIL : CLK_SDONLY);
 766                 return 0;
 767         }
 768
 769         if (on) {
 770                 /* Request HT Avail */
 771                 clkreq =
 772                     bus->alp_only ? SBSDIO_ALP_AVAIL_REQ : SBSDIO_HT_AVAIL_REQ;
 773
 774                 brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
 775                                   clkreq, &err);
 776                 if (err) {
 777                         brcmf_err("HT Avail request error: %d\n", err);
 778                         return -EBADE;
 779                 }
 780
 781                 /* Check current status */
 782                 clkctl = brcmf_sdiod_regrb(bus->sdiodev,
 783                                            SBSDIO_FUNC1_CHIPCLKCSR, &err);
 784                 if (err) {
 785                         brcmf_err("HT Avail read error: %d\n", err);
 786                         return -EBADE;
 787                 }
 788
 789                 /* Go to pending and await interrupt if appropriate */
 790                 if (!SBSDIO_CLKAV(clkctl, bus->alp_only) && pendok) {
 791                         /* Allow only clock-available interrupt */
 792                         devctl = brcmf_sdiod_regrb(bus->sdiodev,
 793                                                    SBSDIO_DEVICE_CTL, &err);
 794                         if (err) {
 795                                 brcmf_err("Devctl error setting CA: %d\n",
 796                                           err);
 797                                 return -EBADE;
 798                         }
 799
 800                         devctl |= SBSDIO_DEVCTL_CA_INT_ONLY;
 801                         brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_DEVICE_CTL,
 802                                           devctl, &err);
 803                         brcmf_dbg(SDIO, "CLKCTL: set PENDING\n");
 804                         bus->clkstate = CLK_PENDING;
 805
 806                         return 0;
 807                 } else if (bus->clkstate == CLK_PENDING) {
 808                         /* Cancel CA-only interrupt filter */
 809                         devctl = brcmf_sdiod_regrb(bus->sdiodev,
 810                                                    SBSDIO_DEVICE_CTL, &err);
 811                         devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY;
 812                         brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_DEVICE_CTL,
 813                                           devctl, &err);
 814                 }
 815
 816                 /* Otherwise, wait here (polling) for HT Avail */
 817                 timeout = jiffies +
 818                           msecs_to_jiffies(PMU_MAX_TRANSITION_DLY/1000);
 819                 while (!SBSDIO_CLKAV(clkctl, bus->alp_only)) {
 820                         clkctl = brcmf_sdiod_regrb(bus->sdiodev,
 821                                                    SBSDIO_FUNC1_CHIPCLKCSR,
 822                                                    &err);
 823                         if (time_after(jiffies, timeout))
 824                                 break;
 825                         else
 826                                 usleep_range(5000, 10000);
 827                 }
 828                 if (err) {
 829                         brcmf_err("HT Avail request error: %d\n", err);
 830                         return -EBADE;
 831                 }
 832                 if (!SBSDIO_CLKAV(clkctl, bus->alp_only)) {
 833                         brcmf_err("HT Avail timeout (%d): clkctl 0x%02x\n",
 834                                   PMU_MAX_TRANSITION_DLY, clkctl);
 835                         return -EBADE;
 836                 }
 837
 838                 /* Mark clock available */
 839                 bus->clkstate = CLK_AVAIL;
 840                 brcmf_dbg(SDIO, "CLKCTL: turned ON\n");
 841
 842 #if defined(DEBUG)
 843                 if (!bus->alp_only) {
 844                         if (SBSDIO_ALPONLY(clkctl))
 845                                 brcmf_err("HT Clock should be on\n");
 846                 }
 847 #endif                          /* defined (DEBUG) */
 848
 849         } else {
 850                 clkreq = 0;
 851
 852                 if (bus->clkstate == CLK_PENDING) {
 853                         /* Cancel CA-only interrupt filter */
 854                         devctl = brcmf_sdiod_regrb(bus->sdiodev,
 855                                                    SBSDIO_DEVICE_CTL, &err);
 856                         devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY;
 857                         brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_DEVICE_CTL,
 858                                           devctl, &err);
 859                 }
 860
 861                 bus->clkstate = CLK_SDONLY;
 862                 brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
 863                                   clkreq, &err);
 864                 brcmf_dbg(SDIO, "CLKCTL: turned OFF\n");
 865                 if (err) {
 866                         brcmf_err("Failed access turning clock off: %d\n",
 867                                   err);
 868                         return -EBADE;
 869                 }
 870         }
 871         return 0;
 872 }
 873
 874 /* Change idle/active SD state */
 875 static int brcmf_sdio_sdclk(struct brcmf_sdio *bus, bool on)
 876 {
 877         brcmf_dbg(SDIO, "Enter\n");
 878
 879         if (on)
 880                 bus->clkstate = CLK_SDONLY;
 881         else
 882                 bus->clkstate = CLK_NONE;
 883
 884         return 0;
 885 }
 886
 887 /* Transition SD and backplane clock readiness */
 888 static int brcmf_sdio_clkctl(struct brcmf_sdio *bus, uint target, bool pendok)
 889 {
 890 #ifdef DEBUG
 891         uint oldstate = bus->clkstate;
 892 #endif                          /* DEBUG */
 893
 894         brcmf_dbg(SDIO, "Enter\n");
 895
 896         /* Early exit if we're already there */
 897         if (bus->clkstate == target)
 898                 return 0;
 899
 900         switch (target) {
 901         case CLK_AVAIL:
 902                 /* Make sure SD clock is available */
 903                 if (bus->clkstate == CLK_NONE)
 904                         brcmf_sdio_sdclk(bus, true);
 905                 /* Now request HT Avail on the backplane */
 906                 brcmf_sdio_htclk(bus, true, pendok);
 907                 break;
 908
 909         case CLK_SDONLY:
 910                 /* Remove HT request, or bring up SD clock */
 911                 if (bus->clkstate == CLK_NONE)
 912                         brcmf_sdio_sdclk(bus, true);
 913                 else if (bus->clkstate == CLK_AVAIL)
 914                         brcmf_sdio_htclk(bus, false, false);
 915                 else
 916                         brcmf_err("request for %d -> %d\n",
 917                                   bus->clkstate, target);
 918                 break;
 919
 920         case CLK_NONE:
 921                 /* Make sure to remove HT request */
 922                 if (bus->clkstate == CLK_AVAIL)
 923                         brcmf_sdio_htclk(bus, false, false);
 924                 /* Now remove the SD clock */
 925                 brcmf_sdio_sdclk(bus, false);
 926                 break;
 927         }
 928 #ifdef DEBUG
 929         brcmf_dbg(SDIO, "%d -> %d\n", oldstate, bus->clkstate);
 930 #endif                          /* DEBUG */
 931
 932         return 0;
 933 }
 934
 935 static int
 936 brcmf_sdio_bus_sleep(struct brcmf_sdio *bus, bool sleep, bool pendok)
 937 {
 938         int err = 0;
 939         u8 clkcsr;
 940
 941         brcmf_dbg(SDIO, "Enter: request %s currently %s\n",
 942                   (sleep ? "SLEEP" : "WAKE"),
 943                   (bus->sleeping ? "SLEEP" : "WAKE"));
 944
 945         /* If SR is enabled control bus state with KSO */
 946         if (bus->sr_enabled) {
 947                 /* Done if we're already in the requested state */
 948                 if (sleep == bus->sleeping)
 949                         goto end;
 950
 951                 /* Going to sleep */
 952                 if (sleep) {
 953                         clkcsr = brcmf_sdiod_regrb(bus->sdiodev,
 954                                                    SBSDIO_FUNC1_CHIPCLKCSR,
 955                                                    &err);
 956                         if ((clkcsr & SBSDIO_CSR_MASK) == 0) {
 957                                 brcmf_dbg(SDIO, "no clock, set ALP\n");
 958                                 brcmf_sdiod_regwb(bus->sdiodev,
 959                                                   SBSDIO_FUNC1_CHIPCLKCSR,
 960                                                   SBSDIO_ALP_AVAIL_REQ, &err);
 961                         }
 962                         err = brcmf_sdio_kso_control(bus, false);
 963                 } else {
 964                         err = brcmf_sdio_kso_control(bus, true);
 965                 }
 966                 if (err) {
 967                         brcmf_err("error while changing bus sleep state %d\n",
 968                                   err);
 969                         goto done;
 970                 }
 971         }
 972
 973 end:
 974         /* control clocks */
 975         if (sleep) {
 976                 if (!bus->sr_enabled)
 977                         brcmf_sdio_clkctl(bus, CLK_NONE, pendok);
 978         } else {
 979                 brcmf_sdio_clkctl(bus, CLK_AVAIL, pendok);
 980                 brcmf_sdio_wd_timer(bus, true);
 981         }
 982         bus->sleeping = sleep;
 983         brcmf_dbg(SDIO, "new state %s\n",
 984                   (sleep ? "SLEEP" : "WAKE"));
 985 done:
 986         brcmf_dbg(SDIO, "Exit: err=%d\n", err);
 987         return err;
 988
 989 }
 990
 991 #ifdef DEBUG
 992 static inline bool brcmf_sdio_valid_shared_address(u32 addr)
 993 {
 994         return !(addr == 0 || ((~addr >> 16) & 0xffff) == (addr & 0xffff));
 995 }
 996
 997 static int brcmf_sdio_readshared(struct brcmf_sdio *bus,
 998                                  struct sdpcm_shared *sh)
 999 {
1000         u32 addr = 0;
1001         int rv;
1002         u32 shaddr = 0;
1003         struct sdpcm_shared_le sh_le;
1004         __le32 addr_le;
1005
1006         sdio_claim_host(bus->sdiodev->func[1]);
1007         brcmf_sdio_bus_sleep(bus, false, false);
1008
1009         /*
1010          * Read last word in socram to determine
1011          * address of sdpcm_shared structure
1012          */
1013         shaddr = bus->ci->rambase + bus->ci->ramsize - 4;
1014         if (!bus->ci->rambase && brcmf_chip_sr_capable(bus->ci))
1015                 shaddr -= bus->ci->srsize;
1016         rv = brcmf_sdiod_ramrw(bus->sdiodev, false, shaddr,
1017                                (u8 *)&addr_le, 4);
1018         if (rv < 0)
1019                 goto fail;
1020
1021         /*
1022          * Check if addr is valid.
1023          * NVRAM length at the end of memory should have been overwritten.
1024          */
1025         addr = le32_to_cpu(addr_le);
1026         if (!brcmf_sdio_valid_shared_address(addr)) {
1027                 brcmf_err("invalid sdpcm_shared address 0x%08X\n", addr);
1028                 rv = -EINVAL;
1029                 goto fail;
1030         }
1031
1032         brcmf_dbg(INFO, "sdpcm_shared address 0x%08X\n", addr);
1033
1034         /* Read hndrte_shared structure */
1035         rv = brcmf_sdiod_ramrw(bus->sdiodev, false, addr, (u8 *)&sh_le,
1036                                sizeof(struct sdpcm_shared_le));
1037         if (rv < 0)
1038                 goto fail;
1039
1040         sdio_release_host(bus->sdiodev->func[1]);
1041
1042         /* Endianness */
1043         sh->flags = le32_to_cpu(sh_le.flags);
1044         sh->trap_addr = le32_to_cpu(sh_le.trap_addr);
1045         sh->assert_exp_addr = le32_to_cpu(sh_le.assert_exp_addr);
1046         sh->assert_file_addr = le32_to_cpu(sh_le.assert_file_addr);
1047         sh->assert_line = le32_to_cpu(sh_le.assert_line);
1048         sh->console_addr = le32_to_cpu(sh_le.console_addr);
1049         sh->msgtrace_addr = le32_to_cpu(sh_le.msgtrace_addr);
1050
1051         if ((sh->flags & SDPCM_SHARED_VERSION_MASK) > SDPCM_SHARED_VERSION) {
1052                 brcmf_err("sdpcm shared version unsupported: dhd %d dongle %d\n",
1053                           SDPCM_SHARED_VERSION,
1054                           sh->flags & SDPCM_SHARED_VERSION_MASK);
1055                 return -EPROTO;
1056         }
1057         return 0;
1058
1059 fail:
1060         brcmf_err("unable to obtain sdpcm_shared info: rv=%d (addr=0x%x)\n",
1061                   rv, addr);
1062         sdio_release_host(bus->sdiodev->func[1]);
1063         return rv;
1064 }
1065
1066 static void brcmf_sdio_get_console_addr(struct brcmf_sdio *bus)
1067 {
1068         struct sdpcm_shared sh;
1069
1070         if (brcmf_sdio_readshared(bus, &sh) == 0)
1071                 bus->console_addr = sh.console_addr;
1072 }
1073 #else
1074 static void brcmf_sdio_get_console_addr(struct brcmf_sdio *bus)
1075 {
1076 }
1077 #endif /* DEBUG */
1078
1079 static u32 brcmf_sdio_hostmail(struct brcmf_sdio *bus)
1080 {
1081         u32 intstatus = 0;
1082         u32 hmb_data;
1083         u8 fcbits;
1084         int ret;
1085
1086         brcmf_dbg(SDIO, "Enter\n");
1087
1088         /* Read mailbox data and ack that we did so */
1089         ret = r_sdreg32(bus, &hmb_data,
1090                         offsetof(struct sdpcmd_regs, tohostmailboxdata));
1091
1092         if (ret == 0)
1093                 w_sdreg32(bus, SMB_INT_ACK,
1094                           offsetof(struct sdpcmd_regs, tosbmailbox));
1095         bus->sdcnt.f1regdata += 2;
1096
1097         /* Dongle recomposed rx frames, accept them again */
1098         if (hmb_data & HMB_DATA_NAKHANDLED) {
1099                 brcmf_dbg(SDIO, "Dongle reports NAK handled, expect rtx of %d\n",
1100                           bus->rx_seq);
1101                 if (!bus->rxskip)
1102                         brcmf_err("unexpected NAKHANDLED!\n");
1103
1104                 bus->rxskip = false;
1105                 intstatus |= I_HMB_FRAME_IND;
1106         }
1107
1108         /*
1109          * DEVREADY does not occur with gSPI.
1110          */
1111         if (hmb_data & (HMB_DATA_DEVREADY | HMB_DATA_FWREADY)) {
1112                 bus->sdpcm_ver =
1113                     (hmb_data & HMB_DATA_VERSION_MASK) >>
1114                     HMB_DATA_VERSION_SHIFT;
1115                 if (bus->sdpcm_ver != SDPCM_PROT_VERSION)
1116                         brcmf_err("Version mismatch, dongle reports %d, "
1117                                   "expecting %d\n",
1118                                   bus->sdpcm_ver, SDPCM_PROT_VERSION);
1119                 else
1120                         brcmf_dbg(SDIO, "Dongle ready, protocol version %d\n",
1121                                   bus->sdpcm_ver);
1122
1123                 /*
1124                  * Retrieve console state address now that firmware should have
1125                  * updated it.
1126                  */
1127                 brcmf_sdio_get_console_addr(bus);
1128         }
1129
1130         /*
1131          * Flow Control has been moved into the RX headers and this out of band
1132          * method isn't used any more.
1133          * remaining backward compatible with older dongles.
1134          */
1135         if (hmb_data & HMB_DATA_FC) {
1136                 fcbits = (hmb_data & HMB_DATA_FCDATA_MASK) >>
1137                                                         HMB_DATA_FCDATA_SHIFT;
1138
1139                 if (fcbits & ~bus->flowcontrol)
1140                         bus->sdcnt.fc_xoff++;
1141
1142                 if (bus->flowcontrol & ~fcbits)
1143                         bus->sdcnt.fc_xon++;
1144
1145                 bus->sdcnt.fc_rcvd++;
1146                 bus->flowcontrol = fcbits;
1147         }
1148
1149         /* Shouldn't be any others */
1150         if (hmb_data & ~(HMB_DATA_DEVREADY |
1151                          HMB_DATA_NAKHANDLED |
1152                          HMB_DATA_FC |
1153                          HMB_DATA_FWREADY |
1154                          HMB_DATA_FCDATA_MASK | HMB_DATA_VERSION_MASK))
1155                 brcmf_err("Unknown mailbox data content: 0x%02x\n",
1156                           hmb_data);
1157
1158         return intstatus;
1159 }
1160
1161 static void brcmf_sdio_rxfail(struct brcmf_sdio *bus, bool abort, bool rtx)
1162 {
1163         uint retries = 0;
1164         u16 lastrbc;
1165         u8 hi, lo;
1166         int err;
1167
1168         brcmf_err("%sterminate frame%s\n",
1169                   abort ? "abort command, " : "",
1170                   rtx ? ", send NAK" : "");
1171
1172         if (abort)
1173                 brcmf_sdiod_abort(bus->sdiodev, SDIO_FUNC_2);
1174
1175         brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_FRAMECTRL,
1176                           SFC_RF_TERM, &err);
1177         bus->sdcnt.f1regdata++;
1178
1179         /* Wait until the packet has been flushed (device/FIFO stable) */
1180         for (lastrbc = retries = 0xffff; retries > 0; retries--) {
1181                 hi = brcmf_sdiod_regrb(bus->sdiodev,
1182                                        SBSDIO_FUNC1_RFRAMEBCHI, &err);
1183                 lo = brcmf_sdiod_regrb(bus->sdiodev,
1184                                        SBSDIO_FUNC1_RFRAMEBCLO, &err);
1185                 bus->sdcnt.f1regdata += 2;
1186
1187                 if ((hi == 0) && (lo == 0))
1188                         break;
1189
1190                 if ((hi > (lastrbc >> 8)) && (lo > (lastrbc & 0x00ff))) {
1191                         brcmf_err("count growing: last 0x%04x now 0x%04x\n",
1192                                   lastrbc, (hi << 8) + lo);
1193                 }
1194                 lastrbc = (hi << 8) + lo;
1195         }
1196
1197         if (!retries)
1198                 brcmf_err("count never zeroed: last 0x%04x\n", lastrbc);
1199         else
1200                 brcmf_dbg(SDIO, "flush took %d iterations\n", 0xffff - retries);
1201
1202         if (rtx) {
1203                 bus->sdcnt.rxrtx++;
1204                 err = w_sdreg32(bus, SMB_NAK,
1205                                 offsetof(struct sdpcmd_regs, tosbmailbox));
1206
1207                 bus->sdcnt.f1regdata++;
1208                 if (err == 0)
1209                         bus->rxskip = true;
1210         }
1211
1212         /* Clear partial in any case */
1213         bus->cur_read.len = 0;
1214 }
1215
1216 static void brcmf_sdio_txfail(struct brcmf_sdio *bus)
1217 {
1218         struct brcmf_sdio_dev *sdiodev = bus->sdiodev;
1219         u8 i, hi, lo;
1220
1221         /* On failure, abort the command and terminate the frame */
1222         brcmf_err("sdio error, abort command and terminate frame\n");
1223         bus->sdcnt.tx_sderrs++;
1224
1225         brcmf_sdiod_abort(sdiodev, SDIO_FUNC_2);
1226         brcmf_sdiod_regwb(sdiodev, SBSDIO_FUNC1_FRAMECTRL, SFC_WF_TERM, NULL);
1227         bus->sdcnt.f1regdata++;
1228
1229         for (i = 0; i < 3; i++) {
1230                 hi = brcmf_sdiod_regrb(sdiodev, SBSDIO_FUNC1_WFRAMEBCHI, NULL);
1231                 lo = brcmf_sdiod_regrb(sdiodev, SBSDIO_FUNC1_WFRAMEBCLO, NULL);
1232                 bus->sdcnt.f1regdata += 2;
1233                 if ((hi == 0) && (lo == 0))
1234                         break;
1235         }
1236 }
1237
1238 /* return total length of buffer chain */
1239 static uint brcmf_sdio_glom_len(struct brcmf_sdio *bus)
1240 {
1241         struct sk_buff *p;
1242         uint total;
1243
1244         total = 0;
1245         skb_queue_walk(&bus->glom, p)
1246                 total += p->len;
1247         return total;
1248 }
1249
1250 static void brcmf_sdio_free_glom(struct brcmf_sdio *bus)
1251 {
1252         struct sk_buff *cur, *next;
1253
1254         skb_queue_walk_safe(&bus->glom, cur, next) {
1255                 skb_unlink(cur, &bus->glom);
1256                 brcmu_pkt_buf_free_skb(cur);
1257         }
1258 }
1259
1260 /**
1261  * brcmfmac sdio bus specific header
1262  * This is the lowest layer header wrapped on the packets transmitted between
1263  * host and WiFi dongle which contains information needed for SDIO core and
1264  * firmware
1265  *
1266  * It consists of 3 parts: hardware header, hardware extension header and
1267  * software header
1268  * hardware header (frame tag) - 4 bytes
1269  * Byte 0~1: Frame length
1270  * Byte 2~3: Checksum, bit-wise inverse of frame length
1271  * hardware extension header - 8 bytes
1272  * Tx glom mode only, N/A for Rx or normal Tx
1273  * Byte 0~1: Packet length excluding hw frame tag
1274  * Byte 2: Reserved
1275  * Byte 3: Frame flags, bit 0: last frame indication
1276  * Byte 4~5: Reserved
1277  * Byte 6~7: Tail padding length
1278  * software header - 8 bytes
1279  * Byte 0: Rx/Tx sequence number
1280  * Byte 1: 4 MSB Channel number, 4 LSB arbitrary flag
1281  * Byte 2: Length of next data frame, reserved for Tx
1282  * Byte 3: Data offset
1283  * Byte 4: Flow control bits, reserved for Tx
1284  * Byte 5: Maximum Sequence number allowed by firmware for Tx, N/A for Tx packet
1285  * Byte 6~7: Reserved
1286  */
1287 #define SDPCM_HWHDR_LEN                 4
1288 #define SDPCM_HWEXT_LEN                 8
1289 #define SDPCM_SWHDR_LEN                 8
1290 #define SDPCM_HDRLEN                    (SDPCM_HWHDR_LEN + SDPCM_SWHDR_LEN)
1291 /* software header */
1292 #define SDPCM_SEQ_MASK                  0x000000ff
1293 #define SDPCM_SEQ_WRAP                  256
1294 #define SDPCM_CHANNEL_MASK              0x00000f00
1295 #define SDPCM_CHANNEL_SHIFT             8
1296 #define SDPCM_CONTROL_CHANNEL           0       /* Control */
1297 #define SDPCM_EVENT_CHANNEL             1       /* Asyc Event Indication */
1298 #define SDPCM_DATA_CHANNEL              2       /* Data Xmit/Recv */
1299 #define SDPCM_GLOM_CHANNEL              3       /* Coalesced packets */
1300 #define SDPCM_TEST_CHANNEL              15      /* Test/debug packets */
1301 #define SDPCM_GLOMDESC(p)               (((u8 *)p)[1] & 0x80)
1302 #define SDPCM_NEXTLEN_MASK              0x00ff0000
1303 #define SDPCM_NEXTLEN_SHIFT             16
1304 #define SDPCM_DOFFSET_MASK              0xff000000
1305 #define SDPCM_DOFFSET_SHIFT             24
1306 #define SDPCM_FCMASK_MASK               0x000000ff
1307 #define SDPCM_WINDOW_MASK               0x0000ff00
1308 #define SDPCM_WINDOW_SHIFT              8
1309
1310 static inline u8 brcmf_sdio_getdatoffset(u8 *swheader)
1311 {
1312         u32 hdrvalue;
1313         hdrvalue = *(u32 *)swheader;
1314         return (u8)((hdrvalue & SDPCM_DOFFSET_MASK) >> SDPCM_DOFFSET_SHIFT);
1315 }
1316
1317 static inline bool brcmf_sdio_fromevntchan(u8 *swheader)
1318 {
1319         u32 hdrvalue;
1320         u8 ret;
1321
1322         hdrvalue = *(u32 *)swheader;
1323         ret = (u8)((hdrvalue & SDPCM_CHANNEL_MASK) >> SDPCM_CHANNEL_SHIFT);
1324
1325         return (ret == SDPCM_EVENT_CHANNEL);
1326 }
1327
1328 static int brcmf_sdio_hdparse(struct brcmf_sdio *bus, u8 *header,
1329                               struct brcmf_sdio_hdrinfo *rd,
1330                               enum brcmf_sdio_frmtype type)
1331 {
1332         u16 len, checksum;
1333         u8 rx_seq, fc, tx_seq_max;
1334         u32 swheader;
1335
1336         trace_brcmf_sdpcm_hdr(SDPCM_RX, header);
1337
1338         /* hw header */
1339         len = get_unaligned_le16(header);
1340         checksum = get_unaligned_le16(header + sizeof(u16));
1341         /* All zero means no more to read */
1342         if (!(len | checksum)) {
1343                 bus->rxpending = false;
1344                 return -ENODATA;
1345         }
1346         if ((u16)(~(len ^ checksum))) {
1347                 brcmf_err("HW header checksum error\n");
1348                 bus->sdcnt.rx_badhdr++;
1349                 brcmf_sdio_rxfail(bus, false, false);
1350                 return -EIO;
1351         }
1352         if (len < SDPCM_HDRLEN) {
1353                 brcmf_err("HW header length error\n");
1354                 return -EPROTO;
1355         }
1356         if (type == BRCMF_SDIO_FT_SUPER &&
1357             (roundup(len, bus->blocksize) != rd->len)) {
1358                 brcmf_err("HW superframe header length error\n");
1359                 return -EPROTO;
1360         }
1361         if (type == BRCMF_SDIO_FT_SUB && len > rd->len) {
1362                 brcmf_err("HW subframe header length error\n");
1363                 return -EPROTO;
1364         }
1365         rd->len = len;
1366
1367         /* software header */
1368         header += SDPCM_HWHDR_LEN;
1369         swheader = le32_to_cpu(*(__le32 *)header);
1370         if (type == BRCMF_SDIO_FT_SUPER && SDPCM_GLOMDESC(header)) {
1371                 brcmf_err("Glom descriptor found in superframe head\n");
1372                 rd->len = 0;
1373                 return -EINVAL;
1374         }
1375         rx_seq = (u8)(swheader & SDPCM_SEQ_MASK);
1376         rd->channel = (swheader & SDPCM_CHANNEL_MASK) >> SDPCM_CHANNEL_SHIFT;
1377         if (len > MAX_RX_DATASZ && rd->channel != SDPCM_CONTROL_CHANNEL &&
1378             type != BRCMF_SDIO_FT_SUPER) {
1379                 brcmf_err("HW header length too long\n");
1380                 bus->sdcnt.rx_toolong++;
1381                 brcmf_sdio_rxfail(bus, false, false);
1382                 rd->len = 0;
1383                 return -EPROTO;
1384         }
1385         if (type == BRCMF_SDIO_FT_SUPER && rd->channel != SDPCM_GLOM_CHANNEL) {
1386                 brcmf_err("Wrong channel for superframe\n");
1387                 rd->len = 0;
1388                 return -EINVAL;
1389         }
1390         if (type == BRCMF_SDIO_FT_SUB && rd->channel != SDPCM_DATA_CHANNEL &&
1391             rd->channel != SDPCM_EVENT_CHANNEL) {
1392                 brcmf_err("Wrong channel for subframe\n");
1393                 rd->len = 0;
1394                 return -EINVAL;
1395         }
1396         rd->dat_offset = brcmf_sdio_getdatoffset(header);
1397         if (rd->dat_offset < SDPCM_HDRLEN || rd->dat_offset > rd->len) {
1398                 brcmf_err("seq %d: bad data offset\n", rx_seq);
1399                 bus->sdcnt.rx_badhdr++;
1400                 brcmf_sdio_rxfail(bus, false, false);
1401                 rd->len = 0;
1402                 return -ENXIO;
1403         }
1404         if (rd->seq_num != rx_seq) {
1405                 brcmf_dbg(SDIO, "seq %d, expected %d\n", rx_seq, rd->seq_num);
1406                 bus->sdcnt.rx_badseq++;
1407                 rd->seq_num = rx_seq;
1408         }
1409         /* no need to check the reset for subframe */
1410         if (type == BRCMF_SDIO_FT_SUB)
1411                 return 0;
1412         rd->len_nxtfrm = (swheader & SDPCM_NEXTLEN_MASK) >> SDPCM_NEXTLEN_SHIFT;
1413         if (rd->len_nxtfrm << 4 > MAX_RX_DATASZ) {
1414                 /* only warm for NON glom packet */
1415                 if (rd->channel != SDPCM_GLOM_CHANNEL)
1416                         brcmf_err("seq %d: next length error\n", rx_seq);
1417                 rd->len_nxtfrm = 0;
1418         }
1419         swheader = le32_to_cpu(*(__le32 *)(header + 4));
1420         fc = swheader & SDPCM_FCMASK_MASK;
1421         if (bus->flowcontrol != fc) {
1422                 if (~bus->flowcontrol & fc)
1423                         bus->sdcnt.fc_xoff++;
1424                 if (bus->flowcontrol & ~fc)
1425                         bus->sdcnt.fc_xon++;
1426                 bus->sdcnt.fc_rcvd++;
1427                 bus->flowcontrol = fc;
1428         }
1429         tx_seq_max = (swheader & SDPCM_WINDOW_MASK) >> SDPCM_WINDOW_SHIFT;
1430         if ((u8)(tx_seq_max - bus->tx_seq) > 0x40) {
1431                 brcmf_err("seq %d: max tx seq number error\n", rx_seq);
1432                 tx_seq_max = bus->tx_seq + 2;
1433         }
1434         bus->tx_max = tx_seq_max;
1435
1436         return 0;
1437 }
1438
1439 static inline void brcmf_sdio_update_hwhdr(u8 *header, u16 frm_length)
1440 {
1441         *(__le16 *)header = cpu_to_le16(frm_length);
1442         *(((__le16 *)header) + 1) = cpu_to_le16(~frm_length);
1443 }
1444
1445 static void brcmf_sdio_hdpack(struct brcmf_sdio *bus, u8 *header,
1446                               struct brcmf_sdio_hdrinfo *hd_info)
1447 {
1448         u32 hdrval;
1449         u8 hdr_offset;
1450
1451         brcmf_sdio_update_hwhdr(header, hd_info->len);
1452         hdr_offset = SDPCM_HWHDR_LEN;
1453
1454         if (bus->txglom) {
1455                 hdrval = (hd_info->len - hdr_offset) | (hd_info->lastfrm << 24);
1456                 *((__le32 *)(header + hdr_offset)) = cpu_to_le32(hdrval);
1457                 hdrval = (u16)hd_info->tail_pad << 16;
1458                 *(((__le32 *)(header + hdr_offset)) + 1) = cpu_to_le32(hdrval);
1459                 hdr_offset += SDPCM_HWEXT_LEN;
1460         }
1461
1462         hdrval = hd_info->seq_num;
1463         hdrval |= (hd_info->channel << SDPCM_CHANNEL_SHIFT) &
1464                   SDPCM_CHANNEL_MASK;
1465         hdrval |= (hd_info->dat_offset << SDPCM_DOFFSET_SHIFT) &
1466                   SDPCM_DOFFSET_MASK;
1467         *((__le32 *)(header + hdr_offset)) = cpu_to_le32(hdrval);
1468         *(((__le32 *)(header + hdr_offset)) + 1) = 0;
1469         trace_brcmf_sdpcm_hdr(SDPCM_TX + !!(bus->txglom), header);
1470 }
1471
1472 static u8 brcmf_sdio_rxglom(struct brcmf_sdio *bus, u8 rxseq)
1473 {
1474         u16 dlen, totlen;
1475         u8 *dptr, num = 0;
1476         u16 sublen;
1477         struct sk_buff *pfirst, *pnext;
1478
1479         int errcode;
1480         u8 doff, sfdoff;
1481
1482         struct brcmf_sdio_hdrinfo rd_new;
1483
1484         /* If packets, issue read(s) and send up packet chain */
1485         /* Return sequence numbers consumed? */
1486
1487         brcmf_dbg(SDIO, "start: glomd %p glom %p\n",
1488                   bus->glomd, skb_peek(&bus->glom));
1489
1490         /* If there's a descriptor, generate the packet chain */
1491         if (bus->glomd) {
1492                 pfirst = pnext = NULL;
1493                 dlen = (u16) (bus->glomd->len);
1494                 dptr = bus->glomd->data;
1495                 if (!dlen || (dlen & 1)) {
1496                         brcmf_err("bad glomd len(%d), ignore descriptor\n",
1497                                   dlen);
1498                         dlen = 0;
1499                 }
1500
1501                 for (totlen = num = 0; dlen; num++) {
1502                         /* Get (and move past) next length */
1503                         sublen = get_unaligned_le16(dptr);
1504                         dlen -= sizeof(u16);
1505                         dptr += sizeof(u16);
1506                         if ((sublen < SDPCM_HDRLEN) ||
1507                             ((num == 0) && (sublen < (2 * SDPCM_HDRLEN)))) {
1508                                 brcmf_err("descriptor len %d bad: %d\n",
1509                                           num, sublen);
1510                                 pnext = NULL;
1511                                 break;
1512                         }
1513                         if (sublen % bus->sgentry_align) {
1514                                 brcmf_err("sublen %d not multiple of %d\n",
1515                                           sublen, bus->sgentry_align);
1516                         }
1517                         totlen += sublen;
1518
1519                         /* For last frame, adjust read len so total
1520                                  is a block multiple */
1521                         if (!dlen) {
1522                                 sublen +=
1523                                     (roundup(totlen, bus->blocksize) - totlen);
1524                                 totlen = roundup(totlen, bus->blocksize);
1525                         }
1526
1527                         /* Allocate/chain packet for next subframe */
1528                         pnext = brcmu_pkt_buf_get_skb(sublen + bus->sgentry_align);
1529                         if (pnext == NULL) {
1530                                 brcmf_err("bcm_pkt_buf_get_skb failed, num %d len %d\n",
1531                                           num, sublen);
1532                                 break;
1533                         }
1534                         skb_queue_tail(&bus->glom, pnext);
1535
1536                         /* Adhere to start alignment requirements */
1537                         pkt_align(pnext, sublen, bus->sgentry_align);
1538                 }
1539
1540                 /* If all allocations succeeded, save packet chain
1541                          in bus structure */
1542                 if (pnext) {
1543                         brcmf_dbg(GLOM, "allocated %d-byte packet chain for %d subframes\n",
1544                                   totlen, num);
1545                         if (BRCMF_GLOM_ON() && bus->cur_read.len &&
1546                             totlen != bus->cur_read.len) {
1547                                 brcmf_dbg(GLOM, "glomdesc mismatch: nextlen %d glomdesc %d rxseq %d\n",
1548                                           bus->cur_read.len, totlen, rxseq);
1549                         }
1550                         pfirst = pnext = NULL;
1551                 } else {
1552                         brcmf_sdio_free_glom(bus);
1553                         num = 0;
1554                 }
1555
1556                 /* Done with descriptor packet */
1557                 brcmu_pkt_buf_free_skb(bus->glomd);
1558                 bus->glomd = NULL;
1559                 bus->cur_read.len = 0;
1560         }
1561
1562         /* Ok -- either we just generated a packet chain,
1563                  or had one from before */
1564         if (!skb_queue_empty(&bus->glom)) {
1565                 if (BRCMF_GLOM_ON()) {
1566                         brcmf_dbg(GLOM, "try superframe read, packet chain:\n");
1567                         skb_queue_walk(&bus->glom, pnext) {
1568                                 brcmf_dbg(GLOM, "    %p: %p len 0x%04x (%d)\n",
1569                                           pnext, (u8 *) (pnext->data),
1570                                           pnext->len, pnext->len);
1571                         }
1572                 }
1573
1574                 pfirst = skb_peek(&bus->glom);
1575                 dlen = (u16) brcmf_sdio_glom_len(bus);
1576
1577                 /* Do an SDIO read for the superframe.  Configurable iovar to
1578                  * read directly into the chained packet, or allocate a large
1579                  * packet and and copy into the chain.
1580                  */
1581                 sdio_claim_host(bus->sdiodev->func[1]);
1582                 errcode = brcmf_sdiod_recv_chain(bus->sdiodev,
1583                                                  &bus->glom, dlen);
1584                 sdio_release_host(bus->sdiodev->func[1]);
1585                 bus->sdcnt.f2rxdata++;
1586
1587                 /* On failure, kill the superframe */
1588                 if (errcode < 0) {
1589                         brcmf_err("glom read of %d bytes failed: %d\n",
1590                                   dlen, errcode);
1591
1592                         sdio_claim_host(bus->sdiodev->func[1]);
1593                         brcmf_sdio_rxfail(bus, true, false);
1594                         bus->sdcnt.rxglomfail++;
1595                         brcmf_sdio_free_glom(bus);
1596                         sdio_release_host(bus->sdiodev->func[1]);
1597                         return 0;
1598                 }
1599
1600                 brcmf_dbg_hex_dump(BRCMF_GLOM_ON(),
1601                                    pfirst->data, min_t(int, pfirst->len, 48),
1602                                    "SUPERFRAME:\n");
1603
1604                 rd_new.seq_num = rxseq;
1605                 rd_new.len = dlen;
1606                 sdio_claim_host(bus->sdiodev->func[1]);
1607                 errcode = brcmf_sdio_hdparse(bus, pfirst->data, &rd_new,
1608                                              BRCMF_SDIO_FT_SUPER);
1609                 sdio_release_host(bus->sdiodev->func[1]);
1610                 bus->cur_read.len = rd_new.len_nxtfrm << 4;
1611
1612                 /* Remove superframe header, remember offset */
1613                 skb_pull(pfirst, rd_new.dat_offset);
1614                 sfdoff = rd_new.dat_offset;
1615                 num = 0;
1616
1617                 /* Validate all the subframe headers */
1618                 skb_queue_walk(&bus->glom, pnext) {
1619                         /* leave when invalid subframe is found */
1620                         if (errcode)
1621                                 break;
1622
1623                         rd_new.len = pnext->len;
1624                         rd_new.seq_num = rxseq++;
1625                         sdio_claim_host(bus->sdiodev->func[1]);
1626                         errcode = brcmf_sdio_hdparse(bus, pnext->data, &rd_new,
1627                                                      BRCMF_SDIO_FT_SUB);
1628                         sdio_release_host(bus->sdiodev->func[1]);
1629                         brcmf_dbg_hex_dump(BRCMF_GLOM_ON(),
1630                                            pnext->data, 32, "subframe:\n");
1631
1632                         num++;
1633                 }
1634
1635                 if (errcode) {
1636                         /* Terminate frame on error */
1637                         sdio_claim_host(bus->sdiodev->func[1]);
1638                         brcmf_sdio_rxfail(bus, true, false);
1639                         bus->sdcnt.rxglomfail++;
1640                         brcmf_sdio_free_glom(bus);
1641                         sdio_release_host(bus->sdiodev->func[1]);
1642                         bus->cur_read.len = 0;
1643                         return 0;
1644                 }
1645
1646                 /* Basic SD framing looks ok - process each packet (header) */
1647
1648                 skb_queue_walk_safe(&bus->glom, pfirst, pnext) {
1649                         dptr = (u8 *) (pfirst->data);
1650                         sublen = get_unaligned_le16(dptr);
1651                         doff = brcmf_sdio_getdatoffset(&dptr[SDPCM_HWHDR_LEN]);
1652
1653                         brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_DATA_ON(),
1654                                            dptr, pfirst->len,
1655                                            "Rx Subframe Data:\n");
1656
1657                         __skb_trim(pfirst, sublen);
1658                         skb_pull(pfirst, doff);
1659
1660                         if (pfirst->len == 0) {
1661                                 skb_unlink(pfirst, &bus->glom);
1662                                 brcmu_pkt_buf_free_skb(pfirst);
1663                                 continue;
1664                         }
1665
1666                         brcmf_dbg_hex_dump(BRCMF_GLOM_ON(),
1667                                            pfirst->data,
1668                                            min_t(int, pfirst->len, 32),
1669                                            "subframe %d to stack, %p (%p/%d) nxt/lnk %p/%p\n",
1670                                            bus->glom.qlen, pfirst, pfirst->data,
1671                                            pfirst->len, pfirst->next,
1672                                            pfirst->prev);
1673                         skb_unlink(pfirst, &bus->glom);
1674                         if (brcmf_sdio_fromevntchan(&dptr[SDPCM_HWHDR_LEN]))
1675                                 brcmf_rx_event(bus->sdiodev->dev, pfirst);
1676                         else
1677                                 brcmf_rx_frame(bus->sdiodev->dev, pfirst,
1678                                                false);
1679                         bus->sdcnt.rxglompkts++;
1680                 }
1681
1682                 bus->sdcnt.rxglomframes++;
1683         }
1684         return num;
1685 }
1686
1687 static int brcmf_sdio_dcmd_resp_wait(struct brcmf_sdio *bus, uint *condition,
1688                                      bool *pending)
1689 {
1690         DECLARE_WAITQUEUE(wait, current);
1691         int timeout = DCMD_RESP_TIMEOUT;
1692
1693         /* Wait until control frame is available */
1694         add_wait_queue(&bus->dcmd_resp_wait, &wait);
1695         set_current_state(TASK_INTERRUPTIBLE);
1696
1697         while (!(*condition) && (!signal_pending(current) && timeout))
1698                 timeout = schedule_timeout(timeout);
1699
1700         if (signal_pending(current))
1701                 *pending = true;
1702
1703         set_current_state(TASK_RUNNING);
1704         remove_wait_queue(&bus->dcmd_resp_wait, &wait);
1705
1706         return timeout;
1707 }
1708
1709 static int brcmf_sdio_dcmd_resp_wake(struct brcmf_sdio *bus)
1710 {
1711         wake_up_interruptible(&bus->dcmd_resp_wait);
1712
1713         return 0;
1714 }
1715 static void
1716 brcmf_sdio_read_control(struct brcmf_sdio *bus, u8 *hdr, uint len, uint doff)
1717 {
1718         uint rdlen, pad;
1719         u8 *buf = NULL, *rbuf;
1720         int sdret;
1721
1722         brcmf_dbg(TRACE, "Enter\n");
1723
1724         if (bus->rxblen)
1725                 buf = vzalloc(bus->rxblen);
1726         if (!buf)
1727                 goto done;
1728
1729         rbuf = bus->rxbuf;
1730         pad = ((unsigned long)rbuf % bus->head_align);
1731         if (pad)
1732                 rbuf += (bus->head_align - pad);
1733
1734         /* Copy the already-read portion over */
1735         memcpy(buf, hdr, BRCMF_FIRSTREAD);
1736         if (len <= BRCMF_FIRSTREAD)
1737                 goto gotpkt;
1738
1739         /* Raise rdlen to next SDIO block to avoid tail command */
1740         rdlen = len - BRCMF_FIRSTREAD;
1741         if (bus->roundup && bus->blocksize && (rdlen > bus->blocksize)) {
1742                 pad = bus->blocksize - (rdlen % bus->blocksize);
1743                 if ((pad <= bus->roundup) && (pad < bus->blocksize) &&
1744                     ((len + pad) < bus->sdiodev->bus_if->maxctl))
1745                         rdlen += pad;
1746         } else if (rdlen % bus->head_align) {
1747                 rdlen += bus->head_align - (rdlen % bus->head_align);
1748         }
1749
1750         /* Drop if the read is too big or it exceeds our maximum */
1751         if ((rdlen + BRCMF_FIRSTREAD) > bus->sdiodev->bus_if->maxctl) {
1752                 brcmf_err("%d-byte control read exceeds %d-byte buffer\n",
1753                           rdlen, bus->sdiodev->bus_if->maxctl);
1754                 brcmf_sdio_rxfail(bus, false, false);
1755                 goto done;
1756         }
1757
1758         if ((len - doff) > bus->sdiodev->bus_if->maxctl) {
1759                 brcmf_err("%d-byte ctl frame (%d-byte ctl data) exceeds %d-byte limit\n",
1760                           len, len - doff, bus->sdiodev->bus_if->maxctl);
1761                 bus->sdcnt.rx_toolong++;
1762                 brcmf_sdio_rxfail(bus, false, false);
1763                 goto done;
1764         }
1765
1766         /* Read remain of frame body */
1767         sdret = brcmf_sdiod_recv_buf(bus->sdiodev, rbuf, rdlen);
1768         bus->sdcnt.f2rxdata++;
1769
1770         /* Control frame failures need retransmission */
1771         if (sdret < 0) {
1772                 brcmf_err("read %d control bytes failed: %d\n",
1773                           rdlen, sdret);
1774                 bus->sdcnt.rxc_errors++;
1775                 brcmf_sdio_rxfail(bus, true, true);
1776                 goto done;
1777         } else
1778                 memcpy(buf + BRCMF_FIRSTREAD, rbuf, rdlen);
1779
1780 gotpkt:
1781
1782         brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_CTL_ON(),
1783                            buf, len, "RxCtrl:\n");
1784
1785         /* Point to valid data and indicate its length */
1786         spin_lock_bh(&bus->rxctl_lock);
1787         if (bus->rxctl) {
1788                 brcmf_err("last control frame is being processed.\n");
1789                 spin_unlock_bh(&bus->rxctl_lock);
1790                 vfree(buf);
1791                 goto done;
1792         }
1793         bus->rxctl = buf + doff;
1794         bus->rxctl_orig = buf;
1795         bus->rxlen = len - doff;
1796         spin_unlock_bh(&bus->rxctl_lock);
1797
1798 done:
1799         /* Awake any waiters */
1800         brcmf_sdio_dcmd_resp_wake(bus);
1801 }
1802
1803 /* Pad read to blocksize for efficiency */
1804 static void brcmf_sdio_pad(struct brcmf_sdio *bus, u16 *pad, u16 *rdlen)
1805 {
1806         if (bus->roundup && bus->blocksize && *rdlen > bus->blocksize) {
1807                 *pad = bus->blocksize - (*rdlen % bus->blocksize);
1808                 if (*pad <= bus->roundup && *pad < bus->blocksize &&
1809                     *rdlen + *pad + BRCMF_FIRSTREAD < MAX_RX_DATASZ)
1810                         *rdlen += *pad;
1811         } else if (*rdlen % bus->head_align) {
1812                 *rdlen += bus->head_align - (*rdlen % bus->head_align);
1813         }
1814 }
1815
1816 static uint brcmf_sdio_readframes(struct brcmf_sdio *bus, uint maxframes)
1817 {
1818         struct sk_buff *pkt;            /* Packet for event or data frames */
1819         u16 pad;                /* Number of pad bytes to read */
1820         uint rxleft = 0;        /* Remaining number of frames allowed */
1821         int ret;                /* Return code from calls */
1822         uint rxcount = 0;       /* Total frames read */
1823         struct brcmf_sdio_hdrinfo *rd = &bus->cur_read, rd_new;
1824         u8 head_read = 0;
1825
1826         brcmf_dbg(TRACE, "Enter\n");
1827
1828         /* Not finished unless we encounter no more frames indication */
1829         bus->rxpending = true;
1830
1831         for (rd->seq_num = bus->rx_seq, rxleft = maxframes;
1832              !bus->rxskip && rxleft && bus->sdiodev->state == BRCMF_SDIOD_DATA;
1833              rd->seq_num++, rxleft--) {
1834
1835                 /* Handle glomming separately */
1836                 if (bus->glomd || !skb_queue_empty(&bus->glom)) {
1837                         u8 cnt;
1838                         brcmf_dbg(GLOM, "calling rxglom: glomd %p, glom %p\n",
1839                                   bus->glomd, skb_peek(&bus->glom));
1840                         cnt = brcmf_sdio_rxglom(bus, rd->seq_num);
1841                         brcmf_dbg(GLOM, "rxglom returned %d\n", cnt);
1842                         rd->seq_num += cnt - 1;
1843                         rxleft = (rxleft > cnt) ? (rxleft - cnt) : 1;
1844                         continue;
1845                 }
1846
1847                 rd->len_left = rd->len;
1848                 /* read header first for unknow frame length */
1849                 sdio_claim_host(bus->sdiodev->func[1]);
1850                 if (!rd->len) {
1851                         ret = brcmf_sdiod_recv_buf(bus->sdiodev,
1852                                                    bus->rxhdr, BRCMF_FIRSTREAD);
1853                         bus->sdcnt.f2rxhdrs++;
1854                         if (ret < 0) {
1855                                 brcmf_err("RXHEADER FAILED: %d\n",
1856                                           ret);
1857                                 bus->sdcnt.rx_hdrfail++;
1858                                 brcmf_sdio_rxfail(bus, true, true);
1859                                 sdio_release_host(bus->sdiodev->func[1]);
1860                                 continue;
1861                         }
1862
1863                         brcmf_dbg_hex_dump(BRCMF_BYTES_ON() || BRCMF_HDRS_ON(),
1864                                            bus->rxhdr, SDPCM_HDRLEN,
1865                                            "RxHdr:\n");
1866
1867                         if (brcmf_sdio_hdparse(bus, bus->rxhdr, rd,
1868                                                BRCMF_SDIO_FT_NORMAL)) {
1869                                 sdio_release_host(bus->sdiodev->func[1]);
1870                                 if (!bus->rxpending)
1871                                         break;
1872                                 else
1873                                         continue;
1874                         }
1875
1876                         if (rd->channel == SDPCM_CONTROL_CHANNEL) {
1877                                 brcmf_sdio_read_control(bus, bus->rxhdr,
1878                                                         rd->len,
1879                                                         rd->dat_offset);
1880                                 /* prepare the descriptor for the next read */
1881                                 rd->len = rd->len_nxtfrm << 4;
1882                                 rd->len_nxtfrm = 0;
1883                                 /* treat all packet as event if we don't know */
1884                                 rd->channel = SDPCM_EVENT_CHANNEL;
1885                                 sdio_release_host(bus->sdiodev->func[1]);
1886                                 continue;
1887                         }
1888                         rd->len_left = rd->len > BRCMF_FIRSTREAD ?
1889                                        rd->len - BRCMF_FIRSTREAD : 0;
1890                         head_read = BRCMF_FIRSTREAD;
1891                 }
1892
1893                 brcmf_sdio_pad(bus, &pad, &rd->len_left);
1894
1895                 pkt = brcmu_pkt_buf_get_skb(rd->len_left + head_read +
1896                                             bus->head_align);
1897                 if (!pkt) {
1898                         /* Give up on data, request rtx of events */
1899                         brcmf_err("brcmu_pkt_buf_get_skb failed\n");
1900                         brcmf_sdio_rxfail(bus, false,
1901                                             RETRYCHAN(rd->channel));
1902                         sdio_release_host(bus->sdiodev->func[1]);
1903                         continue;
1904                 }
1905                 skb_pull(pkt, head_read);
1906                 pkt_align(pkt, rd->len_left, bus->head_align);
1907
1908                 ret = brcmf_sdiod_recv_pkt(bus->sdiodev, pkt);
1909                 bus->sdcnt.f2rxdata++;
1910                 sdio_release_host(bus->sdiodev->func[1]);
1911
1912                 if (ret < 0) {
1913                         brcmf_err("read %d bytes from channel %d failed: %d\n",
1914                                   rd->len, rd->channel, ret);
1915                         brcmu_pkt_buf_free_skb(pkt);
1916                         sdio_claim_host(bus->sdiodev->func[1]);
1917                         brcmf_sdio_rxfail(bus, true,
1918                                             RETRYCHAN(rd->channel));
1919                         sdio_release_host(bus->sdiodev->func[1]);
1920                         continue;
1921                 }
1922
1923                 if (head_read) {
1924                         skb_push(pkt, head_read);
1925                         memcpy(pkt->data, bus->rxhdr, head_read);
1926                         head_read = 0;
1927                 } else {
1928                         memcpy(bus->rxhdr, pkt->data, SDPCM_HDRLEN);
1929                         rd_new.seq_num = rd->seq_num;
1930                         sdio_claim_host(bus->sdiodev->func[1]);
1931                         if (brcmf_sdio_hdparse(bus, bus->rxhdr, &rd_new,
1932                                                BRCMF_SDIO_FT_NORMAL)) {
1933                                 rd->len = 0;
1934                                 brcmu_pkt_buf_free_skb(pkt);
1935                                 continue;
1936                         }
1937                         bus->sdcnt.rx_readahead_cnt++;
1938                         if (rd->len != roundup(rd_new.len, 16)) {
1939                                 brcmf_err("frame length mismatch:read %d, should be %d\n",
1940                                           rd->len,
1941                                           roundup(rd_new.len, 16) >> 4);
1942                                 rd->len = 0;
1943                                 brcmf_sdio_rxfail(bus, true, true);
1944                                 sdio_release_host(bus->sdiodev->func[1]);
1945                                 brcmu_pkt_buf_free_skb(pkt);
1946                                 continue;
1947                         }
1948                         sdio_release_host(bus->sdiodev->func[1]);
1949                         rd->len_nxtfrm = rd_new.len_nxtfrm;
1950                         rd->channel = rd_new.channel;
1951                         rd->dat_offset = rd_new.dat_offset;
1952
1953                         brcmf_dbg_hex_dump(!(BRCMF_BYTES_ON() &&
1954                                              BRCMF_DATA_ON()) &&
1955                                            BRCMF_HDRS_ON(),
1956                                            bus->rxhdr, SDPCM_HDRLEN,
1957                                            "RxHdr:\n");
1958
1959                         if (rd_new.channel == SDPCM_CONTROL_CHANNEL) {
1960                                 brcmf_err("readahead on control packet %d?\n",
1961                                           rd_new.seq_num);
1962                                 /* Force retry w/normal header read */
1963                                 rd->len = 0;
1964                                 sdio_claim_host(bus->sdiodev->func[1]);
1965                                 brcmf_sdio_rxfail(bus, false, true);
1966                                 sdio_release_host(bus->sdiodev->func[1]);
1967                                 brcmu_pkt_buf_free_skb(pkt);
1968                                 continue;
1969                         }
1970                 }
1971
1972                 brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_DATA_ON(),
1973                                    pkt->data, rd->len, "Rx Data:\n");
1974
1975                 /* Save superframe descriptor and allocate packet frame */
1976                 if (rd->channel == SDPCM_GLOM_CHANNEL) {
1977                         if (SDPCM_GLOMDESC(&bus->rxhdr[SDPCM_HWHDR_LEN])) {
1978                                 brcmf_dbg(GLOM, "glom descriptor, %d bytes:\n",
1979                                           rd->len);
1980                                 brcmf_dbg_hex_dump(BRCMF_GLOM_ON(),
1981                                                    pkt->data, rd->len,
1982                                                    "Glom Data:\n");
1983                                 __skb_trim(pkt, rd->len);
1984                                 skb_pull(pkt, SDPCM_HDRLEN);
1985                                 bus->glomd = pkt;
1986                         } else {
1987                                 brcmf_err("%s: glom superframe w/o "
1988                                           "descriptor!\n", __func__);
1989                                 sdio_claim_host(bus->sdiodev->func[1]);
1990                                 brcmf_sdio_rxfail(bus, false, false);
1991                                 sdio_release_host(bus->sdiodev->func[1]);
1992                         }
1993                         /* prepare the descriptor for the next read */
1994                         rd->len = rd->len_nxtfrm << 4;
1995                         rd->len_nxtfrm = 0;
1996                         /* treat all packet as event if we don't know */
1997                         rd->channel = SDPCM_EVENT_CHANNEL;
1998                         continue;
1999                 }
2000
2001                 /* Fill in packet len and prio, deliver upward */
2002                 __skb_trim(pkt, rd->len);
2003                 skb_pull(pkt, rd->dat_offset);
2004
2005                 if (pkt->len == 0)
2006                         brcmu_pkt_buf_free_skb(pkt);
2007                 else if (rd->channel == SDPCM_EVENT_CHANNEL)
2008                         brcmf_rx_event(bus->sdiodev->dev, pkt);
2009                 else
2010                         brcmf_rx_frame(bus->sdiodev->dev, pkt,
2011                                        false);
2012
2013                 /* prepare the descriptor for the next read */
2014                 rd->len = rd->len_nxtfrm << 4;
2015                 rd->len_nxtfrm = 0;
2016                 /* treat all packet as event if we don't know */
2017                 rd->channel = SDPCM_EVENT_CHANNEL;
2018         }
2019
2020         rxcount = maxframes - rxleft;
2021         /* Message if we hit the limit */
2022         if (!rxleft)
2023                 brcmf_dbg(DATA, "hit rx limit of %d frames\n", maxframes);
2024         else
2025                 brcmf_dbg(DATA, "processed %d frames\n", rxcount);
2026         /* Back off rxseq if awaiting rtx, update rx_seq */
2027         if (bus->rxskip)
2028                 rd->seq_num--;
2029         bus->rx_seq = rd->seq_num;
2030
2031         return rxcount;
2032 }
2033
2034 static void
2035 brcmf_sdio_wait_event_wakeup(struct brcmf_sdio *bus)
2036 {
2037         wake_up_interruptible(&bus->ctrl_wait);
2038         return;
2039 }
2040
2041 static int brcmf_sdio_txpkt_hdalign(struct brcmf_sdio *bus, struct sk_buff *pkt)
2042 {
2043         struct brcmf_bus_stats *stats;
2044         u16 head_pad;
2045         u8 *dat_buf;
2046
2047         dat_buf = (u8 *)(pkt->data);
2048
2049         /* Check head padding */
2050         head_pad = ((unsigned long)dat_buf % bus->head_align);
2051         if (head_pad) {
2052                 if (skb_headroom(pkt) < head_pad) {
2053                         stats = &bus->sdiodev->bus_if->stats;
2054                         atomic_inc(&stats->pktcowed);
2055                         if (skb_cow_head(pkt, head_pad)) {
2056                                 atomic_inc(&stats->pktcow_failed);
2057                                 return -ENOMEM;
2058                         }
2059                         head_pad = 0;
2060                 }
2061                 skb_push(pkt, head_pad);
2062                 dat_buf = (u8 *)(pkt->data);
2063         }
2064         memset(dat_buf, 0, head_pad + bus->tx_hdrlen);
2065         return head_pad;
2066 }
2067
2068 /*
2069  * struct brcmf_skbuff_cb reserves first two bytes in sk_buff::cb for
2070  * bus layer usage.
2071  */
2072 /* flag marking a dummy skb added for DMA alignment requirement */
2073 #define ALIGN_SKB_FLAG          0x8000
2074 /* bit mask of data length chopped from the previous packet */
2075 #define ALIGN_SKB_CHOP_LEN_MASK 0x7fff
2076
2077 static int brcmf_sdio_txpkt_prep_sg(struct brcmf_sdio *bus,
2078                                     struct sk_buff_head *pktq,
2079                                     struct sk_buff *pkt, u16 total_len)
2080 {
2081         struct brcmf_sdio_dev *sdiodev;
2082         struct sk_buff *pkt_pad;
2083         u16 tail_pad, tail_chop, chain_pad;
2084         unsigned int blksize;
2085         bool lastfrm;
2086         int ntail, ret;
2087
2088         sdiodev = bus->sdiodev;
2089         blksize = sdiodev->func[SDIO_FUNC_2]->cur_blksize;
2090         /* sg entry alignment should be a divisor of block size */
2091         WARN_ON(blksize % bus->sgentry_align);
2092
2093         /* Check tail padding */
2094         lastfrm = skb_queue_is_last(pktq, pkt);
2095         tail_pad = 0;
2096         tail_chop = pkt->len % bus->sgentry_align;
2097         if (tail_chop)
2098                 tail_pad = bus->sgentry_align - tail_chop;
2099         chain_pad = (total_len + tail_pad) % blksize;
2100         if (lastfrm && chain_pad)
2101                 tail_pad += blksize - chain_pad;
2102         if (skb_tailroom(pkt) < tail_pad && pkt->len > blksize) {
2103                 pkt_pad = brcmu_pkt_buf_get_skb(tail_pad + tail_chop +
2104                                                 bus->head_align);
2105                 if (pkt_pad == NULL)
2106                         return -ENOMEM;
2107                 ret = brcmf_sdio_txpkt_hdalign(bus, pkt_pad);
2108                 if (unlikely(ret < 0)) {
2109                         kfree_skb(pkt_pad);
2110                         return ret;
2111                 }
2112                 memcpy(pkt_pad->data,
2113                        pkt->data + pkt->len - tail_chop,
2114                        tail_chop);
2115                 *(u16 *)(pkt_pad->cb) = ALIGN_SKB_FLAG + tail_chop;
2116                 skb_trim(pkt, pkt->len - tail_chop);
2117                 skb_trim(pkt_pad, tail_pad + tail_chop);
2118                 __skb_queue_after(pktq, pkt, pkt_pad);
2119         } else {
2120                 ntail = pkt->data_len + tail_pad -
2121                         (pkt->end - pkt->tail);
2122                 if (skb_cloned(pkt) || ntail > 0)
2123                         if (pskb_expand_head(pkt, 0, ntail, GFP_ATOMIC))
2124                                 return -ENOMEM;
2125                 if (skb_linearize(pkt))
2126                         return -ENOMEM;
2127                 __skb_put(pkt, tail_pad);
2128         }
2129
2130         return tail_pad;
2131 }
2132
2133 /**
2134  * brcmf_sdio_txpkt_prep - packet preparation for transmit
2135  * @bus: brcmf_sdio structure pointer
2136  * @pktq: packet list pointer
2137  * @chan: virtual channel to transmit the packet
2138  *
2139  * Processes to be applied to the packet
2140  *      - Align data buffer pointer
2141  *      - Align data buffer length
2142  *      - Prepare header
2143  * Return: negative value if there is error
2144  */
2145 static int
2146 brcmf_sdio_txpkt_prep(struct brcmf_sdio *bus, struct sk_buff_head *pktq,
2147                       uint chan)
2148 {
2149         u16 head_pad, total_len;
2150         struct sk_buff *pkt_next;
2151         u8 txseq;
2152         int ret;
2153         struct brcmf_sdio_hdrinfo hd_info = {0};
2154
2155         txseq = bus->tx_seq;
2156         total_len = 0;
2157         skb_queue_walk(pktq, pkt_next) {
2158                 /* alignment packet inserted in previous
2159                  * loop cycle can be skipped as it is
2160                  * already properly aligned and does not
2161                  * need an sdpcm header.
2162                  */
2163                 if (*(u16 *)(pkt_next->cb) & ALIGN_SKB_FLAG)
2164                         continue;
2165
2166                 /* align packet data pointer */
2167                 ret = brcmf_sdio_txpkt_hdalign(bus, pkt_next);
2168                 if (ret < 0)
2169                         return ret;
2170                 head_pad = (u16)ret;
2171                 if (head_pad)
2172                         memset(pkt_next->data + bus->tx_hdrlen, 0, head_pad);
2173
2174                 total_len += pkt_next->len;
2175
2176                 hd_info.len = pkt_next->len;
2177                 hd_info.lastfrm = skb_queue_is_last(pktq, pkt_next);
2178                 if (bus->txglom && pktq->qlen > 1) {
2179                         ret = brcmf_sdio_txpkt_prep_sg(bus, pktq,
2180                                                        pkt_next, total_len);
2181                         if (ret < 0)
2182                                 return ret;
2183                         hd_info.tail_pad = (u16)ret;
2184                         total_len += (u16)ret;
2185                 }
2186
2187                 hd_info.channel = chan;
2188                 hd_info.dat_offset = head_pad + bus->tx_hdrlen;
2189                 hd_info.seq_num = txseq++;
2190
2191                 /* Now fill the header */
2192                 brcmf_sdio_hdpack(bus, pkt_next->data, &hd_info);
2193
2194                 if (BRCMF_BYTES_ON() &&
2195                     ((BRCMF_CTL_ON() && chan == SDPCM_CONTROL_CHANNEL) ||
2196                      (BRCMF_DATA_ON() && chan != SDPCM_CONTROL_CHANNEL)))
2197                         brcmf_dbg_hex_dump(true, pkt_next->data, hd_info.len,
2198                                            "Tx Frame:\n");
2199                 else if (BRCMF_HDRS_ON())
2200                         brcmf_dbg_hex_dump(true, pkt_next->data,
2201                                            head_pad + bus->tx_hdrlen,
2202                                            "Tx Header:\n");
2203         }
2204         /* Hardware length tag of the first packet should be total
2205          * length of the chain (including padding)
2206          */
2207         if (bus->txglom)
2208                 brcmf_sdio_update_hwhdr(pktq->next->data, total_len);
2209         return 0;
2210 }
2211
2212 /**
2213  * brcmf_sdio_txpkt_postp - packet post processing for transmit
2214  * @bus: brcmf_sdio structure pointer
2215  * @pktq: packet list pointer
2216  *
2217  * Processes to be applied to the packet
2218  *      - Remove head padding
2219  *      - Remove tail padding
2220  */
2221 static void
2222 brcmf_sdio_txpkt_postp(struct brcmf_sdio *bus, struct sk_buff_head *pktq)
2223 {
2224         u8 *hdr;
2225         u32 dat_offset;
2226         u16 tail_pad;
2227         u16 dummy_flags, chop_len;
2228         struct sk_buff *pkt_next, *tmp, *pkt_prev;
2229
2230         skb_queue_walk_safe(pktq, pkt_next, tmp) {
2231                 dummy_flags = *(u16 *)(pkt_next->cb);
2232                 if (dummy_flags & ALIGN_SKB_FLAG) {
2233                         chop_len = dummy_flags & ALIGN_SKB_CHOP_LEN_MASK;
2234                         if (chop_len) {
2235                                 pkt_prev = pkt_next->prev;
2236                                 skb_put(pkt_prev, chop_len);
2237                         }
2238                         __skb_unlink(pkt_next, pktq);
2239                         brcmu_pkt_buf_free_skb(pkt_next);
2240                 } else {
2241                         hdr = pkt_next->data + bus->tx_hdrlen - SDPCM_SWHDR_LEN;
2242                         dat_offset = le32_to_cpu(*(__le32 *)hdr);
2243                         dat_offset = (dat_offset & SDPCM_DOFFSET_MASK) >>
2244                                      SDPCM_DOFFSET_SHIFT;
2245                         skb_pull(pkt_next, dat_offset);
2246                         if (bus->txglom) {
2247                                 tail_pad = le16_to_cpu(*(__le16 *)(hdr - 2));
2248                                 skb_trim(pkt_next, pkt_next->len - tail_pad);
2249                         }
2250                 }
2251         }
2252 }
2253
2254 /* Writes a HW/SW header into the packet and sends it. */
2255 /* Assumes: (a) header space already there, (b) caller holds lock */
2256 static int brcmf_sdio_txpkt(struct brcmf_sdio *bus, struct sk_buff_head *pktq,
2257                             uint chan)
2258 {
2259         int ret;
2260         struct sk_buff *pkt_next, *tmp;
2261
2262         brcmf_dbg(TRACE, "Enter\n");
2263
2264         ret = brcmf_sdio_txpkt_prep(bus, pktq, chan);
2265         if (ret)
2266                 goto done;
2267
2268         sdio_claim_host(bus->sdiodev->func[1]);
2269         ret = brcmf_sdiod_send_pkt(bus->sdiodev, pktq);
2270         bus->sdcnt.f2txdata++;
2271
2272         if (ret < 0)
2273                 brcmf_sdio_txfail(bus);
2274
2275         sdio_release_host(bus->sdiodev->func[1]);
2276
2277 done:
2278         brcmf_sdio_txpkt_postp(bus, pktq);
2279         if (ret == 0)
2280                 bus->tx_seq = (bus->tx_seq + pktq->qlen) % SDPCM_SEQ_WRAP;
2281         skb_queue_walk_safe(pktq, pkt_next, tmp) {
2282                 __skb_unlink(pkt_next, pktq);
2283                 brcmf_proto_bcdc_txcomplete(bus->sdiodev->dev, pkt_next,
2284                                             ret == 0);
2285         }
2286         return ret;
2287 }
2288
2289 static uint brcmf_sdio_sendfromq(struct brcmf_sdio *bus, uint maxframes)
2290 {
2291         struct sk_buff *pkt;
2292         struct sk_buff_head pktq;
2293         u32 intstatus = 0;
2294         int ret = 0, prec_out, i;
2295         uint cnt = 0;
2296         u8 tx_prec_map, pkt_num;
2297
2298         brcmf_dbg(TRACE, "Enter\n");
2299
2300         tx_prec_map = ~bus->flowcontrol;
2301
2302         /* Send frames until the limit or some other event */
2303         for (cnt = 0; (cnt < maxframes) && data_ok(bus);) {
2304                 pkt_num = 1;
2305                 if (bus->txglom)
2306                         pkt_num = min_t(u8, bus->tx_max - bus->tx_seq,
2307                                         bus->sdiodev->txglomsz);
2308                 pkt_num = min_t(u32, pkt_num,
2309                                 brcmu_pktq_mlen(&bus->txq, ~bus->flowcontrol));
2310                 __skb_queue_head_init(&pktq);
2311                 spin_lock_bh(&bus->txq_lock);
2312                 for (i = 0; i < pkt_num; i++) {
2313                         pkt = brcmu_pktq_mdeq(&bus->txq, tx_prec_map,
2314                                               &prec_out);
2315                         if (pkt == NULL)
2316                                 break;
2317                         __skb_queue_tail(&pktq, pkt);
2318                 }
2319                 spin_unlock_bh(&bus->txq_lock);
2320                 if (i == 0)
2321                         break;
2322
2323                 ret = brcmf_sdio_txpkt(bus, &pktq, SDPCM_DATA_CHANNEL);
2324
2325                 cnt += i;
2326
2327                 /* In poll mode, need to check for other events */
2328                 if (!bus->intr) {
2329                         /* Check device status, signal pending interrupt */
2330                         sdio_claim_host(bus->sdiodev->func[1]);
2331                         ret = r_sdreg32(bus, &intstatus,
2332                                         offsetof(struct sdpcmd_regs,
2333                                                  intstatus));
2334                         sdio_release_host(bus->sdiodev->func[1]);
2335                         bus->sdcnt.f2txdata++;
2336                         if (ret != 0)
2337                                 break;
2338                         if (intstatus & bus->hostintmask)
2339                                 atomic_set(&bus->ipend, 1);
2340                 }
2341         }
2342
2343         /* Deflow-control stack if needed */
2344         if ((bus->sdiodev->state == BRCMF_SDIOD_DATA) &&
2345             bus->txoff && (pktq_len(&bus->txq) < TXLOW)) {
2346                 bus->txoff = false;
2347                 brcmf_proto_bcdc_txflowblock(bus->sdiodev->dev, false);
2348         }
2349
2350         return cnt;
2351 }
2352
2353 static int brcmf_sdio_tx_ctrlframe(struct brcmf_sdio *bus, u8 *frame, u16 len)
2354 {
2355         u8 doff;
2356         u16 pad;
2357         uint retries = 0;
2358         struct brcmf_sdio_hdrinfo hd_info = {0};
2359         int ret;
2360
2361         brcmf_dbg(TRACE, "Enter\n");
2362
2363         /* Back the pointer to make room for bus header */
2364         frame -= bus->tx_hdrlen;
2365         len += bus->tx_hdrlen;
2366
2367         /* Add alignment padding (optional for ctl frames) */
2368         doff = ((unsigned long)frame % bus->head_align);
2369         if (doff) {
2370                 frame -= doff;
2371                 len += doff;
2372                 memset(frame + bus->tx_hdrlen, 0, doff);
2373         }
2374
2375         /* Round send length to next SDIO block */
2376         pad = 0;
2377         if (bus->roundup && bus->blocksize && (len > bus->blocksize)) {
2378                 pad = bus->blocksize - (len % bus->blocksize);
2379                 if ((pad > bus->roundup) || (pad >= bus->blocksize))
2380                         pad = 0;
2381         } else if (len % bus->head_align) {
2382                 pad = bus->head_align - (len % bus->head_align);
2383         }
2384         len += pad;
2385
2386         hd_info.len = len - pad;
2387         hd_info.channel = SDPCM_CONTROL_CHANNEL;
2388         hd_info.dat_offset = doff + bus->tx_hdrlen;
2389         hd_info.seq_num = bus->tx_seq;
2390         hd_info.lastfrm = true;
2391         hd_info.tail_pad = pad;
2392         brcmf_sdio_hdpack(bus, frame, &hd_info);
2393
2394         if (bus->txglom)
2395                 brcmf_sdio_update_hwhdr(frame, len);
2396
2397         brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_CTL_ON(),
2398                            frame, len, "Tx Frame:\n");
2399         brcmf_dbg_hex_dump(!(BRCMF_BYTES_ON() && BRCMF_CTL_ON()) &&
2400                            BRCMF_HDRS_ON(),
2401                            frame, min_t(u16, len, 16), "TxHdr:\n");
2402
2403         do {
2404                 ret = brcmf_sdiod_send_buf(bus->sdiodev, frame, len);
2405
2406                 if (ret < 0)
2407                         brcmf_sdio_txfail(bus);
2408                 else
2409                         bus->tx_seq = (bus->tx_seq + 1) % SDPCM_SEQ_WRAP;
2410         } while (ret < 0 && retries++ < TXRETRIES);
2411
2412         return ret;
2413 }
2414
2415 static void brcmf_sdio_bus_stop(struct device *dev)
2416 {
2417         u32 local_hostintmask;
2418         u8 saveclk;
2419         int err;
2420         struct brcmf_bus *bus_if = dev_get_drvdata(dev);
2421         struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
2422         struct brcmf_sdio *bus = sdiodev->bus;
2423
2424         brcmf_dbg(TRACE, "Enter\n");
2425
2426         if (bus->watchdog_tsk) {
2427                 send_sig(SIGTERM, bus->watchdog_tsk, 1);
2428                 kthread_stop(bus->watchdog_tsk);
2429                 bus->watchdog_tsk = NULL;
2430         }
2431
2432         if (sdiodev->state != BRCMF_SDIOD_NOMEDIUM) {
2433                 sdio_claim_host(sdiodev->func[1]);
2434
2435                 /* Enable clock for device interrupts */
2436                 brcmf_sdio_bus_sleep(bus, false, false);
2437
2438                 /* Disable and clear interrupts at the chip level also */
2439                 w_sdreg32(bus, 0, offsetof(struct sdpcmd_regs, hostintmask));
2440                 local_hostintmask = bus->hostintmask;
2441                 bus->hostintmask = 0;
2442
2443                 /* Force backplane clocks to assure F2 interrupt propagates */
2444                 saveclk = brcmf_sdiod_regrb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
2445                                             &err);
2446                 if (!err)
2447                         brcmf_sdiod_regwb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
2448                                           (saveclk | SBSDIO_FORCE_HT), &err);
2449                 if (err)
2450                         brcmf_err("Failed to force clock for F2: err %d\n",
2451                                   err);
2452
2453                 /* Turn off the bus (F2), free any pending packets */
2454                 brcmf_dbg(INTR, "disable SDIO interrupts\n");
2455                 sdio_disable_func(sdiodev->func[SDIO_FUNC_2]);
2456
2457                 /* Clear any pending interrupts now that F2 is disabled */
2458                 w_sdreg32(bus, local_hostintmask,
2459                           offsetof(struct sdpcmd_regs, intstatus));
2460
2461                 sdio_release_host(sdiodev->func[1]);
2462         }
2463         /* Clear the data packet queues */
2464         brcmu_pktq_flush(&bus->txq, true, NULL, NULL);
2465
2466         /* Clear any held glomming stuff */
2467         brcmu_pkt_buf_free_skb(bus->glomd);
2468         brcmf_sdio_free_glom(bus);
2469
2470         /* Clear rx control and wake any waiters */
2471         spin_lock_bh(&bus->rxctl_lock);
2472         bus->rxlen = 0;
2473         spin_unlock_bh(&bus->rxctl_lock);
2474         brcmf_sdio_dcmd_resp_wake(bus);
2475
2476         /* Reset some F2 state stuff */
2477         bus->rxskip = false;
2478         bus->tx_seq = bus->rx_seq = 0;
2479 }
2480
2481 static inline void brcmf_sdio_clrintr(struct brcmf_sdio *bus)
2482 {
2483         struct brcmf_sdio_dev *sdiodev;
2484         unsigned long flags;
2485
2486         sdiodev = bus->sdiodev;
2487         if (sdiodev->oob_irq_requested) {
2488                 spin_lock_irqsave(&sdiodev->irq_en_lock, flags);
2489                 if (!sdiodev->irq_en && !atomic_read(&bus->ipend)) {
2490                         enable_irq(sdiodev->settings->bus.sdio.oob_irq_nr);
2491                         sdiodev->irq_en = true;
2492                 }
2493                 spin_unlock_irqrestore(&sdiodev->irq_en_lock, flags);
2494         }
2495 }
2496
2497 static int brcmf_sdio_intr_rstatus(struct brcmf_sdio *bus)
2498 {
2499         struct brcmf_core *buscore;
2500         u32 addr;
2501         unsigned long val;
2502         int ret;
2503
2504         buscore = brcmf_chip_get_core(bus->ci, BCMA_CORE_SDIO_DEV);
2505         addr = buscore->base + offsetof(struct sdpcmd_regs, intstatus);
2506
2507         val = brcmf_sdiod_regrl(bus->sdiodev, addr, &ret);
2508         bus->sdcnt.f1regdata++;
2509         if (ret != 0)
2510                 return ret;
2511
2512         val &= bus->hostintmask;
2513         atomic_set(&bus->fcstate, !!(val & I_HMB_FC_STATE));
2514
2515         /* Clear interrupts */
2516         if (val) {
2517                 brcmf_sdiod_regwl(bus->sdiodev, addr, val, &ret);
2518                 bus->sdcnt.f1regdata++;
2519                 atomic_or(val, &bus->intstatus);
2520         }
2521
2522         return ret;
2523 }
2524
2525 static void brcmf_sdio_dpc(struct brcmf_sdio *bus)
2526 {
2527         u32 newstatus = 0;
2528         unsigned long intstatus;
2529         uint txlimit = bus->txbound;    /* Tx frames to send before resched */
2530         uint framecnt;                  /* Temporary counter of tx/rx frames */
2531         int err = 0;
2532
2533         brcmf_dbg(TRACE, "Enter\n");
2534
2535         sdio_claim_host(bus->sdiodev->func[1]);
2536
2537         /* If waiting for HTAVAIL, check status */
2538         if (!bus->sr_enabled && bus->clkstate == CLK_PENDING) {
2539                 u8 clkctl, devctl = 0;
2540
2541 #ifdef DEBUG
2542                 /* Check for inconsistent device control */
2543                 devctl = brcmf_sdiod_regrb(bus->sdiodev,
2544                                            SBSDIO_DEVICE_CTL, &err);
2545 #endif                          /* DEBUG */
2546
2547                 /* Read CSR, if clock on switch to AVAIL, else ignore */
2548                 clkctl = brcmf_sdiod_regrb(bus->sdiodev,
2549                                            SBSDIO_FUNC1_CHIPCLKCSR, &err);
2550
2551                 brcmf_dbg(SDIO, "DPC: PENDING, devctl 0x%02x clkctl 0x%02x\n",
2552                           devctl, clkctl);
2553
2554                 if (SBSDIO_HTAV(clkctl)) {
2555                         devctl = brcmf_sdiod_regrb(bus->sdiodev,
2556                                                    SBSDIO_DEVICE_CTL, &err);
2557                         devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY;
2558                         brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_DEVICE_CTL,
2559                                           devctl, &err);
2560                         bus->clkstate = CLK_AVAIL;
2561                 }
2562         }
2563
2564         /* Make sure backplane clock is on */
2565         brcmf_sdio_bus_sleep(bus, false, true);
2566
2567         /* Pending interrupt indicates new device status */
2568         if (atomic_read(&bus->ipend) > 0) {
2569                 atomic_set(&bus->ipend, 0);
2570                 err = brcmf_sdio_intr_rstatus(bus);
2571         }
2572
2573         /* Start with leftover status bits */
2574         intstatus = atomic_xchg(&bus->intstatus, 0);
2575
2576         /* Handle flow-control change: read new state in case our ack
2577          * crossed another change interrupt.  If change still set, assume
2578          * FC ON for safety, let next loop through do the debounce.
2579          */
2580         if (intstatus & I_HMB_FC_CHANGE) {
2581                 intstatus &= ~I_HMB_FC_CHANGE;
2582                 err = w_sdreg32(bus, I_HMB_FC_CHANGE,
2583                                 offsetof(struct sdpcmd_regs, intstatus));
2584
2585                 err = r_sdreg32(bus, &newstatus,
2586                                 offsetof(struct sdpcmd_regs, intstatus));
2587                 bus->sdcnt.f1regdata += 2;
2588                 atomic_set(&bus->fcstate,
2589                            !!(newstatus & (I_HMB_FC_STATE | I_HMB_FC_CHANGE)));
2590                 intstatus |= (newstatus & bus->hostintmask);
2591         }
2592
2593         /* Handle host mailbox indication */
2594         if (intstatus & I_HMB_HOST_INT) {
2595                 intstatus &= ~I_HMB_HOST_INT;
2596                 intstatus |= brcmf_sdio_hostmail(bus);
2597         }
2598
2599         sdio_release_host(bus->sdiodev->func[1]);
2600
2601         /* Generally don't ask for these, can get CRC errors... */
2602         if (intstatus & I_WR_OOSYNC) {
2603                 brcmf_err("Dongle reports WR_OOSYNC\n");
2604                 intstatus &= ~I_WR_OOSYNC;
2605         }
2606
2607         if (intstatus & I_RD_OOSYNC) {
2608                 brcmf_err("Dongle reports RD_OOSYNC\n");
2609                 intstatus &= ~I_RD_OOSYNC;
2610         }
2611
2612         if (intstatus & I_SBINT) {
2613                 brcmf_err("Dongle reports SBINT\n");
2614                 intstatus &= ~I_SBINT;
2615         }
2616
2617         /* Would be active due to wake-wlan in gSPI */
2618         if (intstatus & I_CHIPACTIVE) {
2619                 brcmf_dbg(INFO, "Dongle reports CHIPACTIVE\n");
2620                 intstatus &= ~I_CHIPACTIVE;
2621         }
2622
2623         /* Ignore frame indications if rxskip is set */
2624         if (bus->rxskip)
2625                 intstatus &= ~I_HMB_FRAME_IND;
2626
2627         /* On frame indication, read available frames */
2628         if ((intstatus & I_HMB_FRAME_IND) && (bus->clkstate == CLK_AVAIL)) {
2629                 brcmf_sdio_readframes(bus, bus->rxbound);
2630                 if (!bus->rxpending)
2631                         intstatus &= ~I_HMB_FRAME_IND;
2632         }
2633
2634         /* Keep still-pending events for next scheduling */
2635         if (intstatus)
2636                 atomic_or(intstatus, &bus->intstatus);
2637
2638         brcmf_sdio_clrintr(bus);
2639
2640         if (bus->ctrl_frame_stat && (bus->clkstate == CLK_AVAIL) &&
2641             data_ok(bus)) {
2642                 sdio_claim_host(bus->sdiodev->func[1]);
2643                 if (bus->ctrl_frame_stat) {
2644                         err = brcmf_sdio_tx_ctrlframe(bus,  bus->ctrl_frame_buf,
2645                                                       bus->ctrl_frame_len);
2646                         bus->ctrl_frame_err = err;
2647                         wmb();
2648                         bus->ctrl_frame_stat = false;
2649                 }
2650                 sdio_release_host(bus->sdiodev->func[1]);
2651                 brcmf_sdio_wait_event_wakeup(bus);
2652         }
2653         /* Send queued frames (limit 1 if rx may still be pending) */
2654         if ((bus->clkstate == CLK_AVAIL) && !atomic_read(&bus->fcstate) &&
2655             brcmu_pktq_mlen(&bus->txq, ~bus->flowcontrol) && txlimit &&
2656             data_ok(bus)) {
2657                 framecnt = bus->rxpending ? min(txlimit, bus->txminmax) :
2658                                             txlimit;
2659                 brcmf_sdio_sendfromq(bus, framecnt);
2660         }
2661
2662         if ((bus->sdiodev->state != BRCMF_SDIOD_DATA) || (err != 0)) {
2663                 brcmf_err("failed backplane access over SDIO, halting operation\n");
2664                 atomic_set(&bus->intstatus, 0);
2665                 if (bus->ctrl_frame_stat) {
2666                         sdio_claim_host(bus->sdiodev->func[1]);
2667                         if (bus->ctrl_frame_stat) {
2668                                 bus->ctrl_frame_err = -ENODEV;
2669                                 wmb();
2670                                 bus->ctrl_frame_stat = false;
2671                                 brcmf_sdio_wait_event_wakeup(bus);
2672                         }
2673                         sdio_release_host(bus->sdiodev->func[1]);
2674                 }
2675         } else if (atomic_read(&bus->intstatus) ||
2676                    atomic_read(&bus->ipend) > 0 ||
2677                    (!atomic_read(&bus->fcstate) &&
2678                     brcmu_pktq_mlen(&bus->txq, ~bus->flowcontrol) &&
2679                     data_ok(bus))) {
2680                 bus->dpc_triggered = true;
2681         }
2682 }
2683
2684 static struct pktq *brcmf_sdio_bus_gettxq(struct device *dev)
2685 {
2686         struct brcmf_bus *bus_if = dev_get_drvdata(dev);
2687         struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
2688         struct brcmf_sdio *bus = sdiodev->bus;
2689
2690         return &bus->txq;
2691 }
2692
2693 static bool brcmf_sdio_prec_enq(struct pktq *q, struct sk_buff *pkt, int prec)
2694 {
2695         struct sk_buff *p;
2696         int eprec = -1;         /* precedence to evict from */
2697
2698         /* Fast case, precedence queue is not full and we are also not
2699          * exceeding total queue length
2700          */
2701         if (!pktq_pfull(q, prec) && !pktq_full(q)) {
2702                 brcmu_pktq_penq(q, prec, pkt);
2703                 return true;
2704         }
2705
2706         /* Determine precedence from which to evict packet, if any */
2707         if (pktq_pfull(q, prec)) {
2708                 eprec = prec;
2709         } else if (pktq_full(q)) {
2710                 p = brcmu_pktq_peek_tail(q, &eprec);
2711                 if (eprec > prec)
2712                         return false;
2713         }
2714
2715         /* Evict if needed */
2716         if (eprec >= 0) {
2717                 /* Detect queueing to unconfigured precedence */
2718                 if (eprec == prec)
2719                         return false;   /* refuse newer (incoming) packet */
2720                 /* Evict packet according to discard policy */
2721                 p = brcmu_pktq_pdeq_tail(q, eprec);
2722                 if (p == NULL)
2723                         brcmf_err("brcmu_pktq_pdeq_tail() failed\n");
2724                 brcmu_pkt_buf_free_skb(p);
2725         }
2726
2727         /* Enqueue */
2728         p = brcmu_pktq_penq(q, prec, pkt);
2729         if (p == NULL)
2730                 brcmf_err("brcmu_pktq_penq() failed\n");
2731
2732         return p != NULL;
2733 }
2734
2735 static int brcmf_sdio_bus_txdata(struct device *dev, struct sk_buff *pkt)
2736 {
2737         int ret = -EBADE;
2738         uint prec;
2739         struct brcmf_bus *bus_if = dev_get_drvdata(dev);
2740         struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
2741         struct brcmf_sdio *bus = sdiodev->bus;
2742
2743         brcmf_dbg(TRACE, "Enter: pkt: data %p len %d\n", pkt->data, pkt->len);
2744         if (sdiodev->state != BRCMF_SDIOD_DATA)
2745                 return -EIO;
2746
2747         /* Add space for the header */
2748         skb_push(pkt, bus->tx_hdrlen);
2749         /* precondition: IS_ALIGNED((unsigned long)(pkt->data), 2) */
2750
2751         prec = prio2prec((pkt->priority & PRIOMASK));
2752
2753         /* Check for existing queue, current flow-control,
2754                          pending event, or pending clock */
2755         brcmf_dbg(TRACE, "deferring pktq len %d\n", pktq_len(&bus->txq));
2756         bus->sdcnt.fcqueued++;
2757
2758         /* Priority based enq */
2759         spin_lock_bh(&bus->txq_lock);
2760         /* reset bus_flags in packet cb */
2761         *(u16 *)(pkt->cb) = 0;
2762         if (!brcmf_sdio_prec_enq(&bus->txq, pkt, prec)) {
2763                 skb_pull(pkt, bus->tx_hdrlen);
2764                 brcmf_err("out of bus->txq !!!\n");
2765                 ret = -ENOSR;
2766         } else {
2767                 ret = 0;
2768         }
2769
2770         if (pktq_len(&bus->txq) >= TXHI) {
2771                 bus->txoff = true;
2772                 brcmf_proto_bcdc_txflowblock(dev, true);
2773         }
2774         spin_unlock_bh(&bus->txq_lock);
2775
2776 #ifdef DEBUG
2777         if (pktq_plen(&bus->txq, prec) > qcount[prec])
2778                 qcount[prec] = pktq_plen(&bus->txq, prec);
2779 #endif
2780
2781         brcmf_sdio_trigger_dpc(bus);
2782         return ret;
2783 }
2784
2785 #ifdef DEBUG
2786 #define CONSOLE_LINE_MAX        192
2787
2788 static int brcmf_sdio_readconsole(struct brcmf_sdio *bus)
2789 {
2790         struct brcmf_console *c = &bus->console;
2791         u8 line[CONSOLE_LINE_MAX], ch;
2792         u32 n, idx, addr;
2793         int rv;
2794
2795         /* Don't do anything until FWREADY updates console address */
2796         if (bus->console_addr == 0)
2797                 return 0;
2798
2799         /* Read console log struct */
2800         addr = bus->console_addr + offsetof(struct rte_console, log_le);
2801         rv = brcmf_sdiod_ramrw(bus->sdiodev, false, addr, (u8 *)&c->log_le,
2802                                sizeof(c->log_le));
2803         if (rv < 0)
2804                 return rv;
2805
2806         /* Allocate console buffer (one time only) */
2807         if (c->buf == NULL) {
2808                 c->bufsize = le32_to_cpu(c->log_le.buf_size);
2809                 c->buf = kmalloc(c->bufsize, GFP_ATOMIC);
2810                 if (c->buf == NULL)
2811                         return -ENOMEM;
2812         }
2813
2814         idx = le32_to_cpu(c->log_le.idx);
2815
2816         /* Protect against corrupt value */
2817         if (idx > c->bufsize)
2818                 return -EBADE;
2819
2820         /* Skip reading the console buffer if the index pointer
2821          has not moved */
2822         if (idx == c->last)
2823                 return 0;
2824
2825         /* Read the console buffer */
2826         addr = le32_to_cpu(c->log_le.buf);
2827         rv = brcmf_sdiod_ramrw(bus->sdiodev, false, addr, c->buf, c->bufsize);
2828         if (rv < 0)
2829                 return rv;
2830
2831         while (c->last != idx) {
2832                 for (n = 0; n < CONSOLE_LINE_MAX - 2; n++) {
2833                         if (c->last == idx) {
2834                                 /* This would output a partial line.
2835                                  * Instead, back up
2836                                  * the buffer pointer and output this
2837                                  * line next time around.
2838                                  */
2839                                 if (c->last >= n)
2840                                         c->last -= n;
2841                                 else
2842                                         c->last = c->bufsize - n;
2843                                 goto break2;
2844                         }
2845                         ch = c->buf[c->last];
2846                         c->last = (c->last + 1) % c->bufsize;
2847                         if (ch == '\n')
2848                                 break;
2849                         line[n] = ch;
2850                 }
2851
2852                 if (n > 0) {
2853                         if (line[n - 1] == '\r')
2854                                 n--;
2855                         line[n] = 0;
2856                         pr_debug("CONSOLE: %s\n", line);
2857                 }
2858         }
2859 break2:
2860
2861         return 0;
2862 }
2863 #endif                          /* DEBUG */
2864
2865 static int
2866 brcmf_sdio_bus_txctl(struct device *dev, unsigned char *msg, uint msglen)
2867 {
2868         struct brcmf_bus *bus_if = dev_get_drvdata(dev);
2869         struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
2870         struct brcmf_sdio *bus = sdiodev->bus;
2871         int ret;
2872
2873         brcmf_dbg(TRACE, "Enter\n");
2874         if (sdiodev->state != BRCMF_SDIOD_DATA)
2875                 return -EIO;
2876
2877         /* Send from dpc */
2878         bus->ctrl_frame_buf = msg;
2879         bus->ctrl_frame_len = msglen;
2880         wmb();
2881         bus->ctrl_frame_stat = true;
2882
2883         brcmf_sdio_trigger_dpc(bus);
2884         wait_event_interruptible_timeout(bus->ctrl_wait, !bus->ctrl_frame_stat,
2885                                          CTL_DONE_TIMEOUT);
2886         ret = 0;
2887         if (bus->ctrl_frame_stat) {
2888                 sdio_claim_host(bus->sdiodev->func[1]);
2889                 if (bus->ctrl_frame_stat) {
2890                         brcmf_dbg(SDIO, "ctrl_frame timeout\n");
2891                         bus->ctrl_frame_stat = false;
2892                         ret = -ETIMEDOUT;
2893                 }
2894                 sdio_release_host(bus->sdiodev->func[1]);
2895         }
2896         if (!ret) {
2897                 brcmf_dbg(SDIO, "ctrl_frame complete, err=%d\n",
2898                           bus->ctrl_frame_err);
2899                 rmb();
2900                 ret = bus->ctrl_frame_err;
2901         }
2902
2903         if (ret)
2904                 bus->sdcnt.tx_ctlerrs++;
2905         else
2906                 bus->sdcnt.tx_ctlpkts++;
2907
2908         return ret;
2909 }
2910
2911 #ifdef DEBUG
2912 static int brcmf_sdio_dump_console(struct seq_file *seq, struct brcmf_sdio *bus,
2913                                    struct sdpcm_shared *sh)
2914 {
2915         u32 addr, console_ptr, console_size, console_index;
2916         char *conbuf = NULL;
2917         __le32 sh_val;
2918         int rv;
2919
2920         /* obtain console information from device memory */
2921         addr = sh->console_addr + offsetof(struct rte_console, log_le);
2922         rv = brcmf_sdiod_ramrw(bus->sdiodev, false, addr,
2923                                (u8 *)&sh_val, sizeof(u32));
2924         if (rv < 0)
2925                 return rv;
2926         console_ptr = le32_to_cpu(sh_val);
2927
2928         addr = sh->console_addr + offsetof(struct rte_console, log_le.buf_size);
2929         rv = brcmf_sdiod_ramrw(bus->sdiodev, false, addr,
2930                                (u8 *)&sh_val, sizeof(u32));
2931         if (rv < 0)
2932                 return rv;
2933         console_size = le32_to_cpu(sh_val);
2934
2935         addr = sh->console_addr + offsetof(struct rte_console, log_le.idx);
2936         rv = brcmf_sdiod_ramrw(bus->sdiodev, false, addr,
2937                                (u8 *)&sh_val, sizeof(u32));
2938         if (rv < 0)
2939                 return rv;
2940         console_index = le32_to_cpu(sh_val);
2941
2942         /* allocate buffer for console data */
2943         if (console_size <= CONSOLE_BUFFER_MAX)
2944                 conbuf = vzalloc(console_size+1);
2945
2946         if (!conbuf)
2947                 return -ENOMEM;
2948
2949         /* obtain the console data from device */
2950         conbuf[console_size] = '\0';
2951         rv = brcmf_sdiod_ramrw(bus->sdiodev, false, console_ptr, (u8 *)conbuf,
2952                                console_size);
2953         if (rv < 0)
2954                 goto done;
2955
2956         rv = seq_write(seq, conbuf + console_index,
2957                        console_size - console_index);
2958         if (rv < 0)
2959                 goto done;
2960
2961         if (console_index > 0)
2962                 rv = seq_write(seq, conbuf, console_index - 1);
2963
2964 done:
2965         vfree(conbuf);
2966         return rv;
2967 }
2968
2969 static int brcmf_sdio_trap_info(struct seq_file *seq, struct brcmf_sdio *bus,
2970                                 struct sdpcm_shared *sh)
2971 {
2972         int error;
2973         struct brcmf_trap_info tr;
2974
2975         if ((sh->flags & SDPCM_SHARED_TRAP) == 0) {
2976                 brcmf_dbg(INFO, "no trap in firmware\n");
2977                 return 0;
2978         }
2979
2980         error = brcmf_sdiod_ramrw(bus->sdiodev, false, sh->trap_addr, (u8 *)&tr,
2981                                   sizeof(struct brcmf_trap_info));
2982         if (error < 0)
2983                 return error;
2984
2985         seq_printf(seq,
2986                    "dongle trap info: type 0x%x @ epc 0x%08x\n"
2987                    "  cpsr 0x%08x spsr 0x%08x sp 0x%08x\n"
2988                    "  lr   0x%08x pc   0x%08x offset 0x%x\n"
2989                    "  r0   0x%08x r1   0x%08x r2 0x%08x r3 0x%08x\n"
2990                    "  r4   0x%08x r5   0x%08x r6 0x%08x r7 0x%08x\n",
2991                    le32_to_cpu(tr.type), le32_to_cpu(tr.epc),
2992                    le32_to_cpu(tr.cpsr), le32_to_cpu(tr.spsr),
2993                    le32_to_cpu(tr.r13), le32_to_cpu(tr.r14),
2994                    le32_to_cpu(tr.pc), sh->trap_addr,
2995                    le32_to_cpu(tr.r0), le32_to_cpu(tr.r1),
2996                    le32_to_cpu(tr.r2), le32_to_cpu(tr.r3),
2997                    le32_to_cpu(tr.r4), le32_to_cpu(tr.r5),
2998                    le32_to_cpu(tr.r6), le32_to_cpu(tr.r7));
2999
3000         return 0;
3001 }
3002
3003 static int brcmf_sdio_assert_info(struct seq_file *seq, struct brcmf_sdio *bus,
3004                                   struct sdpcm_shared *sh)
3005 {
3006         int error = 0;
3007         char file[80] = "?";
3008         char expr[80] = "<???>";
3009
3010         if ((sh->flags & SDPCM_SHARED_ASSERT_BUILT) == 0) {
3011                 brcmf_dbg(INFO, "firmware not built with -assert\n");
3012                 return 0;
3013         } else if ((sh->flags & SDPCM_SHARED_ASSERT) == 0) {
3014                 brcmf_dbg(INFO, "no assert in dongle\n");
3015                 return 0;
3016         }
3017
3018         sdio_claim_host(bus->sdiodev->func[1]);
3019         if (sh->assert_file_addr != 0) {
3020                 error = brcmf_sdiod_ramrw(bus->sdiodev, false,
3021                                           sh->assert_file_addr, (u8 *)file, 80);
3022                 if (error < 0)
3023                         return error;
3024         }
3025         if (sh->assert_exp_addr != 0) {
3026                 error = brcmf_sdiod_ramrw(bus->sdiodev, false,
3027                                           sh->assert_exp_addr, (u8 *)expr, 80);
3028                 if (error < 0)
3029                         return error;
3030         }
3031         sdio_release_host(bus->sdiodev->func[1]);
3032
3033         seq_printf(seq, "dongle assert: %s:%d: assert(%s)\n",
3034                    file, sh->assert_line, expr);
3035         return 0;
3036 }
3037
3038 static int brcmf_sdio_checkdied(struct brcmf_sdio *bus)
3039 {
3040         int error;
3041         struct sdpcm_shared sh;
3042
3043         error = brcmf_sdio_readshared(bus, &sh);
3044
3045         if (error < 0)
3046                 return error;
3047
3048         if ((sh.flags & SDPCM_SHARED_ASSERT_BUILT) == 0)
3049                 brcmf_dbg(INFO, "firmware not built with -assert\n");
3050         else if (sh.flags & SDPCM_SHARED_ASSERT)
3051                 brcmf_err("assertion in dongle\n");
3052
3053         if (sh.flags & SDPCM_SHARED_TRAP)
3054                 brcmf_err("firmware trap in dongle\n");
3055
3056         return 0;
3057 }
3058
3059 static int brcmf_sdio_died_dump(struct seq_file *seq, struct brcmf_sdio *bus)
3060 {
3061         int error = 0;
3062         struct sdpcm_shared sh;
3063
3064         error = brcmf_sdio_readshared(bus, &sh);
3065         if (error < 0)
3066                 goto done;
3067
3068         error = brcmf_sdio_assert_info(seq, bus, &sh);
3069         if (error < 0)
3070                 goto done;
3071
3072         error = brcmf_sdio_trap_info(seq, bus, &sh);
3073         if (error < 0)
3074                 goto done;
3075
3076         error = brcmf_sdio_dump_console(seq, bus, &sh);
3077
3078 done:
3079         return error;
3080 }
3081
3082 static int brcmf_sdio_forensic_read(struct seq_file *seq, void *data)
3083 {
3084         struct brcmf_bus *bus_if = dev_get_drvdata(seq->private);
3085         struct brcmf_sdio *bus = bus_if->bus_priv.sdio->bus;
3086
3087         return brcmf_sdio_died_dump(seq, bus);
3088 }
3089
3090 static int brcmf_debugfs_sdio_count_read(struct seq_file *seq, void *data)
3091 {
3092         struct brcmf_bus *bus_if = dev_get_drvdata(seq->private);
3093         struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
3094         struct brcmf_sdio_count *sdcnt = &sdiodev->bus->sdcnt;
3095
3096         seq_printf(seq,
3097                    "intrcount:    %u\nlastintrs:    %u\n"
3098                    "pollcnt:      %u\nregfails:     %u\n"
3099                    "tx_sderrs:    %u\nfcqueued:     %u\n"
3100                    "rxrtx:        %u\nrx_toolong:   %u\n"
3101                    "rxc_errors:   %u\nrx_hdrfail:   %u\n"
3102                    "rx_badhdr:    %u\nrx_badseq:    %u\n"
3103                    "fc_rcvd:      %u\nfc_xoff:      %u\n"
3104                    "fc_xon:       %u\nrxglomfail:   %u\n"
3105                    "rxglomframes: %u\nrxglompkts:   %u\n"
3106                    "f2rxhdrs:     %u\nf2rxdata:     %u\n"
3107                    "f2txdata:     %u\nf1regdata:    %u\n"
3108                    "tickcnt:      %u\ntx_ctlerrs:   %lu\n"
3109                    "tx_ctlpkts:   %lu\nrx_ctlerrs:   %lu\n"
3110                    "rx_ctlpkts:   %lu\nrx_readahead: %lu\n",
3111                    sdcnt->intrcount, sdcnt->lastintrs,
3112                    sdcnt->pollcnt, sdcnt->regfails,
3113                    sdcnt->tx_sderrs, sdcnt->fcqueued,
3114                    sdcnt->rxrtx, sdcnt->rx_toolong,
3115                    sdcnt->rxc_errors, sdcnt->rx_hdrfail,
3116                    sdcnt->rx_badhdr, sdcnt->rx_badseq,
3117                    sdcnt->fc_rcvd, sdcnt->fc_xoff,
3118                    sdcnt->fc_xon, sdcnt->rxglomfail,
3119                    sdcnt->rxglomframes, sdcnt->rxglompkts,
3120                    sdcnt->f2rxhdrs, sdcnt->f2rxdata,
3121                    sdcnt->f2txdata, sdcnt->f1regdata,
3122                    sdcnt->tickcnt, sdcnt->tx_ctlerrs,
3123                    sdcnt->tx_ctlpkts, sdcnt->rx_ctlerrs,
3124                    sdcnt->rx_ctlpkts, sdcnt->rx_readahead_cnt);
3125
3126         return 0;
3127 }
3128
3129 static void brcmf_sdio_debugfs_create(struct brcmf_sdio *bus)
3130 {
3131         struct brcmf_pub *drvr = bus->sdiodev->bus_if->drvr;
3132         struct dentry *dentry = brcmf_debugfs_get_devdir(drvr);
3133
3134         if (IS_ERR_OR_NULL(dentry))
3135                 return;
3136
3137         bus->console_interval = BRCMF_CONSOLE;
3138
3139         brcmf_debugfs_add_entry(drvr, "forensics", brcmf_sdio_forensic_read);
3140         brcmf_debugfs_add_entry(drvr, "counters",
3141                                 brcmf_debugfs_sdio_count_read);
3142         debugfs_create_u32("console_interval", 0644, dentry,
3143                            &bus->console_interval);
3144 }
3145 #else
3146 static int brcmf_sdio_checkdied(struct brcmf_sdio *bus)
3147 {
3148         return 0;
3149 }
3150
3151 static void brcmf_sdio_debugfs_create(struct brcmf_sdio *bus)
3152 {
3153 }
3154 #endif /* DEBUG */
3155
3156 static int
3157 brcmf_sdio_bus_rxctl(struct device *dev, unsigned char *msg, uint msglen)
3158 {
3159         int timeleft;
3160         uint rxlen = 0;
3161         bool pending;
3162         u8 *buf;
3163         struct brcmf_bus *bus_if = dev_get_drvdata(dev);
3164         struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
3165         struct brcmf_sdio *bus = sdiodev->bus;
3166
3167         brcmf_dbg(TRACE, "Enter\n");
3168         if (sdiodev->state != BRCMF_SDIOD_DATA)
3169                 return -EIO;
3170
3171         /* Wait until control frame is available */
3172         timeleft = brcmf_sdio_dcmd_resp_wait(bus, &bus->rxlen, &pending);
3173
3174         spin_lock_bh(&bus->rxctl_lock);
3175         rxlen = bus->rxlen;
3176         memcpy(msg, bus->rxctl, min(msglen, rxlen));
3177         bus->rxctl = NULL;
3178         buf = bus->rxctl_orig;
3179         bus->rxctl_orig = NULL;
3180         bus->rxlen = 0;
3181         spin_unlock_bh(&bus->rxctl_lock);
3182         vfree(buf);
3183
3184         if (rxlen) {
3185                 brcmf_dbg(CTL, "resumed on rxctl frame, got %d expected %d\n",
3186                           rxlen, msglen);
3187         } else if (timeleft == 0) {
3188                 brcmf_err("resumed on timeout\n");
3189                 brcmf_sdio_checkdied(bus);
3190         } else if (pending) {
3191                 brcmf_dbg(CTL, "cancelled\n");
3192                 return -ERESTARTSYS;
3193         } else {
3194                 brcmf_dbg(CTL, "resumed for unknown reason?\n");
3195                 brcmf_sdio_checkdied(bus);
3196         }
3197
3198         if (rxlen)
3199                 bus->sdcnt.rx_ctlpkts++;
3200         else
3201                 bus->sdcnt.rx_ctlerrs++;
3202
3203         return rxlen ? (int)rxlen : -ETIMEDOUT;
3204 }
3205
3206 #ifdef DEBUG
3207 static bool
3208 brcmf_sdio_verifymemory(struct brcmf_sdio_dev *sdiodev, u32 ram_addr,
3209                         u8 *ram_data, uint ram_sz)
3210 {
3211         char *ram_cmp;
3212         int err;
3213         bool ret = true;
3214         int address;
3215         int offset;
3216         int len;
3217
3218         /* read back and verify */
3219         brcmf_dbg(INFO, "Compare RAM dl & ul at 0x%08x; size=%d\n", ram_addr,
3220                   ram_sz);
3221         ram_cmp = kmalloc(MEMBLOCK, GFP_KERNEL);
3222         /* do not proceed while no memory but  */
3223         if (!ram_cmp)
3224                 return true;
3225
3226         address = ram_addr;
3227         offset = 0;
3228         while (offset < ram_sz) {
3229                 len = ((offset + MEMBLOCK) < ram_sz) ? MEMBLOCK :
3230                       ram_sz - offset;
3231                 err = brcmf_sdiod_ramrw(sdiodev, false, address, ram_cmp, len);
3232                 if (err) {
3233                         brcmf_err("error %d on reading %d membytes at 0x%08x\n",
3234                                   err, len, address);
3235                         ret = false;
3236                         break;
3237                 } else if (memcmp(ram_cmp, &ram_data[offset], len)) {
3238                         brcmf_err("Downloaded RAM image is corrupted, block offset is %d, len is %d\n",
3239                                   offset, len);
3240                         ret = false;
3241                         break;
3242                 }
3243                 offset += len;
3244                 address += len;
3245         }
3246
3247         kfree(ram_cmp);
3248
3249         return ret;
3250 }
3251 #else   /* DEBUG */
3252 static bool
3253 brcmf_sdio_verifymemory(struct brcmf_sdio_dev *sdiodev, u32 ram_addr,
3254                         u8 *ram_data, uint ram_sz)
3255 {
3256         return true;
3257 }
3258 #endif  /* DEBUG */
3259
3260 static int brcmf_sdio_download_code_file(struct brcmf_sdio *bus,
3261                                          const struct firmware *fw)
3262 {
3263         int err;
3264
3265         brcmf_dbg(TRACE, "Enter\n");
3266
3267         err = brcmf_sdiod_ramrw(bus->sdiodev, true, bus->ci->rambase,
3268                                 (u8 *)fw->data, fw->size);
3269         if (err)
3270                 brcmf_err("error %d on writing %d membytes at 0x%08x\n",
3271                           err, (int)fw->size, bus->ci->rambase);
3272         else if (!brcmf_sdio_verifymemory(bus->sdiodev, bus->ci->rambase,
3273                                           (u8 *)fw->data, fw->size))
3274                 err = -EIO;
3275
3276         return err;
3277 }
3278
3279 static int brcmf_sdio_download_nvram(struct brcmf_sdio *bus,
3280                                      void *vars, u32 varsz)
3281 {
3282         int address;
3283         int err;
3284
3285         brcmf_dbg(TRACE, "Enter\n");
3286
3287         address = bus->ci->ramsize - varsz + bus->ci->rambase;
3288         err = brcmf_sdiod_ramrw(bus->sdiodev, true, address, vars, varsz);
3289         if (err)
3290                 brcmf_err("error %d on writing %d nvram bytes at 0x%08x\n",
3291                           err, varsz, address);
3292         else if (!brcmf_sdio_verifymemory(bus->sdiodev, address, vars, varsz))
3293                 err = -EIO;
3294
3295         return err;
3296 }
3297
3298 static int brcmf_sdio_download_firmware(struct brcmf_sdio *bus,
3299                                         const struct firmware *fw,
3300                                         void *nvram, u32 nvlen)
3301 {
3302         int bcmerror;
3303         u32 rstvec;
3304
3305         sdio_claim_host(bus->sdiodev->func[1]);
3306         brcmf_sdio_clkctl(bus, CLK_AVAIL, false);
3307
3308         rstvec = get_unaligned_le32(fw->data);
3309         brcmf_dbg(SDIO, "firmware rstvec: %x\n", rstvec);
3310
3311         bcmerror = brcmf_sdio_download_code_file(bus, fw);
3312         release_firmware(fw);
3313         if (bcmerror) {
3314                 brcmf_err("dongle image file download failed\n");
3315                 brcmf_fw_nvram_free(nvram);
3316                 goto err;
3317         }
3318
3319         bcmerror = brcmf_sdio_download_nvram(bus, nvram, nvlen);
3320         brcmf_fw_nvram_free(nvram);
3321         if (bcmerror) {
3322                 brcmf_err("dongle nvram file download failed\n");
3323                 goto err;
3324         }
3325
3326         /* Take arm out of reset */
3327         if (!brcmf_chip_set_active(bus->ci, rstvec)) {
3328                 brcmf_err("error getting out of ARM core reset\n");
3329                 goto err;
3330         }
3331
3332 err:
3333         brcmf_sdio_clkctl(bus, CLK_SDONLY, false);
3334         sdio_release_host(bus->sdiodev->func[1]);
3335         return bcmerror;
3336 }
3337
3338 static void brcmf_sdio_sr_init(struct brcmf_sdio *bus)
3339 {
3340         int err = 0;
3341         u8 val;
3342
3343         brcmf_dbg(TRACE, "Enter\n");
3344
3345         val = brcmf_sdiod_regrb(bus->sdiodev, SBSDIO_FUNC1_WAKEUPCTRL, &err);
3346         if (err) {
3347                 brcmf_err("error reading SBSDIO_FUNC1_WAKEUPCTRL\n");
3348                 return;
3349         }
3350
3351         val |= 1 << SBSDIO_FUNC1_WCTRL_HTWAIT_SHIFT;
3352         brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_WAKEUPCTRL, val, &err);
3353         if (err) {
3354                 brcmf_err("error writing SBSDIO_FUNC1_WAKEUPCTRL\n");
3355                 return;
3356         }
3357
3358         /* Add CMD14 Support */
3359         brcmf_sdiod_regwb(bus->sdiodev, SDIO_CCCR_BRCM_CARDCAP,
3360                           (SDIO_CCCR_BRCM_CARDCAP_CMD14_SUPPORT |
3361                            SDIO_CCCR_BRCM_CARDCAP_CMD14_EXT),
3362                           &err);
3363         if (err) {
3364                 brcmf_err("error writing SDIO_CCCR_BRCM_CARDCAP\n");
3365                 return;
3366         }
3367
3368         brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
3369                           SBSDIO_FORCE_HT, &err);
3370         if (err) {
3371                 brcmf_err("error writing SBSDIO_FUNC1_CHIPCLKCSR\n");
3372                 return;
3373         }
3374
3375         /* set flag */
3376         bus->sr_enabled = true;
3377         brcmf_dbg(INFO, "SR enabled\n");
3378 }
3379
3380 /* enable KSO bit */
3381 static int brcmf_sdio_kso_init(struct brcmf_sdio *bus)
3382 {
3383         u8 val;
3384         int err = 0;
3385
3386         brcmf_dbg(TRACE, "Enter\n");
3387
3388         /* KSO bit added in SDIO core rev 12 */
3389         if (brcmf_chip_get_core(bus->ci, BCMA_CORE_SDIO_DEV)->rev < 12)
3390                 return 0;
3391
3392         val = brcmf_sdiod_regrb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR, &err);
3393         if (err) {
3394                 brcmf_err("error reading SBSDIO_FUNC1_SLEEPCSR\n");
3395                 return err;
3396         }
3397
3398         if (!(val & SBSDIO_FUNC1_SLEEPCSR_KSO_MASK)) {
3399                 val |= (SBSDIO_FUNC1_SLEEPCSR_KSO_EN <<
3400                         SBSDIO_FUNC1_SLEEPCSR_KSO_SHIFT);
3401                 brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR,
3402                                   val, &err);
3403                 if (err) {
3404                         brcmf_err("error writing SBSDIO_FUNC1_SLEEPCSR\n");
3405                         return err;
3406                 }
3407         }
3408
3409         return 0;
3410 }
3411
3412
3413 static int brcmf_sdio_bus_preinit(struct device *dev)
3414 {
3415         struct brcmf_bus *bus_if = dev_get_drvdata(dev);
3416         struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
3417         struct brcmf_sdio *bus = sdiodev->bus;
3418         uint pad_size;
3419         u32 value;
3420         int err;
3421
3422         /* the commands below use the terms tx and rx from
3423          * a device perspective, ie. bus:txglom affects the
3424          * bus transfers from device to host.
3425          */
3426         if (brcmf_chip_get_core(bus->ci, BCMA_CORE_SDIO_DEV)->rev < 12) {
3427                 /* for sdio core rev < 12, disable txgloming */
3428                 value = 0;
3429                 err = brcmf_iovar_data_set(dev, "bus:txglom", &value,
3430                                            sizeof(u32));
3431         } else {
3432                 /* otherwise, set txglomalign */
3433                 value = sdiodev->settings->bus.sdio.sd_sgentry_align;
3434                 /* SDIO ADMA requires at least 32 bit alignment */
3435                 value = max_t(u32, value, ALIGNMENT);
3436                 err = brcmf_iovar_data_set(dev, "bus:txglomalign", &value,
3437                                            sizeof(u32));
3438         }
3439
3440         if (err < 0)
3441                 goto done;
3442
3443         bus->tx_hdrlen = SDPCM_HWHDR_LEN + SDPCM_SWHDR_LEN;
3444         if (sdiodev->sg_support) {
3445                 bus->txglom = false;
3446                 value = 1;
3447                 pad_size = bus->sdiodev->func[2]->cur_blksize << 1;
3448                 err = brcmf_iovar_data_set(bus->sdiodev->dev, "bus:rxglom",
3449                                            &value, sizeof(u32));
3450                 if (err < 0) {
3451                         /* bus:rxglom is allowed to fail */
3452                         err = 0;
3453                 } else {
3454                         bus->txglom = true;
3455                         bus->tx_hdrlen += SDPCM_HWEXT_LEN;
3456                 }
3457         }
3458         brcmf_bus_add_txhdrlen(bus->sdiodev->dev, bus->tx_hdrlen);
3459
3460 done:
3461         return err;
3462 }
3463
3464 static size_t brcmf_sdio_bus_get_ramsize(struct device *dev)
3465 {
3466         struct brcmf_bus *bus_if = dev_get_drvdata(dev);
3467         struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
3468         struct brcmf_sdio *bus = sdiodev->bus;
3469
3470         return bus->ci->ramsize - bus->ci->srsize;
3471 }
3472
3473 static int brcmf_sdio_bus_get_memdump(struct device *dev, void *data,
3474                                       size_t mem_size)
3475 {
3476         struct brcmf_bus *bus_if = dev_get_drvdata(dev);
3477         struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
3478         struct brcmf_sdio *bus = sdiodev->bus;
3479         int err;
3480         int address;
3481         int offset;
3482         int len;
3483
3484         brcmf_dbg(INFO, "dump at 0x%08x: size=%zu\n", bus->ci->rambase,
3485                   mem_size);
3486
3487         address = bus->ci->rambase;
3488         offset = err = 0;
3489         sdio_claim_host(sdiodev->func[1]);
3490         while (offset < mem_size) {
3491                 len = ((offset + MEMBLOCK) < mem_size) ? MEMBLOCK :
3492                       mem_size - offset;
3493                 err = brcmf_sdiod_ramrw(sdiodev, false, address, data, len);
3494                 if (err) {
3495                         brcmf_err("error %d on reading %d membytes at 0x%08x\n",
3496                                   err, len, address);
3497                         goto done;
3498                 }
3499                 data += len;
3500                 offset += len;
3501                 address += len;
3502         }
3503
3504 done:
3505         sdio_release_host(sdiodev->func[1]);
3506         return err;
3507 }
3508
3509 void brcmf_sdio_trigger_dpc(struct brcmf_sdio *bus)
3510 {
3511         if (!bus->dpc_triggered) {
3512                 bus->dpc_triggered = true;
3513                 queue_work(bus->brcmf_wq, &bus->datawork);
3514         }
3515 }
3516
3517 void brcmf_sdio_isr(struct brcmf_sdio *bus)
3518 {
3519         brcmf_dbg(TRACE, "Enter\n");
3520
3521         if (!bus) {
3522                 brcmf_err("bus is null pointer, exiting\n");
3523                 return;
3524         }
3525
3526         /* Count the interrupt call */
3527         bus->sdcnt.intrcount++;
3528         if (in_interrupt())
3529                 atomic_set(&bus->ipend, 1);
3530         else
3531                 if (brcmf_sdio_intr_rstatus(bus)) {
3532                         brcmf_err("failed backplane access\n");
3533                 }
3534
3535         /* Disable additional interrupts (is this needed now)? */
3536         if (!bus->intr)
3537                 brcmf_err("isr w/o interrupt configured!\n");
3538
3539         bus->dpc_triggered = true;
3540         queue_work(bus->brcmf_wq, &bus->datawork);
3541 }
3542
3543 static void brcmf_sdio_bus_watchdog(struct brcmf_sdio *bus)
3544 {
3545         brcmf_dbg(TIMER, "Enter\n");
3546
3547         /* Poll period: check device if appropriate. */
3548         if (!bus->sr_enabled &&
3549             bus->poll && (++bus->polltick >= bus->pollrate)) {
3550                 u32 intstatus = 0;
3551
3552                 /* Reset poll tick */
3553                 bus->polltick = 0;
3554
3555                 /* Check device if no interrupts */
3556                 if (!bus->intr ||
3557                     (bus->sdcnt.intrcount == bus->sdcnt.lastintrs)) {
3558
3559                         if (!bus->dpc_triggered) {
3560                                 u8 devpend;
3561
3562                                 sdio_claim_host(bus->sdiodev->func[1]);
3563                                 devpend = brcmf_sdiod_regrb(bus->sdiodev,
3564                                                             SDIO_CCCR_INTx,
3565                                                             NULL);
3566                                 sdio_release_host(bus->sdiodev->func[1]);
3567                                 intstatus = devpend & (INTR_STATUS_FUNC1 |
3568                                                        INTR_STATUS_FUNC2);
3569                         }
3570
3571                         /* If there is something, make like the ISR and
3572                                  schedule the DPC */
3573                         if (intstatus) {
3574                                 bus->sdcnt.pollcnt++;
3575                                 atomic_set(&bus->ipend, 1);
3576
3577                                 bus->dpc_triggered = true;
3578                                 queue_work(bus->brcmf_wq, &bus->datawork);
3579                         }
3580                 }
3581
3582                 /* Update interrupt tracking */
3583                 bus->sdcnt.lastintrs = bus->sdcnt.intrcount;
3584         }
3585 #ifdef DEBUG
3586         /* Poll for console output periodically */
3587         if (bus->sdiodev->state == BRCMF_SDIOD_DATA && BRCMF_FWCON_ON() &&
3588             bus->console_interval != 0) {
3589                 bus->console.count += jiffies_to_msecs(BRCMF_WD_POLL);
3590                 if (bus->console.count >= bus->console_interval) {
3591                         bus->console.count -= bus->console_interval;
3592                         sdio_claim_host(bus->sdiodev->func[1]);
3593                         /* Make sure backplane clock is on */
3594                         brcmf_sdio_bus_sleep(bus, false, false);
3595                         if (brcmf_sdio_readconsole(bus) < 0)
3596                                 /* stop on error */
3597                                 bus->console_interval = 0;
3598                         sdio_release_host(bus->sdiodev->func[1]);
3599                 }
3600         }
3601 #endif                          /* DEBUG */
3602
3603         /* On idle timeout clear activity flag and/or turn off clock */
3604         if (!bus->dpc_triggered) {
3605                 rmb();
3606                 if ((!bus->dpc_running) && (bus->idletime > 0) &&
3607                     (bus->clkstate == CLK_AVAIL)) {
3608                         bus->idlecount++;
3609                         if (bus->idlecount > bus->idletime) {
3610                                 brcmf_dbg(SDIO, "idle\n");
3611                                 sdio_claim_host(bus->sdiodev->func[1]);
3612                                 brcmf_sdio_wd_timer(bus, false);
3613                                 bus->idlecount = 0;
3614                                 brcmf_sdio_bus_sleep(bus, true, false);
3615                                 sdio_release_host(bus->sdiodev->func[1]);
3616                         }
3617                 } else {
3618                         bus->idlecount = 0;
3619                 }
3620         } else {
3621                 bus->idlecount = 0;
3622         }
3623 }
3624
3625 static void brcmf_sdio_dataworker(struct work_struct *work)
3626 {
3627         struct brcmf_sdio *bus = container_of(work, struct brcmf_sdio,
3628                                               datawork);
3629
3630         bus->dpc_running = true;
3631         wmb();
3632         while (ACCESS_ONCE(bus->dpc_triggered)) {
3633                 bus->dpc_triggered = false;
3634                 brcmf_sdio_dpc(bus);
3635                 bus->idlecount = 0;
3636         }
3637         bus->dpc_running = false;
3638         if (brcmf_sdiod_freezing(bus->sdiodev)) {
3639                 brcmf_sdiod_change_state(bus->sdiodev, BRCMF_SDIOD_DOWN);
3640                 brcmf_sdiod_try_freeze(bus->sdiodev);
3641                 brcmf_sdiod_change_state(bus->sdiodev, BRCMF_SDIOD_DATA);
3642         }
3643 }
3644
3645 static void
3646 brcmf_sdio_drivestrengthinit(struct brcmf_sdio_dev *sdiodev,
3647                              struct brcmf_chip *ci, u32 drivestrength)
3648 {
3649         const struct sdiod_drive_str *str_tab = NULL;
3650         u32 str_mask;
3651         u32 str_shift;
3652         u32 i;
3653         u32 drivestrength_sel = 0;
3654         u32 cc_data_temp;
3655         u32 addr;
3656
3657         if (!(ci->cc_caps & CC_CAP_PMU))
3658                 return;
3659
3660         switch (SDIOD_DRVSTR_KEY(ci->chip, ci->pmurev)) {
3661         case SDIOD_DRVSTR_KEY(BRCM_CC_4330_CHIP_ID, 12):
3662                 str_tab = sdiod_drvstr_tab1_1v8;
3663                 str_mask = 0x00003800;
3664                 str_shift = 11;
3665                 break;
3666         case SDIOD_DRVSTR_KEY(BRCM_CC_4334_CHIP_ID, 17):
3667                 str_tab = sdiod_drvstr_tab6_1v8;
3668                 str_mask = 0x00001800;
3669                 str_shift = 11;
3670                 break;
3671         case SDIOD_DRVSTR_KEY(BRCM_CC_43143_CHIP_ID, 17):
3672                 /* note: 43143 does not support tristate */
3673                 i = ARRAY_SIZE(sdiod_drvstr_tab2_3v3) - 1;
3674                 if (drivestrength >= sdiod_drvstr_tab2_3v3[i].strength) {
3675                         str_tab = sdiod_drvstr_tab2_3v3;
3676                         str_mask = 0x00000007;
3677                         str_shift = 0;
3678                 } else
3679                         brcmf_err("Invalid SDIO Drive strength for chip %s, strength=%d\n",
3680                                   ci->name, drivestrength);
3681                 break;
3682         case SDIOD_DRVSTR_KEY(BRCM_CC_43362_CHIP_ID, 13):
3683                 str_tab = sdiod_drive_strength_tab5_1v8;
3684                 str_mask = 0x00003800;
3685                 str_shift = 11;
3686                 break;
3687         default:
3688                 brcmf_dbg(INFO, "No SDIO driver strength init needed for chip %s rev %d pmurev %d\n",
3689                           ci->name, ci->chiprev, ci->pmurev);
3690                 break;
3691         }
3692
3693         if (str_tab != NULL) {
3694                 struct brcmf_core *pmu = brcmf_chip_get_pmu(ci);
3695
3696                 for (i = 0; str_tab[i].strength != 0; i++) {
3697                         if (drivestrength >= str_tab[i].strength) {
3698                                 drivestrength_sel = str_tab[i].sel;
3699                                 break;
3700                         }
3701                 }
3702                 addr = CORE_CC_REG(pmu->base, chipcontrol_addr);
3703                 brcmf_sdiod_regwl(sdiodev, addr, 1, NULL);
3704                 cc_data_temp = brcmf_sdiod_regrl(sdiodev, addr, NULL);
3705                 cc_data_temp &= ~str_mask;
3706                 drivestrength_sel <<= str_shift;
3707                 cc_data_temp |= drivestrength_sel;
3708                 brcmf_sdiod_regwl(sdiodev, addr, cc_data_temp, NULL);
3709
3710                 brcmf_dbg(INFO, "SDIO: %d mA (req=%d mA) drive strength selected, set to 0x%08x\n",
3711                           str_tab[i].strength, drivestrength, cc_data_temp);
3712         }
3713 }
3714
3715 static int brcmf_sdio_buscoreprep(void *ctx)
3716 {
3717         struct brcmf_sdio_dev *sdiodev = ctx;
3718         int err = 0;
3719         u8 clkval, clkset;
3720
3721         /* Try forcing SDIO core to do ALPAvail request only */
3722         clkset = SBSDIO_FORCE_HW_CLKREQ_OFF | SBSDIO_ALP_AVAIL_REQ;
3723         brcmf_sdiod_regwb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR, clkset, &err);
3724         if (err) {
3725                 brcmf_err("error writing for HT off\n");
3726                 return err;
3727         }
3728
3729         /* If register supported, wait for ALPAvail and then force ALP */
3730         /* This may take up to 15 milliseconds */
3731         clkval = brcmf_sdiod_regrb(sdiodev,
3732                                    SBSDIO_FUNC1_CHIPCLKCSR, NULL);
3733
3734         if ((clkval & ~SBSDIO_AVBITS) != clkset) {
3735                 brcmf_err("ChipClkCSR access: wrote 0x%02x read 0x%02x\n",
3736                           clkset, clkval);
3737                 return -EACCES;
3738         }
3739
3740         SPINWAIT(((clkval = brcmf_sdiod_regrb(sdiodev,
3741                                               SBSDIO_FUNC1_CHIPCLKCSR, NULL)),
3742                         !SBSDIO_ALPAV(clkval)),
3743                         PMU_MAX_TRANSITION_DLY);
3744         if (!SBSDIO_ALPAV(clkval)) {
3745                 brcmf_err("timeout on ALPAV wait, clkval 0x%02x\n",
3746                           clkval);
3747                 return -EBUSY;
3748         }
3749
3750         clkset = SBSDIO_FORCE_HW_CLKREQ_OFF | SBSDIO_FORCE_ALP;
3751         brcmf_sdiod_regwb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR, clkset, &err);
3752         udelay(65);
3753
3754         /* Also, disable the extra SDIO pull-ups */
3755         brcmf_sdiod_regwb(sdiodev, SBSDIO_FUNC1_SDIOPULLUP, 0, NULL);
3756
3757         return 0;
3758 }
3759
3760 static void brcmf_sdio_buscore_activate(void *ctx, struct brcmf_chip *chip,
3761                                         u32 rstvec)
3762 {
3763         struct brcmf_sdio_dev *sdiodev = ctx;
3764         struct brcmf_core *core;
3765         u32 reg_addr;
3766
3767         /* clear all interrupts */
3768         core = brcmf_chip_get_core(chip, BCMA_CORE_SDIO_DEV);
3769         reg_addr = core->base + offsetof(struct sdpcmd_regs, intstatus);
3770         brcmf_sdiod_regwl(sdiodev, reg_addr, 0xFFFFFFFF, NULL);
3771
3772         if (rstvec)
3773                 /* Write reset vector to address 0 */
3774                 brcmf_sdiod_ramrw(sdiodev, true, 0, (void *)&rstvec,
3775                                   sizeof(rstvec));
3776 }
3777
3778 static u32 brcmf_sdio_buscore_read32(void *ctx, u32 addr)
3779 {
3780         struct brcmf_sdio_dev *sdiodev = ctx;
3781         u32 val, rev;
3782
3783         val = brcmf_sdiod_regrl(sdiodev, addr, NULL);
3784         if ((sdiodev->func[0]->device == SDIO_DEVICE_ID_BROADCOM_4335_4339 ||
3785              sdiodev->func[0]->device == SDIO_DEVICE_ID_BROADCOM_4339) &&
3786             addr == CORE_CC_REG(SI_ENUM_BASE, chipid)) {
3787                 rev = (val & CID_REV_MASK) >> CID_REV_SHIFT;
3788                 if (rev >= 2) {
3789                         val &= ~CID_ID_MASK;
3790                         val |= BRCM_CC_4339_CHIP_ID;
3791                 }
3792         }
3793         return val;
3794 }
3795
3796 static void brcmf_sdio_buscore_write32(void *ctx, u32 addr, u32 val)
3797 {
3798         struct brcmf_sdio_dev *sdiodev = ctx;
3799
3800         brcmf_sdiod_regwl(sdiodev, addr, val, NULL);
3801 }
3802
3803 static const struct brcmf_buscore_ops brcmf_sdio_buscore_ops = {
3804         .prepare = brcmf_sdio_buscoreprep,
3805         .activate = brcmf_sdio_buscore_activate,
3806         .read32 = brcmf_sdio_buscore_read32,
3807         .write32 = brcmf_sdio_buscore_write32,
3808 };
3809
3810 static bool
3811 brcmf_sdio_probe_attach(struct brcmf_sdio *bus)
3812 {
3813         struct brcmf_sdio_dev *sdiodev;
3814         u8 clkctl = 0;
3815         int err = 0;
3816         int reg_addr;
3817         u32 reg_val;
3818         u32 drivestrength;
3819
3820         sdiodev = bus->sdiodev;
3821         sdio_claim_host(sdiodev->func[1]);
3822
3823         pr_debug("F1 signature read @0x18000000=0x%4x\n",
3824                  brcmf_sdiod_regrl(sdiodev, SI_ENUM_BASE, NULL));
3825
3826         /*
3827          * Force PLL off until brcmf_chip_attach()
3828          * programs PLL control regs
3829          */
3830
3831         brcmf_sdiod_regwb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
3832                           BRCMF_INIT_CLKCTL1, &err);
3833         if (!err)
3834                 clkctl = brcmf_sdiod_regrb(sdiodev,
3835                                            SBSDIO_FUNC1_CHIPCLKCSR, &err);
3836
3837         if (err || ((clkctl & ~SBSDIO_AVBITS) != BRCMF_INIT_CLKCTL1)) {
3838                 brcmf_err("ChipClkCSR access: err %d wrote 0x%02x read 0x%02x\n",
3839                           err, BRCMF_INIT_CLKCTL1, clkctl);
3840                 goto fail;
3841         }
3842
3843         bus->ci = brcmf_chip_attach(sdiodev, &brcmf_sdio_buscore_ops);
3844         if (IS_ERR(bus->ci)) {
3845                 brcmf_err("brcmf_chip_attach failed!\n");
3846                 bus->ci = NULL;
3847                 goto fail;
3848         }
3849         sdiodev->settings = brcmf_get_module_param(sdiodev->dev,
3850                                                    BRCMF_BUSTYPE_SDIO,
3851                                                    bus->ci->chip,
3852                                                    bus->ci->chiprev);
3853         if (!sdiodev->settings) {
3854                 brcmf_err("Failed to get device parameters\n");
3855                 goto fail;
3856         }
3857         /* platform specific configuration:
3858          *   alignments must be at least 4 bytes for ADMA
3859          */
3860         bus->head_align = ALIGNMENT;
3861         bus->sgentry_align = ALIGNMENT;
3862         if (sdiodev->settings->bus.sdio.sd_head_align > ALIGNMENT)
3863                 bus->head_align = sdiodev->settings->bus.sdio.sd_head_align;
3864         if (sdiodev->settings->bus.sdio.sd_sgentry_align > ALIGNMENT)
3865                 bus->sgentry_align =
3866                                 sdiodev->settings->bus.sdio.sd_sgentry_align;
3867
3868         /* allocate scatter-gather table. sg support
3869          * will be disabled upon allocation failure.
3870          */
3871         brcmf_sdiod_sgtable_alloc(sdiodev);
3872
3873 #ifdef CONFIG_PM_SLEEP
3874         /* wowl can be supported when KEEP_POWER is true and (WAKE_SDIO_IRQ
3875          * is true or when platform data OOB irq is true).
3876          */
3877         if ((sdio_get_host_pm_caps(sdiodev->func[1]) & MMC_PM_KEEP_POWER) &&
3878             ((sdio_get_host_pm_caps(sdiodev->func[1]) & MMC_PM_WAKE_SDIO_IRQ) ||
3879              (sdiodev->settings->bus.sdio.oob_irq_supported)))
3880                 sdiodev->bus_if->wowl_supported = true;
3881 #endif
3882
3883         if (brcmf_sdio_kso_init(bus)) {
3884                 brcmf_err("error enabling KSO\n");
3885                 goto fail;
3886         }
3887
3888         if (sdiodev->settings->bus.sdio.drive_strength)
3889                 drivestrength = sdiodev->settings->bus.sdio.drive_strength;
3890         else
3891                 drivestrength = DEFAULT_SDIO_DRIVE_STRENGTH;
3892         brcmf_sdio_drivestrengthinit(sdiodev, bus->ci, drivestrength);
3893
3894         /* Set card control so an SDIO card reset does a WLAN backplane reset */
3895         reg_val = brcmf_sdiod_regrb(sdiodev, SDIO_CCCR_BRCM_CARDCTRL, &err);
3896         if (err)
3897                 goto fail;
3898
3899         reg_val |= SDIO_CCCR_BRCM_CARDCTRL_WLANRESET;
3900
3901         brcmf_sdiod_regwb(sdiodev, SDIO_CCCR_BRCM_CARDCTRL, reg_val, &err);
3902         if (err)
3903                 goto fail;
3904
3905         /* set PMUControl so a backplane reset does PMU state reload */
3906         reg_addr = CORE_CC_REG(brcmf_chip_get_pmu(bus->ci)->base, pmucontrol);
3907         reg_val = brcmf_sdiod_regrl(sdiodev, reg_addr, &err);
3908         if (err)
3909                 goto fail;
3910
3911         reg_val |= (BCMA_CC_PMU_CTL_RES_RELOAD << BCMA_CC_PMU_CTL_RES_SHIFT);
3912
3913         brcmf_sdiod_regwl(sdiodev, reg_addr, reg_val, &err);
3914         if (err)
3915                 goto fail;
3916
3917         sdio_release_host(sdiodev->func[1]);
3918
3919         brcmu_pktq_init(&bus->txq, (PRIOMASK + 1), TXQLEN);
3920
3921         /* allocate header buffer */
3922         bus->hdrbuf = kzalloc(MAX_HDR_READ + bus->head_align, GFP_KERNEL);
3923         if (!bus->hdrbuf)
3924                 return false;
3925         /* Locate an appropriately-aligned portion of hdrbuf */
3926         bus->rxhdr = (u8 *) roundup((unsigned long)&bus->hdrbuf[0],
3927                                     bus->head_align);
3928
3929         /* Set the poll and/or interrupt flags */
3930         bus->intr = true;
3931         bus->poll = false;
3932         if (bus->poll)
3933                 bus->pollrate = 1;
3934
3935         return true;
3936
3937 fail:
3938         sdio_release_host(sdiodev->func[1]);
3939         return false;
3940 }
3941
3942 static int
3943 brcmf_sdio_watchdog_thread(void *data)
3944 {
3945         struct brcmf_sdio *bus = (struct brcmf_sdio *)data;
3946         int wait;
3947
3948         allow_signal(SIGTERM);
3949         /* Run until signal received */
3950         brcmf_sdiod_freezer_count(bus->sdiodev);
3951         while (1) {
3952                 if (kthread_should_stop())
3953                         break;
3954                 brcmf_sdiod_freezer_uncount(bus->sdiodev);
3955                 wait = wait_for_completion_interruptible(&bus->watchdog_wait);
3956                 brcmf_sdiod_freezer_count(bus->sdiodev);
3957                 brcmf_sdiod_try_freeze(bus->sdiodev);
3958                 if (!wait) {
3959                         brcmf_sdio_bus_watchdog(bus);
3960                         /* Count the tick for reference */
3961                         bus->sdcnt.tickcnt++;
3962                         reinit_completion(&bus->watchdog_wait);
3963                 } else
3964                         break;
3965         }
3966         return 0;
3967 }
3968
3969 static void
3970 brcmf_sdio_watchdog(unsigned long data)
3971 {
3972         struct brcmf_sdio *bus = (struct brcmf_sdio *)data;
3973
3974         if (bus->watchdog_tsk) {
3975                 complete(&bus->watchdog_wait);
3976                 /* Reschedule the watchdog */
3977                 if (bus->wd_active)
3978                         mod_timer(&bus->timer,
3979                                   jiffies + BRCMF_WD_POLL);
3980         }
3981 }
3982
3983 static const struct brcmf_bus_ops brcmf_sdio_bus_ops = {
3984         .stop = brcmf_sdio_bus_stop,
3985         .preinit = brcmf_sdio_bus_preinit,
3986         .txdata = brcmf_sdio_bus_txdata,
3987         .txctl = brcmf_sdio_bus_txctl,
3988         .rxctl = brcmf_sdio_bus_rxctl,
3989         .gettxq = brcmf_sdio_bus_gettxq,
3990         .wowl_config = brcmf_sdio_wowl_config,
3991         .get_ramsize = brcmf_sdio_bus_get_ramsize,
3992         .get_memdump = brcmf_sdio_bus_get_memdump,
3993 };
3994
3995 static void brcmf_sdio_firmware_callback(struct device *dev, int err,
3996                                          const struct firmware *code,
3997                                          void *nvram, u32 nvram_len)
3998 {
3999         struct brcmf_bus *bus_if;
4000         struct brcmf_sdio_dev *sdiodev;
4001         struct brcmf_sdio *bus;
4002         u8 saveclk;
4003
4004         brcmf_dbg(TRACE, "Enter: dev=%s, err=%d\n", dev_name(dev), err);
4005         bus_if = dev_get_drvdata(dev);
4006         sdiodev = bus_if->bus_priv.sdio;
4007         if (err)
4008                 goto fail;
4009
4010         if (!bus_if->drvr)
4011                 return;
4012
4013         bus = sdiodev->bus;
4014
4015         /* try to download image and nvram to the dongle */
4016         bus->alp_only = true;
4017         err = brcmf_sdio_download_firmware(bus, code, nvram, nvram_len);
4018         if (err)
4019                 goto fail;
4020         bus->alp_only = false;
4021
4022         /* Start the watchdog timer */
4023         bus->sdcnt.tickcnt = 0;
4024         brcmf_sdio_wd_timer(bus, true);
4025
4026         sdio_claim_host(sdiodev->func[1]);
4027
4028         /* Make sure backplane clock is on, needed to generate F2 interrupt */
4029         brcmf_sdio_clkctl(bus, CLK_AVAIL, false);
4030         if (bus->clkstate != CLK_AVAIL)
4031                 goto release;
4032
4033         /* Force clocks on backplane to be sure F2 interrupt propagates */
4034         saveclk = brcmf_sdiod_regrb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR, &err);
4035         if (!err) {
4036                 brcmf_sdiod_regwb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
4037                                   (saveclk | SBSDIO_FORCE_HT), &err);
4038         }
4039         if (err) {
4040                 brcmf_err("Failed to force clock for F2: err %d\n", err);
4041                 goto release;
4042         }
4043
4044         /* Enable function 2 (frame transfers) */
4045         w_sdreg32(bus, SDPCM_PROT_VERSION << SMB_DATA_VERSION_SHIFT,
4046                   offsetof(struct sdpcmd_regs, tosbmailboxdata));
4047         err = sdio_enable_func(sdiodev->func[SDIO_FUNC_2]);
4048
4049
4050         brcmf_dbg(INFO, "enable F2: err=%d\n", err);
4051
4052         /* If F2 successfully enabled, set core and enable interrupts */
4053         if (!err) {
4054                 /* Set up the interrupt mask and enable interrupts */
4055                 bus->hostintmask = HOSTINTMASK;
4056                 w_sdreg32(bus, bus->hostintmask,
4057                           offsetof(struct sdpcmd_regs, hostintmask));
4058
4059                 brcmf_sdiod_regwb(sdiodev, SBSDIO_WATERMARK, 8, &err);
4060         } else {
4061                 /* Disable F2 again */
4062                 sdio_disable_func(sdiodev->func[SDIO_FUNC_2]);
4063                 goto release;
4064         }
4065
4066         if (brcmf_chip_sr_capable(bus->ci)) {
4067                 brcmf_sdio_sr_init(bus);
4068         } else {
4069                 /* Restore previous clock setting */
4070                 brcmf_sdiod_regwb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
4071                                   saveclk, &err);
4072         }
4073
4074         if (err == 0) {
4075                 /* Allow full data communication using DPC from now on. */
4076                 brcmf_sdiod_change_state(bus->sdiodev, BRCMF_SDIOD_DATA);
4077
4078                 err = brcmf_sdiod_intr_register(sdiodev);
4079                 if (err != 0)
4080                         brcmf_err("intr register failed:%d\n", err);
4081         }
4082
4083         /* If we didn't come up, turn off backplane clock */
4084         if (err != 0)
4085                 brcmf_sdio_clkctl(bus, CLK_NONE, false);
4086
4087         sdio_release_host(sdiodev->func[1]);
4088
4089         err = brcmf_bus_started(dev);
4090         if (err != 0) {
4091                 brcmf_err("dongle is not responding\n");
4092                 goto fail;
4093         }
4094         return;
4095
4096 release:
4097         sdio_release_host(sdiodev->func[1]);
4098 fail:
4099         brcmf_dbg(TRACE, "failed: dev=%s, err=%d\n", dev_name(dev), err);
4100         device_release_driver(&sdiodev->func[2]->dev);
4101         device_release_driver(dev);
4102 }
4103
4104 struct brcmf_sdio *brcmf_sdio_probe(struct brcmf_sdio_dev *sdiodev)
4105 {
4106         int ret;
4107         struct brcmf_sdio *bus;
4108         struct workqueue_struct *wq;
4109
4110         brcmf_dbg(TRACE, "Enter\n");
4111
4112         /* Allocate private bus interface state */
4113         bus = kzalloc(sizeof(struct brcmf_sdio), GFP_ATOMIC);
4114         if (!bus)
4115                 goto fail;
4116
4117         bus->sdiodev = sdiodev;
4118         sdiodev->bus = bus;
4119         skb_queue_head_init(&bus->glom);
4120         bus->txbound = BRCMF_TXBOUND;
4121         bus->rxbound = BRCMF_RXBOUND;
4122         bus->txminmax = BRCMF_TXMINMAX;
4123         bus->tx_seq = SDPCM_SEQ_WRAP - 1;
4124
4125         /* single-threaded workqueue */
4126         wq = alloc_ordered_workqueue("brcmf_wq/%s", WQ_MEM_RECLAIM,
4127                                      dev_name(&sdiodev->func[1]->dev));
4128         if (!wq) {
4129                 brcmf_err("insufficient memory to create txworkqueue\n");
4130                 goto fail;
4131         }
4132         brcmf_sdiod_freezer_count(sdiodev);
4133         INIT_WORK(&bus->datawork, brcmf_sdio_dataworker);
4134         bus->brcmf_wq = wq;
4135
4136         /* attempt to attach to the dongle */
4137         if (!(brcmf_sdio_probe_attach(bus))) {
4138                 brcmf_err("brcmf_sdio_probe_attach failed\n");
4139                 goto fail;
4140         }
4141
4142         spin_lock_init(&bus->rxctl_lock);
4143         spin_lock_init(&bus->txq_lock);
4144         init_waitqueue_head(&bus->ctrl_wait);
4145         init_waitqueue_head(&bus->dcmd_resp_wait);
4146
4147         /* Set up the watchdog timer */
4148         init_timer(&bus->timer);
4149         bus->timer.data = (unsigned long)bus;
4150         bus->timer.function = brcmf_sdio_watchdog;
4151
4152         /* Initialize watchdog thread */
4153         init_completion(&bus->watchdog_wait);
4154         bus->watchdog_tsk = kthread_run(brcmf_sdio_watchdog_thread,
4155                                         bus, "brcmf_wdog/%s",
4156                                         dev_name(&sdiodev->func[1]->dev));
4157         if (IS_ERR(bus->watchdog_tsk)) {
4158                 pr_warn("brcmf_watchdog thread failed to start\n");
4159                 bus->watchdog_tsk = NULL;
4160         }
4161         /* Initialize DPC thread */
4162         bus->dpc_triggered = false;
4163         bus->dpc_running = false;
4164
4165         /* Assign bus interface call back */
4166         bus->sdiodev->bus_if->dev = bus->sdiodev->dev;
4167         bus->sdiodev->bus_if->ops = &brcmf_sdio_bus_ops;
4168         bus->sdiodev->bus_if->chip = bus->ci->chip;
4169         bus->sdiodev->bus_if->chiprev = bus->ci->chiprev;
4170
4171         /* default sdio bus header length for tx packet */
4172         bus->tx_hdrlen = SDPCM_HWHDR_LEN + SDPCM_SWHDR_LEN;
4173
4174         /* Attach to the common layer, reserve hdr space */
4175         ret = brcmf_attach(bus->sdiodev->dev, bus->sdiodev->settings);
4176         if (ret != 0) {
4177                 brcmf_err("brcmf_attach failed\n");
4178                 goto fail;
4179         }
4180
4181         /* Query the F2 block size, set roundup accordingly */
4182         bus->blocksize = bus->sdiodev->func[2]->cur_blksize;
4183         bus->roundup = min(max_roundup, bus->blocksize);
4184
4185         /* Allocate buffers */
4186         if (bus->sdiodev->bus_if->maxctl) {
4187                 bus->sdiodev->bus_if->maxctl += bus->roundup;
4188                 bus->rxblen =
4189                     roundup((bus->sdiodev->bus_if->maxctl + SDPCM_HDRLEN),
4190                             ALIGNMENT) + bus->head_align;
4191                 bus->rxbuf = kmalloc(bus->rxblen, GFP_ATOMIC);
4192                 if (!(bus->rxbuf)) {
4193                         brcmf_err("rxbuf allocation failed\n");
4194                         goto fail;
4195                 }
4196         }
4197
4198         sdio_claim_host(bus->sdiodev->func[1]);
4199
4200         /* Disable F2 to clear any intermediate frame state on the dongle */
4201         sdio_disable_func(bus->sdiodev->func[SDIO_FUNC_2]);
4202
4203         bus->rxflow = false;
4204
4205         /* Done with backplane-dependent accesses, can drop clock... */
4206         brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR, 0, NULL);
4207
4208         sdio_release_host(bus->sdiodev->func[1]);
4209
4210         /* ...and initialize clock/power states */
4211         bus->clkstate = CLK_SDONLY;
4212         bus->idletime = BRCMF_IDLE_INTERVAL;
4213         bus->idleclock = BRCMF_IDLE_ACTIVE;
4214
4215         /* SR state */
4216         bus->sr_enabled = false;
4217
4218         brcmf_sdio_debugfs_create(bus);
4219         brcmf_dbg(INFO, "completed!!\n");
4220
4221         ret = brcmf_fw_map_chip_to_name(bus->ci->chip, bus->ci->chiprev,
4222                                         brcmf_sdio_fwnames,
4223                                         ARRAY_SIZE(brcmf_sdio_fwnames),
4224                                         sdiodev->fw_name, sdiodev->nvram_name);
4225         if (ret)
4226                 goto fail;
4227
4228         ret = brcmf_fw_get_firmwares(sdiodev->dev, BRCMF_FW_REQUEST_NVRAM,
4229                                      sdiodev->fw_name, sdiodev->nvram_name,
4230                                      brcmf_sdio_firmware_callback);
4231         if (ret != 0) {
4232                 brcmf_err("async firmware request failed: %d\n", ret);
4233                 goto fail;
4234         }
4235
4236         return bus;
4237
4238 fail:
4239         brcmf_sdio_remove(bus);
4240         return NULL;
4241 }
4242
4243 /* Detach and free everything */
4244 void brcmf_sdio_remove(struct brcmf_sdio *bus)
4245 {
4246         brcmf_dbg(TRACE, "Enter\n");
4247
4248         if (bus) {
4249                 /* Stop watchdog task */
4250                 if (bus->watchdog_tsk) {
4251                         send_sig(SIGTERM, bus->watchdog_tsk, 1);
4252                         kthread_stop(bus->watchdog_tsk);
4253                         bus->watchdog_tsk = NULL;
4254                 }
4255
4256                 /* De-register interrupt handler */
4257                 brcmf_sdiod_intr_unregister(bus->sdiodev);
4258
4259                 brcmf_detach(bus->sdiodev->dev);
4260
4261                 cancel_work_sync(&bus->datawork);
4262                 if (bus->brcmf_wq)
4263                         destroy_workqueue(bus->brcmf_wq);
4264
4265                 if (bus->ci) {
4266                         if (bus->sdiodev->state != BRCMF_SDIOD_NOMEDIUM) {
4267                                 sdio_claim_host(bus->sdiodev->func[1]);
4268                                 brcmf_sdio_wd_timer(bus, false);
4269                                 brcmf_sdio_clkctl(bus, CLK_AVAIL, false);
4270                                 /* Leave the device in state where it is
4271                                  * 'passive'. This is done by resetting all
4272                                  * necessary cores.
4273                                  */
4274                                 msleep(20);
4275                                 brcmf_chip_set_passive(bus->ci);
4276                                 brcmf_sdio_clkctl(bus, CLK_NONE, false);
4277                                 sdio_release_host(bus->sdiodev->func[1]);
4278                         }
4279                         brcmf_chip_detach(bus->ci);
4280                 }
4281                 if (bus->sdiodev->settings)
4282                         brcmf_release_module_param(bus->sdiodev->settings);
4283
4284                 kfree(bus->rxbuf);
4285                 kfree(bus->hdrbuf);
4286                 kfree(bus);
4287         }
4288
4289         brcmf_dbg(TRACE, "Disconnected\n");
4290 }
4291
4292 void brcmf_sdio_wd_timer(struct brcmf_sdio *bus, bool active)
4293 {
4294         /* Totally stop the timer */
4295         if (!active && bus->wd_active) {
4296                 del_timer_sync(&bus->timer);
4297                 bus->wd_active = false;
4298                 return;
4299         }
4300
4301         /* don't start the wd until fw is loaded */
4302         if (bus->sdiodev->state != BRCMF_SDIOD_DATA)
4303                 return;
4304
4305         if (active) {
4306                 if (!bus->wd_active) {
4307                         /* Create timer again when watchdog period is
4308                            dynamically changed or in the first instance
4309                          */
4310                         bus->timer.expires = jiffies + BRCMF_WD_POLL;
4311                         add_timer(&bus->timer);
4312                         bus->wd_active = true;
4313                 } else {
4314                         /* Re arm the timer, at last watchdog period */
4315                         mod_timer(&bus->timer, jiffies + BRCMF_WD_POLL);
4316                 }
4317         }
4318 }
4319
4320 int brcmf_sdio_sleep(struct brcmf_sdio *bus, bool sleep)
4321 {
4322         int ret;
4323
4324         sdio_claim_host(bus->sdiodev->func[1]);
4325         ret = brcmf_sdio_bus_sleep(bus, sleep, false);
4326         sdio_release_host(bus->sdiodev->func[1]);
4327
4328         return ret;
4329 }
4330