drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c

   1 /*
   2  * Copyright (c) 2010 Broadcom Corporation
   3  *
   4  * Permission to use, copy, modify, and/or distribute this software for any
   5  * purpose with or without fee is hereby granted, provided that the above
   6  * copyright notice and this permission notice appear in all copies.
   7  *
   8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
   9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
  11  * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
  13  * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
  14  * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15  */
  16
  17 #include <linux/types.h>
  18 #include <linux/atomic.h>
  19 #include <linux/kernel.h>
  20 #include <linux/kthread.h>
  21 #include <linux/printk.h>
  22 #include <linux/pci_ids.h>
  23 #include <linux/netdevice.h>
  24 #include <linux/interrupt.h>
  25 #include <linux/sched/signal.h>
  26 #include <linux/mmc/sdio.h>
  27 #include <linux/mmc/sdio_ids.h>
  28 #include <linux/mmc/sdio_func.h>
  29 #include <linux/mmc/card.h>
  30 #include <linux/semaphore.h>
  31 #include <linux/firmware.h>
  32 #include <linux/module.h>
  33 #include <linux/bcma/bcma.h>
  34 #include <linux/debugfs.h>
  35 #include <linux/vmalloc.h>
  36 #include <asm/unaligned.h>
  37 #include <defs.h>
  38 #include <brcmu_wifi.h>
  39 #include <brcmu_utils.h>
  40 #include <brcm_hw_ids.h>
  41 #include <soc.h>
  42 #include "sdio.h"
  43 #include "chip.h"
  44 #include "firmware.h"
  45 #include "core.h"
  46 #include "common.h"
  47 #include "bcdc.h"
  48
  49 #define DCMD_RESP_TIMEOUT       msecs_to_jiffies(2500)
  50 #define CTL_DONE_TIMEOUT        msecs_to_jiffies(2500)
  51
  52 /* watermark expressed in number of words */
  53 #define DEFAULT_F2_WATERMARK    0x8
  54 #define CY_4373_F2_WATERMARK    0x40
  55
  56 #ifdef DEBUG
  57
  58 #define BRCMF_TRAP_INFO_SIZE    80
  59
  60 #define CBUF_LEN        (128)
  61
  62 /* Device console log buffer state */
  63 #define CONSOLE_BUFFER_MAX      2024
  64
  65 struct rte_log_le {
  66         __le32 buf;             /* Can't be pointer on (64-bit) hosts */
  67         __le32 buf_size;
  68         __le32 idx;
  69         char *_buf_compat;      /* Redundant pointer for backward compat. */
  70 };
  71
  72 struct rte_console {
  73         /* Virtual UART
  74          * When there is no UART (e.g. Quickturn),
  75          * the host should write a complete
  76          * input line directly into cbuf and then write
  77          * the length into vcons_in.
  78          * This may also be used when there is a real UART
  79          * (at risk of conflicting with
  80          * the real UART).  vcons_out is currently unused.
  81          */
  82         uint vcons_in;
  83         uint vcons_out;
  84
  85         /* Output (logging) buffer
  86          * Console output is written to a ring buffer log_buf at index log_idx.
  87          * The host may read the output when it sees log_idx advance.
  88          * Output will be lost if the output wraps around faster than the host
  89          * polls.
  90          */
  91         struct rte_log_le log_le;
  92
  93         /* Console input line buffer
  94          * Characters are read one at a time into cbuf
  95          * until <CR> is received, then
  96          * the buffer is processed as a command line.
  97          * Also used for virtual UART.
  98          */
  99         uint cbuf_idx;
 100         char cbuf[CBUF_LEN];
 101 };
 102
 103 #endif                          /* DEBUG */
 104 #include <chipcommon.h>
 105
 106 #include "bus.h"
 107 #include "debug.h"
 108 #include "tracepoint.h"
 109
 110 #define TXQLEN          2048    /* bulk tx queue length */
 111 #define TXHI            (TXQLEN - 256)  /* turn on flow control above TXHI */
 112 #define TXLOW           (TXHI - 256)    /* turn off flow control below TXLOW */
 113 #define PRIOMASK        7
 114
 115 #define TXRETRIES       2       /* # of retries for tx frames */
 116
 117 #define BRCMF_RXBOUND   50      /* Default for max rx frames in
 118                                  one scheduling */
 119
 120 #define BRCMF_TXBOUND   20      /* Default for max tx frames in
 121                                  one scheduling */
 122
 123 #define BRCMF_TXMINMAX  1       /* Max tx frames if rx still pending */
 124
 125 #define MEMBLOCK        2048    /* Block size used for downloading
 126                                  of dongle image */
 127 #define MAX_DATA_BUF    (32 * 1024)     /* Must be large enough to hold
 128                                  biggest possible glom */
 129
 130 #define BRCMF_FIRSTREAD (1 << 6)
 131
 132 #define BRCMF_CONSOLE   10      /* watchdog interval to poll console */
 133
 134 /* SBSDIO_DEVICE_CTL */
 135
 136 /* 1: device will assert busy signal when receiving CMD53 */
 137 #define SBSDIO_DEVCTL_SETBUSY           0x01
 138 /* 1: assertion of sdio interrupt is synchronous to the sdio clock */
 139 #define SBSDIO_DEVCTL_SPI_INTR_SYNC     0x02
 140 /* 1: mask all interrupts to host except the chipActive (rev 8) */
 141 #define SBSDIO_DEVCTL_CA_INT_ONLY       0x04
 142 /* 1: isolate internal sdio signals, put external pads in tri-state; requires
 143  * sdio bus power cycle to clear (rev 9) */
 144 #define SBSDIO_DEVCTL_PADS_ISO          0x08
 145 /* 1: enable F2 Watermark */
 146 #define SBSDIO_DEVCTL_F2WM_ENAB         0x10
 147 /* Force SD->SB reset mapping (rev 11) */
 148 #define SBSDIO_DEVCTL_SB_RST_CTL        0x30
 149 /*   Determined by CoreControl bit */
 150 #define SBSDIO_DEVCTL_RST_CORECTL       0x00
 151 /*   Force backplane reset */
 152 #define SBSDIO_DEVCTL_RST_BPRESET       0x10
 153 /*   Force no backplane reset */
 154 #define SBSDIO_DEVCTL_RST_NOBPRESET     0x20
 155
 156 /* direct(mapped) cis space */
 157
 158 /* MAPPED common CIS address */
 159 #define SBSDIO_CIS_BASE_COMMON          0x1000
 160 /* maximum bytes in one CIS */
 161 #define SBSDIO_CIS_SIZE_LIMIT           0x200
 162 /* cis offset addr is < 17 bits */
 163 #define SBSDIO_CIS_OFT_ADDR_MASK        0x1FFFF
 164
 165 /* manfid tuple length, include tuple, link bytes */
 166 #define SBSDIO_CIS_MANFID_TUPLE_LEN     6
 167
 168 #define SD_REG(field) \
 169                 (offsetof(struct sdpcmd_regs, field))
 170
 171 /* SDIO function 1 register CHIPCLKCSR */
 172 /* Force ALP request to backplane */
 173 #define SBSDIO_FORCE_ALP                0x01
 174 /* Force HT request to backplane */
 175 #define SBSDIO_FORCE_HT                 0x02
 176 /* Force ILP request to backplane */
 177 #define SBSDIO_FORCE_ILP                0x04
 178 /* Make ALP ready (power up xtal) */
 179 #define SBSDIO_ALP_AVAIL_REQ            0x08
 180 /* Make HT ready (power up PLL) */
 181 #define SBSDIO_HT_AVAIL_REQ             0x10
 182 /* Squelch clock requests from HW */
 183 #define SBSDIO_FORCE_HW_CLKREQ_OFF      0x20
 184 /* Status: ALP is ready */
 185 #define SBSDIO_ALP_AVAIL                0x40
 186 /* Status: HT is ready */
 187 #define SBSDIO_HT_AVAIL                 0x80
 188 #define SBSDIO_CSR_MASK                 0x1F
 189 #define SBSDIO_AVBITS           (SBSDIO_HT_AVAIL | SBSDIO_ALP_AVAIL)
 190 #define SBSDIO_ALPAV(regval)    ((regval) & SBSDIO_AVBITS)
 191 #define SBSDIO_HTAV(regval)     (((regval) & SBSDIO_AVBITS) == SBSDIO_AVBITS)
 192 #define SBSDIO_ALPONLY(regval)  (SBSDIO_ALPAV(regval) && !SBSDIO_HTAV(regval))
 193 #define SBSDIO_CLKAV(regval, alponly) \
 194         (SBSDIO_ALPAV(regval) && (alponly ? 1 : SBSDIO_HTAV(regval)))
 195
 196 /* intstatus */
 197 #define I_SMB_SW0       (1 << 0)        /* To SB Mail S/W interrupt 0 */
 198 #define I_SMB_SW1       (1 << 1)        /* To SB Mail S/W interrupt 1 */
 199 #define I_SMB_SW2       (1 << 2)        /* To SB Mail S/W interrupt 2 */
 200 #define I_SMB_SW3       (1 << 3)        /* To SB Mail S/W interrupt 3 */
 201 #define I_SMB_SW_MASK   0x0000000f      /* To SB Mail S/W interrupts mask */
 202 #define I_SMB_SW_SHIFT  0       /* To SB Mail S/W interrupts shift */
 203 #define I_HMB_SW0       (1 << 4)        /* To Host Mail S/W interrupt 0 */
 204 #define I_HMB_SW1       (1 << 5)        /* To Host Mail S/W interrupt 1 */
 205 #define I_HMB_SW2       (1 << 6)        /* To Host Mail S/W interrupt 2 */
 206 #define I_HMB_SW3       (1 << 7)        /* To Host Mail S/W interrupt 3 */
 207 #define I_HMB_SW_MASK   0x000000f0      /* To Host Mail S/W interrupts mask */
 208 #define I_HMB_SW_SHIFT  4       /* To Host Mail S/W interrupts shift */
 209 #define I_WR_OOSYNC     (1 << 8)        /* Write Frame Out Of Sync */
 210 #define I_RD_OOSYNC     (1 << 9)        /* Read Frame Out Of Sync */
 211 #define I_PC            (1 << 10)       /* descriptor error */
 212 #define I_PD            (1 << 11)       /* data error */
 213 #define I_DE            (1 << 12)       /* Descriptor protocol Error */
 214 #define I_RU            (1 << 13)       /* Receive descriptor Underflow */
 215 #define I_RO            (1 << 14)       /* Receive fifo Overflow */
 216 #define I_XU            (1 << 15)       /* Transmit fifo Underflow */
 217 #define I_RI            (1 << 16)       /* Receive Interrupt */
 218 #define I_BUSPWR        (1 << 17)       /* SDIO Bus Power Change (rev 9) */
 219 #define I_XMTDATA_AVAIL (1 << 23)       /* bits in fifo */
 220 #define I_XI            (1 << 24)       /* Transmit Interrupt */
 221 #define I_RF_TERM       (1 << 25)       /* Read Frame Terminate */
 222 #define I_WF_TERM       (1 << 26)       /* Write Frame Terminate */
 223 #define I_PCMCIA_XU     (1 << 27)       /* PCMCIA Transmit FIFO Underflow */
 224 #define I_SBINT         (1 << 28)       /* sbintstatus Interrupt */
 225 #define I_CHIPACTIVE    (1 << 29)       /* chip from doze to active state */
 226 #define I_SRESET        (1 << 30)       /* CCCR RES interrupt */
 227 #define I_IOE2          (1U << 31)      /* CCCR IOE2 Bit Changed */
 228 #define I_ERRORS        (I_PC | I_PD | I_DE | I_RU | I_RO | I_XU)
 229 #define I_DMA           (I_RI | I_XI | I_ERRORS)
 230
 231 /* corecontrol */
 232 #define CC_CISRDY               (1 << 0)        /* CIS Ready */
 233 #define CC_BPRESEN              (1 << 1)        /* CCCR RES signal */
 234 #define CC_F2RDY                (1 << 2)        /* set CCCR IOR2 bit */
 235 #define CC_CLRPADSISO           (1 << 3)        /* clear SDIO pads isolation */
 236 #define CC_XMTDATAAVAIL_MODE    (1 << 4)
 237 #define CC_XMTDATAAVAIL_CTRL    (1 << 5)
 238
 239 /* SDA_FRAMECTRL */
 240 #define SFC_RF_TERM     (1 << 0)        /* Read Frame Terminate */
 241 #define SFC_WF_TERM     (1 << 1)        /* Write Frame Terminate */
 242 #define SFC_CRC4WOOS    (1 << 2)        /* CRC error for write out of sync */
 243 #define SFC_ABORTALL    (1 << 3)        /* Abort all in-progress frames */
 244
 245 /*
 246  * Software allocation of To SB Mailbox resources
 247  */
 248
 249 /* tosbmailbox bits corresponding to intstatus bits */
 250 #define SMB_NAK         (1 << 0)        /* Frame NAK */
 251 #define SMB_INT_ACK     (1 << 1)        /* Host Interrupt ACK */
 252 #define SMB_USE_OOB     (1 << 2)        /* Use OOB Wakeup */
 253 #define SMB_DEV_INT     (1 << 3)        /* Miscellaneous Interrupt */
 254
 255 /* tosbmailboxdata */
 256 #define SMB_DATA_VERSION_SHIFT  16      /* host protocol version */
 257
 258 /*
 259  * Software allocation of To Host Mailbox resources
 260  */
 261
 262 /* intstatus bits */
 263 #define I_HMB_FC_STATE  I_HMB_SW0       /* Flow Control State */
 264 #define I_HMB_FC_CHANGE I_HMB_SW1       /* Flow Control State Changed */
 265 #define I_HMB_FRAME_IND I_HMB_SW2       /* Frame Indication */
 266 #define I_HMB_HOST_INT  I_HMB_SW3       /* Miscellaneous Interrupt */
 267
 268 /* tohostmailboxdata */
 269 #define HMB_DATA_NAKHANDLED     0x0001  /* retransmit NAK'd frame */
 270 #define HMB_DATA_DEVREADY       0x0002  /* talk to host after enable */
 271 #define HMB_DATA_FC             0x0004  /* per prio flowcontrol update flag */
 272 #define HMB_DATA_FWREADY        0x0008  /* fw ready for protocol activity */
 273 #define HMB_DATA_FWHALT         0x0010  /* firmware halted */
 274
 275 #define HMB_DATA_FCDATA_MASK    0xff000000
 276 #define HMB_DATA_FCDATA_SHIFT   24
 277
 278 #define HMB_DATA_VERSION_MASK   0x00ff0000
 279 #define HMB_DATA_VERSION_SHIFT  16
 280
 281 /*
 282  * Software-defined protocol header
 283  */
 284
 285 /* Current protocol version */
 286 #define SDPCM_PROT_VERSION      4
 287
 288 /*
 289  * Shared structure between dongle and the host.
 290  * The structure contains pointers to trap or assert information.
 291  */
 292 #define SDPCM_SHARED_VERSION       0x0003
 293 #define SDPCM_SHARED_VERSION_MASK  0x00FF
 294 #define SDPCM_SHARED_ASSERT_BUILT  0x0100
 295 #define SDPCM_SHARED_ASSERT        0x0200
 296 #define SDPCM_SHARED_TRAP          0x0400
 297
 298 /* Space for header read, limit for data packets */
 299 #define MAX_HDR_READ    (1 << 6)
 300 #define MAX_RX_DATASZ   2048
 301
 302 /* Bump up limit on waiting for HT to account for first startup;
 303  * if the image is doing a CRC calculation before programming the PMU
 304  * for HT availability, it could take a couple hundred ms more, so
 305  * max out at a 1 second (1000000us).
 306  */
 307 #undef PMU_MAX_TRANSITION_DLY
 308 #define PMU_MAX_TRANSITION_DLY 1000000
 309
 310 /* Value for ChipClockCSR during initial setup */
 311 #define BRCMF_INIT_CLKCTL1      (SBSDIO_FORCE_HW_CLKREQ_OFF |   \
 312                                         SBSDIO_ALP_AVAIL_REQ)
 313
 314 /* Flags for SDH calls */
 315 #define F2SYNC  (SDIO_REQ_4BYTE | SDIO_REQ_FIXED)
 316
 317 #define BRCMF_IDLE_ACTIVE       0       /* Do not request any SD clock change
 318                                          * when idle
 319                                          */
 320 #define BRCMF_IDLE_INTERVAL     1
 321
 322 #define KSO_WAIT_US 50
 323 #define MAX_KSO_ATTEMPTS (PMU_MAX_TRANSITION_DLY/KSO_WAIT_US)
 324 #define BRCMF_SDIO_MAX_ACCESS_ERRORS    5
 325
 326 /*
 327  * Conversion of 802.1D priority to precedence level
 328  */
 329 static uint prio2prec(u32 prio)
 330 {
 331         return (prio == PRIO_8021D_NONE || prio == PRIO_8021D_BE) ?
 332                (prio^2) : prio;
 333 }
 334
 335 #ifdef DEBUG
 336 /* Device console log buffer state */
 337 struct brcmf_console {
 338         uint count;             /* Poll interval msec counter */
 339         uint log_addr;          /* Log struct address (fixed) */
 340         struct rte_log_le log_le;       /* Log struct (host copy) */
 341         uint bufsize;           /* Size of log buffer */
 342         u8 *buf;                /* Log buffer (host copy) */
 343         uint last;              /* Last buffer read index */
 344 };
 345
 346 struct brcmf_trap_info {
 347         __le32          type;
 348         __le32          epc;
 349         __le32          cpsr;
 350         __le32          spsr;
 351         __le32          r0;     /* a1 */
 352         __le32          r1;     /* a2 */
 353         __le32          r2;     /* a3 */
 354         __le32          r3;     /* a4 */
 355         __le32          r4;     /* v1 */
 356         __le32          r5;     /* v2 */
 357         __le32          r6;     /* v3 */
 358         __le32          r7;     /* v4 */
 359         __le32          r8;     /* v5 */
 360         __le32          r9;     /* sb/v6 */
 361         __le32          r10;    /* sl/v7 */
 362         __le32          r11;    /* fp/v8 */
 363         __le32          r12;    /* ip */
 364         __le32          r13;    /* sp */
 365         __le32          r14;    /* lr */
 366         __le32          pc;     /* r15 */
 367 };
 368 #endif                          /* DEBUG */
 369
 370 struct sdpcm_shared {
 371         u32 flags;
 372         u32 trap_addr;
 373         u32 assert_exp_addr;
 374         u32 assert_file_addr;
 375         u32 assert_line;
 376         u32 console_addr;       /* Address of struct rte_console */
 377         u32 msgtrace_addr;
 378         u8 tag[32];
 379         u32 brpt_addr;
 380 };
 381
 382 struct sdpcm_shared_le {
 383         __le32 flags;
 384         __le32 trap_addr;
 385         __le32 assert_exp_addr;
 386         __le32 assert_file_addr;
 387         __le32 assert_line;
 388         __le32 console_addr;    /* Address of struct rte_console */
 389         __le32 msgtrace_addr;
 390         u8 tag[32];
 391         __le32 brpt_addr;
 392 };
 393
 394 /* dongle SDIO bus specific header info */
 395 struct brcmf_sdio_hdrinfo {
 396         u8 seq_num;
 397         u8 channel;
 398         u16 len;
 399         u16 len_left;
 400         u16 len_nxtfrm;
 401         u8 dat_offset;
 402         bool lastfrm;
 403         u16 tail_pad;
 404 };
 405
 406 /*
 407  * hold counter variables
 408  */
 409 struct brcmf_sdio_count {
 410         uint intrcount;         /* Count of device interrupt callbacks */
 411         uint lastintrs;         /* Count as of last watchdog timer */
 412         uint pollcnt;           /* Count of active polls */
 413         uint regfails;          /* Count of R_REG failures */
 414         uint tx_sderrs;         /* Count of tx attempts with sd errors */
 415         uint fcqueued;          /* Tx packets that got queued */
 416         uint rxrtx;             /* Count of rtx requests (NAK to dongle) */
 417         uint rx_toolong;        /* Receive frames too long to receive */
 418         uint rxc_errors;        /* SDIO errors when reading control frames */
 419         uint rx_hdrfail;        /* SDIO errors on header reads */
 420         uint rx_badhdr;         /* Bad received headers (roosync?) */
 421         uint rx_badseq;         /* Mismatched rx sequence number */
 422         uint fc_rcvd;           /* Number of flow-control events received */
 423         uint fc_xoff;           /* Number which turned on flow-control */
 424         uint fc_xon;            /* Number which turned off flow-control */
 425         uint rxglomfail;        /* Failed deglom attempts */
 426         uint rxglomframes;      /* Number of glom frames (superframes) */
 427         uint rxglompkts;        /* Number of packets from glom frames */
 428         uint f2rxhdrs;          /* Number of header reads */
 429         uint f2rxdata;          /* Number of frame data reads */
 430         uint f2txdata;          /* Number of f2 frame writes */
 431         uint f1regdata;         /* Number of f1 register accesses */
 432         uint tickcnt;           /* Number of watchdog been schedule */
 433         ulong tx_ctlerrs;       /* Err of sending ctrl frames */
 434         ulong tx_ctlpkts;       /* Ctrl frames sent to dongle */
 435         ulong rx_ctlerrs;       /* Err of processing rx ctrl frames */
 436         ulong rx_ctlpkts;       /* Ctrl frames processed from dongle */
 437         ulong rx_readahead_cnt; /* packets where header read-ahead was used */
 438 };
 439
 440 /* misc chip info needed by some of the routines */
 441 /* Private data for SDIO bus interaction */
 442 struct brcmf_sdio {
 443         struct brcmf_sdio_dev *sdiodev; /* sdio device handler */
 444         struct brcmf_chip *ci;  /* Chip info struct */
 445         struct brcmf_core *sdio_core; /* sdio core info struct */
 446
 447         u32 hostintmask;        /* Copy of Host Interrupt Mask */
 448         atomic_t intstatus;     /* Intstatus bits (events) pending */
 449         atomic_t fcstate;       /* State of dongle flow-control */
 450
 451         uint blocksize;         /* Block size of SDIO transfers */
 452         uint roundup;           /* Max roundup limit */
 453
 454         struct pktq txq;        /* Queue length used for flow-control */
 455         u8 flowcontrol; /* per prio flow control bitmask */
 456         u8 tx_seq;              /* Transmit sequence number (next) */
 457         u8 tx_max;              /* Maximum transmit sequence allowed */
 458
 459         u8 *hdrbuf;             /* buffer for handling rx frame */
 460         u8 *rxhdr;              /* Header of current rx frame (in hdrbuf) */
 461         u8 rx_seq;              /* Receive sequence number (expected) */
 462         struct brcmf_sdio_hdrinfo cur_read;
 463                                 /* info of current read frame */
 464         bool rxskip;            /* Skip receive (awaiting NAK ACK) */
 465         bool rxpending;         /* Data frame pending in dongle */
 466
 467         uint rxbound;           /* Rx frames to read before resched */
 468         uint txbound;           /* Tx frames to send before resched */
 469         uint txminmax;
 470
 471         struct sk_buff *glomd;  /* Packet containing glomming descriptor */
 472         struct sk_buff_head glom; /* Packet list for glommed superframe */
 473
 474         u8 *rxbuf;              /* Buffer for receiving control packets */
 475         uint rxblen;            /* Allocated length of rxbuf */
 476         u8 *rxctl;              /* Aligned pointer into rxbuf */
 477         u8 *rxctl_orig;         /* pointer for freeing rxctl */
 478         uint rxlen;             /* Length of valid data in buffer */
 479         spinlock_t rxctl_lock;  /* protection lock for ctrl frame resources */
 480
 481         u8 sdpcm_ver;   /* Bus protocol reported by dongle */
 482
 483         bool intr;              /* Use interrupts */
 484         bool poll;              /* Use polling */
 485         atomic_t ipend;         /* Device interrupt is pending */
 486         uint spurious;          /* Count of spurious interrupts */
 487         uint pollrate;          /* Ticks between device polls */
 488         uint polltick;          /* Tick counter */
 489
 490 #ifdef DEBUG
 491         uint console_interval;
 492         struct brcmf_console console;   /* Console output polling support */
 493         uint console_addr;      /* Console address from shared struct */
 494 #endif                          /* DEBUG */
 495
 496         uint clkstate;          /* State of sd and backplane clock(s) */
 497         s32 idletime;           /* Control for activity timeout */
 498         s32 idlecount;          /* Activity timeout counter */
 499         s32 idleclock;          /* How to set bus driver when idle */
 500         bool rxflow_mode;       /* Rx flow control mode */
 501         bool rxflow;            /* Is rx flow control on */
 502         bool alp_only;          /* Don't use HT clock (ALP only) */
 503
 504         u8 *ctrl_frame_buf;
 505         u16 ctrl_frame_len;
 506         bool ctrl_frame_stat;
 507         int ctrl_frame_err;
 508
 509         spinlock_t txq_lock;            /* protect bus->txq */
 510         wait_queue_head_t ctrl_wait;
 511         wait_queue_head_t dcmd_resp_wait;
 512
 513         struct timer_list timer;
 514         struct completion watchdog_wait;
 515         struct task_struct *watchdog_tsk;
 516         bool wd_active;
 517
 518         struct workqueue_struct *brcmf_wq;
 519         struct work_struct datawork;
 520         bool dpc_triggered;
 521         bool dpc_running;
 522
 523         bool txoff;             /* Transmit flow-controlled */
 524         struct brcmf_sdio_count sdcnt;
 525         bool sr_enabled; /* SaveRestore enabled */
 526         bool sleeping;
 527
 528         u8 tx_hdrlen;           /* sdio bus header length for tx packet */
 529         bool txglom;            /* host tx glomming enable flag */
 530         u16 head_align;         /* buffer pointer alignment */
 531         u16 sgentry_align;      /* scatter-gather buffer alignment */
 532 };
 533
 534 /* clkstate */
 535 #define CLK_NONE        0
 536 #define CLK_SDONLY      1
 537 #define CLK_PENDING     2
 538 #define CLK_AVAIL       3
 539
 540 #ifdef DEBUG
 541 static int qcount[NUMPRIO];
 542 #endif                          /* DEBUG */
 543
 544 #define DEFAULT_SDIO_DRIVE_STRENGTH     6       /* in milliamps */
 545
 546 #define RETRYCHAN(chan) ((chan) == SDPCM_EVENT_CHANNEL)
 547
 548 /* Limit on rounding up frames */
 549 static const uint max_roundup = 512;
 550
 551 #ifdef CONFIG_ARCH_DMA_ADDR_T_64BIT
 552 #define ALIGNMENT  8
 553 #else
 554 #define ALIGNMENT  4
 555 #endif
 556
 557 enum brcmf_sdio_frmtype {
 558         BRCMF_SDIO_FT_NORMAL,
 559         BRCMF_SDIO_FT_SUPER,
 560         BRCMF_SDIO_FT_SUB,
 561 };
 562
 563 #define SDIOD_DRVSTR_KEY(chip, pmu)     (((unsigned int)(chip) << 16) | (pmu))
 564
 565 /* SDIO Pad drive strength to select value mappings */
 566 struct sdiod_drive_str {
 567         u8 strength;    /* Pad Drive Strength in mA */
 568         u8 sel;         /* Chip-specific select value */
 569 };
 570
 571 /* SDIO Drive Strength to sel value table for PMU Rev 11 (1.8V) */
 572 static const struct sdiod_drive_str sdiod_drvstr_tab1_1v8[] = {
 573         {32, 0x6},
 574         {26, 0x7},
 575         {22, 0x4},
 576         {16, 0x5},
 577         {12, 0x2},
 578         {8, 0x3},
 579         {4, 0x0},
 580         {0, 0x1}
 581 };
 582
 583 /* SDIO Drive Strength to sel value table for PMU Rev 13 (1.8v) */
 584 static const struct sdiod_drive_str sdiod_drive_strength_tab5_1v8[] = {
 585         {6, 0x7},
 586         {5, 0x6},
 587         {4, 0x5},
 588         {3, 0x4},
 589         {2, 0x2},
 590         {1, 0x1},
 591         {0, 0x0}
 592 };
 593
 594 /* SDIO Drive Strength to sel value table for PMU Rev 17 (1.8v) */
 595 static const struct sdiod_drive_str sdiod_drvstr_tab6_1v8[] = {
 596         {3, 0x3},
 597         {2, 0x2},
 598         {1, 0x1},
 599         {0, 0x0} };
 600
 601 /* SDIO Drive Strength to sel value table for 43143 PMU Rev 17 (3.3V) */
 602 static const struct sdiod_drive_str sdiod_drvstr_tab2_3v3[] = {
 603         {16, 0x7},
 604         {12, 0x5},
 605         {8,  0x3},
 606         {4,  0x1}
 607 };
 608
 609 BRCMF_FW_DEF(43143, "/*(DEBLOBBED)*/");
 610 BRCMF_FW_DEF(43241B0, "/*(DEBLOBBED)*/");
 611 BRCMF_FW_DEF(43241B4, "/*(DEBLOBBED)*/");
 612 BRCMF_FW_DEF(43241B5, "/*(DEBLOBBED)*/");
 613 BRCMF_FW_DEF(4329, "/*(DEBLOBBED)*/");
 614 BRCMF_FW_DEF(4330, "/*(DEBLOBBED)*/");
 615 BRCMF_FW_DEF(4334, "/*(DEBLOBBED)*/");
 616 BRCMF_FW_DEF(43340, "/*(DEBLOBBED)*/");
 617 BRCMF_FW_DEF(4335, "/*(DEBLOBBED)*/");
 618 BRCMF_FW_DEF(43362, "/*(DEBLOBBED)*/");
 619 BRCMF_FW_DEF(4339, "/*(DEBLOBBED)*/");
 620 BRCMF_FW_DEF(43430A0, "/*(DEBLOBBED)*/");
 621 /* Note the names are not postfixed with a1 for backward compatibility */
 622 BRCMF_FW_DEF(43430A1, "/*(DEBLOBBED)*/");
 623 BRCMF_FW_DEF(43455, "/*(DEBLOBBED)*/");
 624 BRCMF_FW_DEF(4354, "/*(DEBLOBBED)*/");
 625 BRCMF_FW_DEF(4356, "/*(DEBLOBBED)*/");
 626 BRCMF_FW_DEF(4373, "/*(DEBLOBBED)*/");
 627
 628 static const struct brcmf_firmware_mapping brcmf_sdio_fwnames[] = {
 629         BRCMF_FW_ENTRY(BRCM_CC_43143_CHIP_ID, 0xFFFFFFFF, 43143),
 630         BRCMF_FW_ENTRY(BRCM_CC_43241_CHIP_ID, 0x0000001F, 43241B0),
 631         BRCMF_FW_ENTRY(BRCM_CC_43241_CHIP_ID, 0x00000020, 43241B4),
 632         BRCMF_FW_ENTRY(BRCM_CC_43241_CHIP_ID, 0xFFFFFFC0, 43241B5),
 633         BRCMF_FW_ENTRY(BRCM_CC_4329_CHIP_ID, 0xFFFFFFFF, 4329),
 634         BRCMF_FW_ENTRY(BRCM_CC_4330_CHIP_ID, 0xFFFFFFFF, 4330),
 635         BRCMF_FW_ENTRY(BRCM_CC_4334_CHIP_ID, 0xFFFFFFFF, 4334),
 636         BRCMF_FW_ENTRY(BRCM_CC_43340_CHIP_ID, 0xFFFFFFFF, 43340),
 637         BRCMF_FW_ENTRY(BRCM_CC_43341_CHIP_ID, 0xFFFFFFFF, 43340),
 638         BRCMF_FW_ENTRY(BRCM_CC_4335_CHIP_ID, 0xFFFFFFFF, 4335),
 639         BRCMF_FW_ENTRY(BRCM_CC_43362_CHIP_ID, 0xFFFFFFFE, 43362),
 640         BRCMF_FW_ENTRY(BRCM_CC_4339_CHIP_ID, 0xFFFFFFFF, 4339),
 641         BRCMF_FW_ENTRY(BRCM_CC_43430_CHIP_ID, 0x00000001, 43430A0),
 642         BRCMF_FW_ENTRY(BRCM_CC_43430_CHIP_ID, 0xFFFFFFFE, 43430A1),
 643         BRCMF_FW_ENTRY(BRCM_CC_4345_CHIP_ID, 0xFFFFFFC0, 43455),
 644         BRCMF_FW_ENTRY(BRCM_CC_4354_CHIP_ID, 0xFFFFFFFF, 4354),
 645         BRCMF_FW_ENTRY(BRCM_CC_4356_CHIP_ID, 0xFFFFFFFF, 4356),
 646         BRCMF_FW_ENTRY(CY_CC_4373_CHIP_ID, 0xFFFFFFFF, 4373)
 647 };
 648
 649 static void pkt_align(struct sk_buff *p, int len, int align)
 650 {
 651         uint datalign;
 652         datalign = (unsigned long)(p->data);
 653         datalign = roundup(datalign, (align)) - datalign;
 654         if (datalign)
 655                 skb_pull(p, datalign);
 656         __skb_trim(p, len);
 657 }
 658
 659 /* To check if there's window offered */
 660 static bool data_ok(struct brcmf_sdio *bus)
 661 {
 662         return (u8)(bus->tx_max - bus->tx_seq) != 0 &&
 663                ((u8)(bus->tx_max - bus->tx_seq) & 0x80) == 0;
 664 }
 665
 666 static int
 667 brcmf_sdio_kso_control(struct brcmf_sdio *bus, bool on)
 668 {
 669         u8 wr_val = 0, rd_val, cmp_val, bmask;
 670         int err = 0;
 671         int err_cnt = 0;
 672         int try_cnt = 0;
 673
 674         brcmf_dbg(TRACE, "Enter: on=%d\n", on);
 675
 676         sdio_retune_crc_disable(bus->sdiodev->func1);
 677
 678         /* Cannot re-tune if device is asleep; defer till we're awake */
 679         if (on)
 680                 sdio_retune_hold_now(bus->sdiodev->func1);
 681
 682         wr_val = (on << SBSDIO_FUNC1_SLEEPCSR_KSO_SHIFT);
 683         /* 1st KSO write goes to AOS wake up core if device is asleep  */
 684         brcmf_sdiod_writeb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR, wr_val, &err);
 685
 686         if (on) {
 687                 /* device WAKEUP through KSO:
 688                  * write bit 0 & read back until
 689                  * both bits 0 (kso bit) & 1 (dev on status) are set
 690                  */
 691                 cmp_val = SBSDIO_FUNC1_SLEEPCSR_KSO_MASK |
 692                           SBSDIO_FUNC1_SLEEPCSR_DEVON_MASK;
 693                 bmask = cmp_val;
 694                 usleep_range(2000, 3000);
 695         } else {
 696                 /* Put device to sleep, turn off KSO */
 697                 cmp_val = 0;
 698                 /* only check for bit0, bit1(dev on status) may not
 699                  * get cleared right away
 700                  */
 701                 bmask = SBSDIO_FUNC1_SLEEPCSR_KSO_MASK;
 702         }
 703
 704         do {
 705                 /* reliable KSO bit set/clr:
 706                  * the sdiod sleep write access is synced to PMU 32khz clk
 707                  * just one write attempt may fail,
 708                  * read it back until it matches written value
 709                  */
 710                 rd_val = brcmf_sdiod_readb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR,
 711                                            &err);
 712                 if (!err) {
 713                         if ((rd_val & bmask) == cmp_val)
 714                                 break;
 715                         err_cnt = 0;
 716                 }
 717                 /* bail out upon subsequent access errors */
 718                 if (err && (err_cnt++ > BRCMF_SDIO_MAX_ACCESS_ERRORS))
 719                         break;
 720
 721                 udelay(KSO_WAIT_US);
 722                 brcmf_sdiod_writeb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR, wr_val,
 723                                    &err);
 724
 725         } while (try_cnt++ < MAX_KSO_ATTEMPTS);
 726
 727         if (try_cnt > 2)
 728                 brcmf_dbg(SDIO, "try_cnt=%d rd_val=0x%x err=%d\n", try_cnt,
 729                           rd_val, err);
 730
 731         if (try_cnt > MAX_KSO_ATTEMPTS)
 732                 brcmf_err("max tries: rd_val=0x%x err=%d\n", rd_val, err);
 733
 734         if (on)
 735                 sdio_retune_release(bus->sdiodev->func1);
 736
 737         sdio_retune_crc_enable(bus->sdiodev->func1);
 738
 739         return err;
 740 }
 741
 742 #define HOSTINTMASK             (I_HMB_SW_MASK | I_CHIPACTIVE)
 743
 744 /* Turn backplane clock on or off */
 745 static int brcmf_sdio_htclk(struct brcmf_sdio *bus, bool on, bool pendok)
 746 {
 747         int err;
 748         u8 clkctl, clkreq, devctl;
 749         unsigned long timeout;
 750
 751         brcmf_dbg(SDIO, "Enter\n");
 752
 753         clkctl = 0;
 754
 755         if (bus->sr_enabled) {
 756                 bus->clkstate = (on ? CLK_AVAIL : CLK_SDONLY);
 757                 return 0;
 758         }
 759
 760         if (on) {
 761                 /* Request HT Avail */
 762                 clkreq =
 763                     bus->alp_only ? SBSDIO_ALP_AVAIL_REQ : SBSDIO_HT_AVAIL_REQ;
 764
 765                 brcmf_sdiod_writeb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
 766                                    clkreq, &err);
 767                 if (err) {
 768                         brcmf_err("HT Avail request error: %d\n", err);
 769                         return -EBADE;
 770                 }
 771
 772                 /* Check current status */
 773                 clkctl = brcmf_sdiod_readb(bus->sdiodev,
 774                                            SBSDIO_FUNC1_CHIPCLKCSR, &err);
 775                 if (err) {
 776                         brcmf_err("HT Avail read error: %d\n", err);
 777                         return -EBADE;
 778                 }
 779
 780                 /* Go to pending and await interrupt if appropriate */
 781                 if (!SBSDIO_CLKAV(clkctl, bus->alp_only) && pendok) {
 782                         /* Allow only clock-available interrupt */
 783                         devctl = brcmf_sdiod_readb(bus->sdiodev,
 784                                                    SBSDIO_DEVICE_CTL, &err);
 785                         if (err) {
 786                                 brcmf_err("Devctl error setting CA: %d\n", err);
 787                                 return -EBADE;
 788                         }
 789
 790                         devctl |= SBSDIO_DEVCTL_CA_INT_ONLY;
 791                         brcmf_sdiod_writeb(bus->sdiodev, SBSDIO_DEVICE_CTL,
 792                                            devctl, &err);
 793                         brcmf_dbg(SDIO, "CLKCTL: set PENDING\n");
 794                         bus->clkstate = CLK_PENDING;
 795
 796                         return 0;
 797                 } else if (bus->clkstate == CLK_PENDING) {
 798                         /* Cancel CA-only interrupt filter */
 799                         devctl = brcmf_sdiod_readb(bus->sdiodev,
 800                                                    SBSDIO_DEVICE_CTL, &err);
 801                         devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY;
 802                         brcmf_sdiod_writeb(bus->sdiodev, SBSDIO_DEVICE_CTL,
 803                                            devctl, &err);
 804                 }
 805
 806                 /* Otherwise, wait here (polling) for HT Avail */
 807                 timeout = jiffies +
 808                           msecs_to_jiffies(PMU_MAX_TRANSITION_DLY/1000);
 809                 while (!SBSDIO_CLKAV(clkctl, bus->alp_only)) {
 810                         clkctl = brcmf_sdiod_readb(bus->sdiodev,
 811                                                    SBSDIO_FUNC1_CHIPCLKCSR,
 812                                                    &err);
 813                         if (time_after(jiffies, timeout))
 814                                 break;
 815                         else
 816                                 usleep_range(5000, 10000);
 817                 }
 818                 if (err) {
 819                         brcmf_err("HT Avail request error: %d\n", err);
 820                         return -EBADE;
 821                 }
 822                 if (!SBSDIO_CLKAV(clkctl, bus->alp_only)) {
 823                         brcmf_err("HT Avail timeout (%d): clkctl 0x%02x\n",
 824                                   PMU_MAX_TRANSITION_DLY, clkctl);
 825                         return -EBADE;
 826                 }
 827
 828                 /* Mark clock available */
 829                 bus->clkstate = CLK_AVAIL;
 830                 brcmf_dbg(SDIO, "CLKCTL: turned ON\n");
 831
 832 #if defined(DEBUG)
 833                 if (!bus->alp_only) {
 834                         if (SBSDIO_ALPONLY(clkctl))
 835                                 brcmf_err("HT Clock should be on\n");
 836                 }
 837 #endif                          /* defined (DEBUG) */
 838
 839         } else {
 840                 clkreq = 0;
 841
 842                 if (bus->clkstate == CLK_PENDING) {
 843                         /* Cancel CA-only interrupt filter */
 844                         devctl = brcmf_sdiod_readb(bus->sdiodev,
 845                                                    SBSDIO_DEVICE_CTL, &err);
 846                         devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY;
 847                         brcmf_sdiod_writeb(bus->sdiodev, SBSDIO_DEVICE_CTL,
 848                                            devctl, &err);
 849                 }
 850
 851                 bus->clkstate = CLK_SDONLY;
 852                 brcmf_sdiod_writeb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
 853                                    clkreq, &err);
 854                 brcmf_dbg(SDIO, "CLKCTL: turned OFF\n");
 855                 if (err) {
 856                         brcmf_err("Failed access turning clock off: %d\n",
 857                                   err);
 858                         return -EBADE;
 859                 }
 860         }
 861         return 0;
 862 }
 863
 864 /* Change idle/active SD state */
 865 static int brcmf_sdio_sdclk(struct brcmf_sdio *bus, bool on)
 866 {
 867         brcmf_dbg(SDIO, "Enter\n");
 868
 869         if (on)
 870                 bus->clkstate = CLK_SDONLY;
 871         else
 872                 bus->clkstate = CLK_NONE;
 873
 874         return 0;
 875 }
 876
 877 /* Transition SD and backplane clock readiness */
 878 static int brcmf_sdio_clkctl(struct brcmf_sdio *bus, uint target, bool pendok)
 879 {
 880 #ifdef DEBUG
 881         uint oldstate = bus->clkstate;
 882 #endif                          /* DEBUG */
 883
 884         brcmf_dbg(SDIO, "Enter\n");
 885
 886         /* Early exit if we're already there */
 887         if (bus->clkstate == target)
 888                 return 0;
 889
 890         switch (target) {
 891         case CLK_AVAIL:
 892                 /* Make sure SD clock is available */
 893                 if (bus->clkstate == CLK_NONE)
 894                         brcmf_sdio_sdclk(bus, true);
 895                 /* Now request HT Avail on the backplane */
 896                 brcmf_sdio_htclk(bus, true, pendok);
 897                 break;
 898
 899         case CLK_SDONLY:
 900                 /* Remove HT request, or bring up SD clock */
 901                 if (bus->clkstate == CLK_NONE)
 902                         brcmf_sdio_sdclk(bus, true);
 903                 else if (bus->clkstate == CLK_AVAIL)
 904                         brcmf_sdio_htclk(bus, false, false);
 905                 else
 906                         brcmf_err("request for %d -> %d\n",
 907                                   bus->clkstate, target);
 908                 break;
 909
 910         case CLK_NONE:
 911                 /* Make sure to remove HT request */
 912                 if (bus->clkstate == CLK_AVAIL)
 913                         brcmf_sdio_htclk(bus, false, false);
 914                 /* Now remove the SD clock */
 915                 brcmf_sdio_sdclk(bus, false);
 916                 break;
 917         }
 918 #ifdef DEBUG
 919         brcmf_dbg(SDIO, "%d -> %d\n", oldstate, bus->clkstate);
 920 #endif                          /* DEBUG */
 921
 922         return 0;
 923 }
 924
 925 static int
 926 brcmf_sdio_bus_sleep(struct brcmf_sdio *bus, bool sleep, bool pendok)
 927 {
 928         int err = 0;
 929         u8 clkcsr;
 930
 931         brcmf_dbg(SDIO, "Enter: request %s currently %s\n",
 932                   (sleep ? "SLEEP" : "WAKE"),
 933                   (bus->sleeping ? "SLEEP" : "WAKE"));
 934
 935         /* If SR is enabled control bus state with KSO */
 936         if (bus->sr_enabled) {
 937                 /* Done if we're already in the requested state */
 938                 if (sleep == bus->sleeping)
 939                         goto end;
 940
 941                 /* Going to sleep */
 942                 if (sleep) {
 943                         clkcsr = brcmf_sdiod_readb(bus->sdiodev,
 944                                                    SBSDIO_FUNC1_CHIPCLKCSR,
 945                                                    &err);
 946                         if ((clkcsr & SBSDIO_CSR_MASK) == 0) {
 947                                 brcmf_dbg(SDIO, "no clock, set ALP\n");
 948                                 brcmf_sdiod_writeb(bus->sdiodev,
 949                                                    SBSDIO_FUNC1_CHIPCLKCSR,
 950                                                    SBSDIO_ALP_AVAIL_REQ, &err);
 951                         }
 952                         err = brcmf_sdio_kso_control(bus, false);
 953                 } else {
 954                         err = brcmf_sdio_kso_control(bus, true);
 955                 }
 956                 if (err) {
 957                         brcmf_err("error while changing bus sleep state %d\n",
 958                                   err);
 959                         goto done;
 960                 }
 961         }
 962
 963 end:
 964         /* control clocks */
 965         if (sleep) {
 966                 if (!bus->sr_enabled)
 967                         brcmf_sdio_clkctl(bus, CLK_NONE, pendok);
 968         } else {
 969                 brcmf_sdio_clkctl(bus, CLK_AVAIL, pendok);
 970                 brcmf_sdio_wd_timer(bus, true);
 971         }
 972         bus->sleeping = sleep;
 973         brcmf_dbg(SDIO, "new state %s\n",
 974                   (sleep ? "SLEEP" : "WAKE"));
 975 done:
 976         brcmf_dbg(SDIO, "Exit: err=%d\n", err);
 977         return err;
 978
 979 }
 980
 981 #ifdef DEBUG
 982 static inline bool brcmf_sdio_valid_shared_address(u32 addr)
 983 {
 984         return !(addr == 0 || ((~addr >> 16) & 0xffff) == (addr & 0xffff));
 985 }
 986
 987 static int brcmf_sdio_readshared(struct brcmf_sdio *bus,
 988                                  struct sdpcm_shared *sh)
 989 {
 990         u32 addr = 0;
 991         int rv;
 992         u32 shaddr = 0;
 993         struct sdpcm_shared_le sh_le;
 994         __le32 addr_le;
 995
 996         sdio_claim_host(bus->sdiodev->func1);
 997         brcmf_sdio_bus_sleep(bus, false, false);
 998
 999         /*
1000          * Read last word in socram to determine
1001          * address of sdpcm_shared structure
1002          */
1003         shaddr = bus->ci->rambase + bus->ci->ramsize - 4;
1004         if (!bus->ci->rambase && brcmf_chip_sr_capable(bus->ci))
1005                 shaddr -= bus->ci->srsize;
1006         rv = brcmf_sdiod_ramrw(bus->sdiodev, false, shaddr,
1007                                (u8 *)&addr_le, 4);
1008         if (rv < 0)
1009                 goto fail;
1010
1011         /*
1012          * Check if addr is valid.
1013          * NVRAM length at the end of memory should have been overwritten.
1014          */
1015         addr = le32_to_cpu(addr_le);
1016         if (!brcmf_sdio_valid_shared_address(addr)) {
1017                 brcmf_err("invalid sdpcm_shared address 0x%08X\n", addr);
1018                 rv = -EINVAL;
1019                 goto fail;
1020         }
1021
1022         brcmf_dbg(INFO, "sdpcm_shared address 0x%08X\n", addr);
1023
1024         /* Read hndrte_shared structure */
1025         rv = brcmf_sdiod_ramrw(bus->sdiodev, false, addr, (u8 *)&sh_le,
1026                                sizeof(struct sdpcm_shared_le));
1027         if (rv < 0)
1028                 goto fail;
1029
1030         sdio_release_host(bus->sdiodev->func1);
1031
1032         /* Endianness */
1033         sh->flags = le32_to_cpu(sh_le.flags);
1034         sh->trap_addr = le32_to_cpu(sh_le.trap_addr);
1035         sh->assert_exp_addr = le32_to_cpu(sh_le.assert_exp_addr);
1036         sh->assert_file_addr = le32_to_cpu(sh_le.assert_file_addr);
1037         sh->assert_line = le32_to_cpu(sh_le.assert_line);
1038         sh->console_addr = le32_to_cpu(sh_le.console_addr);
1039         sh->msgtrace_addr = le32_to_cpu(sh_le.msgtrace_addr);
1040
1041         if ((sh->flags & SDPCM_SHARED_VERSION_MASK) > SDPCM_SHARED_VERSION) {
1042                 brcmf_err("sdpcm shared version unsupported: dhd %d dongle %d\n",
1043                           SDPCM_SHARED_VERSION,
1044                           sh->flags & SDPCM_SHARED_VERSION_MASK);
1045                 return -EPROTO;
1046         }
1047         return 0;
1048
1049 fail:
1050         brcmf_err("unable to obtain sdpcm_shared info: rv=%d (addr=0x%x)\n",
1051                   rv, addr);
1052         sdio_release_host(bus->sdiodev->func1);
1053         return rv;
1054 }
1055
1056 static void brcmf_sdio_get_console_addr(struct brcmf_sdio *bus)
1057 {
1058         struct sdpcm_shared sh;
1059
1060         if (brcmf_sdio_readshared(bus, &sh) == 0)
1061                 bus->console_addr = sh.console_addr;
1062 }
1063 #else
1064 static void brcmf_sdio_get_console_addr(struct brcmf_sdio *bus)
1065 {
1066 }
1067 #endif /* DEBUG */
1068
1069 static u32 brcmf_sdio_hostmail(struct brcmf_sdio *bus)
1070 {
1071         struct brcmf_sdio_dev *sdiod = bus->sdiodev;
1072         struct brcmf_core *core = bus->sdio_core;
1073         u32 intstatus = 0;
1074         u32 hmb_data;
1075         u8 fcbits;
1076         int ret;
1077
1078         brcmf_dbg(SDIO, "Enter\n");
1079
1080         /* Read mailbox data and ack that we did so */
1081         hmb_data = brcmf_sdiod_readl(sdiod,
1082                                      core->base + SD_REG(tohostmailboxdata),
1083                                      &ret);
1084
1085         if (!ret)
1086                 brcmf_sdiod_writel(sdiod, core->base + SD_REG(tosbmailbox),
1087                                    SMB_INT_ACK, &ret);
1088
1089         bus->sdcnt.f1regdata += 2;
1090
1091         /* dongle indicates the firmware has halted/crashed */
1092         if (hmb_data & HMB_DATA_FWHALT) {
1093                 brcmf_err("mailbox indicates firmware halted\n");
1094                 brcmf_dev_coredump(&sdiod->func1->dev);
1095         }
1096
1097         /* Dongle recomposed rx frames, accept them again */
1098         if (hmb_data & HMB_DATA_NAKHANDLED) {
1099                 brcmf_dbg(SDIO, "Dongle reports NAK handled, expect rtx of %d\n",
1100                           bus->rx_seq);
1101                 if (!bus->rxskip)
1102                         brcmf_err("unexpected NAKHANDLED!\n");
1103
1104                 bus->rxskip = false;
1105                 intstatus |= I_HMB_FRAME_IND;
1106         }
1107
1108         /*
1109          * DEVREADY does not occur with gSPI.
1110          */
1111         if (hmb_data & (HMB_DATA_DEVREADY | HMB_DATA_FWREADY)) {
1112                 bus->sdpcm_ver =
1113                     (hmb_data & HMB_DATA_VERSION_MASK) >>
1114                     HMB_DATA_VERSION_SHIFT;
1115                 if (bus->sdpcm_ver != SDPCM_PROT_VERSION)
1116                         brcmf_err("Version mismatch, dongle reports %d, "
1117                                   "expecting %d\n",
1118                                   bus->sdpcm_ver, SDPCM_PROT_VERSION);
1119                 else
1120                         brcmf_dbg(SDIO, "Dongle ready, protocol version %d\n",
1121                                   bus->sdpcm_ver);
1122
1123                 /*
1124                  * Retrieve console state address now that firmware should have
1125                  * updated it.
1126                  */
1127                 brcmf_sdio_get_console_addr(bus);
1128         }
1129
1130         /*
1131          * Flow Control has been moved into the RX headers and this out of band
1132          * method isn't used any more.
1133          * remaining backward compatible with older dongles.
1134          */
1135         if (hmb_data & HMB_DATA_FC) {
1136                 fcbits = (hmb_data & HMB_DATA_FCDATA_MASK) >>
1137                                                         HMB_DATA_FCDATA_SHIFT;
1138
1139                 if (fcbits & ~bus->flowcontrol)
1140                         bus->sdcnt.fc_xoff++;
1141
1142                 if (bus->flowcontrol & ~fcbits)
1143                         bus->sdcnt.fc_xon++;
1144
1145                 bus->sdcnt.fc_rcvd++;
1146                 bus->flowcontrol = fcbits;
1147         }
1148
1149         /* Shouldn't be any others */
1150         if (hmb_data & ~(HMB_DATA_DEVREADY |
1151                          HMB_DATA_NAKHANDLED |
1152                          HMB_DATA_FC |
1153                          HMB_DATA_FWREADY |
1154                          HMB_DATA_FWHALT |
1155                          HMB_DATA_FCDATA_MASK | HMB_DATA_VERSION_MASK))
1156                 brcmf_err("Unknown mailbox data content: 0x%02x\n",
1157                           hmb_data);
1158
1159         return intstatus;
1160 }
1161
1162 static void brcmf_sdio_rxfail(struct brcmf_sdio *bus, bool abort, bool rtx)
1163 {
1164         struct brcmf_sdio_dev *sdiod = bus->sdiodev;
1165         struct brcmf_core *core = bus->sdio_core;
1166         uint retries = 0;
1167         u16 lastrbc;
1168         u8 hi, lo;
1169         int err;
1170
1171         brcmf_err("%sterminate frame%s\n",
1172                   abort ? "abort command, " : "",
1173                   rtx ? ", send NAK" : "");
1174
1175         if (abort)
1176                 brcmf_sdiod_abort(bus->sdiodev, bus->sdiodev->func2);
1177
1178         brcmf_sdiod_writeb(bus->sdiodev, SBSDIO_FUNC1_FRAMECTRL, SFC_RF_TERM,
1179                            &err);
1180         bus->sdcnt.f1regdata++;
1181
1182         /* Wait until the packet has been flushed (device/FIFO stable) */
1183         for (lastrbc = retries = 0xffff; retries > 0; retries--) {
1184                 hi = brcmf_sdiod_readb(bus->sdiodev, SBSDIO_FUNC1_RFRAMEBCHI,
1185                                        &err);
1186                 lo = brcmf_sdiod_readb(bus->sdiodev, SBSDIO_FUNC1_RFRAMEBCLO,
1187                                        &err);
1188                 bus->sdcnt.f1regdata += 2;
1189
1190                 if ((hi == 0) && (lo == 0))
1191                         break;
1192
1193                 if ((hi > (lastrbc >> 8)) && (lo > (lastrbc & 0x00ff))) {
1194                         brcmf_err("count growing: last 0x%04x now 0x%04x\n",
1195                                   lastrbc, (hi << 8) + lo);
1196                 }
1197                 lastrbc = (hi << 8) + lo;
1198         }
1199
1200         if (!retries)
1201                 brcmf_err("count never zeroed: last 0x%04x\n", lastrbc);
1202         else
1203                 brcmf_dbg(SDIO, "flush took %d iterations\n", 0xffff - retries);
1204
1205         if (rtx) {
1206                 bus->sdcnt.rxrtx++;
1207                 brcmf_sdiod_writel(sdiod, core->base + SD_REG(tosbmailbox),
1208                                    SMB_NAK, &err);
1209
1210                 bus->sdcnt.f1regdata++;
1211                 if (err == 0)
1212                         bus->rxskip = true;
1213         }
1214
1215         /* Clear partial in any case */
1216         bus->cur_read.len = 0;
1217 }
1218
1219 static void brcmf_sdio_txfail(struct brcmf_sdio *bus)
1220 {
1221         struct brcmf_sdio_dev *sdiodev = bus->sdiodev;
1222         u8 i, hi, lo;
1223
1224         /* On failure, abort the command and terminate the frame */
1225         brcmf_err("sdio error, abort command and terminate frame\n");
1226         bus->sdcnt.tx_sderrs++;
1227
1228         brcmf_sdiod_abort(sdiodev, sdiodev->func2);
1229         brcmf_sdiod_writeb(sdiodev, SBSDIO_FUNC1_FRAMECTRL, SFC_WF_TERM, NULL);
1230         bus->sdcnt.f1regdata++;
1231
1232         for (i = 0; i < 3; i++) {
1233                 hi = brcmf_sdiod_readb(sdiodev, SBSDIO_FUNC1_WFRAMEBCHI, NULL);
1234                 lo = brcmf_sdiod_readb(sdiodev, SBSDIO_FUNC1_WFRAMEBCLO, NULL);
1235                 bus->sdcnt.f1regdata += 2;
1236                 if ((hi == 0) && (lo == 0))
1237                         break;
1238         }
1239 }
1240
1241 /* return total length of buffer chain */
1242 static uint brcmf_sdio_glom_len(struct brcmf_sdio *bus)
1243 {
1244         struct sk_buff *p;
1245         uint total;
1246
1247         total = 0;
1248         skb_queue_walk(&bus->glom, p)
1249                 total += p->len;
1250         return total;
1251 }
1252
1253 static void brcmf_sdio_free_glom(struct brcmf_sdio *bus)
1254 {
1255         struct sk_buff *cur, *next;
1256
1257         skb_queue_walk_safe(&bus->glom, cur, next) {
1258                 skb_unlink(cur, &bus->glom);
1259                 brcmu_pkt_buf_free_skb(cur);
1260         }
1261 }
1262
1263 /**
1264  * brcmfmac sdio bus specific header
1265  * This is the lowest layer header wrapped on the packets transmitted between
1266  * host and WiFi dongle which contains information needed for SDIO core and
1267  * firmware
1268  *
1269  * It consists of 3 parts: hardware header, hardware extension header and
1270  * software header
1271  * hardware header (frame tag) - 4 bytes
1272  * Byte 0~1: Frame length
1273  * Byte 2~3: Checksum, bit-wise inverse of frame length
1274  * hardware extension header - 8 bytes
1275  * Tx glom mode only, N/A for Rx or normal Tx
1276  * Byte 0~1: Packet length excluding hw frame tag
1277  * Byte 2: Reserved
1278  * Byte 3: Frame flags, bit 0: last frame indication
1279  * Byte 4~5: Reserved
1280  * Byte 6~7: Tail padding length
1281  * software header - 8 bytes
1282  * Byte 0: Rx/Tx sequence number
1283  * Byte 1: 4 MSB Channel number, 4 LSB arbitrary flag
1284  * Byte 2: Length of next data frame, reserved for Tx
1285  * Byte 3: Data offset
1286  * Byte 4: Flow control bits, reserved for Tx
1287  * Byte 5: Maximum Sequence number allowed by firmware for Tx, N/A for Tx packet
1288  * Byte 6~7: Reserved
1289  */
1290 #define SDPCM_HWHDR_LEN                 4
1291 #define SDPCM_HWEXT_LEN                 8
1292 #define SDPCM_SWHDR_LEN                 8
1293 #define SDPCM_HDRLEN                    (SDPCM_HWHDR_LEN + SDPCM_SWHDR_LEN)
1294 /* software header */
1295 #define SDPCM_SEQ_MASK                  0x000000ff
1296 #define SDPCM_SEQ_WRAP                  256
1297 #define SDPCM_CHANNEL_MASK              0x00000f00
1298 #define SDPCM_CHANNEL_SHIFT             8
1299 #define SDPCM_CONTROL_CHANNEL           0       /* Control */
1300 #define SDPCM_EVENT_CHANNEL             1       /* Asyc Event Indication */
1301 #define SDPCM_DATA_CHANNEL              2       /* Data Xmit/Recv */
1302 #define SDPCM_GLOM_CHANNEL              3       /* Coalesced packets */
1303 #define SDPCM_TEST_CHANNEL              15      /* Test/debug packets */
1304 #define SDPCM_GLOMDESC(p)               (((u8 *)p)[1] & 0x80)
1305 #define SDPCM_NEXTLEN_MASK              0x00ff0000
1306 #define SDPCM_NEXTLEN_SHIFT             16
1307 #define SDPCM_DOFFSET_MASK              0xff000000
1308 #define SDPCM_DOFFSET_SHIFT             24
1309 #define SDPCM_FCMASK_MASK               0x000000ff
1310 #define SDPCM_WINDOW_MASK               0x0000ff00
1311 #define SDPCM_WINDOW_SHIFT              8
1312
1313 static inline u8 brcmf_sdio_getdatoffset(u8 *swheader)
1314 {
1315         u32 hdrvalue;
1316         hdrvalue = *(u32 *)swheader;
1317         return (u8)((hdrvalue & SDPCM_DOFFSET_MASK) >> SDPCM_DOFFSET_SHIFT);
1318 }
1319
1320 static inline bool brcmf_sdio_fromevntchan(u8 *swheader)
1321 {
1322         u32 hdrvalue;
1323         u8 ret;
1324
1325         hdrvalue = *(u32 *)swheader;
1326         ret = (u8)((hdrvalue & SDPCM_CHANNEL_MASK) >> SDPCM_CHANNEL_SHIFT);
1327
1328         return (ret == SDPCM_EVENT_CHANNEL);
1329 }
1330
1331 static int brcmf_sdio_hdparse(struct brcmf_sdio *bus, u8 *header,
1332                               struct brcmf_sdio_hdrinfo *rd,
1333                               enum brcmf_sdio_frmtype type)
1334 {
1335         u16 len, checksum;
1336         u8 rx_seq, fc, tx_seq_max;
1337         u32 swheader;
1338
1339         trace_brcmf_sdpcm_hdr(SDPCM_RX, header);
1340
1341         /* hw header */
1342         len = get_unaligned_le16(header);
1343         checksum = get_unaligned_le16(header + sizeof(u16));
1344         /* All zero means no more to read */
1345         if (!(len | checksum)) {
1346                 bus->rxpending = false;
1347                 return -ENODATA;
1348         }
1349         if ((u16)(~(len ^ checksum))) {
1350                 brcmf_err("HW header checksum error\n");
1351                 bus->sdcnt.rx_badhdr++;
1352                 brcmf_sdio_rxfail(bus, false, false);
1353                 return -EIO;
1354         }
1355         if (len < SDPCM_HDRLEN) {
1356                 brcmf_err("HW header length error\n");
1357                 return -EPROTO;
1358         }
1359         if (type == BRCMF_SDIO_FT_SUPER &&
1360             (roundup(len, bus->blocksize) != rd->len)) {
1361                 brcmf_err("HW superframe header length error\n");
1362                 return -EPROTO;
1363         }
1364         if (type == BRCMF_SDIO_FT_SUB && len > rd->len) {
1365                 brcmf_err("HW subframe header length error\n");
1366                 return -EPROTO;
1367         }
1368         rd->len = len;
1369
1370         /* software header */
1371         header += SDPCM_HWHDR_LEN;
1372         swheader = le32_to_cpu(*(__le32 *)header);
1373         if (type == BRCMF_SDIO_FT_SUPER && SDPCM_GLOMDESC(header)) {
1374                 brcmf_err("Glom descriptor found in superframe head\n");
1375                 rd->len = 0;
1376                 return -EINVAL;
1377         }
1378         rx_seq = (u8)(swheader & SDPCM_SEQ_MASK);
1379         rd->channel = (swheader & SDPCM_CHANNEL_MASK) >> SDPCM_CHANNEL_SHIFT;
1380         if (len > MAX_RX_DATASZ && rd->channel != SDPCM_CONTROL_CHANNEL &&
1381             type != BRCMF_SDIO_FT_SUPER) {
1382                 brcmf_err("HW header length too long\n");
1383                 bus->sdcnt.rx_toolong++;
1384                 brcmf_sdio_rxfail(bus, false, false);
1385                 rd->len = 0;
1386                 return -EPROTO;
1387         }
1388         if (type == BRCMF_SDIO_FT_SUPER && rd->channel != SDPCM_GLOM_CHANNEL) {
1389                 brcmf_err("Wrong channel for superframe\n");
1390                 rd->len = 0;
1391                 return -EINVAL;
1392         }
1393         if (type == BRCMF_SDIO_FT_SUB && rd->channel != SDPCM_DATA_CHANNEL &&
1394             rd->channel != SDPCM_EVENT_CHANNEL) {
1395                 brcmf_err("Wrong channel for subframe\n");
1396                 rd->len = 0;
1397                 return -EINVAL;
1398         }
1399         rd->dat_offset = brcmf_sdio_getdatoffset(header);
1400         if (rd->dat_offset < SDPCM_HDRLEN || rd->dat_offset > rd->len) {
1401                 brcmf_err("seq %d: bad data offset\n", rx_seq);
1402                 bus->sdcnt.rx_badhdr++;
1403                 brcmf_sdio_rxfail(bus, false, false);
1404                 rd->len = 0;
1405                 return -ENXIO;
1406         }
1407         if (rd->seq_num != rx_seq) {
1408                 brcmf_dbg(SDIO, "seq %d, expected %d\n", rx_seq, rd->seq_num);
1409                 bus->sdcnt.rx_badseq++;
1410                 rd->seq_num = rx_seq;
1411         }
1412         /* no need to check the reset for subframe */
1413         if (type == BRCMF_SDIO_FT_SUB)
1414                 return 0;
1415         rd->len_nxtfrm = (swheader & SDPCM_NEXTLEN_MASK) >> SDPCM_NEXTLEN_SHIFT;
1416         if (rd->len_nxtfrm << 4 > MAX_RX_DATASZ) {
1417                 /* only warm for NON glom packet */
1418                 if (rd->channel != SDPCM_GLOM_CHANNEL)
1419                         brcmf_err("seq %d: next length error\n", rx_seq);
1420                 rd->len_nxtfrm = 0;
1421         }
1422         swheader = le32_to_cpu(*(__le32 *)(header + 4));
1423         fc = swheader & SDPCM_FCMASK_MASK;
1424         if (bus->flowcontrol != fc) {
1425                 if (~bus->flowcontrol & fc)
1426                         bus->sdcnt.fc_xoff++;
1427                 if (bus->flowcontrol & ~fc)
1428                         bus->sdcnt.fc_xon++;
1429                 bus->sdcnt.fc_rcvd++;
1430                 bus->flowcontrol = fc;
1431         }
1432         tx_seq_max = (swheader & SDPCM_WINDOW_MASK) >> SDPCM_WINDOW_SHIFT;
1433         if ((u8)(tx_seq_max - bus->tx_seq) > 0x40) {
1434                 brcmf_err("seq %d: max tx seq number error\n", rx_seq);
1435                 tx_seq_max = bus->tx_seq + 2;
1436         }
1437         bus->tx_max = tx_seq_max;
1438
1439         return 0;
1440 }
1441
1442 static inline void brcmf_sdio_update_hwhdr(u8 *header, u16 frm_length)
1443 {
1444         *(__le16 *)header = cpu_to_le16(frm_length);
1445         *(((__le16 *)header) + 1) = cpu_to_le16(~frm_length);
1446 }
1447
1448 static void brcmf_sdio_hdpack(struct brcmf_sdio *bus, u8 *header,
1449                               struct brcmf_sdio_hdrinfo *hd_info)
1450 {
1451         u32 hdrval;
1452         u8 hdr_offset;
1453
1454         brcmf_sdio_update_hwhdr(header, hd_info->len);
1455         hdr_offset = SDPCM_HWHDR_LEN;
1456
1457         if (bus->txglom) {
1458                 hdrval = (hd_info->len - hdr_offset) | (hd_info->lastfrm << 24);
1459                 *((__le32 *)(header + hdr_offset)) = cpu_to_le32(hdrval);
1460                 hdrval = (u16)hd_info->tail_pad << 16;
1461                 *(((__le32 *)(header + hdr_offset)) + 1) = cpu_to_le32(hdrval);
1462                 hdr_offset += SDPCM_HWEXT_LEN;
1463         }
1464
1465         hdrval = hd_info->seq_num;
1466         hdrval |= (hd_info->channel << SDPCM_CHANNEL_SHIFT) &
1467                   SDPCM_CHANNEL_MASK;
1468         hdrval |= (hd_info->dat_offset << SDPCM_DOFFSET_SHIFT) &
1469                   SDPCM_DOFFSET_MASK;
1470         *((__le32 *)(header + hdr_offset)) = cpu_to_le32(hdrval);
1471         *(((__le32 *)(header + hdr_offset)) + 1) = 0;
1472         trace_brcmf_sdpcm_hdr(SDPCM_TX + !!(bus->txglom), header);
1473 }
1474
1475 static u8 brcmf_sdio_rxglom(struct brcmf_sdio *bus, u8 rxseq)
1476 {
1477         u16 dlen, totlen;
1478         u8 *dptr, num = 0;
1479         u16 sublen;
1480         struct sk_buff *pfirst, *pnext;
1481
1482         int errcode;
1483         u8 doff, sfdoff;
1484
1485         struct brcmf_sdio_hdrinfo rd_new;
1486
1487         /* If packets, issue read(s) and send up packet chain */
1488         /* Return sequence numbers consumed? */
1489
1490         brcmf_dbg(SDIO, "start: glomd %p glom %p\n",
1491                   bus->glomd, skb_peek(&bus->glom));
1492
1493         /* If there's a descriptor, generate the packet chain */
1494         if (bus->glomd) {
1495                 pfirst = pnext = NULL;
1496                 dlen = (u16) (bus->glomd->len);
1497                 dptr = bus->glomd->data;
1498                 if (!dlen || (dlen & 1)) {
1499                         brcmf_err("bad glomd len(%d), ignore descriptor\n",
1500                                   dlen);
1501                         dlen = 0;
1502                 }
1503
1504                 for (totlen = num = 0; dlen; num++) {
1505                         /* Get (and move past) next length */
1506                         sublen = get_unaligned_le16(dptr);
1507                         dlen -= sizeof(u16);
1508                         dptr += sizeof(u16);
1509                         if ((sublen < SDPCM_HDRLEN) ||
1510                             ((num == 0) && (sublen < (2 * SDPCM_HDRLEN)))) {
1511                                 brcmf_err("descriptor len %d bad: %d\n",
1512                                           num, sublen);
1513                                 pnext = NULL;
1514                                 break;
1515                         }
1516                         if (sublen % bus->sgentry_align) {
1517                                 brcmf_err("sublen %d not multiple of %d\n",
1518                                           sublen, bus->sgentry_align);
1519                         }
1520                         totlen += sublen;
1521
1522                         /* For last frame, adjust read len so total
1523                                  is a block multiple */
1524                         if (!dlen) {
1525                                 sublen +=
1526                                     (roundup(totlen, bus->blocksize) - totlen);
1527                                 totlen = roundup(totlen, bus->blocksize);
1528                         }
1529
1530                         /* Allocate/chain packet for next subframe */
1531                         pnext = brcmu_pkt_buf_get_skb(sublen + bus->sgentry_align);
1532                         if (pnext == NULL) {
1533                                 brcmf_err("bcm_pkt_buf_get_skb failed, num %d len %d\n",
1534                                           num, sublen);
1535                                 break;
1536                         }
1537                         skb_queue_tail(&bus->glom, pnext);
1538
1539                         /* Adhere to start alignment requirements */
1540                         pkt_align(pnext, sublen, bus->sgentry_align);
1541                 }
1542
1543                 /* If all allocations succeeded, save packet chain
1544                          in bus structure */
1545                 if (pnext) {
1546                         brcmf_dbg(GLOM, "allocated %d-byte packet chain for %d subframes\n",
1547                                   totlen, num);
1548                         if (BRCMF_GLOM_ON() && bus->cur_read.len &&
1549                             totlen != bus->cur_read.len) {
1550                                 brcmf_dbg(GLOM, "glomdesc mismatch: nextlen %d glomdesc %d rxseq %d\n",
1551                                           bus->cur_read.len, totlen, rxseq);
1552                         }
1553                         pfirst = pnext = NULL;
1554                 } else {
1555                         brcmf_sdio_free_glom(bus);
1556                         num = 0;
1557                 }
1558
1559                 /* Done with descriptor packet */
1560                 brcmu_pkt_buf_free_skb(bus->glomd);
1561                 bus->glomd = NULL;
1562                 bus->cur_read.len = 0;
1563         }
1564
1565         /* Ok -- either we just generated a packet chain,
1566                  or had one from before */
1567         if (!skb_queue_empty(&bus->glom)) {
1568                 if (BRCMF_GLOM_ON()) {
1569                         brcmf_dbg(GLOM, "try superframe read, packet chain:\n");
1570                         skb_queue_walk(&bus->glom, pnext) {
1571                                 brcmf_dbg(GLOM, "    %p: %p len 0x%04x (%d)\n",
1572                                           pnext, (u8 *) (pnext->data),
1573                                           pnext->len, pnext->len);
1574                         }
1575                 }
1576
1577                 pfirst = skb_peek(&bus->glom);
1578                 dlen = (u16) brcmf_sdio_glom_len(bus);
1579
1580                 /* Do an SDIO read for the superframe.  Configurable iovar to
1581                  * read directly into the chained packet, or allocate a large
1582                  * packet and and copy into the chain.
1583                  */
1584                 sdio_claim_host(bus->sdiodev->func1);
1585                 errcode = brcmf_sdiod_recv_chain(bus->sdiodev,
1586                                                  &bus->glom, dlen);
1587                 sdio_release_host(bus->sdiodev->func1);
1588                 bus->sdcnt.f2rxdata++;
1589
1590                 /* On failure, kill the superframe */
1591                 if (errcode < 0) {
1592                         brcmf_err("glom read of %d bytes failed: %d\n",
1593                                   dlen, errcode);
1594
1595                         sdio_claim_host(bus->sdiodev->func1);
1596                         brcmf_sdio_rxfail(bus, true, false);
1597                         bus->sdcnt.rxglomfail++;
1598                         brcmf_sdio_free_glom(bus);
1599                         sdio_release_host(bus->sdiodev->func1);
1600                         return 0;
1601                 }
1602
1603                 brcmf_dbg_hex_dump(BRCMF_GLOM_ON(),
1604                                    pfirst->data, min_t(int, pfirst->len, 48),
1605                                    "SUPERFRAME:\n");
1606
1607                 rd_new.seq_num = rxseq;
1608                 rd_new.len = dlen;
1609                 sdio_claim_host(bus->sdiodev->func1);
1610                 errcode = brcmf_sdio_hdparse(bus, pfirst->data, &rd_new,
1611                                              BRCMF_SDIO_FT_SUPER);
1612                 sdio_release_host(bus->sdiodev->func1);
1613                 bus->cur_read.len = rd_new.len_nxtfrm << 4;
1614
1615                 /* Remove superframe header, remember offset */
1616                 skb_pull(pfirst, rd_new.dat_offset);
1617                 sfdoff = rd_new.dat_offset;
1618                 num = 0;
1619
1620                 /* Validate all the subframe headers */
1621                 skb_queue_walk(&bus->glom, pnext) {
1622                         /* leave when invalid subframe is found */
1623                         if (errcode)
1624                                 break;
1625
1626                         rd_new.len = pnext->len;
1627                         rd_new.seq_num = rxseq++;
1628                         sdio_claim_host(bus->sdiodev->func1);
1629                         errcode = brcmf_sdio_hdparse(bus, pnext->data, &rd_new,
1630                                                      BRCMF_SDIO_FT_SUB);
1631                         sdio_release_host(bus->sdiodev->func1);
1632                         brcmf_dbg_hex_dump(BRCMF_GLOM_ON(),
1633                                            pnext->data, 32, "subframe:\n");
1634
1635                         num++;
1636                 }
1637
1638                 if (errcode) {
1639                         /* Terminate frame on error */
1640                         sdio_claim_host(bus->sdiodev->func1);
1641                         brcmf_sdio_rxfail(bus, true, false);
1642                         bus->sdcnt.rxglomfail++;
1643                         brcmf_sdio_free_glom(bus);
1644                         sdio_release_host(bus->sdiodev->func1);
1645                         bus->cur_read.len = 0;
1646                         return 0;
1647                 }
1648
1649                 /* Basic SD framing looks ok - process each packet (header) */
1650
1651                 skb_queue_walk_safe(&bus->glom, pfirst, pnext) {
1652                         dptr = (u8 *) (pfirst->data);
1653                         sublen = get_unaligned_le16(dptr);
1654                         doff = brcmf_sdio_getdatoffset(&dptr[SDPCM_HWHDR_LEN]);
1655
1656                         brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_DATA_ON(),
1657                                            dptr, pfirst->len,
1658                                            "Rx Subframe Data:\n");
1659
1660                         __skb_trim(pfirst, sublen);
1661                         skb_pull(pfirst, doff);
1662
1663                         if (pfirst->len == 0) {
1664                                 skb_unlink(pfirst, &bus->glom);
1665                                 brcmu_pkt_buf_free_skb(pfirst);
1666                                 continue;
1667                         }
1668
1669                         brcmf_dbg_hex_dump(BRCMF_GLOM_ON(),
1670                                            pfirst->data,
1671                                            min_t(int, pfirst->len, 32),
1672                                            "subframe %d to stack, %p (%p/%d) nxt/lnk %p/%p\n",
1673                                            bus->glom.qlen, pfirst, pfirst->data,
1674                                            pfirst->len, pfirst->next,
1675                                            pfirst->prev);
1676                         skb_unlink(pfirst, &bus->glom);
1677                         if (brcmf_sdio_fromevntchan(&dptr[SDPCM_HWHDR_LEN]))
1678                                 brcmf_rx_event(bus->sdiodev->dev, pfirst);
1679                         else
1680                                 brcmf_rx_frame(bus->sdiodev->dev, pfirst,
1681                                                false);
1682                         bus->sdcnt.rxglompkts++;
1683                 }
1684
1685                 bus->sdcnt.rxglomframes++;
1686         }
1687         return num;
1688 }
1689
1690 static int brcmf_sdio_dcmd_resp_wait(struct brcmf_sdio *bus, uint *condition,
1691                                      bool *pending)
1692 {
1693         DECLARE_WAITQUEUE(wait, current);
1694         int timeout = DCMD_RESP_TIMEOUT;
1695
1696         /* Wait until control frame is available */
1697         add_wait_queue(&bus->dcmd_resp_wait, &wait);
1698         set_current_state(TASK_INTERRUPTIBLE);
1699
1700         while (!(*condition) && (!signal_pending(current) && timeout))
1701                 timeout = schedule_timeout(timeout);
1702
1703         if (signal_pending(current))
1704                 *pending = true;
1705
1706         set_current_state(TASK_RUNNING);
1707         remove_wait_queue(&bus->dcmd_resp_wait, &wait);
1708
1709         return timeout;
1710 }
1711
1712 static int brcmf_sdio_dcmd_resp_wake(struct brcmf_sdio *bus)
1713 {
1714         wake_up_interruptible(&bus->dcmd_resp_wait);
1715
1716         return 0;
1717 }
1718 static void
1719 brcmf_sdio_read_control(struct brcmf_sdio *bus, u8 *hdr, uint len, uint doff)
1720 {
1721         uint rdlen, pad;
1722         u8 *buf = NULL, *rbuf;
1723         int sdret;
1724
1725         brcmf_dbg(SDIO, "Enter\n");
1726         if (bus->rxblen)
1727                 buf = vzalloc(bus->rxblen);
1728         if (!buf)
1729                 goto done;
1730
1731         rbuf = bus->rxbuf;
1732         pad = ((unsigned long)rbuf % bus->head_align);
1733         if (pad)
1734                 rbuf += (bus->head_align - pad);
1735
1736         /* Copy the already-read portion over */
1737         memcpy(buf, hdr, BRCMF_FIRSTREAD);
1738         if (len <= BRCMF_FIRSTREAD)
1739                 goto gotpkt;
1740
1741         /* Raise rdlen to next SDIO block to avoid tail command */
1742         rdlen = len - BRCMF_FIRSTREAD;
1743         if (bus->roundup && bus->blocksize && (rdlen > bus->blocksize)) {
1744                 pad = bus->blocksize - (rdlen % bus->blocksize);
1745                 if ((pad <= bus->roundup) && (pad < bus->blocksize) &&
1746                     ((len + pad) < bus->sdiodev->bus_if->maxctl))
1747                         rdlen += pad;
1748         } else if (rdlen % bus->head_align) {
1749                 rdlen += bus->head_align - (rdlen % bus->head_align);
1750         }
1751
1752         /* Drop if the read is too big or it exceeds our maximum */
1753         if ((rdlen + BRCMF_FIRSTREAD) > bus->sdiodev->bus_if->maxctl) {
1754                 brcmf_err("%d-byte control read exceeds %d-byte buffer\n",
1755                           rdlen, bus->sdiodev->bus_if->maxctl);
1756                 brcmf_sdio_rxfail(bus, false, false);
1757                 goto done;
1758         }
1759
1760         if ((len - doff) > bus->sdiodev->bus_if->maxctl) {
1761                 brcmf_err("%d-byte ctl frame (%d-byte ctl data) exceeds %d-byte limit\n",
1762                           len, len - doff, bus->sdiodev->bus_if->maxctl);
1763                 bus->sdcnt.rx_toolong++;
1764                 brcmf_sdio_rxfail(bus, false, false);
1765                 goto done;
1766         }
1767
1768         /* Read remain of frame body */
1769         sdret = brcmf_sdiod_recv_buf(bus->sdiodev, rbuf, rdlen);
1770         bus->sdcnt.f2rxdata++;
1771
1772         /* Control frame failures need retransmission */
1773         if (sdret < 0) {
1774                 brcmf_err("read %d control bytes failed: %d\n",
1775                           rdlen, sdret);
1776                 bus->sdcnt.rxc_errors++;
1777                 brcmf_sdio_rxfail(bus, true, true);
1778                 goto done;
1779         } else
1780                 memcpy(buf + BRCMF_FIRSTREAD, rbuf, rdlen);
1781
1782 gotpkt:
1783
1784         brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_CTL_ON(),
1785                            buf, len, "RxCtrl:\n");
1786
1787         /* Point to valid data and indicate its length */
1788         spin_lock_bh(&bus->rxctl_lock);
1789         if (bus->rxctl) {
1790                 brcmf_err("last control frame is being processed.\n");
1791                 spin_unlock_bh(&bus->rxctl_lock);
1792                 vfree(buf);
1793                 goto done;
1794         }
1795         bus->rxctl = buf + doff;
1796         bus->rxctl_orig = buf;
1797         bus->rxlen = len - doff;
1798         spin_unlock_bh(&bus->rxctl_lock);
1799
1800 done:
1801         /* Awake any waiters */
1802         brcmf_sdio_dcmd_resp_wake(bus);
1803 }
1804
1805 /* Pad read to blocksize for efficiency */
1806 static void brcmf_sdio_pad(struct brcmf_sdio *bus, u16 *pad, u16 *rdlen)
1807 {
1808         if (bus->roundup && bus->blocksize && *rdlen > bus->blocksize) {
1809                 *pad = bus->blocksize - (*rdlen % bus->blocksize);
1810                 if (*pad <= bus->roundup && *pad < bus->blocksize &&
1811                     *rdlen + *pad + BRCMF_FIRSTREAD < MAX_RX_DATASZ)
1812                         *rdlen += *pad;
1813         } else if (*rdlen % bus->head_align) {
1814                 *rdlen += bus->head_align - (*rdlen % bus->head_align);
1815         }
1816 }
1817
1818 static uint brcmf_sdio_readframes(struct brcmf_sdio *bus, uint maxframes)
1819 {
1820         struct sk_buff *pkt;            /* Packet for event or data frames */
1821         u16 pad;                /* Number of pad bytes to read */
1822         uint rxleft = 0;        /* Remaining number of frames allowed */
1823         int ret;                /* Return code from calls */
1824         uint rxcount = 0;       /* Total frames read */
1825         struct brcmf_sdio_hdrinfo *rd = &bus->cur_read, rd_new;
1826         u8 head_read = 0;
1827
1828         brcmf_dbg(SDIO, "Enter\n");
1829
1830         /* Not finished unless we encounter no more frames indication */
1831         bus->rxpending = true;
1832
1833         for (rd->seq_num = bus->rx_seq, rxleft = maxframes;
1834              !bus->rxskip && rxleft && bus->sdiodev->state == BRCMF_SDIOD_DATA;
1835              rd->seq_num++, rxleft--) {
1836
1837                 /* Handle glomming separately */
1838                 if (bus->glomd || !skb_queue_empty(&bus->glom)) {
1839                         u8 cnt;
1840                         brcmf_dbg(GLOM, "calling rxglom: glomd %p, glom %p\n",
1841                                   bus->glomd, skb_peek(&bus->glom));
1842                         cnt = brcmf_sdio_rxglom(bus, rd->seq_num);
1843                         brcmf_dbg(GLOM, "rxglom returned %d\n", cnt);
1844                         rd->seq_num += cnt - 1;
1845                         rxleft = (rxleft > cnt) ? (rxleft - cnt) : 1;
1846                         continue;
1847                 }
1848
1849                 rd->len_left = rd->len;
1850                 /* read header first for unknow frame length */
1851                 sdio_claim_host(bus->sdiodev->func1);
1852                 if (!rd->len) {
1853                         ret = brcmf_sdiod_recv_buf(bus->sdiodev,
1854                                                    bus->rxhdr, BRCMF_FIRSTREAD);
1855                         bus->sdcnt.f2rxhdrs++;
1856                         if (ret < 0) {
1857                                 brcmf_err("RXHEADER FAILED: %d\n",
1858                                           ret);
1859                                 bus->sdcnt.rx_hdrfail++;
1860                                 brcmf_sdio_rxfail(bus, true, true);
1861                                 sdio_release_host(bus->sdiodev->func1);
1862                                 continue;
1863                         }
1864
1865                         brcmf_dbg_hex_dump(BRCMF_BYTES_ON() || BRCMF_HDRS_ON(),
1866                                            bus->rxhdr, SDPCM_HDRLEN,
1867                                            "RxHdr:\n");
1868
1869                         if (brcmf_sdio_hdparse(bus, bus->rxhdr, rd,
1870                                                BRCMF_SDIO_FT_NORMAL)) {
1871                                 sdio_release_host(bus->sdiodev->func1);
1872                                 if (!bus->rxpending)
1873                                         break;
1874                                 else
1875                                         continue;
1876                         }
1877
1878                         if (rd->channel == SDPCM_CONTROL_CHANNEL) {
1879                                 brcmf_sdio_read_control(bus, bus->rxhdr,
1880                                                         rd->len,
1881                                                         rd->dat_offset);
1882                                 /* prepare the descriptor for the next read */
1883                                 rd->len = rd->len_nxtfrm << 4;
1884                                 rd->len_nxtfrm = 0;
1885                                 /* treat all packet as event if we don't know */
1886                                 rd->channel = SDPCM_EVENT_CHANNEL;
1887                                 sdio_release_host(bus->sdiodev->func1);
1888                                 continue;
1889                         }
1890                         rd->len_left = rd->len > BRCMF_FIRSTREAD ?
1891                                        rd->len - BRCMF_FIRSTREAD : 0;
1892                         head_read = BRCMF_FIRSTREAD;
1893                 }
1894
1895                 brcmf_sdio_pad(bus, &pad, &rd->len_left);
1896
1897                 pkt = brcmu_pkt_buf_get_skb(rd->len_left + head_read +
1898                                             bus->head_align);
1899                 if (!pkt) {
1900                         /* Give up on data, request rtx of events */
1901                         brcmf_err("brcmu_pkt_buf_get_skb failed\n");
1902                         brcmf_sdio_rxfail(bus, false,
1903                                             RETRYCHAN(rd->channel));
1904                         sdio_release_host(bus->sdiodev->func1);
1905                         continue;
1906                 }
1907                 skb_pull(pkt, head_read);
1908                 pkt_align(pkt, rd->len_left, bus->head_align);
1909
1910                 ret = brcmf_sdiod_recv_pkt(bus->sdiodev, pkt);
1911                 bus->sdcnt.f2rxdata++;
1912                 sdio_release_host(bus->sdiodev->func1);
1913
1914                 if (ret < 0) {
1915                         brcmf_err("read %d bytes from channel %d failed: %d\n",
1916                                   rd->len, rd->channel, ret);
1917                         brcmu_pkt_buf_free_skb(pkt);
1918                         sdio_claim_host(bus->sdiodev->func1);
1919                         brcmf_sdio_rxfail(bus, true,
1920                                             RETRYCHAN(rd->channel));
1921                         sdio_release_host(bus->sdiodev->func1);
1922                         continue;
1923                 }
1924
1925                 if (head_read) {
1926                         skb_push(pkt, head_read);
1927                         memcpy(pkt->data, bus->rxhdr, head_read);
1928                         head_read = 0;
1929                 } else {
1930                         memcpy(bus->rxhdr, pkt->data, SDPCM_HDRLEN);
1931                         rd_new.seq_num = rd->seq_num;
1932                         sdio_claim_host(bus->sdiodev->func1);
1933                         if (brcmf_sdio_hdparse(bus, bus->rxhdr, &rd_new,
1934                                                BRCMF_SDIO_FT_NORMAL)) {
1935                                 rd->len = 0;
1936                                 brcmf_sdio_rxfail(bus, true, true);
1937                                 sdio_release_host(bus->sdiodev->func1);
1938                                 brcmu_pkt_buf_free_skb(pkt);
1939                                 continue;
1940                         }
1941                         bus->sdcnt.rx_readahead_cnt++;
1942                         if (rd->len != roundup(rd_new.len, 16)) {
1943                                 brcmf_err("frame length mismatch:read %d, should be %d\n",
1944                                           rd->len,
1945                                           roundup(rd_new.len, 16) >> 4);
1946                                 rd->len = 0;
1947                                 brcmf_sdio_rxfail(bus, true, true);
1948                                 sdio_release_host(bus->sdiodev->func1);
1949                                 brcmu_pkt_buf_free_skb(pkt);
1950                                 continue;
1951                         }
1952                         sdio_release_host(bus->sdiodev->func1);
1953                         rd->len_nxtfrm = rd_new.len_nxtfrm;
1954                         rd->channel = rd_new.channel;
1955                         rd->dat_offset = rd_new.dat_offset;
1956
1957                         brcmf_dbg_hex_dump(!(BRCMF_BYTES_ON() &&
1958                                              BRCMF_DATA_ON()) &&
1959                                            BRCMF_HDRS_ON(),
1960                                            bus->rxhdr, SDPCM_HDRLEN,
1961                                            "RxHdr:\n");
1962
1963                         if (rd_new.channel == SDPCM_CONTROL_CHANNEL) {
1964                                 brcmf_err("readahead on control packet %d?\n",
1965                                           rd_new.seq_num);
1966                                 /* Force retry w/normal header read */
1967                                 rd->len = 0;
1968                                 sdio_claim_host(bus->sdiodev->func1);
1969                                 brcmf_sdio_rxfail(bus, false, true);
1970                                 sdio_release_host(bus->sdiodev->func1);
1971                                 brcmu_pkt_buf_free_skb(pkt);
1972                                 continue;
1973                         }
1974                 }
1975
1976                 brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_DATA_ON(),
1977                                    pkt->data, rd->len, "Rx Data:\n");
1978
1979                 /* Save superframe descriptor and allocate packet frame */
1980                 if (rd->channel == SDPCM_GLOM_CHANNEL) {
1981                         if (SDPCM_GLOMDESC(&bus->rxhdr[SDPCM_HWHDR_LEN])) {
1982                                 brcmf_dbg(GLOM, "glom descriptor, %d bytes:\n",
1983                                           rd->len);
1984                                 brcmf_dbg_hex_dump(BRCMF_GLOM_ON(),
1985                                                    pkt->data, rd->len,
1986                                                    "Glom Data:\n");
1987                                 __skb_trim(pkt, rd->len);
1988                                 skb_pull(pkt, SDPCM_HDRLEN);
1989                                 bus->glomd = pkt;
1990                         } else {
1991                                 brcmf_err("%s: glom superframe w/o "
1992                                           "descriptor!\n", __func__);
1993                                 sdio_claim_host(bus->sdiodev->func1);
1994                                 brcmf_sdio_rxfail(bus, false, false);
1995                                 sdio_release_host(bus->sdiodev->func1);
1996                         }
1997                         /* prepare the descriptor for the next read */
1998                         rd->len = rd->len_nxtfrm << 4;
1999                         rd->len_nxtfrm = 0;
2000                         /* treat all packet as event if we don't know */
2001                         rd->channel = SDPCM_EVENT_CHANNEL;
2002                         continue;
2003                 }
2004
2005                 /* Fill in packet len and prio, deliver upward */
2006                 __skb_trim(pkt, rd->len);
2007                 skb_pull(pkt, rd->dat_offset);
2008
2009                 if (pkt->len == 0)
2010                         brcmu_pkt_buf_free_skb(pkt);
2011                 else if (rd->channel == SDPCM_EVENT_CHANNEL)
2012                         brcmf_rx_event(bus->sdiodev->dev, pkt);
2013                 else
2014                         brcmf_rx_frame(bus->sdiodev->dev, pkt,
2015                                        false);
2016
2017                 /* prepare the descriptor for the next read */
2018                 rd->len = rd->len_nxtfrm << 4;
2019                 rd->len_nxtfrm = 0;
2020                 /* treat all packet as event if we don't know */
2021                 rd->channel = SDPCM_EVENT_CHANNEL;
2022         }
2023
2024         rxcount = maxframes - rxleft;
2025         /* Message if we hit the limit */
2026         if (!rxleft)
2027                 brcmf_dbg(DATA, "hit rx limit of %d frames\n", maxframes);
2028         else
2029                 brcmf_dbg(DATA, "processed %d frames\n", rxcount);
2030         /* Back off rxseq if awaiting rtx, update rx_seq */
2031         if (bus->rxskip)
2032                 rd->seq_num--;
2033         bus->rx_seq = rd->seq_num;
2034
2035         return rxcount;
2036 }
2037
2038 static void
2039 brcmf_sdio_wait_event_wakeup(struct brcmf_sdio *bus)
2040 {
2041         wake_up_interruptible(&bus->ctrl_wait);
2042         return;
2043 }
2044
2045 static int brcmf_sdio_txpkt_hdalign(struct brcmf_sdio *bus, struct sk_buff *pkt)
2046 {
2047         struct brcmf_bus_stats *stats;
2048         u16 head_pad;
2049         u8 *dat_buf;
2050
2051         dat_buf = (u8 *)(pkt->data);
2052
2053         /* Check head padding */
2054         head_pad = ((unsigned long)dat_buf % bus->head_align);
2055         if (head_pad) {
2056                 if (skb_headroom(pkt) < head_pad) {
2057                         stats = &bus->sdiodev->bus_if->stats;
2058                         atomic_inc(&stats->pktcowed);
2059                         if (skb_cow_head(pkt, head_pad)) {
2060                                 atomic_inc(&stats->pktcow_failed);
2061                                 return -ENOMEM;
2062                         }
2063                         head_pad = 0;
2064                 }
2065                 skb_push(pkt, head_pad);
2066                 dat_buf = (u8 *)(pkt->data);
2067         }
2068         memset(dat_buf, 0, head_pad + bus->tx_hdrlen);
2069         return head_pad;
2070 }
2071
2072 /*
2073  * struct brcmf_skbuff_cb reserves first two bytes in sk_buff::cb for
2074  * bus layer usage.
2075  */
2076 /* flag marking a dummy skb added for DMA alignment requirement */
2077 #define ALIGN_SKB_FLAG          0x8000
2078 /* bit mask of data length chopped from the previous packet */
2079 #define ALIGN_SKB_CHOP_LEN_MASK 0x7fff
2080
2081 static int brcmf_sdio_txpkt_prep_sg(struct brcmf_sdio *bus,
2082                                     struct sk_buff_head *pktq,
2083                                     struct sk_buff *pkt, u16 total_len)
2084 {
2085         struct brcmf_sdio_dev *sdiodev;
2086         struct sk_buff *pkt_pad;
2087         u16 tail_pad, tail_chop, chain_pad;
2088         unsigned int blksize;
2089         bool lastfrm;
2090         int ntail, ret;
2091
2092         sdiodev = bus->sdiodev;
2093         blksize = sdiodev->func2->cur_blksize;
2094         /* sg entry alignment should be a divisor of block size */
2095         WARN_ON(blksize % bus->sgentry_align);
2096
2097         /* Check tail padding */
2098         lastfrm = skb_queue_is_last(pktq, pkt);
2099         tail_pad = 0;
2100         tail_chop = pkt->len % bus->sgentry_align;
2101         if (tail_chop)
2102                 tail_pad = bus->sgentry_align - tail_chop;
2103         chain_pad = (total_len + tail_pad) % blksize;
2104         if (lastfrm && chain_pad)
2105                 tail_pad += blksize - chain_pad;
2106         if (skb_tailroom(pkt) < tail_pad && pkt->len > blksize) {
2107                 pkt_pad = brcmu_pkt_buf_get_skb(tail_pad + tail_chop +
2108                                                 bus->head_align);
2109                 if (pkt_pad == NULL)
2110                         return -ENOMEM;
2111                 ret = brcmf_sdio_txpkt_hdalign(bus, pkt_pad);
2112                 if (unlikely(ret < 0)) {
2113                         kfree_skb(pkt_pad);
2114                         return ret;
2115                 }
2116                 memcpy(pkt_pad->data,
2117                        pkt->data + pkt->len - tail_chop,
2118                        tail_chop);
2119                 *(u16 *)(pkt_pad->cb) = ALIGN_SKB_FLAG + tail_chop;
2120                 skb_trim(pkt, pkt->len - tail_chop);
2121                 skb_trim(pkt_pad, tail_pad + tail_chop);
2122                 __skb_queue_after(pktq, pkt, pkt_pad);
2123         } else {
2124                 ntail = pkt->data_len + tail_pad -
2125                         (pkt->end - pkt->tail);
2126                 if (skb_cloned(pkt) || ntail > 0)
2127                         if (pskb_expand_head(pkt, 0, ntail, GFP_ATOMIC))
2128                                 return -ENOMEM;
2129                 if (skb_linearize(pkt))
2130                         return -ENOMEM;
2131                 __skb_put(pkt, tail_pad);
2132         }
2133
2134         return tail_pad;
2135 }
2136
2137 /**
2138  * brcmf_sdio_txpkt_prep - packet preparation for transmit
2139  * @bus: brcmf_sdio structure pointer
2140  * @pktq: packet list pointer
2141  * @chan: virtual channel to transmit the packet
2142  *
2143  * Processes to be applied to the packet
2144  *      - Align data buffer pointer
2145  *      - Align data buffer length
2146  *      - Prepare header
2147  * Return: negative value if there is error
2148  */
2149 static int
2150 brcmf_sdio_txpkt_prep(struct brcmf_sdio *bus, struct sk_buff_head *pktq,
2151                       uint chan)
2152 {
2153         u16 head_pad, total_len;
2154         struct sk_buff *pkt_next;
2155         u8 txseq;
2156         int ret;
2157         struct brcmf_sdio_hdrinfo hd_info = {0};
2158
2159         txseq = bus->tx_seq;
2160         total_len = 0;
2161         skb_queue_walk(pktq, pkt_next) {
2162                 /* alignment packet inserted in previous
2163                  * loop cycle can be skipped as it is
2164                  * already properly aligned and does not
2165                  * need an sdpcm header.
2166                  */
2167                 if (*(u16 *)(pkt_next->cb) & ALIGN_SKB_FLAG)
2168                         continue;
2169
2170                 /* align packet data pointer */
2171                 ret = brcmf_sdio_txpkt_hdalign(bus, pkt_next);
2172                 if (ret < 0)
2173                         return ret;
2174                 head_pad = (u16)ret;
2175                 if (head_pad)
2176                         memset(pkt_next->data + bus->tx_hdrlen, 0, head_pad);
2177
2178                 total_len += pkt_next->len;
2179
2180                 hd_info.len = pkt_next->len;
2181                 hd_info.lastfrm = skb_queue_is_last(pktq, pkt_next);
2182                 if (bus->txglom && pktq->qlen > 1) {
2183                         ret = brcmf_sdio_txpkt_prep_sg(bus, pktq,
2184                                                        pkt_next, total_len);
2185                         if (ret < 0)
2186                                 return ret;
2187                         hd_info.tail_pad = (u16)ret;
2188                         total_len += (u16)ret;
2189                 }
2190
2191                 hd_info.channel = chan;
2192                 hd_info.dat_offset = head_pad + bus->tx_hdrlen;
2193                 hd_info.seq_num = txseq++;
2194
2195                 /* Now fill the header */
2196                 brcmf_sdio_hdpack(bus, pkt_next->data, &hd_info);
2197
2198                 if (BRCMF_BYTES_ON() &&
2199                     ((BRCMF_CTL_ON() && chan == SDPCM_CONTROL_CHANNEL) ||
2200                      (BRCMF_DATA_ON() && chan != SDPCM_CONTROL_CHANNEL)))
2201                         brcmf_dbg_hex_dump(true, pkt_next->data, hd_info.len,
2202                                            "Tx Frame:\n");
2203                 else if (BRCMF_HDRS_ON())
2204                         brcmf_dbg_hex_dump(true, pkt_next->data,
2205                                            head_pad + bus->tx_hdrlen,
2206                                            "Tx Header:\n");
2207         }
2208         /* Hardware length tag of the first packet should be total
2209          * length of the chain (including padding)
2210          */
2211         if (bus->txglom)
2212                 brcmf_sdio_update_hwhdr(pktq->next->data, total_len);
2213         return 0;
2214 }
2215
2216 /**
2217  * brcmf_sdio_txpkt_postp - packet post processing for transmit
2218  * @bus: brcmf_sdio structure pointer
2219  * @pktq: packet list pointer
2220  *
2221  * Processes to be applied to the packet
2222  *      - Remove head padding
2223  *      - Remove tail padding
2224  */
2225 static void
2226 brcmf_sdio_txpkt_postp(struct brcmf_sdio *bus, struct sk_buff_head *pktq)
2227 {
2228         u8 *hdr;
2229         u32 dat_offset;
2230         u16 tail_pad;
2231         u16 dummy_flags, chop_len;
2232         struct sk_buff *pkt_next, *tmp, *pkt_prev;
2233
2234         skb_queue_walk_safe(pktq, pkt_next, tmp) {
2235                 dummy_flags = *(u16 *)(pkt_next->cb);
2236                 if (dummy_flags & ALIGN_SKB_FLAG) {
2237                         chop_len = dummy_flags & ALIGN_SKB_CHOP_LEN_MASK;
2238                         if (chop_len) {
2239                                 pkt_prev = pkt_next->prev;
2240                                 skb_put(pkt_prev, chop_len);
2241                         }
2242                         __skb_unlink(pkt_next, pktq);
2243                         brcmu_pkt_buf_free_skb(pkt_next);
2244                 } else {
2245                         hdr = pkt_next->data + bus->tx_hdrlen - SDPCM_SWHDR_LEN;
2246                         dat_offset = le32_to_cpu(*(__le32 *)hdr);
2247                         dat_offset = (dat_offset & SDPCM_DOFFSET_MASK) >>
2248                                      SDPCM_DOFFSET_SHIFT;
2249                         skb_pull(pkt_next, dat_offset);
2250                         if (bus->txglom) {
2251                                 tail_pad = le16_to_cpu(*(__le16 *)(hdr - 2));
2252                                 skb_trim(pkt_next, pkt_next->len - tail_pad);
2253                         }
2254                 }
2255         }
2256 }
2257
2258 /* Writes a HW/SW header into the packet and sends it. */
2259 /* Assumes: (a) header space already there, (b) caller holds lock */
2260 static int brcmf_sdio_txpkt(struct brcmf_sdio *bus, struct sk_buff_head *pktq,
2261                             uint chan)
2262 {
2263         int ret;
2264         struct sk_buff *pkt_next, *tmp;
2265
2266         brcmf_dbg(TRACE, "Enter\n");
2267
2268         ret = brcmf_sdio_txpkt_prep(bus, pktq, chan);
2269         if (ret)
2270                 goto done;
2271
2272         sdio_claim_host(bus->sdiodev->func1);
2273         ret = brcmf_sdiod_send_pkt(bus->sdiodev, pktq);
2274         bus->sdcnt.f2txdata++;
2275
2276         if (ret < 0)
2277                 brcmf_sdio_txfail(bus);
2278
2279         sdio_release_host(bus->sdiodev->func1);
2280
2281 done:
2282         brcmf_sdio_txpkt_postp(bus, pktq);
2283         if (ret == 0)
2284                 bus->tx_seq = (bus->tx_seq + pktq->qlen) % SDPCM_SEQ_WRAP;
2285         skb_queue_walk_safe(pktq, pkt_next, tmp) {
2286                 __skb_unlink(pkt_next, pktq);
2287                 brcmf_proto_bcdc_txcomplete(bus->sdiodev->dev, pkt_next,
2288                                             ret == 0);
2289         }
2290         return ret;
2291 }
2292
2293 static uint brcmf_sdio_sendfromq(struct brcmf_sdio *bus, uint maxframes)
2294 {
2295         struct sk_buff *pkt;
2296         struct sk_buff_head pktq;
2297         u32 intstat_addr = bus->sdio_core->base + SD_REG(intstatus);
2298         u32 intstatus = 0;
2299         int ret = 0, prec_out, i;
2300         uint cnt = 0;
2301         u8 tx_prec_map, pkt_num;
2302
2303         brcmf_dbg(TRACE, "Enter\n");
2304
2305         tx_prec_map = ~bus->flowcontrol;
2306
2307         /* Send frames until the limit or some other event */
2308         for (cnt = 0; (cnt < maxframes) && data_ok(bus);) {
2309                 pkt_num = 1;
2310                 if (bus->txglom)
2311                         pkt_num = min_t(u8, bus->tx_max - bus->tx_seq,
2312                                         bus->sdiodev->txglomsz);
2313                 pkt_num = min_t(u32, pkt_num,
2314                                 brcmu_pktq_mlen(&bus->txq, ~bus->flowcontrol));
2315                 __skb_queue_head_init(&pktq);
2316                 spin_lock_bh(&bus->txq_lock);
2317                 for (i = 0; i < pkt_num; i++) {
2318                         pkt = brcmu_pktq_mdeq(&bus->txq, tx_prec_map,
2319                                               &prec_out);
2320                         if (pkt == NULL)
2321                                 break;
2322                         __skb_queue_tail(&pktq, pkt);
2323                 }
2324                 spin_unlock_bh(&bus->txq_lock);
2325                 if (i == 0)
2326                         break;
2327
2328                 ret = brcmf_sdio_txpkt(bus, &pktq, SDPCM_DATA_CHANNEL);
2329
2330                 cnt += i;
2331
2332                 /* In poll mode, need to check for other events */
2333                 if (!bus->intr) {
2334                         /* Check device status, signal pending interrupt */
2335                         sdio_claim_host(bus->sdiodev->func1);
2336                         intstatus = brcmf_sdiod_readl(bus->sdiodev,
2337                                                       intstat_addr, &ret);
2338                         sdio_release_host(bus->sdiodev->func1);
2339
2340                         bus->sdcnt.f2txdata++;
2341                         if (ret != 0)
2342                                 break;
2343                         if (intstatus & bus->hostintmask)
2344                                 atomic_set(&bus->ipend, 1);
2345                 }
2346         }
2347
2348         /* Deflow-control stack if needed */
2349         if ((bus->sdiodev->state == BRCMF_SDIOD_DATA) &&
2350             bus->txoff && (pktq_len(&bus->txq) < TXLOW)) {
2351                 bus->txoff = false;
2352                 brcmf_proto_bcdc_txflowblock(bus->sdiodev->dev, false);
2353         }
2354
2355         return cnt;
2356 }
2357
2358 static int brcmf_sdio_tx_ctrlframe(struct brcmf_sdio *bus, u8 *frame, u16 len)
2359 {
2360         u8 doff;
2361         u16 pad;
2362         uint retries = 0;
2363         struct brcmf_sdio_hdrinfo hd_info = {0};
2364         int ret;
2365
2366         brcmf_dbg(SDIO, "Enter\n");
2367
2368         /* Back the pointer to make room for bus header */
2369         frame -= bus->tx_hdrlen;
2370         len += bus->tx_hdrlen;
2371
2372         /* Add alignment padding (optional for ctl frames) */
2373         doff = ((unsigned long)frame % bus->head_align);
2374         if (doff) {
2375                 frame -= doff;
2376                 len += doff;
2377                 memset(frame + bus->tx_hdrlen, 0, doff);
2378         }
2379
2380         /* Round send length to next SDIO block */
2381         pad = 0;
2382         if (bus->roundup && bus->blocksize && (len > bus->blocksize)) {
2383                 pad = bus->blocksize - (len % bus->blocksize);
2384                 if ((pad > bus->roundup) || (pad >= bus->blocksize))
2385                         pad = 0;
2386         } else if (len % bus->head_align) {
2387                 pad = bus->head_align - (len % bus->head_align);
2388         }
2389         len += pad;
2390
2391         hd_info.len = len - pad;
2392         hd_info.channel = SDPCM_CONTROL_CHANNEL;
2393         hd_info.dat_offset = doff + bus->tx_hdrlen;
2394         hd_info.seq_num = bus->tx_seq;
2395         hd_info.lastfrm = true;
2396         hd_info.tail_pad = pad;
2397         brcmf_sdio_hdpack(bus, frame, &hd_info);
2398
2399         if (bus->txglom)
2400                 brcmf_sdio_update_hwhdr(frame, len);
2401
2402         brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_CTL_ON(),
2403                            frame, len, "Tx Frame:\n");
2404         brcmf_dbg_hex_dump(!(BRCMF_BYTES_ON() && BRCMF_CTL_ON()) &&
2405                            BRCMF_HDRS_ON(),
2406                            frame, min_t(u16, len, 16), "TxHdr:\n");
2407
2408         do {
2409                 ret = brcmf_sdiod_send_buf(bus->sdiodev, frame, len);
2410
2411                 if (ret < 0)
2412                         brcmf_sdio_txfail(bus);
2413                 else
2414                         bus->tx_seq = (bus->tx_seq + 1) % SDPCM_SEQ_WRAP;
2415         } while (ret < 0 && retries++ < TXRETRIES);
2416
2417         return ret;
2418 }
2419
2420 static void brcmf_sdio_bus_stop(struct device *dev)
2421 {
2422         struct brcmf_bus *bus_if = dev_get_drvdata(dev);
2423         struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
2424         struct brcmf_sdio *bus = sdiodev->bus;
2425         struct brcmf_core *core = bus->sdio_core;
2426         u32 local_hostintmask;
2427         u8 saveclk;
2428         int err;
2429
2430         brcmf_dbg(TRACE, "Enter\n");
2431
2432         if (bus->watchdog_tsk) {
2433                 send_sig(SIGTERM, bus->watchdog_tsk, 1);
2434                 kthread_stop(bus->watchdog_tsk);
2435                 bus->watchdog_tsk = NULL;
2436         }
2437
2438         if (sdiodev->state != BRCMF_SDIOD_NOMEDIUM) {
2439                 sdio_claim_host(sdiodev->func1);
2440
2441                 /* Enable clock for device interrupts */
2442                 brcmf_sdio_bus_sleep(bus, false, false);
2443
2444                 /* Disable and clear interrupts at the chip level also */
2445                 brcmf_sdiod_writel(sdiodev, core->base + SD_REG(hostintmask),
2446                                    0, NULL);
2447
2448                 local_hostintmask = bus->hostintmask;
2449                 bus->hostintmask = 0;
2450
2451                 /* Force backplane clocks to assure F2 interrupt propagates */
2452                 saveclk = brcmf_sdiod_readb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
2453                                             &err);
2454                 if (!err)
2455                         brcmf_sdiod_writeb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
2456                                            (saveclk | SBSDIO_FORCE_HT), &err);
2457                 if (err)
2458                         brcmf_err("Failed to force clock for F2: err %d\n",
2459                                   err);
2460
2461                 /* Turn off the bus (F2), free any pending packets */
2462                 brcmf_dbg(INTR, "disable SDIO interrupts\n");
2463                 sdio_disable_func(sdiodev->func2);
2464
2465                 /* Clear any pending interrupts now that F2 is disabled */
2466                 brcmf_sdiod_writel(sdiodev, core->base + SD_REG(intstatus),
2467                                    local_hostintmask, NULL);
2468
2469                 sdio_release_host(sdiodev->func1);
2470         }
2471         /* Clear the data packet queues */
2472         brcmu_pktq_flush(&bus->txq, true, NULL, NULL);
2473
2474         /* Clear any held glomming stuff */
2475         brcmu_pkt_buf_free_skb(bus->glomd);
2476         brcmf_sdio_free_glom(bus);
2477
2478         /* Clear rx control and wake any waiters */
2479         spin_lock_bh(&bus->rxctl_lock);
2480         bus->rxlen = 0;
2481         spin_unlock_bh(&bus->rxctl_lock);
2482         brcmf_sdio_dcmd_resp_wake(bus);
2483
2484         /* Reset some F2 state stuff */
2485         bus->rxskip = false;
2486         bus->tx_seq = bus->rx_seq = 0;
2487 }
2488
2489 static inline void brcmf_sdio_clrintr(struct brcmf_sdio *bus)
2490 {
2491         struct brcmf_sdio_dev *sdiodev;
2492         unsigned long flags;
2493
2494         sdiodev = bus->sdiodev;
2495         if (sdiodev->oob_irq_requested) {
2496                 spin_lock_irqsave(&sdiodev->irq_en_lock, flags);
2497                 if (!sdiodev->irq_en && !atomic_read(&bus->ipend)) {
2498                         enable_irq(sdiodev->settings->bus.sdio.oob_irq_nr);
2499                         sdiodev->irq_en = true;
2500                 }
2501                 spin_unlock_irqrestore(&sdiodev->irq_en_lock, flags);
2502         }
2503 }
2504
2505 static int brcmf_sdio_intr_rstatus(struct brcmf_sdio *bus)
2506 {
2507         struct brcmf_core *core = bus->sdio_core;
2508         u32 addr;
2509         unsigned long val;
2510         int ret;
2511
2512         addr = core->base + SD_REG(intstatus);
2513
2514         val = brcmf_sdiod_readl(bus->sdiodev, addr, &ret);
2515         bus->sdcnt.f1regdata++;
2516         if (ret != 0)
2517                 return ret;
2518
2519         val &= bus->hostintmask;
2520         atomic_set(&bus->fcstate, !!(val & I_HMB_FC_STATE));
2521
2522         /* Clear interrupts */
2523         if (val) {
2524                 brcmf_sdiod_writel(bus->sdiodev, addr, val, &ret);
2525                 bus->sdcnt.f1regdata++;
2526                 atomic_or(val, &bus->intstatus);
2527         }
2528
2529         return ret;
2530 }
2531
2532 static void brcmf_sdio_dpc(struct brcmf_sdio *bus)
2533 {
2534         struct brcmf_sdio_dev *sdiod = bus->sdiodev;
2535         u32 newstatus = 0;
2536         u32 intstat_addr = bus->sdio_core->base + SD_REG(intstatus);
2537         unsigned long intstatus;
2538         uint txlimit = bus->txbound;    /* Tx frames to send before resched */
2539         uint framecnt;                  /* Temporary counter of tx/rx frames */
2540         int err = 0;
2541
2542         brcmf_dbg(SDIO, "Enter\n");
2543
2544         sdio_claim_host(bus->sdiodev->func1);
2545
2546         /* If waiting for HTAVAIL, check status */
2547         if (!bus->sr_enabled && bus->clkstate == CLK_PENDING) {
2548                 u8 clkctl, devctl = 0;
2549
2550 #ifdef DEBUG
2551                 /* Check for inconsistent device control */
2552                 devctl = brcmf_sdiod_readb(bus->sdiodev, SBSDIO_DEVICE_CTL,
2553                                            &err);
2554 #endif                          /* DEBUG */
2555
2556                 /* Read CSR, if clock on switch to AVAIL, else ignore */
2557                 clkctl = brcmf_sdiod_readb(bus->sdiodev,
2558                                            SBSDIO_FUNC1_CHIPCLKCSR, &err);
2559
2560                 brcmf_dbg(SDIO, "DPC: PENDING, devctl 0x%02x clkctl 0x%02x\n",
2561                           devctl, clkctl);
2562
2563                 if (SBSDIO_HTAV(clkctl)) {
2564                         devctl = brcmf_sdiod_readb(bus->sdiodev,
2565                                                    SBSDIO_DEVICE_CTL, &err);
2566                         devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY;
2567                         brcmf_sdiod_writeb(bus->sdiodev,
2568                                            SBSDIO_DEVICE_CTL, devctl, &err);
2569                         bus->clkstate = CLK_AVAIL;
2570                 }
2571         }
2572
2573         /* Make sure backplane clock is on */
2574         brcmf_sdio_bus_sleep(bus, false, true);
2575
2576         /* Pending interrupt indicates new device status */
2577         if (atomic_read(&bus->ipend) > 0) {
2578                 atomic_set(&bus->ipend, 0);
2579                 err = brcmf_sdio_intr_rstatus(bus);
2580         }
2581
2582         /* Start with leftover status bits */
2583         intstatus = atomic_xchg(&bus->intstatus, 0);
2584
2585         /* Handle flow-control change: read new state in case our ack
2586          * crossed another change interrupt.  If change still set, assume
2587          * FC ON for safety, let next loop through do the debounce.
2588          */
2589         if (intstatus & I_HMB_FC_CHANGE) {
2590                 intstatus &= ~I_HMB_FC_CHANGE;
2591                 brcmf_sdiod_writel(sdiod, intstat_addr, I_HMB_FC_CHANGE, &err);
2592
2593                 newstatus = brcmf_sdiod_readl(sdiod, intstat_addr, &err);
2594
2595                 bus->sdcnt.f1regdata += 2;
2596                 atomic_set(&bus->fcstate,
2597                            !!(newstatus & (I_HMB_FC_STATE | I_HMB_FC_CHANGE)));
2598                 intstatus |= (newstatus & bus->hostintmask);
2599         }
2600
2601         /* Handle host mailbox indication */
2602         if (intstatus & I_HMB_HOST_INT) {
2603                 intstatus &= ~I_HMB_HOST_INT;
2604                 intstatus |= brcmf_sdio_hostmail(bus);
2605         }
2606
2607         sdio_release_host(bus->sdiodev->func1);
2608
2609         /* Generally don't ask for these, can get CRC errors... */
2610         if (intstatus & I_WR_OOSYNC) {
2611                 brcmf_err("Dongle reports WR_OOSYNC\n");
2612                 intstatus &= ~I_WR_OOSYNC;
2613         }
2614
2615         if (intstatus & I_RD_OOSYNC) {
2616                 brcmf_err("Dongle reports RD_OOSYNC\n");
2617                 intstatus &= ~I_RD_OOSYNC;
2618         }
2619
2620         if (intstatus & I_SBINT) {
2621                 brcmf_err("Dongle reports SBINT\n");
2622                 intstatus &= ~I_SBINT;
2623         }
2624
2625         /* Would be active due to wake-wlan in gSPI */
2626         if (intstatus & I_CHIPACTIVE) {
2627                 brcmf_dbg(SDIO, "Dongle reports CHIPACTIVE\n");
2628                 intstatus &= ~I_CHIPACTIVE;
2629         }
2630
2631         /* Ignore frame indications if rxskip is set */
2632         if (bus->rxskip)
2633                 intstatus &= ~I_HMB_FRAME_IND;
2634
2635         /* On frame indication, read available frames */
2636         if ((intstatus & I_HMB_FRAME_IND) && (bus->clkstate == CLK_AVAIL)) {
2637                 brcmf_sdio_readframes(bus, bus->rxbound);
2638                 if (!bus->rxpending)
2639                         intstatus &= ~I_HMB_FRAME_IND;
2640         }
2641
2642         /* Keep still-pending events for next scheduling */
2643         if (intstatus)
2644                 atomic_or(intstatus, &bus->intstatus);
2645
2646         brcmf_sdio_clrintr(bus);
2647
2648         if (bus->ctrl_frame_stat && (bus->clkstate == CLK_AVAIL) &&
2649             data_ok(bus)) {
2650                 sdio_claim_host(bus->sdiodev->func1);
2651                 if (bus->ctrl_frame_stat) {
2652                         err = brcmf_sdio_tx_ctrlframe(bus,  bus->ctrl_frame_buf,
2653                                                       bus->ctrl_frame_len);
2654                         bus->ctrl_frame_err = err;
2655                         wmb();
2656                         bus->ctrl_frame_stat = false;
2657                 }
2658                 sdio_release_host(bus->sdiodev->func1);
2659                 brcmf_sdio_wait_event_wakeup(bus);
2660         }
2661         /* Send queued frames (limit 1 if rx may still be pending) */
2662         if ((bus->clkstate == CLK_AVAIL) && !atomic_read(&bus->fcstate) &&
2663             brcmu_pktq_mlen(&bus->txq, ~bus->flowcontrol) && txlimit &&
2664             data_ok(bus)) {
2665                 framecnt = bus->rxpending ? min(txlimit, bus->txminmax) :
2666                                             txlimit;
2667                 brcmf_sdio_sendfromq(bus, framecnt);
2668         }
2669
2670         if ((bus->sdiodev->state != BRCMF_SDIOD_DATA) || (err != 0)) {
2671                 brcmf_err("failed backplane access over SDIO, halting operation\n");
2672                 atomic_set(&bus->intstatus, 0);
2673                 if (bus->ctrl_frame_stat) {
2674                         sdio_claim_host(bus->sdiodev->func1);
2675                         if (bus->ctrl_frame_stat) {
2676                                 bus->ctrl_frame_err = -ENODEV;
2677                                 wmb();
2678                                 bus->ctrl_frame_stat = false;
2679                                 brcmf_sdio_wait_event_wakeup(bus);
2680                         }
2681                         sdio_release_host(bus->sdiodev->func1);
2682                 }
2683         } else if (atomic_read(&bus->intstatus) ||
2684                    atomic_read(&bus->ipend) > 0 ||
2685                    (!atomic_read(&bus->fcstate) &&
2686                     brcmu_pktq_mlen(&bus->txq, ~bus->flowcontrol) &&
2687                     data_ok(bus))) {
2688                 bus->dpc_triggered = true;
2689         }
2690 }
2691
2692 static struct pktq *brcmf_sdio_bus_gettxq(struct device *dev)
2693 {
2694         struct brcmf_bus *bus_if = dev_get_drvdata(dev);
2695         struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
2696         struct brcmf_sdio *bus = sdiodev->bus;
2697
2698         return &bus->txq;
2699 }
2700
2701 static bool brcmf_sdio_prec_enq(struct pktq *q, struct sk_buff *pkt, int prec)
2702 {
2703         struct sk_buff *p;
2704         int eprec = -1;         /* precedence to evict from */
2705
2706         /* Fast case, precedence queue is not full and we are also not
2707          * exceeding total queue length
2708          */
2709         if (!pktq_pfull(q, prec) && !pktq_full(q)) {
2710                 brcmu_pktq_penq(q, prec, pkt);
2711                 return true;
2712         }
2713
2714         /* Determine precedence from which to evict packet, if any */
2715         if (pktq_pfull(q, prec)) {
2716                 eprec = prec;
2717         } else if (pktq_full(q)) {
2718                 p = brcmu_pktq_peek_tail(q, &eprec);
2719                 if (eprec > prec)
2720                         return false;
2721         }
2722
2723         /* Evict if needed */
2724         if (eprec >= 0) {
2725                 /* Detect queueing to unconfigured precedence */
2726                 if (eprec == prec)
2727                         return false;   /* refuse newer (incoming) packet */
2728                 /* Evict packet according to discard policy */
2729                 p = brcmu_pktq_pdeq_tail(q, eprec);
2730                 if (p == NULL)
2731                         brcmf_err("brcmu_pktq_pdeq_tail() failed\n");
2732                 brcmu_pkt_buf_free_skb(p);
2733         }
2734
2735         /* Enqueue */
2736         p = brcmu_pktq_penq(q, prec, pkt);
2737         if (p == NULL)
2738                 brcmf_err("brcmu_pktq_penq() failed\n");
2739
2740         return p != NULL;
2741 }
2742
2743 static int brcmf_sdio_bus_txdata(struct device *dev, struct sk_buff *pkt)
2744 {
2745         int ret = -EBADE;
2746         uint prec;
2747         struct brcmf_bus *bus_if = dev_get_drvdata(dev);
2748         struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
2749         struct brcmf_sdio *bus = sdiodev->bus;
2750
2751         brcmf_dbg(TRACE, "Enter: pkt: data %p len %d\n", pkt->data, pkt->len);
2752         if (sdiodev->state != BRCMF_SDIOD_DATA)
2753                 return -EIO;
2754
2755         /* Add space for the header */
2756         skb_push(pkt, bus->tx_hdrlen);
2757         /* precondition: IS_ALIGNED((unsigned long)(pkt->data), 2) */
2758
2759         prec = prio2prec((pkt->priority & PRIOMASK));
2760
2761         /* Check for existing queue, current flow-control,
2762                          pending event, or pending clock */
2763         brcmf_dbg(TRACE, "deferring pktq len %d\n", pktq_len(&bus->txq));
2764         bus->sdcnt.fcqueued++;
2765
2766         /* Priority based enq */
2767         spin_lock_bh(&bus->txq_lock);
2768         /* reset bus_flags in packet cb */
2769         *(u16 *)(pkt->cb) = 0;
2770         if (!brcmf_sdio_prec_enq(&bus->txq, pkt, prec)) {
2771                 skb_pull(pkt, bus->tx_hdrlen);
2772                 brcmf_err("out of bus->txq !!!\n");
2773                 ret = -ENOSR;
2774         } else {
2775                 ret = 0;
2776         }
2777
2778         if (pktq_len(&bus->txq) >= TXHI) {
2779                 bus->txoff = true;
2780                 brcmf_proto_bcdc_txflowblock(dev, true);
2781         }
2782         spin_unlock_bh(&bus->txq_lock);
2783
2784 #ifdef DEBUG
2785         if (pktq_plen(&bus->txq, prec) > qcount[prec])
2786                 qcount[prec] = pktq_plen(&bus->txq, prec);
2787 #endif
2788
2789         brcmf_sdio_trigger_dpc(bus);
2790         return ret;
2791 }
2792
2793 #ifdef DEBUG
2794 #define CONSOLE_LINE_MAX        192
2795
2796 static int brcmf_sdio_readconsole(struct brcmf_sdio *bus)
2797 {
2798         struct brcmf_console *c = &bus->console;
2799         u8 line[CONSOLE_LINE_MAX], ch;
2800         u32 n, idx, addr;
2801         int rv;
2802
2803         /* Don't do anything until FWREADY updates console address */
2804         if (bus->console_addr == 0)
2805                 return 0;
2806
2807         /* Read console log struct */
2808         addr = bus->console_addr + offsetof(struct rte_console, log_le);
2809         rv = brcmf_sdiod_ramrw(bus->sdiodev, false, addr, (u8 *)&c->log_le,
2810                                sizeof(c->log_le));
2811         if (rv < 0)
2812                 return rv;
2813
2814         /* Allocate console buffer (one time only) */
2815         if (c->buf == NULL) {
2816                 c->bufsize = le32_to_cpu(c->log_le.buf_size);
2817                 c->buf = kmalloc(c->bufsize, GFP_ATOMIC);
2818                 if (c->buf == NULL)
2819                         return -ENOMEM;
2820         }
2821
2822         idx = le32_to_cpu(c->log_le.idx);
2823
2824         /* Protect against corrupt value */
2825         if (idx > c->bufsize)
2826                 return -EBADE;
2827
2828         /* Skip reading the console buffer if the index pointer
2829          has not moved */
2830         if (idx == c->last)
2831                 return 0;
2832
2833         /* Read the console buffer */
2834         addr = le32_to_cpu(c->log_le.buf);
2835         rv = brcmf_sdiod_ramrw(bus->sdiodev, false, addr, c->buf, c->bufsize);
2836         if (rv < 0)
2837                 return rv;
2838
2839         while (c->last != idx) {
2840                 for (n = 0; n < CONSOLE_LINE_MAX - 2; n++) {
2841                         if (c->last == idx) {
2842                                 /* This would output a partial line.
2843                                  * Instead, back up
2844                                  * the buffer pointer and output this
2845                                  * line next time around.
2846                                  */
2847                                 if (c->last >= n)
2848                                         c->last -= n;
2849                                 else
2850                                         c->last = c->bufsize - n;
2851                                 goto break2;
2852                         }
2853                         ch = c->buf[c->last];
2854                         c->last = (c->last + 1) % c->bufsize;
2855                         if (ch == '\n')
2856                                 break;
2857                         line[n] = ch;
2858                 }
2859
2860                 if (n > 0) {
2861                         if (line[n - 1] == '\r')
2862                                 n--;
2863                         line[n] = 0;
2864                         pr_debug("CONSOLE: %s\n", line);
2865                 }
2866         }
2867 break2:
2868
2869         return 0;
2870 }
2871 #endif                          /* DEBUG */
2872
2873 static int
2874 brcmf_sdio_bus_txctl(struct device *dev, unsigned char *msg, uint msglen)
2875 {
2876         struct brcmf_bus *bus_if = dev_get_drvdata(dev);
2877         struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
2878         struct brcmf_sdio *bus = sdiodev->bus;
2879         int ret;
2880
2881         brcmf_dbg(TRACE, "Enter\n");
2882         if (sdiodev->state != BRCMF_SDIOD_DATA)
2883                 return -EIO;
2884
2885         /* Send from dpc */
2886         bus->ctrl_frame_buf = msg;
2887         bus->ctrl_frame_len = msglen;
2888         wmb();
2889         bus->ctrl_frame_stat = true;
2890
2891         brcmf_sdio_trigger_dpc(bus);
2892         wait_event_interruptible_timeout(bus->ctrl_wait, !bus->ctrl_frame_stat,
2893                                          CTL_DONE_TIMEOUT);
2894         ret = 0;
2895         if (bus->ctrl_frame_stat) {
2896                 sdio_claim_host(bus->sdiodev->func1);
2897                 if (bus->ctrl_frame_stat) {
2898                         brcmf_dbg(SDIO, "ctrl_frame timeout\n");
2899                         bus->ctrl_frame_stat = false;
2900                         ret = -ETIMEDOUT;
2901                 }
2902                 sdio_release_host(bus->sdiodev->func1);
2903         }
2904         if (!ret) {
2905                 brcmf_dbg(SDIO, "ctrl_frame complete, err=%d\n",
2906                           bus->ctrl_frame_err);
2907                 rmb();
2908                 ret = bus->ctrl_frame_err;
2909         }
2910
2911         if (ret)
2912                 bus->sdcnt.tx_ctlerrs++;
2913         else
2914                 bus->sdcnt.tx_ctlpkts++;
2915
2916         return ret;
2917 }
2918
2919 #ifdef DEBUG
2920 static int brcmf_sdio_dump_console(struct seq_file *seq, struct brcmf_sdio *bus,
2921                                    struct sdpcm_shared *sh)
2922 {
2923         u32 addr, console_ptr, console_size, console_index;
2924         char *conbuf = NULL;
2925         __le32 sh_val;
2926         int rv;
2927
2928         /* obtain console information from device memory */
2929         addr = sh->console_addr + offsetof(struct rte_console, log_le);
2930         rv = brcmf_sdiod_ramrw(bus->sdiodev, false, addr,
2931                                (u8 *)&sh_val, sizeof(u32));
2932         if (rv < 0)
2933                 return rv;
2934         console_ptr = le32_to_cpu(sh_val);
2935
2936         addr = sh->console_addr + offsetof(struct rte_console, log_le.buf_size);
2937         rv = brcmf_sdiod_ramrw(bus->sdiodev, false, addr,
2938                                (u8 *)&sh_val, sizeof(u32));
2939         if (rv < 0)
2940                 return rv;
2941         console_size = le32_to_cpu(sh_val);
2942
2943         addr = sh->console_addr + offsetof(struct rte_console, log_le.idx);
2944         rv = brcmf_sdiod_ramrw(bus->sdiodev, false, addr,
2945                                (u8 *)&sh_val, sizeof(u32));
2946         if (rv < 0)
2947                 return rv;
2948         console_index = le32_to_cpu(sh_val);
2949
2950         /* allocate buffer for console data */
2951         if (console_size <= CONSOLE_BUFFER_MAX)
2952                 conbuf = vzalloc(console_size+1);
2953
2954         if (!conbuf)
2955                 return -ENOMEM;
2956
2957         /* obtain the console data from device */
2958         conbuf[console_size] = '\0';
2959         rv = brcmf_sdiod_ramrw(bus->sdiodev, false, console_ptr, (u8 *)conbuf,
2960                                console_size);
2961         if (rv < 0)
2962                 goto done;
2963
2964         rv = seq_write(seq, conbuf + console_index,
2965                        console_size - console_index);
2966         if (rv < 0)
2967                 goto done;
2968
2969         if (console_index > 0)
2970                 rv = seq_write(seq, conbuf, console_index - 1);
2971
2972 done:
2973         vfree(conbuf);
2974         return rv;
2975 }
2976
2977 static int brcmf_sdio_trap_info(struct seq_file *seq, struct brcmf_sdio *bus,
2978                                 struct sdpcm_shared *sh)
2979 {
2980         int error;
2981         struct brcmf_trap_info tr;
2982
2983         if ((sh->flags & SDPCM_SHARED_TRAP) == 0) {
2984                 brcmf_dbg(INFO, "no trap in firmware\n");
2985                 return 0;
2986         }
2987
2988         error = brcmf_sdiod_ramrw(bus->sdiodev, false, sh->trap_addr, (u8 *)&tr,
2989                                   sizeof(struct brcmf_trap_info));
2990         if (error < 0)
2991                 return error;
2992
2993         seq_printf(seq,
2994                    "dongle trap info: type 0x%x @ epc 0x%08x\n"
2995                    "  cpsr 0x%08x spsr 0x%08x sp 0x%08x\n"
2996                    "  lr   0x%08x pc   0x%08x offset 0x%x\n"
2997                    "  r0   0x%08x r1   0x%08x r2 0x%08x r3 0x%08x\n"
2998                    "  r4   0x%08x r5   0x%08x r6 0x%08x r7 0x%08x\n",
2999                    le32_to_cpu(tr.type), le32_to_cpu(tr.epc),
3000                    le32_to_cpu(tr.cpsr), le32_to_cpu(tr.spsr),
3001                    le32_to_cpu(tr.r13), le32_to_cpu(tr.r14),
3002                    le32_to_cpu(tr.pc), sh->trap_addr,
3003                    le32_to_cpu(tr.r0), le32_to_cpu(tr.r1),
3004                    le32_to_cpu(tr.r2), le32_to_cpu(tr.r3),
3005                    le32_to_cpu(tr.r4), le32_to_cpu(tr.r5),
3006                    le32_to_cpu(tr.r6), le32_to_cpu(tr.r7));
3007
3008         return 0;
3009 }
3010
3011 static int brcmf_sdio_assert_info(struct seq_file *seq, struct brcmf_sdio *bus,
3012                                   struct sdpcm_shared *sh)
3013 {
3014         int error = 0;
3015         char file[80] = "?";
3016         char expr[80] = "<???>";
3017
3018         if ((sh->flags & SDPCM_SHARED_ASSERT_BUILT) == 0) {
3019                 brcmf_dbg(INFO, "firmware not built with -assert\n");
3020                 return 0;
3021         } else if ((sh->flags & SDPCM_SHARED_ASSERT) == 0) {
3022                 brcmf_dbg(INFO, "no assert in dongle\n");
3023                 return 0;
3024         }
3025
3026         sdio_claim_host(bus->sdiodev->func1);
3027         if (sh->assert_file_addr != 0) {
3028                 error = brcmf_sdiod_ramrw(bus->sdiodev, false,
3029                                           sh->assert_file_addr, (u8 *)file, 80);
3030                 if (error < 0)
3031                         return error;
3032         }
3033         if (sh->assert_exp_addr != 0) {
3034                 error = brcmf_sdiod_ramrw(bus->sdiodev, false,
3035                                           sh->assert_exp_addr, (u8 *)expr, 80);
3036                 if (error < 0)
3037                         return error;
3038         }
3039         sdio_release_host(bus->sdiodev->func1);
3040
3041         seq_printf(seq, "dongle assert: %s:%d: assert(%s)\n",
3042                    file, sh->assert_line, expr);
3043         return 0;
3044 }
3045
3046 static int brcmf_sdio_checkdied(struct brcmf_sdio *bus)
3047 {
3048         int error;
3049         struct sdpcm_shared sh;
3050
3051         error = brcmf_sdio_readshared(bus, &sh);
3052
3053         if (error < 0)
3054                 return error;
3055
3056         if ((sh.flags & SDPCM_SHARED_ASSERT_BUILT) == 0)
3057                 brcmf_dbg(INFO, "firmware not built with -assert\n");
3058         else if (sh.flags & SDPCM_SHARED_ASSERT)
3059                 brcmf_err("assertion in dongle\n");
3060
3061         if (sh.flags & SDPCM_SHARED_TRAP)
3062                 brcmf_err("firmware trap in dongle\n");
3063
3064         return 0;
3065 }
3066
3067 static int brcmf_sdio_died_dump(struct seq_file *seq, struct brcmf_sdio *bus)
3068 {
3069         int error = 0;
3070         struct sdpcm_shared sh;
3071
3072         error = brcmf_sdio_readshared(bus, &sh);
3073         if (error < 0)
3074                 goto done;
3075
3076         error = brcmf_sdio_assert_info(seq, bus, &sh);
3077         if (error < 0)
3078                 goto done;
3079
3080         error = brcmf_sdio_trap_info(seq, bus, &sh);
3081         if (error < 0)
3082                 goto done;
3083
3084         error = brcmf_sdio_dump_console(seq, bus, &sh);
3085
3086 done:
3087         return error;
3088 }
3089
3090 static int brcmf_sdio_forensic_read(struct seq_file *seq, void *data)
3091 {
3092         struct brcmf_bus *bus_if = dev_get_drvdata(seq->private);
3093         struct brcmf_sdio *bus = bus_if->bus_priv.sdio->bus;
3094
3095         return brcmf_sdio_died_dump(seq, bus);
3096 }
3097
3098 static int brcmf_debugfs_sdio_count_read(struct seq_file *seq, void *data)
3099 {
3100         struct brcmf_bus *bus_if = dev_get_drvdata(seq->private);
3101         struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
3102         struct brcmf_sdio_count *sdcnt = &sdiodev->bus->sdcnt;
3103
3104         seq_printf(seq,
3105                    "intrcount:    %u\nlastintrs:    %u\n"
3106                    "pollcnt:      %u\nregfails:     %u\n"
3107                    "tx_sderrs:    %u\nfcqueued:     %u\n"
3108                    "rxrtx:        %u\nrx_toolong:   %u\n"
3109                    "rxc_errors:   %u\nrx_hdrfail:   %u\n"
3110                    "rx_badhdr:    %u\nrx_badseq:    %u\n"
3111                    "fc_rcvd:      %u\nfc_xoff:      %u\n"
3112                    "fc_xon:       %u\nrxglomfail:   %u\n"
3113                    "rxglomframes: %u\nrxglompkts:   %u\n"
3114                    "f2rxhdrs:     %u\nf2rxdata:     %u\n"
3115                    "f2txdata:     %u\nf1regdata:    %u\n"
3116                    "tickcnt:      %u\ntx_ctlerrs:   %lu\n"
3117                    "tx_ctlpkts:   %lu\nrx_ctlerrs:   %lu\n"
3118                    "rx_ctlpkts:   %lu\nrx_readahead: %lu\n",
3119                    sdcnt->intrcount, sdcnt->lastintrs,
3120                    sdcnt->pollcnt, sdcnt->regfails,
3121                    sdcnt->tx_sderrs, sdcnt->fcqueued,
3122                    sdcnt->rxrtx, sdcnt->rx_toolong,
3123                    sdcnt->rxc_errors, sdcnt->rx_hdrfail,
3124                    sdcnt->rx_badhdr, sdcnt->rx_badseq,
3125                    sdcnt->fc_rcvd, sdcnt->fc_xoff,
3126                    sdcnt->fc_xon, sdcnt->rxglomfail,
3127                    sdcnt->rxglomframes, sdcnt->rxglompkts,
3128                    sdcnt->f2rxhdrs, sdcnt->f2rxdata,
3129                    sdcnt->f2txdata, sdcnt->f1regdata,
3130                    sdcnt->tickcnt, sdcnt->tx_ctlerrs,
3131                    sdcnt->tx_ctlpkts, sdcnt->rx_ctlerrs,
3132                    sdcnt->rx_ctlpkts, sdcnt->rx_readahead_cnt);
3133
3134         return 0;
3135 }
3136
3137 static void brcmf_sdio_debugfs_create(struct device *dev)
3138 {
3139         struct brcmf_bus *bus_if = dev_get_drvdata(dev);
3140         struct brcmf_pub *drvr = bus_if->drvr;
3141         struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
3142         struct brcmf_sdio *bus = sdiodev->bus;
3143         struct dentry *dentry = brcmf_debugfs_get_devdir(drvr);
3144
3145         if (IS_ERR_OR_NULL(dentry))
3146                 return;
3147
3148         bus->console_interval = BRCMF_CONSOLE;
3149
3150         brcmf_debugfs_add_entry(drvr, "forensics", brcmf_sdio_forensic_read);
3151         brcmf_debugfs_add_entry(drvr, "counters",
3152                                 brcmf_debugfs_sdio_count_read);
3153         debugfs_create_u32("console_interval", 0644, dentry,
3154                            &bus->console_interval);
3155 }
3156 #else
3157 static int brcmf_sdio_checkdied(struct brcmf_sdio *bus)
3158 {
3159         return 0;
3160 }
3161
3162 static void brcmf_sdio_debugfs_create(struct device *dev)
3163 {
3164 }
3165 #endif /* DEBUG */
3166
3167 static int
3168 brcmf_sdio_bus_rxctl(struct device *dev, unsigned char *msg, uint msglen)
3169 {
3170         int timeleft;
3171         uint rxlen = 0;
3172         bool pending;
3173         u8 *buf;
3174         struct brcmf_bus *bus_if = dev_get_drvdata(dev);
3175         struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
3176         struct brcmf_sdio *bus = sdiodev->bus;
3177
3178         brcmf_dbg(TRACE, "Enter\n");
3179         if (sdiodev->state != BRCMF_SDIOD_DATA)
3180                 return -EIO;
3181
3182         /* Wait until control frame is available */
3183         timeleft = brcmf_sdio_dcmd_resp_wait(bus, &bus->rxlen, &pending);
3184
3185         spin_lock_bh(&bus->rxctl_lock);
3186         rxlen = bus->rxlen;
3187         memcpy(msg, bus->rxctl, min(msglen, rxlen));
3188         bus->rxctl = NULL;
3189         buf = bus->rxctl_orig;
3190         bus->rxctl_orig = NULL;
3191         bus->rxlen = 0;
3192         spin_unlock_bh(&bus->rxctl_lock);
3193         vfree(buf);
3194
3195         if (rxlen) {
3196                 brcmf_dbg(CTL, "resumed on rxctl frame, got %d expected %d\n",
3197                           rxlen, msglen);
3198         } else if (timeleft == 0) {
3199                 brcmf_err("resumed on timeout\n");
3200                 brcmf_sdio_checkdied(bus);
3201         } else if (pending) {
3202                 brcmf_dbg(CTL, "cancelled\n");
3203                 return -ERESTARTSYS;
3204         } else {
3205                 brcmf_dbg(CTL, "resumed for unknown reason?\n");
3206                 brcmf_sdio_checkdied(bus);
3207         }
3208
3209         if (rxlen)
3210                 bus->sdcnt.rx_ctlpkts++;
3211         else
3212                 bus->sdcnt.rx_ctlerrs++;
3213
3214         return rxlen ? (int)rxlen : -ETIMEDOUT;
3215 }
3216
3217 #ifdef DEBUG
3218 static bool
3219 brcmf_sdio_verifymemory(struct brcmf_sdio_dev *sdiodev, u32 ram_addr,
3220                         u8 *ram_data, uint ram_sz)
3221 {
3222         char *ram_cmp;
3223         int err;
3224         bool ret = true;
3225         int address;
3226         int offset;
3227         int len;
3228
3229         /* read back and verify */
3230         brcmf_dbg(INFO, "Compare RAM dl & ul at 0x%08x; size=%d\n", ram_addr,
3231                   ram_sz);
3232         ram_cmp = kmalloc(MEMBLOCK, GFP_KERNEL);
3233         /* do not proceed while no memory but  */
3234         if (!ram_cmp)
3235                 return true;
3236
3237         address = ram_addr;
3238         offset = 0;
3239         while (offset < ram_sz) {
3240                 len = ((offset + MEMBLOCK) < ram_sz) ? MEMBLOCK :
3241                       ram_sz - offset;
3242                 err = brcmf_sdiod_ramrw(sdiodev, false, address, ram_cmp, len);
3243                 if (err) {
3244                         brcmf_err("error %d on reading %d membytes at 0x%08x\n",
3245                                   err, len, address);
3246                         ret = false;
3247                         break;
3248                 } else if (memcmp(ram_cmp, &ram_data[offset], len)) {
3249                         brcmf_err("Downloaded RAM image is corrupted, block offset is %d, len is %d\n",
3250                                   offset, len);
3251                         ret = false;
3252                         break;
3253                 }
3254                 offset += len;
3255                 address += len;
3256         }
3257
3258         kfree(ram_cmp);
3259
3260         return ret;
3261 }
3262 #else   /* DEBUG */
3263 static bool
3264 brcmf_sdio_verifymemory(struct brcmf_sdio_dev *sdiodev, u32 ram_addr,
3265                         u8 *ram_data, uint ram_sz)
3266 {
3267         return true;
3268 }
3269 #endif  /* DEBUG */
3270
3271 static int brcmf_sdio_download_code_file(struct brcmf_sdio *bus,
3272                                          const struct firmware *fw)
3273 {
3274         int err;
3275
3276         brcmf_dbg(TRACE, "Enter\n");
3277
3278         err = brcmf_sdiod_ramrw(bus->sdiodev, true, bus->ci->rambase,
3279                                 (u8 *)fw->data, fw->size);
3280         if (err)
3281                 brcmf_err("error %d on writing %d membytes at 0x%08x\n",
3282                           err, (int)fw->size, bus->ci->rambase);
3283         else if (!brcmf_sdio_verifymemory(bus->sdiodev, bus->ci->rambase,
3284                                           (u8 *)fw->data, fw->size))
3285                 err = -EIO;
3286
3287         return err;
3288 }
3289
3290 static int brcmf_sdio_download_nvram(struct brcmf_sdio *bus,
3291                                      void *vars, u32 varsz)
3292 {
3293         int address;
3294         int err;
3295
3296         brcmf_dbg(TRACE, "Enter\n");
3297
3298         address = bus->ci->ramsize - varsz + bus->ci->rambase;
3299         err = brcmf_sdiod_ramrw(bus->sdiodev, true, address, vars, varsz);
3300         if (err)
3301                 brcmf_err("error %d on writing %d nvram bytes at 0x%08x\n",
3302                           err, varsz, address);
3303         else if (!brcmf_sdio_verifymemory(bus->sdiodev, address, vars, varsz))
3304                 err = -EIO;
3305
3306         return err;
3307 }
3308
3309 static int brcmf_sdio_download_firmware(struct brcmf_sdio *bus,
3310                                         const struct firmware *fw,
3311                                         void *nvram, u32 nvlen)
3312 {
3313         int bcmerror;
3314         u32 rstvec;
3315
3316         sdio_claim_host(bus->sdiodev->func1);
3317         brcmf_sdio_clkctl(bus, CLK_AVAIL, false);
3318
3319         rstvec = get_unaligned_le32(fw->data);
3320         brcmf_dbg(SDIO, "firmware rstvec: %x\n", rstvec);
3321
3322         bcmerror = brcmf_sdio_download_code_file(bus, fw);
3323         release_firmware(fw);
3324         if (bcmerror) {
3325                 brcmf_err("dongle image file download failed\n");
3326                 brcmf_fw_nvram_free(nvram);
3327                 goto err;
3328         }
3329
3330         bcmerror = brcmf_sdio_download_nvram(bus, nvram, nvlen);
3331         brcmf_fw_nvram_free(nvram);
3332         if (bcmerror) {
3333                 brcmf_err("dongle nvram file download failed\n");
3334                 goto err;
3335         }
3336
3337         /* Take arm out of reset */
3338         if (!brcmf_chip_set_active(bus->ci, rstvec)) {
3339                 brcmf_err("error getting out of ARM core reset\n");
3340                 bcmerror = -EIO;
3341                 goto err;
3342         }
3343
3344 err:
3345         brcmf_sdio_clkctl(bus, CLK_SDONLY, false);
3346         sdio_release_host(bus->sdiodev->func1);
3347         return bcmerror;
3348 }
3349
3350 static void brcmf_sdio_sr_init(struct brcmf_sdio *bus)
3351 {
3352         int err = 0;
3353         u8 val;
3354
3355         brcmf_dbg(TRACE, "Enter\n");
3356
3357         val = brcmf_sdiod_readb(bus->sdiodev, SBSDIO_FUNC1_WAKEUPCTRL, &err);
3358         if (err) {
3359                 brcmf_err("error reading SBSDIO_FUNC1_WAKEUPCTRL\n");
3360                 return;
3361         }
3362
3363         val |= 1 << SBSDIO_FUNC1_WCTRL_HTWAIT_SHIFT;
3364         brcmf_sdiod_writeb(bus->sdiodev, SBSDIO_FUNC1_WAKEUPCTRL, val, &err);
3365         if (err) {
3366                 brcmf_err("error writing SBSDIO_FUNC1_WAKEUPCTRL\n");
3367                 return;
3368         }
3369
3370         /* Add CMD14 Support */
3371         brcmf_sdiod_func0_wb(bus->sdiodev, SDIO_CCCR_BRCM_CARDCAP,
3372                              (SDIO_CCCR_BRCM_CARDCAP_CMD14_SUPPORT |
3373                               SDIO_CCCR_BRCM_CARDCAP_CMD14_EXT),
3374                              &err);
3375         if (err) {
3376                 brcmf_err("error writing SDIO_CCCR_BRCM_CARDCAP\n");
3377                 return;
3378         }
3379
3380         brcmf_sdiod_writeb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
3381                            SBSDIO_FORCE_HT, &err);
3382         if (err) {
3383                 brcmf_err("error writing SBSDIO_FUNC1_CHIPCLKCSR\n");
3384                 return;
3385         }
3386
3387         /* set flag */
3388         bus->sr_enabled = true;
3389         brcmf_dbg(INFO, "SR enabled\n");
3390 }
3391
3392 /* enable KSO bit */
3393 static int brcmf_sdio_kso_init(struct brcmf_sdio *bus)
3394 {
3395         struct brcmf_core *core = bus->sdio_core;
3396         u8 val;
3397         int err = 0;
3398
3399         brcmf_dbg(TRACE, "Enter\n");
3400
3401         /* KSO bit added in SDIO core rev 12 */
3402         if (core->rev < 12)
3403                 return 0;
3404
3405         val = brcmf_sdiod_readb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR, &err);
3406         if (err) {
3407                 brcmf_err("error reading SBSDIO_FUNC1_SLEEPCSR\n");
3408                 return err;
3409         }
3410
3411         if (!(val & SBSDIO_FUNC1_SLEEPCSR_KSO_MASK)) {
3412                 val |= (SBSDIO_FUNC1_SLEEPCSR_KSO_EN <<
3413                         SBSDIO_FUNC1_SLEEPCSR_KSO_SHIFT);
3414                 brcmf_sdiod_writeb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR,
3415                                    val, &err);
3416                 if (err) {
3417                         brcmf_err("error writing SBSDIO_FUNC1_SLEEPCSR\n");
3418                         return err;
3419                 }
3420         }
3421
3422         return 0;
3423 }
3424
3425
3426 static int brcmf_sdio_bus_preinit(struct device *dev)
3427 {
3428         struct brcmf_bus *bus_if = dev_get_drvdata(dev);
3429         struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
3430         struct brcmf_sdio *bus = sdiodev->bus;
3431         struct brcmf_core *core = bus->sdio_core;
3432         uint pad_size;
3433         u32 value;
3434         int err;
3435
3436         /* maxctl provided by common layer */
3437         if (WARN_ON(!bus_if->maxctl))
3438                 return -EINVAL;
3439
3440         /* Allocate control receive buffer */
3441         bus_if->maxctl += bus->roundup;
3442         value = roundup((bus_if->maxctl + SDPCM_HDRLEN), ALIGNMENT);
3443         value += bus->head_align;
3444         bus->rxbuf = kmalloc(value, GFP_ATOMIC);
3445         if (bus->rxbuf)
3446                 bus->rxblen = value;
3447
3448         /* the commands below use the terms tx and rx from
3449          * a device perspective, ie. bus:txglom affects the
3450          * bus transfers from device to host.
3451          */
3452         if (core->rev < 12) {
3453                 /* for sdio core rev < 12, disable txgloming */
3454                 value = 0;
3455                 err = brcmf_iovar_data_set(dev, "bus:txglom", &value,
3456                                            sizeof(u32));
3457         } else {
3458                 /* otherwise, set txglomalign */
3459                 value = sdiodev->settings->bus.sdio.sd_sgentry_align;
3460                 /* SDIO ADMA requires at least 32 bit alignment */
3461                 value = max_t(u32, value, ALIGNMENT);
3462                 err = brcmf_iovar_data_set(dev, "bus:txglomalign", &value,
3463                                            sizeof(u32));
3464         }
3465
3466         if (err < 0)
3467                 goto done;
3468
3469         bus->tx_hdrlen = SDPCM_HWHDR_LEN + SDPCM_SWHDR_LEN;
3470         if (sdiodev->sg_support) {
3471                 bus->txglom = false;
3472                 value = 1;
3473                 pad_size = bus->sdiodev->func2->cur_blksize << 1;
3474                 err = brcmf_iovar_data_set(bus->sdiodev->dev, "bus:rxglom",
3475                                            &value, sizeof(u32));
3476                 if (err < 0) {
3477                         /* bus:rxglom is allowed to fail */
3478                         err = 0;
3479                 } else {
3480                         bus->txglom = true;
3481                         bus->tx_hdrlen += SDPCM_HWEXT_LEN;
3482                 }
3483         }
3484         brcmf_bus_add_txhdrlen(bus->sdiodev->dev, bus->tx_hdrlen);
3485
3486 done:
3487         return err;
3488 }
3489
3490 static size_t brcmf_sdio_bus_get_ramsize(struct device *dev)
3491 {
3492         struct brcmf_bus *bus_if = dev_get_drvdata(dev);
3493         struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
3494         struct brcmf_sdio *bus = sdiodev->bus;
3495
3496         return bus->ci->ramsize - bus->ci->srsize;
3497 }
3498
3499 static int brcmf_sdio_bus_get_memdump(struct device *dev, void *data,
3500                                       size_t mem_size)
3501 {
3502         struct brcmf_bus *bus_if = dev_get_drvdata(dev);
3503         struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
3504         struct brcmf_sdio *bus = sdiodev->bus;
3505         int err;
3506         int address;
3507         int offset;
3508         int len;
3509
3510         brcmf_dbg(INFO, "dump at 0x%08x: size=%zu\n", bus->ci->rambase,
3511                   mem_size);
3512
3513         address = bus->ci->rambase;
3514         offset = err = 0;
3515         sdio_claim_host(sdiodev->func1);
3516         while (offset < mem_size) {
3517                 len = ((offset + MEMBLOCK) < mem_size) ? MEMBLOCK :
3518                       mem_size - offset;
3519                 err = brcmf_sdiod_ramrw(sdiodev, false, address, data, len);
3520                 if (err) {
3521                         brcmf_err("error %d on reading %d membytes at 0x%08x\n",
3522                                   err, len, address);
3523                         goto done;
3524                 }
3525                 data += len;
3526                 offset += len;
3527                 address += len;
3528         }
3529
3530 done:
3531         sdio_release_host(sdiodev->func1);
3532         return err;
3533 }
3534
3535 void brcmf_sdio_trigger_dpc(struct brcmf_sdio *bus)
3536 {
3537         if (!bus->dpc_triggered) {
3538                 bus->dpc_triggered = true;
3539                 queue_work(bus->brcmf_wq, &bus->datawork);
3540         }
3541 }
3542
3543 void brcmf_sdio_isr(struct brcmf_sdio *bus)
3544 {
3545         brcmf_dbg(TRACE, "Enter\n");
3546
3547         if (!bus) {
3548                 brcmf_err("bus is null pointer, exiting\n");
3549                 return;
3550         }
3551
3552         /* Count the interrupt call */
3553         bus->sdcnt.intrcount++;
3554         if (in_interrupt())
3555                 atomic_set(&bus->ipend, 1);
3556         else
3557                 if (brcmf_sdio_intr_rstatus(bus)) {
3558                         brcmf_err("failed backplane access\n");
3559                 }
3560
3561         /* Disable additional interrupts (is this needed now)? */
3562         if (!bus->intr)
3563                 brcmf_err("isr w/o interrupt configured!\n");
3564
3565         bus->dpc_triggered = true;
3566         queue_work(bus->brcmf_wq, &bus->datawork);
3567 }
3568
3569 static void brcmf_sdio_bus_watchdog(struct brcmf_sdio *bus)
3570 {
3571         brcmf_dbg(TIMER, "Enter\n");
3572
3573         /* Poll period: check device if appropriate. */
3574         if (!bus->sr_enabled &&
3575             bus->poll && (++bus->polltick >= bus->pollrate)) {
3576                 u32 intstatus = 0;
3577
3578                 /* Reset poll tick */
3579                 bus->polltick = 0;
3580
3581                 /* Check device if no interrupts */
3582                 if (!bus->intr ||
3583                     (bus->sdcnt.intrcount == bus->sdcnt.lastintrs)) {
3584
3585                         if (!bus->dpc_triggered) {
3586                                 u8 devpend;
3587
3588                                 sdio_claim_host(bus->sdiodev->func1);
3589                                 devpend = brcmf_sdiod_func0_rb(bus->sdiodev,
3590                                                   SDIO_CCCR_INTx, NULL);
3591                                 sdio_release_host(bus->sdiodev->func1);
3592                                 intstatus = devpend & (INTR_STATUS_FUNC1 |
3593                                                        INTR_STATUS_FUNC2);
3594                         }
3595
3596                         /* If there is something, make like the ISR and
3597                                  schedule the DPC */
3598                         if (intstatus) {
3599                                 bus->sdcnt.pollcnt++;
3600                                 atomic_set(&bus->ipend, 1);
3601
3602                                 bus->dpc_triggered = true;
3603                                 queue_work(bus->brcmf_wq, &bus->datawork);
3604                         }
3605                 }
3606
3607                 /* Update interrupt tracking */
3608                 bus->sdcnt.lastintrs = bus->sdcnt.intrcount;
3609         }
3610 #ifdef DEBUG
3611         /* Poll for console output periodically */
3612         if (bus->sdiodev->state == BRCMF_SDIOD_DATA && BRCMF_FWCON_ON() &&
3613             bus->console_interval != 0) {
3614                 bus->console.count += jiffies_to_msecs(BRCMF_WD_POLL);
3615                 if (bus->console.count >= bus->console_interval) {
3616                         bus->console.count -= bus->console_interval;
3617                         sdio_claim_host(bus->sdiodev->func1);
3618                         /* Make sure backplane clock is on */
3619                         brcmf_sdio_bus_sleep(bus, false, false);
3620                         if (brcmf_sdio_readconsole(bus) < 0)
3621                                 /* stop on error */
3622                                 bus->console_interval = 0;
3623                         sdio_release_host(bus->sdiodev->func1);
3624                 }
3625         }
3626 #endif                          /* DEBUG */
3627
3628         /* On idle timeout clear activity flag and/or turn off clock */
3629         if (!bus->dpc_triggered) {
3630                 rmb();
3631                 if ((!bus->dpc_running) && (bus->idletime > 0) &&
3632                     (bus->clkstate == CLK_AVAIL)) {
3633                         bus->idlecount++;
3634                         if (bus->idlecount > bus->idletime) {
3635                                 brcmf_dbg(SDIO, "idle\n");
3636                                 sdio_claim_host(bus->sdiodev->func1);
3637 #ifdef DEBUG
3638                                 if (!BRCMF_FWCON_ON() ||
3639                                     bus->console_interval == 0)
3640 #endif
3641                                         brcmf_sdio_wd_timer(bus, false);
3642                                 bus->idlecount = 0;
3643                                 brcmf_sdio_bus_sleep(bus, true, false);
3644                                 sdio_release_host(bus->sdiodev->func1);
3645                         }
3646                 } else {
3647                         bus->idlecount = 0;
3648                 }
3649         } else {
3650                 bus->idlecount = 0;
3651         }
3652 }
3653
3654 static void brcmf_sdio_dataworker(struct work_struct *work)
3655 {
3656         struct brcmf_sdio *bus = container_of(work, struct brcmf_sdio,
3657                                               datawork);
3658
3659         bus->dpc_running = true;
3660         wmb();
3661         while (READ_ONCE(bus->dpc_triggered)) {
3662                 bus->dpc_triggered = false;
3663                 brcmf_sdio_dpc(bus);
3664                 bus->idlecount = 0;
3665         }
3666         bus->dpc_running = false;
3667         if (brcmf_sdiod_freezing(bus->sdiodev)) {
3668                 brcmf_sdiod_change_state(bus->sdiodev, BRCMF_SDIOD_DOWN);
3669                 brcmf_sdiod_try_freeze(bus->sdiodev);
3670                 brcmf_sdiod_change_state(bus->sdiodev, BRCMF_SDIOD_DATA);
3671         }
3672 }
3673
3674 static void
3675 brcmf_sdio_drivestrengthinit(struct brcmf_sdio_dev *sdiodev,
3676                              struct brcmf_chip *ci, u32 drivestrength)
3677 {
3678         const struct sdiod_drive_str *str_tab = NULL;
3679         u32 str_mask;
3680         u32 str_shift;
3681         u32 i;
3682         u32 drivestrength_sel = 0;
3683         u32 cc_data_temp;
3684         u32 addr;
3685
3686         if (!(ci->cc_caps & CC_CAP_PMU))
3687                 return;
3688
3689         switch (SDIOD_DRVSTR_KEY(ci->chip, ci->pmurev)) {
3690         case SDIOD_DRVSTR_KEY(BRCM_CC_4330_CHIP_ID, 12):
3691                 str_tab = sdiod_drvstr_tab1_1v8;
3692                 str_mask = 0x00003800;
3693                 str_shift = 11;
3694                 break;
3695         case SDIOD_DRVSTR_KEY(BRCM_CC_4334_CHIP_ID, 17):
3696                 str_tab = sdiod_drvstr_tab6_1v8;
3697                 str_mask = 0x00001800;
3698                 str_shift = 11;
3699                 break;
3700         case SDIOD_DRVSTR_KEY(BRCM_CC_43143_CHIP_ID, 17):
3701                 /* note: 43143 does not support tristate */
3702                 i = ARRAY_SIZE(sdiod_drvstr_tab2_3v3) - 1;
3703                 if (drivestrength >= sdiod_drvstr_tab2_3v3[i].strength) {
3704                         str_tab = sdiod_drvstr_tab2_3v3;
3705                         str_mask = 0x00000007;
3706                         str_shift = 0;
3707                 } else
3708                         brcmf_err("Invalid SDIO Drive strength for chip %s, strength=%d\n",
3709                                   ci->name, drivestrength);
3710                 break;
3711         case SDIOD_DRVSTR_KEY(BRCM_CC_43362_CHIP_ID, 13):
3712                 str_tab = sdiod_drive_strength_tab5_1v8;
3713                 str_mask = 0x00003800;
3714                 str_shift = 11;
3715                 break;
3716         default:
3717                 brcmf_dbg(INFO, "No SDIO driver strength init needed for chip %s rev %d pmurev %d\n",
3718                           ci->name, ci->chiprev, ci->pmurev);
3719                 break;
3720         }
3721
3722         if (str_tab != NULL) {
3723                 struct brcmf_core *pmu = brcmf_chip_get_pmu(ci);
3724
3725                 for (i = 0; str_tab[i].strength != 0; i++) {
3726                         if (drivestrength >= str_tab[i].strength) {
3727                                 drivestrength_sel = str_tab[i].sel;
3728                                 break;
3729                         }
3730                 }
3731                 addr = CORE_CC_REG(pmu->base, chipcontrol_addr);
3732                 brcmf_sdiod_writel(sdiodev, addr, 1, NULL);
3733                 cc_data_temp = brcmf_sdiod_readl(sdiodev, addr, NULL);
3734                 cc_data_temp &= ~str_mask;
3735                 drivestrength_sel <<= str_shift;
3736                 cc_data_temp |= drivestrength_sel;
3737                 brcmf_sdiod_writel(sdiodev, addr, cc_data_temp, NULL);
3738
3739                 brcmf_dbg(INFO, "SDIO: %d mA (req=%d mA) drive strength selected, set to 0x%08x\n",
3740                           str_tab[i].strength, drivestrength, cc_data_temp);
3741         }
3742 }
3743
3744 static int brcmf_sdio_buscoreprep(void *ctx)
3745 {
3746         struct brcmf_sdio_dev *sdiodev = ctx;
3747         int err = 0;
3748         u8 clkval, clkset;
3749
3750         /* Try forcing SDIO core to do ALPAvail request only */
3751         clkset = SBSDIO_FORCE_HW_CLKREQ_OFF | SBSDIO_ALP_AVAIL_REQ;
3752         brcmf_sdiod_writeb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR, clkset, &err);
3753         if (err) {
3754                 brcmf_err("error writing for HT off\n");
3755                 return err;
3756         }
3757
3758         /* If register supported, wait for ALPAvail and then force ALP */
3759         /* This may take up to 15 milliseconds */
3760         clkval = brcmf_sdiod_readb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR, NULL);
3761
3762         if ((clkval & ~SBSDIO_AVBITS) != clkset) {
3763                 brcmf_err("ChipClkCSR access: wrote 0x%02x read 0x%02x\n",
3764                           clkset, clkval);
3765                 return -EACCES;
3766         }
3767
3768         SPINWAIT(((clkval = brcmf_sdiod_readb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
3769                                               NULL)),
3770                  !SBSDIO_ALPAV(clkval)),
3771                  PMU_MAX_TRANSITION_DLY);
3772
3773         if (!SBSDIO_ALPAV(clkval)) {
3774                 brcmf_err("timeout on ALPAV wait, clkval 0x%02x\n",
3775                           clkval);
3776                 return -EBUSY;
3777         }
3778
3779         clkset = SBSDIO_FORCE_HW_CLKREQ_OFF | SBSDIO_FORCE_ALP;
3780         brcmf_sdiod_writeb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR, clkset, &err);
3781         udelay(65);
3782
3783         /* Also, disable the extra SDIO pull-ups */
3784         brcmf_sdiod_writeb(sdiodev, SBSDIO_FUNC1_SDIOPULLUP, 0, NULL);
3785
3786         return 0;
3787 }
3788
3789 static void brcmf_sdio_buscore_activate(void *ctx, struct brcmf_chip *chip,
3790                                         u32 rstvec)
3791 {
3792         struct brcmf_sdio_dev *sdiodev = ctx;
3793         struct brcmf_core *core = sdiodev->bus->sdio_core;
3794         u32 reg_addr;
3795
3796         /* clear all interrupts */
3797         reg_addr = core->base + SD_REG(intstatus);
3798         brcmf_sdiod_writel(sdiodev, reg_addr, 0xFFFFFFFF, NULL);
3799
3800         if (rstvec)
3801                 /* Write reset vector to address 0 */
3802                 brcmf_sdiod_ramrw(sdiodev, true, 0, (void *)&rstvec,
3803                                   sizeof(rstvec));
3804 }
3805
3806 static u32 brcmf_sdio_buscore_read32(void *ctx, u32 addr)
3807 {
3808         struct brcmf_sdio_dev *sdiodev = ctx;
3809         u32 val, rev;
3810
3811         val = brcmf_sdiod_readl(sdiodev, addr, NULL);
3812
3813         /*
3814          * this is a bit of special handling if reading the chipcommon chipid
3815          * register. The 4339 is a next-gen of the 4335. It uses the same
3816          * SDIO device id as 4335 and the chipid register returns 4335 as well.
3817          * It can be identified as 4339 by looking at the chip revision. It
3818          * is corrected here so the chip.c module has the right info.
3819          */
3820         if (addr == CORE_CC_REG(SI_ENUM_BASE, chipid) &&
3821             (sdiodev->func1->device == SDIO_DEVICE_ID_BROADCOM_4339 ||
3822              sdiodev->func1->device == SDIO_DEVICE_ID_BROADCOM_4335_4339)) {
3823                 rev = (val & CID_REV_MASK) >> CID_REV_SHIFT;
3824                 if (rev >= 2) {
3825                         val &= ~CID_ID_MASK;
3826                         val |= BRCM_CC_4339_CHIP_ID;
3827                 }
3828         }
3829
3830         return val;
3831 }
3832
3833 static void brcmf_sdio_buscore_write32(void *ctx, u32 addr, u32 val)
3834 {
3835         struct brcmf_sdio_dev *sdiodev = ctx;
3836
3837         brcmf_sdiod_writel(sdiodev, addr, val, NULL);
3838 }
3839
3840 static const struct brcmf_buscore_ops brcmf_sdio_buscore_ops = {
3841         .prepare = brcmf_sdio_buscoreprep,
3842         .activate = brcmf_sdio_buscore_activate,
3843         .read32 = brcmf_sdio_buscore_read32,
3844         .write32 = brcmf_sdio_buscore_write32,
3845 };
3846
3847 static bool
3848 brcmf_sdio_probe_attach(struct brcmf_sdio *bus)
3849 {
3850         struct brcmf_sdio_dev *sdiodev;
3851         u8 clkctl = 0;
3852         int err = 0;
3853         int reg_addr;
3854         u32 reg_val;
3855         u32 drivestrength;
3856
3857         sdiodev = bus->sdiodev;
3858         sdio_claim_host(sdiodev->func1);
3859
3860         pr_debug("F1 signature read @0x18000000=0x%4x\n",
3861                  brcmf_sdiod_readl(sdiodev, SI_ENUM_BASE, NULL));
3862
3863         /*
3864          * Force PLL off until brcmf_chip_attach()
3865          * programs PLL control regs
3866          */
3867
3868         brcmf_sdiod_writeb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR, BRCMF_INIT_CLKCTL1,
3869                            &err);
3870         if (!err)
3871                 clkctl = brcmf_sdiod_readb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
3872                                            &err);
3873
3874         if (err || ((clkctl & ~SBSDIO_AVBITS) != BRCMF_INIT_CLKCTL1)) {
3875                 brcmf_err("ChipClkCSR access: err %d wrote 0x%02x read 0x%02x\n",
3876                           err, BRCMF_INIT_CLKCTL1, clkctl);
3877                 goto fail;
3878         }
3879
3880         bus->ci = brcmf_chip_attach(sdiodev, &brcmf_sdio_buscore_ops);
3881         if (IS_ERR(bus->ci)) {
3882                 brcmf_err("brcmf_chip_attach failed!\n");
3883                 bus->ci = NULL;
3884                 goto fail;
3885         }
3886
3887         /* Pick up the SDIO core info struct from chip.c */
3888         bus->sdio_core   = brcmf_chip_get_core(bus->ci, BCMA_CORE_SDIO_DEV);
3889         if (!bus->sdio_core)
3890                 goto fail;
3891
3892         /* Pick up the CHIPCOMMON core info struct, for bulk IO in bcmsdh.c */
3893         sdiodev->cc_core = brcmf_chip_get_core(bus->ci, BCMA_CORE_CHIPCOMMON);
3894         if (!sdiodev->cc_core)
3895                 goto fail;
3896
3897         sdiodev->settings = brcmf_get_module_param(sdiodev->dev,
3898                                                    BRCMF_BUSTYPE_SDIO,
3899                                                    bus->ci->chip,
3900                                                    bus->ci->chiprev);
3901         if (!sdiodev->settings) {
3902                 brcmf_err("Failed to get device parameters\n");
3903                 goto fail;
3904         }
3905         /* platform specific configuration:
3906          *   alignments must be at least 4 bytes for ADMA
3907          */
3908         bus->head_align = ALIGNMENT;
3909         bus->sgentry_align = ALIGNMENT;
3910         if (sdiodev->settings->bus.sdio.sd_head_align > ALIGNMENT)
3911                 bus->head_align = sdiodev->settings->bus.sdio.sd_head_align;
3912         if (sdiodev->settings->bus.sdio.sd_sgentry_align > ALIGNMENT)
3913                 bus->sgentry_align =
3914                                 sdiodev->settings->bus.sdio.sd_sgentry_align;
3915
3916         /* allocate scatter-gather table. sg support
3917          * will be disabled upon allocation failure.
3918          */
3919         brcmf_sdiod_sgtable_alloc(sdiodev);
3920
3921 #ifdef CONFIG_PM_SLEEP
3922         /* wowl can be supported when KEEP_POWER is true and (WAKE_SDIO_IRQ
3923          * is true or when platform data OOB irq is true).
3924          */
3925         if ((sdio_get_host_pm_caps(sdiodev->func1) & MMC_PM_KEEP_POWER) &&
3926             ((sdio_get_host_pm_caps(sdiodev->func1) & MMC_PM_WAKE_SDIO_IRQ) ||
3927              (sdiodev->settings->bus.sdio.oob_irq_supported)))
3928                 sdiodev->bus_if->wowl_supported = true;
3929 #endif
3930
3931         if (brcmf_sdio_kso_init(bus)) {
3932                 brcmf_err("error enabling KSO\n");
3933                 goto fail;
3934         }
3935
3936         if (sdiodev->settings->bus.sdio.drive_strength)
3937                 drivestrength = sdiodev->settings->bus.sdio.drive_strength;
3938         else
3939                 drivestrength = DEFAULT_SDIO_DRIVE_STRENGTH;
3940         brcmf_sdio_drivestrengthinit(sdiodev, bus->ci, drivestrength);
3941
3942         /* Set card control so an SDIO card reset does a WLAN backplane reset */
3943         reg_val = brcmf_sdiod_func0_rb(sdiodev, SDIO_CCCR_BRCM_CARDCTRL, &err);
3944         if (err)
3945                 goto fail;
3946
3947         reg_val |= SDIO_CCCR_BRCM_CARDCTRL_WLANRESET;
3948
3949         brcmf_sdiod_func0_wb(sdiodev, SDIO_CCCR_BRCM_CARDCTRL, reg_val, &err);
3950         if (err)
3951                 goto fail;
3952
3953         /* set PMUControl so a backplane reset does PMU state reload */
3954         reg_addr = CORE_CC_REG(brcmf_chip_get_pmu(bus->ci)->base, pmucontrol);
3955         reg_val = brcmf_sdiod_readl(sdiodev, reg_addr, &err);
3956         if (err)
3957                 goto fail;
3958
3959         reg_val |= (BCMA_CC_PMU_CTL_RES_RELOAD << BCMA_CC_PMU_CTL_RES_SHIFT);
3960
3961         brcmf_sdiod_writel(sdiodev, reg_addr, reg_val, &err);
3962         if (err)
3963                 goto fail;
3964
3965         sdio_release_host(sdiodev->func1);
3966
3967         brcmu_pktq_init(&bus->txq, (PRIOMASK + 1), TXQLEN);
3968
3969         /* allocate header buffer */
3970         bus->hdrbuf = kzalloc(MAX_HDR_READ + bus->head_align, GFP_KERNEL);
3971         if (!bus->hdrbuf)
3972                 return false;
3973         /* Locate an appropriately-aligned portion of hdrbuf */
3974         bus->rxhdr = (u8 *) roundup((unsigned long)&bus->hdrbuf[0],
3975                                     bus->head_align);
3976
3977         /* Set the poll and/or interrupt flags */
3978         bus->intr = true;
3979         bus->poll = false;
3980         if (bus->poll)
3981                 bus->pollrate = 1;
3982
3983         return true;
3984
3985 fail:
3986         sdio_release_host(sdiodev->func1);
3987         return false;
3988 }
3989
3990 static int
3991 brcmf_sdio_watchdog_thread(void *data)
3992 {
3993         struct brcmf_sdio *bus = (struct brcmf_sdio *)data;
3994         int wait;
3995
3996         allow_signal(SIGTERM);
3997         /* Run until signal received */
3998         brcmf_sdiod_freezer_count(bus->sdiodev);
3999         while (1) {
4000                 if (kthread_should_stop())
4001                         break;
4002                 brcmf_sdiod_freezer_uncount(bus->sdiodev);
4003                 wait = wait_for_completion_interruptible(&bus->watchdog_wait);
4004                 brcmf_sdiod_freezer_count(bus->sdiodev);
4005                 brcmf_sdiod_try_freeze(bus->sdiodev);
4006                 if (!wait) {
4007                         brcmf_sdio_bus_watchdog(bus);
4008                         /* Count the tick for reference */
4009                         bus->sdcnt.tickcnt++;
4010                         reinit_completion(&bus->watchdog_wait);
4011                 } else
4012                         break;
4013         }
4014         return 0;
4015 }
4016
4017 static void
4018 brcmf_sdio_watchdog(struct timer_list *t)
4019 {
4020         struct brcmf_sdio *bus = from_timer(bus, t, timer);
4021
4022         if (bus->watchdog_tsk) {
4023                 complete(&bus->watchdog_wait);
4024                 /* Reschedule the watchdog */
4025                 if (bus->wd_active)
4026                         mod_timer(&bus->timer,
4027                                   jiffies + BRCMF_WD_POLL);
4028         }
4029 }
4030
4031 static
4032 int brcmf_sdio_get_fwname(struct device *dev, const char *ext, u8 *fw_name)
4033 {
4034         struct brcmf_bus *bus_if = dev_get_drvdata(dev);
4035         struct brcmf_fw_request *fwreq;
4036         struct brcmf_fw_name fwnames[] = {
4037                 { ext, fw_name },
4038         };
4039
4040         fwreq = brcmf_fw_alloc_request(bus_if->chip, bus_if->chiprev,
4041                                        brcmf_sdio_fwnames,
4042                                        ARRAY_SIZE(brcmf_sdio_fwnames),
4043                                        fwnames, ARRAY_SIZE(fwnames));
4044         if (!fwreq)
4045                 return -ENOMEM;
4046
4047         kfree(fwreq);
4048         return 0;
4049 }
4050
4051 static const struct brcmf_bus_ops brcmf_sdio_bus_ops = {
4052         .stop = brcmf_sdio_bus_stop,
4053         .preinit = brcmf_sdio_bus_preinit,
4054         .txdata = brcmf_sdio_bus_txdata,
4055         .txctl = brcmf_sdio_bus_txctl,
4056         .rxctl = brcmf_sdio_bus_rxctl,
4057         .gettxq = brcmf_sdio_bus_gettxq,
4058         .wowl_config = brcmf_sdio_wowl_config,
4059         .get_ramsize = brcmf_sdio_bus_get_ramsize,
4060         .get_memdump = brcmf_sdio_bus_get_memdump,
4061         .get_fwname = brcmf_sdio_get_fwname,
4062         .debugfs_create = brcmf_sdio_debugfs_create
4063 };
4064
4065 #define BRCMF_SDIO_FW_CODE      0
4066 #define BRCMF_SDIO_FW_NVRAM     1
4067
4068 static void brcmf_sdio_firmware_callback(struct device *dev, int err,
4069                                          struct brcmf_fw_request *fwreq)
4070 {
4071         struct brcmf_bus *bus_if = dev_get_drvdata(dev);
4072         struct brcmf_sdio_dev *sdiod = bus_if->bus_priv.sdio;
4073         struct brcmf_sdio *bus = sdiod->bus;
4074         struct brcmf_core *core = bus->sdio_core;
4075         const struct firmware *code;
4076         void *nvram;
4077         u32 nvram_len;
4078         u8 saveclk;
4079         u8 devctl;
4080
4081         brcmf_dbg(TRACE, "Enter: dev=%s, err=%d\n", dev_name(dev), err);
4082
4083         if (err)
4084                 goto fail;
4085
4086         code = fwreq->items[BRCMF_SDIO_FW_CODE].binary;
4087         nvram = fwreq->items[BRCMF_SDIO_FW_NVRAM].nv_data.data;
4088         nvram_len = fwreq->items[BRCMF_SDIO_FW_NVRAM].nv_data.len;
4089         kfree(fwreq);
4090
4091         /* try to download image and nvram to the dongle */
4092         bus->alp_only = true;
4093         err = brcmf_sdio_download_firmware(bus, code, nvram, nvram_len);
4094         if (err)
4095                 goto fail;
4096         bus->alp_only = false;
4097
4098         /* Start the watchdog timer */
4099         bus->sdcnt.tickcnt = 0;
4100         brcmf_sdio_wd_timer(bus, true);
4101
4102         sdio_claim_host(sdiod->func1);
4103
4104         /* Make sure backplane clock is on, needed to generate F2 interrupt */
4105         brcmf_sdio_clkctl(bus, CLK_AVAIL, false);
4106         if (bus->clkstate != CLK_AVAIL)
4107                 goto release;
4108
4109         /* Force clocks on backplane to be sure F2 interrupt propagates */
4110         saveclk = brcmf_sdiod_readb(sdiod, SBSDIO_FUNC1_CHIPCLKCSR, &err);
4111         if (!err) {
4112                 brcmf_sdiod_writeb(sdiod, SBSDIO_FUNC1_CHIPCLKCSR,
4113                                    (saveclk | SBSDIO_FORCE_HT), &err);
4114         }
4115         if (err) {
4116                 brcmf_err("Failed to force clock for F2: err %d\n", err);
4117                 goto release;
4118         }
4119
4120         /* Enable function 2 (frame transfers) */
4121         brcmf_sdiod_writel(sdiod, core->base + SD_REG(tosbmailboxdata),
4122                            SDPCM_PROT_VERSION << SMB_DATA_VERSION_SHIFT, NULL);
4123
4124         err = sdio_enable_func(sdiod->func2);
4125
4126         brcmf_dbg(INFO, "enable F2: err=%d\n", err);
4127
4128         /* If F2 successfully enabled, set core and enable interrupts */
4129         if (!err) {
4130                 /* Set up the interrupt mask and enable interrupts */
4131                 bus->hostintmask = HOSTINTMASK;
4132                 brcmf_sdiod_writel(sdiod, core->base + SD_REG(hostintmask),
4133                                    bus->hostintmask, NULL);
4134
4135                 switch (sdiod->func1->device) {
4136                 case SDIO_DEVICE_ID_CYPRESS_4373:
4137                         brcmf_dbg(INFO, "set F2 watermark to 0x%x*4 bytes\n",
4138                                   CY_4373_F2_WATERMARK);
4139                         brcmf_sdiod_writeb(sdiod, SBSDIO_WATERMARK,
4140                                            CY_4373_F2_WATERMARK, &err);
4141                         devctl = brcmf_sdiod_readb(sdiod, SBSDIO_DEVICE_CTL,
4142                                                    &err);
4143                         devctl |= SBSDIO_DEVCTL_F2WM_ENAB;
4144                         brcmf_sdiod_writeb(sdiod, SBSDIO_DEVICE_CTL, devctl,
4145                                            &err);
4146                         brcmf_sdiod_writeb(sdiod, SBSDIO_FUNC1_MESBUSYCTRL,
4147                                            CY_4373_F2_WATERMARK |
4148                                            SBSDIO_MESBUSYCTRL_ENAB, &err);
4149                         break;
4150                 default:
4151                         brcmf_sdiod_writeb(sdiod, SBSDIO_WATERMARK,
4152                                            DEFAULT_F2_WATERMARK, &err);
4153                         break;
4154                 }
4155         } else {
4156                 /* Disable F2 again */
4157                 sdio_disable_func(sdiod->func2);
4158                 goto release;
4159         }
4160
4161         if (brcmf_chip_sr_capable(bus->ci)) {
4162                 brcmf_sdio_sr_init(bus);
4163         } else {
4164                 /* Restore previous clock setting */
4165                 brcmf_sdiod_writeb(sdiod, SBSDIO_FUNC1_CHIPCLKCSR,
4166                                    saveclk, &err);
4167         }
4168
4169         if (err == 0) {
4170                 /* Allow full data communication using DPC from now on. */
4171                 brcmf_sdiod_change_state(bus->sdiodev, BRCMF_SDIOD_DATA);
4172
4173                 err = brcmf_sdiod_intr_register(sdiod);
4174                 if (err != 0)
4175                         brcmf_err("intr register failed:%d\n", err);
4176         }
4177
4178         /* If we didn't come up, turn off backplane clock */
4179         if (err != 0)
4180                 brcmf_sdio_clkctl(bus, CLK_NONE, false);
4181
4182         sdio_release_host(sdiod->func1);
4183
4184         /* Assign bus interface call back */
4185         sdiod->bus_if->dev = sdiod->dev;
4186         sdiod->bus_if->ops = &brcmf_sdio_bus_ops;
4187         sdiod->bus_if->chip = bus->ci->chip;
4188         sdiod->bus_if->chiprev = bus->ci->chiprev;
4189
4190         /* Attach to the common layer, reserve hdr space */
4191         err = brcmf_attach(sdiod->dev, sdiod->settings);
4192         if (err != 0) {
4193                 brcmf_err("brcmf_attach failed\n");
4194                 goto fail;
4195         }
4196
4197         /* ready */
4198         return;
4199
4200 release:
4201         sdio_release_host(sdiod->func1);
4202 fail:
4203         brcmf_dbg(TRACE, "failed: dev=%s, err=%d\n", dev_name(dev), err);
4204         device_release_driver(&sdiod->func2->dev);
4205         device_release_driver(dev);
4206 }
4207
4208 static struct brcmf_fw_request *
4209 brcmf_sdio_prepare_fw_request(struct brcmf_sdio *bus)
4210 {
4211         struct brcmf_fw_request *fwreq;
4212         struct brcmf_fw_name fwnames[] = {
4213                 { ".bin", bus->sdiodev->fw_name },
4214                 { ".txt", bus->sdiodev->nvram_name },
4215         };
4216
4217         fwreq = brcmf_fw_alloc_request(bus->ci->chip, bus->ci->chiprev,
4218                                        brcmf_sdio_fwnames,
4219                                        ARRAY_SIZE(brcmf_sdio_fwnames),
4220                                        fwnames, ARRAY_SIZE(fwnames));
4221         if (!fwreq)
4222                 return NULL;
4223
4224         fwreq->items[BRCMF_SDIO_FW_CODE].type = BRCMF_FW_TYPE_BINARY;
4225         fwreq->items[BRCMF_SDIO_FW_NVRAM].type = BRCMF_FW_TYPE_NVRAM;
4226
4227         return fwreq;
4228 }
4229
4230 struct brcmf_sdio *brcmf_sdio_probe(struct brcmf_sdio_dev *sdiodev)
4231 {
4232         int ret;
4233         struct brcmf_sdio *bus;
4234         struct workqueue_struct *wq;
4235         struct brcmf_fw_request *fwreq;
4236
4237         brcmf_dbg(TRACE, "Enter\n");
4238
4239         /* Allocate private bus interface state */
4240         bus = kzalloc(sizeof(struct brcmf_sdio), GFP_ATOMIC);
4241         if (!bus)
4242                 goto fail;
4243
4244         bus->sdiodev = sdiodev;
4245         sdiodev->bus = bus;
4246         skb_queue_head_init(&bus->glom);
4247         bus->txbound = BRCMF_TXBOUND;
4248         bus->rxbound = BRCMF_RXBOUND;
4249         bus->txminmax = BRCMF_TXMINMAX;
4250         bus->tx_seq = SDPCM_SEQ_WRAP - 1;
4251
4252         /* single-threaded workqueue */
4253         wq = alloc_ordered_workqueue("brcmf_wq/%s", WQ_MEM_RECLAIM,
4254                                      dev_name(&sdiodev->func1->dev));
4255         if (!wq) {
4256                 brcmf_err("insufficient memory to create txworkqueue\n");
4257                 goto fail;
4258         }
4259         brcmf_sdiod_freezer_count(sdiodev);
4260         INIT_WORK(&bus->datawork, brcmf_sdio_dataworker);
4261         bus->brcmf_wq = wq;
4262
4263         /* attempt to attach to the dongle */
4264         if (!(brcmf_sdio_probe_attach(bus))) {
4265                 brcmf_err("brcmf_sdio_probe_attach failed\n");
4266                 goto fail;
4267         }
4268
4269         spin_lock_init(&bus->rxctl_lock);
4270         spin_lock_init(&bus->txq_lock);
4271         init_waitqueue_head(&bus->ctrl_wait);
4272         init_waitqueue_head(&bus->dcmd_resp_wait);
4273
4274         /* Set up the watchdog timer */
4275         timer_setup(&bus->timer, brcmf_sdio_watchdog, 0);
4276         /* Initialize watchdog thread */
4277         init_completion(&bus->watchdog_wait);
4278         bus->watchdog_tsk = kthread_run(brcmf_sdio_watchdog_thread,
4279                                         bus, "brcmf_wdog/%s",
4280                                         dev_name(&sdiodev->func1->dev));
4281         if (IS_ERR(bus->watchdog_tsk)) {
4282                 pr_warn("brcmf_watchdog thread failed to start\n");
4283                 bus->watchdog_tsk = NULL;
4284         }
4285         /* Initialize DPC thread */
4286         bus->dpc_triggered = false;
4287         bus->dpc_running = false;
4288
4289         /* default sdio bus header length for tx packet */
4290         bus->tx_hdrlen = SDPCM_HWHDR_LEN + SDPCM_SWHDR_LEN;
4291
4292         /* Query the F2 block size, set roundup accordingly */
4293         bus->blocksize = bus->sdiodev->func2->cur_blksize;
4294         bus->roundup = min(max_roundup, bus->blocksize);
4295
4296         sdio_claim_host(bus->sdiodev->func1);
4297
4298         /* Disable F2 to clear any intermediate frame state on the dongle */
4299         sdio_disable_func(bus->sdiodev->func2);
4300
4301         bus->rxflow = false;
4302
4303         /* Done with backplane-dependent accesses, can drop clock... */
4304         brcmf_sdiod_writeb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR, 0, NULL);
4305
4306         sdio_release_host(bus->sdiodev->func1);
4307
4308         /* ...and initialize clock/power states */
4309         bus->clkstate = CLK_SDONLY;
4310         bus->idletime = BRCMF_IDLE_INTERVAL;
4311         bus->idleclock = BRCMF_IDLE_ACTIVE;
4312
4313         /* SR state */
4314         bus->sr_enabled = false;
4315
4316         brcmf_dbg(INFO, "completed!!\n");
4317
4318         fwreq = brcmf_sdio_prepare_fw_request(bus);
4319         if (!fwreq) {
4320                 ret = -ENOMEM;
4321                 goto fail;
4322         }
4323
4324         ret = brcmf_fw_get_firmwares(sdiodev->dev, fwreq,
4325                                      brcmf_sdio_firmware_callback);
4326         if (ret != 0) {
4327                 brcmf_err("async firmware request failed: %d\n", ret);
4328                 kfree(fwreq);
4329                 goto fail;
4330         }
4331
4332         return bus;
4333
4334 fail:
4335         brcmf_sdio_remove(bus);
4336         return NULL;
4337 }
4338
4339 /* Detach and free everything */
4340 void brcmf_sdio_remove(struct brcmf_sdio *bus)
4341 {
4342         brcmf_dbg(TRACE, "Enter\n");
4343
4344         if (bus) {
4345                 /* Stop watchdog task */
4346                 if (bus->watchdog_tsk) {
4347                         send_sig(SIGTERM, bus->watchdog_tsk, 1);
4348                         kthread_stop(bus->watchdog_tsk);
4349                         bus->watchdog_tsk = NULL;
4350                 }
4351
4352                 /* De-register interrupt handler */
4353                 brcmf_sdiod_intr_unregister(bus->sdiodev);
4354
4355                 brcmf_detach(bus->sdiodev->dev);
4356
4357                 cancel_work_sync(&bus->datawork);
4358                 if (bus->brcmf_wq)
4359                         destroy_workqueue(bus->brcmf_wq);
4360
4361                 if (bus->ci) {
4362                         if (bus->sdiodev->state != BRCMF_SDIOD_NOMEDIUM) {
4363                                 sdio_claim_host(bus->sdiodev->func1);
4364                                 brcmf_sdio_wd_timer(bus, false);
4365                                 brcmf_sdio_clkctl(bus, CLK_AVAIL, false);
4366                                 /* Leave the device in state where it is
4367                                  * 'passive'. This is done by resetting all
4368                                  * necessary cores.
4369                                  */
4370                                 msleep(20);
4371                                 brcmf_chip_set_passive(bus->ci);
4372                                 brcmf_sdio_clkctl(bus, CLK_NONE, false);
4373                                 sdio_release_host(bus->sdiodev->func1);
4374                         }
4375                         brcmf_chip_detach(bus->ci);
4376                 }
4377                 if (bus->sdiodev->settings)
4378                         brcmf_release_module_param(bus->sdiodev->settings);
4379
4380                 kfree(bus->rxbuf);
4381                 kfree(bus->hdrbuf);
4382                 kfree(bus);
4383         }
4384
4385         brcmf_dbg(TRACE, "Disconnected\n");
4386 }
4387
4388 void brcmf_sdio_wd_timer(struct brcmf_sdio *bus, bool active)
4389 {
4390         /* Totally stop the timer */
4391         if (!active && bus->wd_active) {
4392                 del_timer_sync(&bus->timer);
4393                 bus->wd_active = false;
4394                 return;
4395         }
4396
4397         /* don't start the wd until fw is loaded */
4398         if (bus->sdiodev->state != BRCMF_SDIOD_DATA)
4399                 return;
4400
4401         if (active) {
4402                 if (!bus->wd_active) {
4403                         /* Create timer again when watchdog period is
4404                            dynamically changed or in the first instance
4405                          */
4406                         bus->timer.expires = jiffies + BRCMF_WD_POLL;
4407                         add_timer(&bus->timer);
4408                         bus->wd_active = true;
4409                 } else {
4410                         /* Re arm the timer, at last watchdog period */
4411                         mod_timer(&bus->timer, jiffies + BRCMF_WD_POLL);
4412                 }
4413         }
4414 }
4415
4416 int brcmf_sdio_sleep(struct brcmf_sdio *bus, bool sleep)
4417 {
4418         int ret;
4419
4420         sdio_claim_host(bus->sdiodev->func1);
4421         ret = brcmf_sdio_bus_sleep(bus, sleep, false);
4422         sdio_release_host(bus->sdiodev->func1);
4423
4424         return ret;
4425 }
4426