3 * Broadcom B43legacy wireless driver
5 * Copyright (c) 2005 Martin Langer <martin-langer@gmx.de>
6 * Copyright (c) 2005-2008 Stefano Brivio <stefano.brivio@polimi.it>
7 * Copyright (c) 2005, 2006 Michael Buesch <m@bues.ch>
8 * Copyright (c) 2005 Danny van Dyk <kugelfang@gentoo.org>
9 * Copyright (c) 2005 Andreas Jaggi <andreas.jaggi@waterwave.ch>
10 * Copyright (c) 2007 Larry Finger <Larry.Finger@lwfinger.net>
12 * Some parts of the code in this file are derived from the ipw2200
13 * driver Copyright(c) 2003 - 2004 Intel Corporation.
15 * This program is free software; you can redistribute it and/or modify
16 * it under the terms of the GNU General Public License as published by
17 * the Free Software Foundation; either version 2 of the License, or
18 * (at your option) any later version.
20 * This program is distributed in the hope that it will be useful,
21 * but WITHOUT ANY WARRANTY; without even the implied warranty of
22 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
23 * GNU General Public License for more details.
25 * You should have received a copy of the GNU General Public License
26 * along with this program; see the file COPYING. If not, write to
27 * the Free Software Foundation, Inc., 51 Franklin Steet, Fifth Floor,
28 * Boston, MA 02110-1301, USA.
32 #include <linux/delay.h>
33 #include <linux/init.h>
34 #include <linux/module.h>
35 #include <linux/if_arp.h>
36 #include <linux/etherdevice.h>
37 #include <linux/firmware.h>
38 #include <linux/workqueue.h>
39 #include <linux/sched.h>
40 #include <linux/skbuff.h>
41 #include <linux/dma-mapping.h>
42 #include <linux/slab.h>
44 #include <asm/unaligned.h>
46 #include "b43legacy.h"
57 MODULE_DESCRIPTION("Broadcom B43legacy wireless driver");
58 MODULE_AUTHOR("Martin Langer");
59 MODULE_AUTHOR("Stefano Brivio");
60 MODULE_AUTHOR("Michael Buesch");
61 MODULE_LICENSE("GPL");
65 #if defined(CONFIG_B43LEGACY_DMA) && defined(CONFIG_B43LEGACY_PIO)
66 static int modparam_pio;
67 module_param_named(pio, modparam_pio, int, 0444);
68 MODULE_PARM_DESC(pio, "enable(1) / disable(0) PIO mode");
69 #elif defined(CONFIG_B43LEGACY_DMA)
70 # define modparam_pio 0
71 #elif defined(CONFIG_B43LEGACY_PIO)
72 # define modparam_pio 1
75 static int modparam_bad_frames_preempt;
76 module_param_named(bad_frames_preempt, modparam_bad_frames_preempt, int, 0444);
77 MODULE_PARM_DESC(bad_frames_preempt, "enable(1) / disable(0) Bad Frames"
80 static char modparam_fwpostfix[16];
81 module_param_string(fwpostfix, modparam_fwpostfix, 16, 0444);
82 MODULE_PARM_DESC(fwpostfix, "Postfix for the firmware files to load.");
84 /* The following table supports BCM4301, BCM4303 and BCM4306/2 devices. */
85 static const struct ssb_device_id b43legacy_ssb_tbl[] = {
86 SSB_DEVICE(SSB_VENDOR_BROADCOM, SSB_DEV_80211, 2),
87 SSB_DEVICE(SSB_VENDOR_BROADCOM, SSB_DEV_80211, 4),
90 MODULE_DEVICE_TABLE(ssb, b43legacy_ssb_tbl);
93 /* Channel and ratetables are shared for all devices.
94 * They can't be const, because ieee80211 puts some precalculated
95 * data in there. This data is the same for all devices, so we don't
96 * get concurrency issues */
97 #define RATETAB_ENT(_rateid, _flags) \
99 .bitrate = B43legacy_RATE_TO_100KBPS(_rateid), \
100 .hw_value = (_rateid), \
104 * NOTE: When changing this, sync with xmit.c's
105 * b43legacy_plcp_get_bitrate_idx_* functions!
107 static struct ieee80211_rate __b43legacy_ratetable[] = {
108 RATETAB_ENT(B43legacy_CCK_RATE_1MB, 0),
109 RATETAB_ENT(B43legacy_CCK_RATE_2MB, IEEE80211_RATE_SHORT_PREAMBLE),
110 RATETAB_ENT(B43legacy_CCK_RATE_5MB, IEEE80211_RATE_SHORT_PREAMBLE),
111 RATETAB_ENT(B43legacy_CCK_RATE_11MB, IEEE80211_RATE_SHORT_PREAMBLE),
112 RATETAB_ENT(B43legacy_OFDM_RATE_6MB, 0),
113 RATETAB_ENT(B43legacy_OFDM_RATE_9MB, 0),
114 RATETAB_ENT(B43legacy_OFDM_RATE_12MB, 0),
115 RATETAB_ENT(B43legacy_OFDM_RATE_18MB, 0),
116 RATETAB_ENT(B43legacy_OFDM_RATE_24MB, 0),
117 RATETAB_ENT(B43legacy_OFDM_RATE_36MB, 0),
118 RATETAB_ENT(B43legacy_OFDM_RATE_48MB, 0),
119 RATETAB_ENT(B43legacy_OFDM_RATE_54MB, 0),
121 #define b43legacy_b_ratetable (__b43legacy_ratetable + 0)
122 #define b43legacy_b_ratetable_size 4
123 #define b43legacy_g_ratetable (__b43legacy_ratetable + 0)
124 #define b43legacy_g_ratetable_size 12
126 #define CHANTAB_ENT(_chanid, _freq) \
128 .center_freq = (_freq), \
129 .hw_value = (_chanid), \
131 static struct ieee80211_channel b43legacy_bg_chantable[] = {
132 CHANTAB_ENT(1, 2412),
133 CHANTAB_ENT(2, 2417),
134 CHANTAB_ENT(3, 2422),
135 CHANTAB_ENT(4, 2427),
136 CHANTAB_ENT(5, 2432),
137 CHANTAB_ENT(6, 2437),
138 CHANTAB_ENT(7, 2442),
139 CHANTAB_ENT(8, 2447),
140 CHANTAB_ENT(9, 2452),
141 CHANTAB_ENT(10, 2457),
142 CHANTAB_ENT(11, 2462),
143 CHANTAB_ENT(12, 2467),
144 CHANTAB_ENT(13, 2472),
145 CHANTAB_ENT(14, 2484),
148 static struct ieee80211_supported_band b43legacy_band_2GHz_BPHY = {
149 .channels = b43legacy_bg_chantable,
150 .n_channels = ARRAY_SIZE(b43legacy_bg_chantable),
151 .bitrates = b43legacy_b_ratetable,
152 .n_bitrates = b43legacy_b_ratetable_size,
155 static struct ieee80211_supported_band b43legacy_band_2GHz_GPHY = {
156 .channels = b43legacy_bg_chantable,
157 .n_channels = ARRAY_SIZE(b43legacy_bg_chantable),
158 .bitrates = b43legacy_g_ratetable,
159 .n_bitrates = b43legacy_g_ratetable_size,
162 static void b43legacy_wireless_core_exit(struct b43legacy_wldev *dev);
163 static int b43legacy_wireless_core_init(struct b43legacy_wldev *dev);
164 static void b43legacy_wireless_core_stop(struct b43legacy_wldev *dev);
165 static int b43legacy_wireless_core_start(struct b43legacy_wldev *dev);
168 static int b43legacy_ratelimit(struct b43legacy_wl *wl)
170 if (!wl || !wl->current_dev)
172 if (b43legacy_status(wl->current_dev) < B43legacy_STAT_STARTED)
174 /* We are up and running.
175 * Ratelimit the messages to avoid DoS over the net. */
176 return net_ratelimit();
179 void b43legacyinfo(struct b43legacy_wl *wl, const char *fmt, ...)
181 struct va_format vaf;
184 if (!b43legacy_ratelimit(wl))
192 printk(KERN_INFO "b43legacy-%s: %pV",
193 (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan", &vaf);
198 void b43legacyerr(struct b43legacy_wl *wl, const char *fmt, ...)
200 struct va_format vaf;
203 if (!b43legacy_ratelimit(wl))
211 printk(KERN_ERR "b43legacy-%s ERROR: %pV",
212 (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan", &vaf);
217 void b43legacywarn(struct b43legacy_wl *wl, const char *fmt, ...)
219 struct va_format vaf;
222 if (!b43legacy_ratelimit(wl))
230 printk(KERN_WARNING "b43legacy-%s warning: %pV",
231 (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan", &vaf);
237 void b43legacydbg(struct b43legacy_wl *wl, const char *fmt, ...)
239 struct va_format vaf;
247 printk(KERN_DEBUG "b43legacy-%s debug: %pV",
248 (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan", &vaf);
254 static void b43legacy_ram_write(struct b43legacy_wldev *dev, u16 offset,
259 B43legacy_WARN_ON(offset % 4 != 0);
261 status = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
262 if (status & B43legacy_MACCTL_BE)
265 b43legacy_write32(dev, B43legacy_MMIO_RAM_CONTROL, offset);
267 b43legacy_write32(dev, B43legacy_MMIO_RAM_DATA, val);
271 void b43legacy_shm_control_word(struct b43legacy_wldev *dev,
272 u16 routing, u16 offset)
276 /* "offset" is the WORD offset. */
281 b43legacy_write32(dev, B43legacy_MMIO_SHM_CONTROL, control);
284 u32 b43legacy_shm_read32(struct b43legacy_wldev *dev,
285 u16 routing, u16 offset)
289 if (routing == B43legacy_SHM_SHARED) {
290 B43legacy_WARN_ON((offset & 0x0001) != 0);
291 if (offset & 0x0003) {
292 /* Unaligned access */
293 b43legacy_shm_control_word(dev, routing, offset >> 2);
294 ret = b43legacy_read16(dev,
295 B43legacy_MMIO_SHM_DATA_UNALIGNED);
297 b43legacy_shm_control_word(dev, routing,
299 ret |= b43legacy_read16(dev, B43legacy_MMIO_SHM_DATA);
305 b43legacy_shm_control_word(dev, routing, offset);
306 ret = b43legacy_read32(dev, B43legacy_MMIO_SHM_DATA);
311 u16 b43legacy_shm_read16(struct b43legacy_wldev *dev,
312 u16 routing, u16 offset)
316 if (routing == B43legacy_SHM_SHARED) {
317 B43legacy_WARN_ON((offset & 0x0001) != 0);
318 if (offset & 0x0003) {
319 /* Unaligned access */
320 b43legacy_shm_control_word(dev, routing, offset >> 2);
321 ret = b43legacy_read16(dev,
322 B43legacy_MMIO_SHM_DATA_UNALIGNED);
328 b43legacy_shm_control_word(dev, routing, offset);
329 ret = b43legacy_read16(dev, B43legacy_MMIO_SHM_DATA);
334 void b43legacy_shm_write32(struct b43legacy_wldev *dev,
335 u16 routing, u16 offset,
338 if (routing == B43legacy_SHM_SHARED) {
339 B43legacy_WARN_ON((offset & 0x0001) != 0);
340 if (offset & 0x0003) {
341 /* Unaligned access */
342 b43legacy_shm_control_word(dev, routing, offset >> 2);
344 b43legacy_write16(dev,
345 B43legacy_MMIO_SHM_DATA_UNALIGNED,
346 (value >> 16) & 0xffff);
348 b43legacy_shm_control_word(dev, routing,
351 b43legacy_write16(dev, B43legacy_MMIO_SHM_DATA,
357 b43legacy_shm_control_word(dev, routing, offset);
359 b43legacy_write32(dev, B43legacy_MMIO_SHM_DATA, value);
362 void b43legacy_shm_write16(struct b43legacy_wldev *dev, u16 routing, u16 offset,
365 if (routing == B43legacy_SHM_SHARED) {
366 B43legacy_WARN_ON((offset & 0x0001) != 0);
367 if (offset & 0x0003) {
368 /* Unaligned access */
369 b43legacy_shm_control_word(dev, routing, offset >> 2);
371 b43legacy_write16(dev,
372 B43legacy_MMIO_SHM_DATA_UNALIGNED,
378 b43legacy_shm_control_word(dev, routing, offset);
380 b43legacy_write16(dev, B43legacy_MMIO_SHM_DATA, value);
384 u32 b43legacy_hf_read(struct b43legacy_wldev *dev)
388 ret = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
389 B43legacy_SHM_SH_HOSTFHI);
391 ret |= b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
392 B43legacy_SHM_SH_HOSTFLO);
397 /* Write HostFlags */
398 void b43legacy_hf_write(struct b43legacy_wldev *dev, u32 value)
400 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
401 B43legacy_SHM_SH_HOSTFLO,
402 (value & 0x0000FFFF));
403 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
404 B43legacy_SHM_SH_HOSTFHI,
405 ((value & 0xFFFF0000) >> 16));
408 void b43legacy_tsf_read(struct b43legacy_wldev *dev, u64 *tsf)
410 /* We need to be careful. As we read the TSF from multiple
411 * registers, we should take care of register overflows.
412 * In theory, the whole tsf read process should be atomic.
413 * We try to be atomic here, by restaring the read process,
414 * if any of the high registers changed (overflew).
416 if (dev->dev->id.revision >= 3) {
422 high = b43legacy_read32(dev,
423 B43legacy_MMIO_REV3PLUS_TSF_HIGH);
424 low = b43legacy_read32(dev,
425 B43legacy_MMIO_REV3PLUS_TSF_LOW);
426 high2 = b43legacy_read32(dev,
427 B43legacy_MMIO_REV3PLUS_TSF_HIGH);
428 } while (unlikely(high != high2));
444 v3 = b43legacy_read16(dev, B43legacy_MMIO_TSF_3);
445 v2 = b43legacy_read16(dev, B43legacy_MMIO_TSF_2);
446 v1 = b43legacy_read16(dev, B43legacy_MMIO_TSF_1);
447 v0 = b43legacy_read16(dev, B43legacy_MMIO_TSF_0);
449 test3 = b43legacy_read16(dev, B43legacy_MMIO_TSF_3);
450 test2 = b43legacy_read16(dev, B43legacy_MMIO_TSF_2);
451 test1 = b43legacy_read16(dev, B43legacy_MMIO_TSF_1);
452 } while (v3 != test3 || v2 != test2 || v1 != test1);
466 static void b43legacy_time_lock(struct b43legacy_wldev *dev)
470 status = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
471 status |= B43legacy_MACCTL_TBTTHOLD;
472 b43legacy_write32(dev, B43legacy_MMIO_MACCTL, status);
476 static void b43legacy_time_unlock(struct b43legacy_wldev *dev)
480 status = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
481 status &= ~B43legacy_MACCTL_TBTTHOLD;
482 b43legacy_write32(dev, B43legacy_MMIO_MACCTL, status);
485 static void b43legacy_tsf_write_locked(struct b43legacy_wldev *dev, u64 tsf)
487 /* Be careful with the in-progress timer.
488 * First zero out the low register, so we have a full
489 * register-overflow duration to complete the operation.
491 if (dev->dev->id.revision >= 3) {
492 u32 lo = (tsf & 0x00000000FFFFFFFFULL);
493 u32 hi = (tsf & 0xFFFFFFFF00000000ULL) >> 32;
495 b43legacy_write32(dev, B43legacy_MMIO_REV3PLUS_TSF_LOW, 0);
497 b43legacy_write32(dev, B43legacy_MMIO_REV3PLUS_TSF_HIGH,
500 b43legacy_write32(dev, B43legacy_MMIO_REV3PLUS_TSF_LOW,
503 u16 v0 = (tsf & 0x000000000000FFFFULL);
504 u16 v1 = (tsf & 0x00000000FFFF0000ULL) >> 16;
505 u16 v2 = (tsf & 0x0000FFFF00000000ULL) >> 32;
506 u16 v3 = (tsf & 0xFFFF000000000000ULL) >> 48;
508 b43legacy_write16(dev, B43legacy_MMIO_TSF_0, 0);
510 b43legacy_write16(dev, B43legacy_MMIO_TSF_3, v3);
512 b43legacy_write16(dev, B43legacy_MMIO_TSF_2, v2);
514 b43legacy_write16(dev, B43legacy_MMIO_TSF_1, v1);
516 b43legacy_write16(dev, B43legacy_MMIO_TSF_0, v0);
520 void b43legacy_tsf_write(struct b43legacy_wldev *dev, u64 tsf)
522 b43legacy_time_lock(dev);
523 b43legacy_tsf_write_locked(dev, tsf);
524 b43legacy_time_unlock(dev);
528 void b43legacy_macfilter_set(struct b43legacy_wldev *dev,
529 u16 offset, const u8 *mac)
531 static const u8 zero_addr[ETH_ALEN] = { 0 };
538 b43legacy_write16(dev, B43legacy_MMIO_MACFILTER_CONTROL, offset);
542 b43legacy_write16(dev, B43legacy_MMIO_MACFILTER_DATA, data);
545 b43legacy_write16(dev, B43legacy_MMIO_MACFILTER_DATA, data);
548 b43legacy_write16(dev, B43legacy_MMIO_MACFILTER_DATA, data);
551 static void b43legacy_write_mac_bssid_templates(struct b43legacy_wldev *dev)
553 static const u8 zero_addr[ETH_ALEN] = { 0 };
554 const u8 *mac = dev->wl->mac_addr;
555 const u8 *bssid = dev->wl->bssid;
556 u8 mac_bssid[ETH_ALEN * 2];
565 b43legacy_macfilter_set(dev, B43legacy_MACFILTER_BSSID, bssid);
567 memcpy(mac_bssid, mac, ETH_ALEN);
568 memcpy(mac_bssid + ETH_ALEN, bssid, ETH_ALEN);
570 /* Write our MAC address and BSSID to template ram */
571 for (i = 0; i < ARRAY_SIZE(mac_bssid); i += sizeof(u32)) {
572 tmp = (u32)(mac_bssid[i + 0]);
573 tmp |= (u32)(mac_bssid[i + 1]) << 8;
574 tmp |= (u32)(mac_bssid[i + 2]) << 16;
575 tmp |= (u32)(mac_bssid[i + 3]) << 24;
576 b43legacy_ram_write(dev, 0x20 + i, tmp);
577 b43legacy_ram_write(dev, 0x78 + i, tmp);
578 b43legacy_ram_write(dev, 0x478 + i, tmp);
582 static void b43legacy_upload_card_macaddress(struct b43legacy_wldev *dev)
584 b43legacy_write_mac_bssid_templates(dev);
585 b43legacy_macfilter_set(dev, B43legacy_MACFILTER_SELF,
589 static void b43legacy_set_slot_time(struct b43legacy_wldev *dev,
592 /* slot_time is in usec. */
593 if (dev->phy.type != B43legacy_PHYTYPE_G)
595 b43legacy_write16(dev, 0x684, 510 + slot_time);
596 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x0010,
600 static void b43legacy_short_slot_timing_enable(struct b43legacy_wldev *dev)
602 b43legacy_set_slot_time(dev, 9);
605 static void b43legacy_short_slot_timing_disable(struct b43legacy_wldev *dev)
607 b43legacy_set_slot_time(dev, 20);
610 /* Synchronize IRQ top- and bottom-half.
611 * IRQs must be masked before calling this.
612 * This must not be called with the irq_lock held.
614 static void b43legacy_synchronize_irq(struct b43legacy_wldev *dev)
616 synchronize_irq(dev->dev->irq);
617 tasklet_kill(&dev->isr_tasklet);
620 /* DummyTransmission function, as documented on
621 * http://bcm-specs.sipsolutions.net/DummyTransmission
623 void b43legacy_dummy_transmission(struct b43legacy_wldev *dev)
625 struct b43legacy_phy *phy = &dev->phy;
627 unsigned int max_loop;
638 case B43legacy_PHYTYPE_B:
639 case B43legacy_PHYTYPE_G:
641 buffer[0] = 0x000B846E;
648 for (i = 0; i < 5; i++)
649 b43legacy_ram_write(dev, i * 4, buffer[i]);
651 /* dummy read follows */
652 b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
654 b43legacy_write16(dev, 0x0568, 0x0000);
655 b43legacy_write16(dev, 0x07C0, 0x0000);
656 b43legacy_write16(dev, 0x050C, 0x0000);
657 b43legacy_write16(dev, 0x0508, 0x0000);
658 b43legacy_write16(dev, 0x050A, 0x0000);
659 b43legacy_write16(dev, 0x054C, 0x0000);
660 b43legacy_write16(dev, 0x056A, 0x0014);
661 b43legacy_write16(dev, 0x0568, 0x0826);
662 b43legacy_write16(dev, 0x0500, 0x0000);
663 b43legacy_write16(dev, 0x0502, 0x0030);
665 if (phy->radio_ver == 0x2050 && phy->radio_rev <= 0x5)
666 b43legacy_radio_write16(dev, 0x0051, 0x0017);
667 for (i = 0x00; i < max_loop; i++) {
668 value = b43legacy_read16(dev, 0x050E);
673 for (i = 0x00; i < 0x0A; i++) {
674 value = b43legacy_read16(dev, 0x050E);
679 for (i = 0x00; i < 0x0A; i++) {
680 value = b43legacy_read16(dev, 0x0690);
681 if (!(value & 0x0100))
685 if (phy->radio_ver == 0x2050 && phy->radio_rev <= 0x5)
686 b43legacy_radio_write16(dev, 0x0051, 0x0037);
689 /* Turn the Analog ON/OFF */
690 static void b43legacy_switch_analog(struct b43legacy_wldev *dev, int on)
692 b43legacy_write16(dev, B43legacy_MMIO_PHY0, on ? 0 : 0xF4);
695 void b43legacy_wireless_core_reset(struct b43legacy_wldev *dev, u32 flags)
700 flags |= B43legacy_TMSLOW_PHYCLKEN;
701 flags |= B43legacy_TMSLOW_PHYRESET;
702 ssb_device_enable(dev->dev, flags);
703 msleep(2); /* Wait for the PLL to turn on. */
705 /* Now take the PHY out of Reset again */
706 tmslow = ssb_read32(dev->dev, SSB_TMSLOW);
707 tmslow |= SSB_TMSLOW_FGC;
708 tmslow &= ~B43legacy_TMSLOW_PHYRESET;
709 ssb_write32(dev->dev, SSB_TMSLOW, tmslow);
710 ssb_read32(dev->dev, SSB_TMSLOW); /* flush */
712 tmslow &= ~SSB_TMSLOW_FGC;
713 ssb_write32(dev->dev, SSB_TMSLOW, tmslow);
714 ssb_read32(dev->dev, SSB_TMSLOW); /* flush */
718 b43legacy_switch_analog(dev, 1);
720 macctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
721 macctl &= ~B43legacy_MACCTL_GMODE;
722 if (flags & B43legacy_TMSLOW_GMODE) {
723 macctl |= B43legacy_MACCTL_GMODE;
724 dev->phy.gmode = true;
726 dev->phy.gmode = false;
727 macctl |= B43legacy_MACCTL_IHR_ENABLED;
728 b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl);
731 static void handle_irq_transmit_status(struct b43legacy_wldev *dev)
736 struct b43legacy_txstatus stat;
739 v0 = b43legacy_read32(dev, B43legacy_MMIO_XMITSTAT_0);
740 if (!(v0 & 0x00000001))
742 v1 = b43legacy_read32(dev, B43legacy_MMIO_XMITSTAT_1);
744 stat.cookie = (v0 >> 16);
745 stat.seq = (v1 & 0x0000FFFF);
746 stat.phy_stat = ((v1 & 0x00FF0000) >> 16);
747 tmp = (v0 & 0x0000FFFF);
748 stat.frame_count = ((tmp & 0xF000) >> 12);
749 stat.rts_count = ((tmp & 0x0F00) >> 8);
750 stat.supp_reason = ((tmp & 0x001C) >> 2);
751 stat.pm_indicated = !!(tmp & 0x0080);
752 stat.intermediate = !!(tmp & 0x0040);
753 stat.for_ampdu = !!(tmp & 0x0020);
754 stat.acked = !!(tmp & 0x0002);
756 b43legacy_handle_txstatus(dev, &stat);
760 static void drain_txstatus_queue(struct b43legacy_wldev *dev)
764 if (dev->dev->id.revision < 5)
766 /* Read all entries from the microcode TXstatus FIFO
767 * and throw them away.
770 dummy = b43legacy_read32(dev, B43legacy_MMIO_XMITSTAT_0);
771 if (!(dummy & 0x00000001))
773 dummy = b43legacy_read32(dev, B43legacy_MMIO_XMITSTAT_1);
777 static u32 b43legacy_jssi_read(struct b43legacy_wldev *dev)
781 val = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED, 0x40A);
783 val |= b43legacy_shm_read16(dev, B43legacy_SHM_SHARED, 0x408);
788 static void b43legacy_jssi_write(struct b43legacy_wldev *dev, u32 jssi)
790 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x408,
791 (jssi & 0x0000FFFF));
792 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x40A,
793 (jssi & 0xFFFF0000) >> 16);
796 static void b43legacy_generate_noise_sample(struct b43legacy_wldev *dev)
798 b43legacy_jssi_write(dev, 0x7F7F7F7F);
799 b43legacy_write32(dev, B43legacy_MMIO_MACCMD,
800 b43legacy_read32(dev, B43legacy_MMIO_MACCMD)
801 | B43legacy_MACCMD_BGNOISE);
802 B43legacy_WARN_ON(dev->noisecalc.channel_at_start !=
806 static void b43legacy_calculate_link_quality(struct b43legacy_wldev *dev)
808 /* Top half of Link Quality calculation. */
810 if (dev->noisecalc.calculation_running)
812 dev->noisecalc.channel_at_start = dev->phy.channel;
813 dev->noisecalc.calculation_running = true;
814 dev->noisecalc.nr_samples = 0;
816 b43legacy_generate_noise_sample(dev);
819 static void handle_irq_noise(struct b43legacy_wldev *dev)
821 struct b43legacy_phy *phy = &dev->phy;
828 /* Bottom half of Link Quality calculation. */
830 B43legacy_WARN_ON(!dev->noisecalc.calculation_running);
831 if (dev->noisecalc.channel_at_start != phy->channel)
832 goto drop_calculation;
833 *((__le32 *)noise) = cpu_to_le32(b43legacy_jssi_read(dev));
834 if (noise[0] == 0x7F || noise[1] == 0x7F ||
835 noise[2] == 0x7F || noise[3] == 0x7F)
838 /* Get the noise samples. */
839 B43legacy_WARN_ON(dev->noisecalc.nr_samples >= 8);
840 i = dev->noisecalc.nr_samples;
841 noise[0] = clamp_val(noise[0], 0, ARRAY_SIZE(phy->nrssi_lt) - 1);
842 noise[1] = clamp_val(noise[1], 0, ARRAY_SIZE(phy->nrssi_lt) - 1);
843 noise[2] = clamp_val(noise[2], 0, ARRAY_SIZE(phy->nrssi_lt) - 1);
844 noise[3] = clamp_val(noise[3], 0, ARRAY_SIZE(phy->nrssi_lt) - 1);
845 dev->noisecalc.samples[i][0] = phy->nrssi_lt[noise[0]];
846 dev->noisecalc.samples[i][1] = phy->nrssi_lt[noise[1]];
847 dev->noisecalc.samples[i][2] = phy->nrssi_lt[noise[2]];
848 dev->noisecalc.samples[i][3] = phy->nrssi_lt[noise[3]];
849 dev->noisecalc.nr_samples++;
850 if (dev->noisecalc.nr_samples == 8) {
851 /* Calculate the Link Quality by the noise samples. */
853 for (i = 0; i < 8; i++) {
854 for (j = 0; j < 4; j++)
855 average += dev->noisecalc.samples[i][j];
861 tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
863 tmp = (tmp / 128) & 0x1F;
873 dev->stats.link_noise = average;
875 dev->noisecalc.calculation_running = false;
879 b43legacy_generate_noise_sample(dev);
882 static void handle_irq_tbtt_indication(struct b43legacy_wldev *dev)
884 if (b43legacy_is_mode(dev->wl, NL80211_IFTYPE_AP)) {
887 if (1/*FIXME: the last PSpoll frame was sent successfully */)
888 b43legacy_power_saving_ctl_bits(dev, -1, -1);
890 if (b43legacy_is_mode(dev->wl, NL80211_IFTYPE_ADHOC))
891 dev->dfq_valid = true;
894 static void handle_irq_atim_end(struct b43legacy_wldev *dev)
896 if (dev->dfq_valid) {
897 b43legacy_write32(dev, B43legacy_MMIO_MACCMD,
898 b43legacy_read32(dev, B43legacy_MMIO_MACCMD)
899 | B43legacy_MACCMD_DFQ_VALID);
900 dev->dfq_valid = false;
904 static void handle_irq_pmq(struct b43legacy_wldev *dev)
911 tmp = b43legacy_read32(dev, B43legacy_MMIO_PS_STATUS);
912 if (!(tmp & 0x00000008))
915 /* 16bit write is odd, but correct. */
916 b43legacy_write16(dev, B43legacy_MMIO_PS_STATUS, 0x0002);
919 static void b43legacy_write_template_common(struct b43legacy_wldev *dev,
920 const u8 *data, u16 size,
922 u16 shm_size_offset, u8 rate)
926 struct b43legacy_plcp_hdr4 plcp;
929 b43legacy_generate_plcp_hdr(&plcp, size + FCS_LEN, rate);
930 b43legacy_ram_write(dev, ram_offset, le32_to_cpu(plcp.data));
931 ram_offset += sizeof(u32);
932 /* The PLCP is 6 bytes long, but we only wrote 4 bytes, yet.
933 * So leave the first two bytes of the next write blank.
935 tmp = (u32)(data[0]) << 16;
936 tmp |= (u32)(data[1]) << 24;
937 b43legacy_ram_write(dev, ram_offset, tmp);
938 ram_offset += sizeof(u32);
939 for (i = 2; i < size; i += sizeof(u32)) {
940 tmp = (u32)(data[i + 0]);
942 tmp |= (u32)(data[i + 1]) << 8;
944 tmp |= (u32)(data[i + 2]) << 16;
946 tmp |= (u32)(data[i + 3]) << 24;
947 b43legacy_ram_write(dev, ram_offset + i - 2, tmp);
949 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, shm_size_offset,
950 size + sizeof(struct b43legacy_plcp_hdr6));
953 /* Convert a b43legacy antenna number value to the PHY TX control value. */
954 static u16 b43legacy_antenna_to_phyctl(int antenna)
957 case B43legacy_ANTENNA0:
958 return B43legacy_TX4_PHY_ANT0;
959 case B43legacy_ANTENNA1:
960 return B43legacy_TX4_PHY_ANT1;
962 return B43legacy_TX4_PHY_ANTLAST;
965 static void b43legacy_write_beacon_template(struct b43legacy_wldev *dev,
970 unsigned int i, len, variable_len;
971 const struct ieee80211_mgmt *bcn;
973 bool tim_found = false;
977 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(dev->wl->current_beacon);
979 bcn = (const struct ieee80211_mgmt *)(dev->wl->current_beacon->data);
980 len = min_t(size_t, dev->wl->current_beacon->len,
981 0x200 - sizeof(struct b43legacy_plcp_hdr6));
982 rate = ieee80211_get_tx_rate(dev->wl->hw, info)->hw_value;
984 b43legacy_write_template_common(dev, (const u8 *)bcn, len, ram_offset,
985 shm_size_offset, rate);
987 /* Write the PHY TX control parameters. */
988 antenna = B43legacy_ANTENNA_DEFAULT;
989 antenna = b43legacy_antenna_to_phyctl(antenna);
990 ctl = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
991 B43legacy_SHM_SH_BEACPHYCTL);
992 /* We can't send beacons with short preamble. Would get PHY errors. */
993 ctl &= ~B43legacy_TX4_PHY_SHORTPRMBL;
994 ctl &= ~B43legacy_TX4_PHY_ANT;
995 ctl &= ~B43legacy_TX4_PHY_ENC;
997 ctl |= B43legacy_TX4_PHY_ENC_CCK;
998 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
999 B43legacy_SHM_SH_BEACPHYCTL, ctl);
1001 /* Find the position of the TIM and the DTIM_period value
1002 * and write them to SHM. */
1003 ie = bcn->u.beacon.variable;
1004 variable_len = len - offsetof(struct ieee80211_mgmt, u.beacon.variable);
1005 for (i = 0; i < variable_len - 2; ) {
1006 uint8_t ie_id, ie_len;
1013 /* This is the TIM Information Element */
1015 /* Check whether the ie_len is in the beacon data range. */
1016 if (variable_len < ie_len + 2 + i)
1018 /* A valid TIM is at least 4 bytes long. */
1023 tim_position = sizeof(struct b43legacy_plcp_hdr6);
1024 tim_position += offsetof(struct ieee80211_mgmt,
1028 dtim_period = ie[i + 3];
1030 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
1031 B43legacy_SHM_SH_TIMPOS, tim_position);
1032 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
1033 B43legacy_SHM_SH_DTIMP, dtim_period);
1039 b43legacywarn(dev->wl, "Did not find a valid TIM IE in the "
1040 "beacon template packet. AP or IBSS operation "
1041 "may be broken.\n");
1043 b43legacydbg(dev->wl, "Updated beacon template\n");
1046 static void b43legacy_write_probe_resp_plcp(struct b43legacy_wldev *dev,
1047 u16 shm_offset, u16 size,
1048 struct ieee80211_rate *rate)
1050 struct b43legacy_plcp_hdr4 plcp;
1055 b43legacy_generate_plcp_hdr(&plcp, size + FCS_LEN, rate->hw_value);
1056 dur = ieee80211_generic_frame_duration(dev->wl->hw,
1061 /* Write PLCP in two parts and timing for packet transfer */
1062 tmp = le32_to_cpu(plcp.data);
1063 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, shm_offset,
1065 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, shm_offset + 2,
1067 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, shm_offset + 6,
1071 /* Instead of using custom probe response template, this function
1072 * just patches custom beacon template by:
1073 * 1) Changing packet type
1074 * 2) Patching duration field
1077 static const u8 *b43legacy_generate_probe_resp(struct b43legacy_wldev *dev,
1079 struct ieee80211_rate *rate)
1083 u16 src_size, elem_size, src_pos, dest_pos;
1085 struct ieee80211_hdr *hdr;
1088 src_size = dev->wl->current_beacon->len;
1089 src_data = (const u8 *)dev->wl->current_beacon->data;
1091 /* Get the start offset of the variable IEs in the packet. */
1092 ie_start = offsetof(struct ieee80211_mgmt, u.probe_resp.variable);
1093 B43legacy_WARN_ON(ie_start != offsetof(struct ieee80211_mgmt,
1094 u.beacon.variable));
1096 if (B43legacy_WARN_ON(src_size < ie_start))
1099 dest_data = kmalloc(src_size, GFP_ATOMIC);
1100 if (unlikely(!dest_data))
1103 /* Copy the static data and all Information Elements, except the TIM. */
1104 memcpy(dest_data, src_data, ie_start);
1106 dest_pos = ie_start;
1107 for ( ; src_pos < src_size - 2; src_pos += elem_size) {
1108 elem_size = src_data[src_pos + 1] + 2;
1109 if (src_data[src_pos] == 5) {
1110 /* This is the TIM. */
1113 memcpy(dest_data + dest_pos, src_data + src_pos, elem_size);
1114 dest_pos += elem_size;
1116 *dest_size = dest_pos;
1117 hdr = (struct ieee80211_hdr *)dest_data;
1119 /* Set the frame control. */
1120 hdr->frame_control = cpu_to_le16(IEEE80211_FTYPE_MGMT |
1121 IEEE80211_STYPE_PROBE_RESP);
1122 dur = ieee80211_generic_frame_duration(dev->wl->hw,
1127 hdr->duration_id = dur;
1132 static void b43legacy_write_probe_resp_template(struct b43legacy_wldev *dev,
1134 u16 shm_size_offset,
1135 struct ieee80211_rate *rate)
1137 const u8 *probe_resp_data;
1140 size = dev->wl->current_beacon->len;
1141 probe_resp_data = b43legacy_generate_probe_resp(dev, &size, rate);
1142 if (unlikely(!probe_resp_data))
1145 /* Looks like PLCP headers plus packet timings are stored for
1146 * all possible basic rates
1148 b43legacy_write_probe_resp_plcp(dev, 0x31A, size,
1149 &b43legacy_b_ratetable[0]);
1150 b43legacy_write_probe_resp_plcp(dev, 0x32C, size,
1151 &b43legacy_b_ratetable[1]);
1152 b43legacy_write_probe_resp_plcp(dev, 0x33E, size,
1153 &b43legacy_b_ratetable[2]);
1154 b43legacy_write_probe_resp_plcp(dev, 0x350, size,
1155 &b43legacy_b_ratetable[3]);
1157 size = min_t(size_t, size,
1158 0x200 - sizeof(struct b43legacy_plcp_hdr6));
1159 b43legacy_write_template_common(dev, probe_resp_data,
1161 shm_size_offset, rate->hw_value);
1162 kfree(probe_resp_data);
1165 static void b43legacy_upload_beacon0(struct b43legacy_wldev *dev)
1167 struct b43legacy_wl *wl = dev->wl;
1169 if (wl->beacon0_uploaded)
1171 b43legacy_write_beacon_template(dev, 0x68, 0x18);
1172 /* FIXME: Probe resp upload doesn't really belong here,
1173 * but we don't use that feature anyway. */
1174 b43legacy_write_probe_resp_template(dev, 0x268, 0x4A,
1175 &__b43legacy_ratetable[3]);
1176 wl->beacon0_uploaded = true;
1179 static void b43legacy_upload_beacon1(struct b43legacy_wldev *dev)
1181 struct b43legacy_wl *wl = dev->wl;
1183 if (wl->beacon1_uploaded)
1185 b43legacy_write_beacon_template(dev, 0x468, 0x1A);
1186 wl->beacon1_uploaded = true;
1189 static void handle_irq_beacon(struct b43legacy_wldev *dev)
1191 struct b43legacy_wl *wl = dev->wl;
1192 u32 cmd, beacon0_valid, beacon1_valid;
1194 if (!b43legacy_is_mode(wl, NL80211_IFTYPE_AP))
1197 /* This is the bottom half of the asynchronous beacon update. */
1199 /* Ignore interrupt in the future. */
1200 dev->irq_mask &= ~B43legacy_IRQ_BEACON;
1202 cmd = b43legacy_read32(dev, B43legacy_MMIO_MACCMD);
1203 beacon0_valid = (cmd & B43legacy_MACCMD_BEACON0_VALID);
1204 beacon1_valid = (cmd & B43legacy_MACCMD_BEACON1_VALID);
1206 /* Schedule interrupt manually, if busy. */
1207 if (beacon0_valid && beacon1_valid) {
1208 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON, B43legacy_IRQ_BEACON);
1209 dev->irq_mask |= B43legacy_IRQ_BEACON;
1213 if (unlikely(wl->beacon_templates_virgin)) {
1214 /* We never uploaded a beacon before.
1215 * Upload both templates now, but only mark one valid. */
1216 wl->beacon_templates_virgin = false;
1217 b43legacy_upload_beacon0(dev);
1218 b43legacy_upload_beacon1(dev);
1219 cmd = b43legacy_read32(dev, B43legacy_MMIO_MACCMD);
1220 cmd |= B43legacy_MACCMD_BEACON0_VALID;
1221 b43legacy_write32(dev, B43legacy_MMIO_MACCMD, cmd);
1223 if (!beacon0_valid) {
1224 b43legacy_upload_beacon0(dev);
1225 cmd = b43legacy_read32(dev, B43legacy_MMIO_MACCMD);
1226 cmd |= B43legacy_MACCMD_BEACON0_VALID;
1227 b43legacy_write32(dev, B43legacy_MMIO_MACCMD, cmd);
1228 } else if (!beacon1_valid) {
1229 b43legacy_upload_beacon1(dev);
1230 cmd = b43legacy_read32(dev, B43legacy_MMIO_MACCMD);
1231 cmd |= B43legacy_MACCMD_BEACON1_VALID;
1232 b43legacy_write32(dev, B43legacy_MMIO_MACCMD, cmd);
1237 static void b43legacy_beacon_update_trigger_work(struct work_struct *work)
1239 struct b43legacy_wl *wl = container_of(work, struct b43legacy_wl,
1240 beacon_update_trigger);
1241 struct b43legacy_wldev *dev;
1243 mutex_lock(&wl->mutex);
1244 dev = wl->current_dev;
1245 if (likely(dev && (b43legacy_status(dev) >= B43legacy_STAT_INITIALIZED))) {
1246 spin_lock_irq(&wl->irq_lock);
1247 /* Update beacon right away or defer to IRQ. */
1248 handle_irq_beacon(dev);
1249 /* The handler might have updated the IRQ mask. */
1250 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK,
1253 spin_unlock_irq(&wl->irq_lock);
1255 mutex_unlock(&wl->mutex);
1258 /* Asynchronously update the packet templates in template RAM.
1259 * Locking: Requires wl->irq_lock to be locked. */
1260 static void b43legacy_update_templates(struct b43legacy_wl *wl)
1262 struct sk_buff *beacon;
1263 /* This is the top half of the ansynchronous beacon update. The bottom
1264 * half is the beacon IRQ. Beacon update must be asynchronous to avoid
1265 * sending an invalid beacon. This can happen for example, if the
1266 * firmware transmits a beacon while we are updating it. */
1268 /* We could modify the existing beacon and set the aid bit in the TIM
1269 * field, but that would probably require resizing and moving of data
1270 * within the beacon template. Simply request a new beacon and let
1271 * mac80211 do the hard work. */
1272 beacon = ieee80211_beacon_get(wl->hw, wl->vif);
1273 if (unlikely(!beacon))
1276 if (wl->current_beacon)
1277 dev_kfree_skb_any(wl->current_beacon);
1278 wl->current_beacon = beacon;
1279 wl->beacon0_uploaded = false;
1280 wl->beacon1_uploaded = false;
1281 ieee80211_queue_work(wl->hw, &wl->beacon_update_trigger);
1284 static void b43legacy_set_beacon_int(struct b43legacy_wldev *dev,
1287 b43legacy_time_lock(dev);
1288 if (dev->dev->id.revision >= 3) {
1289 b43legacy_write32(dev, B43legacy_MMIO_TSF_CFP_REP,
1290 (beacon_int << 16));
1291 b43legacy_write32(dev, B43legacy_MMIO_TSF_CFP_START,
1292 (beacon_int << 10));
1294 b43legacy_write16(dev, 0x606, (beacon_int >> 6));
1295 b43legacy_write16(dev, 0x610, beacon_int);
1297 b43legacy_time_unlock(dev);
1298 b43legacydbg(dev->wl, "Set beacon interval to %u\n", beacon_int);
1301 static void handle_irq_ucode_debug(struct b43legacy_wldev *dev)
1305 /* Interrupt handler bottom-half */
1306 static void b43legacy_interrupt_tasklet(unsigned long data)
1308 struct b43legacy_wldev *dev = (struct b43legacy_wldev *)data;
1310 u32 dma_reason[ARRAY_SIZE(dev->dma_reason)];
1311 u32 merged_dma_reason = 0;
1313 unsigned long flags;
1315 spin_lock_irqsave(&dev->wl->irq_lock, flags);
1317 B43legacy_WARN_ON(b43legacy_status(dev) <
1318 B43legacy_STAT_INITIALIZED);
1320 reason = dev->irq_reason;
1321 for (i = 0; i < ARRAY_SIZE(dma_reason); i++) {
1322 dma_reason[i] = dev->dma_reason[i];
1323 merged_dma_reason |= dma_reason[i];
1326 if (unlikely(reason & B43legacy_IRQ_MAC_TXERR))
1327 b43legacyerr(dev->wl, "MAC transmission error\n");
1329 if (unlikely(reason & B43legacy_IRQ_PHY_TXERR)) {
1330 b43legacyerr(dev->wl, "PHY transmission error\n");
1332 if (unlikely(atomic_dec_and_test(&dev->phy.txerr_cnt))) {
1333 b43legacyerr(dev->wl, "Too many PHY TX errors, "
1334 "restarting the controller\n");
1335 b43legacy_controller_restart(dev, "PHY TX errors");
1339 if (unlikely(merged_dma_reason & (B43legacy_DMAIRQ_FATALMASK |
1340 B43legacy_DMAIRQ_NONFATALMASK))) {
1341 if (merged_dma_reason & B43legacy_DMAIRQ_FATALMASK) {
1342 b43legacyerr(dev->wl, "Fatal DMA error: "
1343 "0x%08X, 0x%08X, 0x%08X, "
1344 "0x%08X, 0x%08X, 0x%08X\n",
1345 dma_reason[0], dma_reason[1],
1346 dma_reason[2], dma_reason[3],
1347 dma_reason[4], dma_reason[5]);
1348 b43legacy_controller_restart(dev, "DMA error");
1350 spin_unlock_irqrestore(&dev->wl->irq_lock, flags);
1353 if (merged_dma_reason & B43legacy_DMAIRQ_NONFATALMASK)
1354 b43legacyerr(dev->wl, "DMA error: "
1355 "0x%08X, 0x%08X, 0x%08X, "
1356 "0x%08X, 0x%08X, 0x%08X\n",
1357 dma_reason[0], dma_reason[1],
1358 dma_reason[2], dma_reason[3],
1359 dma_reason[4], dma_reason[5]);
1362 if (unlikely(reason & B43legacy_IRQ_UCODE_DEBUG))
1363 handle_irq_ucode_debug(dev);
1364 if (reason & B43legacy_IRQ_TBTT_INDI)
1365 handle_irq_tbtt_indication(dev);
1366 if (reason & B43legacy_IRQ_ATIM_END)
1367 handle_irq_atim_end(dev);
1368 if (reason & B43legacy_IRQ_BEACON)
1369 handle_irq_beacon(dev);
1370 if (reason & B43legacy_IRQ_PMQ)
1371 handle_irq_pmq(dev);
1372 if (reason & B43legacy_IRQ_TXFIFO_FLUSH_OK)
1374 if (reason & B43legacy_IRQ_NOISESAMPLE_OK)
1375 handle_irq_noise(dev);
1377 /* Check the DMA reason registers for received data. */
1378 if (dma_reason[0] & B43legacy_DMAIRQ_RX_DONE) {
1379 if (b43legacy_using_pio(dev))
1380 b43legacy_pio_rx(dev->pio.queue0);
1382 b43legacy_dma_rx(dev->dma.rx_ring0);
1384 B43legacy_WARN_ON(dma_reason[1] & B43legacy_DMAIRQ_RX_DONE);
1385 B43legacy_WARN_ON(dma_reason[2] & B43legacy_DMAIRQ_RX_DONE);
1386 if (dma_reason[3] & B43legacy_DMAIRQ_RX_DONE) {
1387 if (b43legacy_using_pio(dev))
1388 b43legacy_pio_rx(dev->pio.queue3);
1390 b43legacy_dma_rx(dev->dma.rx_ring3);
1392 B43legacy_WARN_ON(dma_reason[4] & B43legacy_DMAIRQ_RX_DONE);
1393 B43legacy_WARN_ON(dma_reason[5] & B43legacy_DMAIRQ_RX_DONE);
1395 if (reason & B43legacy_IRQ_TX_OK)
1396 handle_irq_transmit_status(dev);
1398 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, dev->irq_mask);
1400 spin_unlock_irqrestore(&dev->wl->irq_lock, flags);
1403 static void pio_irq_workaround(struct b43legacy_wldev *dev,
1404 u16 base, int queueidx)
1408 rxctl = b43legacy_read16(dev, base + B43legacy_PIO_RXCTL);
1409 if (rxctl & B43legacy_PIO_RXCTL_DATAAVAILABLE)
1410 dev->dma_reason[queueidx] |= B43legacy_DMAIRQ_RX_DONE;
1412 dev->dma_reason[queueidx] &= ~B43legacy_DMAIRQ_RX_DONE;
1415 static void b43legacy_interrupt_ack(struct b43legacy_wldev *dev, u32 reason)
1417 if (b43legacy_using_pio(dev) &&
1418 (dev->dev->id.revision < 3) &&
1419 (!(reason & B43legacy_IRQ_PIO_WORKAROUND))) {
1420 /* Apply a PIO specific workaround to the dma_reasons */
1421 pio_irq_workaround(dev, B43legacy_MMIO_PIO1_BASE, 0);
1422 pio_irq_workaround(dev, B43legacy_MMIO_PIO2_BASE, 1);
1423 pio_irq_workaround(dev, B43legacy_MMIO_PIO3_BASE, 2);
1424 pio_irq_workaround(dev, B43legacy_MMIO_PIO4_BASE, 3);
1427 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON, reason);
1429 b43legacy_write32(dev, B43legacy_MMIO_DMA0_REASON,
1430 dev->dma_reason[0]);
1431 b43legacy_write32(dev, B43legacy_MMIO_DMA1_REASON,
1432 dev->dma_reason[1]);
1433 b43legacy_write32(dev, B43legacy_MMIO_DMA2_REASON,
1434 dev->dma_reason[2]);
1435 b43legacy_write32(dev, B43legacy_MMIO_DMA3_REASON,
1436 dev->dma_reason[3]);
1437 b43legacy_write32(dev, B43legacy_MMIO_DMA4_REASON,
1438 dev->dma_reason[4]);
1439 b43legacy_write32(dev, B43legacy_MMIO_DMA5_REASON,
1440 dev->dma_reason[5]);
1443 /* Interrupt handler top-half */
1444 static irqreturn_t b43legacy_interrupt_handler(int irq, void *dev_id)
1446 irqreturn_t ret = IRQ_NONE;
1447 struct b43legacy_wldev *dev = dev_id;
1450 B43legacy_WARN_ON(!dev);
1452 spin_lock(&dev->wl->irq_lock);
1454 if (unlikely(b43legacy_status(dev) < B43legacy_STAT_STARTED))
1455 /* This can only happen on shared IRQ lines. */
1457 reason = b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
1458 if (reason == 0xffffffff) /* shared IRQ */
1461 reason &= dev->irq_mask;
1465 dev->dma_reason[0] = b43legacy_read32(dev,
1466 B43legacy_MMIO_DMA0_REASON)
1468 dev->dma_reason[1] = b43legacy_read32(dev,
1469 B43legacy_MMIO_DMA1_REASON)
1471 dev->dma_reason[2] = b43legacy_read32(dev,
1472 B43legacy_MMIO_DMA2_REASON)
1474 dev->dma_reason[3] = b43legacy_read32(dev,
1475 B43legacy_MMIO_DMA3_REASON)
1477 dev->dma_reason[4] = b43legacy_read32(dev,
1478 B43legacy_MMIO_DMA4_REASON)
1480 dev->dma_reason[5] = b43legacy_read32(dev,
1481 B43legacy_MMIO_DMA5_REASON)
1484 b43legacy_interrupt_ack(dev, reason);
1485 /* Disable all IRQs. They are enabled again in the bottom half. */
1486 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, 0);
1487 /* Save the reason code and call our bottom half. */
1488 dev->irq_reason = reason;
1489 tasklet_schedule(&dev->isr_tasklet);
1492 spin_unlock(&dev->wl->irq_lock);
1497 static void b43legacy_release_firmware(struct b43legacy_wldev *dev)
1499 release_firmware(dev->fw.ucode);
1500 dev->fw.ucode = NULL;
1501 release_firmware(dev->fw.pcm);
1503 release_firmware(dev->fw.initvals);
1504 dev->fw.initvals = NULL;
1505 release_firmware(dev->fw.initvals_band);
1506 dev->fw.initvals_band = NULL;
1509 static void b43legacy_print_fw_helptext(struct b43legacy_wl *wl)
1514 static void b43legacy_fw_cb(const struct firmware *firmware, void *context)
1516 struct b43legacy_wldev *dev = context;
1518 dev->fwp = firmware;
1519 complete(&dev->fw_load_complete);
1522 static int do_request_fw(struct b43legacy_wldev *dev,
1524 const struct firmware **fw, bool async)
1526 char path[sizeof(modparam_fwpostfix) + 32];
1527 struct b43legacy_fw_header *hdr;
1534 snprintf(path, ARRAY_SIZE(path),
1536 modparam_fwpostfix, name);
1537 b43legacyinfo(dev->wl, "Loading firmware %s\n", path);
1539 init_completion(&dev->fw_load_complete);
1540 err = reject_firmware_nowait(THIS_MODULE, 1, path,
1541 dev->dev->dev, GFP_KERNEL,
1542 dev, b43legacy_fw_cb);
1544 b43legacyerr(dev->wl, "Unable to load firmware\n");
1547 /* stall here until fw ready */
1548 wait_for_completion(&dev->fw_load_complete);
1553 err = reject_firmware(fw, path, dev->dev->dev);
1556 b43legacyerr(dev->wl, "Firmware file \"%s\" not found "
1557 "or load failed.\n", path);
1560 if ((*fw)->size < sizeof(struct b43legacy_fw_header))
1562 hdr = (struct b43legacy_fw_header *)((*fw)->data);
1563 switch (hdr->type) {
1564 case B43legacy_FW_TYPE_UCODE:
1565 case B43legacy_FW_TYPE_PCM:
1566 size = be32_to_cpu(hdr->size);
1567 if (size != (*fw)->size - sizeof(struct b43legacy_fw_header))
1570 case B43legacy_FW_TYPE_IV:
1581 b43legacyerr(dev->wl, "Firmware file \"%s\" format error.\n", path);
1585 static int b43legacy_one_core_attach(struct ssb_device *dev,
1586 struct b43legacy_wl *wl);
1587 static void b43legacy_one_core_detach(struct ssb_device *dev);
1589 static void b43legacy_request_firmware(struct work_struct *work)
1591 struct b43legacy_wl *wl = container_of(work,
1592 struct b43legacy_wl, firmware_load);
1593 struct b43legacy_wldev *dev = wl->current_dev;
1594 struct b43legacy_firmware *fw = &dev->fw;
1595 const u8 rev = dev->dev->id.revision;
1596 const char *filename;
1601 filename = "/*(DEBLOBBED)*/";
1603 filename = "/*(DEBLOBBED)*/";
1605 filename = "/*(DEBLOBBED)*/";
1606 err = do_request_fw(dev, filename, &fw->ucode, true);
1612 filename = "/*(DEBLOBBED)*/";
1614 filename = "/*(DEBLOBBED)*/";
1615 err = do_request_fw(dev, filename, &fw->pcm, false);
1619 if (!fw->initvals) {
1620 switch (dev->phy.type) {
1621 case B43legacy_PHYTYPE_B:
1622 case B43legacy_PHYTYPE_G:
1623 if ((rev >= 5) && (rev <= 10))
1624 filename = "/*(DEBLOBBED)*/";
1625 else if (rev == 2 || rev == 4)
1626 filename = "/*(DEBLOBBED)*/";
1628 goto err_no_initvals;
1631 goto err_no_initvals;
1633 err = do_request_fw(dev, filename, &fw->initvals, false);
1637 if (!fw->initvals_band) {
1638 switch (dev->phy.type) {
1639 case B43legacy_PHYTYPE_B:
1640 case B43legacy_PHYTYPE_G:
1641 if ((rev >= 5) && (rev <= 10))
1642 filename = "/*(DEBLOBBED)*/";
1645 else if (rev == 2 || rev == 4)
1648 goto err_no_initvals;
1651 goto err_no_initvals;
1653 err = do_request_fw(dev, filename, &fw->initvals_band, false);
1657 err = ieee80211_register_hw(wl->hw);
1659 goto err_one_core_detach;
1662 err_one_core_detach:
1663 b43legacy_one_core_detach(dev->dev);
1667 b43legacy_print_fw_helptext(dev->wl);
1672 b43legacyerr(dev->wl, "No Initial Values firmware file for PHY %u, "
1673 "core rev %u\n", dev->phy.type, rev);
1677 b43legacy_release_firmware(dev);
1681 static int b43legacy_upload_microcode(struct b43legacy_wldev *dev)
1683 struct wiphy *wiphy = dev->wl->hw->wiphy;
1684 const size_t hdr_len = sizeof(struct b43legacy_fw_header);
1695 /* Jump the microcode PSM to offset 0 */
1696 macctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
1697 B43legacy_WARN_ON(macctl & B43legacy_MACCTL_PSM_RUN);
1698 macctl |= B43legacy_MACCTL_PSM_JMP0;
1699 b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl);
1700 /* Zero out all microcode PSM registers and shared memory. */
1701 for (i = 0; i < 64; i++)
1702 b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS, i, 0);
1703 for (i = 0; i < 4096; i += 2)
1704 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, i, 0);
1706 /* Upload Microcode. */
1707 data = (__be32 *) (dev->fw.ucode->data + hdr_len);
1708 len = (dev->fw.ucode->size - hdr_len) / sizeof(__be32);
1709 b43legacy_shm_control_word(dev,
1710 B43legacy_SHM_UCODE |
1711 B43legacy_SHM_AUTOINC_W,
1713 for (i = 0; i < len; i++) {
1714 b43legacy_write32(dev, B43legacy_MMIO_SHM_DATA,
1715 be32_to_cpu(data[i]));
1720 /* Upload PCM data. */
1721 data = (__be32 *) (dev->fw.pcm->data + hdr_len);
1722 len = (dev->fw.pcm->size - hdr_len) / sizeof(__be32);
1723 b43legacy_shm_control_word(dev, B43legacy_SHM_HW, 0x01EA);
1724 b43legacy_write32(dev, B43legacy_MMIO_SHM_DATA, 0x00004000);
1725 /* No need for autoinc bit in SHM_HW */
1726 b43legacy_shm_control_word(dev, B43legacy_SHM_HW, 0x01EB);
1727 for (i = 0; i < len; i++) {
1728 b43legacy_write32(dev, B43legacy_MMIO_SHM_DATA,
1729 be32_to_cpu(data[i]));
1734 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON,
1737 /* Start the microcode PSM */
1738 macctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
1739 macctl &= ~B43legacy_MACCTL_PSM_JMP0;
1740 macctl |= B43legacy_MACCTL_PSM_RUN;
1741 b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl);
1743 /* Wait for the microcode to load and respond */
1746 tmp = b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
1747 if (tmp == B43legacy_IRQ_MAC_SUSPENDED)
1750 if (i >= B43legacy_IRQWAIT_MAX_RETRIES) {
1751 b43legacyerr(dev->wl, "Microcode not responding\n");
1752 b43legacy_print_fw_helptext(dev->wl);
1756 msleep_interruptible(50);
1757 if (signal_pending(current)) {
1762 /* dummy read follows */
1763 b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
1765 /* Get and check the revisions. */
1766 fwrev = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
1767 B43legacy_SHM_SH_UCODEREV);
1768 fwpatch = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
1769 B43legacy_SHM_SH_UCODEPATCH);
1770 fwdate = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
1771 B43legacy_SHM_SH_UCODEDATE);
1772 fwtime = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
1773 B43legacy_SHM_SH_UCODETIME);
1775 if (fwrev > 0x128) {
1776 b43legacyerr(dev->wl, "YOU ARE TRYING TO LOAD V4 FIRMWARE."
1777 " Only firmware from binary drivers version 3.x"
1778 " is supported. You must change your firmware"
1780 b43legacy_print_fw_helptext(dev->wl);
1784 b43legacyinfo(dev->wl, "Loading firmware version 0x%X, patch level %u "
1785 "(20%.2i-%.2i-%.2i %.2i:%.2i:%.2i)\n", fwrev, fwpatch,
1786 (fwdate >> 12) & 0xF, (fwdate >> 8) & 0xF, fwdate & 0xFF,
1787 (fwtime >> 11) & 0x1F, (fwtime >> 5) & 0x3F,
1790 dev->fw.rev = fwrev;
1791 dev->fw.patch = fwpatch;
1793 snprintf(wiphy->fw_version, sizeof(wiphy->fw_version), "%u.%u",
1794 dev->fw.rev, dev->fw.patch);
1795 wiphy->hw_version = dev->dev->id.coreid;
1800 macctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
1801 macctl &= ~B43legacy_MACCTL_PSM_RUN;
1802 macctl |= B43legacy_MACCTL_PSM_JMP0;
1803 b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl);
1808 static int b43legacy_write_initvals(struct b43legacy_wldev *dev,
1809 const struct b43legacy_iv *ivals,
1813 const struct b43legacy_iv *iv;
1818 BUILD_BUG_ON(sizeof(struct b43legacy_iv) != 6);
1820 for (i = 0; i < count; i++) {
1821 if (array_size < sizeof(iv->offset_size))
1823 array_size -= sizeof(iv->offset_size);
1824 offset = be16_to_cpu(iv->offset_size);
1825 bit32 = !!(offset & B43legacy_IV_32BIT);
1826 offset &= B43legacy_IV_OFFSET_MASK;
1827 if (offset >= 0x1000)
1832 if (array_size < sizeof(iv->data.d32))
1834 array_size -= sizeof(iv->data.d32);
1836 value = get_unaligned_be32(&iv->data.d32);
1837 b43legacy_write32(dev, offset, value);
1839 iv = (const struct b43legacy_iv *)((const uint8_t *)iv +
1845 if (array_size < sizeof(iv->data.d16))
1847 array_size -= sizeof(iv->data.d16);
1849 value = be16_to_cpu(iv->data.d16);
1850 b43legacy_write16(dev, offset, value);
1852 iv = (const struct b43legacy_iv *)((const uint8_t *)iv +
1863 b43legacyerr(dev->wl, "Initial Values Firmware file-format error.\n");
1864 b43legacy_print_fw_helptext(dev->wl);
1869 static int b43legacy_upload_initvals(struct b43legacy_wldev *dev)
1871 const size_t hdr_len = sizeof(struct b43legacy_fw_header);
1872 const struct b43legacy_fw_header *hdr;
1873 struct b43legacy_firmware *fw = &dev->fw;
1874 const struct b43legacy_iv *ivals;
1878 hdr = (const struct b43legacy_fw_header *)(fw->initvals->data);
1879 ivals = (const struct b43legacy_iv *)(fw->initvals->data + hdr_len);
1880 count = be32_to_cpu(hdr->size);
1881 err = b43legacy_write_initvals(dev, ivals, count,
1882 fw->initvals->size - hdr_len);
1885 if (fw->initvals_band) {
1886 hdr = (const struct b43legacy_fw_header *)
1887 (fw->initvals_band->data);
1888 ivals = (const struct b43legacy_iv *)(fw->initvals_band->data
1890 count = be32_to_cpu(hdr->size);
1891 err = b43legacy_write_initvals(dev, ivals, count,
1892 fw->initvals_band->size - hdr_len);
1901 /* Initialize the GPIOs
1902 * http://bcm-specs.sipsolutions.net/GPIO
1904 static int b43legacy_gpio_init(struct b43legacy_wldev *dev)
1906 struct ssb_bus *bus = dev->dev->bus;
1907 struct ssb_device *gpiodev, *pcidev = NULL;
1911 b43legacy_write32(dev, B43legacy_MMIO_MACCTL,
1912 b43legacy_read32(dev,
1913 B43legacy_MMIO_MACCTL)
1916 b43legacy_write16(dev, B43legacy_MMIO_GPIO_MASK,
1917 b43legacy_read16(dev,
1918 B43legacy_MMIO_GPIO_MASK)
1923 if (dev->dev->bus->chip_id == 0x4301) {
1927 if (dev->dev->bus->sprom.boardflags_lo & B43legacy_BFL_PACTRL) {
1928 b43legacy_write16(dev, B43legacy_MMIO_GPIO_MASK,
1929 b43legacy_read16(dev,
1930 B43legacy_MMIO_GPIO_MASK)
1935 if (dev->dev->id.revision >= 2)
1936 mask |= 0x0010; /* FIXME: This is redundant. */
1938 #ifdef CONFIG_SSB_DRIVER_PCICORE
1939 pcidev = bus->pcicore.dev;
1941 gpiodev = bus->chipco.dev ? : pcidev;
1944 ssb_write32(gpiodev, B43legacy_GPIO_CONTROL,
1945 (ssb_read32(gpiodev, B43legacy_GPIO_CONTROL)
1951 /* Turn off all GPIO stuff. Call this on module unload, for example. */
1952 static void b43legacy_gpio_cleanup(struct b43legacy_wldev *dev)
1954 struct ssb_bus *bus = dev->dev->bus;
1955 struct ssb_device *gpiodev, *pcidev = NULL;
1957 #ifdef CONFIG_SSB_DRIVER_PCICORE
1958 pcidev = bus->pcicore.dev;
1960 gpiodev = bus->chipco.dev ? : pcidev;
1963 ssb_write32(gpiodev, B43legacy_GPIO_CONTROL, 0);
1966 /* http://bcm-specs.sipsolutions.net/EnableMac */
1967 void b43legacy_mac_enable(struct b43legacy_wldev *dev)
1969 dev->mac_suspended--;
1970 B43legacy_WARN_ON(dev->mac_suspended < 0);
1971 B43legacy_WARN_ON(irqs_disabled());
1972 if (dev->mac_suspended == 0) {
1973 b43legacy_write32(dev, B43legacy_MMIO_MACCTL,
1974 b43legacy_read32(dev,
1975 B43legacy_MMIO_MACCTL)
1976 | B43legacy_MACCTL_ENABLED);
1977 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON,
1978 B43legacy_IRQ_MAC_SUSPENDED);
1979 /* the next two are dummy reads */
1980 b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
1981 b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
1982 b43legacy_power_saving_ctl_bits(dev, -1, -1);
1984 /* Re-enable IRQs. */
1985 spin_lock_irq(&dev->wl->irq_lock);
1986 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK,
1988 spin_unlock_irq(&dev->wl->irq_lock);
1992 /* http://bcm-specs.sipsolutions.net/SuspendMAC */
1993 void b43legacy_mac_suspend(struct b43legacy_wldev *dev)
1999 B43legacy_WARN_ON(irqs_disabled());
2000 B43legacy_WARN_ON(dev->mac_suspended < 0);
2002 if (dev->mac_suspended == 0) {
2003 /* Mask IRQs before suspending MAC. Otherwise
2004 * the MAC stays busy and won't suspend. */
2005 spin_lock_irq(&dev->wl->irq_lock);
2006 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, 0);
2007 spin_unlock_irq(&dev->wl->irq_lock);
2008 b43legacy_synchronize_irq(dev);
2010 b43legacy_power_saving_ctl_bits(dev, -1, 1);
2011 b43legacy_write32(dev, B43legacy_MMIO_MACCTL,
2012 b43legacy_read32(dev,
2013 B43legacy_MMIO_MACCTL)
2014 & ~B43legacy_MACCTL_ENABLED);
2015 b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
2016 for (i = 40; i; i--) {
2017 tmp = b43legacy_read32(dev,
2018 B43legacy_MMIO_GEN_IRQ_REASON);
2019 if (tmp & B43legacy_IRQ_MAC_SUSPENDED)
2023 b43legacyerr(dev->wl, "MAC suspend failed\n");
2026 dev->mac_suspended++;
2029 static void b43legacy_adjust_opmode(struct b43legacy_wldev *dev)
2031 struct b43legacy_wl *wl = dev->wl;
2035 ctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
2036 /* Reset status to STA infrastructure mode. */
2037 ctl &= ~B43legacy_MACCTL_AP;
2038 ctl &= ~B43legacy_MACCTL_KEEP_CTL;
2039 ctl &= ~B43legacy_MACCTL_KEEP_BADPLCP;
2040 ctl &= ~B43legacy_MACCTL_KEEP_BAD;
2041 ctl &= ~B43legacy_MACCTL_PROMISC;
2042 ctl &= ~B43legacy_MACCTL_BEACPROMISC;
2043 ctl |= B43legacy_MACCTL_INFRA;
2045 if (b43legacy_is_mode(wl, NL80211_IFTYPE_AP))
2046 ctl |= B43legacy_MACCTL_AP;
2047 else if (b43legacy_is_mode(wl, NL80211_IFTYPE_ADHOC))
2048 ctl &= ~B43legacy_MACCTL_INFRA;
2050 if (wl->filter_flags & FIF_CONTROL)
2051 ctl |= B43legacy_MACCTL_KEEP_CTL;
2052 if (wl->filter_flags & FIF_FCSFAIL)
2053 ctl |= B43legacy_MACCTL_KEEP_BAD;
2054 if (wl->filter_flags & FIF_PLCPFAIL)
2055 ctl |= B43legacy_MACCTL_KEEP_BADPLCP;
2056 if (wl->filter_flags & FIF_BCN_PRBRESP_PROMISC)
2057 ctl |= B43legacy_MACCTL_BEACPROMISC;
2059 /* Workaround: On old hardware the HW-MAC-address-filter
2060 * doesn't work properly, so always run promisc in filter
2061 * it in software. */
2062 if (dev->dev->id.revision <= 4)
2063 ctl |= B43legacy_MACCTL_PROMISC;
2065 b43legacy_write32(dev, B43legacy_MMIO_MACCTL, ctl);
2068 if ((ctl & B43legacy_MACCTL_INFRA) &&
2069 !(ctl & B43legacy_MACCTL_AP)) {
2070 if (dev->dev->bus->chip_id == 0x4306 &&
2071 dev->dev->bus->chip_rev == 3)
2076 b43legacy_write16(dev, 0x612, cfp_pretbtt);
2079 static void b43legacy_rate_memory_write(struct b43legacy_wldev *dev,
2087 offset += (b43legacy_plcp_get_ratecode_ofdm(rate) & 0x000F) * 2;
2090 offset += (b43legacy_plcp_get_ratecode_cck(rate) & 0x000F) * 2;
2092 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, offset + 0x20,
2093 b43legacy_shm_read16(dev,
2094 B43legacy_SHM_SHARED, offset));
2097 static void b43legacy_rate_memory_init(struct b43legacy_wldev *dev)
2099 switch (dev->phy.type) {
2100 case B43legacy_PHYTYPE_G:
2101 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_6MB, 1);
2102 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_12MB, 1);
2103 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_18MB, 1);
2104 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_24MB, 1);
2105 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_36MB, 1);
2106 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_48MB, 1);
2107 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_54MB, 1);
2109 case B43legacy_PHYTYPE_B:
2110 b43legacy_rate_memory_write(dev, B43legacy_CCK_RATE_1MB, 0);
2111 b43legacy_rate_memory_write(dev, B43legacy_CCK_RATE_2MB, 0);
2112 b43legacy_rate_memory_write(dev, B43legacy_CCK_RATE_5MB, 0);
2113 b43legacy_rate_memory_write(dev, B43legacy_CCK_RATE_11MB, 0);
2116 B43legacy_BUG_ON(1);
2120 /* Set the TX-Antenna for management frames sent by firmware. */
2121 static void b43legacy_mgmtframe_txantenna(struct b43legacy_wldev *dev,
2128 case B43legacy_ANTENNA0:
2129 ant |= B43legacy_TX4_PHY_ANT0;
2131 case B43legacy_ANTENNA1:
2132 ant |= B43legacy_TX4_PHY_ANT1;
2134 case B43legacy_ANTENNA_AUTO:
2135 ant |= B43legacy_TX4_PHY_ANTLAST;
2138 B43legacy_BUG_ON(1);
2141 /* FIXME We also need to set the other flags of the PHY control
2142 * field somewhere. */
2145 tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
2146 B43legacy_SHM_SH_BEACPHYCTL);
2147 tmp = (tmp & ~B43legacy_TX4_PHY_ANT) | ant;
2148 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
2149 B43legacy_SHM_SH_BEACPHYCTL, tmp);
2151 tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
2152 B43legacy_SHM_SH_ACKCTSPHYCTL);
2153 tmp = (tmp & ~B43legacy_TX4_PHY_ANT) | ant;
2154 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
2155 B43legacy_SHM_SH_ACKCTSPHYCTL, tmp);
2156 /* For Probe Resposes */
2157 tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
2158 B43legacy_SHM_SH_PRPHYCTL);
2159 tmp = (tmp & ~B43legacy_TX4_PHY_ANT) | ant;
2160 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
2161 B43legacy_SHM_SH_PRPHYCTL, tmp);
2164 /* This is the opposite of b43legacy_chip_init() */
2165 static void b43legacy_chip_exit(struct b43legacy_wldev *dev)
2167 b43legacy_radio_turn_off(dev, 1);
2168 b43legacy_gpio_cleanup(dev);
2169 /* firmware is released later */
2172 /* Initialize the chip
2173 * http://bcm-specs.sipsolutions.net/ChipInit
2175 static int b43legacy_chip_init(struct b43legacy_wldev *dev)
2177 struct b43legacy_phy *phy = &dev->phy;
2180 u32 value32, macctl;
2183 /* Initialize the MAC control */
2184 macctl = B43legacy_MACCTL_IHR_ENABLED | B43legacy_MACCTL_SHM_ENABLED;
2186 macctl |= B43legacy_MACCTL_GMODE;
2187 macctl |= B43legacy_MACCTL_INFRA;
2188 b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl);
2190 err = b43legacy_upload_microcode(dev);
2192 goto out; /* firmware is released later */
2194 err = b43legacy_gpio_init(dev);
2196 goto out; /* firmware is released later */
2198 err = b43legacy_upload_initvals(dev);
2200 goto err_gpio_clean;
2201 b43legacy_radio_turn_on(dev);
2203 b43legacy_write16(dev, 0x03E6, 0x0000);
2204 err = b43legacy_phy_init(dev);
2208 /* Select initial Interference Mitigation. */
2209 tmp = phy->interfmode;
2210 phy->interfmode = B43legacy_INTERFMODE_NONE;
2211 b43legacy_radio_set_interference_mitigation(dev, tmp);
2213 b43legacy_phy_set_antenna_diversity(dev);
2214 b43legacy_mgmtframe_txantenna(dev, B43legacy_ANTENNA_DEFAULT);
2216 if (phy->type == B43legacy_PHYTYPE_B) {
2217 value16 = b43legacy_read16(dev, 0x005E);
2219 b43legacy_write16(dev, 0x005E, value16);
2221 b43legacy_write32(dev, 0x0100, 0x01000000);
2222 if (dev->dev->id.revision < 5)
2223 b43legacy_write32(dev, 0x010C, 0x01000000);
2225 value32 = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
2226 value32 &= ~B43legacy_MACCTL_INFRA;
2227 b43legacy_write32(dev, B43legacy_MMIO_MACCTL, value32);
2228 value32 = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
2229 value32 |= B43legacy_MACCTL_INFRA;
2230 b43legacy_write32(dev, B43legacy_MMIO_MACCTL, value32);
2232 if (b43legacy_using_pio(dev)) {
2233 b43legacy_write32(dev, 0x0210, 0x00000100);
2234 b43legacy_write32(dev, 0x0230, 0x00000100);
2235 b43legacy_write32(dev, 0x0250, 0x00000100);
2236 b43legacy_write32(dev, 0x0270, 0x00000100);
2237 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x0034,
2241 /* Probe Response Timeout value */
2242 /* FIXME: Default to 0, has to be set by ioctl probably... :-/ */
2243 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x0074, 0x0000);
2245 /* Initially set the wireless operation mode. */
2246 b43legacy_adjust_opmode(dev);
2248 if (dev->dev->id.revision < 3) {
2249 b43legacy_write16(dev, 0x060E, 0x0000);
2250 b43legacy_write16(dev, 0x0610, 0x8000);
2251 b43legacy_write16(dev, 0x0604, 0x0000);
2252 b43legacy_write16(dev, 0x0606, 0x0200);
2254 b43legacy_write32(dev, 0x0188, 0x80000000);
2255 b43legacy_write32(dev, 0x018C, 0x02000000);
2257 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON, 0x00004000);
2258 b43legacy_write32(dev, B43legacy_MMIO_DMA0_IRQ_MASK, 0x0001DC00);
2259 b43legacy_write32(dev, B43legacy_MMIO_DMA1_IRQ_MASK, 0x0000DC00);
2260 b43legacy_write32(dev, B43legacy_MMIO_DMA2_IRQ_MASK, 0x0000DC00);
2261 b43legacy_write32(dev, B43legacy_MMIO_DMA3_IRQ_MASK, 0x0001DC00);
2262 b43legacy_write32(dev, B43legacy_MMIO_DMA4_IRQ_MASK, 0x0000DC00);
2263 b43legacy_write32(dev, B43legacy_MMIO_DMA5_IRQ_MASK, 0x0000DC00);
2265 value32 = ssb_read32(dev->dev, SSB_TMSLOW);
2266 value32 |= B43legacy_TMSLOW_MACPHYCLKEN;
2267 ssb_write32(dev->dev, SSB_TMSLOW, value32);
2269 b43legacy_write16(dev, B43legacy_MMIO_POWERUP_DELAY,
2270 dev->dev->bus->chipco.fast_pwrup_delay);
2272 /* PHY TX errors counter. */
2273 atomic_set(&phy->txerr_cnt, B43legacy_PHY_TX_BADNESS_LIMIT);
2275 B43legacy_WARN_ON(err != 0);
2276 b43legacydbg(dev->wl, "Chip initialized\n");
2281 b43legacy_radio_turn_off(dev, 1);
2283 b43legacy_gpio_cleanup(dev);
2287 static void b43legacy_periodic_every120sec(struct b43legacy_wldev *dev)
2289 struct b43legacy_phy *phy = &dev->phy;
2291 if (phy->type != B43legacy_PHYTYPE_G || phy->rev < 2)
2294 b43legacy_mac_suspend(dev);
2295 b43legacy_phy_lo_g_measure(dev);
2296 b43legacy_mac_enable(dev);
2299 static void b43legacy_periodic_every60sec(struct b43legacy_wldev *dev)
2301 b43legacy_phy_lo_mark_all_unused(dev);
2302 if (dev->dev->bus->sprom.boardflags_lo & B43legacy_BFL_RSSI) {
2303 b43legacy_mac_suspend(dev);
2304 b43legacy_calc_nrssi_slope(dev);
2305 b43legacy_mac_enable(dev);
2309 static void b43legacy_periodic_every30sec(struct b43legacy_wldev *dev)
2311 /* Update device statistics. */
2312 b43legacy_calculate_link_quality(dev);
2315 static void b43legacy_periodic_every15sec(struct b43legacy_wldev *dev)
2317 b43legacy_phy_xmitpower(dev); /* FIXME: unless scanning? */
2319 atomic_set(&dev->phy.txerr_cnt, B43legacy_PHY_TX_BADNESS_LIMIT);
2323 static void do_periodic_work(struct b43legacy_wldev *dev)
2327 state = dev->periodic_state;
2329 b43legacy_periodic_every120sec(dev);
2331 b43legacy_periodic_every60sec(dev);
2333 b43legacy_periodic_every30sec(dev);
2334 b43legacy_periodic_every15sec(dev);
2337 /* Periodic work locking policy:
2338 * The whole periodic work handler is protected by
2339 * wl->mutex. If another lock is needed somewhere in the
2340 * pwork callchain, it's acquired in-place, where it's needed.
2342 static void b43legacy_periodic_work_handler(struct work_struct *work)
2344 struct b43legacy_wldev *dev = container_of(work, struct b43legacy_wldev,
2345 periodic_work.work);
2346 struct b43legacy_wl *wl = dev->wl;
2347 unsigned long delay;
2349 mutex_lock(&wl->mutex);
2351 if (unlikely(b43legacy_status(dev) != B43legacy_STAT_STARTED))
2353 if (b43legacy_debug(dev, B43legacy_DBG_PWORK_STOP))
2356 do_periodic_work(dev);
2358 dev->periodic_state++;
2360 if (b43legacy_debug(dev, B43legacy_DBG_PWORK_FAST))
2361 delay = msecs_to_jiffies(50);
2363 delay = round_jiffies_relative(HZ * 15);
2364 ieee80211_queue_delayed_work(wl->hw, &dev->periodic_work, delay);
2366 mutex_unlock(&wl->mutex);
2369 static void b43legacy_periodic_tasks_setup(struct b43legacy_wldev *dev)
2371 struct delayed_work *work = &dev->periodic_work;
2373 dev->periodic_state = 0;
2374 INIT_DELAYED_WORK(work, b43legacy_periodic_work_handler);
2375 ieee80211_queue_delayed_work(dev->wl->hw, work, 0);
2378 /* Validate access to the chip (SHM) */
2379 static int b43legacy_validate_chipaccess(struct b43legacy_wldev *dev)
2384 shm_backup = b43legacy_shm_read32(dev, B43legacy_SHM_SHARED, 0);
2385 b43legacy_shm_write32(dev, B43legacy_SHM_SHARED, 0, 0xAA5555AA);
2386 if (b43legacy_shm_read32(dev, B43legacy_SHM_SHARED, 0) !=
2389 b43legacy_shm_write32(dev, B43legacy_SHM_SHARED, 0, 0x55AAAA55);
2390 if (b43legacy_shm_read32(dev, B43legacy_SHM_SHARED, 0) !=
2393 b43legacy_shm_write32(dev, B43legacy_SHM_SHARED, 0, shm_backup);
2395 value = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
2396 if ((value | B43legacy_MACCTL_GMODE) !=
2397 (B43legacy_MACCTL_GMODE | B43legacy_MACCTL_IHR_ENABLED))
2400 value = b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
2406 b43legacyerr(dev->wl, "Failed to validate the chipaccess\n");
2410 static void b43legacy_security_init(struct b43legacy_wldev *dev)
2412 dev->max_nr_keys = (dev->dev->id.revision >= 5) ? 58 : 20;
2413 B43legacy_WARN_ON(dev->max_nr_keys > ARRAY_SIZE(dev->key));
2414 dev->ktp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
2416 /* KTP is a word address, but we address SHM bytewise.
2417 * So multiply by two.
2420 if (dev->dev->id.revision >= 5)
2421 /* Number of RCMTA address slots */
2422 b43legacy_write16(dev, B43legacy_MMIO_RCMTA_COUNT,
2423 dev->max_nr_keys - 8);
2426 #ifdef CONFIG_B43LEGACY_HWRNG
2427 static int b43legacy_rng_read(struct hwrng *rng, u32 *data)
2429 struct b43legacy_wl *wl = (struct b43legacy_wl *)rng->priv;
2430 unsigned long flags;
2432 /* Don't take wl->mutex here, as it could deadlock with
2433 * hwrng internal locking. It's not needed to take
2434 * wl->mutex here, anyway. */
2436 spin_lock_irqsave(&wl->irq_lock, flags);
2437 *data = b43legacy_read16(wl->current_dev, B43legacy_MMIO_RNG);
2438 spin_unlock_irqrestore(&wl->irq_lock, flags);
2440 return (sizeof(u16));
2444 static void b43legacy_rng_exit(struct b43legacy_wl *wl)
2446 #ifdef CONFIG_B43LEGACY_HWRNG
2447 if (wl->rng_initialized)
2448 hwrng_unregister(&wl->rng);
2452 static int b43legacy_rng_init(struct b43legacy_wl *wl)
2456 #ifdef CONFIG_B43LEGACY_HWRNG
2457 snprintf(wl->rng_name, ARRAY_SIZE(wl->rng_name),
2458 "%s_%s", KBUILD_MODNAME, wiphy_name(wl->hw->wiphy));
2459 wl->rng.name = wl->rng_name;
2460 wl->rng.data_read = b43legacy_rng_read;
2461 wl->rng.priv = (unsigned long)wl;
2462 wl->rng_initialized = 1;
2463 err = hwrng_register(&wl->rng);
2465 wl->rng_initialized = 0;
2466 b43legacyerr(wl, "Failed to register the random "
2467 "number generator (%d)\n", err);
2474 static void b43legacy_tx_work(struct work_struct *work)
2476 struct b43legacy_wl *wl = container_of(work, struct b43legacy_wl,
2478 struct b43legacy_wldev *dev;
2479 struct sk_buff *skb;
2483 mutex_lock(&wl->mutex);
2484 dev = wl->current_dev;
2485 if (unlikely(!dev || b43legacy_status(dev) < B43legacy_STAT_STARTED)) {
2486 mutex_unlock(&wl->mutex);
2490 for (queue_num = 0; queue_num < B43legacy_QOS_QUEUE_NUM; queue_num++) {
2491 while (skb_queue_len(&wl->tx_queue[queue_num])) {
2492 skb = skb_dequeue(&wl->tx_queue[queue_num]);
2493 if (b43legacy_using_pio(dev))
2494 err = b43legacy_pio_tx(dev, skb);
2496 err = b43legacy_dma_tx(dev, skb);
2497 if (err == -ENOSPC) {
2498 wl->tx_queue_stopped[queue_num] = 1;
2499 ieee80211_stop_queue(wl->hw, queue_num);
2500 skb_queue_head(&wl->tx_queue[queue_num], skb);
2504 dev_kfree_skb(skb); /* Drop it */
2509 wl->tx_queue_stopped[queue_num] = 0;
2512 mutex_unlock(&wl->mutex);
2515 static void b43legacy_op_tx(struct ieee80211_hw *hw,
2516 struct ieee80211_tx_control *control,
2517 struct sk_buff *skb)
2519 struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2521 if (unlikely(skb->len < 2 + 2 + 6)) {
2522 /* Too short, this can't be a valid frame. */
2523 dev_kfree_skb_any(skb);
2526 B43legacy_WARN_ON(skb_shinfo(skb)->nr_frags);
2528 skb_queue_tail(&wl->tx_queue[skb->queue_mapping], skb);
2529 if (!wl->tx_queue_stopped[skb->queue_mapping])
2530 ieee80211_queue_work(wl->hw, &wl->tx_work);
2532 ieee80211_stop_queue(wl->hw, skb->queue_mapping);
2535 static int b43legacy_op_conf_tx(struct ieee80211_hw *hw,
2536 struct ieee80211_vif *vif, u16 queue,
2537 const struct ieee80211_tx_queue_params *params)
2542 static int b43legacy_op_get_stats(struct ieee80211_hw *hw,
2543 struct ieee80211_low_level_stats *stats)
2545 struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2546 unsigned long flags;
2548 spin_lock_irqsave(&wl->irq_lock, flags);
2549 memcpy(stats, &wl->ieee_stats, sizeof(*stats));
2550 spin_unlock_irqrestore(&wl->irq_lock, flags);
2555 static const char *phymode_to_string(unsigned int phymode)
2558 case B43legacy_PHYMODE_B:
2560 case B43legacy_PHYMODE_G:
2563 B43legacy_BUG_ON(1);
2568 static int find_wldev_for_phymode(struct b43legacy_wl *wl,
2569 unsigned int phymode,
2570 struct b43legacy_wldev **dev,
2573 struct b43legacy_wldev *d;
2575 list_for_each_entry(d, &wl->devlist, list) {
2576 if (d->phy.possible_phymodes & phymode) {
2577 /* Ok, this device supports the PHY-mode.
2578 * Set the gmode bit. */
2589 static void b43legacy_put_phy_into_reset(struct b43legacy_wldev *dev)
2591 struct ssb_device *sdev = dev->dev;
2594 tmslow = ssb_read32(sdev, SSB_TMSLOW);
2595 tmslow &= ~B43legacy_TMSLOW_GMODE;
2596 tmslow |= B43legacy_TMSLOW_PHYRESET;
2597 tmslow |= SSB_TMSLOW_FGC;
2598 ssb_write32(sdev, SSB_TMSLOW, tmslow);
2601 tmslow = ssb_read32(sdev, SSB_TMSLOW);
2602 tmslow &= ~SSB_TMSLOW_FGC;
2603 tmslow |= B43legacy_TMSLOW_PHYRESET;
2604 ssb_write32(sdev, SSB_TMSLOW, tmslow);
2608 /* Expects wl->mutex locked */
2609 static int b43legacy_switch_phymode(struct b43legacy_wl *wl,
2610 unsigned int new_mode)
2612 struct b43legacy_wldev *uninitialized_var(up_dev);
2613 struct b43legacy_wldev *down_dev;
2618 err = find_wldev_for_phymode(wl, new_mode, &up_dev, &gmode);
2620 b43legacyerr(wl, "Could not find a device for %s-PHY mode\n",
2621 phymode_to_string(new_mode));
2624 if ((up_dev == wl->current_dev) &&
2625 (!!wl->current_dev->phy.gmode == !!gmode))
2626 /* This device is already running. */
2628 b43legacydbg(wl, "Reconfiguring PHYmode to %s-PHY\n",
2629 phymode_to_string(new_mode));
2630 down_dev = wl->current_dev;
2632 prev_status = b43legacy_status(down_dev);
2633 /* Shutdown the currently running core. */
2634 if (prev_status >= B43legacy_STAT_STARTED)
2635 b43legacy_wireless_core_stop(down_dev);
2636 if (prev_status >= B43legacy_STAT_INITIALIZED)
2637 b43legacy_wireless_core_exit(down_dev);
2639 if (down_dev != up_dev)
2640 /* We switch to a different core, so we put PHY into
2641 * RESET on the old core. */
2642 b43legacy_put_phy_into_reset(down_dev);
2644 /* Now start the new core. */
2645 up_dev->phy.gmode = gmode;
2646 if (prev_status >= B43legacy_STAT_INITIALIZED) {
2647 err = b43legacy_wireless_core_init(up_dev);
2649 b43legacyerr(wl, "Fatal: Could not initialize device"
2650 " for newly selected %s-PHY mode\n",
2651 phymode_to_string(new_mode));
2655 if (prev_status >= B43legacy_STAT_STARTED) {
2656 err = b43legacy_wireless_core_start(up_dev);
2658 b43legacyerr(wl, "Fatal: Could not start device for "
2659 "newly selected %s-PHY mode\n",
2660 phymode_to_string(new_mode));
2661 b43legacy_wireless_core_exit(up_dev);
2665 B43legacy_WARN_ON(b43legacy_status(up_dev) != prev_status);
2667 b43legacy_shm_write32(up_dev, B43legacy_SHM_SHARED, 0x003E, 0);
2669 wl->current_dev = up_dev;
2673 /* Whoops, failed to init the new core. No core is operating now. */
2674 wl->current_dev = NULL;
2678 /* Write the short and long frame retry limit values. */
2679 static void b43legacy_set_retry_limits(struct b43legacy_wldev *dev,
2680 unsigned int short_retry,
2681 unsigned int long_retry)
2683 /* The retry limit is a 4-bit counter. Enforce this to avoid overflowing
2684 * the chip-internal counter. */
2685 short_retry = min(short_retry, (unsigned int)0xF);
2686 long_retry = min(long_retry, (unsigned int)0xF);
2688 b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS, 0x0006, short_retry);
2689 b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS, 0x0007, long_retry);
2692 static int b43legacy_op_dev_config(struct ieee80211_hw *hw,
2695 struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2696 struct b43legacy_wldev *dev;
2697 struct b43legacy_phy *phy;
2698 struct ieee80211_conf *conf = &hw->conf;
2699 unsigned long flags;
2700 unsigned int new_phymode = 0xFFFF;
2704 antenna_tx = B43legacy_ANTENNA_DEFAULT;
2706 mutex_lock(&wl->mutex);
2707 dev = wl->current_dev;
2710 if (changed & IEEE80211_CONF_CHANGE_RETRY_LIMITS)
2711 b43legacy_set_retry_limits(dev,
2712 conf->short_frame_max_tx_count,
2713 conf->long_frame_max_tx_count);
2714 changed &= ~IEEE80211_CONF_CHANGE_RETRY_LIMITS;
2716 goto out_unlock_mutex;
2718 /* Switch the PHY mode (if necessary). */
2719 switch (conf->chandef.chan->band) {
2720 case NL80211_BAND_2GHZ:
2721 if (phy->type == B43legacy_PHYTYPE_B)
2722 new_phymode = B43legacy_PHYMODE_B;
2724 new_phymode = B43legacy_PHYMODE_G;
2727 B43legacy_WARN_ON(1);
2729 err = b43legacy_switch_phymode(wl, new_phymode);
2731 goto out_unlock_mutex;
2733 /* Disable IRQs while reconfiguring the device.
2734 * This makes it possible to drop the spinlock throughout
2735 * the reconfiguration process. */
2736 spin_lock_irqsave(&wl->irq_lock, flags);
2737 if (b43legacy_status(dev) < B43legacy_STAT_STARTED) {
2738 spin_unlock_irqrestore(&wl->irq_lock, flags);
2739 goto out_unlock_mutex;
2741 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, 0);
2742 spin_unlock_irqrestore(&wl->irq_lock, flags);
2743 b43legacy_synchronize_irq(dev);
2745 /* Switch to the requested channel.
2746 * The firmware takes care of races with the TX handler. */
2747 if (conf->chandef.chan->hw_value != phy->channel)
2748 b43legacy_radio_selectchannel(dev, conf->chandef.chan->hw_value,
2751 dev->wl->radiotap_enabled = !!(conf->flags & IEEE80211_CONF_MONITOR);
2753 /* Adjust the desired TX power level. */
2754 if (conf->power_level != 0) {
2755 if (conf->power_level != phy->power_level) {
2756 phy->power_level = conf->power_level;
2757 b43legacy_phy_xmitpower(dev);
2761 /* Antennas for RX and management frame TX. */
2762 b43legacy_mgmtframe_txantenna(dev, antenna_tx);
2764 if (wl->radio_enabled != phy->radio_on) {
2765 if (wl->radio_enabled) {
2766 b43legacy_radio_turn_on(dev);
2767 b43legacyinfo(dev->wl, "Radio turned on by software\n");
2768 if (!dev->radio_hw_enable)
2769 b43legacyinfo(dev->wl, "The hardware RF-kill"
2770 " button still turns the radio"
2771 " physically off. Press the"
2772 " button to turn it on.\n");
2774 b43legacy_radio_turn_off(dev, 0);
2775 b43legacyinfo(dev->wl, "Radio turned off by"
2780 spin_lock_irqsave(&wl->irq_lock, flags);
2781 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, dev->irq_mask);
2783 spin_unlock_irqrestore(&wl->irq_lock, flags);
2785 mutex_unlock(&wl->mutex);
2790 static void b43legacy_update_basic_rates(struct b43legacy_wldev *dev, u32 brates)
2792 struct ieee80211_supported_band *sband =
2793 dev->wl->hw->wiphy->bands[NL80211_BAND_2GHZ];
2794 struct ieee80211_rate *rate;
2796 u16 basic, direct, offset, basic_offset, rateptr;
2798 for (i = 0; i < sband->n_bitrates; i++) {
2799 rate = &sband->bitrates[i];
2801 if (b43legacy_is_cck_rate(rate->hw_value)) {
2802 direct = B43legacy_SHM_SH_CCKDIRECT;
2803 basic = B43legacy_SHM_SH_CCKBASIC;
2804 offset = b43legacy_plcp_get_ratecode_cck(rate->hw_value);
2807 direct = B43legacy_SHM_SH_OFDMDIRECT;
2808 basic = B43legacy_SHM_SH_OFDMBASIC;
2809 offset = b43legacy_plcp_get_ratecode_ofdm(rate->hw_value);
2813 rate = ieee80211_get_response_rate(sband, brates, rate->bitrate);
2815 if (b43legacy_is_cck_rate(rate->hw_value)) {
2816 basic_offset = b43legacy_plcp_get_ratecode_cck(rate->hw_value);
2817 basic_offset &= 0xF;
2819 basic_offset = b43legacy_plcp_get_ratecode_ofdm(rate->hw_value);
2820 basic_offset &= 0xF;
2824 * Get the pointer that we need to point to
2825 * from the direct map
2827 rateptr = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
2828 direct + 2 * basic_offset);
2829 /* and write it to the basic map */
2830 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
2831 basic + 2 * offset, rateptr);
2835 static void b43legacy_op_bss_info_changed(struct ieee80211_hw *hw,
2836 struct ieee80211_vif *vif,
2837 struct ieee80211_bss_conf *conf,
2840 struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2841 struct b43legacy_wldev *dev;
2842 unsigned long flags;
2844 mutex_lock(&wl->mutex);
2845 B43legacy_WARN_ON(wl->vif != vif);
2847 dev = wl->current_dev;
2849 /* Disable IRQs while reconfiguring the device.
2850 * This makes it possible to drop the spinlock throughout
2851 * the reconfiguration process. */
2852 spin_lock_irqsave(&wl->irq_lock, flags);
2853 if (b43legacy_status(dev) < B43legacy_STAT_STARTED) {
2854 spin_unlock_irqrestore(&wl->irq_lock, flags);
2855 goto out_unlock_mutex;
2857 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, 0);
2859 if (changed & BSS_CHANGED_BSSID) {
2860 b43legacy_synchronize_irq(dev);
2863 memcpy(wl->bssid, conf->bssid, ETH_ALEN);
2865 eth_zero_addr(wl->bssid);
2868 if (b43legacy_status(dev) >= B43legacy_STAT_INITIALIZED) {
2869 if (changed & BSS_CHANGED_BEACON &&
2870 (b43legacy_is_mode(wl, NL80211_IFTYPE_AP) ||
2871 b43legacy_is_mode(wl, NL80211_IFTYPE_ADHOC)))
2872 b43legacy_update_templates(wl);
2874 if (changed & BSS_CHANGED_BSSID)
2875 b43legacy_write_mac_bssid_templates(dev);
2877 spin_unlock_irqrestore(&wl->irq_lock, flags);
2879 b43legacy_mac_suspend(dev);
2881 if (changed & BSS_CHANGED_BEACON_INT &&
2882 (b43legacy_is_mode(wl, NL80211_IFTYPE_AP) ||
2883 b43legacy_is_mode(wl, NL80211_IFTYPE_ADHOC)))
2884 b43legacy_set_beacon_int(dev, conf->beacon_int);
2886 if (changed & BSS_CHANGED_BASIC_RATES)
2887 b43legacy_update_basic_rates(dev, conf->basic_rates);
2889 if (changed & BSS_CHANGED_ERP_SLOT) {
2890 if (conf->use_short_slot)
2891 b43legacy_short_slot_timing_enable(dev);
2893 b43legacy_short_slot_timing_disable(dev);
2896 b43legacy_mac_enable(dev);
2898 spin_lock_irqsave(&wl->irq_lock, flags);
2899 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, dev->irq_mask);
2902 spin_unlock_irqrestore(&wl->irq_lock, flags);
2904 mutex_unlock(&wl->mutex);
2907 static void b43legacy_op_configure_filter(struct ieee80211_hw *hw,
2908 unsigned int changed,
2909 unsigned int *fflags,u64 multicast)
2911 struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2912 struct b43legacy_wldev *dev = wl->current_dev;
2913 unsigned long flags;
2920 spin_lock_irqsave(&wl->irq_lock, flags);
2921 *fflags &= FIF_ALLMULTI |
2926 FIF_BCN_PRBRESP_PROMISC;
2928 changed &= FIF_ALLMULTI |
2933 FIF_BCN_PRBRESP_PROMISC;
2935 wl->filter_flags = *fflags;
2937 if (changed && b43legacy_status(dev) >= B43legacy_STAT_INITIALIZED)
2938 b43legacy_adjust_opmode(dev);
2939 spin_unlock_irqrestore(&wl->irq_lock, flags);
2942 /* Locking: wl->mutex */
2943 static void b43legacy_wireless_core_stop(struct b43legacy_wldev *dev)
2945 struct b43legacy_wl *wl = dev->wl;
2946 unsigned long flags;
2949 if (b43legacy_status(dev) < B43legacy_STAT_STARTED)
2952 /* Disable and sync interrupts. We must do this before than
2953 * setting the status to INITIALIZED, as the interrupt handler
2954 * won't care about IRQs then. */
2955 spin_lock_irqsave(&wl->irq_lock, flags);
2956 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, 0);
2957 b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_MASK); /* flush */
2958 spin_unlock_irqrestore(&wl->irq_lock, flags);
2959 b43legacy_synchronize_irq(dev);
2961 b43legacy_set_status(dev, B43legacy_STAT_INITIALIZED);
2963 mutex_unlock(&wl->mutex);
2964 /* Must unlock as it would otherwise deadlock. No races here.
2965 * Cancel the possibly running self-rearming periodic work. */
2966 cancel_delayed_work_sync(&dev->periodic_work);
2967 cancel_work_sync(&wl->tx_work);
2968 mutex_lock(&wl->mutex);
2970 /* Drain all TX queues. */
2971 for (queue_num = 0; queue_num < B43legacy_QOS_QUEUE_NUM; queue_num++) {
2972 while (skb_queue_len(&wl->tx_queue[queue_num]))
2973 dev_kfree_skb(skb_dequeue(&wl->tx_queue[queue_num]));
2976 b43legacy_mac_suspend(dev);
2977 free_irq(dev->dev->irq, dev);
2978 b43legacydbg(wl, "Wireless interface stopped\n");
2981 /* Locking: wl->mutex */
2982 static int b43legacy_wireless_core_start(struct b43legacy_wldev *dev)
2986 B43legacy_WARN_ON(b43legacy_status(dev) != B43legacy_STAT_INITIALIZED);
2988 drain_txstatus_queue(dev);
2989 err = request_irq(dev->dev->irq, b43legacy_interrupt_handler,
2990 IRQF_SHARED, KBUILD_MODNAME, dev);
2992 b43legacyerr(dev->wl, "Cannot request IRQ-%d\n",
2996 /* We are ready to run. */
2997 ieee80211_wake_queues(dev->wl->hw);
2998 b43legacy_set_status(dev, B43legacy_STAT_STARTED);
3000 /* Start data flow (TX/RX) */
3001 b43legacy_mac_enable(dev);
3002 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, dev->irq_mask);
3004 /* Start maintenance work */
3005 b43legacy_periodic_tasks_setup(dev);
3007 b43legacydbg(dev->wl, "Wireless interface started\n");
3012 /* Get PHY and RADIO versioning numbers */
3013 static int b43legacy_phy_versioning(struct b43legacy_wldev *dev)
3015 struct b43legacy_phy *phy = &dev->phy;
3023 int unsupported = 0;
3025 /* Get PHY versioning */
3026 tmp = b43legacy_read16(dev, B43legacy_MMIO_PHY_VER);
3027 analog_type = (tmp & B43legacy_PHYVER_ANALOG)
3028 >> B43legacy_PHYVER_ANALOG_SHIFT;
3029 phy_type = (tmp & B43legacy_PHYVER_TYPE) >> B43legacy_PHYVER_TYPE_SHIFT;
3030 phy_rev = (tmp & B43legacy_PHYVER_VERSION);
3032 case B43legacy_PHYTYPE_B:
3033 if (phy_rev != 2 && phy_rev != 4
3034 && phy_rev != 6 && phy_rev != 7)
3037 case B43legacy_PHYTYPE_G:
3045 b43legacyerr(dev->wl, "FOUND UNSUPPORTED PHY "
3046 "(Analog %u, Type %u, Revision %u)\n",
3047 analog_type, phy_type, phy_rev);
3050 b43legacydbg(dev->wl, "Found PHY: Analog %u, Type %u, Revision %u\n",
3051 analog_type, phy_type, phy_rev);
3054 /* Get RADIO versioning */
3055 if (dev->dev->bus->chip_id == 0x4317) {
3056 if (dev->dev->bus->chip_rev == 0)
3058 else if (dev->dev->bus->chip_rev == 1)
3063 b43legacy_write16(dev, B43legacy_MMIO_RADIO_CONTROL,
3064 B43legacy_RADIOCTL_ID);
3065 tmp = b43legacy_read16(dev, B43legacy_MMIO_RADIO_DATA_HIGH);
3067 b43legacy_write16(dev, B43legacy_MMIO_RADIO_CONTROL,
3068 B43legacy_RADIOCTL_ID);
3069 tmp |= b43legacy_read16(dev, B43legacy_MMIO_RADIO_DATA_LOW);
3071 radio_manuf = (tmp & 0x00000FFF);
3072 radio_ver = (tmp & 0x0FFFF000) >> 12;
3073 radio_rev = (tmp & 0xF0000000) >> 28;
3075 case B43legacy_PHYTYPE_B:
3076 if ((radio_ver & 0xFFF0) != 0x2050)
3079 case B43legacy_PHYTYPE_G:
3080 if (radio_ver != 0x2050)
3084 B43legacy_BUG_ON(1);
3087 b43legacyerr(dev->wl, "FOUND UNSUPPORTED RADIO "
3088 "(Manuf 0x%X, Version 0x%X, Revision %u)\n",
3089 radio_manuf, radio_ver, radio_rev);
3092 b43legacydbg(dev->wl, "Found Radio: Manuf 0x%X, Version 0x%X,"
3093 " Revision %u\n", radio_manuf, radio_ver, radio_rev);
3096 phy->radio_manuf = radio_manuf;
3097 phy->radio_ver = radio_ver;
3098 phy->radio_rev = radio_rev;
3100 phy->analog = analog_type;
3101 phy->type = phy_type;
3107 static void setup_struct_phy_for_init(struct b43legacy_wldev *dev,
3108 struct b43legacy_phy *phy)
3110 struct b43legacy_lopair *lo;
3113 memset(phy->minlowsig, 0xFF, sizeof(phy->minlowsig));
3114 memset(phy->minlowsigpos, 0, sizeof(phy->minlowsigpos));
3116 /* Assume the radio is enabled. If it's not enabled, the state will
3117 * immediately get fixed on the first periodic work run. */
3118 dev->radio_hw_enable = true;
3120 phy->savedpctlreg = 0xFFFF;
3121 phy->aci_enable = false;
3122 phy->aci_wlan_automatic = false;
3123 phy->aci_hw_rssi = false;
3125 lo = phy->_lo_pairs;
3127 memset(lo, 0, sizeof(struct b43legacy_lopair) *
3128 B43legacy_LO_COUNT);
3129 phy->max_lb_gain = 0;
3130 phy->trsw_rx_gain = 0;
3132 /* Set default attenuation values. */
3133 phy->bbatt = b43legacy_default_baseband_attenuation(dev);
3134 phy->rfatt = b43legacy_default_radio_attenuation(dev);
3135 phy->txctl1 = b43legacy_default_txctl1(dev);
3136 phy->txpwr_offset = 0;
3139 phy->nrssislope = 0;
3140 for (i = 0; i < ARRAY_SIZE(phy->nrssi); i++)
3141 phy->nrssi[i] = -1000;
3142 for (i = 0; i < ARRAY_SIZE(phy->nrssi_lt); i++)
3143 phy->nrssi_lt[i] = i;
3145 phy->lofcal = 0xFFFF;
3146 phy->initval = 0xFFFF;
3148 phy->interfmode = B43legacy_INTERFMODE_NONE;
3149 phy->channel = 0xFF;
3152 static void setup_struct_wldev_for_init(struct b43legacy_wldev *dev)
3155 dev->dfq_valid = false;
3158 memset(&dev->stats, 0, sizeof(dev->stats));
3160 setup_struct_phy_for_init(dev, &dev->phy);
3162 /* IRQ related flags */
3163 dev->irq_reason = 0;
3164 memset(dev->dma_reason, 0, sizeof(dev->dma_reason));
3165 dev->irq_mask = B43legacy_IRQ_MASKTEMPLATE;
3167 dev->mac_suspended = 1;
3169 /* Noise calculation context */
3170 memset(&dev->noisecalc, 0, sizeof(dev->noisecalc));
3173 static void b43legacy_set_synth_pu_delay(struct b43legacy_wldev *dev,
3175 u16 pu_delay = 1050;
3177 if (b43legacy_is_mode(dev->wl, NL80211_IFTYPE_ADHOC) || idle)
3179 if ((dev->phy.radio_ver == 0x2050) && (dev->phy.radio_rev == 8))
3180 pu_delay = max(pu_delay, (u16)2400);
3182 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
3183 B43legacy_SHM_SH_SPUWKUP, pu_delay);
3186 /* Set the TSF CFP pre-TargetBeaconTransmissionTime. */
3187 static void b43legacy_set_pretbtt(struct b43legacy_wldev *dev)
3191 /* The time value is in microseconds. */
3192 if (b43legacy_is_mode(dev->wl, NL80211_IFTYPE_ADHOC))
3196 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
3197 B43legacy_SHM_SH_PRETBTT, pretbtt);
3198 b43legacy_write16(dev, B43legacy_MMIO_TSF_CFP_PRETBTT, pretbtt);
3201 /* Shutdown a wireless core */
3202 /* Locking: wl->mutex */
3203 static void b43legacy_wireless_core_exit(struct b43legacy_wldev *dev)
3205 struct b43legacy_phy *phy = &dev->phy;
3208 B43legacy_WARN_ON(b43legacy_status(dev) > B43legacy_STAT_INITIALIZED);
3209 if (b43legacy_status(dev) != B43legacy_STAT_INITIALIZED)
3211 b43legacy_set_status(dev, B43legacy_STAT_UNINIT);
3213 /* Stop the microcode PSM. */
3214 macctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
3215 macctl &= ~B43legacy_MACCTL_PSM_RUN;
3216 macctl |= B43legacy_MACCTL_PSM_JMP0;
3217 b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl);
3219 b43legacy_leds_exit(dev);
3220 b43legacy_rng_exit(dev->wl);
3221 b43legacy_pio_free(dev);
3222 b43legacy_dma_free(dev);
3223 b43legacy_chip_exit(dev);
3224 b43legacy_radio_turn_off(dev, 1);
3225 b43legacy_switch_analog(dev, 0);
3226 if (phy->dyn_tssi_tbl)
3227 kfree(phy->tssi2dbm);
3228 kfree(phy->lo_control);
3229 phy->lo_control = NULL;
3230 if (dev->wl->current_beacon) {
3231 dev_kfree_skb_any(dev->wl->current_beacon);
3232 dev->wl->current_beacon = NULL;
3235 ssb_device_disable(dev->dev, 0);
3236 ssb_bus_may_powerdown(dev->dev->bus);
3239 static void prepare_phy_data_for_init(struct b43legacy_wldev *dev)
3241 struct b43legacy_phy *phy = &dev->phy;
3244 /* Set default attenuation values. */
3245 phy->bbatt = b43legacy_default_baseband_attenuation(dev);
3246 phy->rfatt = b43legacy_default_radio_attenuation(dev);
3247 phy->txctl1 = b43legacy_default_txctl1(dev);
3248 phy->txctl2 = 0xFFFF;
3249 phy->txpwr_offset = 0;
3252 phy->nrssislope = 0;
3253 for (i = 0; i < ARRAY_SIZE(phy->nrssi); i++)
3254 phy->nrssi[i] = -1000;
3255 for (i = 0; i < ARRAY_SIZE(phy->nrssi_lt); i++)
3256 phy->nrssi_lt[i] = i;
3258 phy->lofcal = 0xFFFF;
3259 phy->initval = 0xFFFF;
3261 phy->aci_enable = false;
3262 phy->aci_wlan_automatic = false;
3263 phy->aci_hw_rssi = false;
3265 phy->antenna_diversity = 0xFFFF;
3266 memset(phy->minlowsig, 0xFF, sizeof(phy->minlowsig));
3267 memset(phy->minlowsigpos, 0, sizeof(phy->minlowsigpos));
3270 phy->calibrated = 0;
3273 memset(phy->_lo_pairs, 0,
3274 sizeof(struct b43legacy_lopair) * B43legacy_LO_COUNT);
3275 memset(phy->loopback_gain, 0, sizeof(phy->loopback_gain));
3278 /* Initialize a wireless core */
3279 static int b43legacy_wireless_core_init(struct b43legacy_wldev *dev)
3281 struct b43legacy_wl *wl = dev->wl;
3282 struct ssb_bus *bus = dev->dev->bus;
3283 struct b43legacy_phy *phy = &dev->phy;
3284 struct ssb_sprom *sprom = &dev->dev->bus->sprom;
3289 B43legacy_WARN_ON(b43legacy_status(dev) != B43legacy_STAT_UNINIT);
3291 err = ssb_bus_powerup(bus, 0);
3294 if (!ssb_device_is_enabled(dev->dev)) {
3295 tmp = phy->gmode ? B43legacy_TMSLOW_GMODE : 0;
3296 b43legacy_wireless_core_reset(dev, tmp);
3299 if ((phy->type == B43legacy_PHYTYPE_B) ||
3300 (phy->type == B43legacy_PHYTYPE_G)) {
3301 phy->_lo_pairs = kzalloc(sizeof(struct b43legacy_lopair)
3302 * B43legacy_LO_COUNT,
3304 if (!phy->_lo_pairs)
3307 setup_struct_wldev_for_init(dev);
3309 err = b43legacy_phy_init_tssi2dbm_table(dev);
3311 goto err_kfree_lo_control;
3313 /* Enable IRQ routing to this device. */
3314 ssb_pcicore_dev_irqvecs_enable(&bus->pcicore, dev->dev);
3316 prepare_phy_data_for_init(dev);
3317 b43legacy_phy_calibrate(dev);
3318 err = b43legacy_chip_init(dev);
3320 goto err_kfree_tssitbl;
3321 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
3322 B43legacy_SHM_SH_WLCOREREV,
3323 dev->dev->id.revision);
3324 hf = b43legacy_hf_read(dev);
3325 if (phy->type == B43legacy_PHYTYPE_G) {
3326 hf |= B43legacy_HF_SYMW;
3328 hf |= B43legacy_HF_GDCW;
3329 if (sprom->boardflags_lo & B43legacy_BFL_PACTRL)
3330 hf |= B43legacy_HF_OFDMPABOOST;
3331 } else if (phy->type == B43legacy_PHYTYPE_B) {
3332 hf |= B43legacy_HF_SYMW;
3333 if (phy->rev >= 2 && phy->radio_ver == 0x2050)
3334 hf &= ~B43legacy_HF_GDCW;
3336 b43legacy_hf_write(dev, hf);
3338 b43legacy_set_retry_limits(dev,
3339 B43legacy_DEFAULT_SHORT_RETRY_LIMIT,
3340 B43legacy_DEFAULT_LONG_RETRY_LIMIT);
3342 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
3344 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
3347 /* Disable sending probe responses from firmware.
3348 * Setting the MaxTime to one usec will always trigger
3349 * a timeout, so we never send any probe resp.
3350 * A timeout of zero is infinite. */
3351 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
3352 B43legacy_SHM_SH_PRMAXTIME, 1);
3354 b43legacy_rate_memory_init(dev);
3356 /* Minimum Contention Window */
3357 if (phy->type == B43legacy_PHYTYPE_B)
3358 b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS,
3361 b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS,
3363 /* Maximum Contention Window */
3364 b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS,
3368 if (b43legacy_using_pio(dev))
3369 err = b43legacy_pio_init(dev);
3371 err = b43legacy_dma_init(dev);
3373 b43legacy_qos_init(dev);
3375 } while (err == -EAGAIN);
3379 b43legacy_set_synth_pu_delay(dev, 1);
3381 ssb_bus_powerup(bus, 1); /* Enable dynamic PCTL */
3382 b43legacy_upload_card_macaddress(dev);
3383 b43legacy_security_init(dev);
3384 b43legacy_rng_init(wl);
3386 ieee80211_wake_queues(dev->wl->hw);
3387 b43legacy_set_status(dev, B43legacy_STAT_INITIALIZED);
3389 b43legacy_leds_init(dev);
3394 b43legacy_chip_exit(dev);
3396 if (phy->dyn_tssi_tbl)
3397 kfree(phy->tssi2dbm);
3398 err_kfree_lo_control:
3399 kfree(phy->lo_control);
3400 phy->lo_control = NULL;
3401 ssb_bus_may_powerdown(bus);
3402 B43legacy_WARN_ON(b43legacy_status(dev) != B43legacy_STAT_UNINIT);
3406 static int b43legacy_op_add_interface(struct ieee80211_hw *hw,
3407 struct ieee80211_vif *vif)
3409 struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
3410 struct b43legacy_wldev *dev;
3411 unsigned long flags;
3412 int err = -EOPNOTSUPP;
3414 /* TODO: allow WDS/AP devices to coexist */
3416 if (vif->type != NL80211_IFTYPE_AP &&
3417 vif->type != NL80211_IFTYPE_STATION &&
3418 vif->type != NL80211_IFTYPE_WDS &&
3419 vif->type != NL80211_IFTYPE_ADHOC)
3422 mutex_lock(&wl->mutex);
3424 goto out_mutex_unlock;
3426 b43legacydbg(wl, "Adding Interface type %d\n", vif->type);
3428 dev = wl->current_dev;
3429 wl->operating = true;
3431 wl->if_type = vif->type;
3432 memcpy(wl->mac_addr, vif->addr, ETH_ALEN);
3434 spin_lock_irqsave(&wl->irq_lock, flags);
3435 b43legacy_adjust_opmode(dev);
3436 b43legacy_set_pretbtt(dev);
3437 b43legacy_set_synth_pu_delay(dev, 0);
3438 b43legacy_upload_card_macaddress(dev);
3439 spin_unlock_irqrestore(&wl->irq_lock, flags);
3443 mutex_unlock(&wl->mutex);
3448 static void b43legacy_op_remove_interface(struct ieee80211_hw *hw,
3449 struct ieee80211_vif *vif)
3451 struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
3452 struct b43legacy_wldev *dev = wl->current_dev;
3453 unsigned long flags;
3455 b43legacydbg(wl, "Removing Interface type %d\n", vif->type);
3457 mutex_lock(&wl->mutex);
3459 B43legacy_WARN_ON(!wl->operating);
3460 B43legacy_WARN_ON(wl->vif != vif);
3463 wl->operating = false;
3465 spin_lock_irqsave(&wl->irq_lock, flags);
3466 b43legacy_adjust_opmode(dev);
3467 eth_zero_addr(wl->mac_addr);
3468 b43legacy_upload_card_macaddress(dev);
3469 spin_unlock_irqrestore(&wl->irq_lock, flags);
3471 mutex_unlock(&wl->mutex);
3474 static int b43legacy_op_start(struct ieee80211_hw *hw)
3476 struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
3477 struct b43legacy_wldev *dev = wl->current_dev;
3481 /* Kill all old instance specific information to make sure
3482 * the card won't use it in the short timeframe between start
3483 * and mac80211 reconfiguring it. */
3484 eth_zero_addr(wl->bssid);
3485 eth_zero_addr(wl->mac_addr);
3486 wl->filter_flags = 0;
3487 wl->beacon0_uploaded = false;
3488 wl->beacon1_uploaded = false;
3489 wl->beacon_templates_virgin = true;
3490 wl->radio_enabled = true;
3492 mutex_lock(&wl->mutex);
3494 if (b43legacy_status(dev) < B43legacy_STAT_INITIALIZED) {
3495 err = b43legacy_wireless_core_init(dev);
3497 goto out_mutex_unlock;
3501 if (b43legacy_status(dev) < B43legacy_STAT_STARTED) {
3502 err = b43legacy_wireless_core_start(dev);
3505 b43legacy_wireless_core_exit(dev);
3506 goto out_mutex_unlock;
3510 wiphy_rfkill_start_polling(hw->wiphy);
3513 mutex_unlock(&wl->mutex);
3518 static void b43legacy_op_stop(struct ieee80211_hw *hw)
3520 struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
3521 struct b43legacy_wldev *dev = wl->current_dev;
3523 cancel_work_sync(&(wl->beacon_update_trigger));
3525 mutex_lock(&wl->mutex);
3526 if (b43legacy_status(dev) >= B43legacy_STAT_STARTED)
3527 b43legacy_wireless_core_stop(dev);
3528 b43legacy_wireless_core_exit(dev);
3529 wl->radio_enabled = false;
3530 mutex_unlock(&wl->mutex);
3533 static int b43legacy_op_beacon_set_tim(struct ieee80211_hw *hw,
3534 struct ieee80211_sta *sta, bool set)
3536 struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
3537 unsigned long flags;
3539 spin_lock_irqsave(&wl->irq_lock, flags);
3540 b43legacy_update_templates(wl);
3541 spin_unlock_irqrestore(&wl->irq_lock, flags);
3546 static int b43legacy_op_get_survey(struct ieee80211_hw *hw, int idx,
3547 struct survey_info *survey)
3549 struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
3550 struct b43legacy_wldev *dev = wl->current_dev;
3551 struct ieee80211_conf *conf = &hw->conf;
3556 survey->channel = conf->chandef.chan;
3557 survey->filled = SURVEY_INFO_NOISE_DBM;
3558 survey->noise = dev->stats.link_noise;
3563 static const struct ieee80211_ops b43legacy_hw_ops = {
3564 .tx = b43legacy_op_tx,
3565 .conf_tx = b43legacy_op_conf_tx,
3566 .add_interface = b43legacy_op_add_interface,
3567 .remove_interface = b43legacy_op_remove_interface,
3568 .config = b43legacy_op_dev_config,
3569 .bss_info_changed = b43legacy_op_bss_info_changed,
3570 .configure_filter = b43legacy_op_configure_filter,
3571 .get_stats = b43legacy_op_get_stats,
3572 .start = b43legacy_op_start,
3573 .stop = b43legacy_op_stop,
3574 .set_tim = b43legacy_op_beacon_set_tim,
3575 .get_survey = b43legacy_op_get_survey,
3576 .rfkill_poll = b43legacy_rfkill_poll,
3579 /* Hard-reset the chip. Do not call this directly.
3580 * Use b43legacy_controller_restart()
3582 static void b43legacy_chip_reset(struct work_struct *work)
3584 struct b43legacy_wldev *dev =
3585 container_of(work, struct b43legacy_wldev, restart_work);
3586 struct b43legacy_wl *wl = dev->wl;
3590 mutex_lock(&wl->mutex);
3592 prev_status = b43legacy_status(dev);
3593 /* Bring the device down... */
3594 if (prev_status >= B43legacy_STAT_STARTED)
3595 b43legacy_wireless_core_stop(dev);
3596 if (prev_status >= B43legacy_STAT_INITIALIZED)
3597 b43legacy_wireless_core_exit(dev);
3599 /* ...and up again. */
3600 if (prev_status >= B43legacy_STAT_INITIALIZED) {
3601 err = b43legacy_wireless_core_init(dev);
3605 if (prev_status >= B43legacy_STAT_STARTED) {
3606 err = b43legacy_wireless_core_start(dev);
3608 b43legacy_wireless_core_exit(dev);
3614 wl->current_dev = NULL; /* Failed to init the dev. */
3615 mutex_unlock(&wl->mutex);
3617 b43legacyerr(wl, "Controller restart FAILED\n");
3619 b43legacyinfo(wl, "Controller restarted\n");
3622 static int b43legacy_setup_modes(struct b43legacy_wldev *dev,
3626 struct ieee80211_hw *hw = dev->wl->hw;
3627 struct b43legacy_phy *phy = &dev->phy;
3629 phy->possible_phymodes = 0;
3631 hw->wiphy->bands[NL80211_BAND_2GHZ] =
3632 &b43legacy_band_2GHz_BPHY;
3633 phy->possible_phymodes |= B43legacy_PHYMODE_B;
3637 hw->wiphy->bands[NL80211_BAND_2GHZ] =
3638 &b43legacy_band_2GHz_GPHY;
3639 phy->possible_phymodes |= B43legacy_PHYMODE_G;
3645 static void b43legacy_wireless_core_detach(struct b43legacy_wldev *dev)
3647 /* We release firmware that late to not be required to re-request
3648 * is all the time when we reinit the core. */
3649 b43legacy_release_firmware(dev);
3652 static int b43legacy_wireless_core_attach(struct b43legacy_wldev *dev)
3654 struct b43legacy_wl *wl = dev->wl;
3655 struct ssb_bus *bus = dev->dev->bus;
3656 struct pci_dev *pdev = (bus->bustype == SSB_BUSTYPE_PCI) ? bus->host_pci : NULL;
3662 /* Do NOT do any device initialization here.
3663 * Do it in wireless_core_init() instead.
3664 * This function is for gathering basic information about the HW, only.
3665 * Also some structs may be set up here. But most likely you want to
3666 * have that in core_init(), too.
3669 err = ssb_bus_powerup(bus, 0);
3671 b43legacyerr(wl, "Bus powerup failed\n");
3674 /* Get the PHY type. */
3675 if (dev->dev->id.revision >= 5) {
3678 tmshigh = ssb_read32(dev->dev, SSB_TMSHIGH);
3679 have_gphy = !!(tmshigh & B43legacy_TMSHIGH_GPHY);
3682 } else if (dev->dev->id.revision == 4)
3687 dev->phy.gmode = (have_gphy || have_bphy);
3688 dev->phy.radio_on = true;
3689 tmp = dev->phy.gmode ? B43legacy_TMSLOW_GMODE : 0;
3690 b43legacy_wireless_core_reset(dev, tmp);
3692 err = b43legacy_phy_versioning(dev);
3695 /* Check if this device supports multiband. */
3697 (pdev->device != 0x4312 &&
3698 pdev->device != 0x4319 &&
3699 pdev->device != 0x4324)) {
3700 /* No multiband support. */
3703 switch (dev->phy.type) {
3704 case B43legacy_PHYTYPE_B:
3707 case B43legacy_PHYTYPE_G:
3711 B43legacy_BUG_ON(1);
3714 dev->phy.gmode = (have_gphy || have_bphy);
3715 tmp = dev->phy.gmode ? B43legacy_TMSLOW_GMODE : 0;
3716 b43legacy_wireless_core_reset(dev, tmp);
3718 err = b43legacy_validate_chipaccess(dev);
3721 err = b43legacy_setup_modes(dev, have_bphy, have_gphy);
3725 /* Now set some default "current_dev" */
3726 if (!wl->current_dev)
3727 wl->current_dev = dev;
3728 INIT_WORK(&dev->restart_work, b43legacy_chip_reset);
3730 b43legacy_radio_turn_off(dev, 1);
3731 b43legacy_switch_analog(dev, 0);
3732 ssb_device_disable(dev->dev, 0);
3733 ssb_bus_may_powerdown(bus);
3739 ssb_bus_may_powerdown(bus);
3743 static void b43legacy_one_core_detach(struct ssb_device *dev)
3745 struct b43legacy_wldev *wldev;
3746 struct b43legacy_wl *wl;
3748 /* Do not cancel ieee80211-workqueue based work here.
3749 * See comment in b43legacy_remove(). */
3751 wldev = ssb_get_drvdata(dev);
3753 b43legacy_debugfs_remove_device(wldev);
3754 b43legacy_wireless_core_detach(wldev);
3755 list_del(&wldev->list);
3757 ssb_set_drvdata(dev, NULL);
3761 static int b43legacy_one_core_attach(struct ssb_device *dev,
3762 struct b43legacy_wl *wl)
3764 struct b43legacy_wldev *wldev;
3767 wldev = kzalloc(sizeof(*wldev), GFP_KERNEL);
3773 b43legacy_set_status(wldev, B43legacy_STAT_UNINIT);
3774 wldev->bad_frames_preempt = modparam_bad_frames_preempt;
3775 tasklet_init(&wldev->isr_tasklet,
3776 b43legacy_interrupt_tasklet,
3777 (unsigned long)wldev);
3779 wldev->__using_pio = true;
3780 INIT_LIST_HEAD(&wldev->list);
3782 err = b43legacy_wireless_core_attach(wldev);
3784 goto err_kfree_wldev;
3786 list_add(&wldev->list, &wl->devlist);
3788 ssb_set_drvdata(dev, wldev);
3789 b43legacy_debugfs_add_device(wldev);
3798 static void b43legacy_sprom_fixup(struct ssb_bus *bus)
3800 /* boardflags workarounds */
3801 if (bus->boardinfo.vendor == PCI_VENDOR_ID_APPLE &&
3802 bus->boardinfo.type == 0x4E &&
3803 bus->sprom.board_rev > 0x40)
3804 bus->sprom.boardflags_lo |= B43legacy_BFL_PACTRL;
3807 static void b43legacy_wireless_exit(struct ssb_device *dev,
3808 struct b43legacy_wl *wl)
3810 struct ieee80211_hw *hw = wl->hw;
3812 ssb_set_devtypedata(dev, NULL);
3813 ieee80211_free_hw(hw);
3816 static int b43legacy_wireless_init(struct ssb_device *dev)
3818 struct ssb_sprom *sprom = &dev->bus->sprom;
3819 struct ieee80211_hw *hw;
3820 struct b43legacy_wl *wl;
3824 b43legacy_sprom_fixup(dev->bus);
3826 hw = ieee80211_alloc_hw(sizeof(*wl), &b43legacy_hw_ops);
3828 b43legacyerr(NULL, "Could not allocate ieee80211 device\n");
3833 ieee80211_hw_set(hw, RX_INCLUDES_FCS);
3834 ieee80211_hw_set(hw, SIGNAL_DBM);
3835 ieee80211_hw_set(hw, MFP_CAPABLE); /* Allow WPA3 in software */
3837 hw->wiphy->interface_modes =
3838 BIT(NL80211_IFTYPE_AP) |
3839 BIT(NL80211_IFTYPE_STATION) |
3840 BIT(NL80211_IFTYPE_WDS) |
3841 BIT(NL80211_IFTYPE_ADHOC);
3842 hw->queues = 1; /* FIXME: hardware has more queues */
3844 SET_IEEE80211_DEV(hw, dev->dev);
3845 if (is_valid_ether_addr(sprom->et1mac))
3846 SET_IEEE80211_PERM_ADDR(hw, sprom->et1mac);
3848 SET_IEEE80211_PERM_ADDR(hw, sprom->il0mac);
3850 /* Get and initialize struct b43legacy_wl */
3851 wl = hw_to_b43legacy_wl(hw);
3852 memset(wl, 0, sizeof(*wl));
3854 spin_lock_init(&wl->irq_lock);
3855 spin_lock_init(&wl->leds_lock);
3856 mutex_init(&wl->mutex);
3857 INIT_LIST_HEAD(&wl->devlist);
3858 INIT_WORK(&wl->beacon_update_trigger, b43legacy_beacon_update_trigger_work);
3859 INIT_WORK(&wl->tx_work, b43legacy_tx_work);
3861 /* Initialize queues and flags. */
3862 for (queue_num = 0; queue_num < B43legacy_QOS_QUEUE_NUM; queue_num++) {
3863 skb_queue_head_init(&wl->tx_queue[queue_num]);
3864 wl->tx_queue_stopped[queue_num] = 0;
3867 ssb_set_devtypedata(dev, wl);
3868 b43legacyinfo(wl, "Broadcom %04X WLAN found (core revision %u)\n",
3869 dev->bus->chip_id, dev->id.revision);
3875 static int b43legacy_probe(struct ssb_device *dev,
3876 const struct ssb_device_id *id)
3878 struct b43legacy_wl *wl;
3882 wl = ssb_get_devtypedata(dev);
3884 /* Probing the first core - setup common struct b43legacy_wl */
3886 err = b43legacy_wireless_init(dev);
3889 wl = ssb_get_devtypedata(dev);
3890 B43legacy_WARN_ON(!wl);
3892 err = b43legacy_one_core_attach(dev, wl);
3894 goto err_wireless_exit;
3896 /* setup and start work to load firmware */
3897 INIT_WORK(&wl->firmware_load, b43legacy_request_firmware);
3898 schedule_work(&wl->firmware_load);
3905 b43legacy_wireless_exit(dev, wl);
3909 static void b43legacy_remove(struct ssb_device *dev)
3911 struct b43legacy_wl *wl = ssb_get_devtypedata(dev);
3912 struct b43legacy_wldev *wldev = ssb_get_drvdata(dev);
3914 /* We must cancel any work here before unregistering from ieee80211,
3915 * as the ieee80211 unreg will destroy the workqueue. */
3916 cancel_work_sync(&wldev->restart_work);
3917 cancel_work_sync(&wl->firmware_load);
3918 complete(&wldev->fw_load_complete);
3920 B43legacy_WARN_ON(!wl);
3921 if (!wldev->fw.ucode)
3922 return; /* NULL if fw never loaded */
3923 if (wl->current_dev == wldev)
3924 ieee80211_unregister_hw(wl->hw);
3926 b43legacy_one_core_detach(dev);
3928 if (list_empty(&wl->devlist))
3929 /* Last core on the chip unregistered.
3930 * We can destroy common struct b43legacy_wl.
3932 b43legacy_wireless_exit(dev, wl);
3935 /* Perform a hardware reset. This can be called from any context. */
3936 void b43legacy_controller_restart(struct b43legacy_wldev *dev,
3939 /* Must avoid requeueing, if we are in shutdown. */
3940 if (b43legacy_status(dev) < B43legacy_STAT_INITIALIZED)
3942 b43legacyinfo(dev->wl, "Controller RESET (%s) ...\n", reason);
3943 ieee80211_queue_work(dev->wl->hw, &dev->restart_work);
3948 static int b43legacy_suspend(struct ssb_device *dev, pm_message_t state)
3950 struct b43legacy_wldev *wldev = ssb_get_drvdata(dev);
3951 struct b43legacy_wl *wl = wldev->wl;
3953 b43legacydbg(wl, "Suspending...\n");
3955 mutex_lock(&wl->mutex);
3956 wldev->suspend_init_status = b43legacy_status(wldev);
3957 if (wldev->suspend_init_status >= B43legacy_STAT_STARTED)
3958 b43legacy_wireless_core_stop(wldev);
3959 if (wldev->suspend_init_status >= B43legacy_STAT_INITIALIZED)
3960 b43legacy_wireless_core_exit(wldev);
3961 mutex_unlock(&wl->mutex);
3963 b43legacydbg(wl, "Device suspended.\n");
3968 static int b43legacy_resume(struct ssb_device *dev)
3970 struct b43legacy_wldev *wldev = ssb_get_drvdata(dev);
3971 struct b43legacy_wl *wl = wldev->wl;
3974 b43legacydbg(wl, "Resuming...\n");
3976 mutex_lock(&wl->mutex);
3977 if (wldev->suspend_init_status >= B43legacy_STAT_INITIALIZED) {
3978 err = b43legacy_wireless_core_init(wldev);
3980 b43legacyerr(wl, "Resume failed at core init\n");
3984 if (wldev->suspend_init_status >= B43legacy_STAT_STARTED) {
3985 err = b43legacy_wireless_core_start(wldev);
3987 b43legacy_wireless_core_exit(wldev);
3988 b43legacyerr(wl, "Resume failed at core start\n");
3993 b43legacydbg(wl, "Device resumed.\n");
3995 mutex_unlock(&wl->mutex);
3999 #else /* CONFIG_PM */
4000 # define b43legacy_suspend NULL
4001 # define b43legacy_resume NULL
4002 #endif /* CONFIG_PM */
4004 static struct ssb_driver b43legacy_ssb_driver = {
4005 .name = KBUILD_MODNAME,
4006 .id_table = b43legacy_ssb_tbl,
4007 .probe = b43legacy_probe,
4008 .remove = b43legacy_remove,
4009 .suspend = b43legacy_suspend,
4010 .resume = b43legacy_resume,
4013 static void b43legacy_print_driverinfo(void)
4015 const char *feat_pci = "", *feat_leds = "",
4016 *feat_pio = "", *feat_dma = "";
4018 #ifdef CONFIG_B43LEGACY_PCI_AUTOSELECT
4021 #ifdef CONFIG_B43LEGACY_LEDS
4024 #ifdef CONFIG_B43LEGACY_PIO
4027 #ifdef CONFIG_B43LEGACY_DMA
4030 printk(KERN_INFO "Broadcom 43xx-legacy driver loaded "
4031 "[ Features: %s%s%s%s ]\n",
4032 feat_pci, feat_leds, feat_pio, feat_dma);
4035 static int __init b43legacy_init(void)
4039 b43legacy_debugfs_init();
4041 err = ssb_driver_register(&b43legacy_ssb_driver);
4045 b43legacy_print_driverinfo();
4050 b43legacy_debugfs_exit();
4054 static void __exit b43legacy_exit(void)
4056 ssb_driver_unregister(&b43legacy_ssb_driver);
4057 b43legacy_debugfs_exit();
4060 module_init(b43legacy_init)
4061 module_exit(b43legacy_exit)