drivers/net/wireless/broadcom/b43legacy/main.c

   1 // SPDX-License-Identifier: GPL-2.0-or-later
   2 /*
   3  *
   4  *  Broadcom B43legacy wireless driver
   5  *
   6  *  Copyright (c) 2005 Martin Langer <martin-langer@gmx.de>
   7  *  Copyright (c) 2005-2008 Stefano Brivio <stefano.brivio@polimi.it>
   8  *  Copyright (c) 2005, 2006 Michael Buesch <m@bues.ch>
   9  *  Copyright (c) 2005 Danny van Dyk <kugelfang@gentoo.org>
  10  *  Copyright (c) 2005 Andreas Jaggi <andreas.jaggi@waterwave.ch>
  11  *  Copyright (c) 2007 Larry Finger <Larry.Finger@lwfinger.net>
  12  *
  13  *  Some parts of the code in this file are derived from the ipw2200
  14  *  driver  Copyright(c) 2003 - 2004 Intel Corporation.
  15
  16  */
  17
  18 #include <linux/delay.h>
  19 #include <linux/init.h>
  20 #include <linux/module.h>
  21 #include <linux/if_arp.h>
  22 #include <linux/etherdevice.h>
  23 #include <linux/firmware.h>
  24 #include <linux/workqueue.h>
  25 #include <linux/sched/signal.h>
  26 #include <linux/skbuff.h>
  27 #include <linux/dma-mapping.h>
  28 #include <linux/slab.h>
  29 #include <net/dst.h>
  30 #include <asm/unaligned.h>
  31
  32 #include "b43legacy.h"
  33 #include "main.h"
  34 #include "debugfs.h"
  35 #include "phy.h"
  36 #include "dma.h"
  37 #include "pio.h"
  38 #include "sysfs.h"
  39 #include "xmit.h"
  40 #include "radio.h"
  41
  42
  43 MODULE_DESCRIPTION("Broadcom B43legacy wireless driver");
  44 MODULE_AUTHOR("Martin Langer");
  45 MODULE_AUTHOR("Stefano Brivio");
  46 MODULE_AUTHOR("Michael Buesch");
  47 MODULE_LICENSE("GPL");
  48
  49 /*(DEBLOBBED)*/
  50
  51 #if defined(CONFIG_B43LEGACY_DMA) && defined(CONFIG_B43LEGACY_PIO)
  52 static int modparam_pio;
  53 module_param_named(pio, modparam_pio, int, 0444);
  54 MODULE_PARM_DESC(pio, "enable(1) / disable(0) PIO mode");
  55 #elif defined(CONFIG_B43LEGACY_DMA)
  56 # define modparam_pio   0
  57 #elif defined(CONFIG_B43LEGACY_PIO)
  58 # define modparam_pio   1
  59 #endif
  60
  61 static int modparam_bad_frames_preempt;
  62 module_param_named(bad_frames_preempt, modparam_bad_frames_preempt, int, 0444);
  63 MODULE_PARM_DESC(bad_frames_preempt, "enable(1) / disable(0) Bad Frames"
  64                  " Preemption");
  65
  66 static char modparam_fwpostfix[16];
  67 module_param_string(fwpostfix, modparam_fwpostfix, 16, 0444);
  68 MODULE_PARM_DESC(fwpostfix, "Postfix for the firmware files to load.");
  69
  70 /* The following table supports BCM4301, BCM4303 and BCM4306/2 devices. */
  71 static const struct ssb_device_id b43legacy_ssb_tbl[] = {
  72         SSB_DEVICE(SSB_VENDOR_BROADCOM, SSB_DEV_80211, 2),
  73         SSB_DEVICE(SSB_VENDOR_BROADCOM, SSB_DEV_80211, 4),
  74         {},
  75 };
  76 MODULE_DEVICE_TABLE(ssb, b43legacy_ssb_tbl);
  77
  78
  79 /* Channel and ratetables are shared for all devices.
  80  * They can't be const, because ieee80211 puts some precalculated
  81  * data in there. This data is the same for all devices, so we don't
  82  * get concurrency issues */
  83 #define RATETAB_ENT(_rateid, _flags) \
  84         {                                                               \
  85                 .bitrate        = B43legacy_RATE_TO_100KBPS(_rateid),   \
  86                 .hw_value       = (_rateid),                            \
  87                 .flags          = (_flags),                             \
  88         }
  89 /*
  90  * NOTE: When changing this, sync with xmit.c's
  91  *       b43legacy_plcp_get_bitrate_idx_* functions!
  92  */
  93 static struct ieee80211_rate __b43legacy_ratetable[] = {
  94         RATETAB_ENT(B43legacy_CCK_RATE_1MB, 0),
  95         RATETAB_ENT(B43legacy_CCK_RATE_2MB, IEEE80211_RATE_SHORT_PREAMBLE),
  96         RATETAB_ENT(B43legacy_CCK_RATE_5MB, IEEE80211_RATE_SHORT_PREAMBLE),
  97         RATETAB_ENT(B43legacy_CCK_RATE_11MB, IEEE80211_RATE_SHORT_PREAMBLE),
  98         RATETAB_ENT(B43legacy_OFDM_RATE_6MB, 0),
  99         RATETAB_ENT(B43legacy_OFDM_RATE_9MB, 0),
 100         RATETAB_ENT(B43legacy_OFDM_RATE_12MB, 0),
 101         RATETAB_ENT(B43legacy_OFDM_RATE_18MB, 0),
 102         RATETAB_ENT(B43legacy_OFDM_RATE_24MB, 0),
 103         RATETAB_ENT(B43legacy_OFDM_RATE_36MB, 0),
 104         RATETAB_ENT(B43legacy_OFDM_RATE_48MB, 0),
 105         RATETAB_ENT(B43legacy_OFDM_RATE_54MB, 0),
 106 };
 107 #define b43legacy_b_ratetable           (__b43legacy_ratetable + 0)
 108 #define b43legacy_b_ratetable_size      4
 109 #define b43legacy_g_ratetable           (__b43legacy_ratetable + 0)
 110 #define b43legacy_g_ratetable_size      12
 111
 112 #define CHANTAB_ENT(_chanid, _freq) \
 113         {                                                       \
 114                 .center_freq    = (_freq),                      \
 115                 .hw_value       = (_chanid),                    \
 116         }
 117 static struct ieee80211_channel b43legacy_bg_chantable[] = {
 118         CHANTAB_ENT(1, 2412),
 119         CHANTAB_ENT(2, 2417),
 120         CHANTAB_ENT(3, 2422),
 121         CHANTAB_ENT(4, 2427),
 122         CHANTAB_ENT(5, 2432),
 123         CHANTAB_ENT(6, 2437),
 124         CHANTAB_ENT(7, 2442),
 125         CHANTAB_ENT(8, 2447),
 126         CHANTAB_ENT(9, 2452),
 127         CHANTAB_ENT(10, 2457),
 128         CHANTAB_ENT(11, 2462),
 129         CHANTAB_ENT(12, 2467),
 130         CHANTAB_ENT(13, 2472),
 131         CHANTAB_ENT(14, 2484),
 132 };
 133
 134 static struct ieee80211_supported_band b43legacy_band_2GHz_BPHY = {
 135         .channels = b43legacy_bg_chantable,
 136         .n_channels = ARRAY_SIZE(b43legacy_bg_chantable),
 137         .bitrates = b43legacy_b_ratetable,
 138         .n_bitrates = b43legacy_b_ratetable_size,
 139 };
 140
 141 static struct ieee80211_supported_band b43legacy_band_2GHz_GPHY = {
 142         .channels = b43legacy_bg_chantable,
 143         .n_channels = ARRAY_SIZE(b43legacy_bg_chantable),
 144         .bitrates = b43legacy_g_ratetable,
 145         .n_bitrates = b43legacy_g_ratetable_size,
 146 };
 147
 148 static void b43legacy_wireless_core_exit(struct b43legacy_wldev *dev);
 149 static int b43legacy_wireless_core_init(struct b43legacy_wldev *dev);
 150 static void b43legacy_wireless_core_stop(struct b43legacy_wldev *dev);
 151 static int b43legacy_wireless_core_start(struct b43legacy_wldev *dev);
 152
 153
 154 static int b43legacy_ratelimit(struct b43legacy_wl *wl)
 155 {
 156         if (!wl || !wl->current_dev)
 157                 return 1;
 158         if (b43legacy_status(wl->current_dev) < B43legacy_STAT_STARTED)
 159                 return 1;
 160         /* We are up and running.
 161          * Ratelimit the messages to avoid DoS over the net. */
 162         return net_ratelimit();
 163 }
 164
 165 void b43legacyinfo(struct b43legacy_wl *wl, const char *fmt, ...)
 166 {
 167         struct va_format vaf;
 168         va_list args;
 169
 170         if (!b43legacy_ratelimit(wl))
 171                 return;
 172
 173         va_start(args, fmt);
 174
 175         vaf.fmt = fmt;
 176         vaf.va = &args;
 177
 178         printk(KERN_INFO "b43legacy-%s: %pV",
 179                (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan", &vaf);
 180
 181         va_end(args);
 182 }
 183
 184 void b43legacyerr(struct b43legacy_wl *wl, const char *fmt, ...)
 185 {
 186         struct va_format vaf;
 187         va_list args;
 188
 189         if (!b43legacy_ratelimit(wl))
 190                 return;
 191
 192         va_start(args, fmt);
 193
 194         vaf.fmt = fmt;
 195         vaf.va = &args;
 196
 197         printk(KERN_ERR "b43legacy-%s ERROR: %pV",
 198                (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan", &vaf);
 199
 200         va_end(args);
 201 }
 202
 203 void b43legacywarn(struct b43legacy_wl *wl, const char *fmt, ...)
 204 {
 205         struct va_format vaf;
 206         va_list args;
 207
 208         if (!b43legacy_ratelimit(wl))
 209                 return;
 210
 211         va_start(args, fmt);
 212
 213         vaf.fmt = fmt;
 214         vaf.va = &args;
 215
 216         printk(KERN_WARNING "b43legacy-%s warning: %pV",
 217                (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan", &vaf);
 218
 219         va_end(args);
 220 }
 221
 222 #if B43legacy_DEBUG
 223 void b43legacydbg(struct b43legacy_wl *wl, const char *fmt, ...)
 224 {
 225         struct va_format vaf;
 226         va_list args;
 227
 228         va_start(args, fmt);
 229
 230         vaf.fmt = fmt;
 231         vaf.va = &args;
 232
 233         printk(KERN_DEBUG "b43legacy-%s debug: %pV",
 234                (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan", &vaf);
 235
 236         va_end(args);
 237 }
 238 #endif /* DEBUG */
 239
 240 static void b43legacy_ram_write(struct b43legacy_wldev *dev, u16 offset,
 241                                 u32 val)
 242 {
 243         u32 status;
 244
 245         B43legacy_WARN_ON(offset % 4 != 0);
 246
 247         status = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
 248         if (status & B43legacy_MACCTL_BE)
 249                 val = swab32(val);
 250
 251         b43legacy_write32(dev, B43legacy_MMIO_RAM_CONTROL, offset);
 252         b43legacy_write32(dev, B43legacy_MMIO_RAM_DATA, val);
 253 }
 254
 255 static inline
 256 void b43legacy_shm_control_word(struct b43legacy_wldev *dev,
 257                                 u16 routing, u16 offset)
 258 {
 259         u32 control;
 260
 261         /* "offset" is the WORD offset. */
 262
 263         control = routing;
 264         control <<= 16;
 265         control |= offset;
 266         b43legacy_write32(dev, B43legacy_MMIO_SHM_CONTROL, control);
 267 }
 268
 269 u32 b43legacy_shm_read32(struct b43legacy_wldev *dev,
 270                        u16 routing, u16 offset)
 271 {
 272         u32 ret;
 273
 274         if (routing == B43legacy_SHM_SHARED) {
 275                 B43legacy_WARN_ON((offset & 0x0001) != 0);
 276                 if (offset & 0x0003) {
 277                         /* Unaligned access */
 278                         b43legacy_shm_control_word(dev, routing, offset >> 2);
 279                         ret = b43legacy_read16(dev,
 280                                 B43legacy_MMIO_SHM_DATA_UNALIGNED);
 281                         ret <<= 16;
 282                         b43legacy_shm_control_word(dev, routing,
 283                                                      (offset >> 2) + 1);
 284                         ret |= b43legacy_read16(dev, B43legacy_MMIO_SHM_DATA);
 285
 286                         return ret;
 287                 }
 288                 offset >>= 2;
 289         }
 290         b43legacy_shm_control_word(dev, routing, offset);
 291         ret = b43legacy_read32(dev, B43legacy_MMIO_SHM_DATA);
 292
 293         return ret;
 294 }
 295
 296 u16 b43legacy_shm_read16(struct b43legacy_wldev *dev,
 297                            u16 routing, u16 offset)
 298 {
 299         u16 ret;
 300
 301         if (routing == B43legacy_SHM_SHARED) {
 302                 B43legacy_WARN_ON((offset & 0x0001) != 0);
 303                 if (offset & 0x0003) {
 304                         /* Unaligned access */
 305                         b43legacy_shm_control_word(dev, routing, offset >> 2);
 306                         ret = b43legacy_read16(dev,
 307                                              B43legacy_MMIO_SHM_DATA_UNALIGNED);
 308
 309                         return ret;
 310                 }
 311                 offset >>= 2;
 312         }
 313         b43legacy_shm_control_word(dev, routing, offset);
 314         ret = b43legacy_read16(dev, B43legacy_MMIO_SHM_DATA);
 315
 316         return ret;
 317 }
 318
 319 void b43legacy_shm_write32(struct b43legacy_wldev *dev,
 320                            u16 routing, u16 offset,
 321                            u32 value)
 322 {
 323         if (routing == B43legacy_SHM_SHARED) {
 324                 B43legacy_WARN_ON((offset & 0x0001) != 0);
 325                 if (offset & 0x0003) {
 326                         /* Unaligned access */
 327                         b43legacy_shm_control_word(dev, routing, offset >> 2);
 328                         b43legacy_write16(dev,
 329                                           B43legacy_MMIO_SHM_DATA_UNALIGNED,
 330                                           (value >> 16) & 0xffff);
 331                         b43legacy_shm_control_word(dev, routing,
 332                                                    (offset >> 2) + 1);
 333                         b43legacy_write16(dev, B43legacy_MMIO_SHM_DATA,
 334                                           value & 0xffff);
 335                         return;
 336                 }
 337                 offset >>= 2;
 338         }
 339         b43legacy_shm_control_word(dev, routing, offset);
 340         b43legacy_write32(dev, B43legacy_MMIO_SHM_DATA, value);
 341 }
 342
 343 void b43legacy_shm_write16(struct b43legacy_wldev *dev, u16 routing, u16 offset,
 344                            u16 value)
 345 {
 346         if (routing == B43legacy_SHM_SHARED) {
 347                 B43legacy_WARN_ON((offset & 0x0001) != 0);
 348                 if (offset & 0x0003) {
 349                         /* Unaligned access */
 350                         b43legacy_shm_control_word(dev, routing, offset >> 2);
 351                         b43legacy_write16(dev,
 352                                           B43legacy_MMIO_SHM_DATA_UNALIGNED,
 353                                           value);
 354                         return;
 355                 }
 356                 offset >>= 2;
 357         }
 358         b43legacy_shm_control_word(dev, routing, offset);
 359         b43legacy_write16(dev, B43legacy_MMIO_SHM_DATA, value);
 360 }
 361
 362 /* Read HostFlags */
 363 u32 b43legacy_hf_read(struct b43legacy_wldev *dev)
 364 {
 365         u32 ret;
 366
 367         ret = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
 368                                    B43legacy_SHM_SH_HOSTFHI);
 369         ret <<= 16;
 370         ret |= b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
 371                                     B43legacy_SHM_SH_HOSTFLO);
 372
 373         return ret;
 374 }
 375
 376 /* Write HostFlags */
 377 void b43legacy_hf_write(struct b43legacy_wldev *dev, u32 value)
 378 {
 379         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
 380                               B43legacy_SHM_SH_HOSTFLO,
 381                               (value & 0x0000FFFF));
 382         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
 383                               B43legacy_SHM_SH_HOSTFHI,
 384                               ((value & 0xFFFF0000) >> 16));
 385 }
 386
 387 void b43legacy_tsf_read(struct b43legacy_wldev *dev, u64 *tsf)
 388 {
 389         /* We need to be careful. As we read the TSF from multiple
 390          * registers, we should take care of register overflows.
 391          * In theory, the whole tsf read process should be atomic.
 392          * We try to be atomic here, by restaring the read process,
 393          * if any of the high registers changed (overflowed).
 394          */
 395         if (dev->dev->id.revision >= 3) {
 396                 u32 low;
 397                 u32 high;
 398                 u32 high2;
 399
 400                 do {
 401                         high = b43legacy_read32(dev,
 402                                         B43legacy_MMIO_REV3PLUS_TSF_HIGH);
 403                         low = b43legacy_read32(dev,
 404                                         B43legacy_MMIO_REV3PLUS_TSF_LOW);
 405                         high2 = b43legacy_read32(dev,
 406                                         B43legacy_MMIO_REV3PLUS_TSF_HIGH);
 407                 } while (unlikely(high != high2));
 408
 409                 *tsf = high;
 410                 *tsf <<= 32;
 411                 *tsf |= low;
 412         } else {
 413                 u64 tmp;
 414                 u16 v0;
 415                 u16 v1;
 416                 u16 v2;
 417                 u16 v3;
 418                 u16 test1;
 419                 u16 test2;
 420                 u16 test3;
 421
 422                 do {
 423                         v3 = b43legacy_read16(dev, B43legacy_MMIO_TSF_3);
 424                         v2 = b43legacy_read16(dev, B43legacy_MMIO_TSF_2);
 425                         v1 = b43legacy_read16(dev, B43legacy_MMIO_TSF_1);
 426                         v0 = b43legacy_read16(dev, B43legacy_MMIO_TSF_0);
 427
 428                         test3 = b43legacy_read16(dev, B43legacy_MMIO_TSF_3);
 429                         test2 = b43legacy_read16(dev, B43legacy_MMIO_TSF_2);
 430                         test1 = b43legacy_read16(dev, B43legacy_MMIO_TSF_1);
 431                 } while (v3 != test3 || v2 != test2 || v1 != test1);
 432
 433                 *tsf = v3;
 434                 *tsf <<= 48;
 435                 tmp = v2;
 436                 tmp <<= 32;
 437                 *tsf |= tmp;
 438                 tmp = v1;
 439                 tmp <<= 16;
 440                 *tsf |= tmp;
 441                 *tsf |= v0;
 442         }
 443 }
 444
 445 static void b43legacy_time_lock(struct b43legacy_wldev *dev)
 446 {
 447         u32 status;
 448
 449         status = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
 450         status |= B43legacy_MACCTL_TBTTHOLD;
 451         b43legacy_write32(dev, B43legacy_MMIO_MACCTL, status);
 452 }
 453
 454 static void b43legacy_time_unlock(struct b43legacy_wldev *dev)
 455 {
 456         u32 status;
 457
 458         status = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
 459         status &= ~B43legacy_MACCTL_TBTTHOLD;
 460         b43legacy_write32(dev, B43legacy_MMIO_MACCTL, status);
 461 }
 462
 463 static void b43legacy_tsf_write_locked(struct b43legacy_wldev *dev, u64 tsf)
 464 {
 465         /* Be careful with the in-progress timer.
 466          * First zero out the low register, so we have a full
 467          * register-overflow duration to complete the operation.
 468          */
 469         if (dev->dev->id.revision >= 3) {
 470                 u32 lo = (tsf & 0x00000000FFFFFFFFULL);
 471                 u32 hi = (tsf & 0xFFFFFFFF00000000ULL) >> 32;
 472
 473                 b43legacy_write32(dev, B43legacy_MMIO_REV3PLUS_TSF_LOW, 0);
 474                 b43legacy_write32(dev, B43legacy_MMIO_REV3PLUS_TSF_HIGH,
 475                                     hi);
 476                 b43legacy_write32(dev, B43legacy_MMIO_REV3PLUS_TSF_LOW,
 477                                     lo);
 478         } else {
 479                 u16 v0 = (tsf & 0x000000000000FFFFULL);
 480                 u16 v1 = (tsf & 0x00000000FFFF0000ULL) >> 16;
 481                 u16 v2 = (tsf & 0x0000FFFF00000000ULL) >> 32;
 482                 u16 v3 = (tsf & 0xFFFF000000000000ULL) >> 48;
 483
 484                 b43legacy_write16(dev, B43legacy_MMIO_TSF_0, 0);
 485                 b43legacy_write16(dev, B43legacy_MMIO_TSF_3, v3);
 486                 b43legacy_write16(dev, B43legacy_MMIO_TSF_2, v2);
 487                 b43legacy_write16(dev, B43legacy_MMIO_TSF_1, v1);
 488                 b43legacy_write16(dev, B43legacy_MMIO_TSF_0, v0);
 489         }
 490 }
 491
 492 void b43legacy_tsf_write(struct b43legacy_wldev *dev, u64 tsf)
 493 {
 494         b43legacy_time_lock(dev);
 495         b43legacy_tsf_write_locked(dev, tsf);
 496         b43legacy_time_unlock(dev);
 497 }
 498
 499 static
 500 void b43legacy_macfilter_set(struct b43legacy_wldev *dev,
 501                              u16 offset, const u8 *mac)
 502 {
 503         static const u8 zero_addr[ETH_ALEN] = { 0 };
 504         u16 data;
 505
 506         if (!mac)
 507                 mac = zero_addr;
 508
 509         offset |= 0x0020;
 510         b43legacy_write16(dev, B43legacy_MMIO_MACFILTER_CONTROL, offset);
 511
 512         data = mac[0];
 513         data |= mac[1] << 8;
 514         b43legacy_write16(dev, B43legacy_MMIO_MACFILTER_DATA, data);
 515         data = mac[2];
 516         data |= mac[3] << 8;
 517         b43legacy_write16(dev, B43legacy_MMIO_MACFILTER_DATA, data);
 518         data = mac[4];
 519         data |= mac[5] << 8;
 520         b43legacy_write16(dev, B43legacy_MMIO_MACFILTER_DATA, data);
 521 }
 522
 523 static void b43legacy_write_mac_bssid_templates(struct b43legacy_wldev *dev)
 524 {
 525         static const u8 zero_addr[ETH_ALEN] = { 0 };
 526         const u8 *mac = dev->wl->mac_addr;
 527         const u8 *bssid = dev->wl->bssid;
 528         u8 mac_bssid[ETH_ALEN * 2];
 529         int i;
 530         u32 tmp;
 531
 532         if (!bssid)
 533                 bssid = zero_addr;
 534         if (!mac)
 535                 mac = zero_addr;
 536
 537         b43legacy_macfilter_set(dev, B43legacy_MACFILTER_BSSID, bssid);
 538
 539         memcpy(mac_bssid, mac, ETH_ALEN);
 540         memcpy(mac_bssid + ETH_ALEN, bssid, ETH_ALEN);
 541
 542         /* Write our MAC address and BSSID to template ram */
 543         for (i = 0; i < ARRAY_SIZE(mac_bssid); i += sizeof(u32)) {
 544                 tmp =  (u32)(mac_bssid[i + 0]);
 545                 tmp |= (u32)(mac_bssid[i + 1]) << 8;
 546                 tmp |= (u32)(mac_bssid[i + 2]) << 16;
 547                 tmp |= (u32)(mac_bssid[i + 3]) << 24;
 548                 b43legacy_ram_write(dev, 0x20 + i, tmp);
 549                 b43legacy_ram_write(dev, 0x78 + i, tmp);
 550                 b43legacy_ram_write(dev, 0x478 + i, tmp);
 551         }
 552 }
 553
 554 static void b43legacy_upload_card_macaddress(struct b43legacy_wldev *dev)
 555 {
 556         b43legacy_write_mac_bssid_templates(dev);
 557         b43legacy_macfilter_set(dev, B43legacy_MACFILTER_SELF,
 558                                 dev->wl->mac_addr);
 559 }
 560
 561 static void b43legacy_set_slot_time(struct b43legacy_wldev *dev,
 562                                     u16 slot_time)
 563 {
 564         /* slot_time is in usec. */
 565         if (dev->phy.type != B43legacy_PHYTYPE_G)
 566                 return;
 567         b43legacy_write16(dev, 0x684, 510 + slot_time);
 568         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x0010,
 569                               slot_time);
 570 }
 571
 572 static void b43legacy_short_slot_timing_enable(struct b43legacy_wldev *dev)
 573 {
 574         b43legacy_set_slot_time(dev, 9);
 575 }
 576
 577 static void b43legacy_short_slot_timing_disable(struct b43legacy_wldev *dev)
 578 {
 579         b43legacy_set_slot_time(dev, 20);
 580 }
 581
 582 /* Synchronize IRQ top- and bottom-half.
 583  * IRQs must be masked before calling this.
 584  * This must not be called with the irq_lock held.
 585  */
 586 static void b43legacy_synchronize_irq(struct b43legacy_wldev *dev)
 587 {
 588         synchronize_irq(dev->dev->irq);
 589         tasklet_kill(&dev->isr_tasklet);
 590 }
 591
 592 /* DummyTransmission function, as documented on
 593  * https://bcm-specs.sipsolutions.net/DummyTransmission
 594  */
 595 void b43legacy_dummy_transmission(struct b43legacy_wldev *dev)
 596 {
 597         struct b43legacy_phy *phy = &dev->phy;
 598         unsigned int i;
 599         unsigned int max_loop;
 600         u16 value;
 601         u32 buffer[5] = {
 602                 0x00000000,
 603                 0x00D40000,
 604                 0x00000000,
 605                 0x01000000,
 606                 0x00000000,
 607         };
 608
 609         switch (phy->type) {
 610         case B43legacy_PHYTYPE_B:
 611         case B43legacy_PHYTYPE_G:
 612                 max_loop = 0xFA;
 613                 buffer[0] = 0x000B846E;
 614                 break;
 615         default:
 616                 B43legacy_BUG_ON(1);
 617                 return;
 618         }
 619
 620         for (i = 0; i < 5; i++)
 621                 b43legacy_ram_write(dev, i * 4, buffer[i]);
 622
 623         /* dummy read follows */
 624         b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
 625
 626         b43legacy_write16(dev, 0x0568, 0x0000);
 627         b43legacy_write16(dev, 0x07C0, 0x0000);
 628         b43legacy_write16(dev, 0x050C, 0x0000);
 629         b43legacy_write16(dev, 0x0508, 0x0000);
 630         b43legacy_write16(dev, 0x050A, 0x0000);
 631         b43legacy_write16(dev, 0x054C, 0x0000);
 632         b43legacy_write16(dev, 0x056A, 0x0014);
 633         b43legacy_write16(dev, 0x0568, 0x0826);
 634         b43legacy_write16(dev, 0x0500, 0x0000);
 635         b43legacy_write16(dev, 0x0502, 0x0030);
 636
 637         if (phy->radio_ver == 0x2050 && phy->radio_rev <= 0x5)
 638                 b43legacy_radio_write16(dev, 0x0051, 0x0017);
 639         for (i = 0x00; i < max_loop; i++) {
 640                 value = b43legacy_read16(dev, 0x050E);
 641                 if (value & 0x0080)
 642                         break;
 643                 udelay(10);
 644         }
 645         for (i = 0x00; i < 0x0A; i++) {
 646                 value = b43legacy_read16(dev, 0x050E);
 647                 if (value & 0x0400)
 648                         break;
 649                 udelay(10);
 650         }
 651         for (i = 0x00; i < 0x0A; i++) {
 652                 value = b43legacy_read16(dev, 0x0690);
 653                 if (!(value & 0x0100))
 654                         break;
 655                 udelay(10);
 656         }
 657         if (phy->radio_ver == 0x2050 && phy->radio_rev <= 0x5)
 658                 b43legacy_radio_write16(dev, 0x0051, 0x0037);
 659 }
 660
 661 /* Turn the Analog ON/OFF */
 662 static void b43legacy_switch_analog(struct b43legacy_wldev *dev, int on)
 663 {
 664         b43legacy_write16(dev, B43legacy_MMIO_PHY0, on ? 0 : 0xF4);
 665 }
 666
 667 void b43legacy_wireless_core_reset(struct b43legacy_wldev *dev, u32 flags)
 668 {
 669         u32 tmslow;
 670         u32 macctl;
 671
 672         flags |= B43legacy_TMSLOW_PHYCLKEN;
 673         flags |= B43legacy_TMSLOW_PHYRESET;
 674         ssb_device_enable(dev->dev, flags);
 675         msleep(2); /* Wait for the PLL to turn on. */
 676
 677         /* Now take the PHY out of Reset again */
 678         tmslow = ssb_read32(dev->dev, SSB_TMSLOW);
 679         tmslow |= SSB_TMSLOW_FGC;
 680         tmslow &= ~B43legacy_TMSLOW_PHYRESET;
 681         ssb_write32(dev->dev, SSB_TMSLOW, tmslow);
 682         ssb_read32(dev->dev, SSB_TMSLOW); /* flush */
 683         msleep(1);
 684         tmslow &= ~SSB_TMSLOW_FGC;
 685         ssb_write32(dev->dev, SSB_TMSLOW, tmslow);
 686         ssb_read32(dev->dev, SSB_TMSLOW); /* flush */
 687         msleep(1);
 688
 689         /* Turn Analog ON */
 690         b43legacy_switch_analog(dev, 1);
 691
 692         macctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
 693         macctl &= ~B43legacy_MACCTL_GMODE;
 694         if (flags & B43legacy_TMSLOW_GMODE) {
 695                 macctl |= B43legacy_MACCTL_GMODE;
 696                 dev->phy.gmode = true;
 697         } else
 698                 dev->phy.gmode = false;
 699         macctl |= B43legacy_MACCTL_IHR_ENABLED;
 700         b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl);
 701 }
 702
 703 static void handle_irq_transmit_status(struct b43legacy_wldev *dev)
 704 {
 705         u32 v0;
 706         u32 v1;
 707         u16 tmp;
 708         struct b43legacy_txstatus stat;
 709
 710         while (1) {
 711                 v0 = b43legacy_read32(dev, B43legacy_MMIO_XMITSTAT_0);
 712                 if (!(v0 & 0x00000001))
 713                         break;
 714                 v1 = b43legacy_read32(dev, B43legacy_MMIO_XMITSTAT_1);
 715
 716                 stat.cookie = (v0 >> 16);
 717                 stat.seq = (v1 & 0x0000FFFF);
 718                 stat.phy_stat = ((v1 & 0x00FF0000) >> 16);
 719                 tmp = (v0 & 0x0000FFFF);
 720                 stat.frame_count = ((tmp & 0xF000) >> 12);
 721                 stat.rts_count = ((tmp & 0x0F00) >> 8);
 722                 stat.supp_reason = ((tmp & 0x001C) >> 2);
 723                 stat.pm_indicated = !!(tmp & 0x0080);
 724                 stat.intermediate = !!(tmp & 0x0040);
 725                 stat.for_ampdu = !!(tmp & 0x0020);
 726                 stat.acked = !!(tmp & 0x0002);
 727
 728                 b43legacy_handle_txstatus(dev, &stat);
 729         }
 730 }
 731
 732 static void drain_txstatus_queue(struct b43legacy_wldev *dev)
 733 {
 734         u32 dummy;
 735
 736         if (dev->dev->id.revision < 5)
 737                 return;
 738         /* Read all entries from the microcode TXstatus FIFO
 739          * and throw them away.
 740          */
 741         while (1) {
 742                 dummy = b43legacy_read32(dev, B43legacy_MMIO_XMITSTAT_0);
 743                 if (!(dummy & 0x00000001))
 744                         break;
 745                 dummy = b43legacy_read32(dev, B43legacy_MMIO_XMITSTAT_1);
 746         }
 747 }
 748
 749 static u32 b43legacy_jssi_read(struct b43legacy_wldev *dev)
 750 {
 751         u32 val = 0;
 752
 753         val = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED, 0x40A);
 754         val <<= 16;
 755         val |= b43legacy_shm_read16(dev, B43legacy_SHM_SHARED, 0x408);
 756
 757         return val;
 758 }
 759
 760 static void b43legacy_jssi_write(struct b43legacy_wldev *dev, u32 jssi)
 761 {
 762         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x408,
 763                               (jssi & 0x0000FFFF));
 764         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x40A,
 765                               (jssi & 0xFFFF0000) >> 16);
 766 }
 767
 768 static void b43legacy_generate_noise_sample(struct b43legacy_wldev *dev)
 769 {
 770         b43legacy_jssi_write(dev, 0x7F7F7F7F);
 771         b43legacy_write32(dev, B43legacy_MMIO_MACCMD,
 772                           b43legacy_read32(dev, B43legacy_MMIO_MACCMD)
 773                           | B43legacy_MACCMD_BGNOISE);
 774         B43legacy_WARN_ON(dev->noisecalc.channel_at_start !=
 775                             dev->phy.channel);
 776 }
 777
 778 static void b43legacy_calculate_link_quality(struct b43legacy_wldev *dev)
 779 {
 780         /* Top half of Link Quality calculation. */
 781
 782         if (dev->noisecalc.calculation_running)
 783                 return;
 784         dev->noisecalc.channel_at_start = dev->phy.channel;
 785         dev->noisecalc.calculation_running = true;
 786         dev->noisecalc.nr_samples = 0;
 787
 788         b43legacy_generate_noise_sample(dev);
 789 }
 790
 791 static void handle_irq_noise(struct b43legacy_wldev *dev)
 792 {
 793         struct b43legacy_phy *phy = &dev->phy;
 794         u16 tmp;
 795         u8 noise[4];
 796         u8 i;
 797         u8 j;
 798         s32 average;
 799
 800         /* Bottom half of Link Quality calculation. */
 801
 802         B43legacy_WARN_ON(!dev->noisecalc.calculation_running);
 803         if (dev->noisecalc.channel_at_start != phy->channel)
 804                 goto drop_calculation;
 805         *((__le32 *)noise) = cpu_to_le32(b43legacy_jssi_read(dev));
 806         if (noise[0] == 0x7F || noise[1] == 0x7F ||
 807             noise[2] == 0x7F || noise[3] == 0x7F)
 808                 goto generate_new;
 809
 810         /* Get the noise samples. */
 811         B43legacy_WARN_ON(dev->noisecalc.nr_samples >= 8);
 812         i = dev->noisecalc.nr_samples;
 813         noise[0] = clamp_val(noise[0], 0, ARRAY_SIZE(phy->nrssi_lt) - 1);
 814         noise[1] = clamp_val(noise[1], 0, ARRAY_SIZE(phy->nrssi_lt) - 1);
 815         noise[2] = clamp_val(noise[2], 0, ARRAY_SIZE(phy->nrssi_lt) - 1);
 816         noise[3] = clamp_val(noise[3], 0, ARRAY_SIZE(phy->nrssi_lt) - 1);
 817         dev->noisecalc.samples[i][0] = phy->nrssi_lt[noise[0]];
 818         dev->noisecalc.samples[i][1] = phy->nrssi_lt[noise[1]];
 819         dev->noisecalc.samples[i][2] = phy->nrssi_lt[noise[2]];
 820         dev->noisecalc.samples[i][3] = phy->nrssi_lt[noise[3]];
 821         dev->noisecalc.nr_samples++;
 822         if (dev->noisecalc.nr_samples == 8) {
 823                 /* Calculate the Link Quality by the noise samples. */
 824                 average = 0;
 825                 for (i = 0; i < 8; i++) {
 826                         for (j = 0; j < 4; j++)
 827                                 average += dev->noisecalc.samples[i][j];
 828                 }
 829                 average /= (8 * 4);
 830                 average *= 125;
 831                 average += 64;
 832                 average /= 128;
 833                 tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
 834                                              0x40C);
 835                 tmp = (tmp / 128) & 0x1F;
 836                 if (tmp >= 8)
 837                         average += 2;
 838                 else
 839                         average -= 25;
 840                 if (tmp == 8)
 841                         average -= 72;
 842                 else
 843                         average -= 48;
 844
 845                 dev->stats.link_noise = average;
 846 drop_calculation:
 847                 dev->noisecalc.calculation_running = false;
 848                 return;
 849         }
 850 generate_new:
 851         b43legacy_generate_noise_sample(dev);
 852 }
 853
 854 static void handle_irq_tbtt_indication(struct b43legacy_wldev *dev)
 855 {
 856         if (b43legacy_is_mode(dev->wl, NL80211_IFTYPE_AP)) {
 857                 /* TODO: PS TBTT */
 858         } else {
 859                 if (1/*FIXME: the last PSpoll frame was sent successfully */)
 860                         b43legacy_power_saving_ctl_bits(dev, -1, -1);
 861         }
 862         if (b43legacy_is_mode(dev->wl, NL80211_IFTYPE_ADHOC))
 863                 dev->dfq_valid = true;
 864 }
 865
 866 static void handle_irq_atim_end(struct b43legacy_wldev *dev)
 867 {
 868         if (dev->dfq_valid) {
 869                 b43legacy_write32(dev, B43legacy_MMIO_MACCMD,
 870                                   b43legacy_read32(dev, B43legacy_MMIO_MACCMD)
 871                                   | B43legacy_MACCMD_DFQ_VALID);
 872                 dev->dfq_valid = false;
 873         }
 874 }
 875
 876 static void handle_irq_pmq(struct b43legacy_wldev *dev)
 877 {
 878         u32 tmp;
 879
 880         /* TODO: AP mode. */
 881
 882         while (1) {
 883                 tmp = b43legacy_read32(dev, B43legacy_MMIO_PS_STATUS);
 884                 if (!(tmp & 0x00000008))
 885                         break;
 886         }
 887         /* 16bit write is odd, but correct. */
 888         b43legacy_write16(dev, B43legacy_MMIO_PS_STATUS, 0x0002);
 889 }
 890
 891 static void b43legacy_write_template_common(struct b43legacy_wldev *dev,
 892                                             const u8 *data, u16 size,
 893                                             u16 ram_offset,
 894                                             u16 shm_size_offset, u8 rate)
 895 {
 896         u32 i;
 897         u32 tmp;
 898         struct b43legacy_plcp_hdr4 plcp;
 899
 900         plcp.data = 0;
 901         b43legacy_generate_plcp_hdr(&plcp, size + FCS_LEN, rate);
 902         b43legacy_ram_write(dev, ram_offset, le32_to_cpu(plcp.data));
 903         ram_offset += sizeof(u32);
 904         /* The PLCP is 6 bytes long, but we only wrote 4 bytes, yet.
 905          * So leave the first two bytes of the next write blank.
 906          */
 907         tmp = (u32)(data[0]) << 16;
 908         tmp |= (u32)(data[1]) << 24;
 909         b43legacy_ram_write(dev, ram_offset, tmp);
 910         ram_offset += sizeof(u32);
 911         for (i = 2; i < size; i += sizeof(u32)) {
 912                 tmp = (u32)(data[i + 0]);
 913                 if (i + 1 < size)
 914                         tmp |= (u32)(data[i + 1]) << 8;
 915                 if (i + 2 < size)
 916                         tmp |= (u32)(data[i + 2]) << 16;
 917                 if (i + 3 < size)
 918                         tmp |= (u32)(data[i + 3]) << 24;
 919                 b43legacy_ram_write(dev, ram_offset + i - 2, tmp);
 920         }
 921         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, shm_size_offset,
 922                               size + sizeof(struct b43legacy_plcp_hdr6));
 923 }
 924
 925 /* Convert a b43legacy antenna number value to the PHY TX control value. */
 926 static u16 b43legacy_antenna_to_phyctl(int antenna)
 927 {
 928         switch (antenna) {
 929         case B43legacy_ANTENNA0:
 930                 return B43legacy_TX4_PHY_ANT0;
 931         case B43legacy_ANTENNA1:
 932                 return B43legacy_TX4_PHY_ANT1;
 933         }
 934         return B43legacy_TX4_PHY_ANTLAST;
 935 }
 936
 937 static void b43legacy_write_beacon_template(struct b43legacy_wldev *dev,
 938                                             u16 ram_offset,
 939                                             u16 shm_size_offset)
 940 {
 941
 942         unsigned int i, len, variable_len;
 943         const struct ieee80211_mgmt *bcn;
 944         const u8 *ie;
 945         bool tim_found = false;
 946         unsigned int rate;
 947         u16 ctl;
 948         int antenna;
 949         struct ieee80211_tx_info *info = IEEE80211_SKB_CB(dev->wl->current_beacon);
 950
 951         bcn = (const struct ieee80211_mgmt *)(dev->wl->current_beacon->data);
 952         len = min_t(size_t, dev->wl->current_beacon->len,
 953                   0x200 - sizeof(struct b43legacy_plcp_hdr6));
 954         rate = ieee80211_get_tx_rate(dev->wl->hw, info)->hw_value;
 955
 956         b43legacy_write_template_common(dev, (const u8 *)bcn, len, ram_offset,
 957                                         shm_size_offset, rate);
 958
 959         /* Write the PHY TX control parameters. */
 960         antenna = B43legacy_ANTENNA_DEFAULT;
 961         antenna = b43legacy_antenna_to_phyctl(antenna);
 962         ctl = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
 963                                    B43legacy_SHM_SH_BEACPHYCTL);
 964         /* We can't send beacons with short preamble. Would get PHY errors. */
 965         ctl &= ~B43legacy_TX4_PHY_SHORTPRMBL;
 966         ctl &= ~B43legacy_TX4_PHY_ANT;
 967         ctl &= ~B43legacy_TX4_PHY_ENC;
 968         ctl |= antenna;
 969         ctl |= B43legacy_TX4_PHY_ENC_CCK;
 970         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
 971                               B43legacy_SHM_SH_BEACPHYCTL, ctl);
 972
 973         /* Find the position of the TIM and the DTIM_period value
 974          * and write them to SHM. */
 975         ie = bcn->u.beacon.variable;
 976         variable_len = len - offsetof(struct ieee80211_mgmt, u.beacon.variable);
 977         for (i = 0; i < variable_len - 2; ) {
 978                 uint8_t ie_id, ie_len;
 979
 980                 ie_id = ie[i];
 981                 ie_len = ie[i + 1];
 982                 if (ie_id == 5) {
 983                         u16 tim_position;
 984                         u16 dtim_period;
 985                         /* This is the TIM Information Element */
 986
 987                         /* Check whether the ie_len is in the beacon data range. */
 988                         if (variable_len < ie_len + 2 + i)
 989                                 break;
 990                         /* A valid TIM is at least 4 bytes long. */
 991                         if (ie_len < 4)
 992                                 break;
 993                         tim_found = true;
 994
 995                         tim_position = sizeof(struct b43legacy_plcp_hdr6);
 996                         tim_position += offsetof(struct ieee80211_mgmt,
 997                                                  u.beacon.variable);
 998                         tim_position += i;
 999
1000                         dtim_period = ie[i + 3];
1001
1002                         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
1003                                         B43legacy_SHM_SH_TIMPOS, tim_position);
1004                         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
1005                                         B43legacy_SHM_SH_DTIMP, dtim_period);
1006                         break;
1007                 }
1008                 i += ie_len + 2;
1009         }
1010         if (!tim_found) {
1011                 b43legacywarn(dev->wl, "Did not find a valid TIM IE in the "
1012                               "beacon template packet. AP or IBSS operation "
1013                               "may be broken.\n");
1014         } else
1015                 b43legacydbg(dev->wl, "Updated beacon template\n");
1016 }
1017
1018 static void b43legacy_write_probe_resp_plcp(struct b43legacy_wldev *dev,
1019                                             u16 shm_offset, u16 size,
1020                                             struct ieee80211_rate *rate)
1021 {
1022         struct b43legacy_plcp_hdr4 plcp;
1023         u32 tmp;
1024         __le16 dur;
1025
1026         plcp.data = 0;
1027         b43legacy_generate_plcp_hdr(&plcp, size + FCS_LEN, rate->hw_value);
1028         dur = ieee80211_generic_frame_duration(dev->wl->hw,
1029                                                dev->wl->vif,
1030                                                NL80211_BAND_2GHZ,
1031                                                size,
1032                                                rate);
1033         /* Write PLCP in two parts and timing for packet transfer */
1034         tmp = le32_to_cpu(plcp.data);
1035         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, shm_offset,
1036                               tmp & 0xFFFF);
1037         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, shm_offset + 2,
1038                               tmp >> 16);
1039         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, shm_offset + 6,
1040                               le16_to_cpu(dur));
1041 }
1042
1043 /* Instead of using custom probe response template, this function
1044  * just patches custom beacon template by:
1045  * 1) Changing packet type
1046  * 2) Patching duration field
1047  * 3) Stripping TIM
1048  */
1049 static const u8 *b43legacy_generate_probe_resp(struct b43legacy_wldev *dev,
1050                                                u16 *dest_size,
1051                                                struct ieee80211_rate *rate)
1052 {
1053         const u8 *src_data;
1054         u8 *dest_data;
1055         u16 src_size, elem_size, src_pos, dest_pos;
1056         __le16 dur;
1057         struct ieee80211_hdr *hdr;
1058         size_t ie_start;
1059
1060         src_size = dev->wl->current_beacon->len;
1061         src_data = (const u8 *)dev->wl->current_beacon->data;
1062
1063         /* Get the start offset of the variable IEs in the packet. */
1064         ie_start = offsetof(struct ieee80211_mgmt, u.probe_resp.variable);
1065         B43legacy_WARN_ON(ie_start != offsetof(struct ieee80211_mgmt,
1066                                                u.beacon.variable));
1067
1068         if (B43legacy_WARN_ON(src_size < ie_start))
1069                 return NULL;
1070
1071         dest_data = kmalloc(src_size, GFP_ATOMIC);
1072         if (unlikely(!dest_data))
1073                 return NULL;
1074
1075         /* Copy the static data and all Information Elements, except the TIM. */
1076         memcpy(dest_data, src_data, ie_start);
1077         src_pos = ie_start;
1078         dest_pos = ie_start;
1079         for ( ; src_pos < src_size - 2; src_pos += elem_size) {
1080                 elem_size = src_data[src_pos + 1] + 2;
1081                 if (src_data[src_pos] == 5) {
1082                         /* This is the TIM. */
1083                         continue;
1084                 }
1085                 memcpy(dest_data + dest_pos, src_data + src_pos, elem_size);
1086                 dest_pos += elem_size;
1087         }
1088         *dest_size = dest_pos;
1089         hdr = (struct ieee80211_hdr *)dest_data;
1090
1091         /* Set the frame control. */
1092         hdr->frame_control = cpu_to_le16(IEEE80211_FTYPE_MGMT |
1093                                          IEEE80211_STYPE_PROBE_RESP);
1094         dur = ieee80211_generic_frame_duration(dev->wl->hw,
1095                                                dev->wl->vif,
1096                                                NL80211_BAND_2GHZ,
1097                                                *dest_size,
1098                                                rate);
1099         hdr->duration_id = dur;
1100
1101         return dest_data;
1102 }
1103
1104 static void b43legacy_write_probe_resp_template(struct b43legacy_wldev *dev,
1105                                                 u16 ram_offset,
1106                                                 u16 shm_size_offset,
1107                                                 struct ieee80211_rate *rate)
1108 {
1109         const u8 *probe_resp_data;
1110         u16 size;
1111
1112         size = dev->wl->current_beacon->len;
1113         probe_resp_data = b43legacy_generate_probe_resp(dev, &size, rate);
1114         if (unlikely(!probe_resp_data))
1115                 return;
1116
1117         /* Looks like PLCP headers plus packet timings are stored for
1118          * all possible basic rates
1119          */
1120         b43legacy_write_probe_resp_plcp(dev, 0x31A, size,
1121                                         &b43legacy_b_ratetable[0]);
1122         b43legacy_write_probe_resp_plcp(dev, 0x32C, size,
1123                                         &b43legacy_b_ratetable[1]);
1124         b43legacy_write_probe_resp_plcp(dev, 0x33E, size,
1125                                         &b43legacy_b_ratetable[2]);
1126         b43legacy_write_probe_resp_plcp(dev, 0x350, size,
1127                                         &b43legacy_b_ratetable[3]);
1128
1129         size = min_t(size_t, size,
1130                    0x200 - sizeof(struct b43legacy_plcp_hdr6));
1131         b43legacy_write_template_common(dev, probe_resp_data,
1132                                         size, ram_offset,
1133                                         shm_size_offset, rate->hw_value);
1134         kfree(probe_resp_data);
1135 }
1136
1137 static void b43legacy_upload_beacon0(struct b43legacy_wldev *dev)
1138 {
1139         struct b43legacy_wl *wl = dev->wl;
1140
1141         if (wl->beacon0_uploaded)
1142                 return;
1143         b43legacy_write_beacon_template(dev, 0x68, 0x18);
1144         /* FIXME: Probe resp upload doesn't really belong here,
1145          *        but we don't use that feature anyway. */
1146         b43legacy_write_probe_resp_template(dev, 0x268, 0x4A,
1147                                       &__b43legacy_ratetable[3]);
1148         wl->beacon0_uploaded = true;
1149 }
1150
1151 static void b43legacy_upload_beacon1(struct b43legacy_wldev *dev)
1152 {
1153         struct b43legacy_wl *wl = dev->wl;
1154
1155         if (wl->beacon1_uploaded)
1156                 return;
1157         b43legacy_write_beacon_template(dev, 0x468, 0x1A);
1158         wl->beacon1_uploaded = true;
1159 }
1160
1161 static void handle_irq_beacon(struct b43legacy_wldev *dev)
1162 {
1163         struct b43legacy_wl *wl = dev->wl;
1164         u32 cmd, beacon0_valid, beacon1_valid;
1165
1166         if (!b43legacy_is_mode(wl, NL80211_IFTYPE_AP))
1167                 return;
1168
1169         /* This is the bottom half of the asynchronous beacon update. */
1170
1171         /* Ignore interrupt in the future. */
1172         dev->irq_mask &= ~B43legacy_IRQ_BEACON;
1173
1174         cmd = b43legacy_read32(dev, B43legacy_MMIO_MACCMD);
1175         beacon0_valid = (cmd & B43legacy_MACCMD_BEACON0_VALID);
1176         beacon1_valid = (cmd & B43legacy_MACCMD_BEACON1_VALID);
1177
1178         /* Schedule interrupt manually, if busy. */
1179         if (beacon0_valid && beacon1_valid) {
1180                 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON, B43legacy_IRQ_BEACON);
1181                 dev->irq_mask |= B43legacy_IRQ_BEACON;
1182                 return;
1183         }
1184
1185         if (unlikely(wl->beacon_templates_virgin)) {
1186                 /* We never uploaded a beacon before.
1187                  * Upload both templates now, but only mark one valid. */
1188                 wl->beacon_templates_virgin = false;
1189                 b43legacy_upload_beacon0(dev);
1190                 b43legacy_upload_beacon1(dev);
1191                 cmd = b43legacy_read32(dev, B43legacy_MMIO_MACCMD);
1192                 cmd |= B43legacy_MACCMD_BEACON0_VALID;
1193                 b43legacy_write32(dev, B43legacy_MMIO_MACCMD, cmd);
1194         } else {
1195                 if (!beacon0_valid) {
1196                         b43legacy_upload_beacon0(dev);
1197                         cmd = b43legacy_read32(dev, B43legacy_MMIO_MACCMD);
1198                         cmd |= B43legacy_MACCMD_BEACON0_VALID;
1199                         b43legacy_write32(dev, B43legacy_MMIO_MACCMD, cmd);
1200                 } else if (!beacon1_valid) {
1201                         b43legacy_upload_beacon1(dev);
1202                         cmd = b43legacy_read32(dev, B43legacy_MMIO_MACCMD);
1203                         cmd |= B43legacy_MACCMD_BEACON1_VALID;
1204                         b43legacy_write32(dev, B43legacy_MMIO_MACCMD, cmd);
1205                 }
1206         }
1207 }
1208
1209 static void b43legacy_beacon_update_trigger_work(struct work_struct *work)
1210 {
1211         struct b43legacy_wl *wl = container_of(work, struct b43legacy_wl,
1212                                          beacon_update_trigger);
1213         struct b43legacy_wldev *dev;
1214
1215         mutex_lock(&wl->mutex);
1216         dev = wl->current_dev;
1217         if (likely(dev && (b43legacy_status(dev) >= B43legacy_STAT_INITIALIZED))) {
1218                 spin_lock_irq(&wl->irq_lock);
1219                 /* Update beacon right away or defer to IRQ. */
1220                 handle_irq_beacon(dev);
1221                 /* The handler might have updated the IRQ mask. */
1222                 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK,
1223                                   dev->irq_mask);
1224                 spin_unlock_irq(&wl->irq_lock);
1225         }
1226         mutex_unlock(&wl->mutex);
1227 }
1228
1229 /* Asynchronously update the packet templates in template RAM.
1230  * Locking: Requires wl->irq_lock to be locked. */
1231 static void b43legacy_update_templates(struct b43legacy_wl *wl)
1232 {
1233         struct sk_buff *beacon;
1234         /* This is the top half of the ansynchronous beacon update. The bottom
1235          * half is the beacon IRQ. Beacon update must be asynchronous to avoid
1236          * sending an invalid beacon. This can happen for example, if the
1237          * firmware transmits a beacon while we are updating it. */
1238
1239         /* We could modify the existing beacon and set the aid bit in the TIM
1240          * field, but that would probably require resizing and moving of data
1241          * within the beacon template. Simply request a new beacon and let
1242          * mac80211 do the hard work. */
1243         beacon = ieee80211_beacon_get(wl->hw, wl->vif);
1244         if (unlikely(!beacon))
1245                 return;
1246
1247         if (wl->current_beacon)
1248                 dev_kfree_skb_any(wl->current_beacon);
1249         wl->current_beacon = beacon;
1250         wl->beacon0_uploaded = false;
1251         wl->beacon1_uploaded = false;
1252         ieee80211_queue_work(wl->hw, &wl->beacon_update_trigger);
1253 }
1254
1255 static void b43legacy_set_beacon_int(struct b43legacy_wldev *dev,
1256                                      u16 beacon_int)
1257 {
1258         b43legacy_time_lock(dev);
1259         if (dev->dev->id.revision >= 3) {
1260                 b43legacy_write32(dev, B43legacy_MMIO_TSF_CFP_REP,
1261                                  (beacon_int << 16));
1262                 b43legacy_write32(dev, B43legacy_MMIO_TSF_CFP_START,
1263                                  (beacon_int << 10));
1264         } else {
1265                 b43legacy_write16(dev, 0x606, (beacon_int >> 6));
1266                 b43legacy_write16(dev, 0x610, beacon_int);
1267         }
1268         b43legacy_time_unlock(dev);
1269         b43legacydbg(dev->wl, "Set beacon interval to %u\n", beacon_int);
1270 }
1271
1272 static void handle_irq_ucode_debug(struct b43legacy_wldev *dev)
1273 {
1274 }
1275
1276 /* Interrupt handler bottom-half */
1277 static void b43legacy_interrupt_tasklet(struct tasklet_struct *t)
1278 {
1279         struct b43legacy_wldev *dev = from_tasklet(dev, t, isr_tasklet);
1280         u32 reason;
1281         u32 dma_reason[ARRAY_SIZE(dev->dma_reason)];
1282         u32 merged_dma_reason = 0;
1283         int i;
1284         unsigned long flags;
1285
1286         spin_lock_irqsave(&dev->wl->irq_lock, flags);
1287
1288         B43legacy_WARN_ON(b43legacy_status(dev) <
1289                           B43legacy_STAT_INITIALIZED);
1290
1291         reason = dev->irq_reason;
1292         for (i = 0; i < ARRAY_SIZE(dma_reason); i++) {
1293                 dma_reason[i] = dev->dma_reason[i];
1294                 merged_dma_reason |= dma_reason[i];
1295         }
1296
1297         if (unlikely(reason & B43legacy_IRQ_MAC_TXERR))
1298                 b43legacyerr(dev->wl, "MAC transmission error\n");
1299
1300         if (unlikely(reason & B43legacy_IRQ_PHY_TXERR)) {
1301                 b43legacyerr(dev->wl, "PHY transmission error\n");
1302                 rmb();
1303                 if (unlikely(atomic_dec_and_test(&dev->phy.txerr_cnt))) {
1304                         b43legacyerr(dev->wl, "Too many PHY TX errors, "
1305                                               "restarting the controller\n");
1306                         b43legacy_controller_restart(dev, "PHY TX errors");
1307                 }
1308         }
1309
1310         if (unlikely(merged_dma_reason & (B43legacy_DMAIRQ_FATALMASK |
1311                                           B43legacy_DMAIRQ_NONFATALMASK))) {
1312                 if (merged_dma_reason & B43legacy_DMAIRQ_FATALMASK) {
1313                         b43legacyerr(dev->wl, "Fatal DMA error: "
1314                                "0x%08X, 0x%08X, 0x%08X, "
1315                                "0x%08X, 0x%08X, 0x%08X\n",
1316                                dma_reason[0], dma_reason[1],
1317                                dma_reason[2], dma_reason[3],
1318                                dma_reason[4], dma_reason[5]);
1319                         b43legacy_controller_restart(dev, "DMA error");
1320                         spin_unlock_irqrestore(&dev->wl->irq_lock, flags);
1321                         return;
1322                 }
1323                 if (merged_dma_reason & B43legacy_DMAIRQ_NONFATALMASK)
1324                         b43legacyerr(dev->wl, "DMA error: "
1325                                "0x%08X, 0x%08X, 0x%08X, "
1326                                "0x%08X, 0x%08X, 0x%08X\n",
1327                                dma_reason[0], dma_reason[1],
1328                                dma_reason[2], dma_reason[3],
1329                                dma_reason[4], dma_reason[5]);
1330         }
1331
1332         if (unlikely(reason & B43legacy_IRQ_UCODE_DEBUG))
1333                 handle_irq_ucode_debug(dev);
1334         if (reason & B43legacy_IRQ_TBTT_INDI)
1335                 handle_irq_tbtt_indication(dev);
1336         if (reason & B43legacy_IRQ_ATIM_END)
1337                 handle_irq_atim_end(dev);
1338         if (reason & B43legacy_IRQ_BEACON)
1339                 handle_irq_beacon(dev);
1340         if (reason & B43legacy_IRQ_PMQ)
1341                 handle_irq_pmq(dev);
1342         if (reason & B43legacy_IRQ_TXFIFO_FLUSH_OK) {
1343                 ;/*TODO*/
1344         }
1345         if (reason & B43legacy_IRQ_NOISESAMPLE_OK)
1346                 handle_irq_noise(dev);
1347
1348         /* Check the DMA reason registers for received data. */
1349         if (dma_reason[0] & B43legacy_DMAIRQ_RX_DONE) {
1350                 if (b43legacy_using_pio(dev))
1351                         b43legacy_pio_rx(dev->pio.queue0);
1352                 else
1353                         b43legacy_dma_rx(dev->dma.rx_ring0);
1354         }
1355         B43legacy_WARN_ON(dma_reason[1] & B43legacy_DMAIRQ_RX_DONE);
1356         B43legacy_WARN_ON(dma_reason[2] & B43legacy_DMAIRQ_RX_DONE);
1357         if (dma_reason[3] & B43legacy_DMAIRQ_RX_DONE) {
1358                 if (b43legacy_using_pio(dev))
1359                         b43legacy_pio_rx(dev->pio.queue3);
1360                 else
1361                         b43legacy_dma_rx(dev->dma.rx_ring3);
1362         }
1363         B43legacy_WARN_ON(dma_reason[4] & B43legacy_DMAIRQ_RX_DONE);
1364         B43legacy_WARN_ON(dma_reason[5] & B43legacy_DMAIRQ_RX_DONE);
1365
1366         if (reason & B43legacy_IRQ_TX_OK)
1367                 handle_irq_transmit_status(dev);
1368
1369         b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, dev->irq_mask);
1370         spin_unlock_irqrestore(&dev->wl->irq_lock, flags);
1371 }
1372
1373 static void pio_irq_workaround(struct b43legacy_wldev *dev,
1374                                u16 base, int queueidx)
1375 {
1376         u16 rxctl;
1377
1378         rxctl = b43legacy_read16(dev, base + B43legacy_PIO_RXCTL);
1379         if (rxctl & B43legacy_PIO_RXCTL_DATAAVAILABLE)
1380                 dev->dma_reason[queueidx] |= B43legacy_DMAIRQ_RX_DONE;
1381         else
1382                 dev->dma_reason[queueidx] &= ~B43legacy_DMAIRQ_RX_DONE;
1383 }
1384
1385 static void b43legacy_interrupt_ack(struct b43legacy_wldev *dev, u32 reason)
1386 {
1387         if (b43legacy_using_pio(dev) &&
1388             (dev->dev->id.revision < 3) &&
1389             (!(reason & B43legacy_IRQ_PIO_WORKAROUND))) {
1390                 /* Apply a PIO specific workaround to the dma_reasons */
1391                 pio_irq_workaround(dev, B43legacy_MMIO_PIO1_BASE, 0);
1392                 pio_irq_workaround(dev, B43legacy_MMIO_PIO2_BASE, 1);
1393                 pio_irq_workaround(dev, B43legacy_MMIO_PIO3_BASE, 2);
1394                 pio_irq_workaround(dev, B43legacy_MMIO_PIO4_BASE, 3);
1395         }
1396
1397         b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON, reason);
1398
1399         b43legacy_write32(dev, B43legacy_MMIO_DMA0_REASON,
1400                           dev->dma_reason[0]);
1401         b43legacy_write32(dev, B43legacy_MMIO_DMA1_REASON,
1402                           dev->dma_reason[1]);
1403         b43legacy_write32(dev, B43legacy_MMIO_DMA2_REASON,
1404                           dev->dma_reason[2]);
1405         b43legacy_write32(dev, B43legacy_MMIO_DMA3_REASON,
1406                           dev->dma_reason[3]);
1407         b43legacy_write32(dev, B43legacy_MMIO_DMA4_REASON,
1408                           dev->dma_reason[4]);
1409         b43legacy_write32(dev, B43legacy_MMIO_DMA5_REASON,
1410                           dev->dma_reason[5]);
1411 }
1412
1413 /* Interrupt handler top-half */
1414 static irqreturn_t b43legacy_interrupt_handler(int irq, void *dev_id)
1415 {
1416         irqreturn_t ret = IRQ_NONE;
1417         struct b43legacy_wldev *dev = dev_id;
1418         u32 reason;
1419
1420         B43legacy_WARN_ON(!dev);
1421
1422         spin_lock(&dev->wl->irq_lock);
1423
1424         if (unlikely(b43legacy_status(dev) < B43legacy_STAT_STARTED))
1425                 /* This can only happen on shared IRQ lines. */
1426                 goto out;
1427         reason = b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
1428         if (reason == 0xffffffff) /* shared IRQ */
1429                 goto out;
1430         ret = IRQ_HANDLED;
1431         reason &= dev->irq_mask;
1432         if (!reason)
1433                 goto out;
1434
1435         dev->dma_reason[0] = b43legacy_read32(dev,
1436                                               B43legacy_MMIO_DMA0_REASON)
1437                                               & 0x0001DC00;
1438         dev->dma_reason[1] = b43legacy_read32(dev,
1439                                               B43legacy_MMIO_DMA1_REASON)
1440                                               & 0x0000DC00;
1441         dev->dma_reason[2] = b43legacy_read32(dev,
1442                                               B43legacy_MMIO_DMA2_REASON)
1443                                               & 0x0000DC00;
1444         dev->dma_reason[3] = b43legacy_read32(dev,
1445                                               B43legacy_MMIO_DMA3_REASON)
1446                                               & 0x0001DC00;
1447         dev->dma_reason[4] = b43legacy_read32(dev,
1448                                               B43legacy_MMIO_DMA4_REASON)
1449                                               & 0x0000DC00;
1450         dev->dma_reason[5] = b43legacy_read32(dev,
1451                                               B43legacy_MMIO_DMA5_REASON)
1452                                               & 0x0000DC00;
1453
1454         b43legacy_interrupt_ack(dev, reason);
1455         /* Disable all IRQs. They are enabled again in the bottom half. */
1456         b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, 0);
1457         /* Save the reason code and call our bottom half. */
1458         dev->irq_reason = reason;
1459         tasklet_schedule(&dev->isr_tasklet);
1460 out:
1461         spin_unlock(&dev->wl->irq_lock);
1462
1463         return ret;
1464 }
1465
1466 static void b43legacy_release_firmware(struct b43legacy_wldev *dev)
1467 {
1468         release_firmware(dev->fw.ucode);
1469         dev->fw.ucode = NULL;
1470         release_firmware(dev->fw.pcm);
1471         dev->fw.pcm = NULL;
1472         release_firmware(dev->fw.initvals);
1473         dev->fw.initvals = NULL;
1474         release_firmware(dev->fw.initvals_band);
1475         dev->fw.initvals_band = NULL;
1476 }
1477
1478 static void b43legacy_print_fw_helptext(struct b43legacy_wl *wl)
1479 {
1480         /*(DEBLOBBED)*/
1481 }
1482
1483 static void b43legacy_fw_cb(const struct firmware *firmware, void *context)
1484 {
1485         struct b43legacy_wldev *dev = context;
1486
1487         dev->fwp = firmware;
1488         complete(&dev->fw_load_complete);
1489 }
1490
1491 static int do_request_fw(struct b43legacy_wldev *dev,
1492                          const char *name,
1493                          const struct firmware **fw, bool async)
1494 {
1495         char path[sizeof(modparam_fwpostfix) + 32];
1496         struct b43legacy_fw_header *hdr;
1497         u32 size;
1498         int err;
1499
1500         if (!name)
1501                 return 0;
1502
1503         snprintf(path, ARRAY_SIZE(path),
1504                  "/*(DEBLOBBED)*/",
1505                  modparam_fwpostfix, name);
1506         b43legacyinfo(dev->wl, "Loading firmware %s\n", path);
1507         if (async) {
1508                 init_completion(&dev->fw_load_complete);
1509                 err = reject_firmware_nowait(THIS_MODULE, 1, path,
1510                                               dev->dev->dev, GFP_KERNEL,
1511                                               dev, b43legacy_fw_cb);
1512                 if (err) {
1513                         b43legacyerr(dev->wl, "Unable to load firmware\n");
1514                         return err;
1515                 }
1516                 /* stall here until fw ready */
1517                 wait_for_completion(&dev->fw_load_complete);
1518                 if (!dev->fwp)
1519                         err = -EINVAL;
1520                 *fw = dev->fwp;
1521         } else {
1522                 err = reject_firmware(fw, path, dev->dev->dev);
1523         }
1524         if (err) {
1525                 b43legacyerr(dev->wl, "Firmware file \"%s\" not found "
1526                        "or load failed.\n", path);
1527                 return err;
1528         }
1529         if ((*fw)->size < sizeof(struct b43legacy_fw_header))
1530                 goto err_format;
1531         hdr = (struct b43legacy_fw_header *)((*fw)->data);
1532         switch (hdr->type) {
1533         case B43legacy_FW_TYPE_UCODE:
1534         case B43legacy_FW_TYPE_PCM:
1535                 size = be32_to_cpu(hdr->size);
1536                 if (size != (*fw)->size - sizeof(struct b43legacy_fw_header))
1537                         goto err_format;
1538                 fallthrough;
1539         case B43legacy_FW_TYPE_IV:
1540                 if (hdr->ver != 1)
1541                         goto err_format;
1542                 break;
1543         default:
1544                 goto err_format;
1545         }
1546
1547         return err;
1548
1549 err_format:
1550         b43legacyerr(dev->wl, "Firmware file \"%s\" format error.\n", path);
1551         return -EPROTO;
1552 }
1553
1554 static int b43legacy_one_core_attach(struct ssb_device *dev,
1555                                      struct b43legacy_wl *wl);
1556 static void b43legacy_one_core_detach(struct ssb_device *dev);
1557
1558 static void b43legacy_request_firmware(struct work_struct *work)
1559 {
1560         struct b43legacy_wl *wl = container_of(work,
1561                                   struct b43legacy_wl, firmware_load);
1562         struct b43legacy_wldev *dev = wl->current_dev;
1563         struct b43legacy_firmware *fw = &dev->fw;
1564         const u8 rev = dev->dev->id.revision;
1565         const char *filename;
1566         int err;
1567
1568         if (!fw->ucode) {
1569                 if (rev == 2)
1570                         filename = "/*(DEBLOBBED)*/";
1571                 else if (rev == 4)
1572                         filename = "/*(DEBLOBBED)*/";
1573                 else
1574                         filename = "/*(DEBLOBBED)*/";
1575                 err = do_request_fw(dev, filename, &fw->ucode, true);
1576                 if (err)
1577                         goto err_load;
1578         }
1579         if (!fw->pcm) {
1580                 if (rev < 5)
1581                         filename = "/*(DEBLOBBED)*/";
1582                 else
1583                         filename = "/*(DEBLOBBED)*/";
1584                 err = do_request_fw(dev, filename, &fw->pcm, false);
1585                 if (err)
1586                         goto err_load;
1587         }
1588         if (!fw->initvals) {
1589                 switch (dev->phy.type) {
1590                 case B43legacy_PHYTYPE_B:
1591                 case B43legacy_PHYTYPE_G:
1592                         if ((rev >= 5) && (rev <= 10))
1593                                 filename = "/*(DEBLOBBED)*/";
1594                         else if (rev == 2 || rev == 4)
1595                                 filename = "/*(DEBLOBBED)*/";
1596                         else
1597                                 goto err_no_initvals;
1598                         break;
1599                 default:
1600                         goto err_no_initvals;
1601                 }
1602                 err = do_request_fw(dev, filename, &fw->initvals, false);
1603                 if (err)
1604                         goto err_load;
1605         }
1606         if (!fw->initvals_band) {
1607                 switch (dev->phy.type) {
1608                 case B43legacy_PHYTYPE_B:
1609                 case B43legacy_PHYTYPE_G:
1610                         if ((rev >= 5) && (rev <= 10))
1611                                 filename = "/*(DEBLOBBED)*/";
1612                         else if (rev >= 11)
1613                                 filename = NULL;
1614                         else if (rev == 2 || rev == 4)
1615                                 filename = NULL;
1616                         else
1617                                 goto err_no_initvals;
1618                         break;
1619                 default:
1620                         goto err_no_initvals;
1621                 }
1622                 err = do_request_fw(dev, filename, &fw->initvals_band, false);
1623                 if (err)
1624                         goto err_load;
1625         }
1626         err = ieee80211_register_hw(wl->hw);
1627         if (err)
1628                 goto err_one_core_detach;
1629         return;
1630
1631 err_one_core_detach:
1632         b43legacy_one_core_detach(dev->dev);
1633         goto error;
1634
1635 err_load:
1636         b43legacy_print_fw_helptext(dev->wl);
1637         goto error;
1638
1639 err_no_initvals:
1640         err = -ENODEV;
1641         b43legacyerr(dev->wl, "No Initial Values firmware file for PHY %u, "
1642                "core rev %u\n", dev->phy.type, rev);
1643         goto error;
1644
1645 error:
1646         b43legacy_release_firmware(dev);
1647         return;
1648 }
1649
1650 static int b43legacy_upload_microcode(struct b43legacy_wldev *dev)
1651 {
1652         struct wiphy *wiphy = dev->wl->hw->wiphy;
1653         const size_t hdr_len = sizeof(struct b43legacy_fw_header);
1654         const __be32 *data;
1655         unsigned int i;
1656         unsigned int len;
1657         u16 fwrev;
1658         u16 fwpatch;
1659         u16 fwdate;
1660         u16 fwtime;
1661         u32 tmp, macctl;
1662         int err = 0;
1663
1664         /* Jump the microcode PSM to offset 0 */
1665         macctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
1666         B43legacy_WARN_ON(macctl & B43legacy_MACCTL_PSM_RUN);
1667         macctl |= B43legacy_MACCTL_PSM_JMP0;
1668         b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl);
1669         /* Zero out all microcode PSM registers and shared memory. */
1670         for (i = 0; i < 64; i++)
1671                 b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS, i, 0);
1672         for (i = 0; i < 4096; i += 2)
1673                 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, i, 0);
1674
1675         /* Upload Microcode. */
1676         data = (__be32 *) (dev->fw.ucode->data + hdr_len);
1677         len = (dev->fw.ucode->size - hdr_len) / sizeof(__be32);
1678         b43legacy_shm_control_word(dev,
1679                                    B43legacy_SHM_UCODE |
1680                                    B43legacy_SHM_AUTOINC_W,
1681                                    0x0000);
1682         for (i = 0; i < len; i++) {
1683                 b43legacy_write32(dev, B43legacy_MMIO_SHM_DATA,
1684                                     be32_to_cpu(data[i]));
1685                 udelay(10);
1686         }
1687
1688         if (dev->fw.pcm) {
1689                 /* Upload PCM data. */
1690                 data = (__be32 *) (dev->fw.pcm->data + hdr_len);
1691                 len = (dev->fw.pcm->size - hdr_len) / sizeof(__be32);
1692                 b43legacy_shm_control_word(dev, B43legacy_SHM_HW, 0x01EA);
1693                 b43legacy_write32(dev, B43legacy_MMIO_SHM_DATA, 0x00004000);
1694                 /* No need for autoinc bit in SHM_HW */
1695                 b43legacy_shm_control_word(dev, B43legacy_SHM_HW, 0x01EB);
1696                 for (i = 0; i < len; i++) {
1697                         b43legacy_write32(dev, B43legacy_MMIO_SHM_DATA,
1698                                           be32_to_cpu(data[i]));
1699                         udelay(10);
1700                 }
1701         }
1702
1703         b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON,
1704                           B43legacy_IRQ_ALL);
1705
1706         /* Start the microcode PSM */
1707         macctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
1708         macctl &= ~B43legacy_MACCTL_PSM_JMP0;
1709         macctl |= B43legacy_MACCTL_PSM_RUN;
1710         b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl);
1711
1712         /* Wait for the microcode to load and respond */
1713         i = 0;
1714         while (1) {
1715                 tmp = b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
1716                 if (tmp == B43legacy_IRQ_MAC_SUSPENDED)
1717                         break;
1718                 i++;
1719                 if (i >= B43legacy_IRQWAIT_MAX_RETRIES) {
1720                         b43legacyerr(dev->wl, "Microcode not responding\n");
1721                         b43legacy_print_fw_helptext(dev->wl);
1722                         err = -ENODEV;
1723                         goto error;
1724                 }
1725                 msleep_interruptible(50);
1726                 if (signal_pending(current)) {
1727                         err = -EINTR;
1728                         goto error;
1729                 }
1730         }
1731         /* dummy read follows */
1732         b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
1733
1734         /* Get and check the revisions. */
1735         fwrev = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
1736                                      B43legacy_SHM_SH_UCODEREV);
1737         fwpatch = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
1738                                        B43legacy_SHM_SH_UCODEPATCH);
1739         fwdate = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
1740                                       B43legacy_SHM_SH_UCODEDATE);
1741         fwtime = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
1742                                       B43legacy_SHM_SH_UCODETIME);
1743
1744         if (fwrev > 0x128) {
1745                 b43legacyerr(dev->wl, "YOU ARE TRYING TO LOAD V4 FIRMWARE."
1746                              " Only firmware from binary drivers version 3.x"
1747                              " is supported. You must change your firmware"
1748                              " files.\n");
1749                 b43legacy_print_fw_helptext(dev->wl);
1750                 err = -EOPNOTSUPP;
1751                 goto error;
1752         }
1753         b43legacyinfo(dev->wl, "Loading firmware version 0x%X, patch level %u "
1754                       "(20%.2i-%.2i-%.2i %.2i:%.2i:%.2i)\n", fwrev, fwpatch,
1755                       (fwdate >> 12) & 0xF, (fwdate >> 8) & 0xF, fwdate & 0xFF,
1756                       (fwtime >> 11) & 0x1F, (fwtime >> 5) & 0x3F,
1757                       fwtime & 0x1F);
1758
1759         dev->fw.rev = fwrev;
1760         dev->fw.patch = fwpatch;
1761
1762         snprintf(wiphy->fw_version, sizeof(wiphy->fw_version), "%u.%u",
1763                         dev->fw.rev, dev->fw.patch);
1764         wiphy->hw_version = dev->dev->id.coreid;
1765
1766         return 0;
1767
1768 error:
1769         macctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
1770         macctl &= ~B43legacy_MACCTL_PSM_RUN;
1771         macctl |= B43legacy_MACCTL_PSM_JMP0;
1772         b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl);
1773
1774         return err;
1775 }
1776
1777 static int b43legacy_write_initvals(struct b43legacy_wldev *dev,
1778                                     const struct b43legacy_iv *ivals,
1779                                     size_t count,
1780                                     size_t array_size)
1781 {
1782         const struct b43legacy_iv *iv;
1783         u16 offset;
1784         size_t i;
1785         bool bit32;
1786
1787         BUILD_BUG_ON(sizeof(struct b43legacy_iv) != 6);
1788         iv = ivals;
1789         for (i = 0; i < count; i++) {
1790                 if (array_size < sizeof(iv->offset_size))
1791                         goto err_format;
1792                 array_size -= sizeof(iv->offset_size);
1793                 offset = be16_to_cpu(iv->offset_size);
1794                 bit32 = !!(offset & B43legacy_IV_32BIT);
1795                 offset &= B43legacy_IV_OFFSET_MASK;
1796                 if (offset >= 0x1000)
1797                         goto err_format;
1798                 if (bit32) {
1799                         u32 value;
1800
1801                         if (array_size < sizeof(iv->data.d32))
1802                                 goto err_format;
1803                         array_size -= sizeof(iv->data.d32);
1804
1805                         value = get_unaligned_be32(&iv->data.d32);
1806                         b43legacy_write32(dev, offset, value);
1807
1808                         iv = (const struct b43legacy_iv *)((const uint8_t *)iv +
1809                                                         sizeof(__be16) +
1810                                                         sizeof(__be32));
1811                 } else {
1812                         u16 value;
1813
1814                         if (array_size < sizeof(iv->data.d16))
1815                                 goto err_format;
1816                         array_size -= sizeof(iv->data.d16);
1817
1818                         value = be16_to_cpu(iv->data.d16);
1819                         b43legacy_write16(dev, offset, value);
1820
1821                         iv = (const struct b43legacy_iv *)((const uint8_t *)iv +
1822                                                         sizeof(__be16) +
1823                                                         sizeof(__be16));
1824                 }
1825         }
1826         if (array_size)
1827                 goto err_format;
1828
1829         return 0;
1830
1831 err_format:
1832         b43legacyerr(dev->wl, "Initial Values Firmware file-format error.\n");
1833         b43legacy_print_fw_helptext(dev->wl);
1834
1835         return -EPROTO;
1836 }
1837
1838 static int b43legacy_upload_initvals(struct b43legacy_wldev *dev)
1839 {
1840         const size_t hdr_len = sizeof(struct b43legacy_fw_header);
1841         const struct b43legacy_fw_header *hdr;
1842         struct b43legacy_firmware *fw = &dev->fw;
1843         const struct b43legacy_iv *ivals;
1844         size_t count;
1845         int err;
1846
1847         hdr = (const struct b43legacy_fw_header *)(fw->initvals->data);
1848         ivals = (const struct b43legacy_iv *)(fw->initvals->data + hdr_len);
1849         count = be32_to_cpu(hdr->size);
1850         err = b43legacy_write_initvals(dev, ivals, count,
1851                                  fw->initvals->size - hdr_len);
1852         if (err)
1853                 goto out;
1854         if (fw->initvals_band) {
1855                 hdr = (const struct b43legacy_fw_header *)
1856                       (fw->initvals_band->data);
1857                 ivals = (const struct b43legacy_iv *)(fw->initvals_band->data
1858                         + hdr_len);
1859                 count = be32_to_cpu(hdr->size);
1860                 err = b43legacy_write_initvals(dev, ivals, count,
1861                                          fw->initvals_band->size - hdr_len);
1862                 if (err)
1863                         goto out;
1864         }
1865 out:
1866
1867         return err;
1868 }
1869
1870 /* Initialize the GPIOs
1871  * https://bcm-specs.sipsolutions.net/GPIO
1872  */
1873 static int b43legacy_gpio_init(struct b43legacy_wldev *dev)
1874 {
1875         struct ssb_bus *bus = dev->dev->bus;
1876         struct ssb_device *gpiodev, *pcidev = NULL;
1877         u32 mask;
1878         u32 set;
1879
1880         b43legacy_write32(dev, B43legacy_MMIO_MACCTL,
1881                           b43legacy_read32(dev,
1882                           B43legacy_MMIO_MACCTL)
1883                           & 0xFFFF3FFF);
1884
1885         b43legacy_write16(dev, B43legacy_MMIO_GPIO_MASK,
1886                           b43legacy_read16(dev,
1887                           B43legacy_MMIO_GPIO_MASK)
1888                           | 0x000F);
1889
1890         mask = 0x0000001F;
1891         set = 0x0000000F;
1892         if (dev->dev->bus->chip_id == 0x4301) {
1893                 mask |= 0x0060;
1894                 set |= 0x0060;
1895         }
1896         if (dev->dev->bus->sprom.boardflags_lo & B43legacy_BFL_PACTRL) {
1897                 b43legacy_write16(dev, B43legacy_MMIO_GPIO_MASK,
1898                                   b43legacy_read16(dev,
1899                                   B43legacy_MMIO_GPIO_MASK)
1900                                   | 0x0200);
1901                 mask |= 0x0200;
1902                 set |= 0x0200;
1903         }
1904         if (dev->dev->id.revision >= 2)
1905                 mask  |= 0x0010; /* FIXME: This is redundant. */
1906
1907 #ifdef CONFIG_SSB_DRIVER_PCICORE
1908         pcidev = bus->pcicore.dev;
1909 #endif
1910         gpiodev = bus->chipco.dev ? : pcidev;
1911         if (!gpiodev)
1912                 return 0;
1913         ssb_write32(gpiodev, B43legacy_GPIO_CONTROL,
1914                     (ssb_read32(gpiodev, B43legacy_GPIO_CONTROL)
1915                      & ~mask) | set);
1916
1917         return 0;
1918 }
1919
1920 /* Turn off all GPIO stuff. Call this on module unload, for example. */
1921 static void b43legacy_gpio_cleanup(struct b43legacy_wldev *dev)
1922 {
1923         struct ssb_bus *bus = dev->dev->bus;
1924         struct ssb_device *gpiodev, *pcidev = NULL;
1925
1926 #ifdef CONFIG_SSB_DRIVER_PCICORE
1927         pcidev = bus->pcicore.dev;
1928 #endif
1929         gpiodev = bus->chipco.dev ? : pcidev;
1930         if (!gpiodev)
1931                 return;
1932         ssb_write32(gpiodev, B43legacy_GPIO_CONTROL, 0);
1933 }
1934
1935 /* http://bcm-specs.sipsolutions.net/EnableMac */
1936 void b43legacy_mac_enable(struct b43legacy_wldev *dev)
1937 {
1938         dev->mac_suspended--;
1939         B43legacy_WARN_ON(dev->mac_suspended < 0);
1940         B43legacy_WARN_ON(irqs_disabled());
1941         if (dev->mac_suspended == 0) {
1942                 b43legacy_write32(dev, B43legacy_MMIO_MACCTL,
1943                                   b43legacy_read32(dev,
1944                                   B43legacy_MMIO_MACCTL)
1945                                   | B43legacy_MACCTL_ENABLED);
1946                 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON,
1947                                   B43legacy_IRQ_MAC_SUSPENDED);
1948                 /* the next two are dummy reads */
1949                 b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
1950                 b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
1951                 b43legacy_power_saving_ctl_bits(dev, -1, -1);
1952
1953                 /* Re-enable IRQs. */
1954                 spin_lock_irq(&dev->wl->irq_lock);
1955                 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK,
1956                                   dev->irq_mask);
1957                 spin_unlock_irq(&dev->wl->irq_lock);
1958         }
1959 }
1960
1961 /* https://bcm-specs.sipsolutions.net/SuspendMAC */
1962 void b43legacy_mac_suspend(struct b43legacy_wldev *dev)
1963 {
1964         int i;
1965         u32 tmp;
1966
1967         might_sleep();
1968         B43legacy_WARN_ON(irqs_disabled());
1969         B43legacy_WARN_ON(dev->mac_suspended < 0);
1970
1971         if (dev->mac_suspended == 0) {
1972                 /* Mask IRQs before suspending MAC. Otherwise
1973                  * the MAC stays busy and won't suspend. */
1974                 spin_lock_irq(&dev->wl->irq_lock);
1975                 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, 0);
1976                 spin_unlock_irq(&dev->wl->irq_lock);
1977                 b43legacy_synchronize_irq(dev);
1978
1979                 b43legacy_power_saving_ctl_bits(dev, -1, 1);
1980                 b43legacy_write32(dev, B43legacy_MMIO_MACCTL,
1981                                   b43legacy_read32(dev,
1982                                   B43legacy_MMIO_MACCTL)
1983                                   & ~B43legacy_MACCTL_ENABLED);
1984                 b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
1985                 for (i = 40; i; i--) {
1986                         tmp = b43legacy_read32(dev,
1987                                                B43legacy_MMIO_GEN_IRQ_REASON);
1988                         if (tmp & B43legacy_IRQ_MAC_SUSPENDED)
1989                                 goto out;
1990                         msleep(1);
1991                 }
1992                 b43legacyerr(dev->wl, "MAC suspend failed\n");
1993         }
1994 out:
1995         dev->mac_suspended++;
1996 }
1997
1998 static void b43legacy_adjust_opmode(struct b43legacy_wldev *dev)
1999 {
2000         struct b43legacy_wl *wl = dev->wl;
2001         u32 ctl;
2002         u16 cfp_pretbtt;
2003
2004         ctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
2005         /* Reset status to STA infrastructure mode. */
2006         ctl &= ~B43legacy_MACCTL_AP;
2007         ctl &= ~B43legacy_MACCTL_KEEP_CTL;
2008         ctl &= ~B43legacy_MACCTL_KEEP_BADPLCP;
2009         ctl &= ~B43legacy_MACCTL_KEEP_BAD;
2010         ctl &= ~B43legacy_MACCTL_PROMISC;
2011         ctl &= ~B43legacy_MACCTL_BEACPROMISC;
2012         ctl |= B43legacy_MACCTL_INFRA;
2013
2014         if (b43legacy_is_mode(wl, NL80211_IFTYPE_AP))
2015                 ctl |= B43legacy_MACCTL_AP;
2016         else if (b43legacy_is_mode(wl, NL80211_IFTYPE_ADHOC))
2017                 ctl &= ~B43legacy_MACCTL_INFRA;
2018
2019         if (wl->filter_flags & FIF_CONTROL)
2020                 ctl |= B43legacy_MACCTL_KEEP_CTL;
2021         if (wl->filter_flags & FIF_FCSFAIL)
2022                 ctl |= B43legacy_MACCTL_KEEP_BAD;
2023         if (wl->filter_flags & FIF_PLCPFAIL)
2024                 ctl |= B43legacy_MACCTL_KEEP_BADPLCP;
2025         if (wl->filter_flags & FIF_BCN_PRBRESP_PROMISC)
2026                 ctl |= B43legacy_MACCTL_BEACPROMISC;
2027
2028         /* Workaround: On old hardware the HW-MAC-address-filter
2029          * doesn't work properly, so always run promisc in filter
2030          * it in software. */
2031         if (dev->dev->id.revision <= 4)
2032                 ctl |= B43legacy_MACCTL_PROMISC;
2033
2034         b43legacy_write32(dev, B43legacy_MMIO_MACCTL, ctl);
2035
2036         cfp_pretbtt = 2;
2037         if ((ctl & B43legacy_MACCTL_INFRA) &&
2038             !(ctl & B43legacy_MACCTL_AP)) {
2039                 if (dev->dev->bus->chip_id == 0x4306 &&
2040                     dev->dev->bus->chip_rev == 3)
2041                         cfp_pretbtt = 100;
2042                 else
2043                         cfp_pretbtt = 50;
2044         }
2045         b43legacy_write16(dev, 0x612, cfp_pretbtt);
2046 }
2047
2048 static void b43legacy_rate_memory_write(struct b43legacy_wldev *dev,
2049                                         u16 rate,
2050                                         int is_ofdm)
2051 {
2052         u16 offset;
2053
2054         if (is_ofdm) {
2055                 offset = 0x480;
2056                 offset += (b43legacy_plcp_get_ratecode_ofdm(rate) & 0x000F) * 2;
2057         } else {
2058                 offset = 0x4C0;
2059                 offset += (b43legacy_plcp_get_ratecode_cck(rate) & 0x000F) * 2;
2060         }
2061         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, offset + 0x20,
2062                               b43legacy_shm_read16(dev,
2063                               B43legacy_SHM_SHARED, offset));
2064 }
2065
2066 static void b43legacy_rate_memory_init(struct b43legacy_wldev *dev)
2067 {
2068         switch (dev->phy.type) {
2069         case B43legacy_PHYTYPE_G:
2070                 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_6MB, 1);
2071                 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_12MB, 1);
2072                 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_18MB, 1);
2073                 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_24MB, 1);
2074                 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_36MB, 1);
2075                 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_48MB, 1);
2076                 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_54MB, 1);
2077                 fallthrough;
2078         case B43legacy_PHYTYPE_B:
2079                 b43legacy_rate_memory_write(dev, B43legacy_CCK_RATE_1MB, 0);
2080                 b43legacy_rate_memory_write(dev, B43legacy_CCK_RATE_2MB, 0);
2081                 b43legacy_rate_memory_write(dev, B43legacy_CCK_RATE_5MB, 0);
2082                 b43legacy_rate_memory_write(dev, B43legacy_CCK_RATE_11MB, 0);
2083                 break;
2084         default:
2085                 B43legacy_BUG_ON(1);
2086         }
2087 }
2088
2089 /* Set the TX-Antenna for management frames sent by firmware. */
2090 static void b43legacy_mgmtframe_txantenna(struct b43legacy_wldev *dev,
2091                                           int antenna)
2092 {
2093         u16 ant = 0;
2094         u16 tmp;
2095
2096         switch (antenna) {
2097         case B43legacy_ANTENNA0:
2098                 ant |= B43legacy_TX4_PHY_ANT0;
2099                 break;
2100         case B43legacy_ANTENNA1:
2101                 ant |= B43legacy_TX4_PHY_ANT1;
2102                 break;
2103         case B43legacy_ANTENNA_AUTO:
2104                 ant |= B43legacy_TX4_PHY_ANTLAST;
2105                 break;
2106         default:
2107                 B43legacy_BUG_ON(1);
2108         }
2109
2110         /* FIXME We also need to set the other flags of the PHY control
2111          * field somewhere. */
2112
2113         /* For Beacons */
2114         tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
2115                                    B43legacy_SHM_SH_BEACPHYCTL);
2116         tmp = (tmp & ~B43legacy_TX4_PHY_ANT) | ant;
2117         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
2118                               B43legacy_SHM_SH_BEACPHYCTL, tmp);
2119         /* For ACK/CTS */
2120         tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
2121                                    B43legacy_SHM_SH_ACKCTSPHYCTL);
2122         tmp = (tmp & ~B43legacy_TX4_PHY_ANT) | ant;
2123         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
2124                               B43legacy_SHM_SH_ACKCTSPHYCTL, tmp);
2125         /* For Probe Resposes */
2126         tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
2127                                    B43legacy_SHM_SH_PRPHYCTL);
2128         tmp = (tmp & ~B43legacy_TX4_PHY_ANT) | ant;
2129         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
2130                               B43legacy_SHM_SH_PRPHYCTL, tmp);
2131 }
2132
2133 /* This is the opposite of b43legacy_chip_init() */
2134 static void b43legacy_chip_exit(struct b43legacy_wldev *dev)
2135 {
2136         b43legacy_radio_turn_off(dev, 1);
2137         b43legacy_gpio_cleanup(dev);
2138         /* firmware is released later */
2139 }
2140
2141 /* Initialize the chip
2142  * https://bcm-specs.sipsolutions.net/ChipInit
2143  */
2144 static int b43legacy_chip_init(struct b43legacy_wldev *dev)
2145 {
2146         struct b43legacy_phy *phy = &dev->phy;
2147         int err;
2148         int tmp;
2149         u32 value32, macctl;
2150         u16 value16;
2151
2152         /* Initialize the MAC control */
2153         macctl = B43legacy_MACCTL_IHR_ENABLED | B43legacy_MACCTL_SHM_ENABLED;
2154         if (dev->phy.gmode)
2155                 macctl |= B43legacy_MACCTL_GMODE;
2156         macctl |= B43legacy_MACCTL_INFRA;
2157         b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl);
2158
2159         err = b43legacy_upload_microcode(dev);
2160         if (err)
2161                 goto out; /* firmware is released later */
2162
2163         err = b43legacy_gpio_init(dev);
2164         if (err)
2165                 goto out; /* firmware is released later */
2166
2167         err = b43legacy_upload_initvals(dev);
2168         if (err)
2169                 goto err_gpio_clean;
2170         b43legacy_radio_turn_on(dev);
2171
2172         b43legacy_write16(dev, 0x03E6, 0x0000);
2173         err = b43legacy_phy_init(dev);
2174         if (err)
2175                 goto err_radio_off;
2176
2177         /* Select initial Interference Mitigation. */
2178         tmp = phy->interfmode;
2179         phy->interfmode = B43legacy_INTERFMODE_NONE;
2180         b43legacy_radio_set_interference_mitigation(dev, tmp);
2181
2182         b43legacy_phy_set_antenna_diversity(dev);
2183         b43legacy_mgmtframe_txantenna(dev, B43legacy_ANTENNA_DEFAULT);
2184
2185         if (phy->type == B43legacy_PHYTYPE_B) {
2186                 value16 = b43legacy_read16(dev, 0x005E);
2187                 value16 |= 0x0004;
2188                 b43legacy_write16(dev, 0x005E, value16);
2189         }
2190         b43legacy_write32(dev, 0x0100, 0x01000000);
2191         if (dev->dev->id.revision < 5)
2192                 b43legacy_write32(dev, 0x010C, 0x01000000);
2193
2194         value32 = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
2195         value32 &= ~B43legacy_MACCTL_INFRA;
2196         b43legacy_write32(dev, B43legacy_MMIO_MACCTL, value32);
2197         value32 = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
2198         value32 |= B43legacy_MACCTL_INFRA;
2199         b43legacy_write32(dev, B43legacy_MMIO_MACCTL, value32);
2200
2201         if (b43legacy_using_pio(dev)) {
2202                 b43legacy_write32(dev, 0x0210, 0x00000100);
2203                 b43legacy_write32(dev, 0x0230, 0x00000100);
2204                 b43legacy_write32(dev, 0x0250, 0x00000100);
2205                 b43legacy_write32(dev, 0x0270, 0x00000100);
2206                 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x0034,
2207                                       0x0000);
2208         }
2209
2210         /* Probe Response Timeout value */
2211         /* FIXME: Default to 0, has to be set by ioctl probably... :-/ */
2212         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x0074, 0x0000);
2213
2214         /* Initially set the wireless operation mode. */
2215         b43legacy_adjust_opmode(dev);
2216
2217         if (dev->dev->id.revision < 3) {
2218                 b43legacy_write16(dev, 0x060E, 0x0000);
2219                 b43legacy_write16(dev, 0x0610, 0x8000);
2220                 b43legacy_write16(dev, 0x0604, 0x0000);
2221                 b43legacy_write16(dev, 0x0606, 0x0200);
2222         } else {
2223                 b43legacy_write32(dev, 0x0188, 0x80000000);
2224                 b43legacy_write32(dev, 0x018C, 0x02000000);
2225         }
2226         b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON, 0x00004000);
2227         b43legacy_write32(dev, B43legacy_MMIO_DMA0_IRQ_MASK, 0x0001DC00);
2228         b43legacy_write32(dev, B43legacy_MMIO_DMA1_IRQ_MASK, 0x0000DC00);
2229         b43legacy_write32(dev, B43legacy_MMIO_DMA2_IRQ_MASK, 0x0000DC00);
2230         b43legacy_write32(dev, B43legacy_MMIO_DMA3_IRQ_MASK, 0x0001DC00);
2231         b43legacy_write32(dev, B43legacy_MMIO_DMA4_IRQ_MASK, 0x0000DC00);
2232         b43legacy_write32(dev, B43legacy_MMIO_DMA5_IRQ_MASK, 0x0000DC00);
2233
2234         value32 = ssb_read32(dev->dev, SSB_TMSLOW);
2235         value32 |= B43legacy_TMSLOW_MACPHYCLKEN;
2236         ssb_write32(dev->dev, SSB_TMSLOW, value32);
2237
2238         b43legacy_write16(dev, B43legacy_MMIO_POWERUP_DELAY,
2239                           dev->dev->bus->chipco.fast_pwrup_delay);
2240
2241         /* PHY TX errors counter. */
2242         atomic_set(&phy->txerr_cnt, B43legacy_PHY_TX_BADNESS_LIMIT);
2243
2244         B43legacy_WARN_ON(err != 0);
2245         b43legacydbg(dev->wl, "Chip initialized\n");
2246 out:
2247         return err;
2248
2249 err_radio_off:
2250         b43legacy_radio_turn_off(dev, 1);
2251 err_gpio_clean:
2252         b43legacy_gpio_cleanup(dev);
2253         goto out;
2254 }
2255
2256 static void b43legacy_periodic_every120sec(struct b43legacy_wldev *dev)
2257 {
2258         struct b43legacy_phy *phy = &dev->phy;
2259
2260         if (phy->type != B43legacy_PHYTYPE_G || phy->rev < 2)
2261                 return;
2262
2263         b43legacy_mac_suspend(dev);
2264         b43legacy_phy_lo_g_measure(dev);
2265         b43legacy_mac_enable(dev);
2266 }
2267
2268 static void b43legacy_periodic_every60sec(struct b43legacy_wldev *dev)
2269 {
2270         b43legacy_phy_lo_mark_all_unused(dev);
2271         if (dev->dev->bus->sprom.boardflags_lo & B43legacy_BFL_RSSI) {
2272                 b43legacy_mac_suspend(dev);
2273                 b43legacy_calc_nrssi_slope(dev);
2274                 b43legacy_mac_enable(dev);
2275         }
2276 }
2277
2278 static void b43legacy_periodic_every30sec(struct b43legacy_wldev *dev)
2279 {
2280         /* Update device statistics. */
2281         b43legacy_calculate_link_quality(dev);
2282 }
2283
2284 static void b43legacy_periodic_every15sec(struct b43legacy_wldev *dev)
2285 {
2286         b43legacy_phy_xmitpower(dev); /* FIXME: unless scanning? */
2287
2288         atomic_set(&dev->phy.txerr_cnt, B43legacy_PHY_TX_BADNESS_LIMIT);
2289         wmb();
2290 }
2291
2292 static void do_periodic_work(struct b43legacy_wldev *dev)
2293 {
2294         unsigned int state;
2295
2296         state = dev->periodic_state;
2297         if (state % 8 == 0)
2298                 b43legacy_periodic_every120sec(dev);
2299         if (state % 4 == 0)
2300                 b43legacy_periodic_every60sec(dev);
2301         if (state % 2 == 0)
2302                 b43legacy_periodic_every30sec(dev);
2303         b43legacy_periodic_every15sec(dev);
2304 }
2305
2306 /* Periodic work locking policy:
2307  *      The whole periodic work handler is protected by
2308  *      wl->mutex. If another lock is needed somewhere in the
2309  *      pwork callchain, it's acquired in-place, where it's needed.
2310  */
2311 static void b43legacy_periodic_work_handler(struct work_struct *work)
2312 {
2313         struct b43legacy_wldev *dev = container_of(work, struct b43legacy_wldev,
2314                                              periodic_work.work);
2315         struct b43legacy_wl *wl = dev->wl;
2316         unsigned long delay;
2317
2318         mutex_lock(&wl->mutex);
2319
2320         if (unlikely(b43legacy_status(dev) != B43legacy_STAT_STARTED))
2321                 goto out;
2322         if (b43legacy_debug(dev, B43legacy_DBG_PWORK_STOP))
2323                 goto out_requeue;
2324
2325         do_periodic_work(dev);
2326
2327         dev->periodic_state++;
2328 out_requeue:
2329         if (b43legacy_debug(dev, B43legacy_DBG_PWORK_FAST))
2330                 delay = msecs_to_jiffies(50);
2331         else
2332                 delay = round_jiffies_relative(HZ * 15);
2333         ieee80211_queue_delayed_work(wl->hw, &dev->periodic_work, delay);
2334 out:
2335         mutex_unlock(&wl->mutex);
2336 }
2337
2338 static void b43legacy_periodic_tasks_setup(struct b43legacy_wldev *dev)
2339 {
2340         struct delayed_work *work = &dev->periodic_work;
2341
2342         dev->periodic_state = 0;
2343         INIT_DELAYED_WORK(work, b43legacy_periodic_work_handler);
2344         ieee80211_queue_delayed_work(dev->wl->hw, work, 0);
2345 }
2346
2347 /* Validate access to the chip (SHM) */
2348 static int b43legacy_validate_chipaccess(struct b43legacy_wldev *dev)
2349 {
2350         u32 value;
2351         u32 shm_backup;
2352
2353         shm_backup = b43legacy_shm_read32(dev, B43legacy_SHM_SHARED, 0);
2354         b43legacy_shm_write32(dev, B43legacy_SHM_SHARED, 0, 0xAA5555AA);
2355         if (b43legacy_shm_read32(dev, B43legacy_SHM_SHARED, 0) !=
2356                                  0xAA5555AA)
2357                 goto error;
2358         b43legacy_shm_write32(dev, B43legacy_SHM_SHARED, 0, 0x55AAAA55);
2359         if (b43legacy_shm_read32(dev, B43legacy_SHM_SHARED, 0) !=
2360                                  0x55AAAA55)
2361                 goto error;
2362         b43legacy_shm_write32(dev, B43legacy_SHM_SHARED, 0, shm_backup);
2363
2364         value = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
2365         if ((value | B43legacy_MACCTL_GMODE) !=
2366             (B43legacy_MACCTL_GMODE | B43legacy_MACCTL_IHR_ENABLED))
2367                 goto error;
2368
2369         value = b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
2370         if (value)
2371                 goto error;
2372
2373         return 0;
2374 error:
2375         b43legacyerr(dev->wl, "Failed to validate the chipaccess\n");
2376         return -ENODEV;
2377 }
2378
2379 static void b43legacy_security_init(struct b43legacy_wldev *dev)
2380 {
2381         dev->max_nr_keys = (dev->dev->id.revision >= 5) ? 58 : 20;
2382         B43legacy_WARN_ON(dev->max_nr_keys > ARRAY_SIZE(dev->key));
2383         dev->ktp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
2384                                         0x0056);
2385         /* KTP is a word address, but we address SHM bytewise.
2386          * So multiply by two.
2387          */
2388         dev->ktp *= 2;
2389         if (dev->dev->id.revision >= 5)
2390                 /* Number of RCMTA address slots */
2391                 b43legacy_write16(dev, B43legacy_MMIO_RCMTA_COUNT,
2392                                   dev->max_nr_keys - 8);
2393 }
2394
2395 #ifdef CONFIG_B43LEGACY_HWRNG
2396 static int b43legacy_rng_read(struct hwrng *rng, u32 *data)
2397 {
2398         struct b43legacy_wl *wl = (struct b43legacy_wl *)rng->priv;
2399         unsigned long flags;
2400
2401         /* Don't take wl->mutex here, as it could deadlock with
2402          * hwrng internal locking. It's not needed to take
2403          * wl->mutex here, anyway. */
2404
2405         spin_lock_irqsave(&wl->irq_lock, flags);
2406         *data = b43legacy_read16(wl->current_dev, B43legacy_MMIO_RNG);
2407         spin_unlock_irqrestore(&wl->irq_lock, flags);
2408
2409         return (sizeof(u16));
2410 }
2411 #endif
2412
2413 static void b43legacy_rng_exit(struct b43legacy_wl *wl)
2414 {
2415 #ifdef CONFIG_B43LEGACY_HWRNG
2416         if (wl->rng_initialized)
2417                 hwrng_unregister(&wl->rng);
2418 #endif
2419 }
2420
2421 static int b43legacy_rng_init(struct b43legacy_wl *wl)
2422 {
2423         int err = 0;
2424
2425 #ifdef CONFIG_B43LEGACY_HWRNG
2426         snprintf(wl->rng_name, ARRAY_SIZE(wl->rng_name),
2427                  "%s_%s", KBUILD_MODNAME, wiphy_name(wl->hw->wiphy));
2428         wl->rng.name = wl->rng_name;
2429         wl->rng.data_read = b43legacy_rng_read;
2430         wl->rng.priv = (unsigned long)wl;
2431         wl->rng_initialized = 1;
2432         err = hwrng_register(&wl->rng);
2433         if (err) {
2434                 wl->rng_initialized = 0;
2435                 b43legacyerr(wl, "Failed to register the random "
2436                        "number generator (%d)\n", err);
2437         }
2438
2439 #endif
2440         return err;
2441 }
2442
2443 static void b43legacy_tx_work(struct work_struct *work)
2444 {
2445         struct b43legacy_wl *wl = container_of(work, struct b43legacy_wl,
2446                                   tx_work);
2447         struct b43legacy_wldev *dev;
2448         struct sk_buff *skb;
2449         int queue_num;
2450         int err = 0;
2451
2452         mutex_lock(&wl->mutex);
2453         dev = wl->current_dev;
2454         if (unlikely(!dev || b43legacy_status(dev) < B43legacy_STAT_STARTED)) {
2455                 mutex_unlock(&wl->mutex);
2456                 return;
2457         }
2458
2459         for (queue_num = 0; queue_num < B43legacy_QOS_QUEUE_NUM; queue_num++) {
2460                 while (skb_queue_len(&wl->tx_queue[queue_num])) {
2461                         skb = skb_dequeue(&wl->tx_queue[queue_num]);
2462                         if (b43legacy_using_pio(dev))
2463                                 err = b43legacy_pio_tx(dev, skb);
2464                         else
2465                                 err = b43legacy_dma_tx(dev, skb);
2466                         if (err == -ENOSPC) {
2467                                 wl->tx_queue_stopped[queue_num] = 1;
2468                                 ieee80211_stop_queue(wl->hw, queue_num);
2469                                 skb_queue_head(&wl->tx_queue[queue_num], skb);
2470                                 break;
2471                         }
2472                         if (unlikely(err))
2473                                 dev_kfree_skb(skb); /* Drop it */
2474                         err = 0;
2475                 }
2476
2477                 if (!err)
2478                         wl->tx_queue_stopped[queue_num] = 0;
2479         }
2480
2481         mutex_unlock(&wl->mutex);
2482 }
2483
2484 static void b43legacy_op_tx(struct ieee80211_hw *hw,
2485                             struct ieee80211_tx_control *control,
2486                             struct sk_buff *skb)
2487 {
2488         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2489
2490         if (unlikely(skb->len < 2 + 2 + 6)) {
2491                 /* Too short, this can't be a valid frame. */
2492                 dev_kfree_skb_any(skb);
2493                 return;
2494         }
2495         B43legacy_WARN_ON(skb_shinfo(skb)->nr_frags);
2496
2497         skb_queue_tail(&wl->tx_queue[skb->queue_mapping], skb);
2498         if (!wl->tx_queue_stopped[skb->queue_mapping])
2499                 ieee80211_queue_work(wl->hw, &wl->tx_work);
2500         else
2501                 ieee80211_stop_queue(wl->hw, skb->queue_mapping);
2502 }
2503
2504 static int b43legacy_op_conf_tx(struct ieee80211_hw *hw,
2505                                 struct ieee80211_vif *vif, u16 queue,
2506                                 const struct ieee80211_tx_queue_params *params)
2507 {
2508         return 0;
2509 }
2510
2511 static int b43legacy_op_get_stats(struct ieee80211_hw *hw,
2512                                   struct ieee80211_low_level_stats *stats)
2513 {
2514         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2515         unsigned long flags;
2516
2517         spin_lock_irqsave(&wl->irq_lock, flags);
2518         memcpy(stats, &wl->ieee_stats, sizeof(*stats));
2519         spin_unlock_irqrestore(&wl->irq_lock, flags);
2520
2521         return 0;
2522 }
2523
2524 static const char *phymode_to_string(unsigned int phymode)
2525 {
2526         switch (phymode) {
2527         case B43legacy_PHYMODE_B:
2528                 return "B";
2529         case B43legacy_PHYMODE_G:
2530                 return "G";
2531         default:
2532                 B43legacy_BUG_ON(1);
2533         }
2534         return "";
2535 }
2536
2537 static int find_wldev_for_phymode(struct b43legacy_wl *wl,
2538                                   unsigned int phymode,
2539                                   struct b43legacy_wldev **dev,
2540                                   bool *gmode)
2541 {
2542         struct b43legacy_wldev *d;
2543
2544         list_for_each_entry(d, &wl->devlist, list) {
2545                 if (d->phy.possible_phymodes & phymode) {
2546                         /* Ok, this device supports the PHY-mode.
2547                          * Set the gmode bit. */
2548                         *gmode = true;
2549                         *dev = d;
2550
2551                         return 0;
2552                 }
2553         }
2554
2555         return -ESRCH;
2556 }
2557
2558 static void b43legacy_put_phy_into_reset(struct b43legacy_wldev *dev)
2559 {
2560         struct ssb_device *sdev = dev->dev;
2561         u32 tmslow;
2562
2563         tmslow = ssb_read32(sdev, SSB_TMSLOW);
2564         tmslow &= ~B43legacy_TMSLOW_GMODE;
2565         tmslow |= B43legacy_TMSLOW_PHYRESET;
2566         tmslow |= SSB_TMSLOW_FGC;
2567         ssb_write32(sdev, SSB_TMSLOW, tmslow);
2568         msleep(1);
2569
2570         tmslow = ssb_read32(sdev, SSB_TMSLOW);
2571         tmslow &= ~SSB_TMSLOW_FGC;
2572         tmslow |= B43legacy_TMSLOW_PHYRESET;
2573         ssb_write32(sdev, SSB_TMSLOW, tmslow);
2574         msleep(1);
2575 }
2576
2577 /* Expects wl->mutex locked */
2578 static int b43legacy_switch_phymode(struct b43legacy_wl *wl,
2579                                       unsigned int new_mode)
2580 {
2581         struct b43legacy_wldev *up_dev;
2582         struct b43legacy_wldev *down_dev;
2583         int err;
2584         bool gmode = false;
2585         int prev_status;
2586
2587         err = find_wldev_for_phymode(wl, new_mode, &up_dev, &gmode);
2588         if (err) {
2589                 b43legacyerr(wl, "Could not find a device for %s-PHY mode\n",
2590                        phymode_to_string(new_mode));
2591                 return err;
2592         }
2593         if ((up_dev == wl->current_dev) &&
2594             (!!wl->current_dev->phy.gmode == !!gmode))
2595                 /* This device is already running. */
2596                 return 0;
2597         b43legacydbg(wl, "Reconfiguring PHYmode to %s-PHY\n",
2598                phymode_to_string(new_mode));
2599         down_dev = wl->current_dev;
2600
2601         prev_status = b43legacy_status(down_dev);
2602         /* Shutdown the currently running core. */
2603         if (prev_status >= B43legacy_STAT_STARTED)
2604                 b43legacy_wireless_core_stop(down_dev);
2605         if (prev_status >= B43legacy_STAT_INITIALIZED)
2606                 b43legacy_wireless_core_exit(down_dev);
2607
2608         if (down_dev != up_dev)
2609                 /* We switch to a different core, so we put PHY into
2610                  * RESET on the old core. */
2611                 b43legacy_put_phy_into_reset(down_dev);
2612
2613         /* Now start the new core. */
2614         up_dev->phy.gmode = gmode;
2615         if (prev_status >= B43legacy_STAT_INITIALIZED) {
2616                 err = b43legacy_wireless_core_init(up_dev);
2617                 if (err) {
2618                         b43legacyerr(wl, "Fatal: Could not initialize device"
2619                                      " for newly selected %s-PHY mode\n",
2620                                      phymode_to_string(new_mode));
2621                         goto init_failure;
2622                 }
2623         }
2624         if (prev_status >= B43legacy_STAT_STARTED) {
2625                 err = b43legacy_wireless_core_start(up_dev);
2626                 if (err) {
2627                         b43legacyerr(wl, "Fatal: Could not start device for "
2628                                "newly selected %s-PHY mode\n",
2629                                phymode_to_string(new_mode));
2630                         b43legacy_wireless_core_exit(up_dev);
2631                         goto init_failure;
2632                 }
2633         }
2634         B43legacy_WARN_ON(b43legacy_status(up_dev) != prev_status);
2635
2636         b43legacy_shm_write32(up_dev, B43legacy_SHM_SHARED, 0x003E, 0);
2637
2638         wl->current_dev = up_dev;
2639
2640         return 0;
2641 init_failure:
2642         /* Whoops, failed to init the new core. No core is operating now. */
2643         wl->current_dev = NULL;
2644         return err;
2645 }
2646
2647 /* Write the short and long frame retry limit values. */
2648 static void b43legacy_set_retry_limits(struct b43legacy_wldev *dev,
2649                                        unsigned int short_retry,
2650                                        unsigned int long_retry)
2651 {
2652         /* The retry limit is a 4-bit counter. Enforce this to avoid overflowing
2653          * the chip-internal counter. */
2654         short_retry = min(short_retry, (unsigned int)0xF);
2655         long_retry = min(long_retry, (unsigned int)0xF);
2656
2657         b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS, 0x0006, short_retry);
2658         b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS, 0x0007, long_retry);
2659 }
2660
2661 static int b43legacy_op_dev_config(struct ieee80211_hw *hw,
2662                                    u32 changed)
2663 {
2664         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2665         struct b43legacy_wldev *dev;
2666         struct b43legacy_phy *phy;
2667         struct ieee80211_conf *conf = &hw->conf;
2668         unsigned long flags;
2669         unsigned int new_phymode = 0xFFFF;
2670         int antenna_tx;
2671         int err = 0;
2672
2673         antenna_tx = B43legacy_ANTENNA_DEFAULT;
2674
2675         mutex_lock(&wl->mutex);
2676         dev = wl->current_dev;
2677         phy = &dev->phy;
2678
2679         if (changed & IEEE80211_CONF_CHANGE_RETRY_LIMITS)
2680                 b43legacy_set_retry_limits(dev,
2681                                            conf->short_frame_max_tx_count,
2682                                            conf->long_frame_max_tx_count);
2683         changed &= ~IEEE80211_CONF_CHANGE_RETRY_LIMITS;
2684         if (!changed)
2685                 goto out_unlock_mutex;
2686
2687         /* Switch the PHY mode (if necessary). */
2688         switch (conf->chandef.chan->band) {
2689         case NL80211_BAND_2GHZ:
2690                 if (phy->type == B43legacy_PHYTYPE_B)
2691                         new_phymode = B43legacy_PHYMODE_B;
2692                 else
2693                         new_phymode = B43legacy_PHYMODE_G;
2694                 break;
2695         default:
2696                 B43legacy_WARN_ON(1);
2697         }
2698         err = b43legacy_switch_phymode(wl, new_phymode);
2699         if (err)
2700                 goto out_unlock_mutex;
2701
2702         /* Disable IRQs while reconfiguring the device.
2703          * This makes it possible to drop the spinlock throughout
2704          * the reconfiguration process. */
2705         spin_lock_irqsave(&wl->irq_lock, flags);
2706         if (b43legacy_status(dev) < B43legacy_STAT_STARTED) {
2707                 spin_unlock_irqrestore(&wl->irq_lock, flags);
2708                 goto out_unlock_mutex;
2709         }
2710         b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, 0);
2711         spin_unlock_irqrestore(&wl->irq_lock, flags);
2712         b43legacy_synchronize_irq(dev);
2713
2714         /* Switch to the requested channel.
2715          * The firmware takes care of races with the TX handler. */
2716         if (conf->chandef.chan->hw_value != phy->channel)
2717                 b43legacy_radio_selectchannel(dev, conf->chandef.chan->hw_value,
2718                                               0);
2719
2720         dev->wl->radiotap_enabled = !!(conf->flags & IEEE80211_CONF_MONITOR);
2721
2722         /* Adjust the desired TX power level. */
2723         if (conf->power_level != 0) {
2724                 if (conf->power_level != phy->power_level) {
2725                         phy->power_level = conf->power_level;
2726                         b43legacy_phy_xmitpower(dev);
2727                 }
2728         }
2729
2730         /* Antennas for RX and management frame TX. */
2731         b43legacy_mgmtframe_txantenna(dev, antenna_tx);
2732
2733         if (wl->radio_enabled != phy->radio_on) {
2734                 if (wl->radio_enabled) {
2735                         b43legacy_radio_turn_on(dev);
2736                         b43legacyinfo(dev->wl, "Radio turned on by software\n");
2737                         if (!dev->radio_hw_enable)
2738                                 b43legacyinfo(dev->wl, "The hardware RF-kill"
2739                                               " button still turns the radio"
2740                                               " physically off. Press the"
2741                                               " button to turn it on.\n");
2742                 } else {
2743                         b43legacy_radio_turn_off(dev, 0);
2744                         b43legacyinfo(dev->wl, "Radio turned off by"
2745                                       " software\n");
2746                 }
2747         }
2748
2749         spin_lock_irqsave(&wl->irq_lock, flags);
2750         b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, dev->irq_mask);
2751         spin_unlock_irqrestore(&wl->irq_lock, flags);
2752 out_unlock_mutex:
2753         mutex_unlock(&wl->mutex);
2754
2755         return err;
2756 }
2757
2758 static void b43legacy_update_basic_rates(struct b43legacy_wldev *dev, u32 brates)
2759 {
2760         struct ieee80211_supported_band *sband =
2761                 dev->wl->hw->wiphy->bands[NL80211_BAND_2GHZ];
2762         const struct ieee80211_rate *rate;
2763         int i;
2764         u16 basic, direct, offset, basic_offset, rateptr;
2765
2766         for (i = 0; i < sband->n_bitrates; i++) {
2767                 rate = &sband->bitrates[i];
2768
2769                 if (b43legacy_is_cck_rate(rate->hw_value)) {
2770                         direct = B43legacy_SHM_SH_CCKDIRECT;
2771                         basic = B43legacy_SHM_SH_CCKBASIC;
2772                         offset = b43legacy_plcp_get_ratecode_cck(rate->hw_value);
2773                         offset &= 0xF;
2774                 } else {
2775                         direct = B43legacy_SHM_SH_OFDMDIRECT;
2776                         basic = B43legacy_SHM_SH_OFDMBASIC;
2777                         offset = b43legacy_plcp_get_ratecode_ofdm(rate->hw_value);
2778                         offset &= 0xF;
2779                 }
2780
2781                 rate = ieee80211_get_response_rate(sband, brates, rate->bitrate);
2782
2783                 if (b43legacy_is_cck_rate(rate->hw_value)) {
2784                         basic_offset = b43legacy_plcp_get_ratecode_cck(rate->hw_value);
2785                         basic_offset &= 0xF;
2786                 } else {
2787                         basic_offset = b43legacy_plcp_get_ratecode_ofdm(rate->hw_value);
2788                         basic_offset &= 0xF;
2789                 }
2790
2791                 /*
2792                  * Get the pointer that we need to point to
2793                  * from the direct map
2794                  */
2795                 rateptr = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
2796                                                direct + 2 * basic_offset);
2797                 /* and write it to the basic map */
2798                 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
2799                                       basic + 2 * offset, rateptr);
2800         }
2801 }
2802
2803 static void b43legacy_op_bss_info_changed(struct ieee80211_hw *hw,
2804                                     struct ieee80211_vif *vif,
2805                                     struct ieee80211_bss_conf *conf,
2806                                     u32 changed)
2807 {
2808         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2809         struct b43legacy_wldev *dev;
2810         unsigned long flags;
2811
2812         mutex_lock(&wl->mutex);
2813         B43legacy_WARN_ON(wl->vif != vif);
2814
2815         dev = wl->current_dev;
2816
2817         /* Disable IRQs while reconfiguring the device.
2818          * This makes it possible to drop the spinlock throughout
2819          * the reconfiguration process. */
2820         spin_lock_irqsave(&wl->irq_lock, flags);
2821         if (b43legacy_status(dev) < B43legacy_STAT_STARTED) {
2822                 spin_unlock_irqrestore(&wl->irq_lock, flags);
2823                 goto out_unlock_mutex;
2824         }
2825         b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, 0);
2826
2827         if (changed & BSS_CHANGED_BSSID) {
2828                 b43legacy_synchronize_irq(dev);
2829
2830                 if (conf->bssid)
2831                         memcpy(wl->bssid, conf->bssid, ETH_ALEN);
2832                 else
2833                         eth_zero_addr(wl->bssid);
2834         }
2835
2836         if (b43legacy_status(dev) >= B43legacy_STAT_INITIALIZED) {
2837                 if (changed & BSS_CHANGED_BEACON &&
2838                     (b43legacy_is_mode(wl, NL80211_IFTYPE_AP) ||
2839                      b43legacy_is_mode(wl, NL80211_IFTYPE_ADHOC)))
2840                         b43legacy_update_templates(wl);
2841
2842                 if (changed & BSS_CHANGED_BSSID)
2843                         b43legacy_write_mac_bssid_templates(dev);
2844         }
2845         spin_unlock_irqrestore(&wl->irq_lock, flags);
2846
2847         b43legacy_mac_suspend(dev);
2848
2849         if (changed & BSS_CHANGED_BEACON_INT &&
2850             (b43legacy_is_mode(wl, NL80211_IFTYPE_AP) ||
2851              b43legacy_is_mode(wl, NL80211_IFTYPE_ADHOC)))
2852                 b43legacy_set_beacon_int(dev, conf->beacon_int);
2853
2854         if (changed & BSS_CHANGED_BASIC_RATES)
2855                 b43legacy_update_basic_rates(dev, conf->basic_rates);
2856
2857         if (changed & BSS_CHANGED_ERP_SLOT) {
2858                 if (conf->use_short_slot)
2859                         b43legacy_short_slot_timing_enable(dev);
2860                 else
2861                         b43legacy_short_slot_timing_disable(dev);
2862         }
2863
2864         b43legacy_mac_enable(dev);
2865
2866         spin_lock_irqsave(&wl->irq_lock, flags);
2867         b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, dev->irq_mask);
2868         /* XXX: why? */
2869         spin_unlock_irqrestore(&wl->irq_lock, flags);
2870  out_unlock_mutex:
2871         mutex_unlock(&wl->mutex);
2872 }
2873
2874 static void b43legacy_op_configure_filter(struct ieee80211_hw *hw,
2875                                           unsigned int changed,
2876                                           unsigned int *fflags,u64 multicast)
2877 {
2878         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2879         struct b43legacy_wldev *dev = wl->current_dev;
2880         unsigned long flags;
2881
2882         if (!dev) {
2883                 *fflags = 0;
2884                 return;
2885         }
2886
2887         spin_lock_irqsave(&wl->irq_lock, flags);
2888         *fflags &= FIF_ALLMULTI |
2889                   FIF_FCSFAIL |
2890                   FIF_PLCPFAIL |
2891                   FIF_CONTROL |
2892                   FIF_OTHER_BSS |
2893                   FIF_BCN_PRBRESP_PROMISC;
2894
2895         changed &= FIF_ALLMULTI |
2896                    FIF_FCSFAIL |
2897                    FIF_PLCPFAIL |
2898                    FIF_CONTROL |
2899                    FIF_OTHER_BSS |
2900                    FIF_BCN_PRBRESP_PROMISC;
2901
2902         wl->filter_flags = *fflags;
2903
2904         if (changed && b43legacy_status(dev) >= B43legacy_STAT_INITIALIZED)
2905                 b43legacy_adjust_opmode(dev);
2906         spin_unlock_irqrestore(&wl->irq_lock, flags);
2907 }
2908
2909 /* Locking: wl->mutex */
2910 static void b43legacy_wireless_core_stop(struct b43legacy_wldev *dev)
2911 {
2912         struct b43legacy_wl *wl = dev->wl;
2913         unsigned long flags;
2914         int queue_num;
2915
2916         if (b43legacy_status(dev) < B43legacy_STAT_STARTED)
2917                 return;
2918
2919         /* Disable and sync interrupts. We must do this before than
2920          * setting the status to INITIALIZED, as the interrupt handler
2921          * won't care about IRQs then. */
2922         spin_lock_irqsave(&wl->irq_lock, flags);
2923         b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, 0);
2924         b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_MASK); /* flush */
2925         spin_unlock_irqrestore(&wl->irq_lock, flags);
2926         b43legacy_synchronize_irq(dev);
2927
2928         b43legacy_set_status(dev, B43legacy_STAT_INITIALIZED);
2929
2930         mutex_unlock(&wl->mutex);
2931         /* Must unlock as it would otherwise deadlock. No races here.
2932          * Cancel the possibly running self-rearming periodic work. */
2933         cancel_delayed_work_sync(&dev->periodic_work);
2934         cancel_work_sync(&wl->tx_work);
2935         mutex_lock(&wl->mutex);
2936
2937         /* Drain all TX queues. */
2938         for (queue_num = 0; queue_num < B43legacy_QOS_QUEUE_NUM; queue_num++) {
2939                 while (skb_queue_len(&wl->tx_queue[queue_num]))
2940                         dev_kfree_skb(skb_dequeue(&wl->tx_queue[queue_num]));
2941         }
2942
2943 b43legacy_mac_suspend(dev);
2944         free_irq(dev->dev->irq, dev);
2945         b43legacydbg(wl, "Wireless interface stopped\n");
2946 }
2947
2948 /* Locking: wl->mutex */
2949 static int b43legacy_wireless_core_start(struct b43legacy_wldev *dev)
2950 {
2951         int err;
2952
2953         B43legacy_WARN_ON(b43legacy_status(dev) != B43legacy_STAT_INITIALIZED);
2954
2955         drain_txstatus_queue(dev);
2956         err = request_irq(dev->dev->irq, b43legacy_interrupt_handler,
2957                           IRQF_SHARED, KBUILD_MODNAME, dev);
2958         if (err) {
2959                 b43legacyerr(dev->wl, "Cannot request IRQ-%d\n",
2960                        dev->dev->irq);
2961                 goto out;
2962         }
2963         /* We are ready to run. */
2964         ieee80211_wake_queues(dev->wl->hw);
2965         b43legacy_set_status(dev, B43legacy_STAT_STARTED);
2966
2967         /* Start data flow (TX/RX) */
2968         b43legacy_mac_enable(dev);
2969         b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, dev->irq_mask);
2970
2971         /* Start maintenance work */
2972         b43legacy_periodic_tasks_setup(dev);
2973
2974         b43legacydbg(dev->wl, "Wireless interface started\n");
2975 out:
2976         return err;
2977 }
2978
2979 /* Get PHY and RADIO versioning numbers */
2980 static int b43legacy_phy_versioning(struct b43legacy_wldev *dev)
2981 {
2982         struct b43legacy_phy *phy = &dev->phy;
2983         u32 tmp;
2984         u8 analog_type;
2985         u8 phy_type;
2986         u8 phy_rev;
2987         u16 radio_manuf;
2988         u16 radio_ver;
2989         u16 radio_rev;
2990         int unsupported = 0;
2991
2992         /* Get PHY versioning */
2993         tmp = b43legacy_read16(dev, B43legacy_MMIO_PHY_VER);
2994         analog_type = (tmp & B43legacy_PHYVER_ANALOG)
2995                       >> B43legacy_PHYVER_ANALOG_SHIFT;
2996         phy_type = (tmp & B43legacy_PHYVER_TYPE) >> B43legacy_PHYVER_TYPE_SHIFT;
2997         phy_rev = (tmp & B43legacy_PHYVER_VERSION);
2998         switch (phy_type) {
2999         case B43legacy_PHYTYPE_B:
3000                 if (phy_rev != 2 && phy_rev != 4
3001                     && phy_rev != 6 && phy_rev != 7)
3002                         unsupported = 1;
3003                 break;
3004         case B43legacy_PHYTYPE_G:
3005                 if (phy_rev > 8)
3006                         unsupported = 1;
3007                 break;
3008         default:
3009                 unsupported = 1;
3010         }
3011         if (unsupported) {
3012                 b43legacyerr(dev->wl, "FOUND UNSUPPORTED PHY "
3013                        "(Analog %u, Type %u, Revision %u)\n",
3014                        analog_type, phy_type, phy_rev);
3015                 return -EOPNOTSUPP;
3016         }
3017         b43legacydbg(dev->wl, "Found PHY: Analog %u, Type %u, Revision %u\n",
3018                analog_type, phy_type, phy_rev);
3019
3020
3021         /* Get RADIO versioning */
3022         if (dev->dev->bus->chip_id == 0x4317) {
3023                 if (dev->dev->bus->chip_rev == 0)
3024                         tmp = 0x3205017F;
3025                 else if (dev->dev->bus->chip_rev == 1)
3026                         tmp = 0x4205017F;
3027                 else
3028                         tmp = 0x5205017F;
3029         } else {
3030                 b43legacy_write16(dev, B43legacy_MMIO_RADIO_CONTROL,
3031                                   B43legacy_RADIOCTL_ID);
3032                 tmp = b43legacy_read16(dev, B43legacy_MMIO_RADIO_DATA_HIGH);
3033                 tmp <<= 16;
3034                 b43legacy_write16(dev, B43legacy_MMIO_RADIO_CONTROL,
3035                                   B43legacy_RADIOCTL_ID);
3036                 tmp |= b43legacy_read16(dev, B43legacy_MMIO_RADIO_DATA_LOW);
3037         }
3038         radio_manuf = (tmp & 0x00000FFF);
3039         radio_ver = (tmp & 0x0FFFF000) >> 12;
3040         radio_rev = (tmp & 0xF0000000) >> 28;
3041         switch (phy_type) {
3042         case B43legacy_PHYTYPE_B:
3043                 if ((radio_ver & 0xFFF0) != 0x2050)
3044                         unsupported = 1;
3045                 break;
3046         case B43legacy_PHYTYPE_G:
3047                 if (radio_ver != 0x2050)
3048                         unsupported = 1;
3049                 break;
3050         default:
3051                 B43legacy_BUG_ON(1);
3052         }
3053         if (unsupported) {
3054                 b43legacyerr(dev->wl, "FOUND UNSUPPORTED RADIO "
3055                        "(Manuf 0x%X, Version 0x%X, Revision %u)\n",
3056                        radio_manuf, radio_ver, radio_rev);
3057                 return -EOPNOTSUPP;
3058         }
3059         b43legacydbg(dev->wl, "Found Radio: Manuf 0x%X, Version 0x%X,"
3060                      " Revision %u\n", radio_manuf, radio_ver, radio_rev);
3061
3062
3063         phy->radio_manuf = radio_manuf;
3064         phy->radio_ver = radio_ver;
3065         phy->radio_rev = radio_rev;
3066
3067         phy->analog = analog_type;
3068         phy->type = phy_type;
3069         phy->rev = phy_rev;
3070
3071         return 0;
3072 }
3073
3074 static void setup_struct_phy_for_init(struct b43legacy_wldev *dev,
3075                                       struct b43legacy_phy *phy)
3076 {
3077         struct b43legacy_lopair *lo;
3078         int i;
3079
3080         memset(phy->minlowsig, 0xFF, sizeof(phy->minlowsig));
3081         memset(phy->minlowsigpos, 0, sizeof(phy->minlowsigpos));
3082
3083         /* Assume the radio is enabled. If it's not enabled, the state will
3084          * immediately get fixed on the first periodic work run. */
3085         dev->radio_hw_enable = true;
3086
3087         phy->savedpctlreg = 0xFFFF;
3088         phy->aci_enable = false;
3089         phy->aci_wlan_automatic = false;
3090         phy->aci_hw_rssi = false;
3091
3092         lo = phy->_lo_pairs;
3093         if (lo)
3094                 memset(lo, 0, sizeof(struct b43legacy_lopair) *
3095                                      B43legacy_LO_COUNT);
3096         phy->max_lb_gain = 0;
3097         phy->trsw_rx_gain = 0;
3098
3099         /* Set default attenuation values. */
3100         phy->bbatt = b43legacy_default_baseband_attenuation(dev);
3101         phy->rfatt = b43legacy_default_radio_attenuation(dev);
3102         phy->txctl1 = b43legacy_default_txctl1(dev);
3103         phy->txpwr_offset = 0;
3104
3105         /* NRSSI */
3106         phy->nrssislope = 0;
3107         for (i = 0; i < ARRAY_SIZE(phy->nrssi); i++)
3108                 phy->nrssi[i] = -1000;
3109         for (i = 0; i < ARRAY_SIZE(phy->nrssi_lt); i++)
3110                 phy->nrssi_lt[i] = i;
3111
3112         phy->lofcal = 0xFFFF;
3113         phy->initval = 0xFFFF;
3114
3115         phy->interfmode = B43legacy_INTERFMODE_NONE;
3116         phy->channel = 0xFF;
3117 }
3118
3119 static void setup_struct_wldev_for_init(struct b43legacy_wldev *dev)
3120 {
3121         /* Flags */
3122         dev->dfq_valid = false;
3123
3124         /* Stats */
3125         memset(&dev->stats, 0, sizeof(dev->stats));
3126
3127         setup_struct_phy_for_init(dev, &dev->phy);
3128
3129         /* IRQ related flags */
3130         dev->irq_reason = 0;
3131         memset(dev->dma_reason, 0, sizeof(dev->dma_reason));
3132         dev->irq_mask = B43legacy_IRQ_MASKTEMPLATE;
3133
3134         dev->mac_suspended = 1;
3135
3136         /* Noise calculation context */
3137         memset(&dev->noisecalc, 0, sizeof(dev->noisecalc));
3138 }
3139
3140 static void b43legacy_set_synth_pu_delay(struct b43legacy_wldev *dev,
3141                                           bool idle) {
3142         u16 pu_delay = 1050;
3143
3144         if (b43legacy_is_mode(dev->wl, NL80211_IFTYPE_ADHOC) || idle)
3145                 pu_delay = 500;
3146         if ((dev->phy.radio_ver == 0x2050) && (dev->phy.radio_rev == 8))
3147                 pu_delay = max(pu_delay, (u16)2400);
3148
3149         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
3150                               B43legacy_SHM_SH_SPUWKUP, pu_delay);
3151 }
3152
3153 /* Set the TSF CFP pre-TargetBeaconTransmissionTime. */
3154 static void b43legacy_set_pretbtt(struct b43legacy_wldev *dev)
3155 {
3156         u16 pretbtt;
3157
3158         /* The time value is in microseconds. */
3159         if (b43legacy_is_mode(dev->wl, NL80211_IFTYPE_ADHOC))
3160                 pretbtt = 2;
3161         else
3162                 pretbtt = 250;
3163         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
3164                               B43legacy_SHM_SH_PRETBTT, pretbtt);
3165         b43legacy_write16(dev, B43legacy_MMIO_TSF_CFP_PRETBTT, pretbtt);
3166 }
3167
3168 /* Shutdown a wireless core */
3169 /* Locking: wl->mutex */
3170 static void b43legacy_wireless_core_exit(struct b43legacy_wldev *dev)
3171 {
3172         struct b43legacy_phy *phy = &dev->phy;
3173         u32 macctl;
3174
3175         B43legacy_WARN_ON(b43legacy_status(dev) > B43legacy_STAT_INITIALIZED);
3176         if (b43legacy_status(dev) != B43legacy_STAT_INITIALIZED)
3177                 return;
3178         b43legacy_set_status(dev, B43legacy_STAT_UNINIT);
3179
3180         /* Stop the microcode PSM. */
3181         macctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
3182         macctl &= ~B43legacy_MACCTL_PSM_RUN;
3183         macctl |= B43legacy_MACCTL_PSM_JMP0;
3184         b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl);
3185
3186         b43legacy_leds_exit(dev);
3187         b43legacy_rng_exit(dev->wl);
3188         b43legacy_pio_free(dev);
3189         b43legacy_dma_free(dev);
3190         b43legacy_chip_exit(dev);
3191         b43legacy_radio_turn_off(dev, 1);
3192         b43legacy_switch_analog(dev, 0);
3193         if (phy->dyn_tssi_tbl)
3194                 kfree(phy->tssi2dbm);
3195         kfree(phy->lo_control);
3196         phy->lo_control = NULL;
3197         if (dev->wl->current_beacon) {
3198                 dev_kfree_skb_any(dev->wl->current_beacon);
3199                 dev->wl->current_beacon = NULL;
3200         }
3201
3202         ssb_device_disable(dev->dev, 0);
3203         ssb_bus_may_powerdown(dev->dev->bus);
3204 }
3205
3206 static void prepare_phy_data_for_init(struct b43legacy_wldev *dev)
3207 {
3208         struct b43legacy_phy *phy = &dev->phy;
3209         int i;
3210
3211         /* Set default attenuation values. */
3212         phy->bbatt = b43legacy_default_baseband_attenuation(dev);
3213         phy->rfatt = b43legacy_default_radio_attenuation(dev);
3214         phy->txctl1 = b43legacy_default_txctl1(dev);
3215         phy->txctl2 = 0xFFFF;
3216         phy->txpwr_offset = 0;
3217
3218         /* NRSSI */
3219         phy->nrssislope = 0;
3220         for (i = 0; i < ARRAY_SIZE(phy->nrssi); i++)
3221                 phy->nrssi[i] = -1000;
3222         for (i = 0; i < ARRAY_SIZE(phy->nrssi_lt); i++)
3223                 phy->nrssi_lt[i] = i;
3224
3225         phy->lofcal = 0xFFFF;
3226         phy->initval = 0xFFFF;
3227
3228         phy->aci_enable = false;
3229         phy->aci_wlan_automatic = false;
3230         phy->aci_hw_rssi = false;
3231
3232         phy->antenna_diversity = 0xFFFF;
3233         memset(phy->minlowsig, 0xFF, sizeof(phy->minlowsig));
3234         memset(phy->minlowsigpos, 0, sizeof(phy->minlowsigpos));
3235
3236         /* Flags */
3237         phy->calibrated = 0;
3238
3239         if (phy->_lo_pairs)
3240                 memset(phy->_lo_pairs, 0,
3241                        sizeof(struct b43legacy_lopair) * B43legacy_LO_COUNT);
3242         memset(phy->loopback_gain, 0, sizeof(phy->loopback_gain));
3243 }
3244
3245 /* Initialize a wireless core */
3246 static int b43legacy_wireless_core_init(struct b43legacy_wldev *dev)
3247 {
3248         struct b43legacy_wl *wl = dev->wl;
3249         struct ssb_bus *bus = dev->dev->bus;
3250         struct b43legacy_phy *phy = &dev->phy;
3251         struct ssb_sprom *sprom = &dev->dev->bus->sprom;
3252         int err;
3253         u32 hf;
3254         u32 tmp;
3255
3256         B43legacy_WARN_ON(b43legacy_status(dev) != B43legacy_STAT_UNINIT);
3257
3258         err = ssb_bus_powerup(bus, 0);
3259         if (err)
3260                 goto out;
3261         if (!ssb_device_is_enabled(dev->dev)) {
3262                 tmp = phy->gmode ? B43legacy_TMSLOW_GMODE : 0;
3263                 b43legacy_wireless_core_reset(dev, tmp);
3264         }
3265
3266         if ((phy->type == B43legacy_PHYTYPE_B) ||
3267             (phy->type == B43legacy_PHYTYPE_G)) {
3268                 phy->_lo_pairs = kcalloc(B43legacy_LO_COUNT,
3269                                          sizeof(struct b43legacy_lopair),
3270                                          GFP_KERNEL);
3271                 if (!phy->_lo_pairs)
3272                         return -ENOMEM;
3273         }
3274         setup_struct_wldev_for_init(dev);
3275
3276         err = b43legacy_phy_init_tssi2dbm_table(dev);
3277         if (err)
3278                 goto err_kfree_lo_control;
3279
3280         /* Enable IRQ routing to this device. */
3281         ssb_pcicore_dev_irqvecs_enable(&bus->pcicore, dev->dev);
3282
3283         prepare_phy_data_for_init(dev);
3284         b43legacy_phy_calibrate(dev);
3285         err = b43legacy_chip_init(dev);
3286         if (err)
3287                 goto err_kfree_tssitbl;
3288         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
3289                               B43legacy_SHM_SH_WLCOREREV,
3290                               dev->dev->id.revision);
3291         hf = b43legacy_hf_read(dev);
3292         if (phy->type == B43legacy_PHYTYPE_G) {
3293                 hf |= B43legacy_HF_SYMW;
3294                 if (phy->rev == 1)
3295                         hf |= B43legacy_HF_GDCW;
3296                 if (sprom->boardflags_lo & B43legacy_BFL_PACTRL)
3297                         hf |= B43legacy_HF_OFDMPABOOST;
3298         } else if (phy->type == B43legacy_PHYTYPE_B) {
3299                 hf |= B43legacy_HF_SYMW;
3300                 if (phy->rev >= 2 && phy->radio_ver == 0x2050)
3301                         hf &= ~B43legacy_HF_GDCW;
3302         }
3303         b43legacy_hf_write(dev, hf);
3304
3305         b43legacy_set_retry_limits(dev,
3306                                    B43legacy_DEFAULT_SHORT_RETRY_LIMIT,
3307                                    B43legacy_DEFAULT_LONG_RETRY_LIMIT);
3308
3309         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
3310                               0x0044, 3);
3311         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
3312                               0x0046, 2);
3313
3314         /* Disable sending probe responses from firmware.
3315          * Setting the MaxTime to one usec will always trigger
3316          * a timeout, so we never send any probe resp.
3317          * A timeout of zero is infinite. */
3318         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
3319                               B43legacy_SHM_SH_PRMAXTIME, 1);
3320
3321         b43legacy_rate_memory_init(dev);
3322
3323         /* Minimum Contention Window */
3324         if (phy->type == B43legacy_PHYTYPE_B)
3325                 b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS,
3326                                       0x0003, 31);
3327         else
3328                 b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS,
3329                                       0x0003, 15);
3330         /* Maximum Contention Window */
3331         b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS,
3332                               0x0004, 1023);
3333
3334         do {
3335                 if (b43legacy_using_pio(dev))
3336                         err = b43legacy_pio_init(dev);
3337                 else {
3338                         err = b43legacy_dma_init(dev);
3339                         if (!err)
3340                                 b43legacy_qos_init(dev);
3341                 }
3342         } while (err == -EAGAIN);
3343         if (err)
3344                 goto err_chip_exit;
3345
3346         b43legacy_set_synth_pu_delay(dev, 1);
3347
3348         ssb_bus_powerup(bus, 1); /* Enable dynamic PCTL */
3349         b43legacy_upload_card_macaddress(dev);
3350         b43legacy_security_init(dev);
3351         b43legacy_rng_init(wl);
3352
3353         ieee80211_wake_queues(dev->wl->hw);
3354         b43legacy_set_status(dev, B43legacy_STAT_INITIALIZED);
3355
3356         b43legacy_leds_init(dev);
3357 out:
3358         return err;
3359
3360 err_chip_exit:
3361         b43legacy_chip_exit(dev);
3362 err_kfree_tssitbl:
3363         if (phy->dyn_tssi_tbl)
3364                 kfree(phy->tssi2dbm);
3365 err_kfree_lo_control:
3366         kfree(phy->lo_control);
3367         phy->lo_control = NULL;
3368         ssb_bus_may_powerdown(bus);
3369         B43legacy_WARN_ON(b43legacy_status(dev) != B43legacy_STAT_UNINIT);
3370         return err;
3371 }
3372
3373 static int b43legacy_op_add_interface(struct ieee80211_hw *hw,
3374                                       struct ieee80211_vif *vif)
3375 {
3376         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
3377         struct b43legacy_wldev *dev;
3378         unsigned long flags;
3379         int err = -EOPNOTSUPP;
3380
3381         /* TODO: allow AP devices to coexist */
3382
3383         if (vif->type != NL80211_IFTYPE_AP &&
3384             vif->type != NL80211_IFTYPE_STATION &&
3385             vif->type != NL80211_IFTYPE_ADHOC)
3386                 return -EOPNOTSUPP;
3387
3388         mutex_lock(&wl->mutex);
3389         if (wl->operating)
3390                 goto out_mutex_unlock;
3391
3392         b43legacydbg(wl, "Adding Interface type %d\n", vif->type);
3393
3394         dev = wl->current_dev;
3395         wl->operating = true;
3396         wl->vif = vif;
3397         wl->if_type = vif->type;
3398         memcpy(wl->mac_addr, vif->addr, ETH_ALEN);
3399
3400         spin_lock_irqsave(&wl->irq_lock, flags);
3401         b43legacy_adjust_opmode(dev);
3402         b43legacy_set_pretbtt(dev);
3403         b43legacy_set_synth_pu_delay(dev, 0);
3404         b43legacy_upload_card_macaddress(dev);
3405         spin_unlock_irqrestore(&wl->irq_lock, flags);
3406
3407         err = 0;
3408  out_mutex_unlock:
3409         mutex_unlock(&wl->mutex);
3410
3411         return err;
3412 }
3413
3414 static void b43legacy_op_remove_interface(struct ieee80211_hw *hw,
3415                                           struct ieee80211_vif *vif)
3416 {
3417         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
3418         struct b43legacy_wldev *dev = wl->current_dev;
3419         unsigned long flags;
3420
3421         b43legacydbg(wl, "Removing Interface type %d\n", vif->type);
3422
3423         mutex_lock(&wl->mutex);
3424
3425         B43legacy_WARN_ON(!wl->operating);
3426         B43legacy_WARN_ON(wl->vif != vif);
3427         wl->vif = NULL;
3428
3429         wl->operating = false;
3430
3431         spin_lock_irqsave(&wl->irq_lock, flags);
3432         b43legacy_adjust_opmode(dev);
3433         eth_zero_addr(wl->mac_addr);
3434         b43legacy_upload_card_macaddress(dev);
3435         spin_unlock_irqrestore(&wl->irq_lock, flags);
3436
3437         mutex_unlock(&wl->mutex);
3438 }
3439
3440 static int b43legacy_op_start(struct ieee80211_hw *hw)
3441 {
3442         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
3443         struct b43legacy_wldev *dev = wl->current_dev;
3444         int did_init = 0;
3445         int err = 0;
3446
3447         /* Kill all old instance specific information to make sure
3448          * the card won't use it in the short timeframe between start
3449          * and mac80211 reconfiguring it. */
3450         eth_zero_addr(wl->bssid);
3451         eth_zero_addr(wl->mac_addr);
3452         wl->filter_flags = 0;
3453         wl->beacon0_uploaded = false;
3454         wl->beacon1_uploaded = false;
3455         wl->beacon_templates_virgin = true;
3456         wl->radio_enabled = true;
3457
3458         mutex_lock(&wl->mutex);
3459
3460         if (b43legacy_status(dev) < B43legacy_STAT_INITIALIZED) {
3461                 err = b43legacy_wireless_core_init(dev);
3462                 if (err)
3463                         goto out_mutex_unlock;
3464                 did_init = 1;
3465         }
3466
3467         if (b43legacy_status(dev) < B43legacy_STAT_STARTED) {
3468                 err = b43legacy_wireless_core_start(dev);
3469                 if (err) {
3470                         if (did_init)
3471                                 b43legacy_wireless_core_exit(dev);
3472                         goto out_mutex_unlock;
3473                 }
3474         }
3475
3476         wiphy_rfkill_start_polling(hw->wiphy);
3477
3478 out_mutex_unlock:
3479         mutex_unlock(&wl->mutex);
3480
3481         return err;
3482 }
3483
3484 static void b43legacy_op_stop(struct ieee80211_hw *hw)
3485 {
3486         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
3487         struct b43legacy_wldev *dev = wl->current_dev;
3488
3489         cancel_work_sync(&(wl->beacon_update_trigger));
3490
3491         mutex_lock(&wl->mutex);
3492         if (b43legacy_status(dev) >= B43legacy_STAT_STARTED)
3493                 b43legacy_wireless_core_stop(dev);
3494         b43legacy_wireless_core_exit(dev);
3495         wl->radio_enabled = false;
3496         mutex_unlock(&wl->mutex);
3497 }
3498
3499 static int b43legacy_op_beacon_set_tim(struct ieee80211_hw *hw,
3500                                        struct ieee80211_sta *sta, bool set)
3501 {
3502         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
3503         unsigned long flags;
3504
3505         spin_lock_irqsave(&wl->irq_lock, flags);
3506         b43legacy_update_templates(wl);
3507         spin_unlock_irqrestore(&wl->irq_lock, flags);
3508
3509         return 0;
3510 }
3511
3512 static int b43legacy_op_get_survey(struct ieee80211_hw *hw, int idx,
3513                                    struct survey_info *survey)
3514 {
3515         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
3516         struct b43legacy_wldev *dev = wl->current_dev;
3517         struct ieee80211_conf *conf = &hw->conf;
3518
3519         if (idx != 0)
3520                 return -ENOENT;
3521
3522         survey->channel = conf->chandef.chan;
3523         survey->filled = SURVEY_INFO_NOISE_DBM;
3524         survey->noise = dev->stats.link_noise;
3525
3526         return 0;
3527 }
3528
3529 static const struct ieee80211_ops b43legacy_hw_ops = {
3530         .tx                     = b43legacy_op_tx,
3531         .conf_tx                = b43legacy_op_conf_tx,
3532         .add_interface          = b43legacy_op_add_interface,
3533         .remove_interface       = b43legacy_op_remove_interface,
3534         .config                 = b43legacy_op_dev_config,
3535         .bss_info_changed       = b43legacy_op_bss_info_changed,
3536         .configure_filter       = b43legacy_op_configure_filter,
3537         .get_stats              = b43legacy_op_get_stats,
3538         .start                  = b43legacy_op_start,
3539         .stop                   = b43legacy_op_stop,
3540         .set_tim                = b43legacy_op_beacon_set_tim,
3541         .get_survey             = b43legacy_op_get_survey,
3542         .rfkill_poll            = b43legacy_rfkill_poll,
3543 };
3544
3545 /* Hard-reset the chip. Do not call this directly.
3546  * Use b43legacy_controller_restart()
3547  */
3548 static void b43legacy_chip_reset(struct work_struct *work)
3549 {
3550         struct b43legacy_wldev *dev =
3551                 container_of(work, struct b43legacy_wldev, restart_work);
3552         struct b43legacy_wl *wl = dev->wl;
3553         int err = 0;
3554         int prev_status;
3555
3556         mutex_lock(&wl->mutex);
3557
3558         prev_status = b43legacy_status(dev);
3559         /* Bring the device down... */
3560         if (prev_status >= B43legacy_STAT_STARTED)
3561                 b43legacy_wireless_core_stop(dev);
3562         if (prev_status >= B43legacy_STAT_INITIALIZED)
3563                 b43legacy_wireless_core_exit(dev);
3564
3565         /* ...and up again. */
3566         if (prev_status >= B43legacy_STAT_INITIALIZED) {
3567                 err = b43legacy_wireless_core_init(dev);
3568                 if (err)
3569                         goto out;
3570         }
3571         if (prev_status >= B43legacy_STAT_STARTED) {
3572                 err = b43legacy_wireless_core_start(dev);
3573                 if (err) {
3574                         b43legacy_wireless_core_exit(dev);
3575                         goto out;
3576                 }
3577         }
3578 out:
3579         if (err)
3580                 wl->current_dev = NULL; /* Failed to init the dev. */
3581         mutex_unlock(&wl->mutex);
3582         if (err)
3583                 b43legacyerr(wl, "Controller restart FAILED\n");
3584         else
3585                 b43legacyinfo(wl, "Controller restarted\n");
3586 }
3587
3588 static int b43legacy_setup_modes(struct b43legacy_wldev *dev,
3589                                  int have_bphy,
3590                                  int have_gphy)
3591 {
3592         struct ieee80211_hw *hw = dev->wl->hw;
3593         struct b43legacy_phy *phy = &dev->phy;
3594
3595         phy->possible_phymodes = 0;
3596         if (have_bphy) {
3597                 hw->wiphy->bands[NL80211_BAND_2GHZ] =
3598                         &b43legacy_band_2GHz_BPHY;
3599                 phy->possible_phymodes |= B43legacy_PHYMODE_B;
3600         }
3601
3602         if (have_gphy) {
3603                 hw->wiphy->bands[NL80211_BAND_2GHZ] =
3604                         &b43legacy_band_2GHz_GPHY;
3605                 phy->possible_phymodes |= B43legacy_PHYMODE_G;
3606         }
3607
3608         return 0;
3609 }
3610
3611 static void b43legacy_wireless_core_detach(struct b43legacy_wldev *dev)
3612 {
3613         /* We release firmware that late to not be required to re-request
3614          * is all the time when we reinit the core. */
3615         b43legacy_release_firmware(dev);
3616 }
3617
3618 static int b43legacy_wireless_core_attach(struct b43legacy_wldev *dev)
3619 {
3620         struct b43legacy_wl *wl = dev->wl;
3621         struct ssb_bus *bus = dev->dev->bus;
3622         struct pci_dev *pdev = (bus->bustype == SSB_BUSTYPE_PCI) ? bus->host_pci : NULL;
3623         int err;
3624         int have_bphy = 0;
3625         int have_gphy = 0;
3626         u32 tmp;
3627
3628         /* Do NOT do any device initialization here.
3629          * Do it in wireless_core_init() instead.
3630          * This function is for gathering basic information about the HW, only.
3631          * Also some structs may be set up here. But most likely you want to
3632          * have that in core_init(), too.
3633          */
3634
3635         err = ssb_bus_powerup(bus, 0);
3636         if (err) {
3637                 b43legacyerr(wl, "Bus powerup failed\n");
3638                 goto out;
3639         }
3640         /* Get the PHY type. */
3641         if (dev->dev->id.revision >= 5) {
3642                 u32 tmshigh;
3643
3644                 tmshigh = ssb_read32(dev->dev, SSB_TMSHIGH);
3645                 have_gphy = !!(tmshigh & B43legacy_TMSHIGH_GPHY);
3646                 if (!have_gphy)
3647                         have_bphy = 1;
3648         } else if (dev->dev->id.revision == 4)
3649                 have_gphy = 1;
3650         else
3651                 have_bphy = 1;
3652
3653         dev->phy.gmode = (have_gphy || have_bphy);
3654         dev->phy.radio_on = true;
3655         tmp = dev->phy.gmode ? B43legacy_TMSLOW_GMODE : 0;
3656         b43legacy_wireless_core_reset(dev, tmp);
3657
3658         err = b43legacy_phy_versioning(dev);
3659         if (err)
3660                 goto err_powerdown;
3661         /* Check if this device supports multiband. */
3662         if (!pdev ||
3663             (pdev->device != 0x4312 &&
3664              pdev->device != 0x4319 &&
3665              pdev->device != 0x4324)) {
3666                 /* No multiband support. */
3667                 have_bphy = 0;
3668                 have_gphy = 0;
3669                 switch (dev->phy.type) {
3670                 case B43legacy_PHYTYPE_B:
3671                         have_bphy = 1;
3672                         break;
3673                 case B43legacy_PHYTYPE_G:
3674                         have_gphy = 1;
3675                         break;
3676                 default:
3677                         B43legacy_BUG_ON(1);
3678                 }
3679         }
3680         dev->phy.gmode = (have_gphy || have_bphy);
3681         tmp = dev->phy.gmode ? B43legacy_TMSLOW_GMODE : 0;
3682         b43legacy_wireless_core_reset(dev, tmp);
3683
3684         err = b43legacy_validate_chipaccess(dev);
3685         if (err)
3686                 goto err_powerdown;
3687         err = b43legacy_setup_modes(dev, have_bphy, have_gphy);
3688         if (err)
3689                 goto err_powerdown;
3690
3691         /* Now set some default "current_dev" */
3692         if (!wl->current_dev)
3693                 wl->current_dev = dev;
3694         INIT_WORK(&dev->restart_work, b43legacy_chip_reset);
3695
3696         b43legacy_radio_turn_off(dev, 1);
3697         b43legacy_switch_analog(dev, 0);
3698         ssb_device_disable(dev->dev, 0);
3699         ssb_bus_may_powerdown(bus);
3700
3701 out:
3702         return err;
3703
3704 err_powerdown:
3705         ssb_bus_may_powerdown(bus);
3706         return err;
3707 }
3708
3709 static void b43legacy_one_core_detach(struct ssb_device *dev)
3710 {
3711         struct b43legacy_wldev *wldev;
3712         struct b43legacy_wl *wl;
3713
3714         /* Do not cancel ieee80211-workqueue based work here.
3715          * See comment in b43legacy_remove(). */
3716
3717         wldev = ssb_get_drvdata(dev);
3718         wl = wldev->wl;
3719         b43legacy_debugfs_remove_device(wldev);
3720         b43legacy_wireless_core_detach(wldev);
3721         list_del(&wldev->list);
3722         wl->nr_devs--;
3723         ssb_set_drvdata(dev, NULL);
3724         kfree(wldev);
3725 }
3726
3727 static int b43legacy_one_core_attach(struct ssb_device *dev,
3728                                      struct b43legacy_wl *wl)
3729 {
3730         struct b43legacy_wldev *wldev;
3731         int err = -ENOMEM;
3732
3733         wldev = kzalloc(sizeof(*wldev), GFP_KERNEL);
3734         if (!wldev)
3735                 goto out;
3736
3737         wldev->dev = dev;
3738         wldev->wl = wl;
3739         b43legacy_set_status(wldev, B43legacy_STAT_UNINIT);
3740         wldev->bad_frames_preempt = modparam_bad_frames_preempt;
3741         tasklet_setup(&wldev->isr_tasklet, b43legacy_interrupt_tasklet);
3742         if (modparam_pio)
3743                 wldev->__using_pio = true;
3744         INIT_LIST_HEAD(&wldev->list);
3745
3746         err = b43legacy_wireless_core_attach(wldev);
3747         if (err)
3748                 goto err_kfree_wldev;
3749
3750         list_add(&wldev->list, &wl->devlist);
3751         wl->nr_devs++;
3752         ssb_set_drvdata(dev, wldev);
3753         b43legacy_debugfs_add_device(wldev);
3754 out:
3755         return err;
3756
3757 err_kfree_wldev:
3758         kfree(wldev);
3759         return err;
3760 }
3761
3762 static void b43legacy_sprom_fixup(struct ssb_bus *bus)
3763 {
3764         /* boardflags workarounds */
3765         if (bus->boardinfo.vendor == PCI_VENDOR_ID_APPLE &&
3766             bus->boardinfo.type == 0x4E &&
3767             bus->sprom.board_rev > 0x40)
3768                 bus->sprom.boardflags_lo |= B43legacy_BFL_PACTRL;
3769 }
3770
3771 static void b43legacy_wireless_exit(struct ssb_device *dev,
3772                                   struct b43legacy_wl *wl)
3773 {
3774         struct ieee80211_hw *hw = wl->hw;
3775
3776         ssb_set_devtypedata(dev, NULL);
3777         ieee80211_free_hw(hw);
3778 }
3779
3780 static int b43legacy_wireless_init(struct ssb_device *dev)
3781 {
3782         struct ssb_sprom *sprom = &dev->bus->sprom;
3783         struct ieee80211_hw *hw;
3784         struct b43legacy_wl *wl;
3785         int err = -ENOMEM;
3786         int queue_num;
3787
3788         b43legacy_sprom_fixup(dev->bus);
3789
3790         hw = ieee80211_alloc_hw(sizeof(*wl), &b43legacy_hw_ops);
3791         if (!hw) {
3792                 b43legacyerr(NULL, "Could not allocate ieee80211 device\n");
3793                 goto out;
3794         }
3795
3796         /* fill hw info */
3797         ieee80211_hw_set(hw, RX_INCLUDES_FCS);
3798         ieee80211_hw_set(hw, SIGNAL_DBM);
3799         ieee80211_hw_set(hw, MFP_CAPABLE); /* Allow WPA3 in software */
3800
3801         hw->wiphy->interface_modes =
3802                 BIT(NL80211_IFTYPE_AP) |
3803                 BIT(NL80211_IFTYPE_STATION) |
3804                 BIT(NL80211_IFTYPE_ADHOC);
3805         hw->queues = 1; /* FIXME: hardware has more queues */
3806         hw->max_rates = 2;
3807         SET_IEEE80211_DEV(hw, dev->dev);
3808         if (is_valid_ether_addr(sprom->et1mac))
3809                 SET_IEEE80211_PERM_ADDR(hw, sprom->et1mac);
3810         else
3811                 SET_IEEE80211_PERM_ADDR(hw, sprom->il0mac);
3812
3813         wiphy_ext_feature_set(hw->wiphy, NL80211_EXT_FEATURE_CQM_RSSI_LIST);
3814
3815         /* Get and initialize struct b43legacy_wl */
3816         wl = hw_to_b43legacy_wl(hw);
3817         memset(wl, 0, sizeof(*wl));
3818         wl->hw = hw;
3819         spin_lock_init(&wl->irq_lock);
3820         spin_lock_init(&wl->leds_lock);
3821         mutex_init(&wl->mutex);
3822         INIT_LIST_HEAD(&wl->devlist);
3823         INIT_WORK(&wl->beacon_update_trigger, b43legacy_beacon_update_trigger_work);
3824         INIT_WORK(&wl->tx_work, b43legacy_tx_work);
3825
3826         /* Initialize queues and flags. */
3827         for (queue_num = 0; queue_num < B43legacy_QOS_QUEUE_NUM; queue_num++) {
3828                 skb_queue_head_init(&wl->tx_queue[queue_num]);
3829                 wl->tx_queue_stopped[queue_num] = 0;
3830         }
3831
3832         ssb_set_devtypedata(dev, wl);
3833         b43legacyinfo(wl, "Broadcom %04X WLAN found (core revision %u)\n",
3834                       dev->bus->chip_id, dev->id.revision);
3835         err = 0;
3836 out:
3837         return err;
3838 }
3839
3840 static int b43legacy_probe(struct ssb_device *dev,
3841                          const struct ssb_device_id *id)
3842 {
3843         struct b43legacy_wl *wl;
3844         int err;
3845         int first = 0;
3846
3847         wl = ssb_get_devtypedata(dev);
3848         if (!wl) {
3849                 /* Probing the first core - setup common struct b43legacy_wl */
3850                 first = 1;
3851                 err = b43legacy_wireless_init(dev);
3852                 if (err)
3853                         goto out;
3854                 wl = ssb_get_devtypedata(dev);
3855                 B43legacy_WARN_ON(!wl);
3856         }
3857         err = b43legacy_one_core_attach(dev, wl);
3858         if (err)
3859                 goto err_wireless_exit;
3860
3861         /* setup and start work to load firmware */
3862         INIT_WORK(&wl->firmware_load, b43legacy_request_firmware);
3863         schedule_work(&wl->firmware_load);
3864
3865 out:
3866         return err;
3867
3868 err_wireless_exit:
3869         if (first)
3870                 b43legacy_wireless_exit(dev, wl);
3871         return err;
3872 }
3873
3874 static void b43legacy_remove(struct ssb_device *dev)
3875 {
3876         struct b43legacy_wl *wl = ssb_get_devtypedata(dev);
3877         struct b43legacy_wldev *wldev = ssb_get_drvdata(dev);
3878
3879         /* We must cancel any work here before unregistering from ieee80211,
3880          * as the ieee80211 unreg will destroy the workqueue. */
3881         cancel_work_sync(&wldev->restart_work);
3882         cancel_work_sync(&wl->firmware_load);
3883         complete(&wldev->fw_load_complete);
3884
3885         B43legacy_WARN_ON(!wl);
3886         if (!wldev->fw.ucode)
3887                 return;                 /* NULL if fw never loaded */
3888         if (wl->current_dev == wldev)
3889                 ieee80211_unregister_hw(wl->hw);
3890
3891         b43legacy_one_core_detach(dev);
3892
3893         if (list_empty(&wl->devlist))
3894                 /* Last core on the chip unregistered.
3895                  * We can destroy common struct b43legacy_wl.
3896                  */
3897                 b43legacy_wireless_exit(dev, wl);
3898 }
3899
3900 /* Perform a hardware reset. This can be called from any context. */
3901 void b43legacy_controller_restart(struct b43legacy_wldev *dev,
3902                                   const char *reason)
3903 {
3904         /* Must avoid requeueing, if we are in shutdown. */
3905         if (b43legacy_status(dev) < B43legacy_STAT_INITIALIZED)
3906                 return;
3907         b43legacyinfo(dev->wl, "Controller RESET (%s) ...\n", reason);
3908         ieee80211_queue_work(dev->wl->hw, &dev->restart_work);
3909 }
3910
3911 #ifdef CONFIG_PM
3912
3913 static int b43legacy_suspend(struct ssb_device *dev, pm_message_t state)
3914 {
3915         struct b43legacy_wldev *wldev = ssb_get_drvdata(dev);
3916         struct b43legacy_wl *wl = wldev->wl;
3917
3918         b43legacydbg(wl, "Suspending...\n");
3919
3920         mutex_lock(&wl->mutex);
3921         wldev->suspend_init_status = b43legacy_status(wldev);
3922         if (wldev->suspend_init_status >= B43legacy_STAT_STARTED)
3923                 b43legacy_wireless_core_stop(wldev);
3924         if (wldev->suspend_init_status >= B43legacy_STAT_INITIALIZED)
3925                 b43legacy_wireless_core_exit(wldev);
3926         mutex_unlock(&wl->mutex);
3927
3928         b43legacydbg(wl, "Device suspended.\n");
3929
3930         return 0;
3931 }
3932
3933 static int b43legacy_resume(struct ssb_device *dev)
3934 {
3935         struct b43legacy_wldev *wldev = ssb_get_drvdata(dev);
3936         struct b43legacy_wl *wl = wldev->wl;
3937         int err = 0;
3938
3939         b43legacydbg(wl, "Resuming...\n");
3940
3941         mutex_lock(&wl->mutex);
3942         if (wldev->suspend_init_status >= B43legacy_STAT_INITIALIZED) {
3943                 err = b43legacy_wireless_core_init(wldev);
3944                 if (err) {
3945                         b43legacyerr(wl, "Resume failed at core init\n");
3946                         goto out;
3947                 }
3948         }
3949         if (wldev->suspend_init_status >= B43legacy_STAT_STARTED) {
3950                 err = b43legacy_wireless_core_start(wldev);
3951                 if (err) {
3952                         b43legacy_wireless_core_exit(wldev);
3953                         b43legacyerr(wl, "Resume failed at core start\n");
3954                         goto out;
3955                 }
3956         }
3957
3958         b43legacydbg(wl, "Device resumed.\n");
3959 out:
3960         mutex_unlock(&wl->mutex);
3961         return err;
3962 }
3963
3964 #else   /* CONFIG_PM */
3965 # define b43legacy_suspend      NULL
3966 # define b43legacy_resume               NULL
3967 #endif  /* CONFIG_PM */
3968
3969 static struct ssb_driver b43legacy_ssb_driver = {
3970         .name           = KBUILD_MODNAME,
3971         .id_table       = b43legacy_ssb_tbl,
3972         .probe          = b43legacy_probe,
3973         .remove         = b43legacy_remove,
3974         .suspend        = b43legacy_suspend,
3975         .resume         = b43legacy_resume,
3976 };
3977
3978 static void b43legacy_print_driverinfo(void)
3979 {
3980         const char *feat_pci = "", *feat_leds = "",
3981                    *feat_pio = "", *feat_dma = "";
3982
3983 #ifdef CONFIG_B43LEGACY_PCI_AUTOSELECT
3984         feat_pci = "P";
3985 #endif
3986 #ifdef CONFIG_B43LEGACY_LEDS
3987         feat_leds = "L";
3988 #endif
3989 #ifdef CONFIG_B43LEGACY_PIO
3990         feat_pio = "I";
3991 #endif
3992 #ifdef CONFIG_B43LEGACY_DMA
3993         feat_dma = "D";
3994 #endif
3995         printk(KERN_INFO "Broadcom 43xx-legacy driver loaded "
3996                "[ Features: %s%s%s%s ]\n",
3997                feat_pci, feat_leds, feat_pio, feat_dma);
3998 }
3999
4000 static int __init b43legacy_init(void)
4001 {
4002         int err;
4003
4004         b43legacy_debugfs_init();
4005
4006         err = ssb_driver_register(&b43legacy_ssb_driver);
4007         if (err)
4008                 goto err_dfs_exit;
4009
4010         b43legacy_print_driverinfo();
4011
4012         return err;
4013
4014 err_dfs_exit:
4015         b43legacy_debugfs_exit();
4016         return err;
4017 }
4018
4019 static void __exit b43legacy_exit(void)
4020 {
4021         ssb_driver_unregister(&b43legacy_ssb_driver);
4022         b43legacy_debugfs_exit();
4023 }
4024
4025 module_init(b43legacy_init)
4026 module_exit(b43legacy_exit)