drivers/net/wireless/b43legacy/main.c

   1 /*
   2  *
   3  *  Broadcom B43legacy wireless driver
   4  *
   5  *  Copyright (c) 2005 Martin Langer <martin-langer@gmx.de>
   6  *  Copyright (c) 2005-2008 Stefano Brivio <stefano.brivio@polimi.it>
   7  *  Copyright (c) 2005, 2006 Michael Buesch <m@bues.ch>
   8  *  Copyright (c) 2005 Danny van Dyk <kugelfang@gentoo.org>
   9  *  Copyright (c) 2005 Andreas Jaggi <andreas.jaggi@waterwave.ch>
  10  *  Copyright (c) 2007 Larry Finger <Larry.Finger@lwfinger.net>
  11  *
  12  *  Some parts of the code in this file are derived from the ipw2200
  13  *  driver  Copyright(c) 2003 - 2004 Intel Corporation.
  14
  15  *  This program is free software; you can redistribute it and/or modify
  16  *  it under the terms of the GNU General Public License as published by
  17  *  the Free Software Foundation; either version 2 of the License, or
  18  *  (at your option) any later version.
  19  *
  20  *  This program is distributed in the hope that it will be useful,
  21  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
  22  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  23  *  GNU General Public License for more details.
  24  *
  25  *  You should have received a copy of the GNU General Public License
  26  *  along with this program; see the file COPYING.  If not, write to
  27  *  the Free Software Foundation, Inc., 51 Franklin Steet, Fifth Floor,
  28  *  Boston, MA 02110-1301, USA.
  29  *
  30  */
  31
  32 #include <linux/delay.h>
  33 #include <linux/init.h>
  34 #include <linux/module.h>
  35 #include <linux/if_arp.h>
  36 #include <linux/etherdevice.h>
  37 #include <linux/firmware.h>
  38 #include <linux/workqueue.h>
  39 #include <linux/sched.h>
  40 #include <linux/skbuff.h>
  41 #include <linux/dma-mapping.h>
  42 #include <linux/slab.h>
  43 #include <net/dst.h>
  44 #include <asm/unaligned.h>
  45
  46 #include "b43legacy.h"
  47 #include "main.h"
  48 #include "debugfs.h"
  49 #include "phy.h"
  50 #include "dma.h"
  51 #include "pio.h"
  52 #include "sysfs.h"
  53 #include "xmit.h"
  54 #include "radio.h"
  55
  56
  57 MODULE_DESCRIPTION("Broadcom B43legacy wireless driver");
  58 MODULE_AUTHOR("Martin Langer");
  59 MODULE_AUTHOR("Stefano Brivio");
  60 MODULE_AUTHOR("Michael Buesch");
  61 MODULE_LICENSE("GPL");
  62
  63 /*(DEBLOBBED)*/
  64
  65 #if defined(CONFIG_B43LEGACY_DMA) && defined(CONFIG_B43LEGACY_PIO)
  66 static int modparam_pio;
  67 module_param_named(pio, modparam_pio, int, 0444);
  68 MODULE_PARM_DESC(pio, "enable(1) / disable(0) PIO mode");
  69 #elif defined(CONFIG_B43LEGACY_DMA)
  70 # define modparam_pio   0
  71 #elif defined(CONFIG_B43LEGACY_PIO)
  72 # define modparam_pio   1
  73 #endif
  74
  75 static int modparam_bad_frames_preempt;
  76 module_param_named(bad_frames_preempt, modparam_bad_frames_preempt, int, 0444);
  77 MODULE_PARM_DESC(bad_frames_preempt, "enable(1) / disable(0) Bad Frames"
  78                  " Preemption");
  79
  80 static char modparam_fwpostfix[16];
  81 module_param_string(fwpostfix, modparam_fwpostfix, 16, 0444);
  82 MODULE_PARM_DESC(fwpostfix, "Postfix for the firmware files to load.");
  83
  84 /* The following table supports BCM4301, BCM4303 and BCM4306/2 devices. */
  85 static const struct ssb_device_id b43legacy_ssb_tbl[] = {
  86         SSB_DEVICE(SSB_VENDOR_BROADCOM, SSB_DEV_80211, 2),
  87         SSB_DEVICE(SSB_VENDOR_BROADCOM, SSB_DEV_80211, 4),
  88         {},
  89 };
  90 MODULE_DEVICE_TABLE(ssb, b43legacy_ssb_tbl);
  91
  92
  93 /* Channel and ratetables are shared for all devices.
  94  * They can't be const, because ieee80211 puts some precalculated
  95  * data in there. This data is the same for all devices, so we don't
  96  * get concurrency issues */
  97 #define RATETAB_ENT(_rateid, _flags) \
  98         {                                                               \
  99                 .bitrate        = B43legacy_RATE_TO_100KBPS(_rateid),   \
 100                 .hw_value       = (_rateid),                            \
 101                 .flags          = (_flags),                             \
 102         }
 103 /*
 104  * NOTE: When changing this, sync with xmit.c's
 105  *       b43legacy_plcp_get_bitrate_idx_* functions!
 106  */
 107 static struct ieee80211_rate __b43legacy_ratetable[] = {
 108         RATETAB_ENT(B43legacy_CCK_RATE_1MB, 0),
 109         RATETAB_ENT(B43legacy_CCK_RATE_2MB, IEEE80211_RATE_SHORT_PREAMBLE),
 110         RATETAB_ENT(B43legacy_CCK_RATE_5MB, IEEE80211_RATE_SHORT_PREAMBLE),
 111         RATETAB_ENT(B43legacy_CCK_RATE_11MB, IEEE80211_RATE_SHORT_PREAMBLE),
 112         RATETAB_ENT(B43legacy_OFDM_RATE_6MB, 0),
 113         RATETAB_ENT(B43legacy_OFDM_RATE_9MB, 0),
 114         RATETAB_ENT(B43legacy_OFDM_RATE_12MB, 0),
 115         RATETAB_ENT(B43legacy_OFDM_RATE_18MB, 0),
 116         RATETAB_ENT(B43legacy_OFDM_RATE_24MB, 0),
 117         RATETAB_ENT(B43legacy_OFDM_RATE_36MB, 0),
 118         RATETAB_ENT(B43legacy_OFDM_RATE_48MB, 0),
 119         RATETAB_ENT(B43legacy_OFDM_RATE_54MB, 0),
 120 };
 121 #define b43legacy_b_ratetable           (__b43legacy_ratetable + 0)
 122 #define b43legacy_b_ratetable_size      4
 123 #define b43legacy_g_ratetable           (__b43legacy_ratetable + 0)
 124 #define b43legacy_g_ratetable_size      12
 125
 126 #define CHANTAB_ENT(_chanid, _freq) \
 127         {                                                       \
 128                 .center_freq    = (_freq),                      \
 129                 .hw_value       = (_chanid),                    \
 130         }
 131 static struct ieee80211_channel b43legacy_bg_chantable[] = {
 132         CHANTAB_ENT(1, 2412),
 133         CHANTAB_ENT(2, 2417),
 134         CHANTAB_ENT(3, 2422),
 135         CHANTAB_ENT(4, 2427),
 136         CHANTAB_ENT(5, 2432),
 137         CHANTAB_ENT(6, 2437),
 138         CHANTAB_ENT(7, 2442),
 139         CHANTAB_ENT(8, 2447),
 140         CHANTAB_ENT(9, 2452),
 141         CHANTAB_ENT(10, 2457),
 142         CHANTAB_ENT(11, 2462),
 143         CHANTAB_ENT(12, 2467),
 144         CHANTAB_ENT(13, 2472),
 145         CHANTAB_ENT(14, 2484),
 146 };
 147
 148 static struct ieee80211_supported_band b43legacy_band_2GHz_BPHY = {
 149         .channels = b43legacy_bg_chantable,
 150         .n_channels = ARRAY_SIZE(b43legacy_bg_chantable),
 151         .bitrates = b43legacy_b_ratetable,
 152         .n_bitrates = b43legacy_b_ratetable_size,
 153 };
 154
 155 static struct ieee80211_supported_band b43legacy_band_2GHz_GPHY = {
 156         .channels = b43legacy_bg_chantable,
 157         .n_channels = ARRAY_SIZE(b43legacy_bg_chantable),
 158         .bitrates = b43legacy_g_ratetable,
 159         .n_bitrates = b43legacy_g_ratetable_size,
 160 };
 161
 162 static void b43legacy_wireless_core_exit(struct b43legacy_wldev *dev);
 163 static int b43legacy_wireless_core_init(struct b43legacy_wldev *dev);
 164 static void b43legacy_wireless_core_stop(struct b43legacy_wldev *dev);
 165 static int b43legacy_wireless_core_start(struct b43legacy_wldev *dev);
 166
 167
 168 static int b43legacy_ratelimit(struct b43legacy_wl *wl)
 169 {
 170         if (!wl || !wl->current_dev)
 171                 return 1;
 172         if (b43legacy_status(wl->current_dev) < B43legacy_STAT_STARTED)
 173                 return 1;
 174         /* We are up and running.
 175          * Ratelimit the messages to avoid DoS over the net. */
 176         return net_ratelimit();
 177 }
 178
 179 void b43legacyinfo(struct b43legacy_wl *wl, const char *fmt, ...)
 180 {
 181         struct va_format vaf;
 182         va_list args;
 183
 184         if (!b43legacy_ratelimit(wl))
 185                 return;
 186
 187         va_start(args, fmt);
 188
 189         vaf.fmt = fmt;
 190         vaf.va = &args;
 191
 192         printk(KERN_INFO "b43legacy-%s: %pV",
 193                (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan", &vaf);
 194
 195         va_end(args);
 196 }
 197
 198 void b43legacyerr(struct b43legacy_wl *wl, const char *fmt, ...)
 199 {
 200         struct va_format vaf;
 201         va_list args;
 202
 203         if (!b43legacy_ratelimit(wl))
 204                 return;
 205
 206         va_start(args, fmt);
 207
 208         vaf.fmt = fmt;
 209         vaf.va = &args;
 210
 211         printk(KERN_ERR "b43legacy-%s ERROR: %pV",
 212                (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan", &vaf);
 213
 214         va_end(args);
 215 }
 216
 217 void b43legacywarn(struct b43legacy_wl *wl, const char *fmt, ...)
 218 {
 219         struct va_format vaf;
 220         va_list args;
 221
 222         if (!b43legacy_ratelimit(wl))
 223                 return;
 224
 225         va_start(args, fmt);
 226
 227         vaf.fmt = fmt;
 228         vaf.va = &args;
 229
 230         printk(KERN_WARNING "b43legacy-%s warning: %pV",
 231                (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan", &vaf);
 232
 233         va_end(args);
 234 }
 235
 236 #if B43legacy_DEBUG
 237 void b43legacydbg(struct b43legacy_wl *wl, const char *fmt, ...)
 238 {
 239         struct va_format vaf;
 240         va_list args;
 241
 242         va_start(args, fmt);
 243
 244         vaf.fmt = fmt;
 245         vaf.va = &args;
 246
 247         printk(KERN_DEBUG "b43legacy-%s debug: %pV",
 248                (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan", &vaf);
 249
 250         va_end(args);
 251 }
 252 #endif /* DEBUG */
 253
 254 static void b43legacy_ram_write(struct b43legacy_wldev *dev, u16 offset,
 255                                 u32 val)
 256 {
 257         u32 status;
 258
 259         B43legacy_WARN_ON(offset % 4 != 0);
 260
 261         status = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
 262         if (status & B43legacy_MACCTL_BE)
 263                 val = swab32(val);
 264
 265         b43legacy_write32(dev, B43legacy_MMIO_RAM_CONTROL, offset);
 266         mmiowb();
 267         b43legacy_write32(dev, B43legacy_MMIO_RAM_DATA, val);
 268 }
 269
 270 static inline
 271 void b43legacy_shm_control_word(struct b43legacy_wldev *dev,
 272                                 u16 routing, u16 offset)
 273 {
 274         u32 control;
 275
 276         /* "offset" is the WORD offset. */
 277
 278         control = routing;
 279         control <<= 16;
 280         control |= offset;
 281         b43legacy_write32(dev, B43legacy_MMIO_SHM_CONTROL, control);
 282 }
 283
 284 u32 b43legacy_shm_read32(struct b43legacy_wldev *dev,
 285                        u16 routing, u16 offset)
 286 {
 287         u32 ret;
 288
 289         if (routing == B43legacy_SHM_SHARED) {
 290                 B43legacy_WARN_ON((offset & 0x0001) != 0);
 291                 if (offset & 0x0003) {
 292                         /* Unaligned access */
 293                         b43legacy_shm_control_word(dev, routing, offset >> 2);
 294                         ret = b43legacy_read16(dev,
 295                                 B43legacy_MMIO_SHM_DATA_UNALIGNED);
 296                         ret <<= 16;
 297                         b43legacy_shm_control_word(dev, routing,
 298                                                      (offset >> 2) + 1);
 299                         ret |= b43legacy_read16(dev, B43legacy_MMIO_SHM_DATA);
 300
 301                         return ret;
 302                 }
 303                 offset >>= 2;
 304         }
 305         b43legacy_shm_control_word(dev, routing, offset);
 306         ret = b43legacy_read32(dev, B43legacy_MMIO_SHM_DATA);
 307
 308         return ret;
 309 }
 310
 311 u16 b43legacy_shm_read16(struct b43legacy_wldev *dev,
 312                            u16 routing, u16 offset)
 313 {
 314         u16 ret;
 315
 316         if (routing == B43legacy_SHM_SHARED) {
 317                 B43legacy_WARN_ON((offset & 0x0001) != 0);
 318                 if (offset & 0x0003) {
 319                         /* Unaligned access */
 320                         b43legacy_shm_control_word(dev, routing, offset >> 2);
 321                         ret = b43legacy_read16(dev,
 322                                              B43legacy_MMIO_SHM_DATA_UNALIGNED);
 323
 324                         return ret;
 325                 }
 326                 offset >>= 2;
 327         }
 328         b43legacy_shm_control_word(dev, routing, offset);
 329         ret = b43legacy_read16(dev, B43legacy_MMIO_SHM_DATA);
 330
 331         return ret;
 332 }
 333
 334 void b43legacy_shm_write32(struct b43legacy_wldev *dev,
 335                            u16 routing, u16 offset,
 336                            u32 value)
 337 {
 338         if (routing == B43legacy_SHM_SHARED) {
 339                 B43legacy_WARN_ON((offset & 0x0001) != 0);
 340                 if (offset & 0x0003) {
 341                         /* Unaligned access */
 342                         b43legacy_shm_control_word(dev, routing, offset >> 2);
 343                         mmiowb();
 344                         b43legacy_write16(dev,
 345                                           B43legacy_MMIO_SHM_DATA_UNALIGNED,
 346                                           (value >> 16) & 0xffff);
 347                         mmiowb();
 348                         b43legacy_shm_control_word(dev, routing,
 349                                                    (offset >> 2) + 1);
 350                         mmiowb();
 351                         b43legacy_write16(dev, B43legacy_MMIO_SHM_DATA,
 352                                           value & 0xffff);
 353                         return;
 354                 }
 355                 offset >>= 2;
 356         }
 357         b43legacy_shm_control_word(dev, routing, offset);
 358         mmiowb();
 359         b43legacy_write32(dev, B43legacy_MMIO_SHM_DATA, value);
 360 }
 361
 362 void b43legacy_shm_write16(struct b43legacy_wldev *dev, u16 routing, u16 offset,
 363                            u16 value)
 364 {
 365         if (routing == B43legacy_SHM_SHARED) {
 366                 B43legacy_WARN_ON((offset & 0x0001) != 0);
 367                 if (offset & 0x0003) {
 368                         /* Unaligned access */
 369                         b43legacy_shm_control_word(dev, routing, offset >> 2);
 370                         mmiowb();
 371                         b43legacy_write16(dev,
 372                                           B43legacy_MMIO_SHM_DATA_UNALIGNED,
 373                                           value);
 374                         return;
 375                 }
 376                 offset >>= 2;
 377         }
 378         b43legacy_shm_control_word(dev, routing, offset);
 379         mmiowb();
 380         b43legacy_write16(dev, B43legacy_MMIO_SHM_DATA, value);
 381 }
 382
 383 /* Read HostFlags */
 384 u32 b43legacy_hf_read(struct b43legacy_wldev *dev)
 385 {
 386         u32 ret;
 387
 388         ret = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
 389                                    B43legacy_SHM_SH_HOSTFHI);
 390         ret <<= 16;
 391         ret |= b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
 392                                     B43legacy_SHM_SH_HOSTFLO);
 393
 394         return ret;
 395 }
 396
 397 /* Write HostFlags */
 398 void b43legacy_hf_write(struct b43legacy_wldev *dev, u32 value)
 399 {
 400         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
 401                               B43legacy_SHM_SH_HOSTFLO,
 402                               (value & 0x0000FFFF));
 403         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
 404                               B43legacy_SHM_SH_HOSTFHI,
 405                               ((value & 0xFFFF0000) >> 16));
 406 }
 407
 408 void b43legacy_tsf_read(struct b43legacy_wldev *dev, u64 *tsf)
 409 {
 410         /* We need to be careful. As we read the TSF from multiple
 411          * registers, we should take care of register overflows.
 412          * In theory, the whole tsf read process should be atomic.
 413          * We try to be atomic here, by restaring the read process,
 414          * if any of the high registers changed (overflew).
 415          */
 416         if (dev->dev->id.revision >= 3) {
 417                 u32 low;
 418                 u32 high;
 419                 u32 high2;
 420
 421                 do {
 422                         high = b43legacy_read32(dev,
 423                                         B43legacy_MMIO_REV3PLUS_TSF_HIGH);
 424                         low = b43legacy_read32(dev,
 425                                         B43legacy_MMIO_REV3PLUS_TSF_LOW);
 426                         high2 = b43legacy_read32(dev,
 427                                         B43legacy_MMIO_REV3PLUS_TSF_HIGH);
 428                 } while (unlikely(high != high2));
 429
 430                 *tsf = high;
 431                 *tsf <<= 32;
 432                 *tsf |= low;
 433         } else {
 434                 u64 tmp;
 435                 u16 v0;
 436                 u16 v1;
 437                 u16 v2;
 438                 u16 v3;
 439                 u16 test1;
 440                 u16 test2;
 441                 u16 test3;
 442
 443                 do {
 444                         v3 = b43legacy_read16(dev, B43legacy_MMIO_TSF_3);
 445                         v2 = b43legacy_read16(dev, B43legacy_MMIO_TSF_2);
 446                         v1 = b43legacy_read16(dev, B43legacy_MMIO_TSF_1);
 447                         v0 = b43legacy_read16(dev, B43legacy_MMIO_TSF_0);
 448
 449                         test3 = b43legacy_read16(dev, B43legacy_MMIO_TSF_3);
 450                         test2 = b43legacy_read16(dev, B43legacy_MMIO_TSF_2);
 451                         test1 = b43legacy_read16(dev, B43legacy_MMIO_TSF_1);
 452                 } while (v3 != test3 || v2 != test2 || v1 != test1);
 453
 454                 *tsf = v3;
 455                 *tsf <<= 48;
 456                 tmp = v2;
 457                 tmp <<= 32;
 458                 *tsf |= tmp;
 459                 tmp = v1;
 460                 tmp <<= 16;
 461                 *tsf |= tmp;
 462                 *tsf |= v0;
 463         }
 464 }
 465
 466 static void b43legacy_time_lock(struct b43legacy_wldev *dev)
 467 {
 468         u32 status;
 469
 470         status = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
 471         status |= B43legacy_MACCTL_TBTTHOLD;
 472         b43legacy_write32(dev, B43legacy_MMIO_MACCTL, status);
 473         mmiowb();
 474 }
 475
 476 static void b43legacy_time_unlock(struct b43legacy_wldev *dev)
 477 {
 478         u32 status;
 479
 480         status = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
 481         status &= ~B43legacy_MACCTL_TBTTHOLD;
 482         b43legacy_write32(dev, B43legacy_MMIO_MACCTL, status);
 483 }
 484
 485 static void b43legacy_tsf_write_locked(struct b43legacy_wldev *dev, u64 tsf)
 486 {
 487         /* Be careful with the in-progress timer.
 488          * First zero out the low register, so we have a full
 489          * register-overflow duration to complete the operation.
 490          */
 491         if (dev->dev->id.revision >= 3) {
 492                 u32 lo = (tsf & 0x00000000FFFFFFFFULL);
 493                 u32 hi = (tsf & 0xFFFFFFFF00000000ULL) >> 32;
 494
 495                 b43legacy_write32(dev, B43legacy_MMIO_REV3PLUS_TSF_LOW, 0);
 496                 mmiowb();
 497                 b43legacy_write32(dev, B43legacy_MMIO_REV3PLUS_TSF_HIGH,
 498                                     hi);
 499                 mmiowb();
 500                 b43legacy_write32(dev, B43legacy_MMIO_REV3PLUS_TSF_LOW,
 501                                     lo);
 502         } else {
 503                 u16 v0 = (tsf & 0x000000000000FFFFULL);
 504                 u16 v1 = (tsf & 0x00000000FFFF0000ULL) >> 16;
 505                 u16 v2 = (tsf & 0x0000FFFF00000000ULL) >> 32;
 506                 u16 v3 = (tsf & 0xFFFF000000000000ULL) >> 48;
 507
 508                 b43legacy_write16(dev, B43legacy_MMIO_TSF_0, 0);
 509                 mmiowb();
 510                 b43legacy_write16(dev, B43legacy_MMIO_TSF_3, v3);
 511                 mmiowb();
 512                 b43legacy_write16(dev, B43legacy_MMIO_TSF_2, v2);
 513                 mmiowb();
 514                 b43legacy_write16(dev, B43legacy_MMIO_TSF_1, v1);
 515                 mmiowb();
 516                 b43legacy_write16(dev, B43legacy_MMIO_TSF_0, v0);
 517         }
 518 }
 519
 520 void b43legacy_tsf_write(struct b43legacy_wldev *dev, u64 tsf)
 521 {
 522         b43legacy_time_lock(dev);
 523         b43legacy_tsf_write_locked(dev, tsf);
 524         b43legacy_time_unlock(dev);
 525 }
 526
 527 static
 528 void b43legacy_macfilter_set(struct b43legacy_wldev *dev,
 529                              u16 offset, const u8 *mac)
 530 {
 531         static const u8 zero_addr[ETH_ALEN] = { 0 };
 532         u16 data;
 533
 534         if (!mac)
 535                 mac = zero_addr;
 536
 537         offset |= 0x0020;
 538         b43legacy_write16(dev, B43legacy_MMIO_MACFILTER_CONTROL, offset);
 539
 540         data = mac[0];
 541         data |= mac[1] << 8;
 542         b43legacy_write16(dev, B43legacy_MMIO_MACFILTER_DATA, data);
 543         data = mac[2];
 544         data |= mac[3] << 8;
 545         b43legacy_write16(dev, B43legacy_MMIO_MACFILTER_DATA, data);
 546         data = mac[4];
 547         data |= mac[5] << 8;
 548         b43legacy_write16(dev, B43legacy_MMIO_MACFILTER_DATA, data);
 549 }
 550
 551 static void b43legacy_write_mac_bssid_templates(struct b43legacy_wldev *dev)
 552 {
 553         static const u8 zero_addr[ETH_ALEN] = { 0 };
 554         const u8 *mac = dev->wl->mac_addr;
 555         const u8 *bssid = dev->wl->bssid;
 556         u8 mac_bssid[ETH_ALEN * 2];
 557         int i;
 558         u32 tmp;
 559
 560         if (!bssid)
 561                 bssid = zero_addr;
 562         if (!mac)
 563                 mac = zero_addr;
 564
 565         b43legacy_macfilter_set(dev, B43legacy_MACFILTER_BSSID, bssid);
 566
 567         memcpy(mac_bssid, mac, ETH_ALEN);
 568         memcpy(mac_bssid + ETH_ALEN, bssid, ETH_ALEN);
 569
 570         /* Write our MAC address and BSSID to template ram */
 571         for (i = 0; i < ARRAY_SIZE(mac_bssid); i += sizeof(u32)) {
 572                 tmp =  (u32)(mac_bssid[i + 0]);
 573                 tmp |= (u32)(mac_bssid[i + 1]) << 8;
 574                 tmp |= (u32)(mac_bssid[i + 2]) << 16;
 575                 tmp |= (u32)(mac_bssid[i + 3]) << 24;
 576                 b43legacy_ram_write(dev, 0x20 + i, tmp);
 577                 b43legacy_ram_write(dev, 0x78 + i, tmp);
 578                 b43legacy_ram_write(dev, 0x478 + i, tmp);
 579         }
 580 }
 581
 582 static void b43legacy_upload_card_macaddress(struct b43legacy_wldev *dev)
 583 {
 584         b43legacy_write_mac_bssid_templates(dev);
 585         b43legacy_macfilter_set(dev, B43legacy_MACFILTER_SELF,
 586                                 dev->wl->mac_addr);
 587 }
 588
 589 static void b43legacy_set_slot_time(struct b43legacy_wldev *dev,
 590                                     u16 slot_time)
 591 {
 592         /* slot_time is in usec. */
 593         if (dev->phy.type != B43legacy_PHYTYPE_G)
 594                 return;
 595         b43legacy_write16(dev, 0x684, 510 + slot_time);
 596         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x0010,
 597                               slot_time);
 598 }
 599
 600 static void b43legacy_short_slot_timing_enable(struct b43legacy_wldev *dev)
 601 {
 602         b43legacy_set_slot_time(dev, 9);
 603 }
 604
 605 static void b43legacy_short_slot_timing_disable(struct b43legacy_wldev *dev)
 606 {
 607         b43legacy_set_slot_time(dev, 20);
 608 }
 609
 610 /* Synchronize IRQ top- and bottom-half.
 611  * IRQs must be masked before calling this.
 612  * This must not be called with the irq_lock held.
 613  */
 614 static void b43legacy_synchronize_irq(struct b43legacy_wldev *dev)
 615 {
 616         synchronize_irq(dev->dev->irq);
 617         tasklet_kill(&dev->isr_tasklet);
 618 }
 619
 620 /* DummyTransmission function, as documented on
 621  * http://bcm-specs.sipsolutions.net/DummyTransmission
 622  */
 623 void b43legacy_dummy_transmission(struct b43legacy_wldev *dev)
 624 {
 625         struct b43legacy_phy *phy = &dev->phy;
 626         unsigned int i;
 627         unsigned int max_loop;
 628         u16 value;
 629         u32 buffer[5] = {
 630                 0x00000000,
 631                 0x00D40000,
 632                 0x00000000,
 633                 0x01000000,
 634                 0x00000000,
 635         };
 636
 637         switch (phy->type) {
 638         case B43legacy_PHYTYPE_B:
 639         case B43legacy_PHYTYPE_G:
 640                 max_loop = 0xFA;
 641                 buffer[0] = 0x000B846E;
 642                 break;
 643         default:
 644                 B43legacy_BUG_ON(1);
 645                 return;
 646         }
 647
 648         for (i = 0; i < 5; i++)
 649                 b43legacy_ram_write(dev, i * 4, buffer[i]);
 650
 651         /* dummy read follows */
 652         b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
 653
 654         b43legacy_write16(dev, 0x0568, 0x0000);
 655         b43legacy_write16(dev, 0x07C0, 0x0000);
 656         b43legacy_write16(dev, 0x050C, 0x0000);
 657         b43legacy_write16(dev, 0x0508, 0x0000);
 658         b43legacy_write16(dev, 0x050A, 0x0000);
 659         b43legacy_write16(dev, 0x054C, 0x0000);
 660         b43legacy_write16(dev, 0x056A, 0x0014);
 661         b43legacy_write16(dev, 0x0568, 0x0826);
 662         b43legacy_write16(dev, 0x0500, 0x0000);
 663         b43legacy_write16(dev, 0x0502, 0x0030);
 664
 665         if (phy->radio_ver == 0x2050 && phy->radio_rev <= 0x5)
 666                 b43legacy_radio_write16(dev, 0x0051, 0x0017);
 667         for (i = 0x00; i < max_loop; i++) {
 668                 value = b43legacy_read16(dev, 0x050E);
 669                 if (value & 0x0080)
 670                         break;
 671                 udelay(10);
 672         }
 673         for (i = 0x00; i < 0x0A; i++) {
 674                 value = b43legacy_read16(dev, 0x050E);
 675                 if (value & 0x0400)
 676                         break;
 677                 udelay(10);
 678         }
 679         for (i = 0x00; i < 0x0A; i++) {
 680                 value = b43legacy_read16(dev, 0x0690);
 681                 if (!(value & 0x0100))
 682                         break;
 683                 udelay(10);
 684         }
 685         if (phy->radio_ver == 0x2050 && phy->radio_rev <= 0x5)
 686                 b43legacy_radio_write16(dev, 0x0051, 0x0037);
 687 }
 688
 689 /* Turn the Analog ON/OFF */
 690 static void b43legacy_switch_analog(struct b43legacy_wldev *dev, int on)
 691 {
 692         b43legacy_write16(dev, B43legacy_MMIO_PHY0, on ? 0 : 0xF4);
 693 }
 694
 695 void b43legacy_wireless_core_reset(struct b43legacy_wldev *dev, u32 flags)
 696 {
 697         u32 tmslow;
 698         u32 macctl;
 699
 700         flags |= B43legacy_TMSLOW_PHYCLKEN;
 701         flags |= B43legacy_TMSLOW_PHYRESET;
 702         ssb_device_enable(dev->dev, flags);
 703         msleep(2); /* Wait for the PLL to turn on. */
 704
 705         /* Now take the PHY out of Reset again */
 706         tmslow = ssb_read32(dev->dev, SSB_TMSLOW);
 707         tmslow |= SSB_TMSLOW_FGC;
 708         tmslow &= ~B43legacy_TMSLOW_PHYRESET;
 709         ssb_write32(dev->dev, SSB_TMSLOW, tmslow);
 710         ssb_read32(dev->dev, SSB_TMSLOW); /* flush */
 711         msleep(1);
 712         tmslow &= ~SSB_TMSLOW_FGC;
 713         ssb_write32(dev->dev, SSB_TMSLOW, tmslow);
 714         ssb_read32(dev->dev, SSB_TMSLOW); /* flush */
 715         msleep(1);
 716
 717         /* Turn Analog ON */
 718         b43legacy_switch_analog(dev, 1);
 719
 720         macctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
 721         macctl &= ~B43legacy_MACCTL_GMODE;
 722         if (flags & B43legacy_TMSLOW_GMODE) {
 723                 macctl |= B43legacy_MACCTL_GMODE;
 724                 dev->phy.gmode = true;
 725         } else
 726                 dev->phy.gmode = false;
 727         macctl |= B43legacy_MACCTL_IHR_ENABLED;
 728         b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl);
 729 }
 730
 731 static void handle_irq_transmit_status(struct b43legacy_wldev *dev)
 732 {
 733         u32 v0;
 734         u32 v1;
 735         u16 tmp;
 736         struct b43legacy_txstatus stat;
 737
 738         while (1) {
 739                 v0 = b43legacy_read32(dev, B43legacy_MMIO_XMITSTAT_0);
 740                 if (!(v0 & 0x00000001))
 741                         break;
 742                 v1 = b43legacy_read32(dev, B43legacy_MMIO_XMITSTAT_1);
 743
 744                 stat.cookie = (v0 >> 16);
 745                 stat.seq = (v1 & 0x0000FFFF);
 746                 stat.phy_stat = ((v1 & 0x00FF0000) >> 16);
 747                 tmp = (v0 & 0x0000FFFF);
 748                 stat.frame_count = ((tmp & 0xF000) >> 12);
 749                 stat.rts_count = ((tmp & 0x0F00) >> 8);
 750                 stat.supp_reason = ((tmp & 0x001C) >> 2);
 751                 stat.pm_indicated = !!(tmp & 0x0080);
 752                 stat.intermediate = !!(tmp & 0x0040);
 753                 stat.for_ampdu = !!(tmp & 0x0020);
 754                 stat.acked = !!(tmp & 0x0002);
 755
 756                 b43legacy_handle_txstatus(dev, &stat);
 757         }
 758 }
 759
 760 static void drain_txstatus_queue(struct b43legacy_wldev *dev)
 761 {
 762         u32 dummy;
 763
 764         if (dev->dev->id.revision < 5)
 765                 return;
 766         /* Read all entries from the microcode TXstatus FIFO
 767          * and throw them away.
 768          */
 769         while (1) {
 770                 dummy = b43legacy_read32(dev, B43legacy_MMIO_XMITSTAT_0);
 771                 if (!(dummy & 0x00000001))
 772                         break;
 773                 dummy = b43legacy_read32(dev, B43legacy_MMIO_XMITSTAT_1);
 774         }
 775 }
 776
 777 static u32 b43legacy_jssi_read(struct b43legacy_wldev *dev)
 778 {
 779         u32 val = 0;
 780
 781         val = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED, 0x40A);
 782         val <<= 16;
 783         val |= b43legacy_shm_read16(dev, B43legacy_SHM_SHARED, 0x408);
 784
 785         return val;
 786 }
 787
 788 static void b43legacy_jssi_write(struct b43legacy_wldev *dev, u32 jssi)
 789 {
 790         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x408,
 791                               (jssi & 0x0000FFFF));
 792         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x40A,
 793                               (jssi & 0xFFFF0000) >> 16);
 794 }
 795
 796 static void b43legacy_generate_noise_sample(struct b43legacy_wldev *dev)
 797 {
 798         b43legacy_jssi_write(dev, 0x7F7F7F7F);
 799         b43legacy_write32(dev, B43legacy_MMIO_MACCMD,
 800                           b43legacy_read32(dev, B43legacy_MMIO_MACCMD)
 801                           | B43legacy_MACCMD_BGNOISE);
 802         B43legacy_WARN_ON(dev->noisecalc.channel_at_start !=
 803                             dev->phy.channel);
 804 }
 805
 806 static void b43legacy_calculate_link_quality(struct b43legacy_wldev *dev)
 807 {
 808         /* Top half of Link Quality calculation. */
 809
 810         if (dev->noisecalc.calculation_running)
 811                 return;
 812         dev->noisecalc.channel_at_start = dev->phy.channel;
 813         dev->noisecalc.calculation_running = true;
 814         dev->noisecalc.nr_samples = 0;
 815
 816         b43legacy_generate_noise_sample(dev);
 817 }
 818
 819 static void handle_irq_noise(struct b43legacy_wldev *dev)
 820 {
 821         struct b43legacy_phy *phy = &dev->phy;
 822         u16 tmp;
 823         u8 noise[4];
 824         u8 i;
 825         u8 j;
 826         s32 average;
 827
 828         /* Bottom half of Link Quality calculation. */
 829
 830         B43legacy_WARN_ON(!dev->noisecalc.calculation_running);
 831         if (dev->noisecalc.channel_at_start != phy->channel)
 832                 goto drop_calculation;
 833         *((__le32 *)noise) = cpu_to_le32(b43legacy_jssi_read(dev));
 834         if (noise[0] == 0x7F || noise[1] == 0x7F ||
 835             noise[2] == 0x7F || noise[3] == 0x7F)
 836                 goto generate_new;
 837
 838         /* Get the noise samples. */
 839         B43legacy_WARN_ON(dev->noisecalc.nr_samples >= 8);
 840         i = dev->noisecalc.nr_samples;
 841         noise[0] = clamp_val(noise[0], 0, ARRAY_SIZE(phy->nrssi_lt) - 1);
 842         noise[1] = clamp_val(noise[1], 0, ARRAY_SIZE(phy->nrssi_lt) - 1);
 843         noise[2] = clamp_val(noise[2], 0, ARRAY_SIZE(phy->nrssi_lt) - 1);
 844         noise[3] = clamp_val(noise[3], 0, ARRAY_SIZE(phy->nrssi_lt) - 1);
 845         dev->noisecalc.samples[i][0] = phy->nrssi_lt[noise[0]];
 846         dev->noisecalc.samples[i][1] = phy->nrssi_lt[noise[1]];
 847         dev->noisecalc.samples[i][2] = phy->nrssi_lt[noise[2]];
 848         dev->noisecalc.samples[i][3] = phy->nrssi_lt[noise[3]];
 849         dev->noisecalc.nr_samples++;
 850         if (dev->noisecalc.nr_samples == 8) {
 851                 /* Calculate the Link Quality by the noise samples. */
 852                 average = 0;
 853                 for (i = 0; i < 8; i++) {
 854                         for (j = 0; j < 4; j++)
 855                                 average += dev->noisecalc.samples[i][j];
 856                 }
 857                 average /= (8 * 4);
 858                 average *= 125;
 859                 average += 64;
 860                 average /= 128;
 861                 tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
 862                                              0x40C);
 863                 tmp = (tmp / 128) & 0x1F;
 864                 if (tmp >= 8)
 865                         average += 2;
 866                 else
 867                         average -= 25;
 868                 if (tmp == 8)
 869                         average -= 72;
 870                 else
 871                         average -= 48;
 872
 873                 dev->stats.link_noise = average;
 874 drop_calculation:
 875                 dev->noisecalc.calculation_running = false;
 876                 return;
 877         }
 878 generate_new:
 879         b43legacy_generate_noise_sample(dev);
 880 }
 881
 882 static void handle_irq_tbtt_indication(struct b43legacy_wldev *dev)
 883 {
 884         if (b43legacy_is_mode(dev->wl, NL80211_IFTYPE_AP)) {
 885                 /* TODO: PS TBTT */
 886         } else {
 887                 if (1/*FIXME: the last PSpoll frame was sent successfully */)
 888                         b43legacy_power_saving_ctl_bits(dev, -1, -1);
 889         }
 890         if (b43legacy_is_mode(dev->wl, NL80211_IFTYPE_ADHOC))
 891                 dev->dfq_valid = true;
 892 }
 893
 894 static void handle_irq_atim_end(struct b43legacy_wldev *dev)
 895 {
 896         if (dev->dfq_valid) {
 897                 b43legacy_write32(dev, B43legacy_MMIO_MACCMD,
 898                                   b43legacy_read32(dev, B43legacy_MMIO_MACCMD)
 899                                   | B43legacy_MACCMD_DFQ_VALID);
 900                 dev->dfq_valid = false;
 901         }
 902 }
 903
 904 static void handle_irq_pmq(struct b43legacy_wldev *dev)
 905 {
 906         u32 tmp;
 907
 908         /* TODO: AP mode. */
 909
 910         while (1) {
 911                 tmp = b43legacy_read32(dev, B43legacy_MMIO_PS_STATUS);
 912                 if (!(tmp & 0x00000008))
 913                         break;
 914         }
 915         /* 16bit write is odd, but correct. */
 916         b43legacy_write16(dev, B43legacy_MMIO_PS_STATUS, 0x0002);
 917 }
 918
 919 static void b43legacy_write_template_common(struct b43legacy_wldev *dev,
 920                                             const u8 *data, u16 size,
 921                                             u16 ram_offset,
 922                                             u16 shm_size_offset, u8 rate)
 923 {
 924         u32 i;
 925         u32 tmp;
 926         struct b43legacy_plcp_hdr4 plcp;
 927
 928         plcp.data = 0;
 929         b43legacy_generate_plcp_hdr(&plcp, size + FCS_LEN, rate);
 930         b43legacy_ram_write(dev, ram_offset, le32_to_cpu(plcp.data));
 931         ram_offset += sizeof(u32);
 932         /* The PLCP is 6 bytes long, but we only wrote 4 bytes, yet.
 933          * So leave the first two bytes of the next write blank.
 934          */
 935         tmp = (u32)(data[0]) << 16;
 936         tmp |= (u32)(data[1]) << 24;
 937         b43legacy_ram_write(dev, ram_offset, tmp);
 938         ram_offset += sizeof(u32);
 939         for (i = 2; i < size; i += sizeof(u32)) {
 940                 tmp = (u32)(data[i + 0]);
 941                 if (i + 1 < size)
 942                         tmp |= (u32)(data[i + 1]) << 8;
 943                 if (i + 2 < size)
 944                         tmp |= (u32)(data[i + 2]) << 16;
 945                 if (i + 3 < size)
 946                         tmp |= (u32)(data[i + 3]) << 24;
 947                 b43legacy_ram_write(dev, ram_offset + i - 2, tmp);
 948         }
 949         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, shm_size_offset,
 950                               size + sizeof(struct b43legacy_plcp_hdr6));
 951 }
 952
 953 /* Convert a b43legacy antenna number value to the PHY TX control value. */
 954 static u16 b43legacy_antenna_to_phyctl(int antenna)
 955 {
 956         switch (antenna) {
 957         case B43legacy_ANTENNA0:
 958                 return B43legacy_TX4_PHY_ANT0;
 959         case B43legacy_ANTENNA1:
 960                 return B43legacy_TX4_PHY_ANT1;
 961         }
 962         return B43legacy_TX4_PHY_ANTLAST;
 963 }
 964
 965 static void b43legacy_write_beacon_template(struct b43legacy_wldev *dev,
 966                                             u16 ram_offset,
 967                                             u16 shm_size_offset)
 968 {
 969
 970         unsigned int i, len, variable_len;
 971         const struct ieee80211_mgmt *bcn;
 972         const u8 *ie;
 973         bool tim_found = false;
 974         unsigned int rate;
 975         u16 ctl;
 976         int antenna;
 977         struct ieee80211_tx_info *info = IEEE80211_SKB_CB(dev->wl->current_beacon);
 978
 979         bcn = (const struct ieee80211_mgmt *)(dev->wl->current_beacon->data);
 980         len = min_t(size_t, dev->wl->current_beacon->len,
 981                   0x200 - sizeof(struct b43legacy_plcp_hdr6));
 982         rate = ieee80211_get_tx_rate(dev->wl->hw, info)->hw_value;
 983
 984         b43legacy_write_template_common(dev, (const u8 *)bcn, len, ram_offset,
 985                                         shm_size_offset, rate);
 986
 987         /* Write the PHY TX control parameters. */
 988         antenna = B43legacy_ANTENNA_DEFAULT;
 989         antenna = b43legacy_antenna_to_phyctl(antenna);
 990         ctl = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
 991                                    B43legacy_SHM_SH_BEACPHYCTL);
 992         /* We can't send beacons with short preamble. Would get PHY errors. */
 993         ctl &= ~B43legacy_TX4_PHY_SHORTPRMBL;
 994         ctl &= ~B43legacy_TX4_PHY_ANT;
 995         ctl &= ~B43legacy_TX4_PHY_ENC;
 996         ctl |= antenna;
 997         ctl |= B43legacy_TX4_PHY_ENC_CCK;
 998         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
 999                               B43legacy_SHM_SH_BEACPHYCTL, ctl);
1000
1001         /* Find the position of the TIM and the DTIM_period value
1002          * and write them to SHM. */
1003         ie = bcn->u.beacon.variable;
1004         variable_len = len - offsetof(struct ieee80211_mgmt, u.beacon.variable);
1005         for (i = 0; i < variable_len - 2; ) {
1006                 uint8_t ie_id, ie_len;
1007
1008                 ie_id = ie[i];
1009                 ie_len = ie[i + 1];
1010                 if (ie_id == 5) {
1011                         u16 tim_position;
1012                         u16 dtim_period;
1013                         /* This is the TIM Information Element */
1014
1015                         /* Check whether the ie_len is in the beacon data range. */
1016                         if (variable_len < ie_len + 2 + i)
1017                                 break;
1018                         /* A valid TIM is at least 4 bytes long. */
1019                         if (ie_len < 4)
1020                                 break;
1021                         tim_found = true;
1022
1023                         tim_position = sizeof(struct b43legacy_plcp_hdr6);
1024                         tim_position += offsetof(struct ieee80211_mgmt,
1025                                                  u.beacon.variable);
1026                         tim_position += i;
1027
1028                         dtim_period = ie[i + 3];
1029
1030                         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
1031                                         B43legacy_SHM_SH_TIMPOS, tim_position);
1032                         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
1033                                         B43legacy_SHM_SH_DTIMP, dtim_period);
1034                         break;
1035                 }
1036                 i += ie_len + 2;
1037         }
1038         if (!tim_found) {
1039                 b43legacywarn(dev->wl, "Did not find a valid TIM IE in the "
1040                               "beacon template packet. AP or IBSS operation "
1041                               "may be broken.\n");
1042         } else
1043                 b43legacydbg(dev->wl, "Updated beacon template\n");
1044 }
1045
1046 static void b43legacy_write_probe_resp_plcp(struct b43legacy_wldev *dev,
1047                                             u16 shm_offset, u16 size,
1048                                             struct ieee80211_rate *rate)
1049 {
1050         struct b43legacy_plcp_hdr4 plcp;
1051         u32 tmp;
1052         __le16 dur;
1053
1054         plcp.data = 0;
1055         b43legacy_generate_plcp_hdr(&plcp, size + FCS_LEN, rate->hw_value);
1056         dur = ieee80211_generic_frame_duration(dev->wl->hw,
1057                                                dev->wl->vif,
1058                                                IEEE80211_BAND_2GHZ,
1059                                                size,
1060                                                rate);
1061         /* Write PLCP in two parts and timing for packet transfer */
1062         tmp = le32_to_cpu(plcp.data);
1063         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, shm_offset,
1064                               tmp & 0xFFFF);
1065         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, shm_offset + 2,
1066                               tmp >> 16);
1067         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, shm_offset + 6,
1068                               le16_to_cpu(dur));
1069 }
1070
1071 /* Instead of using custom probe response template, this function
1072  * just patches custom beacon template by:
1073  * 1) Changing packet type
1074  * 2) Patching duration field
1075  * 3) Stripping TIM
1076  */
1077 static const u8 *b43legacy_generate_probe_resp(struct b43legacy_wldev *dev,
1078                                                u16 *dest_size,
1079                                                struct ieee80211_rate *rate)
1080 {
1081         const u8 *src_data;
1082         u8 *dest_data;
1083         u16 src_size, elem_size, src_pos, dest_pos;
1084         __le16 dur;
1085         struct ieee80211_hdr *hdr;
1086         size_t ie_start;
1087
1088         src_size = dev->wl->current_beacon->len;
1089         src_data = (const u8 *)dev->wl->current_beacon->data;
1090
1091         /* Get the start offset of the variable IEs in the packet. */
1092         ie_start = offsetof(struct ieee80211_mgmt, u.probe_resp.variable);
1093         B43legacy_WARN_ON(ie_start != offsetof(struct ieee80211_mgmt,
1094                                                u.beacon.variable));
1095
1096         if (B43legacy_WARN_ON(src_size < ie_start))
1097                 return NULL;
1098
1099         dest_data = kmalloc(src_size, GFP_ATOMIC);
1100         if (unlikely(!dest_data))
1101                 return NULL;
1102
1103         /* Copy the static data and all Information Elements, except the TIM. */
1104         memcpy(dest_data, src_data, ie_start);
1105         src_pos = ie_start;
1106         dest_pos = ie_start;
1107         for ( ; src_pos < src_size - 2; src_pos += elem_size) {
1108                 elem_size = src_data[src_pos + 1] + 2;
1109                 if (src_data[src_pos] == 5) {
1110                         /* This is the TIM. */
1111                         continue;
1112                 }
1113                 memcpy(dest_data + dest_pos, src_data + src_pos, elem_size);
1114                 dest_pos += elem_size;
1115         }
1116         *dest_size = dest_pos;
1117         hdr = (struct ieee80211_hdr *)dest_data;
1118
1119         /* Set the frame control. */
1120         hdr->frame_control = cpu_to_le16(IEEE80211_FTYPE_MGMT |
1121                                          IEEE80211_STYPE_PROBE_RESP);
1122         dur = ieee80211_generic_frame_duration(dev->wl->hw,
1123                                                dev->wl->vif,
1124                                                IEEE80211_BAND_2GHZ,
1125                                                *dest_size,
1126                                                rate);
1127         hdr->duration_id = dur;
1128
1129         return dest_data;
1130 }
1131
1132 static void b43legacy_write_probe_resp_template(struct b43legacy_wldev *dev,
1133                                                 u16 ram_offset,
1134                                                 u16 shm_size_offset,
1135                                                 struct ieee80211_rate *rate)
1136 {
1137         const u8 *probe_resp_data;
1138         u16 size;
1139
1140         size = dev->wl->current_beacon->len;
1141         probe_resp_data = b43legacy_generate_probe_resp(dev, &size, rate);
1142         if (unlikely(!probe_resp_data))
1143                 return;
1144
1145         /* Looks like PLCP headers plus packet timings are stored for
1146          * all possible basic rates
1147          */
1148         b43legacy_write_probe_resp_plcp(dev, 0x31A, size,
1149                                         &b43legacy_b_ratetable[0]);
1150         b43legacy_write_probe_resp_plcp(dev, 0x32C, size,
1151                                         &b43legacy_b_ratetable[1]);
1152         b43legacy_write_probe_resp_plcp(dev, 0x33E, size,
1153                                         &b43legacy_b_ratetable[2]);
1154         b43legacy_write_probe_resp_plcp(dev, 0x350, size,
1155                                         &b43legacy_b_ratetable[3]);
1156
1157         size = min_t(size_t, size,
1158                    0x200 - sizeof(struct b43legacy_plcp_hdr6));
1159         b43legacy_write_template_common(dev, probe_resp_data,
1160                                         size, ram_offset,
1161                                         shm_size_offset, rate->hw_value);
1162         kfree(probe_resp_data);
1163 }
1164
1165 static void b43legacy_upload_beacon0(struct b43legacy_wldev *dev)
1166 {
1167         struct b43legacy_wl *wl = dev->wl;
1168
1169         if (wl->beacon0_uploaded)
1170                 return;
1171         b43legacy_write_beacon_template(dev, 0x68, 0x18);
1172         /* FIXME: Probe resp upload doesn't really belong here,
1173          *        but we don't use that feature anyway. */
1174         b43legacy_write_probe_resp_template(dev, 0x268, 0x4A,
1175                                       &__b43legacy_ratetable[3]);
1176         wl->beacon0_uploaded = true;
1177 }
1178
1179 static void b43legacy_upload_beacon1(struct b43legacy_wldev *dev)
1180 {
1181         struct b43legacy_wl *wl = dev->wl;
1182
1183         if (wl->beacon1_uploaded)
1184                 return;
1185         b43legacy_write_beacon_template(dev, 0x468, 0x1A);
1186         wl->beacon1_uploaded = true;
1187 }
1188
1189 static void handle_irq_beacon(struct b43legacy_wldev *dev)
1190 {
1191         struct b43legacy_wl *wl = dev->wl;
1192         u32 cmd, beacon0_valid, beacon1_valid;
1193
1194         if (!b43legacy_is_mode(wl, NL80211_IFTYPE_AP))
1195                 return;
1196
1197         /* This is the bottom half of the asynchronous beacon update. */
1198
1199         /* Ignore interrupt in the future. */
1200         dev->irq_mask &= ~B43legacy_IRQ_BEACON;
1201
1202         cmd = b43legacy_read32(dev, B43legacy_MMIO_MACCMD);
1203         beacon0_valid = (cmd & B43legacy_MACCMD_BEACON0_VALID);
1204         beacon1_valid = (cmd & B43legacy_MACCMD_BEACON1_VALID);
1205
1206         /* Schedule interrupt manually, if busy. */
1207         if (beacon0_valid && beacon1_valid) {
1208                 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON, B43legacy_IRQ_BEACON);
1209                 dev->irq_mask |= B43legacy_IRQ_BEACON;
1210                 return;
1211         }
1212
1213         if (unlikely(wl->beacon_templates_virgin)) {
1214                 /* We never uploaded a beacon before.
1215                  * Upload both templates now, but only mark one valid. */
1216                 wl->beacon_templates_virgin = false;
1217                 b43legacy_upload_beacon0(dev);
1218                 b43legacy_upload_beacon1(dev);
1219                 cmd = b43legacy_read32(dev, B43legacy_MMIO_MACCMD);
1220                 cmd |= B43legacy_MACCMD_BEACON0_VALID;
1221                 b43legacy_write32(dev, B43legacy_MMIO_MACCMD, cmd);
1222         } else {
1223                 if (!beacon0_valid) {
1224                         b43legacy_upload_beacon0(dev);
1225                         cmd = b43legacy_read32(dev, B43legacy_MMIO_MACCMD);
1226                         cmd |= B43legacy_MACCMD_BEACON0_VALID;
1227                         b43legacy_write32(dev, B43legacy_MMIO_MACCMD, cmd);
1228                 } else if (!beacon1_valid) {
1229                         b43legacy_upload_beacon1(dev);
1230                         cmd = b43legacy_read32(dev, B43legacy_MMIO_MACCMD);
1231                         cmd |= B43legacy_MACCMD_BEACON1_VALID;
1232                         b43legacy_write32(dev, B43legacy_MMIO_MACCMD, cmd);
1233                 }
1234         }
1235 }
1236
1237 static void b43legacy_beacon_update_trigger_work(struct work_struct *work)
1238 {
1239         struct b43legacy_wl *wl = container_of(work, struct b43legacy_wl,
1240                                          beacon_update_trigger);
1241         struct b43legacy_wldev *dev;
1242
1243         mutex_lock(&wl->mutex);
1244         dev = wl->current_dev;
1245         if (likely(dev && (b43legacy_status(dev) >= B43legacy_STAT_INITIALIZED))) {
1246                 spin_lock_irq(&wl->irq_lock);
1247                 /* Update beacon right away or defer to IRQ. */
1248                 handle_irq_beacon(dev);
1249                 /* The handler might have updated the IRQ mask. */
1250                 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK,
1251                                   dev->irq_mask);
1252                 mmiowb();
1253                 spin_unlock_irq(&wl->irq_lock);
1254         }
1255         mutex_unlock(&wl->mutex);
1256 }
1257
1258 /* Asynchronously update the packet templates in template RAM.
1259  * Locking: Requires wl->irq_lock to be locked. */
1260 static void b43legacy_update_templates(struct b43legacy_wl *wl)
1261 {
1262         struct sk_buff *beacon;
1263         /* This is the top half of the ansynchronous beacon update. The bottom
1264          * half is the beacon IRQ. Beacon update must be asynchronous to avoid
1265          * sending an invalid beacon. This can happen for example, if the
1266          * firmware transmits a beacon while we are updating it. */
1267
1268         /* We could modify the existing beacon and set the aid bit in the TIM
1269          * field, but that would probably require resizing and moving of data
1270          * within the beacon template. Simply request a new beacon and let
1271          * mac80211 do the hard work. */
1272         beacon = ieee80211_beacon_get(wl->hw, wl->vif);
1273         if (unlikely(!beacon))
1274                 return;
1275
1276         if (wl->current_beacon)
1277                 dev_kfree_skb_any(wl->current_beacon);
1278         wl->current_beacon = beacon;
1279         wl->beacon0_uploaded = false;
1280         wl->beacon1_uploaded = false;
1281         ieee80211_queue_work(wl->hw, &wl->beacon_update_trigger);
1282 }
1283
1284 static void b43legacy_set_beacon_int(struct b43legacy_wldev *dev,
1285                                      u16 beacon_int)
1286 {
1287         b43legacy_time_lock(dev);
1288         if (dev->dev->id.revision >= 3) {
1289                 b43legacy_write32(dev, B43legacy_MMIO_TSF_CFP_REP,
1290                                  (beacon_int << 16));
1291                 b43legacy_write32(dev, B43legacy_MMIO_TSF_CFP_START,
1292                                  (beacon_int << 10));
1293         } else {
1294                 b43legacy_write16(dev, 0x606, (beacon_int >> 6));
1295                 b43legacy_write16(dev, 0x610, beacon_int);
1296         }
1297         b43legacy_time_unlock(dev);
1298         b43legacydbg(dev->wl, "Set beacon interval to %u\n", beacon_int);
1299 }
1300
1301 static void handle_irq_ucode_debug(struct b43legacy_wldev *dev)
1302 {
1303 }
1304
1305 /* Interrupt handler bottom-half */
1306 static void b43legacy_interrupt_tasklet(unsigned long data)
1307 {
1308         struct b43legacy_wldev *dev = (struct b43legacy_wldev *)data;
1309         u32 reason;
1310         u32 dma_reason[ARRAY_SIZE(dev->dma_reason)];
1311         u32 merged_dma_reason = 0;
1312         int i;
1313         unsigned long flags;
1314
1315         spin_lock_irqsave(&dev->wl->irq_lock, flags);
1316
1317         B43legacy_WARN_ON(b43legacy_status(dev) <
1318                           B43legacy_STAT_INITIALIZED);
1319
1320         reason = dev->irq_reason;
1321         for (i = 0; i < ARRAY_SIZE(dma_reason); i++) {
1322                 dma_reason[i] = dev->dma_reason[i];
1323                 merged_dma_reason |= dma_reason[i];
1324         }
1325
1326         if (unlikely(reason & B43legacy_IRQ_MAC_TXERR))
1327                 b43legacyerr(dev->wl, "MAC transmission error\n");
1328
1329         if (unlikely(reason & B43legacy_IRQ_PHY_TXERR)) {
1330                 b43legacyerr(dev->wl, "PHY transmission error\n");
1331                 rmb();
1332                 if (unlikely(atomic_dec_and_test(&dev->phy.txerr_cnt))) {
1333                         b43legacyerr(dev->wl, "Too many PHY TX errors, "
1334                                               "restarting the controller\n");
1335                         b43legacy_controller_restart(dev, "PHY TX errors");
1336                 }
1337         }
1338
1339         if (unlikely(merged_dma_reason & (B43legacy_DMAIRQ_FATALMASK |
1340                                           B43legacy_DMAIRQ_NONFATALMASK))) {
1341                 if (merged_dma_reason & B43legacy_DMAIRQ_FATALMASK) {
1342                         b43legacyerr(dev->wl, "Fatal DMA error: "
1343                                "0x%08X, 0x%08X, 0x%08X, "
1344                                "0x%08X, 0x%08X, 0x%08X\n",
1345                                dma_reason[0], dma_reason[1],
1346                                dma_reason[2], dma_reason[3],
1347                                dma_reason[4], dma_reason[5]);
1348                         b43legacy_controller_restart(dev, "DMA error");
1349                         mmiowb();
1350                         spin_unlock_irqrestore(&dev->wl->irq_lock, flags);
1351                         return;
1352                 }
1353                 if (merged_dma_reason & B43legacy_DMAIRQ_NONFATALMASK)
1354                         b43legacyerr(dev->wl, "DMA error: "
1355                                "0x%08X, 0x%08X, 0x%08X, "
1356                                "0x%08X, 0x%08X, 0x%08X\n",
1357                                dma_reason[0], dma_reason[1],
1358                                dma_reason[2], dma_reason[3],
1359                                dma_reason[4], dma_reason[5]);
1360         }
1361
1362         if (unlikely(reason & B43legacy_IRQ_UCODE_DEBUG))
1363                 handle_irq_ucode_debug(dev);
1364         if (reason & B43legacy_IRQ_TBTT_INDI)
1365                 handle_irq_tbtt_indication(dev);
1366         if (reason & B43legacy_IRQ_ATIM_END)
1367                 handle_irq_atim_end(dev);
1368         if (reason & B43legacy_IRQ_BEACON)
1369                 handle_irq_beacon(dev);
1370         if (reason & B43legacy_IRQ_PMQ)
1371                 handle_irq_pmq(dev);
1372         if (reason & B43legacy_IRQ_TXFIFO_FLUSH_OK)
1373                 ;/*TODO*/
1374         if (reason & B43legacy_IRQ_NOISESAMPLE_OK)
1375                 handle_irq_noise(dev);
1376
1377         /* Check the DMA reason registers for received data. */
1378         if (dma_reason[0] & B43legacy_DMAIRQ_RX_DONE) {
1379                 if (b43legacy_using_pio(dev))
1380                         b43legacy_pio_rx(dev->pio.queue0);
1381                 else
1382                         b43legacy_dma_rx(dev->dma.rx_ring0);
1383         }
1384         B43legacy_WARN_ON(dma_reason[1] & B43legacy_DMAIRQ_RX_DONE);
1385         B43legacy_WARN_ON(dma_reason[2] & B43legacy_DMAIRQ_RX_DONE);
1386         if (dma_reason[3] & B43legacy_DMAIRQ_RX_DONE) {
1387                 if (b43legacy_using_pio(dev))
1388                         b43legacy_pio_rx(dev->pio.queue3);
1389                 else
1390                         b43legacy_dma_rx(dev->dma.rx_ring3);
1391         }
1392         B43legacy_WARN_ON(dma_reason[4] & B43legacy_DMAIRQ_RX_DONE);
1393         B43legacy_WARN_ON(dma_reason[5] & B43legacy_DMAIRQ_RX_DONE);
1394
1395         if (reason & B43legacy_IRQ_TX_OK)
1396                 handle_irq_transmit_status(dev);
1397
1398         b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, dev->irq_mask);
1399         mmiowb();
1400         spin_unlock_irqrestore(&dev->wl->irq_lock, flags);
1401 }
1402
1403 static void pio_irq_workaround(struct b43legacy_wldev *dev,
1404                                u16 base, int queueidx)
1405 {
1406         u16 rxctl;
1407
1408         rxctl = b43legacy_read16(dev, base + B43legacy_PIO_RXCTL);
1409         if (rxctl & B43legacy_PIO_RXCTL_DATAAVAILABLE)
1410                 dev->dma_reason[queueidx] |= B43legacy_DMAIRQ_RX_DONE;
1411         else
1412                 dev->dma_reason[queueidx] &= ~B43legacy_DMAIRQ_RX_DONE;
1413 }
1414
1415 static void b43legacy_interrupt_ack(struct b43legacy_wldev *dev, u32 reason)
1416 {
1417         if (b43legacy_using_pio(dev) &&
1418             (dev->dev->id.revision < 3) &&
1419             (!(reason & B43legacy_IRQ_PIO_WORKAROUND))) {
1420                 /* Apply a PIO specific workaround to the dma_reasons */
1421                 pio_irq_workaround(dev, B43legacy_MMIO_PIO1_BASE, 0);
1422                 pio_irq_workaround(dev, B43legacy_MMIO_PIO2_BASE, 1);
1423                 pio_irq_workaround(dev, B43legacy_MMIO_PIO3_BASE, 2);
1424                 pio_irq_workaround(dev, B43legacy_MMIO_PIO4_BASE, 3);
1425         }
1426
1427         b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON, reason);
1428
1429         b43legacy_write32(dev, B43legacy_MMIO_DMA0_REASON,
1430                           dev->dma_reason[0]);
1431         b43legacy_write32(dev, B43legacy_MMIO_DMA1_REASON,
1432                           dev->dma_reason[1]);
1433         b43legacy_write32(dev, B43legacy_MMIO_DMA2_REASON,
1434                           dev->dma_reason[2]);
1435         b43legacy_write32(dev, B43legacy_MMIO_DMA3_REASON,
1436                           dev->dma_reason[3]);
1437         b43legacy_write32(dev, B43legacy_MMIO_DMA4_REASON,
1438                           dev->dma_reason[4]);
1439         b43legacy_write32(dev, B43legacy_MMIO_DMA5_REASON,
1440                           dev->dma_reason[5]);
1441 }
1442
1443 /* Interrupt handler top-half */
1444 static irqreturn_t b43legacy_interrupt_handler(int irq, void *dev_id)
1445 {
1446         irqreturn_t ret = IRQ_NONE;
1447         struct b43legacy_wldev *dev = dev_id;
1448         u32 reason;
1449
1450         B43legacy_WARN_ON(!dev);
1451
1452         spin_lock(&dev->wl->irq_lock);
1453
1454         if (unlikely(b43legacy_status(dev) < B43legacy_STAT_STARTED))
1455                 /* This can only happen on shared IRQ lines. */
1456                 goto out;
1457         reason = b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
1458         if (reason == 0xffffffff) /* shared IRQ */
1459                 goto out;
1460         ret = IRQ_HANDLED;
1461         reason &= dev->irq_mask;
1462         if (!reason)
1463                 goto out;
1464
1465         dev->dma_reason[0] = b43legacy_read32(dev,
1466                                               B43legacy_MMIO_DMA0_REASON)
1467                                               & 0x0001DC00;
1468         dev->dma_reason[1] = b43legacy_read32(dev,
1469                                               B43legacy_MMIO_DMA1_REASON)
1470                                               & 0x0000DC00;
1471         dev->dma_reason[2] = b43legacy_read32(dev,
1472                                               B43legacy_MMIO_DMA2_REASON)
1473                                               & 0x0000DC00;
1474         dev->dma_reason[3] = b43legacy_read32(dev,
1475                                               B43legacy_MMIO_DMA3_REASON)
1476                                               & 0x0001DC00;
1477         dev->dma_reason[4] = b43legacy_read32(dev,
1478                                               B43legacy_MMIO_DMA4_REASON)
1479                                               & 0x0000DC00;
1480         dev->dma_reason[5] = b43legacy_read32(dev,
1481                                               B43legacy_MMIO_DMA5_REASON)
1482                                               & 0x0000DC00;
1483
1484         b43legacy_interrupt_ack(dev, reason);
1485         /* Disable all IRQs. They are enabled again in the bottom half. */
1486         b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, 0);
1487         /* Save the reason code and call our bottom half. */
1488         dev->irq_reason = reason;
1489         tasklet_schedule(&dev->isr_tasklet);
1490 out:
1491         mmiowb();
1492         spin_unlock(&dev->wl->irq_lock);
1493
1494         return ret;
1495 }
1496
1497 static void b43legacy_release_firmware(struct b43legacy_wldev *dev)
1498 {
1499         release_firmware(dev->fw.ucode);
1500         dev->fw.ucode = NULL;
1501         release_firmware(dev->fw.pcm);
1502         dev->fw.pcm = NULL;
1503         release_firmware(dev->fw.initvals);
1504         dev->fw.initvals = NULL;
1505         release_firmware(dev->fw.initvals_band);
1506         dev->fw.initvals_band = NULL;
1507 }
1508
1509 static void b43legacy_print_fw_helptext(struct b43legacy_wl *wl)
1510 {
1511         /*(DEBLOBBED)*/
1512 }
1513
1514 static void b43legacy_fw_cb(const struct firmware *firmware, void *context)
1515 {
1516         struct b43legacy_wldev *dev = context;
1517
1518         dev->fwp = firmware;
1519         complete(&dev->fw_load_complete);
1520 }
1521
1522 static int do_request_fw(struct b43legacy_wldev *dev,
1523                          const char *name,
1524                          const struct firmware **fw, bool async)
1525 {
1526         char path[sizeof(modparam_fwpostfix) + 32];
1527         struct b43legacy_fw_header *hdr;
1528         u32 size;
1529         int err;
1530
1531         if (!name)
1532                 return 0;
1533
1534         snprintf(path, ARRAY_SIZE(path),
1535                  "/*(DEBLOBBED)*/",
1536                  modparam_fwpostfix, name);
1537         b43legacyinfo(dev->wl, "Loading firmware %s\n", path);
1538         if (async) {
1539                 init_completion(&dev->fw_load_complete);
1540                 err = reject_firmware_nowait(THIS_MODULE, 1, path,
1541                                               dev->dev->dev, GFP_KERNEL,
1542                                               dev, b43legacy_fw_cb);
1543                 if (err) {
1544                         b43legacyerr(dev->wl, "Unable to load firmware\n");
1545                         return err;
1546                 }
1547                 /* stall here until fw ready */
1548                 wait_for_completion(&dev->fw_load_complete);
1549                 if (!dev->fwp)
1550                         err = -EINVAL;
1551                 *fw = dev->fwp;
1552         } else {
1553                 err = reject_firmware(fw, path, dev->dev->dev);
1554         }
1555         if (err) {
1556                 b43legacyerr(dev->wl, "Firmware file \"%s\" not found "
1557                        "or load failed.\n", path);
1558                 return err;
1559         }
1560         if ((*fw)->size < sizeof(struct b43legacy_fw_header))
1561                 goto err_format;
1562         hdr = (struct b43legacy_fw_header *)((*fw)->data);
1563         switch (hdr->type) {
1564         case B43legacy_FW_TYPE_UCODE:
1565         case B43legacy_FW_TYPE_PCM:
1566                 size = be32_to_cpu(hdr->size);
1567                 if (size != (*fw)->size - sizeof(struct b43legacy_fw_header))
1568                         goto err_format;
1569                 /* fallthrough */
1570         case B43legacy_FW_TYPE_IV:
1571                 if (hdr->ver != 1)
1572                         goto err_format;
1573                 break;
1574         default:
1575                 goto err_format;
1576         }
1577
1578         return err;
1579
1580 err_format:
1581         b43legacyerr(dev->wl, "Firmware file \"%s\" format error.\n", path);
1582         return -EPROTO;
1583 }
1584
1585 static int b43legacy_one_core_attach(struct ssb_device *dev,
1586                                      struct b43legacy_wl *wl);
1587 static void b43legacy_one_core_detach(struct ssb_device *dev);
1588
1589 static void b43legacy_request_firmware(struct work_struct *work)
1590 {
1591         struct b43legacy_wl *wl = container_of(work,
1592                                   struct b43legacy_wl, firmware_load);
1593         struct b43legacy_wldev *dev = wl->current_dev;
1594         struct b43legacy_firmware *fw = &dev->fw;
1595         const u8 rev = dev->dev->id.revision;
1596         const char *filename;
1597         int err;
1598
1599         if (!fw->ucode) {
1600                 if (rev == 2)
1601                         filename = "/*(DEBLOBBED)*/";
1602                 else if (rev == 4)
1603                         filename = "/*(DEBLOBBED)*/";
1604                 else
1605                         filename = "/*(DEBLOBBED)*/";
1606                 err = do_request_fw(dev, filename, &fw->ucode, true);
1607                 if (err)
1608                         goto err_load;
1609         }
1610         if (!fw->pcm) {
1611                 if (rev < 5)
1612                         filename = "/*(DEBLOBBED)*/";
1613                 else
1614                         filename = "/*(DEBLOBBED)*/";
1615                 err = do_request_fw(dev, filename, &fw->pcm, false);
1616                 if (err)
1617                         goto err_load;
1618         }
1619         if (!fw->initvals) {
1620                 switch (dev->phy.type) {
1621                 case B43legacy_PHYTYPE_B:
1622                 case B43legacy_PHYTYPE_G:
1623                         if ((rev >= 5) && (rev <= 10))
1624                                 filename = "/*(DEBLOBBED)*/";
1625                         else if (rev == 2 || rev == 4)
1626                                 filename = "/*(DEBLOBBED)*/";
1627                         else
1628                                 goto err_no_initvals;
1629                         break;
1630                 default:
1631                         goto err_no_initvals;
1632                 }
1633                 err = do_request_fw(dev, filename, &fw->initvals, false);
1634                 if (err)
1635                         goto err_load;
1636         }
1637         if (!fw->initvals_band) {
1638                 switch (dev->phy.type) {
1639                 case B43legacy_PHYTYPE_B:
1640                 case B43legacy_PHYTYPE_G:
1641                         if ((rev >= 5) && (rev <= 10))
1642                                 filename = "/*(DEBLOBBED)*/";
1643                         else if (rev >= 11)
1644                                 filename = NULL;
1645                         else if (rev == 2 || rev == 4)
1646                                 filename = NULL;
1647                         else
1648                                 goto err_no_initvals;
1649                         break;
1650                 default:
1651                         goto err_no_initvals;
1652                 }
1653                 err = do_request_fw(dev, filename, &fw->initvals_band, false);
1654                 if (err)
1655                         goto err_load;
1656         }
1657         err = ieee80211_register_hw(wl->hw);
1658         if (err)
1659                 goto err_one_core_detach;
1660         return;
1661
1662 err_one_core_detach:
1663         b43legacy_one_core_detach(dev->dev);
1664         goto error;
1665
1666 err_load:
1667         b43legacy_print_fw_helptext(dev->wl);
1668         goto error;
1669
1670 err_no_initvals:
1671         err = -ENODEV;
1672         b43legacyerr(dev->wl, "No Initial Values firmware file for PHY %u, "
1673                "core rev %u\n", dev->phy.type, rev);
1674         goto error;
1675
1676 error:
1677         b43legacy_release_firmware(dev);
1678         return;
1679 }
1680
1681 static int b43legacy_upload_microcode(struct b43legacy_wldev *dev)
1682 {
1683         struct wiphy *wiphy = dev->wl->hw->wiphy;
1684         const size_t hdr_len = sizeof(struct b43legacy_fw_header);
1685         const __be32 *data;
1686         unsigned int i;
1687         unsigned int len;
1688         u16 fwrev;
1689         u16 fwpatch;
1690         u16 fwdate;
1691         u16 fwtime;
1692         u32 tmp, macctl;
1693         int err = 0;
1694
1695         /* Jump the microcode PSM to offset 0 */
1696         macctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
1697         B43legacy_WARN_ON(macctl & B43legacy_MACCTL_PSM_RUN);
1698         macctl |= B43legacy_MACCTL_PSM_JMP0;
1699         b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl);
1700         /* Zero out all microcode PSM registers and shared memory. */
1701         for (i = 0; i < 64; i++)
1702                 b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS, i, 0);
1703         for (i = 0; i < 4096; i += 2)
1704                 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, i, 0);
1705
1706         /* Upload Microcode. */
1707         data = (__be32 *) (dev->fw.ucode->data + hdr_len);
1708         len = (dev->fw.ucode->size - hdr_len) / sizeof(__be32);
1709         b43legacy_shm_control_word(dev,
1710                                    B43legacy_SHM_UCODE |
1711                                    B43legacy_SHM_AUTOINC_W,
1712                                    0x0000);
1713         for (i = 0; i < len; i++) {
1714                 b43legacy_write32(dev, B43legacy_MMIO_SHM_DATA,
1715                                     be32_to_cpu(data[i]));
1716                 udelay(10);
1717         }
1718
1719         if (dev->fw.pcm) {
1720                 /* Upload PCM data. */
1721                 data = (__be32 *) (dev->fw.pcm->data + hdr_len);
1722                 len = (dev->fw.pcm->size - hdr_len) / sizeof(__be32);
1723                 b43legacy_shm_control_word(dev, B43legacy_SHM_HW, 0x01EA);
1724                 b43legacy_write32(dev, B43legacy_MMIO_SHM_DATA, 0x00004000);
1725                 /* No need for autoinc bit in SHM_HW */
1726                 b43legacy_shm_control_word(dev, B43legacy_SHM_HW, 0x01EB);
1727                 for (i = 0; i < len; i++) {
1728                         b43legacy_write32(dev, B43legacy_MMIO_SHM_DATA,
1729                                           be32_to_cpu(data[i]));
1730                         udelay(10);
1731                 }
1732         }
1733
1734         b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON,
1735                           B43legacy_IRQ_ALL);
1736
1737         /* Start the microcode PSM */
1738         macctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
1739         macctl &= ~B43legacy_MACCTL_PSM_JMP0;
1740         macctl |= B43legacy_MACCTL_PSM_RUN;
1741         b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl);
1742
1743         /* Wait for the microcode to load and respond */
1744         i = 0;
1745         while (1) {
1746                 tmp = b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
1747                 if (tmp == B43legacy_IRQ_MAC_SUSPENDED)
1748                         break;
1749                 i++;
1750                 if (i >= B43legacy_IRQWAIT_MAX_RETRIES) {
1751                         b43legacyerr(dev->wl, "Microcode not responding\n");
1752                         b43legacy_print_fw_helptext(dev->wl);
1753                         err = -ENODEV;
1754                         goto error;
1755                 }
1756                 msleep_interruptible(50);
1757                 if (signal_pending(current)) {
1758                         err = -EINTR;
1759                         goto error;
1760                 }
1761         }
1762         /* dummy read follows */
1763         b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
1764
1765         /* Get and check the revisions. */
1766         fwrev = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
1767                                      B43legacy_SHM_SH_UCODEREV);
1768         fwpatch = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
1769                                        B43legacy_SHM_SH_UCODEPATCH);
1770         fwdate = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
1771                                       B43legacy_SHM_SH_UCODEDATE);
1772         fwtime = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
1773                                       B43legacy_SHM_SH_UCODETIME);
1774
1775         if (fwrev > 0x128) {
1776                 b43legacyerr(dev->wl, "YOU ARE TRYING TO LOAD V4 FIRMWARE."
1777                              " Only firmware from binary drivers version 3.x"
1778                              " is supported. You must change your firmware"
1779                              " files.\n");
1780                 b43legacy_print_fw_helptext(dev->wl);
1781                 err = -EOPNOTSUPP;
1782                 goto error;
1783         }
1784         b43legacyinfo(dev->wl, "Loading firmware version 0x%X, patch level %u "
1785                       "(20%.2i-%.2i-%.2i %.2i:%.2i:%.2i)\n", fwrev, fwpatch,
1786                       (fwdate >> 12) & 0xF, (fwdate >> 8) & 0xF, fwdate & 0xFF,
1787                       (fwtime >> 11) & 0x1F, (fwtime >> 5) & 0x3F,
1788                       fwtime & 0x1F);
1789
1790         dev->fw.rev = fwrev;
1791         dev->fw.patch = fwpatch;
1792
1793         snprintf(wiphy->fw_version, sizeof(wiphy->fw_version), "%u.%u",
1794                         dev->fw.rev, dev->fw.patch);
1795         wiphy->hw_version = dev->dev->id.coreid;
1796
1797         return 0;
1798
1799 error:
1800         macctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
1801         macctl &= ~B43legacy_MACCTL_PSM_RUN;
1802         macctl |= B43legacy_MACCTL_PSM_JMP0;
1803         b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl);
1804
1805         return err;
1806 }
1807
1808 static int b43legacy_write_initvals(struct b43legacy_wldev *dev,
1809                                     const struct b43legacy_iv *ivals,
1810                                     size_t count,
1811                                     size_t array_size)
1812 {
1813         const struct b43legacy_iv *iv;
1814         u16 offset;
1815         size_t i;
1816         bool bit32;
1817
1818         BUILD_BUG_ON(sizeof(struct b43legacy_iv) != 6);
1819         iv = ivals;
1820         for (i = 0; i < count; i++) {
1821                 if (array_size < sizeof(iv->offset_size))
1822                         goto err_format;
1823                 array_size -= sizeof(iv->offset_size);
1824                 offset = be16_to_cpu(iv->offset_size);
1825                 bit32 = !!(offset & B43legacy_IV_32BIT);
1826                 offset &= B43legacy_IV_OFFSET_MASK;
1827                 if (offset >= 0x1000)
1828                         goto err_format;
1829                 if (bit32) {
1830                         u32 value;
1831
1832                         if (array_size < sizeof(iv->data.d32))
1833                                 goto err_format;
1834                         array_size -= sizeof(iv->data.d32);
1835
1836                         value = get_unaligned_be32(&iv->data.d32);
1837                         b43legacy_write32(dev, offset, value);
1838
1839                         iv = (const struct b43legacy_iv *)((const uint8_t *)iv +
1840                                                         sizeof(__be16) +
1841                                                         sizeof(__be32));
1842                 } else {
1843                         u16 value;
1844
1845                         if (array_size < sizeof(iv->data.d16))
1846                                 goto err_format;
1847                         array_size -= sizeof(iv->data.d16);
1848
1849                         value = be16_to_cpu(iv->data.d16);
1850                         b43legacy_write16(dev, offset, value);
1851
1852                         iv = (const struct b43legacy_iv *)((const uint8_t *)iv +
1853                                                         sizeof(__be16) +
1854                                                         sizeof(__be16));
1855                 }
1856         }
1857         if (array_size)
1858                 goto err_format;
1859
1860         return 0;
1861
1862 err_format:
1863         b43legacyerr(dev->wl, "Initial Values Firmware file-format error.\n");
1864         b43legacy_print_fw_helptext(dev->wl);
1865
1866         return -EPROTO;
1867 }
1868
1869 static int b43legacy_upload_initvals(struct b43legacy_wldev *dev)
1870 {
1871         const size_t hdr_len = sizeof(struct b43legacy_fw_header);
1872         const struct b43legacy_fw_header *hdr;
1873         struct b43legacy_firmware *fw = &dev->fw;
1874         const struct b43legacy_iv *ivals;
1875         size_t count;
1876         int err;
1877
1878         hdr = (const struct b43legacy_fw_header *)(fw->initvals->data);
1879         ivals = (const struct b43legacy_iv *)(fw->initvals->data + hdr_len);
1880         count = be32_to_cpu(hdr->size);
1881         err = b43legacy_write_initvals(dev, ivals, count,
1882                                  fw->initvals->size - hdr_len);
1883         if (err)
1884                 goto out;
1885         if (fw->initvals_band) {
1886                 hdr = (const struct b43legacy_fw_header *)
1887                       (fw->initvals_band->data);
1888                 ivals = (const struct b43legacy_iv *)(fw->initvals_band->data
1889                         + hdr_len);
1890                 count = be32_to_cpu(hdr->size);
1891                 err = b43legacy_write_initvals(dev, ivals, count,
1892                                          fw->initvals_band->size - hdr_len);
1893                 if (err)
1894                         goto out;
1895         }
1896 out:
1897
1898         return err;
1899 }
1900
1901 /* Initialize the GPIOs
1902  * http://bcm-specs.sipsolutions.net/GPIO
1903  */
1904 static int b43legacy_gpio_init(struct b43legacy_wldev *dev)
1905 {
1906         struct ssb_bus *bus = dev->dev->bus;
1907         struct ssb_device *gpiodev, *pcidev = NULL;
1908         u32 mask;
1909         u32 set;
1910
1911         b43legacy_write32(dev, B43legacy_MMIO_MACCTL,
1912                           b43legacy_read32(dev,
1913                           B43legacy_MMIO_MACCTL)
1914                           & 0xFFFF3FFF);
1915
1916         b43legacy_write16(dev, B43legacy_MMIO_GPIO_MASK,
1917                           b43legacy_read16(dev,
1918                           B43legacy_MMIO_GPIO_MASK)
1919                           | 0x000F);
1920
1921         mask = 0x0000001F;
1922         set = 0x0000000F;
1923         if (dev->dev->bus->chip_id == 0x4301) {
1924                 mask |= 0x0060;
1925                 set |= 0x0060;
1926         }
1927         if (dev->dev->bus->sprom.boardflags_lo & B43legacy_BFL_PACTRL) {
1928                 b43legacy_write16(dev, B43legacy_MMIO_GPIO_MASK,
1929                                   b43legacy_read16(dev,
1930                                   B43legacy_MMIO_GPIO_MASK)
1931                                   | 0x0200);
1932                 mask |= 0x0200;
1933                 set |= 0x0200;
1934         }
1935         if (dev->dev->id.revision >= 2)
1936                 mask  |= 0x0010; /* FIXME: This is redundant. */
1937
1938 #ifdef CONFIG_SSB_DRIVER_PCICORE
1939         pcidev = bus->pcicore.dev;
1940 #endif
1941         gpiodev = bus->chipco.dev ? : pcidev;
1942         if (!gpiodev)
1943                 return 0;
1944         ssb_write32(gpiodev, B43legacy_GPIO_CONTROL,
1945                     (ssb_read32(gpiodev, B43legacy_GPIO_CONTROL)
1946                      & ~mask) | set);
1947
1948         return 0;
1949 }
1950
1951 /* Turn off all GPIO stuff. Call this on module unload, for example. */
1952 static void b43legacy_gpio_cleanup(struct b43legacy_wldev *dev)
1953 {
1954         struct ssb_bus *bus = dev->dev->bus;
1955         struct ssb_device *gpiodev, *pcidev = NULL;
1956
1957 #ifdef CONFIG_SSB_DRIVER_PCICORE
1958         pcidev = bus->pcicore.dev;
1959 #endif
1960         gpiodev = bus->chipco.dev ? : pcidev;
1961         if (!gpiodev)
1962                 return;
1963         ssb_write32(gpiodev, B43legacy_GPIO_CONTROL, 0);
1964 }
1965
1966 /* http://bcm-specs.sipsolutions.net/EnableMac */
1967 void b43legacy_mac_enable(struct b43legacy_wldev *dev)
1968 {
1969         dev->mac_suspended--;
1970         B43legacy_WARN_ON(dev->mac_suspended < 0);
1971         B43legacy_WARN_ON(irqs_disabled());
1972         if (dev->mac_suspended == 0) {
1973                 b43legacy_write32(dev, B43legacy_MMIO_MACCTL,
1974                                   b43legacy_read32(dev,
1975                                   B43legacy_MMIO_MACCTL)
1976                                   | B43legacy_MACCTL_ENABLED);
1977                 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON,
1978                                   B43legacy_IRQ_MAC_SUSPENDED);
1979                 /* the next two are dummy reads */
1980                 b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
1981                 b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
1982                 b43legacy_power_saving_ctl_bits(dev, -1, -1);
1983
1984                 /* Re-enable IRQs. */
1985                 spin_lock_irq(&dev->wl->irq_lock);
1986                 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK,
1987                                   dev->irq_mask);
1988                 spin_unlock_irq(&dev->wl->irq_lock);
1989         }
1990 }
1991
1992 /* http://bcm-specs.sipsolutions.net/SuspendMAC */
1993 void b43legacy_mac_suspend(struct b43legacy_wldev *dev)
1994 {
1995         int i;
1996         u32 tmp;
1997
1998         might_sleep();
1999         B43legacy_WARN_ON(irqs_disabled());
2000         B43legacy_WARN_ON(dev->mac_suspended < 0);
2001
2002         if (dev->mac_suspended == 0) {
2003                 /* Mask IRQs before suspending MAC. Otherwise
2004                  * the MAC stays busy and won't suspend. */
2005                 spin_lock_irq(&dev->wl->irq_lock);
2006                 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, 0);
2007                 spin_unlock_irq(&dev->wl->irq_lock);
2008                 b43legacy_synchronize_irq(dev);
2009
2010                 b43legacy_power_saving_ctl_bits(dev, -1, 1);
2011                 b43legacy_write32(dev, B43legacy_MMIO_MACCTL,
2012                                   b43legacy_read32(dev,
2013                                   B43legacy_MMIO_MACCTL)
2014                                   & ~B43legacy_MACCTL_ENABLED);
2015                 b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
2016                 for (i = 40; i; i--) {
2017                         tmp = b43legacy_read32(dev,
2018                                                B43legacy_MMIO_GEN_IRQ_REASON);
2019                         if (tmp & B43legacy_IRQ_MAC_SUSPENDED)
2020                                 goto out;
2021                         msleep(1);
2022                 }
2023                 b43legacyerr(dev->wl, "MAC suspend failed\n");
2024         }
2025 out:
2026         dev->mac_suspended++;
2027 }
2028
2029 static void b43legacy_adjust_opmode(struct b43legacy_wldev *dev)
2030 {
2031         struct b43legacy_wl *wl = dev->wl;
2032         u32 ctl;
2033         u16 cfp_pretbtt;
2034
2035         ctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
2036         /* Reset status to STA infrastructure mode. */
2037         ctl &= ~B43legacy_MACCTL_AP;
2038         ctl &= ~B43legacy_MACCTL_KEEP_CTL;
2039         ctl &= ~B43legacy_MACCTL_KEEP_BADPLCP;
2040         ctl &= ~B43legacy_MACCTL_KEEP_BAD;
2041         ctl &= ~B43legacy_MACCTL_PROMISC;
2042         ctl &= ~B43legacy_MACCTL_BEACPROMISC;
2043         ctl |= B43legacy_MACCTL_INFRA;
2044
2045         if (b43legacy_is_mode(wl, NL80211_IFTYPE_AP))
2046                 ctl |= B43legacy_MACCTL_AP;
2047         else if (b43legacy_is_mode(wl, NL80211_IFTYPE_ADHOC))
2048                 ctl &= ~B43legacy_MACCTL_INFRA;
2049
2050         if (wl->filter_flags & FIF_CONTROL)
2051                 ctl |= B43legacy_MACCTL_KEEP_CTL;
2052         if (wl->filter_flags & FIF_FCSFAIL)
2053                 ctl |= B43legacy_MACCTL_KEEP_BAD;
2054         if (wl->filter_flags & FIF_PLCPFAIL)
2055                 ctl |= B43legacy_MACCTL_KEEP_BADPLCP;
2056         if (wl->filter_flags & FIF_BCN_PRBRESP_PROMISC)
2057                 ctl |= B43legacy_MACCTL_BEACPROMISC;
2058
2059         /* Workaround: On old hardware the HW-MAC-address-filter
2060          * doesn't work properly, so always run promisc in filter
2061          * it in software. */
2062         if (dev->dev->id.revision <= 4)
2063                 ctl |= B43legacy_MACCTL_PROMISC;
2064
2065         b43legacy_write32(dev, B43legacy_MMIO_MACCTL, ctl);
2066
2067         cfp_pretbtt = 2;
2068         if ((ctl & B43legacy_MACCTL_INFRA) &&
2069             !(ctl & B43legacy_MACCTL_AP)) {
2070                 if (dev->dev->bus->chip_id == 0x4306 &&
2071                     dev->dev->bus->chip_rev == 3)
2072                         cfp_pretbtt = 100;
2073                 else
2074                         cfp_pretbtt = 50;
2075         }
2076         b43legacy_write16(dev, 0x612, cfp_pretbtt);
2077 }
2078
2079 static void b43legacy_rate_memory_write(struct b43legacy_wldev *dev,
2080                                         u16 rate,
2081                                         int is_ofdm)
2082 {
2083         u16 offset;
2084
2085         if (is_ofdm) {
2086                 offset = 0x480;
2087                 offset += (b43legacy_plcp_get_ratecode_ofdm(rate) & 0x000F) * 2;
2088         } else {
2089                 offset = 0x4C0;
2090                 offset += (b43legacy_plcp_get_ratecode_cck(rate) & 0x000F) * 2;
2091         }
2092         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, offset + 0x20,
2093                               b43legacy_shm_read16(dev,
2094                               B43legacy_SHM_SHARED, offset));
2095 }
2096
2097 static void b43legacy_rate_memory_init(struct b43legacy_wldev *dev)
2098 {
2099         switch (dev->phy.type) {
2100         case B43legacy_PHYTYPE_G:
2101                 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_6MB, 1);
2102                 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_12MB, 1);
2103                 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_18MB, 1);
2104                 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_24MB, 1);
2105                 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_36MB, 1);
2106                 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_48MB, 1);
2107                 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_54MB, 1);
2108                 /* fallthrough */
2109         case B43legacy_PHYTYPE_B:
2110                 b43legacy_rate_memory_write(dev, B43legacy_CCK_RATE_1MB, 0);
2111                 b43legacy_rate_memory_write(dev, B43legacy_CCK_RATE_2MB, 0);
2112                 b43legacy_rate_memory_write(dev, B43legacy_CCK_RATE_5MB, 0);
2113                 b43legacy_rate_memory_write(dev, B43legacy_CCK_RATE_11MB, 0);
2114                 break;
2115         default:
2116                 B43legacy_BUG_ON(1);
2117         }
2118 }
2119
2120 /* Set the TX-Antenna for management frames sent by firmware. */
2121 static void b43legacy_mgmtframe_txantenna(struct b43legacy_wldev *dev,
2122                                           int antenna)
2123 {
2124         u16 ant = 0;
2125         u16 tmp;
2126
2127         switch (antenna) {
2128         case B43legacy_ANTENNA0:
2129                 ant |= B43legacy_TX4_PHY_ANT0;
2130                 break;
2131         case B43legacy_ANTENNA1:
2132                 ant |= B43legacy_TX4_PHY_ANT1;
2133                 break;
2134         case B43legacy_ANTENNA_AUTO:
2135                 ant |= B43legacy_TX4_PHY_ANTLAST;
2136                 break;
2137         default:
2138                 B43legacy_BUG_ON(1);
2139         }
2140
2141         /* FIXME We also need to set the other flags of the PHY control
2142          * field somewhere. */
2143
2144         /* For Beacons */
2145         tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
2146                                    B43legacy_SHM_SH_BEACPHYCTL);
2147         tmp = (tmp & ~B43legacy_TX4_PHY_ANT) | ant;
2148         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
2149                               B43legacy_SHM_SH_BEACPHYCTL, tmp);
2150         /* For ACK/CTS */
2151         tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
2152                                    B43legacy_SHM_SH_ACKCTSPHYCTL);
2153         tmp = (tmp & ~B43legacy_TX4_PHY_ANT) | ant;
2154         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
2155                               B43legacy_SHM_SH_ACKCTSPHYCTL, tmp);
2156         /* For Probe Resposes */
2157         tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
2158                                    B43legacy_SHM_SH_PRPHYCTL);
2159         tmp = (tmp & ~B43legacy_TX4_PHY_ANT) | ant;
2160         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
2161                               B43legacy_SHM_SH_PRPHYCTL, tmp);
2162 }
2163
2164 /* This is the opposite of b43legacy_chip_init() */
2165 static void b43legacy_chip_exit(struct b43legacy_wldev *dev)
2166 {
2167         b43legacy_radio_turn_off(dev, 1);
2168         b43legacy_gpio_cleanup(dev);
2169         /* firmware is released later */
2170 }
2171
2172 /* Initialize the chip
2173  * http://bcm-specs.sipsolutions.net/ChipInit
2174  */
2175 static int b43legacy_chip_init(struct b43legacy_wldev *dev)
2176 {
2177         struct b43legacy_phy *phy = &dev->phy;
2178         int err;
2179         int tmp;
2180         u32 value32, macctl;
2181         u16 value16;
2182
2183         /* Initialize the MAC control */
2184         macctl = B43legacy_MACCTL_IHR_ENABLED | B43legacy_MACCTL_SHM_ENABLED;
2185         if (dev->phy.gmode)
2186                 macctl |= B43legacy_MACCTL_GMODE;
2187         macctl |= B43legacy_MACCTL_INFRA;
2188         b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl);
2189
2190         err = b43legacy_upload_microcode(dev);
2191         if (err)
2192                 goto out; /* firmware is released later */
2193
2194         err = b43legacy_gpio_init(dev);
2195         if (err)
2196                 goto out; /* firmware is released later */
2197
2198         err = b43legacy_upload_initvals(dev);
2199         if (err)
2200                 goto err_gpio_clean;
2201         b43legacy_radio_turn_on(dev);
2202
2203         b43legacy_write16(dev, 0x03E6, 0x0000);
2204         err = b43legacy_phy_init(dev);
2205         if (err)
2206                 goto err_radio_off;
2207
2208         /* Select initial Interference Mitigation. */
2209         tmp = phy->interfmode;
2210         phy->interfmode = B43legacy_INTERFMODE_NONE;
2211         b43legacy_radio_set_interference_mitigation(dev, tmp);
2212
2213         b43legacy_phy_set_antenna_diversity(dev);
2214         b43legacy_mgmtframe_txantenna(dev, B43legacy_ANTENNA_DEFAULT);
2215
2216         if (phy->type == B43legacy_PHYTYPE_B) {
2217                 value16 = b43legacy_read16(dev, 0x005E);
2218                 value16 |= 0x0004;
2219                 b43legacy_write16(dev, 0x005E, value16);
2220         }
2221         b43legacy_write32(dev, 0x0100, 0x01000000);
2222         if (dev->dev->id.revision < 5)
2223                 b43legacy_write32(dev, 0x010C, 0x01000000);
2224
2225         value32 = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
2226         value32 &= ~B43legacy_MACCTL_INFRA;
2227         b43legacy_write32(dev, B43legacy_MMIO_MACCTL, value32);
2228         value32 = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
2229         value32 |= B43legacy_MACCTL_INFRA;
2230         b43legacy_write32(dev, B43legacy_MMIO_MACCTL, value32);
2231
2232         if (b43legacy_using_pio(dev)) {
2233                 b43legacy_write32(dev, 0x0210, 0x00000100);
2234                 b43legacy_write32(dev, 0x0230, 0x00000100);
2235                 b43legacy_write32(dev, 0x0250, 0x00000100);
2236                 b43legacy_write32(dev, 0x0270, 0x00000100);
2237                 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x0034,
2238                                       0x0000);
2239         }
2240
2241         /* Probe Response Timeout value */
2242         /* FIXME: Default to 0, has to be set by ioctl probably... :-/ */
2243         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x0074, 0x0000);
2244
2245         /* Initially set the wireless operation mode. */
2246         b43legacy_adjust_opmode(dev);
2247
2248         if (dev->dev->id.revision < 3) {
2249                 b43legacy_write16(dev, 0x060E, 0x0000);
2250                 b43legacy_write16(dev, 0x0610, 0x8000);
2251                 b43legacy_write16(dev, 0x0604, 0x0000);
2252                 b43legacy_write16(dev, 0x0606, 0x0200);
2253         } else {
2254                 b43legacy_write32(dev, 0x0188, 0x80000000);
2255                 b43legacy_write32(dev, 0x018C, 0x02000000);
2256         }
2257         b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON, 0x00004000);
2258         b43legacy_write32(dev, B43legacy_MMIO_DMA0_IRQ_MASK, 0x0001DC00);
2259         b43legacy_write32(dev, B43legacy_MMIO_DMA1_IRQ_MASK, 0x0000DC00);
2260         b43legacy_write32(dev, B43legacy_MMIO_DMA2_IRQ_MASK, 0x0000DC00);
2261         b43legacy_write32(dev, B43legacy_MMIO_DMA3_IRQ_MASK, 0x0001DC00);
2262         b43legacy_write32(dev, B43legacy_MMIO_DMA4_IRQ_MASK, 0x0000DC00);
2263         b43legacy_write32(dev, B43legacy_MMIO_DMA5_IRQ_MASK, 0x0000DC00);
2264
2265         value32 = ssb_read32(dev->dev, SSB_TMSLOW);
2266         value32 |= B43legacy_TMSLOW_MACPHYCLKEN;
2267         ssb_write32(dev->dev, SSB_TMSLOW, value32);
2268
2269         b43legacy_write16(dev, B43legacy_MMIO_POWERUP_DELAY,
2270                           dev->dev->bus->chipco.fast_pwrup_delay);
2271
2272         /* PHY TX errors counter. */
2273         atomic_set(&phy->txerr_cnt, B43legacy_PHY_TX_BADNESS_LIMIT);
2274
2275         B43legacy_WARN_ON(err != 0);
2276         b43legacydbg(dev->wl, "Chip initialized\n");
2277 out:
2278         return err;
2279
2280 err_radio_off:
2281         b43legacy_radio_turn_off(dev, 1);
2282 err_gpio_clean:
2283         b43legacy_gpio_cleanup(dev);
2284         goto out;
2285 }
2286
2287 static void b43legacy_periodic_every120sec(struct b43legacy_wldev *dev)
2288 {
2289         struct b43legacy_phy *phy = &dev->phy;
2290
2291         if (phy->type != B43legacy_PHYTYPE_G || phy->rev < 2)
2292                 return;
2293
2294         b43legacy_mac_suspend(dev);
2295         b43legacy_phy_lo_g_measure(dev);
2296         b43legacy_mac_enable(dev);
2297 }
2298
2299 static void b43legacy_periodic_every60sec(struct b43legacy_wldev *dev)
2300 {
2301         b43legacy_phy_lo_mark_all_unused(dev);
2302         if (dev->dev->bus->sprom.boardflags_lo & B43legacy_BFL_RSSI) {
2303                 b43legacy_mac_suspend(dev);
2304                 b43legacy_calc_nrssi_slope(dev);
2305                 b43legacy_mac_enable(dev);
2306         }
2307 }
2308
2309 static void b43legacy_periodic_every30sec(struct b43legacy_wldev *dev)
2310 {
2311         /* Update device statistics. */
2312         b43legacy_calculate_link_quality(dev);
2313 }
2314
2315 static void b43legacy_periodic_every15sec(struct b43legacy_wldev *dev)
2316 {
2317         b43legacy_phy_xmitpower(dev); /* FIXME: unless scanning? */
2318
2319         atomic_set(&dev->phy.txerr_cnt, B43legacy_PHY_TX_BADNESS_LIMIT);
2320         wmb();
2321 }
2322
2323 static void do_periodic_work(struct b43legacy_wldev *dev)
2324 {
2325         unsigned int state;
2326
2327         state = dev->periodic_state;
2328         if (state % 8 == 0)
2329                 b43legacy_periodic_every120sec(dev);
2330         if (state % 4 == 0)
2331                 b43legacy_periodic_every60sec(dev);
2332         if (state % 2 == 0)
2333                 b43legacy_periodic_every30sec(dev);
2334         b43legacy_periodic_every15sec(dev);
2335 }
2336
2337 /* Periodic work locking policy:
2338  *      The whole periodic work handler is protected by
2339  *      wl->mutex. If another lock is needed somewhere in the
2340  *      pwork callchain, it's acquired in-place, where it's needed.
2341  */
2342 static void b43legacy_periodic_work_handler(struct work_struct *work)
2343 {
2344         struct b43legacy_wldev *dev = container_of(work, struct b43legacy_wldev,
2345                                              periodic_work.work);
2346         struct b43legacy_wl *wl = dev->wl;
2347         unsigned long delay;
2348
2349         mutex_lock(&wl->mutex);
2350
2351         if (unlikely(b43legacy_status(dev) != B43legacy_STAT_STARTED))
2352                 goto out;
2353         if (b43legacy_debug(dev, B43legacy_DBG_PWORK_STOP))
2354                 goto out_requeue;
2355
2356         do_periodic_work(dev);
2357
2358         dev->periodic_state++;
2359 out_requeue:
2360         if (b43legacy_debug(dev, B43legacy_DBG_PWORK_FAST))
2361                 delay = msecs_to_jiffies(50);
2362         else
2363                 delay = round_jiffies_relative(HZ * 15);
2364         ieee80211_queue_delayed_work(wl->hw, &dev->periodic_work, delay);
2365 out:
2366         mutex_unlock(&wl->mutex);
2367 }
2368
2369 static void b43legacy_periodic_tasks_setup(struct b43legacy_wldev *dev)
2370 {
2371         struct delayed_work *work = &dev->periodic_work;
2372
2373         dev->periodic_state = 0;
2374         INIT_DELAYED_WORK(work, b43legacy_periodic_work_handler);
2375         ieee80211_queue_delayed_work(dev->wl->hw, work, 0);
2376 }
2377
2378 /* Validate access to the chip (SHM) */
2379 static int b43legacy_validate_chipaccess(struct b43legacy_wldev *dev)
2380 {
2381         u32 value;
2382         u32 shm_backup;
2383
2384         shm_backup = b43legacy_shm_read32(dev, B43legacy_SHM_SHARED, 0);
2385         b43legacy_shm_write32(dev, B43legacy_SHM_SHARED, 0, 0xAA5555AA);
2386         if (b43legacy_shm_read32(dev, B43legacy_SHM_SHARED, 0) !=
2387                                  0xAA5555AA)
2388                 goto error;
2389         b43legacy_shm_write32(dev, B43legacy_SHM_SHARED, 0, 0x55AAAA55);
2390         if (b43legacy_shm_read32(dev, B43legacy_SHM_SHARED, 0) !=
2391                                  0x55AAAA55)
2392                 goto error;
2393         b43legacy_shm_write32(dev, B43legacy_SHM_SHARED, 0, shm_backup);
2394
2395         value = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
2396         if ((value | B43legacy_MACCTL_GMODE) !=
2397             (B43legacy_MACCTL_GMODE | B43legacy_MACCTL_IHR_ENABLED))
2398                 goto error;
2399
2400         value = b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
2401         if (value)
2402                 goto error;
2403
2404         return 0;
2405 error:
2406         b43legacyerr(dev->wl, "Failed to validate the chipaccess\n");
2407         return -ENODEV;
2408 }
2409
2410 static void b43legacy_security_init(struct b43legacy_wldev *dev)
2411 {
2412         dev->max_nr_keys = (dev->dev->id.revision >= 5) ? 58 : 20;
2413         B43legacy_WARN_ON(dev->max_nr_keys > ARRAY_SIZE(dev->key));
2414         dev->ktp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
2415                                         0x0056);
2416         /* KTP is a word address, but we address SHM bytewise.
2417          * So multiply by two.
2418          */
2419         dev->ktp *= 2;
2420         if (dev->dev->id.revision >= 5)
2421                 /* Number of RCMTA address slots */
2422                 b43legacy_write16(dev, B43legacy_MMIO_RCMTA_COUNT,
2423                                   dev->max_nr_keys - 8);
2424 }
2425
2426 #ifdef CONFIG_B43LEGACY_HWRNG
2427 static int b43legacy_rng_read(struct hwrng *rng, u32 *data)
2428 {
2429         struct b43legacy_wl *wl = (struct b43legacy_wl *)rng->priv;
2430         unsigned long flags;
2431
2432         /* Don't take wl->mutex here, as it could deadlock with
2433          * hwrng internal locking. It's not needed to take
2434          * wl->mutex here, anyway. */
2435
2436         spin_lock_irqsave(&wl->irq_lock, flags);
2437         *data = b43legacy_read16(wl->current_dev, B43legacy_MMIO_RNG);
2438         spin_unlock_irqrestore(&wl->irq_lock, flags);
2439
2440         return (sizeof(u16));
2441 }
2442 #endif
2443
2444 static void b43legacy_rng_exit(struct b43legacy_wl *wl)
2445 {
2446 #ifdef CONFIG_B43LEGACY_HWRNG
2447         if (wl->rng_initialized)
2448                 hwrng_unregister(&wl->rng);
2449 #endif
2450 }
2451
2452 static int b43legacy_rng_init(struct b43legacy_wl *wl)
2453 {
2454         int err = 0;
2455
2456 #ifdef CONFIG_B43LEGACY_HWRNG
2457         snprintf(wl->rng_name, ARRAY_SIZE(wl->rng_name),
2458                  "%s_%s", KBUILD_MODNAME, wiphy_name(wl->hw->wiphy));
2459         wl->rng.name = wl->rng_name;
2460         wl->rng.data_read = b43legacy_rng_read;
2461         wl->rng.priv = (unsigned long)wl;
2462         wl->rng_initialized = 1;
2463         err = hwrng_register(&wl->rng);
2464         if (err) {
2465                 wl->rng_initialized = 0;
2466                 b43legacyerr(wl, "Failed to register the random "
2467                        "number generator (%d)\n", err);
2468         }
2469
2470 #endif
2471         return err;
2472 }
2473
2474 static void b43legacy_tx_work(struct work_struct *work)
2475 {
2476         struct b43legacy_wl *wl = container_of(work, struct b43legacy_wl,
2477                                   tx_work);
2478         struct b43legacy_wldev *dev;
2479         struct sk_buff *skb;
2480         int queue_num;
2481         int err = 0;
2482
2483         mutex_lock(&wl->mutex);
2484         dev = wl->current_dev;
2485         if (unlikely(!dev || b43legacy_status(dev) < B43legacy_STAT_STARTED)) {
2486                 mutex_unlock(&wl->mutex);
2487                 return;
2488         }
2489
2490         for (queue_num = 0; queue_num < B43legacy_QOS_QUEUE_NUM; queue_num++) {
2491                 while (skb_queue_len(&wl->tx_queue[queue_num])) {
2492                         skb = skb_dequeue(&wl->tx_queue[queue_num]);
2493                         if (b43legacy_using_pio(dev))
2494                                 err = b43legacy_pio_tx(dev, skb);
2495                         else
2496                                 err = b43legacy_dma_tx(dev, skb);
2497                         if (err == -ENOSPC) {
2498                                 wl->tx_queue_stopped[queue_num] = 1;
2499                                 ieee80211_stop_queue(wl->hw, queue_num);
2500                                 skb_queue_head(&wl->tx_queue[queue_num], skb);
2501                                 break;
2502                         }
2503                         if (unlikely(err))
2504                                 dev_kfree_skb(skb); /* Drop it */
2505                         err = 0;
2506                 }
2507
2508                 if (!err)
2509                         wl->tx_queue_stopped[queue_num] = 0;
2510         }
2511
2512         mutex_unlock(&wl->mutex);
2513 }
2514
2515 static void b43legacy_op_tx(struct ieee80211_hw *hw,
2516                             struct ieee80211_tx_control *control,
2517                             struct sk_buff *skb)
2518 {
2519         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2520
2521         if (unlikely(skb->len < 2 + 2 + 6)) {
2522                 /* Too short, this can't be a valid frame. */
2523                 dev_kfree_skb_any(skb);
2524                 return;
2525         }
2526         B43legacy_WARN_ON(skb_shinfo(skb)->nr_frags);
2527
2528         skb_queue_tail(&wl->tx_queue[skb->queue_mapping], skb);
2529         if (!wl->tx_queue_stopped[skb->queue_mapping])
2530                 ieee80211_queue_work(wl->hw, &wl->tx_work);
2531         else
2532                 ieee80211_stop_queue(wl->hw, skb->queue_mapping);
2533 }
2534
2535 static int b43legacy_op_conf_tx(struct ieee80211_hw *hw,
2536                                 struct ieee80211_vif *vif, u16 queue,
2537                                 const struct ieee80211_tx_queue_params *params)
2538 {
2539         return 0;
2540 }
2541
2542 static int b43legacy_op_get_stats(struct ieee80211_hw *hw,
2543                                   struct ieee80211_low_level_stats *stats)
2544 {
2545         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2546         unsigned long flags;
2547
2548         spin_lock_irqsave(&wl->irq_lock, flags);
2549         memcpy(stats, &wl->ieee_stats, sizeof(*stats));
2550         spin_unlock_irqrestore(&wl->irq_lock, flags);
2551
2552         return 0;
2553 }
2554
2555 static const char *phymode_to_string(unsigned int phymode)
2556 {
2557         switch (phymode) {
2558         case B43legacy_PHYMODE_B:
2559                 return "B";
2560         case B43legacy_PHYMODE_G:
2561                 return "G";
2562         default:
2563                 B43legacy_BUG_ON(1);
2564         }
2565         return "";
2566 }
2567
2568 static int find_wldev_for_phymode(struct b43legacy_wl *wl,
2569                                   unsigned int phymode,
2570                                   struct b43legacy_wldev **dev,
2571                                   bool *gmode)
2572 {
2573         struct b43legacy_wldev *d;
2574
2575         list_for_each_entry(d, &wl->devlist, list) {
2576                 if (d->phy.possible_phymodes & phymode) {
2577                         /* Ok, this device supports the PHY-mode.
2578                          * Set the gmode bit. */
2579                         *gmode = true;
2580                         *dev = d;
2581
2582                         return 0;
2583                 }
2584         }
2585
2586         return -ESRCH;
2587 }
2588
2589 static void b43legacy_put_phy_into_reset(struct b43legacy_wldev *dev)
2590 {
2591         struct ssb_device *sdev = dev->dev;
2592         u32 tmslow;
2593
2594         tmslow = ssb_read32(sdev, SSB_TMSLOW);
2595         tmslow &= ~B43legacy_TMSLOW_GMODE;
2596         tmslow |= B43legacy_TMSLOW_PHYRESET;
2597         tmslow |= SSB_TMSLOW_FGC;
2598         ssb_write32(sdev, SSB_TMSLOW, tmslow);
2599         msleep(1);
2600
2601         tmslow = ssb_read32(sdev, SSB_TMSLOW);
2602         tmslow &= ~SSB_TMSLOW_FGC;
2603         tmslow |= B43legacy_TMSLOW_PHYRESET;
2604         ssb_write32(sdev, SSB_TMSLOW, tmslow);
2605         msleep(1);
2606 }
2607
2608 /* Expects wl->mutex locked */
2609 static int b43legacy_switch_phymode(struct b43legacy_wl *wl,
2610                                       unsigned int new_mode)
2611 {
2612         struct b43legacy_wldev *uninitialized_var(up_dev);
2613         struct b43legacy_wldev *down_dev;
2614         int err;
2615         bool gmode = false;
2616         int prev_status;
2617
2618         err = find_wldev_for_phymode(wl, new_mode, &up_dev, &gmode);
2619         if (err) {
2620                 b43legacyerr(wl, "Could not find a device for %s-PHY mode\n",
2621                        phymode_to_string(new_mode));
2622                 return err;
2623         }
2624         if ((up_dev == wl->current_dev) &&
2625             (!!wl->current_dev->phy.gmode == !!gmode))
2626                 /* This device is already running. */
2627                 return 0;
2628         b43legacydbg(wl, "Reconfiguring PHYmode to %s-PHY\n",
2629                phymode_to_string(new_mode));
2630         down_dev = wl->current_dev;
2631
2632         prev_status = b43legacy_status(down_dev);
2633         /* Shutdown the currently running core. */
2634         if (prev_status >= B43legacy_STAT_STARTED)
2635                 b43legacy_wireless_core_stop(down_dev);
2636         if (prev_status >= B43legacy_STAT_INITIALIZED)
2637                 b43legacy_wireless_core_exit(down_dev);
2638
2639         if (down_dev != up_dev)
2640                 /* We switch to a different core, so we put PHY into
2641                  * RESET on the old core. */
2642                 b43legacy_put_phy_into_reset(down_dev);
2643
2644         /* Now start the new core. */
2645         up_dev->phy.gmode = gmode;
2646         if (prev_status >= B43legacy_STAT_INITIALIZED) {
2647                 err = b43legacy_wireless_core_init(up_dev);
2648                 if (err) {
2649                         b43legacyerr(wl, "Fatal: Could not initialize device"
2650                                      " for newly selected %s-PHY mode\n",
2651                                      phymode_to_string(new_mode));
2652                         goto init_failure;
2653                 }
2654         }
2655         if (prev_status >= B43legacy_STAT_STARTED) {
2656                 err = b43legacy_wireless_core_start(up_dev);
2657                 if (err) {
2658                         b43legacyerr(wl, "Fatal: Could not start device for "
2659                                "newly selected %s-PHY mode\n",
2660                                phymode_to_string(new_mode));
2661                         b43legacy_wireless_core_exit(up_dev);
2662                         goto init_failure;
2663                 }
2664         }
2665         B43legacy_WARN_ON(b43legacy_status(up_dev) != prev_status);
2666
2667         b43legacy_shm_write32(up_dev, B43legacy_SHM_SHARED, 0x003E, 0);
2668
2669         wl->current_dev = up_dev;
2670
2671         return 0;
2672 init_failure:
2673         /* Whoops, failed to init the new core. No core is operating now. */
2674         wl->current_dev = NULL;
2675         return err;
2676 }
2677
2678 /* Write the short and long frame retry limit values. */
2679 static void b43legacy_set_retry_limits(struct b43legacy_wldev *dev,
2680                                        unsigned int short_retry,
2681                                        unsigned int long_retry)
2682 {
2683         /* The retry limit is a 4-bit counter. Enforce this to avoid overflowing
2684          * the chip-internal counter. */
2685         short_retry = min(short_retry, (unsigned int)0xF);
2686         long_retry = min(long_retry, (unsigned int)0xF);
2687
2688         b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS, 0x0006, short_retry);
2689         b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS, 0x0007, long_retry);
2690 }
2691
2692 static int b43legacy_op_dev_config(struct ieee80211_hw *hw,
2693                                    u32 changed)
2694 {
2695         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2696         struct b43legacy_wldev *dev;
2697         struct b43legacy_phy *phy;
2698         struct ieee80211_conf *conf = &hw->conf;
2699         unsigned long flags;
2700         unsigned int new_phymode = 0xFFFF;
2701         int antenna_tx;
2702         int err = 0;
2703
2704         antenna_tx = B43legacy_ANTENNA_DEFAULT;
2705
2706         mutex_lock(&wl->mutex);
2707         dev = wl->current_dev;
2708         phy = &dev->phy;
2709
2710         if (changed & IEEE80211_CONF_CHANGE_RETRY_LIMITS)
2711                 b43legacy_set_retry_limits(dev,
2712                                            conf->short_frame_max_tx_count,
2713                                            conf->long_frame_max_tx_count);
2714         changed &= ~IEEE80211_CONF_CHANGE_RETRY_LIMITS;
2715         if (!changed)
2716                 goto out_unlock_mutex;
2717
2718         /* Switch the PHY mode (if necessary). */
2719         switch (conf->chandef.chan->band) {
2720         case IEEE80211_BAND_2GHZ:
2721                 if (phy->type == B43legacy_PHYTYPE_B)
2722                         new_phymode = B43legacy_PHYMODE_B;
2723                 else
2724                         new_phymode = B43legacy_PHYMODE_G;
2725                 break;
2726         default:
2727                 B43legacy_WARN_ON(1);
2728         }
2729         err = b43legacy_switch_phymode(wl, new_phymode);
2730         if (err)
2731                 goto out_unlock_mutex;
2732
2733         /* Disable IRQs while reconfiguring the device.
2734          * This makes it possible to drop the spinlock throughout
2735          * the reconfiguration process. */
2736         spin_lock_irqsave(&wl->irq_lock, flags);
2737         if (b43legacy_status(dev) < B43legacy_STAT_STARTED) {
2738                 spin_unlock_irqrestore(&wl->irq_lock, flags);
2739                 goto out_unlock_mutex;
2740         }
2741         b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, 0);
2742         spin_unlock_irqrestore(&wl->irq_lock, flags);
2743         b43legacy_synchronize_irq(dev);
2744
2745         /* Switch to the requested channel.
2746          * The firmware takes care of races with the TX handler. */
2747         if (conf->chandef.chan->hw_value != phy->channel)
2748                 b43legacy_radio_selectchannel(dev, conf->chandef.chan->hw_value,
2749                                               0);
2750
2751         dev->wl->radiotap_enabled = !!(conf->flags & IEEE80211_CONF_MONITOR);
2752
2753         /* Adjust the desired TX power level. */
2754         if (conf->power_level != 0) {
2755                 if (conf->power_level != phy->power_level) {
2756                         phy->power_level = conf->power_level;
2757                         b43legacy_phy_xmitpower(dev);
2758                 }
2759         }
2760
2761         /* Antennas for RX and management frame TX. */
2762         b43legacy_mgmtframe_txantenna(dev, antenna_tx);
2763
2764         if (wl->radio_enabled != phy->radio_on) {
2765                 if (wl->radio_enabled) {
2766                         b43legacy_radio_turn_on(dev);
2767                         b43legacyinfo(dev->wl, "Radio turned on by software\n");
2768                         if (!dev->radio_hw_enable)
2769                                 b43legacyinfo(dev->wl, "The hardware RF-kill"
2770                                               " button still turns the radio"
2771                                               " physically off. Press the"
2772                                               " button to turn it on.\n");
2773                 } else {
2774                         b43legacy_radio_turn_off(dev, 0);
2775                         b43legacyinfo(dev->wl, "Radio turned off by"
2776                                       " software\n");
2777                 }
2778         }
2779
2780         spin_lock_irqsave(&wl->irq_lock, flags);
2781         b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, dev->irq_mask);
2782         mmiowb();
2783         spin_unlock_irqrestore(&wl->irq_lock, flags);
2784 out_unlock_mutex:
2785         mutex_unlock(&wl->mutex);
2786
2787         return err;
2788 }
2789
2790 static void b43legacy_update_basic_rates(struct b43legacy_wldev *dev, u32 brates)
2791 {
2792         struct ieee80211_supported_band *sband =
2793                 dev->wl->hw->wiphy->bands[IEEE80211_BAND_2GHZ];
2794         struct ieee80211_rate *rate;
2795         int i;
2796         u16 basic, direct, offset, basic_offset, rateptr;
2797
2798         for (i = 0; i < sband->n_bitrates; i++) {
2799                 rate = &sband->bitrates[i];
2800
2801                 if (b43legacy_is_cck_rate(rate->hw_value)) {
2802                         direct = B43legacy_SHM_SH_CCKDIRECT;
2803                         basic = B43legacy_SHM_SH_CCKBASIC;
2804                         offset = b43legacy_plcp_get_ratecode_cck(rate->hw_value);
2805                         offset &= 0xF;
2806                 } else {
2807                         direct = B43legacy_SHM_SH_OFDMDIRECT;
2808                         basic = B43legacy_SHM_SH_OFDMBASIC;
2809                         offset = b43legacy_plcp_get_ratecode_ofdm(rate->hw_value);
2810                         offset &= 0xF;
2811                 }
2812
2813                 rate = ieee80211_get_response_rate(sband, brates, rate->bitrate);
2814
2815                 if (b43legacy_is_cck_rate(rate->hw_value)) {
2816                         basic_offset = b43legacy_plcp_get_ratecode_cck(rate->hw_value);
2817                         basic_offset &= 0xF;
2818                 } else {
2819                         basic_offset = b43legacy_plcp_get_ratecode_ofdm(rate->hw_value);
2820                         basic_offset &= 0xF;
2821                 }
2822
2823                 /*
2824                  * Get the pointer that we need to point to
2825                  * from the direct map
2826                  */
2827                 rateptr = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
2828                                                direct + 2 * basic_offset);
2829                 /* and write it to the basic map */
2830                 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
2831                                       basic + 2 * offset, rateptr);
2832         }
2833 }
2834
2835 static void b43legacy_op_bss_info_changed(struct ieee80211_hw *hw,
2836                                     struct ieee80211_vif *vif,
2837                                     struct ieee80211_bss_conf *conf,
2838                                     u32 changed)
2839 {
2840         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2841         struct b43legacy_wldev *dev;
2842         unsigned long flags;
2843
2844         mutex_lock(&wl->mutex);
2845         B43legacy_WARN_ON(wl->vif != vif);
2846
2847         dev = wl->current_dev;
2848
2849         /* Disable IRQs while reconfiguring the device.
2850          * This makes it possible to drop the spinlock throughout
2851          * the reconfiguration process. */
2852         spin_lock_irqsave(&wl->irq_lock, flags);
2853         if (b43legacy_status(dev) < B43legacy_STAT_STARTED) {
2854                 spin_unlock_irqrestore(&wl->irq_lock, flags);
2855                 goto out_unlock_mutex;
2856         }
2857         b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, 0);
2858
2859         if (changed & BSS_CHANGED_BSSID) {
2860                 b43legacy_synchronize_irq(dev);
2861
2862                 if (conf->bssid)
2863                         memcpy(wl->bssid, conf->bssid, ETH_ALEN);
2864                 else
2865                         eth_zero_addr(wl->bssid);
2866         }
2867
2868         if (b43legacy_status(dev) >= B43legacy_STAT_INITIALIZED) {
2869                 if (changed & BSS_CHANGED_BEACON &&
2870                     (b43legacy_is_mode(wl, NL80211_IFTYPE_AP) ||
2871                      b43legacy_is_mode(wl, NL80211_IFTYPE_ADHOC)))
2872                         b43legacy_update_templates(wl);
2873
2874                 if (changed & BSS_CHANGED_BSSID)
2875                         b43legacy_write_mac_bssid_templates(dev);
2876         }
2877         spin_unlock_irqrestore(&wl->irq_lock, flags);
2878
2879         b43legacy_mac_suspend(dev);
2880
2881         if (changed & BSS_CHANGED_BEACON_INT &&
2882             (b43legacy_is_mode(wl, NL80211_IFTYPE_AP) ||
2883              b43legacy_is_mode(wl, NL80211_IFTYPE_ADHOC)))
2884                 b43legacy_set_beacon_int(dev, conf->beacon_int);
2885
2886         if (changed & BSS_CHANGED_BASIC_RATES)
2887                 b43legacy_update_basic_rates(dev, conf->basic_rates);
2888
2889         if (changed & BSS_CHANGED_ERP_SLOT) {
2890                 if (conf->use_short_slot)
2891                         b43legacy_short_slot_timing_enable(dev);
2892                 else
2893                         b43legacy_short_slot_timing_disable(dev);
2894         }
2895
2896         b43legacy_mac_enable(dev);
2897
2898         spin_lock_irqsave(&wl->irq_lock, flags);
2899         b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, dev->irq_mask);
2900         /* XXX: why? */
2901         mmiowb();
2902         spin_unlock_irqrestore(&wl->irq_lock, flags);
2903  out_unlock_mutex:
2904         mutex_unlock(&wl->mutex);
2905 }
2906
2907 static void b43legacy_op_configure_filter(struct ieee80211_hw *hw,
2908                                           unsigned int changed,
2909                                           unsigned int *fflags,u64 multicast)
2910 {
2911         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2912         struct b43legacy_wldev *dev = wl->current_dev;
2913         unsigned long flags;
2914
2915         if (!dev) {
2916                 *fflags = 0;
2917                 return;
2918         }
2919
2920         spin_lock_irqsave(&wl->irq_lock, flags);
2921         *fflags &= FIF_ALLMULTI |
2922                   FIF_FCSFAIL |
2923                   FIF_PLCPFAIL |
2924                   FIF_CONTROL |
2925                   FIF_OTHER_BSS |
2926                   FIF_BCN_PRBRESP_PROMISC;
2927
2928         changed &= FIF_ALLMULTI |
2929                    FIF_FCSFAIL |
2930                    FIF_PLCPFAIL |
2931                    FIF_CONTROL |
2932                    FIF_OTHER_BSS |
2933                    FIF_BCN_PRBRESP_PROMISC;
2934
2935         wl->filter_flags = *fflags;
2936
2937         if (changed && b43legacy_status(dev) >= B43legacy_STAT_INITIALIZED)
2938                 b43legacy_adjust_opmode(dev);
2939         spin_unlock_irqrestore(&wl->irq_lock, flags);
2940 }
2941
2942 /* Locking: wl->mutex */
2943 static void b43legacy_wireless_core_stop(struct b43legacy_wldev *dev)
2944 {
2945         struct b43legacy_wl *wl = dev->wl;
2946         unsigned long flags;
2947         int queue_num;
2948
2949         if (b43legacy_status(dev) < B43legacy_STAT_STARTED)
2950                 return;
2951
2952         /* Disable and sync interrupts. We must do this before than
2953          * setting the status to INITIALIZED, as the interrupt handler
2954          * won't care about IRQs then. */
2955         spin_lock_irqsave(&wl->irq_lock, flags);
2956         b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, 0);
2957         b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_MASK); /* flush */
2958         spin_unlock_irqrestore(&wl->irq_lock, flags);
2959         b43legacy_synchronize_irq(dev);
2960
2961         b43legacy_set_status(dev, B43legacy_STAT_INITIALIZED);
2962
2963         mutex_unlock(&wl->mutex);
2964         /* Must unlock as it would otherwise deadlock. No races here.
2965          * Cancel the possibly running self-rearming periodic work. */
2966         cancel_delayed_work_sync(&dev->periodic_work);
2967         cancel_work_sync(&wl->tx_work);
2968         mutex_lock(&wl->mutex);
2969
2970         /* Drain all TX queues. */
2971         for (queue_num = 0; queue_num < B43legacy_QOS_QUEUE_NUM; queue_num++) {
2972                 while (skb_queue_len(&wl->tx_queue[queue_num]))
2973                         dev_kfree_skb(skb_dequeue(&wl->tx_queue[queue_num]));
2974         }
2975
2976 b43legacy_mac_suspend(dev);
2977         free_irq(dev->dev->irq, dev);
2978         b43legacydbg(wl, "Wireless interface stopped\n");
2979 }
2980
2981 /* Locking: wl->mutex */
2982 static int b43legacy_wireless_core_start(struct b43legacy_wldev *dev)
2983 {
2984         int err;
2985
2986         B43legacy_WARN_ON(b43legacy_status(dev) != B43legacy_STAT_INITIALIZED);
2987
2988         drain_txstatus_queue(dev);
2989         err = request_irq(dev->dev->irq, b43legacy_interrupt_handler,
2990                           IRQF_SHARED, KBUILD_MODNAME, dev);
2991         if (err) {
2992                 b43legacyerr(dev->wl, "Cannot request IRQ-%d\n",
2993                        dev->dev->irq);
2994                 goto out;
2995         }
2996         /* We are ready to run. */
2997         ieee80211_wake_queues(dev->wl->hw);
2998         b43legacy_set_status(dev, B43legacy_STAT_STARTED);
2999
3000         /* Start data flow (TX/RX) */
3001         b43legacy_mac_enable(dev);
3002         b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, dev->irq_mask);
3003
3004         /* Start maintenance work */
3005         b43legacy_periodic_tasks_setup(dev);
3006
3007         b43legacydbg(dev->wl, "Wireless interface started\n");
3008 out:
3009         return err;
3010 }
3011
3012 /* Get PHY and RADIO versioning numbers */
3013 static int b43legacy_phy_versioning(struct b43legacy_wldev *dev)
3014 {
3015         struct b43legacy_phy *phy = &dev->phy;
3016         u32 tmp;
3017         u8 analog_type;
3018         u8 phy_type;
3019         u8 phy_rev;
3020         u16 radio_manuf;
3021         u16 radio_ver;
3022         u16 radio_rev;
3023         int unsupported = 0;
3024
3025         /* Get PHY versioning */
3026         tmp = b43legacy_read16(dev, B43legacy_MMIO_PHY_VER);
3027         analog_type = (tmp & B43legacy_PHYVER_ANALOG)
3028                       >> B43legacy_PHYVER_ANALOG_SHIFT;
3029         phy_type = (tmp & B43legacy_PHYVER_TYPE) >> B43legacy_PHYVER_TYPE_SHIFT;
3030         phy_rev = (tmp & B43legacy_PHYVER_VERSION);
3031         switch (phy_type) {
3032         case B43legacy_PHYTYPE_B:
3033                 if (phy_rev != 2 && phy_rev != 4
3034                     && phy_rev != 6 && phy_rev != 7)
3035                         unsupported = 1;
3036                 break;
3037         case B43legacy_PHYTYPE_G:
3038                 if (phy_rev > 8)
3039                         unsupported = 1;
3040                 break;
3041         default:
3042                 unsupported = 1;
3043         }
3044         if (unsupported) {
3045                 b43legacyerr(dev->wl, "FOUND UNSUPPORTED PHY "
3046                        "(Analog %u, Type %u, Revision %u)\n",
3047                        analog_type, phy_type, phy_rev);
3048                 return -EOPNOTSUPP;
3049         }
3050         b43legacydbg(dev->wl, "Found PHY: Analog %u, Type %u, Revision %u\n",
3051                analog_type, phy_type, phy_rev);
3052
3053
3054         /* Get RADIO versioning */
3055         if (dev->dev->bus->chip_id == 0x4317) {
3056                 if (dev->dev->bus->chip_rev == 0)
3057                         tmp = 0x3205017F;
3058                 else if (dev->dev->bus->chip_rev == 1)
3059                         tmp = 0x4205017F;
3060                 else
3061                         tmp = 0x5205017F;
3062         } else {
3063                 b43legacy_write16(dev, B43legacy_MMIO_RADIO_CONTROL,
3064                                   B43legacy_RADIOCTL_ID);
3065                 tmp = b43legacy_read16(dev, B43legacy_MMIO_RADIO_DATA_HIGH);
3066                 tmp <<= 16;
3067                 b43legacy_write16(dev, B43legacy_MMIO_RADIO_CONTROL,
3068                                   B43legacy_RADIOCTL_ID);
3069                 tmp |= b43legacy_read16(dev, B43legacy_MMIO_RADIO_DATA_LOW);
3070         }
3071         radio_manuf = (tmp & 0x00000FFF);
3072         radio_ver = (tmp & 0x0FFFF000) >> 12;
3073         radio_rev = (tmp & 0xF0000000) >> 28;
3074         switch (phy_type) {
3075         case B43legacy_PHYTYPE_B:
3076                 if ((radio_ver & 0xFFF0) != 0x2050)
3077                         unsupported = 1;
3078                 break;
3079         case B43legacy_PHYTYPE_G:
3080                 if (radio_ver != 0x2050)
3081                         unsupported = 1;
3082                 break;
3083         default:
3084                 B43legacy_BUG_ON(1);
3085         }
3086         if (unsupported) {
3087                 b43legacyerr(dev->wl, "FOUND UNSUPPORTED RADIO "
3088                        "(Manuf 0x%X, Version 0x%X, Revision %u)\n",
3089                        radio_manuf, radio_ver, radio_rev);
3090                 return -EOPNOTSUPP;
3091         }
3092         b43legacydbg(dev->wl, "Found Radio: Manuf 0x%X, Version 0x%X,"
3093                      " Revision %u\n", radio_manuf, radio_ver, radio_rev);
3094
3095
3096         phy->radio_manuf = radio_manuf;
3097         phy->radio_ver = radio_ver;
3098         phy->radio_rev = radio_rev;
3099
3100         phy->analog = analog_type;
3101         phy->type = phy_type;
3102         phy->rev = phy_rev;
3103
3104         return 0;
3105 }
3106
3107 static void setup_struct_phy_for_init(struct b43legacy_wldev *dev,
3108                                       struct b43legacy_phy *phy)
3109 {
3110         struct b43legacy_lopair *lo;
3111         int i;
3112
3113         memset(phy->minlowsig, 0xFF, sizeof(phy->minlowsig));
3114         memset(phy->minlowsigpos, 0, sizeof(phy->minlowsigpos));
3115
3116         /* Assume the radio is enabled. If it's not enabled, the state will
3117          * immediately get fixed on the first periodic work run. */
3118         dev->radio_hw_enable = true;
3119
3120         phy->savedpctlreg = 0xFFFF;
3121         phy->aci_enable = false;
3122         phy->aci_wlan_automatic = false;
3123         phy->aci_hw_rssi = false;
3124
3125         lo = phy->_lo_pairs;
3126         if (lo)
3127                 memset(lo, 0, sizeof(struct b43legacy_lopair) *
3128                                      B43legacy_LO_COUNT);
3129         phy->max_lb_gain = 0;
3130         phy->trsw_rx_gain = 0;
3131
3132         /* Set default attenuation values. */
3133         phy->bbatt = b43legacy_default_baseband_attenuation(dev);
3134         phy->rfatt = b43legacy_default_radio_attenuation(dev);
3135         phy->txctl1 = b43legacy_default_txctl1(dev);
3136         phy->txpwr_offset = 0;
3137
3138         /* NRSSI */
3139         phy->nrssislope = 0;
3140         for (i = 0; i < ARRAY_SIZE(phy->nrssi); i++)
3141                 phy->nrssi[i] = -1000;
3142         for (i = 0; i < ARRAY_SIZE(phy->nrssi_lt); i++)
3143                 phy->nrssi_lt[i] = i;
3144
3145         phy->lofcal = 0xFFFF;
3146         phy->initval = 0xFFFF;
3147
3148         phy->interfmode = B43legacy_INTERFMODE_NONE;
3149         phy->channel = 0xFF;
3150 }
3151
3152 static void setup_struct_wldev_for_init(struct b43legacy_wldev *dev)
3153 {
3154         /* Flags */
3155         dev->dfq_valid = false;
3156
3157         /* Stats */
3158         memset(&dev->stats, 0, sizeof(dev->stats));
3159
3160         setup_struct_phy_for_init(dev, &dev->phy);
3161
3162         /* IRQ related flags */
3163         dev->irq_reason = 0;
3164         memset(dev->dma_reason, 0, sizeof(dev->dma_reason));
3165         dev->irq_mask = B43legacy_IRQ_MASKTEMPLATE;
3166
3167         dev->mac_suspended = 1;
3168
3169         /* Noise calculation context */
3170         memset(&dev->noisecalc, 0, sizeof(dev->noisecalc));
3171 }
3172
3173 static void b43legacy_set_synth_pu_delay(struct b43legacy_wldev *dev,
3174                                           bool idle) {
3175         u16 pu_delay = 1050;
3176
3177         if (b43legacy_is_mode(dev->wl, NL80211_IFTYPE_ADHOC) || idle)
3178                 pu_delay = 500;
3179         if ((dev->phy.radio_ver == 0x2050) && (dev->phy.radio_rev == 8))
3180                 pu_delay = max(pu_delay, (u16)2400);
3181
3182         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
3183                               B43legacy_SHM_SH_SPUWKUP, pu_delay);
3184 }
3185
3186 /* Set the TSF CFP pre-TargetBeaconTransmissionTime. */
3187 static void b43legacy_set_pretbtt(struct b43legacy_wldev *dev)
3188 {
3189         u16 pretbtt;
3190
3191         /* The time value is in microseconds. */
3192         if (b43legacy_is_mode(dev->wl, NL80211_IFTYPE_ADHOC))
3193                 pretbtt = 2;
3194         else
3195                 pretbtt = 250;
3196         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
3197                               B43legacy_SHM_SH_PRETBTT, pretbtt);
3198         b43legacy_write16(dev, B43legacy_MMIO_TSF_CFP_PRETBTT, pretbtt);
3199 }
3200
3201 /* Shutdown a wireless core */
3202 /* Locking: wl->mutex */
3203 static void b43legacy_wireless_core_exit(struct b43legacy_wldev *dev)
3204 {
3205         struct b43legacy_phy *phy = &dev->phy;
3206         u32 macctl;
3207
3208         B43legacy_WARN_ON(b43legacy_status(dev) > B43legacy_STAT_INITIALIZED);
3209         if (b43legacy_status(dev) != B43legacy_STAT_INITIALIZED)
3210                 return;
3211         b43legacy_set_status(dev, B43legacy_STAT_UNINIT);
3212
3213         /* Stop the microcode PSM. */
3214         macctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
3215         macctl &= ~B43legacy_MACCTL_PSM_RUN;
3216         macctl |= B43legacy_MACCTL_PSM_JMP0;
3217         b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl);
3218
3219         b43legacy_leds_exit(dev);
3220         b43legacy_rng_exit(dev->wl);
3221         b43legacy_pio_free(dev);
3222         b43legacy_dma_free(dev);
3223         b43legacy_chip_exit(dev);
3224         b43legacy_radio_turn_off(dev, 1);
3225         b43legacy_switch_analog(dev, 0);
3226         if (phy->dyn_tssi_tbl)
3227                 kfree(phy->tssi2dbm);
3228         kfree(phy->lo_control);
3229         phy->lo_control = NULL;
3230         if (dev->wl->current_beacon) {
3231                 dev_kfree_skb_any(dev->wl->current_beacon);
3232                 dev->wl->current_beacon = NULL;
3233         }
3234
3235         ssb_device_disable(dev->dev, 0);
3236         ssb_bus_may_powerdown(dev->dev->bus);
3237 }
3238
3239 static void prepare_phy_data_for_init(struct b43legacy_wldev *dev)
3240 {
3241         struct b43legacy_phy *phy = &dev->phy;
3242         int i;
3243
3244         /* Set default attenuation values. */
3245         phy->bbatt = b43legacy_default_baseband_attenuation(dev);
3246         phy->rfatt = b43legacy_default_radio_attenuation(dev);
3247         phy->txctl1 = b43legacy_default_txctl1(dev);
3248         phy->txctl2 = 0xFFFF;
3249         phy->txpwr_offset = 0;
3250
3251         /* NRSSI */
3252         phy->nrssislope = 0;
3253         for (i = 0; i < ARRAY_SIZE(phy->nrssi); i++)
3254                 phy->nrssi[i] = -1000;
3255         for (i = 0; i < ARRAY_SIZE(phy->nrssi_lt); i++)
3256                 phy->nrssi_lt[i] = i;
3257
3258         phy->lofcal = 0xFFFF;
3259         phy->initval = 0xFFFF;
3260
3261         phy->aci_enable = false;
3262         phy->aci_wlan_automatic = false;
3263         phy->aci_hw_rssi = false;
3264
3265         phy->antenna_diversity = 0xFFFF;
3266         memset(phy->minlowsig, 0xFF, sizeof(phy->minlowsig));
3267         memset(phy->minlowsigpos, 0, sizeof(phy->minlowsigpos));
3268
3269         /* Flags */
3270         phy->calibrated = 0;
3271
3272         if (phy->_lo_pairs)
3273                 memset(phy->_lo_pairs, 0,
3274                        sizeof(struct b43legacy_lopair) * B43legacy_LO_COUNT);
3275         memset(phy->loopback_gain, 0, sizeof(phy->loopback_gain));
3276 }
3277
3278 /* Initialize a wireless core */
3279 static int b43legacy_wireless_core_init(struct b43legacy_wldev *dev)
3280 {
3281         struct b43legacy_wl *wl = dev->wl;
3282         struct ssb_bus *bus = dev->dev->bus;
3283         struct b43legacy_phy *phy = &dev->phy;
3284         struct ssb_sprom *sprom = &dev->dev->bus->sprom;
3285         int err;
3286         u32 hf;
3287         u32 tmp;
3288
3289         B43legacy_WARN_ON(b43legacy_status(dev) != B43legacy_STAT_UNINIT);
3290
3291         err = ssb_bus_powerup(bus, 0);
3292         if (err)
3293                 goto out;
3294         if (!ssb_device_is_enabled(dev->dev)) {
3295                 tmp = phy->gmode ? B43legacy_TMSLOW_GMODE : 0;
3296                 b43legacy_wireless_core_reset(dev, tmp);
3297         }
3298
3299         if ((phy->type == B43legacy_PHYTYPE_B) ||
3300             (phy->type == B43legacy_PHYTYPE_G)) {
3301                 phy->_lo_pairs = kzalloc(sizeof(struct b43legacy_lopair)
3302                                          * B43legacy_LO_COUNT,
3303                                          GFP_KERNEL);
3304                 if (!phy->_lo_pairs)
3305                         return -ENOMEM;
3306         }
3307         setup_struct_wldev_for_init(dev);
3308
3309         err = b43legacy_phy_init_tssi2dbm_table(dev);
3310         if (err)
3311                 goto err_kfree_lo_control;
3312
3313         /* Enable IRQ routing to this device. */
3314         ssb_pcicore_dev_irqvecs_enable(&bus->pcicore, dev->dev);
3315
3316         prepare_phy_data_for_init(dev);
3317         b43legacy_phy_calibrate(dev);
3318         err = b43legacy_chip_init(dev);
3319         if (err)
3320                 goto err_kfree_tssitbl;
3321         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
3322                               B43legacy_SHM_SH_WLCOREREV,
3323                               dev->dev->id.revision);
3324         hf = b43legacy_hf_read(dev);
3325         if (phy->type == B43legacy_PHYTYPE_G) {
3326                 hf |= B43legacy_HF_SYMW;
3327                 if (phy->rev == 1)
3328                         hf |= B43legacy_HF_GDCW;
3329                 if (sprom->boardflags_lo & B43legacy_BFL_PACTRL)
3330                         hf |= B43legacy_HF_OFDMPABOOST;
3331         } else if (phy->type == B43legacy_PHYTYPE_B) {
3332                 hf |= B43legacy_HF_SYMW;
3333                 if (phy->rev >= 2 && phy->radio_ver == 0x2050)
3334                         hf &= ~B43legacy_HF_GDCW;
3335         }
3336         b43legacy_hf_write(dev, hf);
3337
3338         b43legacy_set_retry_limits(dev,
3339                                    B43legacy_DEFAULT_SHORT_RETRY_LIMIT,
3340                                    B43legacy_DEFAULT_LONG_RETRY_LIMIT);
3341
3342         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
3343                               0x0044, 3);
3344         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
3345                               0x0046, 2);
3346
3347         /* Disable sending probe responses from firmware.
3348          * Setting the MaxTime to one usec will always trigger
3349          * a timeout, so we never send any probe resp.
3350          * A timeout of zero is infinite. */
3351         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
3352                               B43legacy_SHM_SH_PRMAXTIME, 1);
3353
3354         b43legacy_rate_memory_init(dev);
3355
3356         /* Minimum Contention Window */
3357         if (phy->type == B43legacy_PHYTYPE_B)
3358                 b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS,
3359                                       0x0003, 31);
3360         else
3361                 b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS,
3362                                       0x0003, 15);
3363         /* Maximum Contention Window */
3364         b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS,
3365                               0x0004, 1023);
3366
3367         do {
3368                 if (b43legacy_using_pio(dev))
3369                         err = b43legacy_pio_init(dev);
3370                 else {
3371                         err = b43legacy_dma_init(dev);
3372                         if (!err)
3373                                 b43legacy_qos_init(dev);
3374                 }
3375         } while (err == -EAGAIN);
3376         if (err)
3377                 goto err_chip_exit;
3378
3379         b43legacy_set_synth_pu_delay(dev, 1);
3380
3381         ssb_bus_powerup(bus, 1); /* Enable dynamic PCTL */
3382         b43legacy_upload_card_macaddress(dev);
3383         b43legacy_security_init(dev);
3384         b43legacy_rng_init(wl);
3385
3386         ieee80211_wake_queues(dev->wl->hw);
3387         b43legacy_set_status(dev, B43legacy_STAT_INITIALIZED);
3388
3389         b43legacy_leds_init(dev);
3390 out:
3391         return err;
3392
3393 err_chip_exit:
3394         b43legacy_chip_exit(dev);
3395 err_kfree_tssitbl:
3396         if (phy->dyn_tssi_tbl)
3397                 kfree(phy->tssi2dbm);
3398 err_kfree_lo_control:
3399         kfree(phy->lo_control);
3400         phy->lo_control = NULL;
3401         ssb_bus_may_powerdown(bus);
3402         B43legacy_WARN_ON(b43legacy_status(dev) != B43legacy_STAT_UNINIT);
3403         return err;
3404 }
3405
3406 static int b43legacy_op_add_interface(struct ieee80211_hw *hw,
3407                                       struct ieee80211_vif *vif)
3408 {
3409         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
3410         struct b43legacy_wldev *dev;
3411         unsigned long flags;
3412         int err = -EOPNOTSUPP;
3413
3414         /* TODO: allow WDS/AP devices to coexist */
3415
3416         if (vif->type != NL80211_IFTYPE_AP &&
3417             vif->type != NL80211_IFTYPE_STATION &&
3418             vif->type != NL80211_IFTYPE_WDS &&
3419             vif->type != NL80211_IFTYPE_ADHOC)
3420                 return -EOPNOTSUPP;
3421
3422         mutex_lock(&wl->mutex);
3423         if (wl->operating)
3424                 goto out_mutex_unlock;
3425
3426         b43legacydbg(wl, "Adding Interface type %d\n", vif->type);
3427
3428         dev = wl->current_dev;
3429         wl->operating = true;
3430         wl->vif = vif;
3431         wl->if_type = vif->type;
3432         memcpy(wl->mac_addr, vif->addr, ETH_ALEN);
3433
3434         spin_lock_irqsave(&wl->irq_lock, flags);
3435         b43legacy_adjust_opmode(dev);
3436         b43legacy_set_pretbtt(dev);
3437         b43legacy_set_synth_pu_delay(dev, 0);
3438         b43legacy_upload_card_macaddress(dev);
3439         spin_unlock_irqrestore(&wl->irq_lock, flags);
3440
3441         err = 0;
3442  out_mutex_unlock:
3443         mutex_unlock(&wl->mutex);
3444
3445         return err;
3446 }
3447
3448 static void b43legacy_op_remove_interface(struct ieee80211_hw *hw,
3449                                           struct ieee80211_vif *vif)
3450 {
3451         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
3452         struct b43legacy_wldev *dev = wl->current_dev;
3453         unsigned long flags;
3454
3455         b43legacydbg(wl, "Removing Interface type %d\n", vif->type);
3456
3457         mutex_lock(&wl->mutex);
3458
3459         B43legacy_WARN_ON(!wl->operating);
3460         B43legacy_WARN_ON(wl->vif != vif);
3461         wl->vif = NULL;
3462
3463         wl->operating = false;
3464
3465         spin_lock_irqsave(&wl->irq_lock, flags);
3466         b43legacy_adjust_opmode(dev);
3467         eth_zero_addr(wl->mac_addr);
3468         b43legacy_upload_card_macaddress(dev);
3469         spin_unlock_irqrestore(&wl->irq_lock, flags);
3470
3471         mutex_unlock(&wl->mutex);
3472 }
3473
3474 static int b43legacy_op_start(struct ieee80211_hw *hw)
3475 {
3476         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
3477         struct b43legacy_wldev *dev = wl->current_dev;
3478         int did_init = 0;
3479         int err = 0;
3480
3481         /* Kill all old instance specific information to make sure
3482          * the card won't use it in the short timeframe between start
3483          * and mac80211 reconfiguring it. */
3484         eth_zero_addr(wl->bssid);
3485         eth_zero_addr(wl->mac_addr);
3486         wl->filter_flags = 0;
3487         wl->beacon0_uploaded = false;
3488         wl->beacon1_uploaded = false;
3489         wl->beacon_templates_virgin = true;
3490         wl->radio_enabled = true;
3491
3492         mutex_lock(&wl->mutex);
3493
3494         if (b43legacy_status(dev) < B43legacy_STAT_INITIALIZED) {
3495                 err = b43legacy_wireless_core_init(dev);
3496                 if (err)
3497                         goto out_mutex_unlock;
3498                 did_init = 1;
3499         }
3500
3501         if (b43legacy_status(dev) < B43legacy_STAT_STARTED) {
3502                 err = b43legacy_wireless_core_start(dev);
3503                 if (err) {
3504                         if (did_init)
3505                                 b43legacy_wireless_core_exit(dev);
3506                         goto out_mutex_unlock;
3507                 }
3508         }
3509
3510         wiphy_rfkill_start_polling(hw->wiphy);
3511
3512 out_mutex_unlock:
3513         mutex_unlock(&wl->mutex);
3514
3515         return err;
3516 }
3517
3518 static void b43legacy_op_stop(struct ieee80211_hw *hw)
3519 {
3520         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
3521         struct b43legacy_wldev *dev = wl->current_dev;
3522
3523         cancel_work_sync(&(wl->beacon_update_trigger));
3524
3525         mutex_lock(&wl->mutex);
3526         if (b43legacy_status(dev) >= B43legacy_STAT_STARTED)
3527                 b43legacy_wireless_core_stop(dev);
3528         b43legacy_wireless_core_exit(dev);
3529         wl->radio_enabled = false;
3530         mutex_unlock(&wl->mutex);
3531 }
3532
3533 static int b43legacy_op_beacon_set_tim(struct ieee80211_hw *hw,
3534                                        struct ieee80211_sta *sta, bool set)
3535 {
3536         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
3537         unsigned long flags;
3538
3539         spin_lock_irqsave(&wl->irq_lock, flags);
3540         b43legacy_update_templates(wl);
3541         spin_unlock_irqrestore(&wl->irq_lock, flags);
3542
3543         return 0;
3544 }
3545
3546 static int b43legacy_op_get_survey(struct ieee80211_hw *hw, int idx,
3547                                    struct survey_info *survey)
3548 {
3549         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
3550         struct b43legacy_wldev *dev = wl->current_dev;
3551         struct ieee80211_conf *conf = &hw->conf;
3552
3553         if (idx != 0)
3554                 return -ENOENT;
3555
3556         survey->channel = conf->chandef.chan;
3557         survey->filled = SURVEY_INFO_NOISE_DBM;
3558         survey->noise = dev->stats.link_noise;
3559
3560         return 0;
3561 }
3562
3563 static const struct ieee80211_ops b43legacy_hw_ops = {
3564         .tx                     = b43legacy_op_tx,
3565         .conf_tx                = b43legacy_op_conf_tx,
3566         .add_interface          = b43legacy_op_add_interface,
3567         .remove_interface       = b43legacy_op_remove_interface,
3568         .config                 = b43legacy_op_dev_config,
3569         .bss_info_changed       = b43legacy_op_bss_info_changed,
3570         .configure_filter       = b43legacy_op_configure_filter,
3571         .get_stats              = b43legacy_op_get_stats,
3572         .start                  = b43legacy_op_start,
3573         .stop                   = b43legacy_op_stop,
3574         .set_tim                = b43legacy_op_beacon_set_tim,
3575         .get_survey             = b43legacy_op_get_survey,
3576         .rfkill_poll            = b43legacy_rfkill_poll,
3577 };
3578
3579 /* Hard-reset the chip. Do not call this directly.
3580  * Use b43legacy_controller_restart()
3581  */
3582 static void b43legacy_chip_reset(struct work_struct *work)
3583 {
3584         struct b43legacy_wldev *dev =
3585                 container_of(work, struct b43legacy_wldev, restart_work);
3586         struct b43legacy_wl *wl = dev->wl;
3587         int err = 0;
3588         int prev_status;
3589
3590         mutex_lock(&wl->mutex);
3591
3592         prev_status = b43legacy_status(dev);
3593         /* Bring the device down... */
3594         if (prev_status >= B43legacy_STAT_STARTED)
3595                 b43legacy_wireless_core_stop(dev);
3596         if (prev_status >= B43legacy_STAT_INITIALIZED)
3597                 b43legacy_wireless_core_exit(dev);
3598
3599         /* ...and up again. */
3600         if (prev_status >= B43legacy_STAT_INITIALIZED) {
3601                 err = b43legacy_wireless_core_init(dev);
3602                 if (err)
3603                         goto out;
3604         }
3605         if (prev_status >= B43legacy_STAT_STARTED) {
3606                 err = b43legacy_wireless_core_start(dev);
3607                 if (err) {
3608                         b43legacy_wireless_core_exit(dev);
3609                         goto out;
3610                 }
3611         }
3612 out:
3613         if (err)
3614                 wl->current_dev = NULL; /* Failed to init the dev. */
3615         mutex_unlock(&wl->mutex);
3616         if (err)
3617                 b43legacyerr(wl, "Controller restart FAILED\n");
3618         else
3619                 b43legacyinfo(wl, "Controller restarted\n");
3620 }
3621
3622 static int b43legacy_setup_modes(struct b43legacy_wldev *dev,
3623                                  int have_bphy,
3624                                  int have_gphy)
3625 {
3626         struct ieee80211_hw *hw = dev->wl->hw;
3627         struct b43legacy_phy *phy = &dev->phy;
3628
3629         phy->possible_phymodes = 0;
3630         if (have_bphy) {
3631                 hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
3632                         &b43legacy_band_2GHz_BPHY;
3633                 phy->possible_phymodes |= B43legacy_PHYMODE_B;
3634         }
3635
3636         if (have_gphy) {
3637                 hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
3638                         &b43legacy_band_2GHz_GPHY;
3639                 phy->possible_phymodes |= B43legacy_PHYMODE_G;
3640         }
3641
3642         return 0;
3643 }
3644
3645 static void b43legacy_wireless_core_detach(struct b43legacy_wldev *dev)
3646 {
3647         /* We release firmware that late to not be required to re-request
3648          * is all the time when we reinit the core. */
3649         b43legacy_release_firmware(dev);
3650 }
3651
3652 static int b43legacy_wireless_core_attach(struct b43legacy_wldev *dev)
3653 {
3654         struct b43legacy_wl *wl = dev->wl;
3655         struct ssb_bus *bus = dev->dev->bus;
3656         struct pci_dev *pdev = (bus->bustype == SSB_BUSTYPE_PCI) ? bus->host_pci : NULL;
3657         int err;
3658         int have_bphy = 0;
3659         int have_gphy = 0;
3660         u32 tmp;
3661
3662         /* Do NOT do any device initialization here.
3663          * Do it in wireless_core_init() instead.
3664          * This function is for gathering basic information about the HW, only.
3665          * Also some structs may be set up here. But most likely you want to
3666          * have that in core_init(), too.
3667          */
3668
3669         err = ssb_bus_powerup(bus, 0);
3670         if (err) {
3671                 b43legacyerr(wl, "Bus powerup failed\n");
3672                 goto out;
3673         }
3674         /* Get the PHY type. */
3675         if (dev->dev->id.revision >= 5) {
3676                 u32 tmshigh;
3677
3678                 tmshigh = ssb_read32(dev->dev, SSB_TMSHIGH);
3679                 have_gphy = !!(tmshigh & B43legacy_TMSHIGH_GPHY);
3680                 if (!have_gphy)
3681                         have_bphy = 1;
3682         } else if (dev->dev->id.revision == 4)
3683                 have_gphy = 1;
3684         else
3685                 have_bphy = 1;
3686
3687         dev->phy.gmode = (have_gphy || have_bphy);
3688         dev->phy.radio_on = true;
3689         tmp = dev->phy.gmode ? B43legacy_TMSLOW_GMODE : 0;
3690         b43legacy_wireless_core_reset(dev, tmp);
3691
3692         err = b43legacy_phy_versioning(dev);
3693         if (err)
3694                 goto err_powerdown;
3695         /* Check if this device supports multiband. */
3696         if (!pdev ||
3697             (pdev->device != 0x4312 &&
3698              pdev->device != 0x4319 &&
3699              pdev->device != 0x4324)) {
3700                 /* No multiband support. */
3701                 have_bphy = 0;
3702                 have_gphy = 0;
3703                 switch (dev->phy.type) {
3704                 case B43legacy_PHYTYPE_B:
3705                         have_bphy = 1;
3706                         break;
3707                 case B43legacy_PHYTYPE_G:
3708                         have_gphy = 1;
3709                         break;
3710                 default:
3711                         B43legacy_BUG_ON(1);
3712                 }
3713         }
3714         dev->phy.gmode = (have_gphy || have_bphy);
3715         tmp = dev->phy.gmode ? B43legacy_TMSLOW_GMODE : 0;
3716         b43legacy_wireless_core_reset(dev, tmp);
3717
3718         err = b43legacy_validate_chipaccess(dev);
3719         if (err)
3720                 goto err_powerdown;
3721         err = b43legacy_setup_modes(dev, have_bphy, have_gphy);
3722         if (err)
3723                 goto err_powerdown;
3724
3725         /* Now set some default "current_dev" */
3726         if (!wl->current_dev)
3727                 wl->current_dev = dev;
3728         INIT_WORK(&dev->restart_work, b43legacy_chip_reset);
3729
3730         b43legacy_radio_turn_off(dev, 1);
3731         b43legacy_switch_analog(dev, 0);
3732         ssb_device_disable(dev->dev, 0);
3733         ssb_bus_may_powerdown(bus);
3734
3735 out:
3736         return err;
3737
3738 err_powerdown:
3739         ssb_bus_may_powerdown(bus);
3740         return err;
3741 }
3742
3743 static void b43legacy_one_core_detach(struct ssb_device *dev)
3744 {
3745         struct b43legacy_wldev *wldev;
3746         struct b43legacy_wl *wl;
3747
3748         /* Do not cancel ieee80211-workqueue based work here.
3749          * See comment in b43legacy_remove(). */
3750
3751         wldev = ssb_get_drvdata(dev);
3752         wl = wldev->wl;
3753         b43legacy_debugfs_remove_device(wldev);
3754         b43legacy_wireless_core_detach(wldev);
3755         list_del(&wldev->list);
3756         wl->nr_devs--;
3757         ssb_set_drvdata(dev, NULL);
3758         kfree(wldev);
3759 }
3760
3761 static int b43legacy_one_core_attach(struct ssb_device *dev,
3762                                      struct b43legacy_wl *wl)
3763 {
3764         struct b43legacy_wldev *wldev;
3765         int err = -ENOMEM;
3766
3767         wldev = kzalloc(sizeof(*wldev), GFP_KERNEL);
3768         if (!wldev)
3769                 goto out;
3770
3771         wldev->dev = dev;
3772         wldev->wl = wl;
3773         b43legacy_set_status(wldev, B43legacy_STAT_UNINIT);
3774         wldev->bad_frames_preempt = modparam_bad_frames_preempt;
3775         tasklet_init(&wldev->isr_tasklet,
3776                      b43legacy_interrupt_tasklet,
3777                      (unsigned long)wldev);
3778         if (modparam_pio)
3779                 wldev->__using_pio = true;
3780         INIT_LIST_HEAD(&wldev->list);
3781
3782         err = b43legacy_wireless_core_attach(wldev);
3783         if (err)
3784                 goto err_kfree_wldev;
3785
3786         list_add(&wldev->list, &wl->devlist);
3787         wl->nr_devs++;
3788         ssb_set_drvdata(dev, wldev);
3789         b43legacy_debugfs_add_device(wldev);
3790 out:
3791         return err;
3792
3793 err_kfree_wldev:
3794         kfree(wldev);
3795         return err;
3796 }
3797
3798 static void b43legacy_sprom_fixup(struct ssb_bus *bus)
3799 {
3800         /* boardflags workarounds */
3801         if (bus->boardinfo.vendor == PCI_VENDOR_ID_APPLE &&
3802             bus->boardinfo.type == 0x4E &&
3803             bus->sprom.board_rev > 0x40)
3804                 bus->sprom.boardflags_lo |= B43legacy_BFL_PACTRL;
3805 }
3806
3807 static void b43legacy_wireless_exit(struct ssb_device *dev,
3808                                   struct b43legacy_wl *wl)
3809 {
3810         struct ieee80211_hw *hw = wl->hw;
3811
3812         ssb_set_devtypedata(dev, NULL);
3813         ieee80211_free_hw(hw);
3814 }
3815
3816 static int b43legacy_wireless_init(struct ssb_device *dev)
3817 {
3818         struct ssb_sprom *sprom = &dev->bus->sprom;
3819         struct ieee80211_hw *hw;
3820         struct b43legacy_wl *wl;
3821         int err = -ENOMEM;
3822         int queue_num;
3823
3824         b43legacy_sprom_fixup(dev->bus);
3825
3826         hw = ieee80211_alloc_hw(sizeof(*wl), &b43legacy_hw_ops);
3827         if (!hw) {
3828                 b43legacyerr(NULL, "Could not allocate ieee80211 device\n");
3829                 goto out;
3830         }
3831
3832         /* fill hw info */
3833         ieee80211_hw_set(hw, RX_INCLUDES_FCS);
3834         ieee80211_hw_set(hw, SIGNAL_DBM);
3835         ieee80211_hw_set(hw, MFP_CAPABLE); /* Allow WPA3 in software */
3836
3837         hw->wiphy->interface_modes =
3838                 BIT(NL80211_IFTYPE_AP) |
3839                 BIT(NL80211_IFTYPE_STATION) |
3840                 BIT(NL80211_IFTYPE_WDS) |
3841                 BIT(NL80211_IFTYPE_ADHOC);
3842         hw->queues = 1; /* FIXME: hardware has more queues */
3843         hw->max_rates = 2;
3844         SET_IEEE80211_DEV(hw, dev->dev);
3845         if (is_valid_ether_addr(sprom->et1mac))
3846                 SET_IEEE80211_PERM_ADDR(hw, sprom->et1mac);
3847         else
3848                 SET_IEEE80211_PERM_ADDR(hw, sprom->il0mac);
3849
3850         /* Get and initialize struct b43legacy_wl */
3851         wl = hw_to_b43legacy_wl(hw);
3852         memset(wl, 0, sizeof(*wl));
3853         wl->hw = hw;
3854         spin_lock_init(&wl->irq_lock);
3855         spin_lock_init(&wl->leds_lock);
3856         mutex_init(&wl->mutex);
3857         INIT_LIST_HEAD(&wl->devlist);
3858         INIT_WORK(&wl->beacon_update_trigger, b43legacy_beacon_update_trigger_work);
3859         INIT_WORK(&wl->tx_work, b43legacy_tx_work);
3860
3861         /* Initialize queues and flags. */
3862         for (queue_num = 0; queue_num < B43legacy_QOS_QUEUE_NUM; queue_num++) {
3863                 skb_queue_head_init(&wl->tx_queue[queue_num]);
3864                 wl->tx_queue_stopped[queue_num] = 0;
3865         }
3866
3867         ssb_set_devtypedata(dev, wl);
3868         b43legacyinfo(wl, "Broadcom %04X WLAN found (core revision %u)\n",
3869                       dev->bus->chip_id, dev->id.revision);
3870         err = 0;
3871 out:
3872         return err;
3873 }
3874
3875 static int b43legacy_probe(struct ssb_device *dev,
3876                          const struct ssb_device_id *id)
3877 {
3878         struct b43legacy_wl *wl;
3879         int err;
3880         int first = 0;
3881
3882         wl = ssb_get_devtypedata(dev);
3883         if (!wl) {
3884                 /* Probing the first core - setup common struct b43legacy_wl */
3885                 first = 1;
3886                 err = b43legacy_wireless_init(dev);
3887                 if (err)
3888                         goto out;
3889                 wl = ssb_get_devtypedata(dev);
3890                 B43legacy_WARN_ON(!wl);
3891         }
3892         err = b43legacy_one_core_attach(dev, wl);
3893         if (err)
3894                 goto err_wireless_exit;
3895
3896         /* setup and start work to load firmware */
3897         INIT_WORK(&wl->firmware_load, b43legacy_request_firmware);
3898         schedule_work(&wl->firmware_load);
3899
3900 out:
3901         return err;
3902
3903 err_wireless_exit:
3904         if (first)
3905                 b43legacy_wireless_exit(dev, wl);
3906         return err;
3907 }
3908
3909 static void b43legacy_remove(struct ssb_device *dev)
3910 {
3911         struct b43legacy_wl *wl = ssb_get_devtypedata(dev);
3912         struct b43legacy_wldev *wldev = ssb_get_drvdata(dev);
3913
3914         /* We must cancel any work here before unregistering from ieee80211,
3915          * as the ieee80211 unreg will destroy the workqueue. */
3916         cancel_work_sync(&wldev->restart_work);
3917         cancel_work_sync(&wl->firmware_load);
3918         complete(&wldev->fw_load_complete);
3919
3920         B43legacy_WARN_ON(!wl);
3921         if (!wldev->fw.ucode)
3922                 return;                 /* NULL if fw never loaded */
3923         if (wl->current_dev == wldev)
3924                 ieee80211_unregister_hw(wl->hw);
3925
3926         b43legacy_one_core_detach(dev);
3927
3928         if (list_empty(&wl->devlist))
3929                 /* Last core on the chip unregistered.
3930                  * We can destroy common struct b43legacy_wl.
3931                  */
3932                 b43legacy_wireless_exit(dev, wl);
3933 }
3934
3935 /* Perform a hardware reset. This can be called from any context. */
3936 void b43legacy_controller_restart(struct b43legacy_wldev *dev,
3937                                   const char *reason)
3938 {
3939         /* Must avoid requeueing, if we are in shutdown. */
3940         if (b43legacy_status(dev) < B43legacy_STAT_INITIALIZED)
3941                 return;
3942         b43legacyinfo(dev->wl, "Controller RESET (%s) ...\n", reason);
3943         ieee80211_queue_work(dev->wl->hw, &dev->restart_work);
3944 }
3945
3946 #ifdef CONFIG_PM
3947
3948 static int b43legacy_suspend(struct ssb_device *dev, pm_message_t state)
3949 {
3950         struct b43legacy_wldev *wldev = ssb_get_drvdata(dev);
3951         struct b43legacy_wl *wl = wldev->wl;
3952
3953         b43legacydbg(wl, "Suspending...\n");
3954
3955         mutex_lock(&wl->mutex);
3956         wldev->suspend_init_status = b43legacy_status(wldev);
3957         if (wldev->suspend_init_status >= B43legacy_STAT_STARTED)
3958                 b43legacy_wireless_core_stop(wldev);
3959         if (wldev->suspend_init_status >= B43legacy_STAT_INITIALIZED)
3960                 b43legacy_wireless_core_exit(wldev);
3961         mutex_unlock(&wl->mutex);
3962
3963         b43legacydbg(wl, "Device suspended.\n");
3964
3965         return 0;
3966 }
3967
3968 static int b43legacy_resume(struct ssb_device *dev)
3969 {
3970         struct b43legacy_wldev *wldev = ssb_get_drvdata(dev);
3971         struct b43legacy_wl *wl = wldev->wl;
3972         int err = 0;
3973
3974         b43legacydbg(wl, "Resuming...\n");
3975
3976         mutex_lock(&wl->mutex);
3977         if (wldev->suspend_init_status >= B43legacy_STAT_INITIALIZED) {
3978                 err = b43legacy_wireless_core_init(wldev);
3979                 if (err) {
3980                         b43legacyerr(wl, "Resume failed at core init\n");
3981                         goto out;
3982                 }
3983         }
3984         if (wldev->suspend_init_status >= B43legacy_STAT_STARTED) {
3985                 err = b43legacy_wireless_core_start(wldev);
3986                 if (err) {
3987                         b43legacy_wireless_core_exit(wldev);
3988                         b43legacyerr(wl, "Resume failed at core start\n");
3989                         goto out;
3990                 }
3991         }
3992
3993         b43legacydbg(wl, "Device resumed.\n");
3994 out:
3995         mutex_unlock(&wl->mutex);
3996         return err;
3997 }
3998
3999 #else   /* CONFIG_PM */
4000 # define b43legacy_suspend      NULL
4001 # define b43legacy_resume               NULL
4002 #endif  /* CONFIG_PM */
4003
4004 static struct ssb_driver b43legacy_ssb_driver = {
4005         .name           = KBUILD_MODNAME,
4006         .id_table       = b43legacy_ssb_tbl,
4007         .probe          = b43legacy_probe,
4008         .remove         = b43legacy_remove,
4009         .suspend        = b43legacy_suspend,
4010         .resume         = b43legacy_resume,
4011 };
4012
4013 static void b43legacy_print_driverinfo(void)
4014 {
4015         const char *feat_pci = "", *feat_leds = "",
4016                    *feat_pio = "", *feat_dma = "";
4017
4018 #ifdef CONFIG_B43LEGACY_PCI_AUTOSELECT
4019         feat_pci = "P";
4020 #endif
4021 #ifdef CONFIG_B43LEGACY_LEDS
4022         feat_leds = "L";
4023 #endif
4024 #ifdef CONFIG_B43LEGACY_PIO
4025         feat_pio = "I";
4026 #endif
4027 #ifdef CONFIG_B43LEGACY_DMA
4028         feat_dma = "D";
4029 #endif
4030         printk(KERN_INFO "Broadcom 43xx-legacy driver loaded "
4031                "[ Features: %s%s%s%s ]\n",
4032                feat_pci, feat_leds, feat_pio, feat_dma);
4033 }
4034
4035 static int __init b43legacy_init(void)
4036 {
4037         int err;
4038
4039         b43legacy_debugfs_init();
4040
4041         err = ssb_driver_register(&b43legacy_ssb_driver);
4042         if (err)
4043                 goto err_dfs_exit;
4044
4045         b43legacy_print_driverinfo();
4046
4047         return err;
4048
4049 err_dfs_exit:
4050         b43legacy_debugfs_exit();
4051         return err;
4052 }
4053
4054 static void __exit b43legacy_exit(void)
4055 {
4056         ssb_driver_unregister(&b43legacy_ssb_driver);
4057         b43legacy_debugfs_exit();
4058 }
4059
4060 module_init(b43legacy_init)
4061 module_exit(b43legacy_exit)