2 * Copyright (c) 2012-2015,2017 Qualcomm Atheros, Inc.
3 * Copyright (c) 2018, The Linux Foundation. All rights reserved.
5 * Permission to use, copy, modify, and/or distribute this software for any
6 * purpose with or without fee is hereby granted, provided that the above
7 * copyright notice and this permission notice appear in all copies.
9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
18 #include <linux/types.h>
19 #include <linux/errno.h>
26 struct desc_alloc_info {
31 static int wil_is_pmc_allocated(struct pmc_ctx *pmc)
33 return !!pmc->pring_va;
36 void wil_pmc_init(struct wil6210_priv *wil)
38 memset(&wil->pmc, 0, sizeof(struct pmc_ctx));
39 mutex_init(&wil->pmc.lock);
43 * Allocate the physical ring (p-ring) and the required
44 * number of descriptors of required size.
45 * Initialize the descriptors as required by pmc dma.
46 * The descriptors' buffers dwords are initialized to hold
47 * dword's serial number in the lsw and reserved value
48 * PCM_DATA_INVALID_DW_VAL in the msw.
50 void wil_pmc_alloc(struct wil6210_priv *wil,
55 struct pmc_ctx *pmc = &wil->pmc;
56 struct device *dev = wil_to_dev(wil);
57 struct wil6210_vif *vif = ndev_to_vif(wil->main_ndev);
58 struct wmi_pmc_cmd pmc_cmd = {0};
59 int last_cmd_err = -ENOMEM;
61 mutex_lock(&pmc->lock);
63 if (wil_is_pmc_allocated(pmc)) {
65 wil_err(wil, "ERROR pmc is already allocated\n");
68 if ((num_descriptors <= 0) || (descriptor_size <= 0)) {
70 "Invalid params num_descriptors(%d), descriptor_size(%d)\n",
71 num_descriptors, descriptor_size);
72 last_cmd_err = -EINVAL;
76 if (num_descriptors > (1 << WIL_RING_SIZE_ORDER_MAX)) {
78 "num_descriptors(%d) exceeds max ring size %d\n",
79 num_descriptors, 1 << WIL_RING_SIZE_ORDER_MAX);
80 last_cmd_err = -EINVAL;
84 if (num_descriptors > INT_MAX / descriptor_size) {
86 "Overflow in num_descriptors(%d)*descriptor_size(%d)\n",
87 num_descriptors, descriptor_size);
88 last_cmd_err = -EINVAL;
92 pmc->num_descriptors = num_descriptors;
93 pmc->descriptor_size = descriptor_size;
95 wil_dbg_misc(wil, "pmc_alloc: %d descriptors x %d bytes each\n",
96 num_descriptors, descriptor_size);
98 /* allocate descriptors info list in pmc context*/
99 pmc->descriptors = kcalloc(num_descriptors,
100 sizeof(struct desc_alloc_info),
102 if (!pmc->descriptors) {
103 wil_err(wil, "ERROR allocating pmc skb list\n");
107 wil_dbg_misc(wil, "pmc_alloc: allocated descriptors info list %p\n",
110 /* Allocate pring buffer and descriptors.
111 * vring->va should be aligned on its size rounded up to power of 2
112 * This is granted by the dma_alloc_coherent.
114 * HW has limitation that all vrings addresses must share the same
115 * upper 16 msb bits part of 48 bits address. To workaround that,
116 * if we are using more than 32 bit addresses switch to 32 bit
117 * allocation before allocating vring memory.
119 * There's no check for the return value of dma_set_mask_and_coherent,
120 * since we assume if we were able to set the mask during
121 * initialization in this system it will not fail if we set it again
123 if (wil->dma_addr_size > 32)
124 dma_set_mask_and_coherent(dev, DMA_BIT_MASK(32));
126 pmc->pring_va = dma_alloc_coherent(dev,
127 sizeof(struct vring_tx_desc) * num_descriptors,
131 if (wil->dma_addr_size > 32)
132 dma_set_mask_and_coherent(dev,
133 DMA_BIT_MASK(wil->dma_addr_size));
136 "pmc_alloc: allocated pring %p => %pad. %zd x %d = total %zd bytes\n",
137 pmc->pring_va, &pmc->pring_pa,
138 sizeof(struct vring_tx_desc),
140 sizeof(struct vring_tx_desc) * num_descriptors);
142 if (!pmc->pring_va) {
143 wil_err(wil, "ERROR allocating pmc pring\n");
144 goto release_pmc_skb_list;
147 /* initially, all descriptors are SW owned
148 * For Tx, Rx, and PMC, ownership bit is at the same location, thus
151 for (i = 0; i < num_descriptors; i++) {
152 struct vring_tx_desc *_d = &pmc->pring_va[i];
153 struct vring_tx_desc dd = {}, *d = ⅆ
156 pmc->descriptors[i].va = dma_alloc_coherent(dev,
158 &pmc->descriptors[i].pa,
161 if (unlikely(!pmc->descriptors[i].va)) {
162 wil_err(wil, "ERROR allocating pmc descriptor %d", i);
163 goto release_pmc_skbs;
166 for (j = 0; j < descriptor_size / sizeof(u32); j++) {
167 u32 *p = (u32 *)pmc->descriptors[i].va + j;
168 *p = PCM_DATA_INVALID_DW_VAL | j;
171 /* configure dma descriptor */
172 d->dma.addr.addr_low =
173 cpu_to_le32(lower_32_bits(pmc->descriptors[i].pa));
174 d->dma.addr.addr_high =
175 cpu_to_le16((u16)upper_32_bits(pmc->descriptors[i].pa));
176 d->dma.status = 0; /* 0 = HW_OWNED */
177 d->dma.length = cpu_to_le16(descriptor_size);
178 d->dma.d0 = BIT(9) | RX_DMA_D0_CMD_DMA_IT;
182 wil_dbg_misc(wil, "pmc_alloc: allocated successfully\n");
184 pmc_cmd.op = WMI_PMC_ALLOCATE;
185 pmc_cmd.ring_size = cpu_to_le16(pmc->num_descriptors);
186 pmc_cmd.mem_base = cpu_to_le64(pmc->pring_pa);
188 wil_dbg_misc(wil, "pmc_alloc: send WMI_PMC_CMD with ALLOCATE op\n");
189 pmc->last_cmd_status = wmi_send(wil,
194 if (pmc->last_cmd_status) {
196 "WMI_PMC_CMD with ALLOCATE op failed with status %d",
197 pmc->last_cmd_status);
198 goto release_pmc_skbs;
201 mutex_unlock(&pmc->lock);
206 wil_err(wil, "exit on error: Releasing skbs...\n");
207 for (i = 0; i < num_descriptors && pmc->descriptors[i].va; i++) {
208 dma_free_coherent(dev,
210 pmc->descriptors[i].va,
211 pmc->descriptors[i].pa);
213 pmc->descriptors[i].va = NULL;
215 wil_err(wil, "exit on error: Releasing pring...\n");
217 dma_free_coherent(dev,
218 sizeof(struct vring_tx_desc) * num_descriptors,
222 pmc->pring_va = NULL;
224 release_pmc_skb_list:
225 wil_err(wil, "exit on error: Releasing descriptors info list...\n");
226 kfree(pmc->descriptors);
227 pmc->descriptors = NULL;
230 pmc->last_cmd_status = last_cmd_err;
231 mutex_unlock(&pmc->lock);
235 * Traverse the p-ring and release all buffers.
236 * At the end release the p-ring memory
238 void wil_pmc_free(struct wil6210_priv *wil, int send_pmc_cmd)
240 struct pmc_ctx *pmc = &wil->pmc;
241 struct device *dev = wil_to_dev(wil);
242 struct wil6210_vif *vif = ndev_to_vif(wil->main_ndev);
243 struct wmi_pmc_cmd pmc_cmd = {0};
245 mutex_lock(&pmc->lock);
247 pmc->last_cmd_status = 0;
249 if (!wil_is_pmc_allocated(pmc)) {
251 "pmc_free: Error, can't free - not allocated\n");
252 pmc->last_cmd_status = -EPERM;
253 mutex_unlock(&pmc->lock);
258 wil_dbg_misc(wil, "send WMI_PMC_CMD with RELEASE op\n");
259 pmc_cmd.op = WMI_PMC_RELEASE;
260 pmc->last_cmd_status =
261 wmi_send(wil, WMI_PMC_CMDID, vif->mid,
262 &pmc_cmd, sizeof(pmc_cmd));
263 if (pmc->last_cmd_status) {
265 "WMI_PMC_CMD with RELEASE op failed, status %d",
266 pmc->last_cmd_status);
267 /* There's nothing we can do with this error.
268 * Normally, it should never occur.
269 * Continue to freeing all memory allocated for pmc.
275 size_t buf_size = sizeof(struct vring_tx_desc) *
276 pmc->num_descriptors;
278 wil_dbg_misc(wil, "pmc_free: free pring va %p\n",
280 dma_free_coherent(dev, buf_size, pmc->pring_va, pmc->pring_pa);
282 pmc->pring_va = NULL;
284 pmc->last_cmd_status = -ENOENT;
287 if (pmc->descriptors) {
291 i < pmc->num_descriptors && pmc->descriptors[i].va; i++) {
292 dma_free_coherent(dev,
293 pmc->descriptor_size,
294 pmc->descriptors[i].va,
295 pmc->descriptors[i].pa);
296 pmc->descriptors[i].va = NULL;
298 wil_dbg_misc(wil, "pmc_free: free descriptor info %d/%d\n", i,
299 pmc->num_descriptors);
301 "pmc_free: free pmc descriptors info list %p\n",
303 kfree(pmc->descriptors);
304 pmc->descriptors = NULL;
306 pmc->last_cmd_status = -ENOENT;
309 mutex_unlock(&pmc->lock);
313 * Status of the last operation requested via debugfs: alloc/free/read.
314 * 0 - success or negative errno
316 int wil_pmc_last_cmd_status(struct wil6210_priv *wil)
318 wil_dbg_misc(wil, "pmc_last_cmd_status: status %d\n",
319 wil->pmc.last_cmd_status);
321 return wil->pmc.last_cmd_status;
325 * Read from required position up to the end of current descriptor,
326 * depends on descriptor size configured during alloc request.
328 ssize_t wil_pmc_read(struct file *filp, char __user *buf, size_t count,
331 struct wil6210_priv *wil = filp->private_data;
332 struct pmc_ctx *pmc = &wil->pmc;
334 unsigned long long idx;
338 mutex_lock(&pmc->lock);
340 if (!wil_is_pmc_allocated(pmc)) {
341 wil_err(wil, "error, pmc is not allocated!\n");
342 pmc->last_cmd_status = -EPERM;
343 mutex_unlock(&pmc->lock);
347 pmc_size = pmc->descriptor_size * pmc->num_descriptors;
350 "pmc_read: size %u, pos %lld\n",
353 pmc->last_cmd_status = 0;
356 do_div(idx, pmc->descriptor_size);
357 offset = *f_pos - (idx * pmc->descriptor_size);
359 if (*f_pos >= pmc_size) {
361 "pmc_read: reached end of pmc buf: %lld >= %u\n",
362 *f_pos, (u32)pmc_size);
363 pmc->last_cmd_status = -ERANGE;
368 "pmc_read: read from pos %lld (descriptor %llu, offset %llu) %zu bytes\n",
369 *f_pos, idx, offset, count);
371 /* if no errors, return the copied byte count */
372 retval = simple_read_from_buffer(buf,
375 pmc->descriptors[idx].va,
376 pmc->descriptor_size);
379 mutex_unlock(&pmc->lock);
384 loff_t wil_pmc_llseek(struct file *filp, loff_t off, int whence)
387 struct wil6210_priv *wil = filp->private_data;
388 struct pmc_ctx *pmc = &wil->pmc;
391 mutex_lock(&pmc->lock);
393 if (!wil_is_pmc_allocated(pmc)) {
394 wil_err(wil, "error, pmc is not allocated!\n");
395 pmc->last_cmd_status = -EPERM;
396 mutex_unlock(&pmc->lock);
400 pmc_size = pmc->descriptor_size * pmc->num_descriptors;
403 case 0: /* SEEK_SET */
407 case 1: /* SEEK_CUR */
408 newpos = filp->f_pos + off;
411 case 2: /* SEEK_END */
415 default: /* can't happen */
424 if (newpos > pmc_size)
427 filp->f_pos = newpos;
430 mutex_unlock(&pmc->lock);