drivers/net/wireless/ath/ath9k/main.c

   1 /*
   2  * Copyright (c) 2008-2011 Atheros Communications Inc.
   3  *
   4  * Permission to use, copy, modify, and/or distribute this software for any
   5  * purpose with or without fee is hereby granted, provided that the above
   6  * copyright notice and this permission notice appear in all copies.
   7  *
   8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
   9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15  */
  16
  17 #include <linux/nl80211.h>
  18 #include <linux/delay.h>
  19 #include "ath9k.h"
  20 #include "btcoex.h"
  21
  22 u8 ath9k_parse_mpdudensity(u8 mpdudensity)
  23 {
  24         /*
  25          * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
  26          *   0 for no restriction
  27          *   1 for 1/4 us
  28          *   2 for 1/2 us
  29          *   3 for 1 us
  30          *   4 for 2 us
  31          *   5 for 4 us
  32          *   6 for 8 us
  33          *   7 for 16 us
  34          */
  35         switch (mpdudensity) {
  36         case 0:
  37                 return 0;
  38         case 1:
  39         case 2:
  40         case 3:
  41                 /* Our lower layer calculations limit our precision to
  42                    1 microsecond */
  43                 return 1;
  44         case 4:
  45                 return 2;
  46         case 5:
  47                 return 4;
  48         case 6:
  49                 return 8;
  50         case 7:
  51                 return 16;
  52         default:
  53                 return 0;
  54         }
  55 }
  56
  57 static bool ath9k_has_pending_frames(struct ath_softc *sc, struct ath_txq *txq,
  58                                      bool sw_pending)
  59 {
  60         bool pending = false;
  61
  62         spin_lock_bh(&txq->axq_lock);
  63
  64         if (txq->axq_depth) {
  65                 pending = true;
  66                 goto out;
  67         }
  68
  69         if (!sw_pending)
  70                 goto out;
  71
  72         if (txq->mac80211_qnum >= 0) {
  73                 struct ath_acq *acq;
  74
  75                 acq = &sc->cur_chan->acq[txq->mac80211_qnum];
  76                 if (!list_empty(&acq->acq_new) || !list_empty(&acq->acq_old))
  77                         pending = true;
  78         }
  79 out:
  80         spin_unlock_bh(&txq->axq_lock);
  81         return pending;
  82 }
  83
  84 static bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode)
  85 {
  86         unsigned long flags;
  87         bool ret;
  88
  89         spin_lock_irqsave(&sc->sc_pm_lock, flags);
  90         ret = ath9k_hw_setpower(sc->sc_ah, mode);
  91         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
  92
  93         return ret;
  94 }
  95
  96 void ath_ps_full_sleep(unsigned long data)
  97 {
  98         struct ath_softc *sc = (struct ath_softc *) data;
  99         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 100         bool reset;
 101
 102         spin_lock(&common->cc_lock);
 103         ath_hw_cycle_counters_update(common);
 104         spin_unlock(&common->cc_lock);
 105
 106         ath9k_hw_setrxabort(sc->sc_ah, 1);
 107         ath9k_hw_stopdmarecv(sc->sc_ah, &reset);
 108
 109         ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_FULL_SLEEP);
 110 }
 111
 112 void ath9k_ps_wakeup(struct ath_softc *sc)
 113 {
 114         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 115         unsigned long flags;
 116         enum ath9k_power_mode power_mode;
 117
 118         spin_lock_irqsave(&sc->sc_pm_lock, flags);
 119         if (++sc->ps_usecount != 1)
 120                 goto unlock;
 121
 122         del_timer_sync(&sc->sleep_timer);
 123         power_mode = sc->sc_ah->power_mode;
 124         ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
 125
 126         /*
 127          * While the hardware is asleep, the cycle counters contain no
 128          * useful data. Better clear them now so that they don't mess up
 129          * survey data results.
 130          */
 131         if (power_mode != ATH9K_PM_AWAKE) {
 132                 spin_lock(&common->cc_lock);
 133                 ath_hw_cycle_counters_update(common);
 134                 memset(&common->cc_survey, 0, sizeof(common->cc_survey));
 135                 memset(&common->cc_ani, 0, sizeof(common->cc_ani));
 136                 spin_unlock(&common->cc_lock);
 137         }
 138
 139  unlock:
 140         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 141 }
 142
 143 void ath9k_ps_restore(struct ath_softc *sc)
 144 {
 145         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 146         enum ath9k_power_mode mode;
 147         unsigned long flags;
 148
 149         spin_lock_irqsave(&sc->sc_pm_lock, flags);
 150         if (--sc->ps_usecount != 0)
 151                 goto unlock;
 152
 153         if (sc->ps_idle) {
 154                 mod_timer(&sc->sleep_timer, jiffies + HZ / 10);
 155                 goto unlock;
 156         }
 157
 158         if (sc->ps_enabled &&
 159                    !(sc->ps_flags & (PS_WAIT_FOR_BEACON |
 160                                      PS_WAIT_FOR_CAB |
 161                                      PS_WAIT_FOR_PSPOLL_DATA |
 162                                      PS_WAIT_FOR_TX_ACK |
 163                                      PS_WAIT_FOR_ANI))) {
 164                 mode = ATH9K_PM_NETWORK_SLEEP;
 165                 if (ath9k_hw_btcoex_is_enabled(sc->sc_ah))
 166                         ath9k_btcoex_stop_gen_timer(sc);
 167         } else {
 168                 goto unlock;
 169         }
 170
 171         spin_lock(&common->cc_lock);
 172         ath_hw_cycle_counters_update(common);
 173         spin_unlock(&common->cc_lock);
 174
 175         ath9k_hw_setpower(sc->sc_ah, mode);
 176
 177  unlock:
 178         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 179 }
 180
 181 static void __ath_cancel_work(struct ath_softc *sc)
 182 {
 183         cancel_work_sync(&sc->paprd_work);
 184         cancel_delayed_work_sync(&sc->hw_check_work);
 185         cancel_delayed_work_sync(&sc->hw_pll_work);
 186
 187 #ifdef CONFIG_ATH9K_BTCOEX_SUPPORT
 188         if (ath9k_hw_mci_is_enabled(sc->sc_ah))
 189                 cancel_work_sync(&sc->mci_work);
 190 #endif
 191 }
 192
 193 void ath_cancel_work(struct ath_softc *sc)
 194 {
 195         __ath_cancel_work(sc);
 196         cancel_work_sync(&sc->hw_reset_work);
 197 }
 198
 199 void ath_restart_work(struct ath_softc *sc)
 200 {
 201         ieee80211_queue_delayed_work(sc->hw, &sc->hw_check_work,
 202                                      msecs_to_jiffies(ATH_HW_CHECK_POLL_INT));
 203
 204         if (AR_SREV_9340(sc->sc_ah) || AR_SREV_9330(sc->sc_ah))
 205                 ieee80211_queue_delayed_work(sc->hw, &sc->hw_pll_work,
 206                                      msecs_to_jiffies(ATH_PLL_WORK_INTERVAL));
 207
 208         ath_start_ani(sc);
 209 }
 210
 211 static bool ath_prepare_reset(struct ath_softc *sc)
 212 {
 213         struct ath_hw *ah = sc->sc_ah;
 214         bool ret = true;
 215
 216         ieee80211_stop_queues(sc->hw);
 217         ath_stop_ani(sc);
 218         ath9k_hw_disable_interrupts(ah);
 219
 220         if (AR_SREV_9300_20_OR_LATER(ah)) {
 221                 ret &= ath_stoprecv(sc);
 222                 ret &= ath_drain_all_txq(sc);
 223         } else {
 224                 ret &= ath_drain_all_txq(sc);
 225                 ret &= ath_stoprecv(sc);
 226         }
 227
 228         return ret;
 229 }
 230
 231 static bool ath_complete_reset(struct ath_softc *sc, bool start)
 232 {
 233         struct ath_hw *ah = sc->sc_ah;
 234         struct ath_common *common = ath9k_hw_common(ah);
 235         unsigned long flags;
 236
 237         ath9k_calculate_summary_state(sc, sc->cur_chan);
 238         ath_startrecv(sc);
 239         ath9k_cmn_update_txpow(ah, sc->cur_chan->cur_txpower,
 240                                sc->cur_chan->txpower,
 241                                &sc->cur_chan->cur_txpower);
 242         clear_bit(ATH_OP_HW_RESET, &common->op_flags);
 243
 244         if (!sc->cur_chan->offchannel && start) {
 245                 /* restore per chanctx TSF timer */
 246                 if (sc->cur_chan->tsf_val) {
 247                         u32 offset;
 248
 249                         offset = ath9k_hw_get_tsf_offset(&sc->cur_chan->tsf_ts,
 250                                                          NULL);
 251                         ath9k_hw_settsf64(ah, sc->cur_chan->tsf_val + offset);
 252                 }
 253
 254
 255                 if (!test_bit(ATH_OP_BEACONS, &common->op_flags))
 256                         goto work;
 257
 258                 if (ah->opmode == NL80211_IFTYPE_STATION &&
 259                     test_bit(ATH_OP_PRIM_STA_VIF, &common->op_flags)) {
 260                         spin_lock_irqsave(&sc->sc_pm_lock, flags);
 261                         sc->ps_flags |= PS_BEACON_SYNC | PS_WAIT_FOR_BEACON;
 262                         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 263                 } else {
 264                         ath9k_set_beacon(sc);
 265                 }
 266         work:
 267                 ath_restart_work(sc);
 268                 ath_txq_schedule_all(sc);
 269         }
 270
 271         sc->gtt_cnt = 0;
 272
 273         ath9k_hw_set_interrupts(ah);
 274         ath9k_hw_enable_interrupts(ah);
 275         ieee80211_wake_queues(sc->hw);
 276         ath9k_p2p_ps_timer(sc);
 277
 278         return true;
 279 }
 280
 281 static int ath_reset_internal(struct ath_softc *sc, struct ath9k_channel *hchan)
 282 {
 283         struct ath_hw *ah = sc->sc_ah;
 284         struct ath_common *common = ath9k_hw_common(ah);
 285         struct ath9k_hw_cal_data *caldata = NULL;
 286         bool fastcc = true;
 287         int r;
 288
 289         __ath_cancel_work(sc);
 290
 291         disable_irq(sc->irq);
 292         tasklet_disable(&sc->intr_tq);
 293         tasklet_disable(&sc->bcon_tasklet);
 294         spin_lock_bh(&sc->sc_pcu_lock);
 295
 296         if (!sc->cur_chan->offchannel) {
 297                 fastcc = false;
 298                 caldata = &sc->cur_chan->caldata;
 299         }
 300
 301         if (!hchan) {
 302                 fastcc = false;
 303                 hchan = ah->curchan;
 304         }
 305
 306         if (!hchan) {
 307                 fastcc = false;
 308                 hchan = ath9k_cmn_get_channel(sc->hw, ah, &sc->cur_chan->chandef);
 309         }
 310
 311         if (!ath_prepare_reset(sc))
 312                 fastcc = false;
 313
 314         if (ath9k_is_chanctx_enabled())
 315                 fastcc = false;
 316
 317         spin_lock_bh(&sc->chan_lock);
 318         sc->cur_chandef = sc->cur_chan->chandef;
 319         spin_unlock_bh(&sc->chan_lock);
 320
 321         ath_dbg(common, CONFIG, "Reset to %u MHz, HT40: %d fastcc: %d\n",
 322                 hchan->channel, IS_CHAN_HT40(hchan), fastcc);
 323
 324         r = ath9k_hw_reset(ah, hchan, caldata, fastcc);
 325         if (r) {
 326                 ath_err(common,
 327                         "Unable to reset channel, reset status %d\n", r);
 328
 329                 ath9k_hw_enable_interrupts(ah);
 330                 ath9k_queue_reset(sc, RESET_TYPE_BB_HANG);
 331
 332                 goto out;
 333         }
 334
 335         if (ath9k_hw_mci_is_enabled(sc->sc_ah) &&
 336             sc->cur_chan->offchannel)
 337                 ath9k_mci_set_txpower(sc, true, false);
 338
 339         if (!ath_complete_reset(sc, true))
 340                 r = -EIO;
 341
 342 out:
 343         enable_irq(sc->irq);
 344         spin_unlock_bh(&sc->sc_pcu_lock);
 345         tasklet_enable(&sc->bcon_tasklet);
 346         tasklet_enable(&sc->intr_tq);
 347
 348         return r;
 349 }
 350
 351 static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta,
 352                             struct ieee80211_vif *vif)
 353 {
 354         struct ath_node *an;
 355         an = (struct ath_node *)sta->drv_priv;
 356
 357         an->sc = sc;
 358         an->sta = sta;
 359         an->vif = vif;
 360         memset(&an->key_idx, 0, sizeof(an->key_idx));
 361
 362         ath_tx_node_init(sc, an);
 363
 364         ath_dynack_node_init(sc->sc_ah, an);
 365 }
 366
 367 static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta)
 368 {
 369         struct ath_node *an = (struct ath_node *)sta->drv_priv;
 370         ath_tx_node_cleanup(sc, an);
 371
 372         ath_dynack_node_deinit(sc->sc_ah, an);
 373 }
 374
 375 void ath9k_tasklet(unsigned long data)
 376 {
 377         struct ath_softc *sc = (struct ath_softc *)data;
 378         struct ath_hw *ah = sc->sc_ah;
 379         struct ath_common *common = ath9k_hw_common(ah);
 380         enum ath_reset_type type;
 381         unsigned long flags;
 382         u32 status;
 383         u32 rxmask;
 384
 385         spin_lock_irqsave(&sc->intr_lock, flags);
 386         status = sc->intrstatus;
 387         sc->intrstatus = 0;
 388         spin_unlock_irqrestore(&sc->intr_lock, flags);
 389
 390         ath9k_ps_wakeup(sc);
 391         spin_lock(&sc->sc_pcu_lock);
 392
 393         if (status & ATH9K_INT_FATAL) {
 394                 type = RESET_TYPE_FATAL_INT;
 395                 ath9k_queue_reset(sc, type);
 396                 ath_dbg(common, RESET, "FATAL: Skipping interrupts\n");
 397                 goto out;
 398         }
 399
 400         if ((ah->config.hw_hang_checks & HW_BB_WATCHDOG) &&
 401             (status & ATH9K_INT_BB_WATCHDOG)) {
 402                 spin_lock(&common->cc_lock);
 403                 ath_hw_cycle_counters_update(common);
 404                 ar9003_hw_bb_watchdog_dbg_info(ah);
 405                 spin_unlock(&common->cc_lock);
 406
 407                 if (ar9003_hw_bb_watchdog_check(ah)) {
 408                         type = RESET_TYPE_BB_WATCHDOG;
 409                         ath9k_queue_reset(sc, type);
 410
 411                         ath_dbg(common, RESET,
 412                                 "BB_WATCHDOG: Skipping interrupts\n");
 413                         goto out;
 414                 }
 415         }
 416
 417         if (status & ATH9K_INT_GTT) {
 418                 sc->gtt_cnt++;
 419
 420                 if ((sc->gtt_cnt >= MAX_GTT_CNT) && !ath9k_hw_check_alive(ah)) {
 421                         type = RESET_TYPE_TX_GTT;
 422                         ath9k_queue_reset(sc, type);
 423                         ath_dbg(common, RESET,
 424                                 "GTT: Skipping interrupts\n");
 425                         goto out;
 426                 }
 427         }
 428
 429         spin_lock_irqsave(&sc->sc_pm_lock, flags);
 430         if ((status & ATH9K_INT_TSFOOR) && sc->ps_enabled) {
 431                 /*
 432                  * TSF sync does not look correct; remain awake to sync with
 433                  * the next Beacon.
 434                  */
 435                 ath_dbg(common, PS, "TSFOOR - Sync with next Beacon\n");
 436                 sc->ps_flags |= PS_WAIT_FOR_BEACON | PS_BEACON_SYNC;
 437         }
 438         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 439
 440         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
 441                 rxmask = (ATH9K_INT_RXHP | ATH9K_INT_RXLP | ATH9K_INT_RXEOL |
 442                           ATH9K_INT_RXORN);
 443         else
 444                 rxmask = (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
 445
 446         if (status & rxmask) {
 447                 /* Check for high priority Rx first */
 448                 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
 449                     (status & ATH9K_INT_RXHP))
 450                         ath_rx_tasklet(sc, 0, true);
 451
 452                 ath_rx_tasklet(sc, 0, false);
 453         }
 454
 455         if (status & ATH9K_INT_TX) {
 456                 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
 457                         /*
 458                          * For EDMA chips, TX completion is enabled for the
 459                          * beacon queue, so if a beacon has been transmitted
 460                          * successfully after a GTT interrupt, the GTT counter
 461                          * gets reset to zero here.
 462                          */
 463                         sc->gtt_cnt = 0;
 464
 465                         ath_tx_edma_tasklet(sc);
 466                 } else {
 467                         ath_tx_tasklet(sc);
 468                 }
 469
 470                 wake_up(&sc->tx_wait);
 471         }
 472
 473         if (status & ATH9K_INT_GENTIMER)
 474                 ath_gen_timer_isr(sc->sc_ah);
 475
 476         ath9k_btcoex_handle_interrupt(sc, status);
 477
 478         /* re-enable hardware interrupt */
 479         ath9k_hw_resume_interrupts(ah);
 480 out:
 481         spin_unlock(&sc->sc_pcu_lock);
 482         ath9k_ps_restore(sc);
 483 }
 484
 485 irqreturn_t ath_isr(int irq, void *dev)
 486 {
 487 #define SCHED_INTR (                            \
 488                 ATH9K_INT_FATAL |               \
 489                 ATH9K_INT_BB_WATCHDOG |         \
 490                 ATH9K_INT_RXORN |               \
 491                 ATH9K_INT_RXEOL |               \
 492                 ATH9K_INT_RX |                  \
 493                 ATH9K_INT_RXLP |                \
 494                 ATH9K_INT_RXHP |                \
 495                 ATH9K_INT_TX |                  \
 496                 ATH9K_INT_BMISS |               \
 497                 ATH9K_INT_CST |                 \
 498                 ATH9K_INT_GTT |                 \
 499                 ATH9K_INT_TSFOOR |              \
 500                 ATH9K_INT_GENTIMER |            \
 501                 ATH9K_INT_MCI)
 502
 503         struct ath_softc *sc = dev;
 504         struct ath_hw *ah = sc->sc_ah;
 505         struct ath_common *common = ath9k_hw_common(ah);
 506         enum ath9k_int status;
 507         u32 sync_cause = 0;
 508         bool sched = false;
 509
 510         /*
 511          * The hardware is not ready/present, don't
 512          * touch anything. Note this can happen early
 513          * on if the IRQ is shared.
 514          */
 515         if (!ah || test_bit(ATH_OP_INVALID, &common->op_flags))
 516                 return IRQ_NONE;
 517
 518         /* shared irq, not for us */
 519         if (!ath9k_hw_intrpend(ah))
 520                 return IRQ_NONE;
 521
 522         /*
 523          * Figure out the reason(s) for the interrupt.  Note
 524          * that the hal returns a pseudo-ISR that may include
 525          * bits we haven't explicitly enabled so we mask the
 526          * value to insure we only process bits we requested.
 527          */
 528         ath9k_hw_getisr(ah, &status, &sync_cause); /* NB: clears ISR too */
 529         ath9k_debug_sync_cause(sc, sync_cause);
 530         status &= ah->imask;    /* discard unasked-for bits */
 531
 532         if (test_bit(ATH_OP_HW_RESET, &common->op_flags)) {
 533                 ath9k_hw_kill_interrupts(sc->sc_ah);
 534                 return IRQ_HANDLED;
 535         }
 536
 537         /*
 538          * If there are no status bits set, then this interrupt was not
 539          * for me (should have been caught above).
 540          */
 541         if (!status)
 542                 return IRQ_NONE;
 543
 544         /* Cache the status */
 545         spin_lock(&sc->intr_lock);
 546         sc->intrstatus |= status;
 547         spin_unlock(&sc->intr_lock);
 548
 549         if (status & SCHED_INTR)
 550                 sched = true;
 551
 552         /*
 553          * If a FATAL interrupt is received, we have to reset the chip
 554          * immediately.
 555          */
 556         if (status & ATH9K_INT_FATAL)
 557                 goto chip_reset;
 558
 559         if ((ah->config.hw_hang_checks & HW_BB_WATCHDOG) &&
 560             (status & ATH9K_INT_BB_WATCHDOG))
 561                 goto chip_reset;
 562
 563         if (status & ATH9K_INT_SWBA)
 564                 tasklet_schedule(&sc->bcon_tasklet);
 565
 566         if (status & ATH9K_INT_TXURN)
 567                 ath9k_hw_updatetxtriglevel(ah, true);
 568
 569         if (status & ATH9K_INT_RXEOL) {
 570                 ah->imask &= ~(ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
 571                 ath9k_hw_set_interrupts(ah);
 572         }
 573
 574         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
 575                 if (status & ATH9K_INT_TIM_TIMER) {
 576                         if (ATH_DBG_WARN_ON_ONCE(sc->ps_idle))
 577                                 goto chip_reset;
 578                         /* Clear RxAbort bit so that we can
 579                          * receive frames */
 580                         ath9k_setpower(sc, ATH9K_PM_AWAKE);
 581                         spin_lock(&sc->sc_pm_lock);
 582                         ath9k_hw_setrxabort(sc->sc_ah, 0);
 583                         sc->ps_flags |= PS_WAIT_FOR_BEACON;
 584                         spin_unlock(&sc->sc_pm_lock);
 585                 }
 586
 587 chip_reset:
 588
 589         ath_debug_stat_interrupt(sc, status);
 590
 591         if (sched) {
 592                 /* turn off every interrupt */
 593                 ath9k_hw_kill_interrupts(ah);
 594                 tasklet_schedule(&sc->intr_tq);
 595         }
 596
 597         return IRQ_HANDLED;
 598
 599 #undef SCHED_INTR
 600 }
 601
 602 /*
 603  * This function is called when a HW reset cannot be deferred
 604  * and has to be immediate.
 605  */
 606 int ath_reset(struct ath_softc *sc, struct ath9k_channel *hchan)
 607 {
 608         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 609         int r;
 610
 611         ath9k_hw_kill_interrupts(sc->sc_ah);
 612         set_bit(ATH_OP_HW_RESET, &common->op_flags);
 613
 614         ath9k_ps_wakeup(sc);
 615         r = ath_reset_internal(sc, hchan);
 616         ath9k_ps_restore(sc);
 617
 618         return r;
 619 }
 620
 621 /*
 622  * When a HW reset can be deferred, it is added to the
 623  * hw_reset_work workqueue, but we set ATH_OP_HW_RESET before
 624  * queueing.
 625  */
 626 void ath9k_queue_reset(struct ath_softc *sc, enum ath_reset_type type)
 627 {
 628         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 629 #ifdef CONFIG_ATH9K_DEBUGFS
 630         RESET_STAT_INC(sc, type);
 631 #endif
 632         ath9k_hw_kill_interrupts(sc->sc_ah);
 633         set_bit(ATH_OP_HW_RESET, &common->op_flags);
 634         ieee80211_queue_work(sc->hw, &sc->hw_reset_work);
 635 }
 636
 637 void ath_reset_work(struct work_struct *work)
 638 {
 639         struct ath_softc *sc = container_of(work, struct ath_softc, hw_reset_work);
 640
 641         ath9k_ps_wakeup(sc);
 642         ath_reset_internal(sc, NULL);
 643         ath9k_ps_restore(sc);
 644 }
 645
 646 /**********************/
 647 /* mac80211 callbacks */
 648 /**********************/
 649
 650 static int ath9k_start(struct ieee80211_hw *hw)
 651 {
 652         struct ath_softc *sc = hw->priv;
 653         struct ath_hw *ah = sc->sc_ah;
 654         struct ath_common *common = ath9k_hw_common(ah);
 655         struct ieee80211_channel *curchan = sc->cur_chan->chandef.chan;
 656         struct ath_chanctx *ctx = sc->cur_chan;
 657         struct ath9k_channel *init_channel;
 658         int r;
 659
 660         ath_dbg(common, CONFIG,
 661                 "Starting driver with initial channel: %d MHz\n",
 662                 curchan->center_freq);
 663
 664         ath9k_ps_wakeup(sc);
 665         mutex_lock(&sc->mutex);
 666
 667         init_channel = ath9k_cmn_get_channel(hw, ah, &ctx->chandef);
 668         sc->cur_chandef = hw->conf.chandef;
 669
 670         /* Reset SERDES registers */
 671         ath9k_hw_configpcipowersave(ah, false);
 672
 673         /*
 674          * The basic interface to setting the hardware in a good
 675          * state is ``reset''.  On return the hardware is known to
 676          * be powered up and with interrupts disabled.  This must
 677          * be followed by initialization of the appropriate bits
 678          * and then setup of the interrupt mask.
 679          */
 680         spin_lock_bh(&sc->sc_pcu_lock);
 681
 682         atomic_set(&ah->intr_ref_cnt, -1);
 683
 684         r = ath9k_hw_reset(ah, init_channel, ah->caldata, false);
 685         if (r) {
 686                 ath_err(common,
 687                         "Unable to reset hardware; reset status %d (freq %u MHz)\n",
 688                         r, curchan->center_freq);
 689                 ah->reset_power_on = false;
 690         }
 691
 692         /* Setup our intr mask. */
 693         ah->imask = ATH9K_INT_TX | ATH9K_INT_RXEOL |
 694                     ATH9K_INT_RXORN | ATH9K_INT_FATAL |
 695                     ATH9K_INT_GLOBAL;
 696
 697         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
 698                 ah->imask |= ATH9K_INT_RXHP |
 699                              ATH9K_INT_RXLP;
 700         else
 701                 ah->imask |= ATH9K_INT_RX;
 702
 703         if (ah->config.hw_hang_checks & HW_BB_WATCHDOG)
 704                 ah->imask |= ATH9K_INT_BB_WATCHDOG;
 705
 706         /*
 707          * Enable GTT interrupts only for AR9003/AR9004 chips
 708          * for now.
 709          */
 710         if (AR_SREV_9300_20_OR_LATER(ah))
 711                 ah->imask |= ATH9K_INT_GTT;
 712
 713         if (ah->caps.hw_caps & ATH9K_HW_CAP_HT)
 714                 ah->imask |= ATH9K_INT_CST;
 715
 716         ath_mci_enable(sc);
 717
 718         clear_bit(ATH_OP_INVALID, &common->op_flags);
 719         sc->sc_ah->is_monitoring = false;
 720
 721         if (!ath_complete_reset(sc, false))
 722                 ah->reset_power_on = false;
 723
 724         if (ah->led_pin >= 0) {
 725                 ath9k_hw_set_gpio(ah, ah->led_pin,
 726                                   (ah->config.led_active_high) ? 1 : 0);
 727                 ath9k_hw_gpio_request_out(ah, ah->led_pin, NULL,
 728                                           AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
 729         }
 730
 731         /*
 732          * Reset key cache to sane defaults (all entries cleared) instead of
 733          * semi-random values after suspend/resume.
 734          */
 735         ath9k_cmn_init_crypto(sc->sc_ah);
 736
 737         ath9k_hw_reset_tsf(ah);
 738
 739         spin_unlock_bh(&sc->sc_pcu_lock);
 740
 741         ath9k_rng_start(sc);
 742
 743         mutex_unlock(&sc->mutex);
 744
 745         ath9k_ps_restore(sc);
 746
 747         return 0;
 748 }
 749
 750 static void ath9k_tx(struct ieee80211_hw *hw,
 751                      struct ieee80211_tx_control *control,
 752                      struct sk_buff *skb)
 753 {
 754         struct ath_softc *sc = hw->priv;
 755         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 756         struct ath_tx_control txctl;
 757         struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
 758         unsigned long flags;
 759
 760         if (sc->ps_enabled) {
 761                 /*
 762                  * mac80211 does not set PM field for normal data frames, so we
 763                  * need to update that based on the current PS mode.
 764                  */
 765                 if (ieee80211_is_data(hdr->frame_control) &&
 766                     !ieee80211_is_nullfunc(hdr->frame_control) &&
 767                     !ieee80211_has_pm(hdr->frame_control)) {
 768                         ath_dbg(common, PS,
 769                                 "Add PM=1 for a TX frame while in PS mode\n");
 770                         hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
 771                 }
 772         }
 773
 774         if (unlikely(sc->sc_ah->power_mode == ATH9K_PM_NETWORK_SLEEP)) {
 775                 /*
 776                  * We are using PS-Poll and mac80211 can request TX while in
 777                  * power save mode. Need to wake up hardware for the TX to be
 778                  * completed and if needed, also for RX of buffered frames.
 779                  */
 780                 ath9k_ps_wakeup(sc);
 781                 spin_lock_irqsave(&sc->sc_pm_lock, flags);
 782                 if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
 783                         ath9k_hw_setrxabort(sc->sc_ah, 0);
 784                 if (ieee80211_is_pspoll(hdr->frame_control)) {
 785                         ath_dbg(common, PS,
 786                                 "Sending PS-Poll to pick a buffered frame\n");
 787                         sc->ps_flags |= PS_WAIT_FOR_PSPOLL_DATA;
 788                 } else {
 789                         ath_dbg(common, PS, "Wake up to complete TX\n");
 790                         sc->ps_flags |= PS_WAIT_FOR_TX_ACK;
 791                 }
 792                 /*
 793                  * The actual restore operation will happen only after
 794                  * the ps_flags bit is cleared. We are just dropping
 795                  * the ps_usecount here.
 796                  */
 797                 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 798                 ath9k_ps_restore(sc);
 799         }
 800
 801         /*
 802          * Cannot tx while the hardware is in full sleep, it first needs a full
 803          * chip reset to recover from that
 804          */
 805         if (unlikely(sc->sc_ah->power_mode == ATH9K_PM_FULL_SLEEP)) {
 806                 ath_err(common, "TX while HW is in FULL_SLEEP mode\n");
 807                 goto exit;
 808         }
 809
 810         memset(&txctl, 0, sizeof(struct ath_tx_control));
 811         txctl.txq = sc->tx.txq_map[skb_get_queue_mapping(skb)];
 812         txctl.sta = control->sta;
 813
 814         ath_dbg(common, XMIT, "transmitting packet, skb: %p\n", skb);
 815
 816         if (ath_tx_start(hw, skb, &txctl) != 0) {
 817                 ath_dbg(common, XMIT, "TX failed\n");
 818                 TX_STAT_INC(txctl.txq->axq_qnum, txfailed);
 819                 goto exit;
 820         }
 821
 822         return;
 823 exit:
 824         ieee80211_free_txskb(hw, skb);
 825 }
 826
 827 static bool ath9k_txq_list_has_key(struct list_head *txq_list, u32 keyix)
 828 {
 829         struct ath_buf *bf;
 830         struct ieee80211_tx_info *txinfo;
 831         struct ath_frame_info *fi;
 832
 833         list_for_each_entry(bf, txq_list, list) {
 834                 if (bf->bf_state.stale || !bf->bf_mpdu)
 835                         continue;
 836
 837                 txinfo = IEEE80211_SKB_CB(bf->bf_mpdu);
 838                 fi = (struct ath_frame_info *)&txinfo->rate_driver_data[0];
 839                 if (fi->keyix == keyix)
 840                         return true;
 841         }
 842
 843         return false;
 844 }
 845
 846 static bool ath9k_txq_has_key(struct ath_softc *sc, u32 keyix)
 847 {
 848         struct ath_hw *ah = sc->sc_ah;
 849         int i, j;
 850         struct ath_txq *txq;
 851         bool key_in_use = false;
 852
 853         for (i = 0; !key_in_use && i < ATH9K_NUM_TX_QUEUES; i++) {
 854                 if (!ATH_TXQ_SETUP(sc, i))
 855                         continue;
 856                 txq = &sc->tx.txq[i];
 857                 if (!txq->axq_depth)
 858                         continue;
 859                 if (!ath9k_hw_numtxpending(ah, txq->axq_qnum))
 860                         continue;
 861
 862                 ath_txq_lock(sc, txq);
 863                 key_in_use = ath9k_txq_list_has_key(&txq->axq_q, keyix);
 864                 if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
 865                         int idx = txq->txq_tailidx;
 866
 867                         for (j = 0; !key_in_use &&
 868                              !list_empty(&txq->txq_fifo[idx]) &&
 869                              j < ATH_TXFIFO_DEPTH; j++) {
 870                                 key_in_use = ath9k_txq_list_has_key(
 871                                         &txq->txq_fifo[idx], keyix);
 872                                 INCR(idx, ATH_TXFIFO_DEPTH);
 873                         }
 874                 }
 875                 ath_txq_unlock(sc, txq);
 876         }
 877
 878         return key_in_use;
 879 }
 880
 881 static void ath9k_pending_key_del(struct ath_softc *sc, u8 keyix)
 882 {
 883         struct ath_hw *ah = sc->sc_ah;
 884         struct ath_common *common = ath9k_hw_common(ah);
 885
 886         if (!test_bit(keyix, ah->pending_del_keymap) ||
 887             ath9k_txq_has_key(sc, keyix))
 888                 return;
 889
 890         /* No more TXQ frames point to this key cache entry, so delete it. */
 891         clear_bit(keyix, ah->pending_del_keymap);
 892         ath_key_delete(common, keyix);
 893 }
 894
 895 static void ath9k_stop(struct ieee80211_hw *hw)
 896 {
 897         struct ath_softc *sc = hw->priv;
 898         struct ath_hw *ah = sc->sc_ah;
 899         struct ath_common *common = ath9k_hw_common(ah);
 900         bool prev_idle;
 901         int i;
 902
 903         ath9k_deinit_channel_context(sc);
 904
 905         mutex_lock(&sc->mutex);
 906
 907         ath9k_rng_stop(sc);
 908
 909         ath_cancel_work(sc);
 910
 911         if (test_bit(ATH_OP_INVALID, &common->op_flags)) {
 912                 ath_dbg(common, ANY, "Device not present\n");
 913                 mutex_unlock(&sc->mutex);
 914                 return;
 915         }
 916
 917         /* Ensure HW is awake when we try to shut it down. */
 918         ath9k_ps_wakeup(sc);
 919
 920         spin_lock_bh(&sc->sc_pcu_lock);
 921
 922         /* prevent tasklets to enable interrupts once we disable them */
 923         ah->imask &= ~ATH9K_INT_GLOBAL;
 924
 925         /* make sure h/w will not generate any interrupt
 926          * before setting the invalid flag. */
 927         ath9k_hw_disable_interrupts(ah);
 928
 929         spin_unlock_bh(&sc->sc_pcu_lock);
 930
 931         /* we can now sync irq and kill any running tasklets, since we already
 932          * disabled interrupts and not holding a spin lock */
 933         synchronize_irq(sc->irq);
 934         tasklet_kill(&sc->intr_tq);
 935         tasklet_kill(&sc->bcon_tasklet);
 936
 937         prev_idle = sc->ps_idle;
 938         sc->ps_idle = true;
 939
 940         spin_lock_bh(&sc->sc_pcu_lock);
 941
 942         if (ah->led_pin >= 0) {
 943                 ath9k_hw_set_gpio(ah, ah->led_pin,
 944                                   (ah->config.led_active_high) ? 0 : 1);
 945                 ath9k_hw_gpio_request_in(ah, ah->led_pin, NULL);
 946         }
 947
 948         ath_prepare_reset(sc);
 949
 950         if (sc->rx.frag) {
 951                 dev_kfree_skb_any(sc->rx.frag);
 952                 sc->rx.frag = NULL;
 953         }
 954
 955         if (!ah->curchan)
 956                 ah->curchan = ath9k_cmn_get_channel(hw, ah,
 957                                                     &sc->cur_chan->chandef);
 958
 959         ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
 960
 961         set_bit(ATH_OP_INVALID, &common->op_flags);
 962
 963         ath9k_hw_phy_disable(ah);
 964
 965         ath9k_hw_configpcipowersave(ah, true);
 966
 967         spin_unlock_bh(&sc->sc_pcu_lock);
 968
 969         for (i = 0; i < ATH_KEYMAX; i++)
 970                 ath9k_pending_key_del(sc, i);
 971
 972         /* Clear key cache entries explicitly to get rid of any potentially
 973          * remaining keys.
 974          */
 975         ath9k_cmn_init_crypto(sc->sc_ah);
 976
 977         ath9k_ps_restore(sc);
 978
 979         sc->ps_idle = prev_idle;
 980
 981         mutex_unlock(&sc->mutex);
 982
 983         ath_dbg(common, CONFIG, "Driver halt\n");
 984 }
 985
 986 static bool ath9k_uses_beacons(int type)
 987 {
 988         switch (type) {
 989         case NL80211_IFTYPE_AP:
 990         case NL80211_IFTYPE_ADHOC:
 991         case NL80211_IFTYPE_MESH_POINT:
 992                 return true;
 993         default:
 994                 return false;
 995         }
 996 }
 997
 998 static void ath9k_vif_iter_set_beacon(struct ath9k_vif_iter_data *iter_data,
 999                                       struct ieee80211_vif *vif)
1000 {
1001         /* Use the first (configured) interface, but prefering AP interfaces. */
1002         if (!iter_data->primary_beacon_vif) {
1003                 iter_data->primary_beacon_vif = vif;
1004         } else {
1005                 if (iter_data->primary_beacon_vif->type != NL80211_IFTYPE_AP &&
1006                     vif->type == NL80211_IFTYPE_AP)
1007                         iter_data->primary_beacon_vif = vif;
1008         }
1009
1010         iter_data->beacons = true;
1011         iter_data->nbcnvifs += 1;
1012 }
1013
1014 static void ath9k_vif_iter(struct ath9k_vif_iter_data *iter_data,
1015                            u8 *mac, struct ieee80211_vif *vif)
1016 {
1017         struct ath_vif *avp = (struct ath_vif *)vif->drv_priv;
1018         int i;
1019
1020         if (iter_data->has_hw_macaddr) {
1021                 for (i = 0; i < ETH_ALEN; i++)
1022                         iter_data->mask[i] &=
1023                                 ~(iter_data->hw_macaddr[i] ^ mac[i]);
1024         } else {
1025                 memcpy(iter_data->hw_macaddr, mac, ETH_ALEN);
1026                 iter_data->has_hw_macaddr = true;
1027         }
1028
1029         if (!vif->bss_conf.use_short_slot)
1030                 iter_data->slottime = 20;
1031
1032         switch (vif->type) {
1033         case NL80211_IFTYPE_AP:
1034                 iter_data->naps++;
1035                 if (vif->bss_conf.enable_beacon)
1036                         ath9k_vif_iter_set_beacon(iter_data, vif);
1037                 break;
1038         case NL80211_IFTYPE_STATION:
1039                 iter_data->nstations++;
1040                 if (avp->assoc && !iter_data->primary_sta)
1041                         iter_data->primary_sta = vif;
1042                 break;
1043         case NL80211_IFTYPE_OCB:
1044                 iter_data->nocbs++;
1045                 break;
1046         case NL80211_IFTYPE_ADHOC:
1047                 iter_data->nadhocs++;
1048                 if (vif->bss_conf.enable_beacon)
1049                         ath9k_vif_iter_set_beacon(iter_data, vif);
1050                 break;
1051         case NL80211_IFTYPE_MESH_POINT:
1052                 iter_data->nmeshes++;
1053                 if (vif->bss_conf.enable_beacon)
1054                         ath9k_vif_iter_set_beacon(iter_data, vif);
1055                 break;
1056         case NL80211_IFTYPE_WDS:
1057                 iter_data->nwds++;
1058                 break;
1059         default:
1060                 break;
1061         }
1062 }
1063
1064 static void ath9k_update_bssid_mask(struct ath_softc *sc,
1065                                     struct ath_chanctx *ctx,
1066                                     struct ath9k_vif_iter_data *iter_data)
1067 {
1068         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1069         struct ath_vif *avp;
1070         int i;
1071
1072         if (!ath9k_is_chanctx_enabled())
1073                 return;
1074
1075         list_for_each_entry(avp, &ctx->vifs, list) {
1076                 if (ctx->nvifs_assigned != 1)
1077                         continue;
1078
1079                 if (!iter_data->has_hw_macaddr)
1080                         continue;
1081
1082                 ether_addr_copy(common->curbssid, avp->bssid);
1083
1084                 /* perm_addr will be used as the p2p device address. */
1085                 for (i = 0; i < ETH_ALEN; i++)
1086                         iter_data->mask[i] &=
1087                                 ~(iter_data->hw_macaddr[i] ^
1088                                   sc->hw->wiphy->perm_addr[i]);
1089         }
1090 }
1091
1092 /* Called with sc->mutex held. */
1093 void ath9k_calculate_iter_data(struct ath_softc *sc,
1094                                struct ath_chanctx *ctx,
1095                                struct ath9k_vif_iter_data *iter_data)
1096 {
1097         struct ath_vif *avp;
1098
1099         /*
1100          * The hardware will use primary station addr together with the
1101          * BSSID mask when matching addresses.
1102          */
1103         memset(iter_data, 0, sizeof(*iter_data));
1104         eth_broadcast_addr(iter_data->mask);
1105         iter_data->slottime = 9;
1106
1107         list_for_each_entry(avp, &ctx->vifs, list)
1108                 ath9k_vif_iter(iter_data, avp->vif->addr, avp->vif);
1109
1110         ath9k_update_bssid_mask(sc, ctx, iter_data);
1111 }
1112
1113 static void ath9k_set_assoc_state(struct ath_softc *sc,
1114                                   struct ieee80211_vif *vif, bool changed)
1115 {
1116         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1117         struct ath_vif *avp = (struct ath_vif *)vif->drv_priv;
1118         unsigned long flags;
1119
1120         set_bit(ATH_OP_PRIM_STA_VIF, &common->op_flags);
1121
1122         ether_addr_copy(common->curbssid, avp->bssid);
1123         common->curaid = avp->aid;
1124         ath9k_hw_write_associd(sc->sc_ah);
1125
1126         if (changed) {
1127                 common->last_rssi = ATH_RSSI_DUMMY_MARKER;
1128                 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
1129
1130                 spin_lock_irqsave(&sc->sc_pm_lock, flags);
1131                 sc->ps_flags |= PS_BEACON_SYNC | PS_WAIT_FOR_BEACON;
1132                 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
1133         }
1134
1135         if (ath9k_hw_mci_is_enabled(sc->sc_ah))
1136                 ath9k_mci_update_wlan_channels(sc, false);
1137
1138         ath_dbg(common, CONFIG,
1139                 "Primary Station interface: %pM, BSSID: %pM\n",
1140                 vif->addr, common->curbssid);
1141 }
1142
1143 #ifdef CONFIG_ATH9K_CHANNEL_CONTEXT
1144 static void ath9k_set_offchannel_state(struct ath_softc *sc)
1145 {
1146         struct ath_hw *ah = sc->sc_ah;
1147         struct ath_common *common = ath9k_hw_common(ah);
1148         struct ieee80211_vif *vif = NULL;
1149
1150         ath9k_ps_wakeup(sc);
1151
1152         if (sc->offchannel.state < ATH_OFFCHANNEL_ROC_START)
1153                 vif = sc->offchannel.scan_vif;
1154         else
1155                 vif = sc->offchannel.roc_vif;
1156
1157         if (WARN_ON(!vif))
1158                 goto exit;
1159
1160         eth_zero_addr(common->curbssid);
1161         eth_broadcast_addr(common->bssidmask);
1162         memcpy(common->macaddr, vif->addr, ETH_ALEN);
1163         common->curaid = 0;
1164         ah->opmode = vif->type;
1165         ah->imask &= ~ATH9K_INT_SWBA;
1166         ah->imask &= ~ATH9K_INT_TSFOOR;
1167         ah->slottime = 9;
1168
1169         ath_hw_setbssidmask(common);
1170         ath9k_hw_setopmode(ah);
1171         ath9k_hw_write_associd(sc->sc_ah);
1172         ath9k_hw_set_interrupts(ah);
1173         ath9k_hw_init_global_settings(ah);
1174
1175 exit:
1176         ath9k_ps_restore(sc);
1177 }
1178 #endif
1179
1180 /* Called with sc->mutex held. */
1181 void ath9k_calculate_summary_state(struct ath_softc *sc,
1182                                    struct ath_chanctx *ctx)
1183 {
1184         struct ath_hw *ah = sc->sc_ah;
1185         struct ath_common *common = ath9k_hw_common(ah);
1186         struct ath9k_vif_iter_data iter_data;
1187
1188         ath_chanctx_check_active(sc, ctx);
1189
1190         if (ctx != sc->cur_chan)
1191                 return;
1192
1193 #ifdef CONFIG_ATH9K_CHANNEL_CONTEXT
1194         if (ctx == &sc->offchannel.chan)
1195                 return ath9k_set_offchannel_state(sc);
1196 #endif
1197
1198         ath9k_ps_wakeup(sc);
1199         ath9k_calculate_iter_data(sc, ctx, &iter_data);
1200
1201         if (iter_data.has_hw_macaddr)
1202                 memcpy(common->macaddr, iter_data.hw_macaddr, ETH_ALEN);
1203
1204         memcpy(common->bssidmask, iter_data.mask, ETH_ALEN);
1205         ath_hw_setbssidmask(common);
1206
1207         if (iter_data.naps > 0) {
1208                 ath9k_hw_set_tsfadjust(ah, true);
1209                 ah->opmode = NL80211_IFTYPE_AP;
1210         } else {
1211                 ath9k_hw_set_tsfadjust(ah, false);
1212                 if (iter_data.beacons)
1213                         ath9k_beacon_ensure_primary_slot(sc);
1214
1215                 if (iter_data.nmeshes)
1216                         ah->opmode = NL80211_IFTYPE_MESH_POINT;
1217                 else if (iter_data.nocbs)
1218                         ah->opmode = NL80211_IFTYPE_OCB;
1219                 else if (iter_data.nwds)
1220                         ah->opmode = NL80211_IFTYPE_AP;
1221                 else if (iter_data.nadhocs)
1222                         ah->opmode = NL80211_IFTYPE_ADHOC;
1223                 else
1224                         ah->opmode = NL80211_IFTYPE_STATION;
1225         }
1226
1227         ath9k_hw_setopmode(ah);
1228
1229         ctx->switch_after_beacon = false;
1230         if ((iter_data.nstations + iter_data.nadhocs + iter_data.nmeshes) > 0)
1231                 ah->imask |= ATH9K_INT_TSFOOR;
1232         else {
1233                 ah->imask &= ~ATH9K_INT_TSFOOR;
1234                 if (iter_data.naps == 1 && iter_data.beacons)
1235                         ctx->switch_after_beacon = true;
1236         }
1237
1238         if (ah->opmode == NL80211_IFTYPE_STATION) {
1239                 bool changed = (iter_data.primary_sta != ctx->primary_sta);
1240
1241                 if (iter_data.primary_sta) {
1242                         iter_data.primary_beacon_vif = iter_data.primary_sta;
1243                         iter_data.beacons = true;
1244                         ath9k_set_assoc_state(sc, iter_data.primary_sta,
1245                                               changed);
1246                         ctx->primary_sta = iter_data.primary_sta;
1247                 } else {
1248                         ctx->primary_sta = NULL;
1249                         eth_zero_addr(common->curbssid);
1250                         common->curaid = 0;
1251                         ath9k_hw_write_associd(sc->sc_ah);
1252                         if (ath9k_hw_mci_is_enabled(sc->sc_ah))
1253                                 ath9k_mci_update_wlan_channels(sc, true);
1254                 }
1255         }
1256         sc->nbcnvifs = iter_data.nbcnvifs;
1257         ath9k_beacon_config(sc, iter_data.primary_beacon_vif,
1258                             iter_data.beacons);
1259         ath9k_hw_set_interrupts(ah);
1260
1261         if (ah->slottime != iter_data.slottime) {
1262                 ah->slottime = iter_data.slottime;
1263                 ath9k_hw_init_global_settings(ah);
1264         }
1265
1266         if (iter_data.primary_sta)
1267                 set_bit(ATH_OP_PRIM_STA_VIF, &common->op_flags);
1268         else
1269                 clear_bit(ATH_OP_PRIM_STA_VIF, &common->op_flags);
1270
1271         ath_dbg(common, CONFIG,
1272                 "macaddr: %pM, bssid: %pM, bssidmask: %pM\n",
1273                 common->macaddr, common->curbssid, common->bssidmask);
1274
1275         ath9k_ps_restore(sc);
1276 }
1277
1278 static void ath9k_tpc_vif_iter(void *data, u8 *mac, struct ieee80211_vif *vif)
1279 {
1280         int *power = (int *)data;
1281
1282         if (*power < vif->bss_conf.txpower)
1283                 *power = vif->bss_conf.txpower;
1284 }
1285
1286 /* Called with sc->mutex held. */
1287 void ath9k_set_txpower(struct ath_softc *sc, struct ieee80211_vif *vif)
1288 {
1289         int power;
1290         struct ath_hw *ah = sc->sc_ah;
1291         struct ath_regulatory *reg = ath9k_hw_regulatory(ah);
1292
1293         ath9k_ps_wakeup(sc);
1294         if (ah->tpc_enabled) {
1295                 power = (vif) ? vif->bss_conf.txpower : -1;
1296                 ieee80211_iterate_active_interfaces_atomic(
1297                                 sc->hw, IEEE80211_IFACE_ITER_RESUME_ALL,
1298                                 ath9k_tpc_vif_iter, &power);
1299                 if (power == -1)
1300                         power = sc->hw->conf.power_level;
1301         } else {
1302                 power = sc->hw->conf.power_level;
1303         }
1304         sc->cur_chan->txpower = 2 * power;
1305         ath9k_hw_set_txpowerlimit(ah, sc->cur_chan->txpower, false);
1306         sc->cur_chan->cur_txpower = reg->max_power_level;
1307         ath9k_ps_restore(sc);
1308 }
1309
1310 static void ath9k_assign_hw_queues(struct ieee80211_hw *hw,
1311                                    struct ieee80211_vif *vif)
1312 {
1313         int i;
1314
1315         if (!ath9k_is_chanctx_enabled())
1316                 return;
1317
1318         for (i = 0; i < IEEE80211_NUM_ACS; i++)
1319                 vif->hw_queue[i] = i;
1320
1321         if (vif->type == NL80211_IFTYPE_AP ||
1322             vif->type == NL80211_IFTYPE_MESH_POINT)
1323                 vif->cab_queue = hw->queues - 2;
1324         else
1325                 vif->cab_queue = IEEE80211_INVAL_HW_QUEUE;
1326 }
1327
1328 static int ath9k_add_interface(struct ieee80211_hw *hw,
1329                                struct ieee80211_vif *vif)
1330 {
1331         struct ath_softc *sc = hw->priv;
1332         struct ath_hw *ah = sc->sc_ah;
1333         struct ath_common *common = ath9k_hw_common(ah);
1334         struct ath_vif *avp = (void *)vif->drv_priv;
1335         struct ath_node *an = &avp->mcast_node;
1336
1337         mutex_lock(&sc->mutex);
1338         if (IS_ENABLED(CONFIG_ATH9K_TX99)) {
1339                 if (sc->cur_chan->nvifs >= 1) {
1340                         mutex_unlock(&sc->mutex);
1341                         return -EOPNOTSUPP;
1342                 }
1343                 sc->tx99_vif = vif;
1344         }
1345
1346         ath_dbg(common, CONFIG, "Attach a VIF of type: %d\n", vif->type);
1347         sc->cur_chan->nvifs++;
1348
1349         if (vif->type == NL80211_IFTYPE_STATION && ath9k_is_chanctx_enabled())
1350                 vif->driver_flags |= IEEE80211_VIF_GET_NOA_UPDATE;
1351
1352         if (ath9k_uses_beacons(vif->type))
1353                 ath9k_beacon_assign_slot(sc, vif);
1354
1355         avp->vif = vif;
1356         if (!ath9k_is_chanctx_enabled()) {
1357                 avp->chanctx = sc->cur_chan;
1358                 list_add_tail(&avp->list, &avp->chanctx->vifs);
1359         }
1360
1361         ath9k_calculate_summary_state(sc, avp->chanctx);
1362
1363         ath9k_assign_hw_queues(hw, vif);
1364
1365         ath9k_set_txpower(sc, vif);
1366
1367         an->sc = sc;
1368         an->sta = NULL;
1369         an->vif = vif;
1370         an->no_ps_filter = true;
1371         ath_tx_node_init(sc, an);
1372
1373         mutex_unlock(&sc->mutex);
1374         return 0;
1375 }
1376
1377 static int ath9k_change_interface(struct ieee80211_hw *hw,
1378                                   struct ieee80211_vif *vif,
1379                                   enum nl80211_iftype new_type,
1380                                   bool p2p)
1381 {
1382         struct ath_softc *sc = hw->priv;
1383         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1384         struct ath_vif *avp = (void *)vif->drv_priv;
1385
1386         mutex_lock(&sc->mutex);
1387
1388         if (IS_ENABLED(CONFIG_ATH9K_TX99)) {
1389                 mutex_unlock(&sc->mutex);
1390                 return -EOPNOTSUPP;
1391         }
1392
1393         ath_dbg(common, CONFIG, "Change Interface\n");
1394
1395         if (ath9k_uses_beacons(vif->type))
1396                 ath9k_beacon_remove_slot(sc, vif);
1397
1398         vif->type = new_type;
1399         vif->p2p = p2p;
1400
1401         if (ath9k_uses_beacons(vif->type))
1402                 ath9k_beacon_assign_slot(sc, vif);
1403
1404         ath9k_assign_hw_queues(hw, vif);
1405         ath9k_calculate_summary_state(sc, avp->chanctx);
1406
1407         ath9k_set_txpower(sc, vif);
1408
1409         mutex_unlock(&sc->mutex);
1410         return 0;
1411 }
1412
1413 static void ath9k_remove_interface(struct ieee80211_hw *hw,
1414                                    struct ieee80211_vif *vif)
1415 {
1416         struct ath_softc *sc = hw->priv;
1417         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1418         struct ath_vif *avp = (void *)vif->drv_priv;
1419
1420         ath_dbg(common, CONFIG, "Detach Interface\n");
1421
1422         mutex_lock(&sc->mutex);
1423
1424         ath9k_p2p_remove_vif(sc, vif);
1425
1426         sc->cur_chan->nvifs--;
1427         sc->tx99_vif = NULL;
1428         if (!ath9k_is_chanctx_enabled())
1429                 list_del(&avp->list);
1430
1431         if (ath9k_uses_beacons(vif->type))
1432                 ath9k_beacon_remove_slot(sc, vif);
1433
1434         ath_tx_node_cleanup(sc, &avp->mcast_node);
1435
1436         ath9k_calculate_summary_state(sc, avp->chanctx);
1437
1438         ath9k_set_txpower(sc, NULL);
1439
1440         mutex_unlock(&sc->mutex);
1441 }
1442
1443 static void ath9k_enable_ps(struct ath_softc *sc)
1444 {
1445         struct ath_hw *ah = sc->sc_ah;
1446         struct ath_common *common = ath9k_hw_common(ah);
1447
1448         if (IS_ENABLED(CONFIG_ATH9K_TX99))
1449                 return;
1450
1451         sc->ps_enabled = true;
1452         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1453                 if ((ah->imask & ATH9K_INT_TIM_TIMER) == 0) {
1454                         ah->imask |= ATH9K_INT_TIM_TIMER;
1455                         ath9k_hw_set_interrupts(ah);
1456                 }
1457                 ath9k_hw_setrxabort(ah, 1);
1458         }
1459         ath_dbg(common, PS, "PowerSave enabled\n");
1460 }
1461
1462 static void ath9k_disable_ps(struct ath_softc *sc)
1463 {
1464         struct ath_hw *ah = sc->sc_ah;
1465         struct ath_common *common = ath9k_hw_common(ah);
1466
1467         if (IS_ENABLED(CONFIG_ATH9K_TX99))
1468                 return;
1469
1470         sc->ps_enabled = false;
1471         ath9k_hw_setpower(ah, ATH9K_PM_AWAKE);
1472         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1473                 ath9k_hw_setrxabort(ah, 0);
1474                 sc->ps_flags &= ~(PS_WAIT_FOR_BEACON |
1475                                   PS_WAIT_FOR_CAB |
1476                                   PS_WAIT_FOR_PSPOLL_DATA |
1477                                   PS_WAIT_FOR_TX_ACK);
1478                 if (ah->imask & ATH9K_INT_TIM_TIMER) {
1479                         ah->imask &= ~ATH9K_INT_TIM_TIMER;
1480                         ath9k_hw_set_interrupts(ah);
1481                 }
1482         }
1483         ath_dbg(common, PS, "PowerSave disabled\n");
1484 }
1485
1486 static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
1487 {
1488         struct ath_softc *sc = hw->priv;
1489         struct ath_hw *ah = sc->sc_ah;
1490         struct ath_common *common = ath9k_hw_common(ah);
1491         struct ieee80211_conf *conf = &hw->conf;
1492         struct ath_chanctx *ctx = sc->cur_chan;
1493
1494         ath9k_ps_wakeup(sc);
1495         mutex_lock(&sc->mutex);
1496
1497         if (changed & IEEE80211_CONF_CHANGE_IDLE) {
1498                 sc->ps_idle = !!(conf->flags & IEEE80211_CONF_IDLE);
1499                 if (sc->ps_idle) {
1500                         ath_cancel_work(sc);
1501                         ath9k_stop_btcoex(sc);
1502                 } else {
1503                         ath9k_start_btcoex(sc);
1504                         /*
1505                          * The chip needs a reset to properly wake up from
1506                          * full sleep
1507                          */
1508                         ath_chanctx_set_channel(sc, ctx, &ctx->chandef);
1509                 }
1510         }
1511
1512         /*
1513          * We just prepare to enable PS. We have to wait until our AP has
1514          * ACK'd our null data frame to disable RX otherwise we'll ignore
1515          * those ACKs and end up retransmitting the same null data frames.
1516          * IEEE80211_CONF_CHANGE_PS is only passed by mac80211 for STA mode.
1517          */
1518         if (changed & IEEE80211_CONF_CHANGE_PS) {
1519                 unsigned long flags;
1520                 spin_lock_irqsave(&sc->sc_pm_lock, flags);
1521                 if (conf->flags & IEEE80211_CONF_PS)
1522                         ath9k_enable_ps(sc);
1523                 else
1524                         ath9k_disable_ps(sc);
1525                 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
1526         }
1527
1528         if (changed & IEEE80211_CONF_CHANGE_MONITOR) {
1529                 if (conf->flags & IEEE80211_CONF_MONITOR) {
1530                         ath_dbg(common, CONFIG, "Monitor mode is enabled\n");
1531                         sc->sc_ah->is_monitoring = true;
1532                 } else {
1533                         ath_dbg(common, CONFIG, "Monitor mode is disabled\n");
1534                         sc->sc_ah->is_monitoring = false;
1535                 }
1536         }
1537
1538         if (!ath9k_is_chanctx_enabled() && (changed & IEEE80211_CONF_CHANGE_CHANNEL)) {
1539                 ctx->offchannel = !!(conf->flags & IEEE80211_CONF_OFFCHANNEL);
1540                 ath_chanctx_set_channel(sc, ctx, &hw->conf.chandef);
1541         }
1542
1543         if (changed & IEEE80211_CONF_CHANGE_POWER)
1544                 ath9k_set_txpower(sc, NULL);
1545
1546         mutex_unlock(&sc->mutex);
1547         ath9k_ps_restore(sc);
1548
1549         return 0;
1550 }
1551
1552 #define SUPPORTED_FILTERS                       \
1553         (FIF_ALLMULTI |                         \
1554         FIF_CONTROL |                           \
1555         FIF_PSPOLL |                            \
1556         FIF_OTHER_BSS |                         \
1557         FIF_BCN_PRBRESP_PROMISC |               \
1558         FIF_PROBE_REQ |                         \
1559         FIF_FCSFAIL)
1560
1561 /* FIXME: sc->sc_full_reset ? */
1562 static void ath9k_configure_filter(struct ieee80211_hw *hw,
1563                                    unsigned int changed_flags,
1564                                    unsigned int *total_flags,
1565                                    u64 multicast)
1566 {
1567         struct ath_softc *sc = hw->priv;
1568         struct ath_chanctx *ctx;
1569         u32 rfilt;
1570
1571         changed_flags &= SUPPORTED_FILTERS;
1572         *total_flags &= SUPPORTED_FILTERS;
1573
1574         spin_lock_bh(&sc->chan_lock);
1575         ath_for_each_chanctx(sc, ctx)
1576                 ctx->rxfilter = *total_flags;
1577 #ifdef CONFIG_ATH9K_CHANNEL_CONTEXT
1578         sc->offchannel.chan.rxfilter = *total_flags;
1579 #endif
1580         spin_unlock_bh(&sc->chan_lock);
1581
1582         ath9k_ps_wakeup(sc);
1583         rfilt = ath_calcrxfilter(sc);
1584         ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
1585         ath9k_ps_restore(sc);
1586
1587         ath_dbg(ath9k_hw_common(sc->sc_ah), CONFIG, "Set HW RX filter: 0x%x\n",
1588                 rfilt);
1589 }
1590
1591 static int ath9k_sta_add(struct ieee80211_hw *hw,
1592                          struct ieee80211_vif *vif,
1593                          struct ieee80211_sta *sta)
1594 {
1595         struct ath_softc *sc = hw->priv;
1596         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1597         struct ath_node *an = (struct ath_node *) sta->drv_priv;
1598         struct ieee80211_key_conf ps_key = { };
1599         int key;
1600
1601         ath_node_attach(sc, sta, vif);
1602
1603         if (vif->type != NL80211_IFTYPE_AP &&
1604             vif->type != NL80211_IFTYPE_AP_VLAN)
1605                 return 0;
1606
1607         key = ath_key_config(common, vif, sta, &ps_key);
1608         if (key > 0) {
1609                 an->ps_key = key;
1610                 an->key_idx[0] = key;
1611         }
1612
1613         return 0;
1614 }
1615
1616 static void ath9k_del_ps_key(struct ath_softc *sc,
1617                              struct ieee80211_vif *vif,
1618                              struct ieee80211_sta *sta)
1619 {
1620         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1621         struct ath_node *an = (struct ath_node *) sta->drv_priv;
1622
1623         if (!an->ps_key)
1624             return;
1625
1626         ath_key_delete(common, an->ps_key);
1627         an->ps_key = 0;
1628         an->key_idx[0] = 0;
1629 }
1630
1631 static int ath9k_sta_remove(struct ieee80211_hw *hw,
1632                             struct ieee80211_vif *vif,
1633                             struct ieee80211_sta *sta)
1634 {
1635         struct ath_softc *sc = hw->priv;
1636
1637         ath9k_del_ps_key(sc, vif, sta);
1638         ath_node_detach(sc, sta);
1639
1640         return 0;
1641 }
1642
1643 static int ath9k_sta_state(struct ieee80211_hw *hw,
1644                            struct ieee80211_vif *vif,
1645                            struct ieee80211_sta *sta,
1646                            enum ieee80211_sta_state old_state,
1647                            enum ieee80211_sta_state new_state)
1648 {
1649         struct ath_softc *sc = hw->priv;
1650         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1651         int ret = 0;
1652
1653         if (old_state == IEEE80211_STA_NOTEXIST &&
1654             new_state == IEEE80211_STA_NONE) {
1655                 ret = ath9k_sta_add(hw, vif, sta);
1656                 ath_dbg(common, CONFIG,
1657                         "Add station: %pM\n", sta->addr);
1658         } else if (old_state == IEEE80211_STA_NONE &&
1659                    new_state == IEEE80211_STA_NOTEXIST) {
1660                 ret = ath9k_sta_remove(hw, vif, sta);
1661                 ath_dbg(common, CONFIG,
1662                         "Remove station: %pM\n", sta->addr);
1663         }
1664
1665         if (ath9k_is_chanctx_enabled()) {
1666                 if (vif->type == NL80211_IFTYPE_STATION) {
1667                         if (old_state == IEEE80211_STA_ASSOC &&
1668                             new_state == IEEE80211_STA_AUTHORIZED)
1669                                 ath_chanctx_event(sc, vif,
1670                                                   ATH_CHANCTX_EVENT_AUTHORIZED);
1671                 }
1672         }
1673
1674         return ret;
1675 }
1676
1677 static void ath9k_sta_set_tx_filter(struct ath_hw *ah,
1678                                     struct ath_node *an,
1679                                     bool set)
1680 {
1681         int i;
1682
1683         for (i = 0; i < ARRAY_SIZE(an->key_idx); i++) {
1684                 if (!an->key_idx[i])
1685                         continue;
1686                 ath9k_hw_set_tx_filter(ah, an->key_idx[i], set);
1687         }
1688 }
1689
1690 static void ath9k_sta_notify(struct ieee80211_hw *hw,
1691                          struct ieee80211_vif *vif,
1692                          enum sta_notify_cmd cmd,
1693                          struct ieee80211_sta *sta)
1694 {
1695         struct ath_softc *sc = hw->priv;
1696         struct ath_node *an = (struct ath_node *) sta->drv_priv;
1697
1698         switch (cmd) {
1699         case STA_NOTIFY_SLEEP:
1700                 an->sleeping = true;
1701                 ath_tx_aggr_sleep(sta, sc, an);
1702                 ath9k_sta_set_tx_filter(sc->sc_ah, an, true);
1703                 break;
1704         case STA_NOTIFY_AWAKE:
1705                 ath9k_sta_set_tx_filter(sc->sc_ah, an, false);
1706                 an->sleeping = false;
1707                 ath_tx_aggr_wakeup(sc, an);
1708                 break;
1709         }
1710 }
1711
1712 static int ath9k_conf_tx(struct ieee80211_hw *hw,
1713                          struct ieee80211_vif *vif, u16 queue,
1714                          const struct ieee80211_tx_queue_params *params)
1715 {
1716         struct ath_softc *sc = hw->priv;
1717         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1718         struct ath_txq *txq;
1719         struct ath9k_tx_queue_info qi;
1720         int ret = 0;
1721
1722         if (queue >= IEEE80211_NUM_ACS)
1723                 return 0;
1724
1725         txq = sc->tx.txq_map[queue];
1726
1727         ath9k_ps_wakeup(sc);
1728         mutex_lock(&sc->mutex);
1729
1730         memset(&qi, 0, sizeof(struct ath9k_tx_queue_info));
1731
1732         qi.tqi_aifs = params->aifs;
1733         qi.tqi_cwmin = params->cw_min;
1734         qi.tqi_cwmax = params->cw_max;
1735         qi.tqi_burstTime = params->txop * 32;
1736
1737         ath_dbg(common, CONFIG,
1738                 "Configure tx [queue/halq] [%d/%d], aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
1739                 queue, txq->axq_qnum, params->aifs, params->cw_min,
1740                 params->cw_max, params->txop);
1741
1742         ath_update_max_aggr_framelen(sc, queue, qi.tqi_burstTime);
1743         ret = ath_txq_update(sc, txq->axq_qnum, &qi);
1744         if (ret)
1745                 ath_err(common, "TXQ Update failed\n");
1746
1747         mutex_unlock(&sc->mutex);
1748         ath9k_ps_restore(sc);
1749
1750         return ret;
1751 }
1752
1753 static int ath9k_set_key(struct ieee80211_hw *hw,
1754                          enum set_key_cmd cmd,
1755                          struct ieee80211_vif *vif,
1756                          struct ieee80211_sta *sta,
1757                          struct ieee80211_key_conf *key)
1758 {
1759         struct ath_softc *sc = hw->priv;
1760         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1761         struct ath_node *an = NULL;
1762         int ret = 0, i;
1763
1764         if (ath9k_modparam_nohwcrypt)
1765                 return -ENOSPC;
1766
1767         if ((vif->type == NL80211_IFTYPE_ADHOC ||
1768              vif->type == NL80211_IFTYPE_MESH_POINT) &&
1769             (key->cipher == WLAN_CIPHER_SUITE_TKIP ||
1770              key->cipher == WLAN_CIPHER_SUITE_CCMP) &&
1771             !(key->flags & IEEE80211_KEY_FLAG_PAIRWISE)) {
1772                 /*
1773                  * For now, disable hw crypto for the RSN IBSS group keys. This
1774                  * could be optimized in the future to use a modified key cache
1775                  * design to support per-STA RX GTK, but until that gets
1776                  * implemented, use of software crypto for group addressed
1777                  * frames is a acceptable to allow RSN IBSS to be used.
1778                  */
1779                 return -EOPNOTSUPP;
1780         }
1781
1782         mutex_lock(&sc->mutex);
1783         ath9k_ps_wakeup(sc);
1784         ath_dbg(common, CONFIG, "Set HW Key %d\n", cmd);
1785         if (sta)
1786                 an = (struct ath_node *)sta->drv_priv;
1787
1788         /* Delete pending key cache entries if no more frames are pointing to
1789          * them in TXQs.
1790          */
1791         for (i = 0; i < ATH_KEYMAX; i++)
1792                 ath9k_pending_key_del(sc, i);
1793
1794         switch (cmd) {
1795         case SET_KEY:
1796                 if (sta)
1797                         ath9k_del_ps_key(sc, vif, sta);
1798
1799                 key->hw_key_idx = 0;
1800                 ret = ath_key_config(common, vif, sta, key);
1801                 if (ret >= 0) {
1802                         key->hw_key_idx = ret;
1803                         /* push IV and Michael MIC generation to stack */
1804                         key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
1805                         if (key->cipher == WLAN_CIPHER_SUITE_TKIP)
1806                                 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
1807                         if (sc->sc_ah->sw_mgmt_crypto_tx &&
1808                             key->cipher == WLAN_CIPHER_SUITE_CCMP)
1809                                 key->flags |= IEEE80211_KEY_FLAG_SW_MGMT_TX;
1810                         ret = 0;
1811                 }
1812                 if (an && key->hw_key_idx) {
1813                         for (i = 0; i < ARRAY_SIZE(an->key_idx); i++) {
1814                                 if (an->key_idx[i])
1815                                         continue;
1816                                 an->key_idx[i] = key->hw_key_idx;
1817                                 break;
1818                         }
1819                         WARN_ON(i == ARRAY_SIZE(an->key_idx));
1820                 }
1821                 break;
1822         case DISABLE_KEY:
1823                 if (ath9k_txq_has_key(sc, key->hw_key_idx)) {
1824                         /* Delay key cache entry deletion until there are no
1825                          * remaining TXQ frames pointing to this entry.
1826                          */
1827                         set_bit(key->hw_key_idx, sc->sc_ah->pending_del_keymap);
1828                         ath_hw_keysetmac(common, key->hw_key_idx, NULL);
1829                 } else {
1830                         ath_key_delete(common, key->hw_key_idx);
1831                 }
1832                 if (an) {
1833                         for (i = 0; i < ARRAY_SIZE(an->key_idx); i++) {
1834                                 if (an->key_idx[i] != key->hw_key_idx)
1835                                         continue;
1836                                 an->key_idx[i] = 0;
1837                                 break;
1838                         }
1839                 }
1840                 key->hw_key_idx = 0;
1841                 break;
1842         default:
1843                 ret = -EINVAL;
1844         }
1845
1846         ath9k_ps_restore(sc);
1847         mutex_unlock(&sc->mutex);
1848
1849         return ret;
1850 }
1851
1852 static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
1853                                    struct ieee80211_vif *vif,
1854                                    struct ieee80211_bss_conf *bss_conf,
1855                                    u32 changed)
1856 {
1857 #define CHECK_ANI                               \
1858         (BSS_CHANGED_ASSOC |                    \
1859          BSS_CHANGED_IBSS |                     \
1860          BSS_CHANGED_BEACON_ENABLED)
1861
1862         struct ath_softc *sc = hw->priv;
1863         struct ath_hw *ah = sc->sc_ah;
1864         struct ath_common *common = ath9k_hw_common(ah);
1865         struct ath_vif *avp = (void *)vif->drv_priv;
1866         int slottime;
1867
1868         ath9k_ps_wakeup(sc);
1869         mutex_lock(&sc->mutex);
1870
1871         if (changed & BSS_CHANGED_ASSOC) {
1872                 ath_dbg(common, CONFIG, "BSSID %pM Changed ASSOC %d\n",
1873                         bss_conf->bssid, bss_conf->assoc);
1874
1875                 memcpy(avp->bssid, bss_conf->bssid, ETH_ALEN);
1876                 avp->aid = bss_conf->aid;
1877                 avp->assoc = bss_conf->assoc;
1878
1879                 ath9k_calculate_summary_state(sc, avp->chanctx);
1880         }
1881
1882         if ((changed & BSS_CHANGED_IBSS) ||
1883               (changed & BSS_CHANGED_OCB)) {
1884                 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
1885                 common->curaid = bss_conf->aid;
1886                 ath9k_hw_write_associd(sc->sc_ah);
1887         }
1888
1889         if ((changed & BSS_CHANGED_BEACON_ENABLED) ||
1890             (changed & BSS_CHANGED_BEACON_INT) ||
1891             (changed & BSS_CHANGED_BEACON_INFO)) {
1892                 ath9k_calculate_summary_state(sc, avp->chanctx);
1893         }
1894
1895         if ((avp->chanctx == sc->cur_chan) &&
1896             (changed & BSS_CHANGED_ERP_SLOT)) {
1897                 if (bss_conf->use_short_slot)
1898                         slottime = 9;
1899                 else
1900                         slottime = 20;
1901
1902                 if (vif->type == NL80211_IFTYPE_AP) {
1903                         /*
1904                          * Defer update, so that connected stations can adjust
1905                          * their settings at the same time.
1906                          * See beacon.c for more details
1907                          */
1908                         sc->beacon.slottime = slottime;
1909                         sc->beacon.updateslot = UPDATE;
1910                 } else {
1911                         ah->slottime = slottime;
1912                         ath9k_hw_init_global_settings(ah);
1913                 }
1914         }
1915
1916         if (changed & BSS_CHANGED_P2P_PS)
1917                 ath9k_p2p_bss_info_changed(sc, vif);
1918
1919         if (changed & CHECK_ANI)
1920                 ath_check_ani(sc);
1921
1922         if (changed & BSS_CHANGED_TXPOWER) {
1923                 ath_dbg(common, CONFIG, "vif %pM power %d dbm power_type %d\n",
1924                         vif->addr, bss_conf->txpower, bss_conf->txpower_type);
1925                 ath9k_set_txpower(sc, vif);
1926         }
1927
1928         mutex_unlock(&sc->mutex);
1929         ath9k_ps_restore(sc);
1930
1931 #undef CHECK_ANI
1932 }
1933
1934 static u64 ath9k_get_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
1935 {
1936         struct ath_softc *sc = hw->priv;
1937         struct ath_vif *avp = (void *)vif->drv_priv;
1938         u64 tsf;
1939
1940         mutex_lock(&sc->mutex);
1941         ath9k_ps_wakeup(sc);
1942         /* Get current TSF either from HW or kernel time. */
1943         if (sc->cur_chan == avp->chanctx) {
1944                 tsf = ath9k_hw_gettsf64(sc->sc_ah);
1945         } else {
1946                 tsf = sc->cur_chan->tsf_val +
1947                       ath9k_hw_get_tsf_offset(&sc->cur_chan->tsf_ts, NULL);
1948         }
1949         tsf += le64_to_cpu(avp->tsf_adjust);
1950         ath9k_ps_restore(sc);
1951         mutex_unlock(&sc->mutex);
1952
1953         return tsf;
1954 }
1955
1956 static void ath9k_set_tsf(struct ieee80211_hw *hw,
1957                           struct ieee80211_vif *vif,
1958                           u64 tsf)
1959 {
1960         struct ath_softc *sc = hw->priv;
1961         struct ath_vif *avp = (void *)vif->drv_priv;
1962
1963         mutex_lock(&sc->mutex);
1964         ath9k_ps_wakeup(sc);
1965         tsf -= le64_to_cpu(avp->tsf_adjust);
1966         getrawmonotonic(&avp->chanctx->tsf_ts);
1967         if (sc->cur_chan == avp->chanctx)
1968                 ath9k_hw_settsf64(sc->sc_ah, tsf);
1969         avp->chanctx->tsf_val = tsf;
1970         ath9k_ps_restore(sc);
1971         mutex_unlock(&sc->mutex);
1972 }
1973
1974 static void ath9k_reset_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
1975 {
1976         struct ath_softc *sc = hw->priv;
1977         struct ath_vif *avp = (void *)vif->drv_priv;
1978
1979         mutex_lock(&sc->mutex);
1980
1981         ath9k_ps_wakeup(sc);
1982         getrawmonotonic(&avp->chanctx->tsf_ts);
1983         if (sc->cur_chan == avp->chanctx)
1984                 ath9k_hw_reset_tsf(sc->sc_ah);
1985         avp->chanctx->tsf_val = 0;
1986         ath9k_ps_restore(sc);
1987
1988         mutex_unlock(&sc->mutex);
1989 }
1990
1991 static int ath9k_ampdu_action(struct ieee80211_hw *hw,
1992                               struct ieee80211_vif *vif,
1993                               struct ieee80211_ampdu_params *params)
1994 {
1995         struct ath_softc *sc = hw->priv;
1996         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1997         bool flush = false;
1998         int ret = 0;
1999         struct ieee80211_sta *sta = params->sta;
2000         struct ath_node *an = (struct ath_node *)sta->drv_priv;
2001         enum ieee80211_ampdu_mlme_action action = params->action;
2002         u16 tid = params->tid;
2003         u16 *ssn = &params->ssn;
2004         struct ath_atx_tid *atid;
2005
2006         mutex_lock(&sc->mutex);
2007
2008         switch (action) {
2009         case IEEE80211_AMPDU_RX_START:
2010                 break;
2011         case IEEE80211_AMPDU_RX_STOP:
2012                 break;
2013         case IEEE80211_AMPDU_TX_START:
2014                 if (ath9k_is_chanctx_enabled()) {
2015                         if (test_bit(ATH_OP_SCANNING, &common->op_flags)) {
2016                                 ret = -EBUSY;
2017                                 break;
2018                         }
2019                 }
2020                 ath9k_ps_wakeup(sc);
2021                 ret = ath_tx_aggr_start(sc, sta, tid, ssn);
2022                 if (!ret)
2023                         ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
2024                 ath9k_ps_restore(sc);
2025                 break;
2026         case IEEE80211_AMPDU_TX_STOP_FLUSH:
2027         case IEEE80211_AMPDU_TX_STOP_FLUSH_CONT:
2028                 flush = true;
2029         case IEEE80211_AMPDU_TX_STOP_CONT:
2030                 ath9k_ps_wakeup(sc);
2031                 ath_tx_aggr_stop(sc, sta, tid);
2032                 if (!flush)
2033                         ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
2034                 ath9k_ps_restore(sc);
2035                 break;
2036         case IEEE80211_AMPDU_TX_OPERATIONAL:
2037                 atid = ath_node_to_tid(an, tid);
2038                 atid->baw_size = IEEE80211_MIN_AMPDU_BUF <<
2039                                 sta->ht_cap.ampdu_factor;
2040                 break;
2041         default:
2042                 ath_err(ath9k_hw_common(sc->sc_ah), "Unknown AMPDU action\n");
2043         }
2044
2045         mutex_unlock(&sc->mutex);
2046
2047         return ret;
2048 }
2049
2050 static int ath9k_get_survey(struct ieee80211_hw *hw, int idx,
2051                              struct survey_info *survey)
2052 {
2053         struct ath_softc *sc = hw->priv;
2054         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2055         struct ieee80211_supported_band *sband;
2056         struct ieee80211_channel *chan;
2057         int pos;
2058
2059         if (IS_ENABLED(CONFIG_ATH9K_TX99))
2060                 return -EOPNOTSUPP;
2061
2062         spin_lock_bh(&common->cc_lock);
2063         if (idx == 0)
2064                 ath_update_survey_stats(sc);
2065
2066         sband = hw->wiphy->bands[NL80211_BAND_2GHZ];
2067         if (sband && idx >= sband->n_channels) {
2068                 idx -= sband->n_channels;
2069                 sband = NULL;
2070         }
2071
2072         if (!sband)
2073                 sband = hw->wiphy->bands[NL80211_BAND_5GHZ];
2074
2075         if (!sband || idx >= sband->n_channels) {
2076                 spin_unlock_bh(&common->cc_lock);
2077                 return -ENOENT;
2078         }
2079
2080         chan = &sband->channels[idx];
2081         pos = chan->hw_value;
2082         memcpy(survey, &sc->survey[pos], sizeof(*survey));
2083         survey->channel = chan;
2084         spin_unlock_bh(&common->cc_lock);
2085
2086         return 0;
2087 }
2088
2089 static void ath9k_enable_dynack(struct ath_softc *sc)
2090 {
2091 #ifdef CONFIG_ATH9K_DYNACK
2092         u32 rfilt;
2093         struct ath_hw *ah = sc->sc_ah;
2094
2095         ath_dynack_reset(ah);
2096
2097         ah->dynack.enabled = true;
2098         rfilt = ath_calcrxfilter(sc);
2099         ath9k_hw_setrxfilter(ah, rfilt);
2100 #endif
2101 }
2102
2103 static void ath9k_set_coverage_class(struct ieee80211_hw *hw,
2104                                      s16 coverage_class)
2105 {
2106         struct ath_softc *sc = hw->priv;
2107         struct ath_hw *ah = sc->sc_ah;
2108
2109         if (IS_ENABLED(CONFIG_ATH9K_TX99))
2110                 return;
2111
2112         mutex_lock(&sc->mutex);
2113
2114         if (coverage_class >= 0) {
2115                 ah->coverage_class = coverage_class;
2116                 if (ah->dynack.enabled) {
2117                         u32 rfilt;
2118
2119                         ah->dynack.enabled = false;
2120                         rfilt = ath_calcrxfilter(sc);
2121                         ath9k_hw_setrxfilter(ah, rfilt);
2122                 }
2123                 ath9k_ps_wakeup(sc);
2124                 ath9k_hw_init_global_settings(ah);
2125                 ath9k_ps_restore(sc);
2126         } else if (!ah->dynack.enabled) {
2127                 ath9k_enable_dynack(sc);
2128         }
2129
2130         mutex_unlock(&sc->mutex);
2131 }
2132
2133 static bool ath9k_has_tx_pending(struct ath_softc *sc,
2134                                  bool sw_pending)
2135 {
2136         int i, npend = 0;
2137
2138         for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
2139                 if (!ATH_TXQ_SETUP(sc, i))
2140                         continue;
2141
2142                 npend = ath9k_has_pending_frames(sc, &sc->tx.txq[i],
2143                                                  sw_pending);
2144                 if (npend)
2145                         break;
2146         }
2147
2148         return !!npend;
2149 }
2150
2151 static void ath9k_flush(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
2152                         u32 queues, bool drop)
2153 {
2154         struct ath_softc *sc = hw->priv;
2155         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2156
2157         if (ath9k_is_chanctx_enabled()) {
2158                 if (!test_bit(ATH_OP_MULTI_CHANNEL, &common->op_flags))
2159                         goto flush;
2160
2161                 /*
2162                  * If MCC is active, extend the flush timeout
2163                  * and wait for the HW/SW queues to become
2164                  * empty. This needs to be done outside the
2165                  * sc->mutex lock to allow the channel scheduler
2166                  * to switch channel contexts.
2167                  *
2168                  * The vif queues have been stopped in mac80211,
2169                  * so there won't be any incoming frames.
2170                  */
2171                 __ath9k_flush(hw, queues, drop, true, true);
2172                 return;
2173         }
2174 flush:
2175         mutex_lock(&sc->mutex);
2176         __ath9k_flush(hw, queues, drop, true, false);
2177         mutex_unlock(&sc->mutex);
2178 }
2179
2180 void __ath9k_flush(struct ieee80211_hw *hw, u32 queues, bool drop,
2181                    bool sw_pending, bool timeout_override)
2182 {
2183         struct ath_softc *sc = hw->priv;
2184         struct ath_hw *ah = sc->sc_ah;
2185         struct ath_common *common = ath9k_hw_common(ah);
2186         int timeout;
2187         bool drain_txq;
2188
2189         cancel_delayed_work_sync(&sc->hw_check_work);
2190
2191         if (ah->ah_flags & AH_UNPLUGGED) {
2192                 ath_dbg(common, ANY, "Device has been unplugged!\n");
2193                 return;
2194         }
2195
2196         if (test_bit(ATH_OP_INVALID, &common->op_flags)) {
2197                 ath_dbg(common, ANY, "Device not present\n");
2198                 return;
2199         }
2200
2201         spin_lock_bh(&sc->chan_lock);
2202         if (timeout_override)
2203                 timeout = HZ / 5;
2204         else
2205                 timeout = sc->cur_chan->flush_timeout;
2206         spin_unlock_bh(&sc->chan_lock);
2207
2208         ath_dbg(common, CHAN_CTX,
2209                 "Flush timeout: %d\n", jiffies_to_msecs(timeout));
2210
2211         if (wait_event_timeout(sc->tx_wait, !ath9k_has_tx_pending(sc, sw_pending),
2212                                timeout) > 0)
2213                 drop = false;
2214
2215         if (drop) {
2216                 ath9k_ps_wakeup(sc);
2217                 spin_lock_bh(&sc->sc_pcu_lock);
2218                 drain_txq = ath_drain_all_txq(sc);
2219                 spin_unlock_bh(&sc->sc_pcu_lock);
2220
2221                 if (!drain_txq)
2222                         ath_reset(sc, NULL);
2223
2224                 ath9k_ps_restore(sc);
2225         }
2226
2227         ieee80211_queue_delayed_work(hw, &sc->hw_check_work,
2228                                      msecs_to_jiffies(ATH_HW_CHECK_POLL_INT));
2229 }
2230
2231 static bool ath9k_tx_frames_pending(struct ieee80211_hw *hw)
2232 {
2233         struct ath_softc *sc = hw->priv;
2234
2235         return ath9k_has_tx_pending(sc, true);
2236 }
2237
2238 static int ath9k_tx_last_beacon(struct ieee80211_hw *hw)
2239 {
2240         struct ath_softc *sc = hw->priv;
2241         struct ath_hw *ah = sc->sc_ah;
2242         struct ieee80211_vif *vif;
2243         struct ath_vif *avp;
2244         struct ath_buf *bf;
2245         struct ath_tx_status ts;
2246         bool edma = !!(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA);
2247         int status;
2248
2249         vif = sc->beacon.bslot[0];
2250         if (!vif)
2251                 return 0;
2252
2253         if (!vif->bss_conf.enable_beacon)
2254                 return 0;
2255
2256         avp = (void *)vif->drv_priv;
2257
2258         if (!sc->beacon.tx_processed && !edma) {
2259                 tasklet_disable(&sc->bcon_tasklet);
2260
2261                 bf = avp->av_bcbuf;
2262                 if (!bf || !bf->bf_mpdu)
2263                         goto skip;
2264
2265                 status = ath9k_hw_txprocdesc(ah, bf->bf_desc, &ts);
2266                 if (status == -EINPROGRESS)
2267                         goto skip;
2268
2269                 sc->beacon.tx_processed = true;
2270                 sc->beacon.tx_last = !(ts.ts_status & ATH9K_TXERR_MASK);
2271
2272 skip:
2273                 tasklet_enable(&sc->bcon_tasklet);
2274         }
2275
2276         return sc->beacon.tx_last;
2277 }
2278
2279 static int ath9k_get_stats(struct ieee80211_hw *hw,
2280                            struct ieee80211_low_level_stats *stats)
2281 {
2282         struct ath_softc *sc = hw->priv;
2283         struct ath_hw *ah = sc->sc_ah;
2284         struct ath9k_mib_stats *mib_stats = &ah->ah_mibStats;
2285
2286         stats->dot11ACKFailureCount = mib_stats->ackrcv_bad;
2287         stats->dot11RTSFailureCount = mib_stats->rts_bad;
2288         stats->dot11FCSErrorCount = mib_stats->fcs_bad;
2289         stats->dot11RTSSuccessCount = mib_stats->rts_good;
2290         return 0;
2291 }
2292
2293 static u32 fill_chainmask(u32 cap, u32 new)
2294 {
2295         u32 filled = 0;
2296         int i;
2297
2298         for (i = 0; cap && new; i++, cap >>= 1) {
2299                 if (!(cap & BIT(0)))
2300                         continue;
2301
2302                 if (new & BIT(0))
2303                         filled |= BIT(i);
2304
2305                 new >>= 1;
2306         }
2307
2308         return filled;
2309 }
2310
2311 static bool validate_antenna_mask(struct ath_hw *ah, u32 val)
2312 {
2313         if (AR_SREV_9300_20_OR_LATER(ah))
2314                 return true;
2315
2316         switch (val & 0x7) {
2317         case 0x1:
2318         case 0x3:
2319         case 0x7:
2320                 return true;
2321         case 0x2:
2322                 return (ah->caps.rx_chainmask == 1);
2323         default:
2324                 return false;
2325         }
2326 }
2327
2328 static int ath9k_set_antenna(struct ieee80211_hw *hw, u32 tx_ant, u32 rx_ant)
2329 {
2330         struct ath_softc *sc = hw->priv;
2331         struct ath_hw *ah = sc->sc_ah;
2332
2333         if (ah->caps.rx_chainmask != 1)
2334                 rx_ant |= tx_ant;
2335
2336         if (!validate_antenna_mask(ah, rx_ant) || !tx_ant)
2337                 return -EINVAL;
2338
2339         sc->ant_rx = rx_ant;
2340         sc->ant_tx = tx_ant;
2341
2342         if (ah->caps.rx_chainmask == 1)
2343                 return 0;
2344
2345         /* AR9100 runs into calibration issues if not all rx chains are enabled */
2346         if (AR_SREV_9100(ah))
2347                 ah->rxchainmask = 0x7;
2348         else
2349                 ah->rxchainmask = fill_chainmask(ah->caps.rx_chainmask, rx_ant);
2350
2351         ah->txchainmask = fill_chainmask(ah->caps.tx_chainmask, tx_ant);
2352         ath9k_cmn_reload_chainmask(ah);
2353
2354         return 0;
2355 }
2356
2357 static int ath9k_get_antenna(struct ieee80211_hw *hw, u32 *tx_ant, u32 *rx_ant)
2358 {
2359         struct ath_softc *sc = hw->priv;
2360
2361         *tx_ant = sc->ant_tx;
2362         *rx_ant = sc->ant_rx;
2363         return 0;
2364 }
2365
2366 static void ath9k_sw_scan_start(struct ieee80211_hw *hw,
2367                                 struct ieee80211_vif *vif,
2368                                 const u8 *mac_addr)
2369 {
2370         struct ath_softc *sc = hw->priv;
2371         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2372         set_bit(ATH_OP_SCANNING, &common->op_flags);
2373 }
2374
2375 static void ath9k_sw_scan_complete(struct ieee80211_hw *hw,
2376                                    struct ieee80211_vif *vif)
2377 {
2378         struct ath_softc *sc = hw->priv;
2379         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2380         clear_bit(ATH_OP_SCANNING, &common->op_flags);
2381 }
2382
2383 #ifdef CONFIG_ATH9K_CHANNEL_CONTEXT
2384
2385 static void ath9k_cancel_pending_offchannel(struct ath_softc *sc)
2386 {
2387         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2388
2389         if (sc->offchannel.roc_vif) {
2390                 ath_dbg(common, CHAN_CTX,
2391                         "%s: Aborting RoC\n", __func__);
2392
2393                 del_timer_sync(&sc->offchannel.timer);
2394                 if (sc->offchannel.state >= ATH_OFFCHANNEL_ROC_START)
2395                         ath_roc_complete(sc, ATH_ROC_COMPLETE_ABORT);
2396         }
2397
2398         if (test_bit(ATH_OP_SCANNING, &common->op_flags)) {
2399                 ath_dbg(common, CHAN_CTX,
2400                         "%s: Aborting HW scan\n", __func__);
2401
2402                 del_timer_sync(&sc->offchannel.timer);
2403                 ath_scan_complete(sc, true);
2404         }
2405 }
2406
2407 static int ath9k_hw_scan(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
2408                          struct ieee80211_scan_request *hw_req)
2409 {
2410         struct cfg80211_scan_request *req = &hw_req->req;
2411         struct ath_softc *sc = hw->priv;
2412         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2413         int ret = 0;
2414
2415         mutex_lock(&sc->mutex);
2416
2417         if (WARN_ON(sc->offchannel.scan_req)) {
2418                 ret = -EBUSY;
2419                 goto out;
2420         }
2421
2422         ath9k_ps_wakeup(sc);
2423         set_bit(ATH_OP_SCANNING, &common->op_flags);
2424         sc->offchannel.scan_vif = vif;
2425         sc->offchannel.scan_req = req;
2426         sc->offchannel.scan_idx = 0;
2427
2428         ath_dbg(common, CHAN_CTX, "HW scan request received on vif: %pM\n",
2429                 vif->addr);
2430
2431         if (sc->offchannel.state == ATH_OFFCHANNEL_IDLE) {
2432                 ath_dbg(common, CHAN_CTX, "Starting HW scan\n");
2433                 ath_offchannel_next(sc);
2434         }
2435
2436 out:
2437         mutex_unlock(&sc->mutex);
2438
2439         return ret;
2440 }
2441
2442 static void ath9k_cancel_hw_scan(struct ieee80211_hw *hw,
2443                                  struct ieee80211_vif *vif)
2444 {
2445         struct ath_softc *sc = hw->priv;
2446         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2447
2448         ath_dbg(common, CHAN_CTX, "Cancel HW scan on vif: %pM\n", vif->addr);
2449
2450         mutex_lock(&sc->mutex);
2451         del_timer_sync(&sc->offchannel.timer);
2452         ath_scan_complete(sc, true);
2453         mutex_unlock(&sc->mutex);
2454 }
2455
2456 static int ath9k_remain_on_channel(struct ieee80211_hw *hw,
2457                                    struct ieee80211_vif *vif,
2458                                    struct ieee80211_channel *chan, int duration,
2459                                    enum ieee80211_roc_type type)
2460 {
2461         struct ath_softc *sc = hw->priv;
2462         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2463         int ret = 0;
2464
2465         mutex_lock(&sc->mutex);
2466
2467         if (WARN_ON(sc->offchannel.roc_vif)) {
2468                 ret = -EBUSY;
2469                 goto out;
2470         }
2471
2472         ath9k_ps_wakeup(sc);
2473         sc->offchannel.roc_vif = vif;
2474         sc->offchannel.roc_chan = chan;
2475         sc->offchannel.roc_duration = duration;
2476
2477         ath_dbg(common, CHAN_CTX,
2478                 "RoC request on vif: %pM, type: %d duration: %d\n",
2479                 vif->addr, type, duration);
2480
2481         if (sc->offchannel.state == ATH_OFFCHANNEL_IDLE) {
2482                 ath_dbg(common, CHAN_CTX, "Starting RoC period\n");
2483                 ath_offchannel_next(sc);
2484         }
2485
2486 out:
2487         mutex_unlock(&sc->mutex);
2488
2489         return ret;
2490 }
2491
2492 static int ath9k_cancel_remain_on_channel(struct ieee80211_hw *hw)
2493 {
2494         struct ath_softc *sc = hw->priv;
2495         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2496
2497         mutex_lock(&sc->mutex);
2498
2499         ath_dbg(common, CHAN_CTX, "Cancel RoC\n");
2500         del_timer_sync(&sc->offchannel.timer);
2501
2502         if (sc->offchannel.roc_vif) {
2503                 if (sc->offchannel.state >= ATH_OFFCHANNEL_ROC_START)
2504                         ath_roc_complete(sc, ATH_ROC_COMPLETE_CANCEL);
2505         }
2506
2507         mutex_unlock(&sc->mutex);
2508
2509         return 0;
2510 }
2511
2512 static int ath9k_add_chanctx(struct ieee80211_hw *hw,
2513                              struct ieee80211_chanctx_conf *conf)
2514 {
2515         struct ath_softc *sc = hw->priv;
2516         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2517         struct ath_chanctx *ctx, **ptr;
2518         int pos;
2519
2520         mutex_lock(&sc->mutex);
2521
2522         ath_for_each_chanctx(sc, ctx) {
2523                 if (ctx->assigned)
2524                         continue;
2525
2526                 ptr = (void *) conf->drv_priv;
2527                 *ptr = ctx;
2528                 ctx->assigned = true;
2529                 pos = ctx - &sc->chanctx[0];
2530                 ctx->hw_queue_base = pos * IEEE80211_NUM_ACS;
2531
2532                 ath_dbg(common, CHAN_CTX,
2533                         "Add channel context: %d MHz\n",
2534                         conf->def.chan->center_freq);
2535
2536                 ath_chanctx_set_channel(sc, ctx, &conf->def);
2537
2538                 mutex_unlock(&sc->mutex);
2539                 return 0;
2540         }
2541
2542         mutex_unlock(&sc->mutex);
2543         return -ENOSPC;
2544 }
2545
2546
2547 static void ath9k_remove_chanctx(struct ieee80211_hw *hw,
2548                                  struct ieee80211_chanctx_conf *conf)
2549 {
2550         struct ath_softc *sc = hw->priv;
2551         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2552         struct ath_chanctx *ctx = ath_chanctx_get(conf);
2553
2554         mutex_lock(&sc->mutex);
2555
2556         ath_dbg(common, CHAN_CTX,
2557                 "Remove channel context: %d MHz\n",
2558                 conf->def.chan->center_freq);
2559
2560         ctx->assigned = false;
2561         ctx->hw_queue_base = 0;
2562         ath_chanctx_event(sc, NULL, ATH_CHANCTX_EVENT_UNASSIGN);
2563
2564         mutex_unlock(&sc->mutex);
2565 }
2566
2567 static void ath9k_change_chanctx(struct ieee80211_hw *hw,
2568                                  struct ieee80211_chanctx_conf *conf,
2569                                  u32 changed)
2570 {
2571         struct ath_softc *sc = hw->priv;
2572         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2573         struct ath_chanctx *ctx = ath_chanctx_get(conf);
2574
2575         mutex_lock(&sc->mutex);
2576         ath_dbg(common, CHAN_CTX,
2577                 "Change channel context: %d MHz\n",
2578                 conf->def.chan->center_freq);
2579         ath_chanctx_set_channel(sc, ctx, &conf->def);
2580         mutex_unlock(&sc->mutex);
2581 }
2582
2583 static int ath9k_assign_vif_chanctx(struct ieee80211_hw *hw,
2584                                     struct ieee80211_vif *vif,
2585                                     struct ieee80211_chanctx_conf *conf)
2586 {
2587         struct ath_softc *sc = hw->priv;
2588         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2589         struct ath_vif *avp = (void *)vif->drv_priv;
2590         struct ath_chanctx *ctx = ath_chanctx_get(conf);
2591         int i;
2592
2593         ath9k_cancel_pending_offchannel(sc);
2594
2595         mutex_lock(&sc->mutex);
2596
2597         ath_dbg(common, CHAN_CTX,
2598                 "Assign VIF (addr: %pM, type: %d, p2p: %d) to channel context: %d MHz\n",
2599                 vif->addr, vif->type, vif->p2p,
2600                 conf->def.chan->center_freq);
2601
2602         avp->chanctx = ctx;
2603         ctx->nvifs_assigned++;
2604         list_add_tail(&avp->list, &ctx->vifs);
2605         ath9k_calculate_summary_state(sc, ctx);
2606         for (i = 0; i < IEEE80211_NUM_ACS; i++)
2607                 vif->hw_queue[i] = ctx->hw_queue_base + i;
2608
2609         mutex_unlock(&sc->mutex);
2610
2611         return 0;
2612 }
2613
2614 static void ath9k_unassign_vif_chanctx(struct ieee80211_hw *hw,
2615                                        struct ieee80211_vif *vif,
2616                                        struct ieee80211_chanctx_conf *conf)
2617 {
2618         struct ath_softc *sc = hw->priv;
2619         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2620         struct ath_vif *avp = (void *)vif->drv_priv;
2621         struct ath_chanctx *ctx = ath_chanctx_get(conf);
2622         int ac;
2623
2624         ath9k_cancel_pending_offchannel(sc);
2625
2626         mutex_lock(&sc->mutex);
2627
2628         ath_dbg(common, CHAN_CTX,
2629                 "Remove VIF (addr: %pM, type: %d, p2p: %d) from channel context: %d MHz\n",
2630                 vif->addr, vif->type, vif->p2p,
2631                 conf->def.chan->center_freq);
2632
2633         avp->chanctx = NULL;
2634         ctx->nvifs_assigned--;
2635         list_del(&avp->list);
2636         ath9k_calculate_summary_state(sc, ctx);
2637         for (ac = 0; ac < IEEE80211_NUM_ACS; ac++)
2638                 vif->hw_queue[ac] = IEEE80211_INVAL_HW_QUEUE;
2639
2640         mutex_unlock(&sc->mutex);
2641 }
2642
2643 static void ath9k_mgd_prepare_tx(struct ieee80211_hw *hw,
2644                                  struct ieee80211_vif *vif)
2645 {
2646         struct ath_softc *sc = hw->priv;
2647         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2648         struct ath_vif *avp = (struct ath_vif *) vif->drv_priv;
2649         struct ath_beacon_config *cur_conf;
2650         struct ath_chanctx *go_ctx;
2651         unsigned long timeout;
2652         bool changed = false;
2653         u32 beacon_int;
2654
2655         if (!test_bit(ATH_OP_MULTI_CHANNEL, &common->op_flags))
2656                 return;
2657
2658         if (!avp->chanctx)
2659                 return;
2660
2661         mutex_lock(&sc->mutex);
2662
2663         spin_lock_bh(&sc->chan_lock);
2664         if (sc->next_chan || (sc->cur_chan != avp->chanctx))
2665                 changed = true;
2666         spin_unlock_bh(&sc->chan_lock);
2667
2668         if (!changed)
2669                 goto out;
2670
2671         ath9k_cancel_pending_offchannel(sc);
2672
2673         go_ctx = ath_is_go_chanctx_present(sc);
2674
2675         if (go_ctx) {
2676                 /*
2677                  * Wait till the GO interface gets a chance
2678                  * to send out an NoA.
2679                  */
2680                 spin_lock_bh(&sc->chan_lock);
2681                 sc->sched.mgd_prepare_tx = true;
2682                 cur_conf = &go_ctx->beacon;
2683                 beacon_int = TU_TO_USEC(cur_conf->beacon_interval);
2684                 spin_unlock_bh(&sc->chan_lock);
2685
2686                 timeout = usecs_to_jiffies(beacon_int * 2);
2687                 init_completion(&sc->go_beacon);
2688
2689                 mutex_unlock(&sc->mutex);
2690
2691                 if (wait_for_completion_timeout(&sc->go_beacon,
2692                                                 timeout) == 0) {
2693                         ath_dbg(common, CHAN_CTX,
2694                                 "Failed to send new NoA\n");
2695
2696                         spin_lock_bh(&sc->chan_lock);
2697                         sc->sched.mgd_prepare_tx = false;
2698                         spin_unlock_bh(&sc->chan_lock);
2699                 }
2700
2701                 mutex_lock(&sc->mutex);
2702         }
2703
2704         ath_dbg(common, CHAN_CTX,
2705                 "%s: Set chanctx state to FORCE_ACTIVE for vif: %pM\n",
2706                 __func__, vif->addr);
2707
2708         spin_lock_bh(&sc->chan_lock);
2709         sc->next_chan = avp->chanctx;
2710         sc->sched.state = ATH_CHANCTX_STATE_FORCE_ACTIVE;
2711         spin_unlock_bh(&sc->chan_lock);
2712
2713         ath_chanctx_set_next(sc, true);
2714 out:
2715         mutex_unlock(&sc->mutex);
2716 }
2717
2718 void ath9k_fill_chanctx_ops(void)
2719 {
2720         if (!ath9k_is_chanctx_enabled())
2721                 return;
2722
2723         ath9k_ops.hw_scan                  = ath9k_hw_scan;
2724         ath9k_ops.cancel_hw_scan           = ath9k_cancel_hw_scan;
2725         ath9k_ops.remain_on_channel        = ath9k_remain_on_channel;
2726         ath9k_ops.cancel_remain_on_channel = ath9k_cancel_remain_on_channel;
2727         ath9k_ops.add_chanctx              = ath9k_add_chanctx;
2728         ath9k_ops.remove_chanctx           = ath9k_remove_chanctx;
2729         ath9k_ops.change_chanctx           = ath9k_change_chanctx;
2730         ath9k_ops.assign_vif_chanctx       = ath9k_assign_vif_chanctx;
2731         ath9k_ops.unassign_vif_chanctx     = ath9k_unassign_vif_chanctx;
2732         ath9k_ops.mgd_prepare_tx           = ath9k_mgd_prepare_tx;
2733 }
2734
2735 #endif
2736
2737 static int ath9k_get_txpower(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
2738                              int *dbm)
2739 {
2740         struct ath_softc *sc = hw->priv;
2741         struct ath_vif *avp = (void *)vif->drv_priv;
2742
2743         mutex_lock(&sc->mutex);
2744         if (avp->chanctx)
2745                 *dbm = avp->chanctx->cur_txpower;
2746         else
2747                 *dbm = sc->cur_chan->cur_txpower;
2748         mutex_unlock(&sc->mutex);
2749
2750         *dbm /= 2;
2751
2752         return 0;
2753 }
2754
2755 struct ieee80211_ops ath9k_ops = {
2756         .tx                 = ath9k_tx,
2757         .start              = ath9k_start,
2758         .stop               = ath9k_stop,
2759         .add_interface      = ath9k_add_interface,
2760         .change_interface   = ath9k_change_interface,
2761         .remove_interface   = ath9k_remove_interface,
2762         .config             = ath9k_config,
2763         .configure_filter   = ath9k_configure_filter,
2764         .sta_state          = ath9k_sta_state,
2765         .sta_notify         = ath9k_sta_notify,
2766         .conf_tx            = ath9k_conf_tx,
2767         .bss_info_changed   = ath9k_bss_info_changed,
2768         .set_key            = ath9k_set_key,
2769         .get_tsf            = ath9k_get_tsf,
2770         .set_tsf            = ath9k_set_tsf,
2771         .reset_tsf          = ath9k_reset_tsf,
2772         .ampdu_action       = ath9k_ampdu_action,
2773         .get_survey         = ath9k_get_survey,
2774         .rfkill_poll        = ath9k_rfkill_poll_state,
2775         .set_coverage_class = ath9k_set_coverage_class,
2776         .flush              = ath9k_flush,
2777         .tx_frames_pending  = ath9k_tx_frames_pending,
2778         .tx_last_beacon     = ath9k_tx_last_beacon,
2779         .release_buffered_frames = ath9k_release_buffered_frames,
2780         .get_stats          = ath9k_get_stats,
2781         .set_antenna        = ath9k_set_antenna,
2782         .get_antenna        = ath9k_get_antenna,
2783
2784 #ifdef CONFIG_ATH9K_WOW
2785         .suspend            = ath9k_suspend,
2786         .resume             = ath9k_resume,
2787         .set_wakeup         = ath9k_set_wakeup,
2788 #endif
2789
2790 #ifdef CONFIG_ATH9K_DEBUGFS
2791         .get_et_sset_count  = ath9k_get_et_sset_count,
2792         .get_et_stats       = ath9k_get_et_stats,
2793         .get_et_strings     = ath9k_get_et_strings,
2794 #endif
2795
2796 #if defined(CONFIG_MAC80211_DEBUGFS) && defined(CONFIG_ATH9K_STATION_STATISTICS)
2797         .sta_add_debugfs    = ath9k_sta_add_debugfs,
2798 #endif
2799         .sw_scan_start      = ath9k_sw_scan_start,
2800         .sw_scan_complete   = ath9k_sw_scan_complete,
2801         .get_txpower        = ath9k_get_txpower,
2802         .wake_tx_queue      = ath9k_wake_tx_queue,
2803 };