drivers/net/wireless/ath/ath9k/main.c

   1 /*
   2  * Copyright (c) 2008-2011 Atheros Communications Inc.
   3  *
   4  * Permission to use, copy, modify, and/or distribute this software for any
   5  * purpose with or without fee is hereby granted, provided that the above
   6  * copyright notice and this permission notice appear in all copies.
   7  *
   8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
   9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15  */
  16
  17 #include <linux/nl80211.h>
  18 #include <linux/delay.h>
  19 #include "ath9k.h"
  20 #include "btcoex.h"
  21
  22 u8 ath9k_parse_mpdudensity(u8 mpdudensity)
  23 {
  24         /*
  25          * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
  26          *   0 for no restriction
  27          *   1 for 1/4 us
  28          *   2 for 1/2 us
  29          *   3 for 1 us
  30          *   4 for 2 us
  31          *   5 for 4 us
  32          *   6 for 8 us
  33          *   7 for 16 us
  34          */
  35         switch (mpdudensity) {
  36         case 0:
  37                 return 0;
  38         case 1:
  39         case 2:
  40         case 3:
  41                 /* Our lower layer calculations limit our precision to
  42                    1 microsecond */
  43                 return 1;
  44         case 4:
  45                 return 2;
  46         case 5:
  47                 return 4;
  48         case 6:
  49                 return 8;
  50         case 7:
  51                 return 16;
  52         default:
  53                 return 0;
  54         }
  55 }
  56
  57 static bool ath9k_has_pending_frames(struct ath_softc *sc, struct ath_txq *txq,
  58                                      bool sw_pending)
  59 {
  60         bool pending = false;
  61
  62         spin_lock_bh(&txq->axq_lock);
  63
  64         if (txq->axq_depth) {
  65                 pending = true;
  66                 goto out;
  67         }
  68
  69         if (!sw_pending)
  70                 goto out;
  71
  72         if (txq->mac80211_qnum >= 0) {
  73                 struct ath_acq *acq;
  74
  75                 acq = &sc->cur_chan->acq[txq->mac80211_qnum];
  76                 if (!list_empty(&acq->acq_new) || !list_empty(&acq->acq_old))
  77                         pending = true;
  78         }
  79 out:
  80         spin_unlock_bh(&txq->axq_lock);
  81         return pending;
  82 }
  83
  84 static bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode)
  85 {
  86         unsigned long flags;
  87         bool ret;
  88
  89         spin_lock_irqsave(&sc->sc_pm_lock, flags);
  90         ret = ath9k_hw_setpower(sc->sc_ah, mode);
  91         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
  92
  93         return ret;
  94 }
  95
  96 void ath_ps_full_sleep(struct timer_list *t)
  97 {
  98         struct ath_softc *sc = from_timer(sc, t, sleep_timer);
  99         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 100         unsigned long flags;
 101         bool reset;
 102
 103         spin_lock_irqsave(&common->cc_lock, flags);
 104         ath_hw_cycle_counters_update(common);
 105         spin_unlock_irqrestore(&common->cc_lock, flags);
 106
 107         ath9k_hw_setrxabort(sc->sc_ah, 1);
 108         ath9k_hw_stopdmarecv(sc->sc_ah, &reset);
 109
 110         ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_FULL_SLEEP);
 111 }
 112
 113 void ath9k_ps_wakeup(struct ath_softc *sc)
 114 {
 115         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 116         unsigned long flags;
 117         enum ath9k_power_mode power_mode;
 118
 119         spin_lock_irqsave(&sc->sc_pm_lock, flags);
 120         if (++sc->ps_usecount != 1)
 121                 goto unlock;
 122
 123         del_timer_sync(&sc->sleep_timer);
 124         power_mode = sc->sc_ah->power_mode;
 125         ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
 126
 127         /*
 128          * While the hardware is asleep, the cycle counters contain no
 129          * useful data. Better clear them now so that they don't mess up
 130          * survey data results.
 131          */
 132         if (power_mode != ATH9K_PM_AWAKE) {
 133                 spin_lock(&common->cc_lock);
 134                 ath_hw_cycle_counters_update(common);
 135                 memset(&common->cc_survey, 0, sizeof(common->cc_survey));
 136                 memset(&common->cc_ani, 0, sizeof(common->cc_ani));
 137                 spin_unlock(&common->cc_lock);
 138         }
 139
 140  unlock:
 141         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 142 }
 143
 144 void ath9k_ps_restore(struct ath_softc *sc)
 145 {
 146         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 147         enum ath9k_power_mode mode;
 148         unsigned long flags;
 149
 150         spin_lock_irqsave(&sc->sc_pm_lock, flags);
 151         if (--sc->ps_usecount != 0)
 152                 goto unlock;
 153
 154         if (sc->ps_idle) {
 155                 mod_timer(&sc->sleep_timer, jiffies + HZ / 10);
 156                 goto unlock;
 157         }
 158
 159         if (sc->ps_enabled &&
 160                    !(sc->ps_flags & (PS_WAIT_FOR_BEACON |
 161                                      PS_WAIT_FOR_CAB |
 162                                      PS_WAIT_FOR_PSPOLL_DATA |
 163                                      PS_WAIT_FOR_TX_ACK |
 164                                      PS_WAIT_FOR_ANI))) {
 165                 mode = ATH9K_PM_NETWORK_SLEEP;
 166                 if (ath9k_hw_btcoex_is_enabled(sc->sc_ah))
 167                         ath9k_btcoex_stop_gen_timer(sc);
 168         } else {
 169                 goto unlock;
 170         }
 171
 172         spin_lock(&common->cc_lock);
 173         ath_hw_cycle_counters_update(common);
 174         spin_unlock(&common->cc_lock);
 175
 176         ath9k_hw_setpower(sc->sc_ah, mode);
 177
 178  unlock:
 179         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 180 }
 181
 182 static void __ath_cancel_work(struct ath_softc *sc)
 183 {
 184         cancel_work_sync(&sc->paprd_work);
 185         cancel_delayed_work_sync(&sc->hw_check_work);
 186         cancel_delayed_work_sync(&sc->hw_pll_work);
 187
 188 #ifdef CONFIG_ATH9K_BTCOEX_SUPPORT
 189         if (ath9k_hw_mci_is_enabled(sc->sc_ah))
 190                 cancel_work_sync(&sc->mci_work);
 191 #endif
 192 }
 193
 194 void ath_cancel_work(struct ath_softc *sc)
 195 {
 196         __ath_cancel_work(sc);
 197         cancel_work_sync(&sc->hw_reset_work);
 198 }
 199
 200 void ath_restart_work(struct ath_softc *sc)
 201 {
 202         ieee80211_queue_delayed_work(sc->hw, &sc->hw_check_work,
 203                                      ATH_HW_CHECK_POLL_INT);
 204
 205         if (AR_SREV_9340(sc->sc_ah) || AR_SREV_9330(sc->sc_ah))
 206                 ieee80211_queue_delayed_work(sc->hw, &sc->hw_pll_work,
 207                                      msecs_to_jiffies(ATH_PLL_WORK_INTERVAL));
 208
 209         ath_start_ani(sc);
 210 }
 211
 212 static bool ath_prepare_reset(struct ath_softc *sc)
 213 {
 214         struct ath_hw *ah = sc->sc_ah;
 215         bool ret = true;
 216
 217         ieee80211_stop_queues(sc->hw);
 218         ath_stop_ani(sc);
 219         ath9k_hw_disable_interrupts(ah);
 220
 221         if (AR_SREV_9300_20_OR_LATER(ah)) {
 222                 ret &= ath_stoprecv(sc);
 223                 ret &= ath_drain_all_txq(sc);
 224         } else {
 225                 ret &= ath_drain_all_txq(sc);
 226                 ret &= ath_stoprecv(sc);
 227         }
 228
 229         return ret;
 230 }
 231
 232 static bool ath_complete_reset(struct ath_softc *sc, bool start)
 233 {
 234         struct ath_hw *ah = sc->sc_ah;
 235         struct ath_common *common = ath9k_hw_common(ah);
 236         unsigned long flags;
 237
 238         ath9k_calculate_summary_state(sc, sc->cur_chan);
 239         ath_startrecv(sc);
 240         ath9k_cmn_update_txpow(ah, sc->cur_chan->cur_txpower,
 241                                sc->cur_chan->txpower,
 242                                &sc->cur_chan->cur_txpower);
 243         clear_bit(ATH_OP_HW_RESET, &common->op_flags);
 244
 245         if (!sc->cur_chan->offchannel && start) {
 246                 /* restore per chanctx TSF timer */
 247                 if (sc->cur_chan->tsf_val) {
 248                         u32 offset;
 249
 250                         offset = ath9k_hw_get_tsf_offset(&sc->cur_chan->tsf_ts,
 251                                                          NULL);
 252                         ath9k_hw_settsf64(ah, sc->cur_chan->tsf_val + offset);
 253                 }
 254
 255
 256                 if (!test_bit(ATH_OP_BEACONS, &common->op_flags))
 257                         goto work;
 258
 259                 if (ah->opmode == NL80211_IFTYPE_STATION &&
 260                     test_bit(ATH_OP_PRIM_STA_VIF, &common->op_flags)) {
 261                         spin_lock_irqsave(&sc->sc_pm_lock, flags);
 262                         sc->ps_flags |= PS_BEACON_SYNC | PS_WAIT_FOR_BEACON;
 263                         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 264                 } else {
 265                         ath9k_set_beacon(sc);
 266                 }
 267         work:
 268                 ath_restart_work(sc);
 269                 ath_txq_schedule_all(sc);
 270         }
 271
 272         sc->gtt_cnt = 0;
 273
 274         ath9k_hw_set_interrupts(ah);
 275         ath9k_hw_enable_interrupts(ah);
 276         ieee80211_wake_queues(sc->hw);
 277         ath9k_p2p_ps_timer(sc);
 278
 279         return true;
 280 }
 281
 282 static int ath_reset_internal(struct ath_softc *sc, struct ath9k_channel *hchan)
 283 {
 284         struct ath_hw *ah = sc->sc_ah;
 285         struct ath_common *common = ath9k_hw_common(ah);
 286         struct ath9k_hw_cal_data *caldata = NULL;
 287         bool fastcc = true;
 288         int r;
 289
 290         __ath_cancel_work(sc);
 291
 292         disable_irq(sc->irq);
 293         tasklet_disable(&sc->intr_tq);
 294         tasklet_disable(&sc->bcon_tasklet);
 295         spin_lock_bh(&sc->sc_pcu_lock);
 296
 297         if (!sc->cur_chan->offchannel) {
 298                 fastcc = false;
 299                 caldata = &sc->cur_chan->caldata;
 300         }
 301
 302         if (!hchan) {
 303                 fastcc = false;
 304                 hchan = ah->curchan;
 305         }
 306
 307         if (!hchan) {
 308                 fastcc = false;
 309                 hchan = ath9k_cmn_get_channel(sc->hw, ah, &sc->cur_chan->chandef);
 310         }
 311
 312         if (!ath_prepare_reset(sc))
 313                 fastcc = false;
 314
 315         if (ath9k_is_chanctx_enabled())
 316                 fastcc = false;
 317
 318         spin_lock_bh(&sc->chan_lock);
 319         sc->cur_chandef = sc->cur_chan->chandef;
 320         spin_unlock_bh(&sc->chan_lock);
 321
 322         ath_dbg(common, CONFIG, "Reset to %u MHz, HT40: %d fastcc: %d\n",
 323                 hchan->channel, IS_CHAN_HT40(hchan), fastcc);
 324
 325         r = ath9k_hw_reset(ah, hchan, caldata, fastcc);
 326         if (r) {
 327                 ath_err(common,
 328                         "Unable to reset channel, reset status %d\n", r);
 329
 330                 ath9k_hw_enable_interrupts(ah);
 331                 ath9k_queue_reset(sc, RESET_TYPE_BB_HANG);
 332
 333                 goto out;
 334         }
 335
 336         if (ath9k_hw_mci_is_enabled(sc->sc_ah) &&
 337             sc->cur_chan->offchannel)
 338                 ath9k_mci_set_txpower(sc, true, false);
 339
 340         if (!ath_complete_reset(sc, true))
 341                 r = -EIO;
 342
 343 out:
 344         enable_irq(sc->irq);
 345         spin_unlock_bh(&sc->sc_pcu_lock);
 346         tasklet_enable(&sc->bcon_tasklet);
 347         tasklet_enable(&sc->intr_tq);
 348
 349         return r;
 350 }
 351
 352 static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta,
 353                             struct ieee80211_vif *vif)
 354 {
 355         struct ath_node *an;
 356         an = (struct ath_node *)sta->drv_priv;
 357
 358         an->sc = sc;
 359         an->sta = sta;
 360         an->vif = vif;
 361         memset(&an->key_idx, 0, sizeof(an->key_idx));
 362
 363         ath_tx_node_init(sc, an);
 364
 365         ath_dynack_node_init(sc->sc_ah, an);
 366 }
 367
 368 static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta)
 369 {
 370         struct ath_node *an = (struct ath_node *)sta->drv_priv;
 371         ath_tx_node_cleanup(sc, an);
 372
 373         ath_dynack_node_deinit(sc->sc_ah, an);
 374 }
 375
 376 void ath9k_tasklet(unsigned long data)
 377 {
 378         struct ath_softc *sc = (struct ath_softc *)data;
 379         struct ath_hw *ah = sc->sc_ah;
 380         struct ath_common *common = ath9k_hw_common(ah);
 381         enum ath_reset_type type;
 382         unsigned long flags;
 383         u32 status;
 384         u32 rxmask;
 385
 386         spin_lock_irqsave(&sc->intr_lock, flags);
 387         status = sc->intrstatus;
 388         sc->intrstatus = 0;
 389         spin_unlock_irqrestore(&sc->intr_lock, flags);
 390
 391         ath9k_ps_wakeup(sc);
 392         spin_lock(&sc->sc_pcu_lock);
 393
 394         if (status & ATH9K_INT_FATAL) {
 395                 type = RESET_TYPE_FATAL_INT;
 396                 ath9k_queue_reset(sc, type);
 397                 ath_dbg(common, RESET, "FATAL: Skipping interrupts\n");
 398                 goto out;
 399         }
 400
 401         if ((ah->config.hw_hang_checks & HW_BB_WATCHDOG) &&
 402             (status & ATH9K_INT_BB_WATCHDOG)) {
 403                 spin_lock_irqsave(&common->cc_lock, flags);
 404                 ath_hw_cycle_counters_update(common);
 405                 ar9003_hw_bb_watchdog_dbg_info(ah);
 406                 spin_unlock_irqrestore(&common->cc_lock, flags);
 407
 408                 if (ar9003_hw_bb_watchdog_check(ah)) {
 409                         type = RESET_TYPE_BB_WATCHDOG;
 410                         ath9k_queue_reset(sc, type);
 411
 412                         ath_dbg(common, RESET,
 413                                 "BB_WATCHDOG: Skipping interrupts\n");
 414                         goto out;
 415                 }
 416         }
 417
 418         if (status & ATH9K_INT_GTT) {
 419                 sc->gtt_cnt++;
 420
 421                 if ((sc->gtt_cnt >= MAX_GTT_CNT) && !ath9k_hw_check_alive(ah)) {
 422                         type = RESET_TYPE_TX_GTT;
 423                         ath9k_queue_reset(sc, type);
 424                         ath_dbg(common, RESET,
 425                                 "GTT: Skipping interrupts\n");
 426                         goto out;
 427                 }
 428         }
 429
 430         spin_lock_irqsave(&sc->sc_pm_lock, flags);
 431         if ((status & ATH9K_INT_TSFOOR) && sc->ps_enabled) {
 432                 /*
 433                  * TSF sync does not look correct; remain awake to sync with
 434                  * the next Beacon.
 435                  */
 436                 ath_dbg(common, PS, "TSFOOR - Sync with next Beacon\n");
 437                 sc->ps_flags |= PS_WAIT_FOR_BEACON | PS_BEACON_SYNC;
 438         }
 439         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 440
 441         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
 442                 rxmask = (ATH9K_INT_RXHP | ATH9K_INT_RXLP | ATH9K_INT_RXEOL |
 443                           ATH9K_INT_RXORN);
 444         else
 445                 rxmask = (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
 446
 447         if (status & rxmask) {
 448                 /* Check for high priority Rx first */
 449                 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
 450                     (status & ATH9K_INT_RXHP))
 451                         ath_rx_tasklet(sc, 0, true);
 452
 453                 ath_rx_tasklet(sc, 0, false);
 454         }
 455
 456         if (status & ATH9K_INT_TX) {
 457                 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
 458                         /*
 459                          * For EDMA chips, TX completion is enabled for the
 460                          * beacon queue, so if a beacon has been transmitted
 461                          * successfully after a GTT interrupt, the GTT counter
 462                          * gets reset to zero here.
 463                          */
 464                         sc->gtt_cnt = 0;
 465
 466                         ath_tx_edma_tasklet(sc);
 467                 } else {
 468                         ath_tx_tasklet(sc);
 469                 }
 470
 471                 wake_up(&sc->tx_wait);
 472         }
 473
 474         if (status & ATH9K_INT_GENTIMER)
 475                 ath_gen_timer_isr(sc->sc_ah);
 476
 477         ath9k_btcoex_handle_interrupt(sc, status);
 478
 479         /* re-enable hardware interrupt */
 480         ath9k_hw_resume_interrupts(ah);
 481 out:
 482         spin_unlock(&sc->sc_pcu_lock);
 483         ath9k_ps_restore(sc);
 484 }
 485
 486 irqreturn_t ath_isr(int irq, void *dev)
 487 {
 488 #define SCHED_INTR (                            \
 489                 ATH9K_INT_FATAL |               \
 490                 ATH9K_INT_BB_WATCHDOG |         \
 491                 ATH9K_INT_RXORN |               \
 492                 ATH9K_INT_RXEOL |               \
 493                 ATH9K_INT_RX |                  \
 494                 ATH9K_INT_RXLP |                \
 495                 ATH9K_INT_RXHP |                \
 496                 ATH9K_INT_TX |                  \
 497                 ATH9K_INT_BMISS |               \
 498                 ATH9K_INT_CST |                 \
 499                 ATH9K_INT_GTT |                 \
 500                 ATH9K_INT_TSFOOR |              \
 501                 ATH9K_INT_GENTIMER |            \
 502                 ATH9K_INT_MCI)
 503
 504         struct ath_softc *sc = dev;
 505         struct ath_hw *ah = sc->sc_ah;
 506         struct ath_common *common = ath9k_hw_common(ah);
 507         enum ath9k_int status;
 508         u32 sync_cause = 0;
 509         bool sched = false;
 510
 511         /*
 512          * The hardware is not ready/present, don't
 513          * touch anything. Note this can happen early
 514          * on if the IRQ is shared.
 515          */
 516         if (!ah || test_bit(ATH_OP_INVALID, &common->op_flags))
 517                 return IRQ_NONE;
 518
 519         /* shared irq, not for us */
 520         if (!ath9k_hw_intrpend(ah))
 521                 return IRQ_NONE;
 522
 523         /*
 524          * Figure out the reason(s) for the interrupt.  Note
 525          * that the hal returns a pseudo-ISR that may include
 526          * bits we haven't explicitly enabled so we mask the
 527          * value to insure we only process bits we requested.
 528          */
 529         ath9k_hw_getisr(ah, &status, &sync_cause); /* NB: clears ISR too */
 530         ath9k_debug_sync_cause(sc, sync_cause);
 531         status &= ah->imask;    /* discard unasked-for bits */
 532
 533         if (test_bit(ATH_OP_HW_RESET, &common->op_flags)) {
 534                 ath9k_hw_kill_interrupts(sc->sc_ah);
 535                 return IRQ_HANDLED;
 536         }
 537
 538         /*
 539          * If there are no status bits set, then this interrupt was not
 540          * for me (should have been caught above).
 541          */
 542         if (!status)
 543                 return IRQ_NONE;
 544
 545         /* Cache the status */
 546         spin_lock(&sc->intr_lock);
 547         sc->intrstatus |= status;
 548         spin_unlock(&sc->intr_lock);
 549
 550         if (status & SCHED_INTR)
 551                 sched = true;
 552
 553         /*
 554          * If a FATAL interrupt is received, we have to reset the chip
 555          * immediately.
 556          */
 557         if (status & ATH9K_INT_FATAL)
 558                 goto chip_reset;
 559
 560         if ((ah->config.hw_hang_checks & HW_BB_WATCHDOG) &&
 561             (status & ATH9K_INT_BB_WATCHDOG))
 562                 goto chip_reset;
 563
 564         if (status & ATH9K_INT_SWBA)
 565                 tasklet_schedule(&sc->bcon_tasklet);
 566
 567         if (status & ATH9K_INT_TXURN)
 568                 ath9k_hw_updatetxtriglevel(ah, true);
 569
 570         if (status & ATH9K_INT_RXEOL) {
 571                 ah->imask &= ~(ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
 572                 ath9k_hw_set_interrupts(ah);
 573         }
 574
 575         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
 576                 if (status & ATH9K_INT_TIM_TIMER) {
 577                         if (ATH_DBG_WARN_ON_ONCE(sc->ps_idle))
 578                                 goto chip_reset;
 579                         /* Clear RxAbort bit so that we can
 580                          * receive frames */
 581                         ath9k_setpower(sc, ATH9K_PM_AWAKE);
 582                         spin_lock(&sc->sc_pm_lock);
 583                         ath9k_hw_setrxabort(sc->sc_ah, 0);
 584                         sc->ps_flags |= PS_WAIT_FOR_BEACON;
 585                         spin_unlock(&sc->sc_pm_lock);
 586                 }
 587
 588 chip_reset:
 589
 590         ath_debug_stat_interrupt(sc, status);
 591
 592         if (sched) {
 593                 /* turn off every interrupt */
 594                 ath9k_hw_kill_interrupts(ah);
 595                 tasklet_schedule(&sc->intr_tq);
 596         }
 597
 598         return IRQ_HANDLED;
 599
 600 #undef SCHED_INTR
 601 }
 602
 603 /*
 604  * This function is called when a HW reset cannot be deferred
 605  * and has to be immediate.
 606  */
 607 int ath_reset(struct ath_softc *sc, struct ath9k_channel *hchan)
 608 {
 609         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 610         int r;
 611
 612         ath9k_hw_kill_interrupts(sc->sc_ah);
 613         set_bit(ATH_OP_HW_RESET, &common->op_flags);
 614
 615         ath9k_ps_wakeup(sc);
 616         r = ath_reset_internal(sc, hchan);
 617         ath9k_ps_restore(sc);
 618
 619         return r;
 620 }
 621
 622 /*
 623  * When a HW reset can be deferred, it is added to the
 624  * hw_reset_work workqueue, but we set ATH_OP_HW_RESET before
 625  * queueing.
 626  */
 627 void ath9k_queue_reset(struct ath_softc *sc, enum ath_reset_type type)
 628 {
 629         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 630 #ifdef CONFIG_ATH9K_DEBUGFS
 631         RESET_STAT_INC(sc, type);
 632 #endif
 633         ath9k_hw_kill_interrupts(sc->sc_ah);
 634         set_bit(ATH_OP_HW_RESET, &common->op_flags);
 635         ieee80211_queue_work(sc->hw, &sc->hw_reset_work);
 636 }
 637
 638 void ath_reset_work(struct work_struct *work)
 639 {
 640         struct ath_softc *sc = container_of(work, struct ath_softc, hw_reset_work);
 641
 642         ath9k_ps_wakeup(sc);
 643         ath_reset_internal(sc, NULL);
 644         ath9k_ps_restore(sc);
 645 }
 646
 647 /**********************/
 648 /* mac80211 callbacks */
 649 /**********************/
 650
 651 static int ath9k_start(struct ieee80211_hw *hw)
 652 {
 653         struct ath_softc *sc = hw->priv;
 654         struct ath_hw *ah = sc->sc_ah;
 655         struct ath_common *common = ath9k_hw_common(ah);
 656         struct ieee80211_channel *curchan = sc->cur_chan->chandef.chan;
 657         struct ath_chanctx *ctx = sc->cur_chan;
 658         struct ath9k_channel *init_channel;
 659         int r;
 660
 661         ath_dbg(common, CONFIG,
 662                 "Starting driver with initial channel: %d MHz\n",
 663                 curchan->center_freq);
 664
 665         ath9k_ps_wakeup(sc);
 666         mutex_lock(&sc->mutex);
 667
 668         init_channel = ath9k_cmn_get_channel(hw, ah, &ctx->chandef);
 669         sc->cur_chandef = hw->conf.chandef;
 670
 671         /* Reset SERDES registers */
 672         ath9k_hw_configpcipowersave(ah, false);
 673
 674         /*
 675          * The basic interface to setting the hardware in a good
 676          * state is ``reset''.  On return the hardware is known to
 677          * be powered up and with interrupts disabled.  This must
 678          * be followed by initialization of the appropriate bits
 679          * and then setup of the interrupt mask.
 680          */
 681         spin_lock_bh(&sc->sc_pcu_lock);
 682
 683         atomic_set(&ah->intr_ref_cnt, -1);
 684
 685         r = ath9k_hw_reset(ah, init_channel, ah->caldata, false);
 686         if (r) {
 687                 ath_err(common,
 688                         "Unable to reset hardware; reset status %d (freq %u MHz)\n",
 689                         r, curchan->center_freq);
 690                 ah->reset_power_on = false;
 691         }
 692
 693         /* Setup our intr mask. */
 694         ah->imask = ATH9K_INT_TX | ATH9K_INT_RXEOL |
 695                     ATH9K_INT_RXORN | ATH9K_INT_FATAL |
 696                     ATH9K_INT_GLOBAL;
 697
 698         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
 699                 ah->imask |= ATH9K_INT_RXHP |
 700                              ATH9K_INT_RXLP;
 701         else
 702                 ah->imask |= ATH9K_INT_RX;
 703
 704         if (ah->config.hw_hang_checks & HW_BB_WATCHDOG)
 705                 ah->imask |= ATH9K_INT_BB_WATCHDOG;
 706
 707         /*
 708          * Enable GTT interrupts only for AR9003/AR9004 chips
 709          * for now.
 710          */
 711         if (AR_SREV_9300_20_OR_LATER(ah))
 712                 ah->imask |= ATH9K_INT_GTT;
 713
 714         if (ah->caps.hw_caps & ATH9K_HW_CAP_HT)
 715                 ah->imask |= ATH9K_INT_CST;
 716
 717         ath_mci_enable(sc);
 718
 719         clear_bit(ATH_OP_INVALID, &common->op_flags);
 720         sc->sc_ah->is_monitoring = false;
 721
 722         if (!ath_complete_reset(sc, false))
 723                 ah->reset_power_on = false;
 724
 725         if (ah->led_pin >= 0) {
 726                 ath9k_hw_set_gpio(ah, ah->led_pin,
 727                                   (ah->config.led_active_high) ? 1 : 0);
 728                 ath9k_hw_gpio_request_out(ah, ah->led_pin, NULL,
 729                                           AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
 730         }
 731
 732         /*
 733          * Reset key cache to sane defaults (all entries cleared) instead of
 734          * semi-random values after suspend/resume.
 735          */
 736         ath9k_cmn_init_crypto(sc->sc_ah);
 737
 738         ath9k_hw_reset_tsf(ah);
 739
 740         spin_unlock_bh(&sc->sc_pcu_lock);
 741
 742         ath9k_rng_start(sc);
 743
 744         mutex_unlock(&sc->mutex);
 745
 746         ath9k_ps_restore(sc);
 747
 748         return 0;
 749 }
 750
 751 static void ath9k_tx(struct ieee80211_hw *hw,
 752                      struct ieee80211_tx_control *control,
 753                      struct sk_buff *skb)
 754 {
 755         struct ath_softc *sc = hw->priv;
 756         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 757         struct ath_tx_control txctl;
 758         struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
 759         unsigned long flags;
 760
 761         if (sc->ps_enabled) {
 762                 /*
 763                  * mac80211 does not set PM field for normal data frames, so we
 764                  * need to update that based on the current PS mode.
 765                  */
 766                 if (ieee80211_is_data(hdr->frame_control) &&
 767                     !ieee80211_is_nullfunc(hdr->frame_control) &&
 768                     !ieee80211_has_pm(hdr->frame_control)) {
 769                         ath_dbg(common, PS,
 770                                 "Add PM=1 for a TX frame while in PS mode\n");
 771                         hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
 772                 }
 773         }
 774
 775         if (unlikely(sc->sc_ah->power_mode == ATH9K_PM_NETWORK_SLEEP)) {
 776                 /*
 777                  * We are using PS-Poll and mac80211 can request TX while in
 778                  * power save mode. Need to wake up hardware for the TX to be
 779                  * completed and if needed, also for RX of buffered frames.
 780                  */
 781                 ath9k_ps_wakeup(sc);
 782                 spin_lock_irqsave(&sc->sc_pm_lock, flags);
 783                 if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
 784                         ath9k_hw_setrxabort(sc->sc_ah, 0);
 785                 if (ieee80211_is_pspoll(hdr->frame_control)) {
 786                         ath_dbg(common, PS,
 787                                 "Sending PS-Poll to pick a buffered frame\n");
 788                         sc->ps_flags |= PS_WAIT_FOR_PSPOLL_DATA;
 789                 } else {
 790                         ath_dbg(common, PS, "Wake up to complete TX\n");
 791                         sc->ps_flags |= PS_WAIT_FOR_TX_ACK;
 792                 }
 793                 /*
 794                  * The actual restore operation will happen only after
 795                  * the ps_flags bit is cleared. We are just dropping
 796                  * the ps_usecount here.
 797                  */
 798                 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 799                 ath9k_ps_restore(sc);
 800         }
 801
 802         /*
 803          * Cannot tx while the hardware is in full sleep, it first needs a full
 804          * chip reset to recover from that
 805          */
 806         if (unlikely(sc->sc_ah->power_mode == ATH9K_PM_FULL_SLEEP)) {
 807                 ath_err(common, "TX while HW is in FULL_SLEEP mode\n");
 808                 goto exit;
 809         }
 810
 811         memset(&txctl, 0, sizeof(struct ath_tx_control));
 812         txctl.txq = sc->tx.txq_map[skb_get_queue_mapping(skb)];
 813         txctl.sta = control->sta;
 814
 815         ath_dbg(common, XMIT, "transmitting packet, skb: %p\n", skb);
 816
 817         if (ath_tx_start(hw, skb, &txctl) != 0) {
 818                 ath_dbg(common, XMIT, "TX failed\n");
 819                 TX_STAT_INC(txctl.txq->axq_qnum, txfailed);
 820                 goto exit;
 821         }
 822
 823         return;
 824 exit:
 825         ieee80211_free_txskb(hw, skb);
 826 }
 827
 828 static bool ath9k_txq_list_has_key(struct list_head *txq_list, u32 keyix)
 829 {
 830         struct ath_buf *bf;
 831         struct ieee80211_tx_info *txinfo;
 832         struct ath_frame_info *fi;
 833
 834         list_for_each_entry(bf, txq_list, list) {
 835                 if (bf->bf_state.stale || !bf->bf_mpdu)
 836                         continue;
 837
 838                 txinfo = IEEE80211_SKB_CB(bf->bf_mpdu);
 839                 fi = (struct ath_frame_info *)&txinfo->rate_driver_data[0];
 840                 if (fi->keyix == keyix)
 841                         return true;
 842         }
 843
 844         return false;
 845 }
 846
 847 static bool ath9k_txq_has_key(struct ath_softc *sc, u32 keyix)
 848 {
 849         struct ath_hw *ah = sc->sc_ah;
 850         int i;
 851         struct ath_txq *txq;
 852         bool key_in_use = false;
 853
 854         for (i = 0; !key_in_use && i < ATH9K_NUM_TX_QUEUES; i++) {
 855                 if (!ATH_TXQ_SETUP(sc, i))
 856                         continue;
 857                 txq = &sc->tx.txq[i];
 858                 if (!txq->axq_depth)
 859                         continue;
 860                 if (!ath9k_hw_numtxpending(ah, txq->axq_qnum))
 861                         continue;
 862
 863                 ath_txq_lock(sc, txq);
 864                 key_in_use = ath9k_txq_list_has_key(&txq->axq_q, keyix);
 865                 if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
 866                         int idx = txq->txq_tailidx;
 867
 868                         while (!key_in_use &&
 869                                !list_empty(&txq->txq_fifo[idx])) {
 870                                 key_in_use = ath9k_txq_list_has_key(
 871                                         &txq->txq_fifo[idx], keyix);
 872                                 INCR(idx, ATH_TXFIFO_DEPTH);
 873                         }
 874                 }
 875                 ath_txq_unlock(sc, txq);
 876         }
 877
 878         return key_in_use;
 879 }
 880
 881 static void ath9k_pending_key_del(struct ath_softc *sc, u8 keyix)
 882 {
 883         struct ath_hw *ah = sc->sc_ah;
 884         struct ath_common *common = ath9k_hw_common(ah);
 885
 886         if (!test_bit(keyix, ah->pending_del_keymap) ||
 887             ath9k_txq_has_key(sc, keyix))
 888                 return;
 889
 890         /* No more TXQ frames point to this key cache entry, so delete it. */
 891         clear_bit(keyix, ah->pending_del_keymap);
 892         ath_key_delete(common, keyix);
 893 }
 894
 895 static void ath9k_stop(struct ieee80211_hw *hw)
 896 {
 897         struct ath_softc *sc = hw->priv;
 898         struct ath_hw *ah = sc->sc_ah;
 899         struct ath_common *common = ath9k_hw_common(ah);
 900         bool prev_idle;
 901         int i;
 902
 903         ath9k_deinit_channel_context(sc);
 904
 905         mutex_lock(&sc->mutex);
 906
 907         ath9k_rng_stop(sc);
 908
 909         ath_cancel_work(sc);
 910
 911         if (test_bit(ATH_OP_INVALID, &common->op_flags)) {
 912                 ath_dbg(common, ANY, "Device not present\n");
 913                 mutex_unlock(&sc->mutex);
 914                 return;
 915         }
 916
 917         /* Ensure HW is awake when we try to shut it down. */
 918         ath9k_ps_wakeup(sc);
 919
 920         spin_lock_bh(&sc->sc_pcu_lock);
 921
 922         /* prevent tasklets to enable interrupts once we disable them */
 923         ah->imask &= ~ATH9K_INT_GLOBAL;
 924
 925         /* make sure h/w will not generate any interrupt
 926          * before setting the invalid flag. */
 927         ath9k_hw_disable_interrupts(ah);
 928
 929         spin_unlock_bh(&sc->sc_pcu_lock);
 930
 931         /* we can now sync irq and kill any running tasklets, since we already
 932          * disabled interrupts and not holding a spin lock */
 933         synchronize_irq(sc->irq);
 934         tasklet_kill(&sc->intr_tq);
 935         tasklet_kill(&sc->bcon_tasklet);
 936
 937         prev_idle = sc->ps_idle;
 938         sc->ps_idle = true;
 939
 940         spin_lock_bh(&sc->sc_pcu_lock);
 941
 942         if (ah->led_pin >= 0) {
 943                 ath9k_hw_set_gpio(ah, ah->led_pin,
 944                                   (ah->config.led_active_high) ? 0 : 1);
 945                 ath9k_hw_gpio_request_in(ah, ah->led_pin, NULL);
 946         }
 947
 948         ath_prepare_reset(sc);
 949
 950         if (sc->rx.frag) {
 951                 dev_kfree_skb_any(sc->rx.frag);
 952                 sc->rx.frag = NULL;
 953         }
 954
 955         if (!ah->curchan)
 956                 ah->curchan = ath9k_cmn_get_channel(hw, ah,
 957                                                     &sc->cur_chan->chandef);
 958
 959         ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
 960
 961         set_bit(ATH_OP_INVALID, &common->op_flags);
 962
 963         ath9k_hw_phy_disable(ah);
 964
 965         ath9k_hw_configpcipowersave(ah, true);
 966
 967         spin_unlock_bh(&sc->sc_pcu_lock);
 968
 969         for (i = 0; i < ATH_KEYMAX; i++)
 970                 ath9k_pending_key_del(sc, i);
 971
 972         /* Clear key cache entries explicitly to get rid of any potentially
 973          * remaining keys.
 974          */
 975         ath9k_cmn_init_crypto(sc->sc_ah);
 976
 977         ath9k_ps_restore(sc);
 978
 979         sc->ps_idle = prev_idle;
 980
 981         mutex_unlock(&sc->mutex);
 982
 983         ath_dbg(common, CONFIG, "Driver halt\n");
 984 }
 985
 986 static bool ath9k_uses_beacons(int type)
 987 {
 988         switch (type) {
 989         case NL80211_IFTYPE_AP:
 990         case NL80211_IFTYPE_ADHOC:
 991         case NL80211_IFTYPE_MESH_POINT:
 992                 return true;
 993         default:
 994                 return false;
 995         }
 996 }
 997
 998 static void ath9k_vif_iter_set_beacon(struct ath9k_vif_iter_data *iter_data,
 999                                       struct ieee80211_vif *vif)
1000 {
1001         /* Use the first (configured) interface, but prefering AP interfaces. */
1002         if (!iter_data->primary_beacon_vif) {
1003                 iter_data->primary_beacon_vif = vif;
1004         } else {
1005                 if (iter_data->primary_beacon_vif->type != NL80211_IFTYPE_AP &&
1006                     vif->type == NL80211_IFTYPE_AP)
1007                         iter_data->primary_beacon_vif = vif;
1008         }
1009
1010         iter_data->beacons = true;
1011         iter_data->nbcnvifs += 1;
1012 }
1013
1014 static void ath9k_vif_iter(struct ath9k_vif_iter_data *iter_data,
1015                            u8 *mac, struct ieee80211_vif *vif)
1016 {
1017         struct ath_vif *avp = (struct ath_vif *)vif->drv_priv;
1018         int i;
1019
1020         if (iter_data->has_hw_macaddr) {
1021                 for (i = 0; i < ETH_ALEN; i++)
1022                         iter_data->mask[i] &=
1023                                 ~(iter_data->hw_macaddr[i] ^ mac[i]);
1024         } else {
1025                 memcpy(iter_data->hw_macaddr, mac, ETH_ALEN);
1026                 iter_data->has_hw_macaddr = true;
1027         }
1028
1029         if (!vif->bss_conf.use_short_slot)
1030                 iter_data->slottime = 20;
1031
1032         switch (vif->type) {
1033         case NL80211_IFTYPE_AP:
1034                 iter_data->naps++;
1035                 if (vif->bss_conf.enable_beacon)
1036                         ath9k_vif_iter_set_beacon(iter_data, vif);
1037                 break;
1038         case NL80211_IFTYPE_STATION:
1039                 iter_data->nstations++;
1040                 if (avp->assoc && !iter_data->primary_sta)
1041                         iter_data->primary_sta = vif;
1042                 break;
1043         case NL80211_IFTYPE_OCB:
1044                 iter_data->nocbs++;
1045                 break;
1046         case NL80211_IFTYPE_ADHOC:
1047                 iter_data->nadhocs++;
1048                 if (vif->bss_conf.enable_beacon)
1049                         ath9k_vif_iter_set_beacon(iter_data, vif);
1050                 break;
1051         case NL80211_IFTYPE_MESH_POINT:
1052                 iter_data->nmeshes++;
1053                 if (vif->bss_conf.enable_beacon)
1054                         ath9k_vif_iter_set_beacon(iter_data, vif);
1055                 break;
1056         case NL80211_IFTYPE_WDS:
1057                 iter_data->nwds++;
1058                 break;
1059         default:
1060                 break;
1061         }
1062 }
1063
1064 static void ath9k_update_bssid_mask(struct ath_softc *sc,
1065                                     struct ath_chanctx *ctx,
1066                                     struct ath9k_vif_iter_data *iter_data)
1067 {
1068         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1069         struct ath_vif *avp;
1070         int i;
1071
1072         if (!ath9k_is_chanctx_enabled())
1073                 return;
1074
1075         list_for_each_entry(avp, &ctx->vifs, list) {
1076                 if (ctx->nvifs_assigned != 1)
1077                         continue;
1078
1079                 if (!iter_data->has_hw_macaddr)
1080                         continue;
1081
1082                 ether_addr_copy(common->curbssid, avp->bssid);
1083
1084                 /* perm_addr will be used as the p2p device address. */
1085                 for (i = 0; i < ETH_ALEN; i++)
1086                         iter_data->mask[i] &=
1087                                 ~(iter_data->hw_macaddr[i] ^
1088                                   sc->hw->wiphy->perm_addr[i]);
1089         }
1090 }
1091
1092 /* Called with sc->mutex held. */
1093 void ath9k_calculate_iter_data(struct ath_softc *sc,
1094                                struct ath_chanctx *ctx,
1095                                struct ath9k_vif_iter_data *iter_data)
1096 {
1097         struct ath_vif *avp;
1098
1099         /*
1100          * The hardware will use primary station addr together with the
1101          * BSSID mask when matching addresses.
1102          */
1103         memset(iter_data, 0, sizeof(*iter_data));
1104         eth_broadcast_addr(iter_data->mask);
1105         iter_data->slottime = 9;
1106
1107         list_for_each_entry(avp, &ctx->vifs, list)
1108                 ath9k_vif_iter(iter_data, avp->vif->addr, avp->vif);
1109
1110         ath9k_update_bssid_mask(sc, ctx, iter_data);
1111 }
1112
1113 static void ath9k_set_assoc_state(struct ath_softc *sc,
1114                                   struct ieee80211_vif *vif, bool changed)
1115 {
1116         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1117         struct ath_vif *avp = (struct ath_vif *)vif->drv_priv;
1118         unsigned long flags;
1119
1120         set_bit(ATH_OP_PRIM_STA_VIF, &common->op_flags);
1121
1122         ether_addr_copy(common->curbssid, avp->bssid);
1123         common->curaid = avp->aid;
1124         ath9k_hw_write_associd(sc->sc_ah);
1125
1126         if (changed) {
1127                 common->last_rssi = ATH_RSSI_DUMMY_MARKER;
1128                 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
1129
1130                 spin_lock_irqsave(&sc->sc_pm_lock, flags);
1131                 sc->ps_flags |= PS_BEACON_SYNC | PS_WAIT_FOR_BEACON;
1132                 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
1133         }
1134
1135         if (ath9k_hw_mci_is_enabled(sc->sc_ah))
1136                 ath9k_mci_update_wlan_channels(sc, false);
1137
1138         ath_dbg(common, CONFIG,
1139                 "Primary Station interface: %pM, BSSID: %pM\n",
1140                 vif->addr, common->curbssid);
1141 }
1142
1143 #ifdef CONFIG_ATH9K_CHANNEL_CONTEXT
1144 static void ath9k_set_offchannel_state(struct ath_softc *sc)
1145 {
1146         struct ath_hw *ah = sc->sc_ah;
1147         struct ath_common *common = ath9k_hw_common(ah);
1148         struct ieee80211_vif *vif = NULL;
1149
1150         ath9k_ps_wakeup(sc);
1151
1152         if (sc->offchannel.state < ATH_OFFCHANNEL_ROC_START)
1153                 vif = sc->offchannel.scan_vif;
1154         else
1155                 vif = sc->offchannel.roc_vif;
1156
1157         if (WARN_ON(!vif))
1158                 goto exit;
1159
1160         eth_zero_addr(common->curbssid);
1161         eth_broadcast_addr(common->bssidmask);
1162         memcpy(common->macaddr, vif->addr, ETH_ALEN);
1163         common->curaid = 0;
1164         ah->opmode = vif->type;
1165         ah->imask &= ~ATH9K_INT_SWBA;
1166         ah->imask &= ~ATH9K_INT_TSFOOR;
1167         ah->slottime = 9;
1168
1169         ath_hw_setbssidmask(common);
1170         ath9k_hw_setopmode(ah);
1171         ath9k_hw_write_associd(sc->sc_ah);
1172         ath9k_hw_set_interrupts(ah);
1173         ath9k_hw_init_global_settings(ah);
1174
1175 exit:
1176         ath9k_ps_restore(sc);
1177 }
1178 #endif
1179
1180 /* Called with sc->mutex held. */
1181 void ath9k_calculate_summary_state(struct ath_softc *sc,
1182                                    struct ath_chanctx *ctx)
1183 {
1184         struct ath_hw *ah = sc->sc_ah;
1185         struct ath_common *common = ath9k_hw_common(ah);
1186         struct ath9k_vif_iter_data iter_data;
1187
1188         ath_chanctx_check_active(sc, ctx);
1189
1190         if (ctx != sc->cur_chan)
1191                 return;
1192
1193 #ifdef CONFIG_ATH9K_CHANNEL_CONTEXT
1194         if (ctx == &sc->offchannel.chan)
1195                 return ath9k_set_offchannel_state(sc);
1196 #endif
1197
1198         ath9k_ps_wakeup(sc);
1199         ath9k_calculate_iter_data(sc, ctx, &iter_data);
1200
1201         if (iter_data.has_hw_macaddr)
1202                 memcpy(common->macaddr, iter_data.hw_macaddr, ETH_ALEN);
1203
1204         memcpy(common->bssidmask, iter_data.mask, ETH_ALEN);
1205         ath_hw_setbssidmask(common);
1206
1207         if (iter_data.naps > 0) {
1208                 ath9k_hw_set_tsfadjust(ah, true);
1209                 ah->opmode = NL80211_IFTYPE_AP;
1210         } else {
1211                 ath9k_hw_set_tsfadjust(ah, false);
1212                 if (iter_data.beacons)
1213                         ath9k_beacon_ensure_primary_slot(sc);
1214
1215                 if (iter_data.nmeshes)
1216                         ah->opmode = NL80211_IFTYPE_MESH_POINT;
1217                 else if (iter_data.nocbs)
1218                         ah->opmode = NL80211_IFTYPE_OCB;
1219                 else if (iter_data.nwds)
1220                         ah->opmode = NL80211_IFTYPE_AP;
1221                 else if (iter_data.nadhocs)
1222                         ah->opmode = NL80211_IFTYPE_ADHOC;
1223                 else
1224                         ah->opmode = NL80211_IFTYPE_STATION;
1225         }
1226
1227         ath9k_hw_setopmode(ah);
1228
1229         ctx->switch_after_beacon = false;
1230         if ((iter_data.nstations + iter_data.nadhocs + iter_data.nmeshes) > 0)
1231                 ah->imask |= ATH9K_INT_TSFOOR;
1232         else {
1233                 ah->imask &= ~ATH9K_INT_TSFOOR;
1234                 if (iter_data.naps == 1 && iter_data.beacons)
1235                         ctx->switch_after_beacon = true;
1236         }
1237
1238         if (ah->opmode == NL80211_IFTYPE_STATION) {
1239                 bool changed = (iter_data.primary_sta != ctx->primary_sta);
1240
1241                 if (iter_data.primary_sta) {
1242                         iter_data.primary_beacon_vif = iter_data.primary_sta;
1243                         iter_data.beacons = true;
1244                         ath9k_set_assoc_state(sc, iter_data.primary_sta,
1245                                               changed);
1246                         ctx->primary_sta = iter_data.primary_sta;
1247                 } else {
1248                         ctx->primary_sta = NULL;
1249                         eth_zero_addr(common->curbssid);
1250                         common->curaid = 0;
1251                         ath9k_hw_write_associd(sc->sc_ah);
1252                         if (ath9k_hw_mci_is_enabled(sc->sc_ah))
1253                                 ath9k_mci_update_wlan_channels(sc, true);
1254                 }
1255         }
1256         sc->nbcnvifs = iter_data.nbcnvifs;
1257         ath9k_beacon_config(sc, iter_data.primary_beacon_vif,
1258                             iter_data.beacons);
1259         ath9k_hw_set_interrupts(ah);
1260
1261         if (ah->slottime != iter_data.slottime) {
1262                 ah->slottime = iter_data.slottime;
1263                 ath9k_hw_init_global_settings(ah);
1264         }
1265
1266         if (iter_data.primary_sta)
1267                 set_bit(ATH_OP_PRIM_STA_VIF, &common->op_flags);
1268         else
1269                 clear_bit(ATH_OP_PRIM_STA_VIF, &common->op_flags);
1270
1271         ath_dbg(common, CONFIG,
1272                 "macaddr: %pM, bssid: %pM, bssidmask: %pM\n",
1273                 common->macaddr, common->curbssid, common->bssidmask);
1274
1275         ath9k_ps_restore(sc);
1276 }
1277
1278 static void ath9k_tpc_vif_iter(void *data, u8 *mac, struct ieee80211_vif *vif)
1279 {
1280         int *power = data;
1281
1282         if (*power < vif->bss_conf.txpower)
1283                 *power = vif->bss_conf.txpower;
1284 }
1285
1286 /* Called with sc->mutex held. */
1287 void ath9k_set_txpower(struct ath_softc *sc, struct ieee80211_vif *vif)
1288 {
1289         int power;
1290         struct ath_hw *ah = sc->sc_ah;
1291         struct ath_regulatory *reg = ath9k_hw_regulatory(ah);
1292
1293         ath9k_ps_wakeup(sc);
1294         if (ah->tpc_enabled) {
1295                 power = (vif) ? vif->bss_conf.txpower : -1;
1296                 ieee80211_iterate_active_interfaces_atomic(
1297                                 sc->hw, IEEE80211_IFACE_ITER_RESUME_ALL,
1298                                 ath9k_tpc_vif_iter, &power);
1299                 if (power == -1)
1300                         power = sc->hw->conf.power_level;
1301         } else {
1302                 power = sc->hw->conf.power_level;
1303         }
1304         sc->cur_chan->txpower = 2 * power;
1305         ath9k_hw_set_txpowerlimit(ah, sc->cur_chan->txpower, false);
1306         sc->cur_chan->cur_txpower = reg->max_power_level;
1307         ath9k_ps_restore(sc);
1308 }
1309
1310 static void ath9k_assign_hw_queues(struct ieee80211_hw *hw,
1311                                    struct ieee80211_vif *vif)
1312 {
1313         int i;
1314
1315         if (!ath9k_is_chanctx_enabled())
1316                 return;
1317
1318         for (i = 0; i < IEEE80211_NUM_ACS; i++)
1319                 vif->hw_queue[i] = i;
1320
1321         if (vif->type == NL80211_IFTYPE_AP ||
1322             vif->type == NL80211_IFTYPE_MESH_POINT)
1323                 vif->cab_queue = hw->queues - 2;
1324         else
1325                 vif->cab_queue = IEEE80211_INVAL_HW_QUEUE;
1326 }
1327
1328 static int ath9k_add_interface(struct ieee80211_hw *hw,
1329                                struct ieee80211_vif *vif)
1330 {
1331         struct ath_softc *sc = hw->priv;
1332         struct ath_hw *ah = sc->sc_ah;
1333         struct ath_common *common = ath9k_hw_common(ah);
1334         struct ath_vif *avp = (void *)vif->drv_priv;
1335         struct ath_node *an = &avp->mcast_node;
1336
1337         mutex_lock(&sc->mutex);
1338         if (IS_ENABLED(CONFIG_ATH9K_TX99)) {
1339                 if (sc->cur_chan->nvifs >= 1) {
1340                         mutex_unlock(&sc->mutex);
1341                         return -EOPNOTSUPP;
1342                 }
1343                 sc->tx99_vif = vif;
1344         }
1345
1346         ath_dbg(common, CONFIG, "Attach a VIF of type: %d\n", vif->type);
1347         sc->cur_chan->nvifs++;
1348
1349         if (vif->type == NL80211_IFTYPE_STATION && ath9k_is_chanctx_enabled())
1350                 vif->driver_flags |= IEEE80211_VIF_GET_NOA_UPDATE;
1351
1352         if (ath9k_uses_beacons(vif->type))
1353                 ath9k_beacon_assign_slot(sc, vif);
1354
1355         avp->vif = vif;
1356         if (!ath9k_is_chanctx_enabled()) {
1357                 avp->chanctx = sc->cur_chan;
1358                 list_add_tail(&avp->list, &avp->chanctx->vifs);
1359         }
1360
1361         ath9k_calculate_summary_state(sc, avp->chanctx);
1362
1363         ath9k_assign_hw_queues(hw, vif);
1364
1365         ath9k_set_txpower(sc, vif);
1366
1367         an->sc = sc;
1368         an->sta = NULL;
1369         an->vif = vif;
1370         an->no_ps_filter = true;
1371         ath_tx_node_init(sc, an);
1372
1373         mutex_unlock(&sc->mutex);
1374         return 0;
1375 }
1376
1377 static int ath9k_change_interface(struct ieee80211_hw *hw,
1378                                   struct ieee80211_vif *vif,
1379                                   enum nl80211_iftype new_type,
1380                                   bool p2p)
1381 {
1382         struct ath_softc *sc = hw->priv;
1383         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1384         struct ath_vif *avp = (void *)vif->drv_priv;
1385
1386         mutex_lock(&sc->mutex);
1387
1388         if (IS_ENABLED(CONFIG_ATH9K_TX99)) {
1389                 mutex_unlock(&sc->mutex);
1390                 return -EOPNOTSUPP;
1391         }
1392
1393         ath_dbg(common, CONFIG, "Change Interface\n");
1394
1395         if (ath9k_uses_beacons(vif->type))
1396                 ath9k_beacon_remove_slot(sc, vif);
1397
1398         vif->type = new_type;
1399         vif->p2p = p2p;
1400
1401         if (ath9k_uses_beacons(vif->type))
1402                 ath9k_beacon_assign_slot(sc, vif);
1403
1404         ath9k_assign_hw_queues(hw, vif);
1405         ath9k_calculate_summary_state(sc, avp->chanctx);
1406
1407         ath9k_set_txpower(sc, vif);
1408
1409         mutex_unlock(&sc->mutex);
1410         return 0;
1411 }
1412
1413 static void ath9k_remove_interface(struct ieee80211_hw *hw,
1414                                    struct ieee80211_vif *vif)
1415 {
1416         struct ath_softc *sc = hw->priv;
1417         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1418         struct ath_vif *avp = (void *)vif->drv_priv;
1419
1420         ath_dbg(common, CONFIG, "Detach Interface\n");
1421
1422         mutex_lock(&sc->mutex);
1423
1424         ath9k_p2p_remove_vif(sc, vif);
1425
1426         sc->cur_chan->nvifs--;
1427         sc->tx99_vif = NULL;
1428         if (!ath9k_is_chanctx_enabled())
1429                 list_del(&avp->list);
1430
1431         if (ath9k_uses_beacons(vif->type))
1432                 ath9k_beacon_remove_slot(sc, vif);
1433
1434         ath_tx_node_cleanup(sc, &avp->mcast_node);
1435
1436         ath9k_calculate_summary_state(sc, avp->chanctx);
1437
1438         ath9k_set_txpower(sc, NULL);
1439
1440         mutex_unlock(&sc->mutex);
1441 }
1442
1443 static void ath9k_enable_ps(struct ath_softc *sc)
1444 {
1445         struct ath_hw *ah = sc->sc_ah;
1446         struct ath_common *common = ath9k_hw_common(ah);
1447
1448         if (IS_ENABLED(CONFIG_ATH9K_TX99))
1449                 return;
1450
1451         sc->ps_enabled = true;
1452         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1453                 if ((ah->imask & ATH9K_INT_TIM_TIMER) == 0) {
1454                         ah->imask |= ATH9K_INT_TIM_TIMER;
1455                         ath9k_hw_set_interrupts(ah);
1456                 }
1457                 ath9k_hw_setrxabort(ah, 1);
1458         }
1459         ath_dbg(common, PS, "PowerSave enabled\n");
1460 }
1461
1462 static void ath9k_disable_ps(struct ath_softc *sc)
1463 {
1464         struct ath_hw *ah = sc->sc_ah;
1465         struct ath_common *common = ath9k_hw_common(ah);
1466
1467         if (IS_ENABLED(CONFIG_ATH9K_TX99))
1468                 return;
1469
1470         sc->ps_enabled = false;
1471         ath9k_hw_setpower(ah, ATH9K_PM_AWAKE);
1472         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1473                 ath9k_hw_setrxabort(ah, 0);
1474                 sc->ps_flags &= ~(PS_WAIT_FOR_BEACON |
1475                                   PS_WAIT_FOR_CAB |
1476                                   PS_WAIT_FOR_PSPOLL_DATA |
1477                                   PS_WAIT_FOR_TX_ACK);
1478                 if (ah->imask & ATH9K_INT_TIM_TIMER) {
1479                         ah->imask &= ~ATH9K_INT_TIM_TIMER;
1480                         ath9k_hw_set_interrupts(ah);
1481                 }
1482         }
1483         ath_dbg(common, PS, "PowerSave disabled\n");
1484 }
1485
1486 static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
1487 {
1488         struct ath_softc *sc = hw->priv;
1489         struct ath_hw *ah = sc->sc_ah;
1490         struct ath_common *common = ath9k_hw_common(ah);
1491         struct ieee80211_conf *conf = &hw->conf;
1492         struct ath_chanctx *ctx = sc->cur_chan;
1493
1494         ath9k_ps_wakeup(sc);
1495         mutex_lock(&sc->mutex);
1496
1497         if (changed & IEEE80211_CONF_CHANGE_IDLE) {
1498                 sc->ps_idle = !!(conf->flags & IEEE80211_CONF_IDLE);
1499                 if (sc->ps_idle) {
1500                         ath_cancel_work(sc);
1501                         ath9k_stop_btcoex(sc);
1502                 } else {
1503                         ath9k_start_btcoex(sc);
1504                         /*
1505                          * The chip needs a reset to properly wake up from
1506                          * full sleep
1507                          */
1508                         ath_chanctx_set_channel(sc, ctx, &ctx->chandef);
1509                 }
1510         }
1511
1512         /*
1513          * We just prepare to enable PS. We have to wait until our AP has
1514          * ACK'd our null data frame to disable RX otherwise we'll ignore
1515          * those ACKs and end up retransmitting the same null data frames.
1516          * IEEE80211_CONF_CHANGE_PS is only passed by mac80211 for STA mode.
1517          */
1518         if (changed & IEEE80211_CONF_CHANGE_PS) {
1519                 unsigned long flags;
1520                 spin_lock_irqsave(&sc->sc_pm_lock, flags);
1521                 if (conf->flags & IEEE80211_CONF_PS)
1522                         ath9k_enable_ps(sc);
1523                 else
1524                         ath9k_disable_ps(sc);
1525                 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
1526         }
1527
1528         if (changed & IEEE80211_CONF_CHANGE_MONITOR) {
1529                 if (conf->flags & IEEE80211_CONF_MONITOR) {
1530                         ath_dbg(common, CONFIG, "Monitor mode is enabled\n");
1531                         sc->sc_ah->is_monitoring = true;
1532                 } else {
1533                         ath_dbg(common, CONFIG, "Monitor mode is disabled\n");
1534                         sc->sc_ah->is_monitoring = false;
1535                 }
1536         }
1537
1538         if (!ath9k_is_chanctx_enabled() && (changed & IEEE80211_CONF_CHANGE_CHANNEL)) {
1539                 ctx->offchannel = !!(conf->flags & IEEE80211_CONF_OFFCHANNEL);
1540                 ath_chanctx_set_channel(sc, ctx, &hw->conf.chandef);
1541         }
1542
1543         if (changed & IEEE80211_CONF_CHANGE_POWER)
1544                 ath9k_set_txpower(sc, NULL);
1545
1546         mutex_unlock(&sc->mutex);
1547         ath9k_ps_restore(sc);
1548
1549         return 0;
1550 }
1551
1552 #define SUPPORTED_FILTERS                       \
1553         (FIF_ALLMULTI |                         \
1554         FIF_CONTROL |                           \
1555         FIF_PSPOLL |                            \
1556         FIF_OTHER_BSS |                         \
1557         FIF_BCN_PRBRESP_PROMISC |               \
1558         FIF_PROBE_REQ |                         \
1559         FIF_FCSFAIL)
1560
1561 /* FIXME: sc->sc_full_reset ? */
1562 static void ath9k_configure_filter(struct ieee80211_hw *hw,
1563                                    unsigned int changed_flags,
1564                                    unsigned int *total_flags,
1565                                    u64 multicast)
1566 {
1567         struct ath_softc *sc = hw->priv;
1568         struct ath_chanctx *ctx;
1569         u32 rfilt;
1570
1571         changed_flags &= SUPPORTED_FILTERS;
1572         *total_flags &= SUPPORTED_FILTERS;
1573
1574         spin_lock_bh(&sc->chan_lock);
1575         ath_for_each_chanctx(sc, ctx)
1576                 ctx->rxfilter = *total_flags;
1577 #ifdef CONFIG_ATH9K_CHANNEL_CONTEXT
1578         sc->offchannel.chan.rxfilter = *total_flags;
1579 #endif
1580         spin_unlock_bh(&sc->chan_lock);
1581
1582         ath9k_ps_wakeup(sc);
1583         rfilt = ath_calcrxfilter(sc);
1584         ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
1585         ath9k_ps_restore(sc);
1586
1587         ath_dbg(ath9k_hw_common(sc->sc_ah), CONFIG, "Set HW RX filter: 0x%x\n",
1588                 rfilt);
1589 }
1590
1591 static int ath9k_sta_add(struct ieee80211_hw *hw,
1592                          struct ieee80211_vif *vif,
1593                          struct ieee80211_sta *sta)
1594 {
1595         struct ath_softc *sc = hw->priv;
1596         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1597         struct ath_node *an = (struct ath_node *) sta->drv_priv;
1598         struct ieee80211_key_conf ps_key = { };
1599         int key;
1600
1601         ath_node_attach(sc, sta, vif);
1602
1603         if (vif->type != NL80211_IFTYPE_AP &&
1604             vif->type != NL80211_IFTYPE_AP_VLAN)
1605                 return 0;
1606
1607         key = ath_key_config(common, vif, sta, &ps_key);
1608         if (key > 0) {
1609                 an->ps_key = key;
1610                 an->key_idx[0] = key;
1611         }
1612
1613         return 0;
1614 }
1615
1616 static void ath9k_del_ps_key(struct ath_softc *sc,
1617                              struct ieee80211_vif *vif,
1618                              struct ieee80211_sta *sta)
1619 {
1620         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1621         struct ath_node *an = (struct ath_node *) sta->drv_priv;
1622
1623         if (!an->ps_key)
1624             return;
1625
1626         ath_key_delete(common, an->ps_key);
1627         an->ps_key = 0;
1628         an->key_idx[0] = 0;
1629 }
1630
1631 static int ath9k_sta_remove(struct ieee80211_hw *hw,
1632                             struct ieee80211_vif *vif,
1633                             struct ieee80211_sta *sta)
1634 {
1635         struct ath_softc *sc = hw->priv;
1636
1637         ath9k_del_ps_key(sc, vif, sta);
1638         ath_node_detach(sc, sta);
1639
1640         return 0;
1641 }
1642
1643 static int ath9k_sta_state(struct ieee80211_hw *hw,
1644                            struct ieee80211_vif *vif,
1645                            struct ieee80211_sta *sta,
1646                            enum ieee80211_sta_state old_state,
1647                            enum ieee80211_sta_state new_state)
1648 {
1649         struct ath_softc *sc = hw->priv;
1650         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1651         int ret = 0;
1652
1653         if (old_state == IEEE80211_STA_NOTEXIST &&
1654             new_state == IEEE80211_STA_NONE) {
1655                 ret = ath9k_sta_add(hw, vif, sta);
1656                 ath_dbg(common, CONFIG,
1657                         "Add station: %pM\n", sta->addr);
1658         } else if (old_state == IEEE80211_STA_NONE &&
1659                    new_state == IEEE80211_STA_NOTEXIST) {
1660                 ret = ath9k_sta_remove(hw, vif, sta);
1661                 ath_dbg(common, CONFIG,
1662                         "Remove station: %pM\n", sta->addr);
1663         }
1664
1665         if (ath9k_is_chanctx_enabled()) {
1666                 if (vif->type == NL80211_IFTYPE_STATION) {
1667                         if (old_state == IEEE80211_STA_ASSOC &&
1668                             new_state == IEEE80211_STA_AUTHORIZED)
1669                                 ath_chanctx_event(sc, vif,
1670                                                   ATH_CHANCTX_EVENT_AUTHORIZED);
1671                 }
1672         }
1673
1674         return ret;
1675 }
1676
1677 static void ath9k_sta_set_tx_filter(struct ath_hw *ah,
1678                                     struct ath_node *an,
1679                                     bool set)
1680 {
1681         int i;
1682
1683         for (i = 0; i < ARRAY_SIZE(an->key_idx); i++) {
1684                 if (!an->key_idx[i])
1685                         continue;
1686                 ath9k_hw_set_tx_filter(ah, an->key_idx[i], set);
1687         }
1688 }
1689
1690 static void ath9k_sta_notify(struct ieee80211_hw *hw,
1691                          struct ieee80211_vif *vif,
1692                          enum sta_notify_cmd cmd,
1693                          struct ieee80211_sta *sta)
1694 {
1695         struct ath_softc *sc = hw->priv;
1696         struct ath_node *an = (struct ath_node *) sta->drv_priv;
1697
1698         switch (cmd) {
1699         case STA_NOTIFY_SLEEP:
1700                 an->sleeping = true;
1701                 ath_tx_aggr_sleep(sta, sc, an);
1702                 ath9k_sta_set_tx_filter(sc->sc_ah, an, true);
1703                 break;
1704         case STA_NOTIFY_AWAKE:
1705                 ath9k_sta_set_tx_filter(sc->sc_ah, an, false);
1706                 an->sleeping = false;
1707                 ath_tx_aggr_wakeup(sc, an);
1708                 break;
1709         }
1710 }
1711
1712 static int ath9k_conf_tx(struct ieee80211_hw *hw,
1713                          struct ieee80211_vif *vif, u16 queue,
1714                          const struct ieee80211_tx_queue_params *params)
1715 {
1716         struct ath_softc *sc = hw->priv;
1717         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1718         struct ath_txq *txq;
1719         struct ath9k_tx_queue_info qi;
1720         int ret = 0;
1721
1722         if (queue >= IEEE80211_NUM_ACS)
1723                 return 0;
1724
1725         txq = sc->tx.txq_map[queue];
1726
1727         ath9k_ps_wakeup(sc);
1728         mutex_lock(&sc->mutex);
1729
1730         memset(&qi, 0, sizeof(struct ath9k_tx_queue_info));
1731
1732         qi.tqi_aifs = params->aifs;
1733         qi.tqi_cwmin = params->cw_min;
1734         qi.tqi_cwmax = params->cw_max;
1735         qi.tqi_burstTime = params->txop * 32;
1736
1737         ath_dbg(common, CONFIG,
1738                 "Configure tx [queue/halq] [%d/%d], aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
1739                 queue, txq->axq_qnum, params->aifs, params->cw_min,
1740                 params->cw_max, params->txop);
1741
1742         ath_update_max_aggr_framelen(sc, queue, qi.tqi_burstTime);
1743         ret = ath_txq_update(sc, txq->axq_qnum, &qi);
1744         if (ret)
1745                 ath_err(common, "TXQ Update failed\n");
1746
1747         mutex_unlock(&sc->mutex);
1748         ath9k_ps_restore(sc);
1749
1750         return ret;
1751 }
1752
1753 static int ath9k_set_key(struct ieee80211_hw *hw,
1754                          enum set_key_cmd cmd,
1755                          struct ieee80211_vif *vif,
1756                          struct ieee80211_sta *sta,
1757                          struct ieee80211_key_conf *key)
1758 {
1759         struct ath_softc *sc = hw->priv;
1760         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1761         struct ath_node *an = NULL;
1762         int ret = 0, i;
1763
1764         if (ath9k_modparam_nohwcrypt)
1765                 return -ENOSPC;
1766
1767         if ((vif->type == NL80211_IFTYPE_ADHOC ||
1768              vif->type == NL80211_IFTYPE_MESH_POINT) &&
1769             (key->cipher == WLAN_CIPHER_SUITE_TKIP ||
1770              key->cipher == WLAN_CIPHER_SUITE_CCMP) &&
1771             !(key->flags & IEEE80211_KEY_FLAG_PAIRWISE)) {
1772                 /*
1773                  * For now, disable hw crypto for the RSN IBSS group keys. This
1774                  * could be optimized in the future to use a modified key cache
1775                  * design to support per-STA RX GTK, but until that gets
1776                  * implemented, use of software crypto for group addressed
1777                  * frames is a acceptable to allow RSN IBSS to be used.
1778                  */
1779                 return -EOPNOTSUPP;
1780         }
1781
1782         mutex_lock(&sc->mutex);
1783         ath9k_ps_wakeup(sc);
1784         ath_dbg(common, CONFIG, "Set HW Key %d\n", cmd);
1785         if (sta)
1786                 an = (struct ath_node *)sta->drv_priv;
1787
1788         /* Delete pending key cache entries if no more frames are pointing to
1789          * them in TXQs.
1790          */
1791         for (i = 0; i < ATH_KEYMAX; i++)
1792                 ath9k_pending_key_del(sc, i);
1793
1794         switch (cmd) {
1795         case SET_KEY:
1796                 if (sta)
1797                         ath9k_del_ps_key(sc, vif, sta);
1798
1799                 key->hw_key_idx = 0;
1800                 ret = ath_key_config(common, vif, sta, key);
1801                 if (ret >= 0) {
1802                         key->hw_key_idx = ret;
1803                         /* push IV and Michael MIC generation to stack */
1804                         key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
1805                         if (key->cipher == WLAN_CIPHER_SUITE_TKIP)
1806                                 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
1807                         if (sc->sc_ah->sw_mgmt_crypto_tx &&
1808                             key->cipher == WLAN_CIPHER_SUITE_CCMP)
1809                                 key->flags |= IEEE80211_KEY_FLAG_SW_MGMT_TX;
1810                         ret = 0;
1811                 }
1812                 if (an && key->hw_key_idx) {
1813                         for (i = 0; i < ARRAY_SIZE(an->key_idx); i++) {
1814                                 if (an->key_idx[i])
1815                                         continue;
1816                                 an->key_idx[i] = key->hw_key_idx;
1817                                 break;
1818                         }
1819                         WARN_ON(i == ARRAY_SIZE(an->key_idx));
1820                 }
1821                 break;
1822         case DISABLE_KEY:
1823                 if (ath9k_txq_has_key(sc, key->hw_key_idx)) {
1824                         /* Delay key cache entry deletion until there are no
1825                          * remaining TXQ frames pointing to this entry.
1826                          */
1827                         set_bit(key->hw_key_idx, sc->sc_ah->pending_del_keymap);
1828                         ath_hw_keysetmac(common, key->hw_key_idx, NULL);
1829                 } else {
1830                         ath_key_delete(common, key->hw_key_idx);
1831                 }
1832                 if (an) {
1833                         for (i = 0; i < ARRAY_SIZE(an->key_idx); i++) {
1834                                 if (an->key_idx[i] != key->hw_key_idx)
1835                                         continue;
1836                                 an->key_idx[i] = 0;
1837                                 break;
1838                         }
1839                 }
1840                 key->hw_key_idx = 0;
1841                 break;
1842         default:
1843                 ret = -EINVAL;
1844         }
1845
1846         ath9k_ps_restore(sc);
1847         mutex_unlock(&sc->mutex);
1848
1849         return ret;
1850 }
1851
1852 static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
1853                                    struct ieee80211_vif *vif,
1854                                    struct ieee80211_bss_conf *bss_conf,
1855                                    u32 changed)
1856 {
1857 #define CHECK_ANI                               \
1858         (BSS_CHANGED_ASSOC |                    \
1859          BSS_CHANGED_IBSS |                     \
1860          BSS_CHANGED_BEACON_ENABLED)
1861
1862         struct ath_softc *sc = hw->priv;
1863         struct ath_hw *ah = sc->sc_ah;
1864         struct ath_common *common = ath9k_hw_common(ah);
1865         struct ath_vif *avp = (void *)vif->drv_priv;
1866         int slottime;
1867
1868         ath9k_ps_wakeup(sc);
1869         mutex_lock(&sc->mutex);
1870
1871         if (changed & BSS_CHANGED_ASSOC) {
1872                 ath_dbg(common, CONFIG, "BSSID %pM Changed ASSOC %d\n",
1873                         bss_conf->bssid, bss_conf->assoc);
1874
1875                 memcpy(avp->bssid, bss_conf->bssid, ETH_ALEN);
1876                 avp->aid = bss_conf->aid;
1877                 avp->assoc = bss_conf->assoc;
1878
1879                 ath9k_calculate_summary_state(sc, avp->chanctx);
1880         }
1881
1882         if ((changed & BSS_CHANGED_IBSS) ||
1883               (changed & BSS_CHANGED_OCB)) {
1884                 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
1885                 common->curaid = bss_conf->aid;
1886                 ath9k_hw_write_associd(sc->sc_ah);
1887         }
1888
1889         if ((changed & BSS_CHANGED_BEACON_ENABLED) ||
1890             (changed & BSS_CHANGED_BEACON_INT) ||
1891             (changed & BSS_CHANGED_BEACON_INFO)) {
1892                 ath9k_calculate_summary_state(sc, avp->chanctx);
1893         }
1894
1895         if ((avp->chanctx == sc->cur_chan) &&
1896             (changed & BSS_CHANGED_ERP_SLOT)) {
1897                 if (bss_conf->use_short_slot)
1898                         slottime = 9;
1899                 else
1900                         slottime = 20;
1901
1902                 if (vif->type == NL80211_IFTYPE_AP) {
1903                         /*
1904                          * Defer update, so that connected stations can adjust
1905                          * their settings at the same time.
1906                          * See beacon.c for more details
1907                          */
1908                         sc->beacon.slottime = slottime;
1909                         sc->beacon.updateslot = UPDATE;
1910                 } else {
1911                         ah->slottime = slottime;
1912                         ath9k_hw_init_global_settings(ah);
1913                 }
1914         }
1915
1916         if (changed & BSS_CHANGED_P2P_PS)
1917                 ath9k_p2p_bss_info_changed(sc, vif);
1918
1919         if (changed & CHECK_ANI)
1920                 ath_check_ani(sc);
1921
1922         if (changed & BSS_CHANGED_TXPOWER) {
1923                 ath_dbg(common, CONFIG, "vif %pM power %d dbm power_type %d\n",
1924                         vif->addr, bss_conf->txpower, bss_conf->txpower_type);
1925                 ath9k_set_txpower(sc, vif);
1926         }
1927
1928         mutex_unlock(&sc->mutex);
1929         ath9k_ps_restore(sc);
1930
1931 #undef CHECK_ANI
1932 }
1933
1934 static u64 ath9k_get_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
1935 {
1936         struct ath_softc *sc = hw->priv;
1937         struct ath_vif *avp = (void *)vif->drv_priv;
1938         u64 tsf;
1939
1940         mutex_lock(&sc->mutex);
1941         ath9k_ps_wakeup(sc);
1942         /* Get current TSF either from HW or kernel time. */
1943         if (sc->cur_chan == avp->chanctx) {
1944                 tsf = ath9k_hw_gettsf64(sc->sc_ah);
1945         } else {
1946                 tsf = sc->cur_chan->tsf_val +
1947                       ath9k_hw_get_tsf_offset(&sc->cur_chan->tsf_ts, NULL);
1948         }
1949         tsf += le64_to_cpu(avp->tsf_adjust);
1950         ath9k_ps_restore(sc);
1951         mutex_unlock(&sc->mutex);
1952
1953         return tsf;
1954 }
1955
1956 static void ath9k_set_tsf(struct ieee80211_hw *hw,
1957                           struct ieee80211_vif *vif,
1958                           u64 tsf)
1959 {
1960         struct ath_softc *sc = hw->priv;
1961         struct ath_vif *avp = (void *)vif->drv_priv;
1962
1963         mutex_lock(&sc->mutex);
1964         ath9k_ps_wakeup(sc);
1965         tsf -= le64_to_cpu(avp->tsf_adjust);
1966         ktime_get_raw_ts64(&avp->chanctx->tsf_ts);
1967         if (sc->cur_chan == avp->chanctx)
1968                 ath9k_hw_settsf64(sc->sc_ah, tsf);
1969         avp->chanctx->tsf_val = tsf;
1970         ath9k_ps_restore(sc);
1971         mutex_unlock(&sc->mutex);
1972 }
1973
1974 static void ath9k_reset_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
1975 {
1976         struct ath_softc *sc = hw->priv;
1977         struct ath_vif *avp = (void *)vif->drv_priv;
1978
1979         mutex_lock(&sc->mutex);
1980
1981         ath9k_ps_wakeup(sc);
1982         ktime_get_raw_ts64(&avp->chanctx->tsf_ts);
1983         if (sc->cur_chan == avp->chanctx)
1984                 ath9k_hw_reset_tsf(sc->sc_ah);
1985         avp->chanctx->tsf_val = 0;
1986         ath9k_ps_restore(sc);
1987
1988         mutex_unlock(&sc->mutex);
1989 }
1990
1991 static int ath9k_ampdu_action(struct ieee80211_hw *hw,
1992                               struct ieee80211_vif *vif,
1993                               struct ieee80211_ampdu_params *params)
1994 {
1995         struct ath_softc *sc = hw->priv;
1996         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1997         bool flush = false;
1998         int ret = 0;
1999         struct ieee80211_sta *sta = params->sta;
2000         struct ath_node *an = (struct ath_node *)sta->drv_priv;
2001         enum ieee80211_ampdu_mlme_action action = params->action;
2002         u16 tid = params->tid;
2003         u16 *ssn = &params->ssn;
2004         struct ath_atx_tid *atid;
2005
2006         mutex_lock(&sc->mutex);
2007
2008         switch (action) {
2009         case IEEE80211_AMPDU_RX_START:
2010                 break;
2011         case IEEE80211_AMPDU_RX_STOP:
2012                 break;
2013         case IEEE80211_AMPDU_TX_START:
2014                 if (ath9k_is_chanctx_enabled()) {
2015                         if (test_bit(ATH_OP_SCANNING, &common->op_flags)) {
2016                                 ret = -EBUSY;
2017                                 break;
2018                         }
2019                 }
2020                 ath9k_ps_wakeup(sc);
2021                 ret = ath_tx_aggr_start(sc, sta, tid, ssn);
2022                 if (!ret)
2023                         ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
2024                 ath9k_ps_restore(sc);
2025                 break;
2026         case IEEE80211_AMPDU_TX_STOP_FLUSH:
2027         case IEEE80211_AMPDU_TX_STOP_FLUSH_CONT:
2028                 flush = true;
2029                 /* fall through */
2030         case IEEE80211_AMPDU_TX_STOP_CONT:
2031                 ath9k_ps_wakeup(sc);
2032                 ath_tx_aggr_stop(sc, sta, tid);
2033                 if (!flush)
2034                         ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
2035                 ath9k_ps_restore(sc);
2036                 break;
2037         case IEEE80211_AMPDU_TX_OPERATIONAL:
2038                 atid = ath_node_to_tid(an, tid);
2039                 atid->baw_size = IEEE80211_MIN_AMPDU_BUF <<
2040                                 sta->ht_cap.ampdu_factor;
2041                 break;
2042         default:
2043                 ath_err(ath9k_hw_common(sc->sc_ah), "Unknown AMPDU action\n");
2044         }
2045
2046         mutex_unlock(&sc->mutex);
2047
2048         return ret;
2049 }
2050
2051 static int ath9k_get_survey(struct ieee80211_hw *hw, int idx,
2052                              struct survey_info *survey)
2053 {
2054         struct ath_softc *sc = hw->priv;
2055         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2056         struct ieee80211_supported_band *sband;
2057         struct ieee80211_channel *chan;
2058         unsigned long flags;
2059         int pos;
2060
2061         if (IS_ENABLED(CONFIG_ATH9K_TX99))
2062                 return -EOPNOTSUPP;
2063
2064         spin_lock_irqsave(&common->cc_lock, flags);
2065         if (idx == 0)
2066                 ath_update_survey_stats(sc);
2067
2068         sband = hw->wiphy->bands[NL80211_BAND_2GHZ];
2069         if (sband && idx >= sband->n_channels) {
2070                 idx -= sband->n_channels;
2071                 sband = NULL;
2072         }
2073
2074         if (!sband)
2075                 sband = hw->wiphy->bands[NL80211_BAND_5GHZ];
2076
2077         if (!sband || idx >= sband->n_channels) {
2078                 spin_unlock_irqrestore(&common->cc_lock, flags);
2079                 return -ENOENT;
2080         }
2081
2082         chan = &sband->channels[idx];
2083         pos = chan->hw_value;
2084         memcpy(survey, &sc->survey[pos], sizeof(*survey));
2085         survey->channel = chan;
2086         spin_unlock_irqrestore(&common->cc_lock, flags);
2087
2088         return 0;
2089 }
2090
2091 static void ath9k_enable_dynack(struct ath_softc *sc)
2092 {
2093 #ifdef CONFIG_ATH9K_DYNACK
2094         u32 rfilt;
2095         struct ath_hw *ah = sc->sc_ah;
2096
2097         ath_dynack_reset(ah);
2098
2099         ah->dynack.enabled = true;
2100         rfilt = ath_calcrxfilter(sc);
2101         ath9k_hw_setrxfilter(ah, rfilt);
2102 #endif
2103 }
2104
2105 static void ath9k_set_coverage_class(struct ieee80211_hw *hw,
2106                                      s16 coverage_class)
2107 {
2108         struct ath_softc *sc = hw->priv;
2109         struct ath_hw *ah = sc->sc_ah;
2110
2111         if (IS_ENABLED(CONFIG_ATH9K_TX99))
2112                 return;
2113
2114         mutex_lock(&sc->mutex);
2115
2116         if (coverage_class >= 0) {
2117                 ah->coverage_class = coverage_class;
2118                 if (ah->dynack.enabled) {
2119                         u32 rfilt;
2120
2121                         ah->dynack.enabled = false;
2122                         rfilt = ath_calcrxfilter(sc);
2123                         ath9k_hw_setrxfilter(ah, rfilt);
2124                 }
2125                 ath9k_ps_wakeup(sc);
2126                 ath9k_hw_init_global_settings(ah);
2127                 ath9k_ps_restore(sc);
2128         } else if (!ah->dynack.enabled) {
2129                 ath9k_enable_dynack(sc);
2130         }
2131
2132         mutex_unlock(&sc->mutex);
2133 }
2134
2135 static bool ath9k_has_tx_pending(struct ath_softc *sc,
2136                                  bool sw_pending)
2137 {
2138         int i, npend = 0;
2139
2140         for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
2141                 if (!ATH_TXQ_SETUP(sc, i))
2142                         continue;
2143
2144                 npend = ath9k_has_pending_frames(sc, &sc->tx.txq[i],
2145                                                  sw_pending);
2146                 if (npend)
2147                         break;
2148         }
2149
2150         return !!npend;
2151 }
2152
2153 static void ath9k_flush(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
2154                         u32 queues, bool drop)
2155 {
2156         struct ath_softc *sc = hw->priv;
2157         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2158
2159         if (ath9k_is_chanctx_enabled()) {
2160                 if (!test_bit(ATH_OP_MULTI_CHANNEL, &common->op_flags))
2161                         goto flush;
2162
2163                 /*
2164                  * If MCC is active, extend the flush timeout
2165                  * and wait for the HW/SW queues to become
2166                  * empty. This needs to be done outside the
2167                  * sc->mutex lock to allow the channel scheduler
2168                  * to switch channel contexts.
2169                  *
2170                  * The vif queues have been stopped in mac80211,
2171                  * so there won't be any incoming frames.
2172                  */
2173                 __ath9k_flush(hw, queues, drop, true, true);
2174                 return;
2175         }
2176 flush:
2177         mutex_lock(&sc->mutex);
2178         __ath9k_flush(hw, queues, drop, true, false);
2179         mutex_unlock(&sc->mutex);
2180 }
2181
2182 void __ath9k_flush(struct ieee80211_hw *hw, u32 queues, bool drop,
2183                    bool sw_pending, bool timeout_override)
2184 {
2185         struct ath_softc *sc = hw->priv;
2186         struct ath_hw *ah = sc->sc_ah;
2187         struct ath_common *common = ath9k_hw_common(ah);
2188         int timeout;
2189         bool drain_txq;
2190
2191         cancel_delayed_work_sync(&sc->hw_check_work);
2192
2193         if (ah->ah_flags & AH_UNPLUGGED) {
2194                 ath_dbg(common, ANY, "Device has been unplugged!\n");
2195                 return;
2196         }
2197
2198         if (test_bit(ATH_OP_INVALID, &common->op_flags)) {
2199                 ath_dbg(common, ANY, "Device not present\n");
2200                 return;
2201         }
2202
2203         spin_lock_bh(&sc->chan_lock);
2204         if (timeout_override)
2205                 timeout = HZ / 5;
2206         else
2207                 timeout = sc->cur_chan->flush_timeout;
2208         spin_unlock_bh(&sc->chan_lock);
2209
2210         ath_dbg(common, CHAN_CTX,
2211                 "Flush timeout: %d\n", jiffies_to_msecs(timeout));
2212
2213         if (wait_event_timeout(sc->tx_wait, !ath9k_has_tx_pending(sc, sw_pending),
2214                                timeout) > 0)
2215                 drop = false;
2216
2217         if (drop) {
2218                 ath9k_ps_wakeup(sc);
2219                 spin_lock_bh(&sc->sc_pcu_lock);
2220                 drain_txq = ath_drain_all_txq(sc);
2221                 spin_unlock_bh(&sc->sc_pcu_lock);
2222
2223                 if (!drain_txq)
2224                         ath_reset(sc, NULL);
2225
2226                 ath9k_ps_restore(sc);
2227         }
2228
2229         ieee80211_queue_delayed_work(hw, &sc->hw_check_work,
2230                                      ATH_HW_CHECK_POLL_INT);
2231 }
2232
2233 static bool ath9k_tx_frames_pending(struct ieee80211_hw *hw)
2234 {
2235         struct ath_softc *sc = hw->priv;
2236
2237         return ath9k_has_tx_pending(sc, true);
2238 }
2239
2240 static int ath9k_tx_last_beacon(struct ieee80211_hw *hw)
2241 {
2242         struct ath_softc *sc = hw->priv;
2243         struct ath_hw *ah = sc->sc_ah;
2244         struct ieee80211_vif *vif;
2245         struct ath_vif *avp;
2246         struct ath_buf *bf;
2247         struct ath_tx_status ts;
2248         bool edma = !!(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA);
2249         int status;
2250
2251         vif = sc->beacon.bslot[0];
2252         if (!vif)
2253                 return 0;
2254
2255         if (!vif->bss_conf.enable_beacon)
2256                 return 0;
2257
2258         avp = (void *)vif->drv_priv;
2259
2260         if (!sc->beacon.tx_processed && !edma) {
2261                 tasklet_disable(&sc->bcon_tasklet);
2262
2263                 bf = avp->av_bcbuf;
2264                 if (!bf || !bf->bf_mpdu)
2265                         goto skip;
2266
2267                 status = ath9k_hw_txprocdesc(ah, bf->bf_desc, &ts);
2268                 if (status == -EINPROGRESS)
2269                         goto skip;
2270
2271                 sc->beacon.tx_processed = true;
2272                 sc->beacon.tx_last = !(ts.ts_status & ATH9K_TXERR_MASK);
2273
2274 skip:
2275                 tasklet_enable(&sc->bcon_tasklet);
2276         }
2277
2278         return sc->beacon.tx_last;
2279 }
2280
2281 static int ath9k_get_stats(struct ieee80211_hw *hw,
2282                            struct ieee80211_low_level_stats *stats)
2283 {
2284         struct ath_softc *sc = hw->priv;
2285         struct ath_hw *ah = sc->sc_ah;
2286         struct ath9k_mib_stats *mib_stats = &ah->ah_mibStats;
2287
2288         stats->dot11ACKFailureCount = mib_stats->ackrcv_bad;
2289         stats->dot11RTSFailureCount = mib_stats->rts_bad;
2290         stats->dot11FCSErrorCount = mib_stats->fcs_bad;
2291         stats->dot11RTSSuccessCount = mib_stats->rts_good;
2292         return 0;
2293 }
2294
2295 static u32 fill_chainmask(u32 cap, u32 new)
2296 {
2297         u32 filled = 0;
2298         int i;
2299
2300         for (i = 0; cap && new; i++, cap >>= 1) {
2301                 if (!(cap & BIT(0)))
2302                         continue;
2303
2304                 if (new & BIT(0))
2305                         filled |= BIT(i);
2306
2307                 new >>= 1;
2308         }
2309
2310         return filled;
2311 }
2312
2313 static bool validate_antenna_mask(struct ath_hw *ah, u32 val)
2314 {
2315         if (AR_SREV_9300_20_OR_LATER(ah))
2316                 return true;
2317
2318         switch (val & 0x7) {
2319         case 0x1:
2320         case 0x3:
2321         case 0x7:
2322                 return true;
2323         case 0x2:
2324                 return (ah->caps.rx_chainmask == 1);
2325         default:
2326                 return false;
2327         }
2328 }
2329
2330 static int ath9k_set_antenna(struct ieee80211_hw *hw, u32 tx_ant, u32 rx_ant)
2331 {
2332         struct ath_softc *sc = hw->priv;
2333         struct ath_hw *ah = sc->sc_ah;
2334
2335         if (ah->caps.rx_chainmask != 1)
2336                 rx_ant |= tx_ant;
2337
2338         if (!validate_antenna_mask(ah, rx_ant) || !tx_ant)
2339                 return -EINVAL;
2340
2341         sc->ant_rx = rx_ant;
2342         sc->ant_tx = tx_ant;
2343
2344         if (ah->caps.rx_chainmask == 1)
2345                 return 0;
2346
2347         /* AR9100 runs into calibration issues if not all rx chains are enabled */
2348         if (AR_SREV_9100(ah))
2349                 ah->rxchainmask = 0x7;
2350         else
2351                 ah->rxchainmask = fill_chainmask(ah->caps.rx_chainmask, rx_ant);
2352
2353         ah->txchainmask = fill_chainmask(ah->caps.tx_chainmask, tx_ant);
2354         ath9k_cmn_reload_chainmask(ah);
2355
2356         return 0;
2357 }
2358
2359 static int ath9k_get_antenna(struct ieee80211_hw *hw, u32 *tx_ant, u32 *rx_ant)
2360 {
2361         struct ath_softc *sc = hw->priv;
2362
2363         *tx_ant = sc->ant_tx;
2364         *rx_ant = sc->ant_rx;
2365         return 0;
2366 }
2367
2368 static void ath9k_sw_scan_start(struct ieee80211_hw *hw,
2369                                 struct ieee80211_vif *vif,
2370                                 const u8 *mac_addr)
2371 {
2372         struct ath_softc *sc = hw->priv;
2373         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2374         set_bit(ATH_OP_SCANNING, &common->op_flags);
2375 }
2376
2377 static void ath9k_sw_scan_complete(struct ieee80211_hw *hw,
2378                                    struct ieee80211_vif *vif)
2379 {
2380         struct ath_softc *sc = hw->priv;
2381         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2382         clear_bit(ATH_OP_SCANNING, &common->op_flags);
2383 }
2384
2385 #ifdef CONFIG_ATH9K_CHANNEL_CONTEXT
2386
2387 static void ath9k_cancel_pending_offchannel(struct ath_softc *sc)
2388 {
2389         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2390
2391         if (sc->offchannel.roc_vif) {
2392                 ath_dbg(common, CHAN_CTX,
2393                         "%s: Aborting RoC\n", __func__);
2394
2395                 del_timer_sync(&sc->offchannel.timer);
2396                 if (sc->offchannel.state >= ATH_OFFCHANNEL_ROC_START)
2397                         ath_roc_complete(sc, ATH_ROC_COMPLETE_ABORT);
2398         }
2399
2400         if (test_bit(ATH_OP_SCANNING, &common->op_flags)) {
2401                 ath_dbg(common, CHAN_CTX,
2402                         "%s: Aborting HW scan\n", __func__);
2403
2404                 del_timer_sync(&sc->offchannel.timer);
2405                 ath_scan_complete(sc, true);
2406         }
2407 }
2408
2409 static int ath9k_hw_scan(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
2410                          struct ieee80211_scan_request *hw_req)
2411 {
2412         struct cfg80211_scan_request *req = &hw_req->req;
2413         struct ath_softc *sc = hw->priv;
2414         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2415         int ret = 0;
2416
2417         mutex_lock(&sc->mutex);
2418
2419         if (WARN_ON(sc->offchannel.scan_req)) {
2420                 ret = -EBUSY;
2421                 goto out;
2422         }
2423
2424         ath9k_ps_wakeup(sc);
2425         set_bit(ATH_OP_SCANNING, &common->op_flags);
2426         sc->offchannel.scan_vif = vif;
2427         sc->offchannel.scan_req = req;
2428         sc->offchannel.scan_idx = 0;
2429
2430         ath_dbg(common, CHAN_CTX, "HW scan request received on vif: %pM\n",
2431                 vif->addr);
2432
2433         if (sc->offchannel.state == ATH_OFFCHANNEL_IDLE) {
2434                 ath_dbg(common, CHAN_CTX, "Starting HW scan\n");
2435                 ath_offchannel_next(sc);
2436         }
2437
2438 out:
2439         mutex_unlock(&sc->mutex);
2440
2441         return ret;
2442 }
2443
2444 static void ath9k_cancel_hw_scan(struct ieee80211_hw *hw,
2445                                  struct ieee80211_vif *vif)
2446 {
2447         struct ath_softc *sc = hw->priv;
2448         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2449
2450         ath_dbg(common, CHAN_CTX, "Cancel HW scan on vif: %pM\n", vif->addr);
2451
2452         mutex_lock(&sc->mutex);
2453         del_timer_sync(&sc->offchannel.timer);
2454         ath_scan_complete(sc, true);
2455         mutex_unlock(&sc->mutex);
2456 }
2457
2458 static int ath9k_remain_on_channel(struct ieee80211_hw *hw,
2459                                    struct ieee80211_vif *vif,
2460                                    struct ieee80211_channel *chan, int duration,
2461                                    enum ieee80211_roc_type type)
2462 {
2463         struct ath_softc *sc = hw->priv;
2464         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2465         int ret = 0;
2466
2467         mutex_lock(&sc->mutex);
2468
2469         if (WARN_ON(sc->offchannel.roc_vif)) {
2470                 ret = -EBUSY;
2471                 goto out;
2472         }
2473
2474         ath9k_ps_wakeup(sc);
2475         sc->offchannel.roc_vif = vif;
2476         sc->offchannel.roc_chan = chan;
2477         sc->offchannel.roc_duration = duration;
2478
2479         ath_dbg(common, CHAN_CTX,
2480                 "RoC request on vif: %pM, type: %d duration: %d\n",
2481                 vif->addr, type, duration);
2482
2483         if (sc->offchannel.state == ATH_OFFCHANNEL_IDLE) {
2484                 ath_dbg(common, CHAN_CTX, "Starting RoC period\n");
2485                 ath_offchannel_next(sc);
2486         }
2487
2488 out:
2489         mutex_unlock(&sc->mutex);
2490
2491         return ret;
2492 }
2493
2494 static int ath9k_cancel_remain_on_channel(struct ieee80211_hw *hw)
2495 {
2496         struct ath_softc *sc = hw->priv;
2497         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2498
2499         mutex_lock(&sc->mutex);
2500
2501         ath_dbg(common, CHAN_CTX, "Cancel RoC\n");
2502         del_timer_sync(&sc->offchannel.timer);
2503
2504         if (sc->offchannel.roc_vif) {
2505                 if (sc->offchannel.state >= ATH_OFFCHANNEL_ROC_START)
2506                         ath_roc_complete(sc, ATH_ROC_COMPLETE_CANCEL);
2507         }
2508
2509         mutex_unlock(&sc->mutex);
2510
2511         return 0;
2512 }
2513
2514 static int ath9k_add_chanctx(struct ieee80211_hw *hw,
2515                              struct ieee80211_chanctx_conf *conf)
2516 {
2517         struct ath_softc *sc = hw->priv;
2518         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2519         struct ath_chanctx *ctx, **ptr;
2520         int pos;
2521
2522         mutex_lock(&sc->mutex);
2523
2524         ath_for_each_chanctx(sc, ctx) {
2525                 if (ctx->assigned)
2526                         continue;
2527
2528                 ptr = (void *) conf->drv_priv;
2529                 *ptr = ctx;
2530                 ctx->assigned = true;
2531                 pos = ctx - &sc->chanctx[0];
2532                 ctx->hw_queue_base = pos * IEEE80211_NUM_ACS;
2533
2534                 ath_dbg(common, CHAN_CTX,
2535                         "Add channel context: %d MHz\n",
2536                         conf->def.chan->center_freq);
2537
2538                 ath_chanctx_set_channel(sc, ctx, &conf->def);
2539
2540                 mutex_unlock(&sc->mutex);
2541                 return 0;
2542         }
2543
2544         mutex_unlock(&sc->mutex);
2545         return -ENOSPC;
2546 }
2547
2548
2549 static void ath9k_remove_chanctx(struct ieee80211_hw *hw,
2550                                  struct ieee80211_chanctx_conf *conf)
2551 {
2552         struct ath_softc *sc = hw->priv;
2553         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2554         struct ath_chanctx *ctx = ath_chanctx_get(conf);
2555
2556         mutex_lock(&sc->mutex);
2557
2558         ath_dbg(common, CHAN_CTX,
2559                 "Remove channel context: %d MHz\n",
2560                 conf->def.chan->center_freq);
2561
2562         ctx->assigned = false;
2563         ctx->hw_queue_base = 0;
2564         ath_chanctx_event(sc, NULL, ATH_CHANCTX_EVENT_UNASSIGN);
2565
2566         mutex_unlock(&sc->mutex);
2567 }
2568
2569 static void ath9k_change_chanctx(struct ieee80211_hw *hw,
2570                                  struct ieee80211_chanctx_conf *conf,
2571                                  u32 changed)
2572 {
2573         struct ath_softc *sc = hw->priv;
2574         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2575         struct ath_chanctx *ctx = ath_chanctx_get(conf);
2576
2577         mutex_lock(&sc->mutex);
2578         ath_dbg(common, CHAN_CTX,
2579                 "Change channel context: %d MHz\n",
2580                 conf->def.chan->center_freq);
2581         ath_chanctx_set_channel(sc, ctx, &conf->def);
2582         mutex_unlock(&sc->mutex);
2583 }
2584
2585 static int ath9k_assign_vif_chanctx(struct ieee80211_hw *hw,
2586                                     struct ieee80211_vif *vif,
2587                                     struct ieee80211_chanctx_conf *conf)
2588 {
2589         struct ath_softc *sc = hw->priv;
2590         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2591         struct ath_vif *avp = (void *)vif->drv_priv;
2592         struct ath_chanctx *ctx = ath_chanctx_get(conf);
2593         int i;
2594
2595         ath9k_cancel_pending_offchannel(sc);
2596
2597         mutex_lock(&sc->mutex);
2598
2599         ath_dbg(common, CHAN_CTX,
2600                 "Assign VIF (addr: %pM, type: %d, p2p: %d) to channel context: %d MHz\n",
2601                 vif->addr, vif->type, vif->p2p,
2602                 conf->def.chan->center_freq);
2603
2604         avp->chanctx = ctx;
2605         ctx->nvifs_assigned++;
2606         list_add_tail(&avp->list, &ctx->vifs);
2607         ath9k_calculate_summary_state(sc, ctx);
2608         for (i = 0; i < IEEE80211_NUM_ACS; i++)
2609                 vif->hw_queue[i] = ctx->hw_queue_base + i;
2610
2611         mutex_unlock(&sc->mutex);
2612
2613         return 0;
2614 }
2615
2616 static void ath9k_unassign_vif_chanctx(struct ieee80211_hw *hw,
2617                                        struct ieee80211_vif *vif,
2618                                        struct ieee80211_chanctx_conf *conf)
2619 {
2620         struct ath_softc *sc = hw->priv;
2621         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2622         struct ath_vif *avp = (void *)vif->drv_priv;
2623         struct ath_chanctx *ctx = ath_chanctx_get(conf);
2624         int ac;
2625
2626         ath9k_cancel_pending_offchannel(sc);
2627
2628         mutex_lock(&sc->mutex);
2629
2630         ath_dbg(common, CHAN_CTX,
2631                 "Remove VIF (addr: %pM, type: %d, p2p: %d) from channel context: %d MHz\n",
2632                 vif->addr, vif->type, vif->p2p,
2633                 conf->def.chan->center_freq);
2634
2635         avp->chanctx = NULL;
2636         ctx->nvifs_assigned--;
2637         list_del(&avp->list);
2638         ath9k_calculate_summary_state(sc, ctx);
2639         for (ac = 0; ac < IEEE80211_NUM_ACS; ac++)
2640                 vif->hw_queue[ac] = IEEE80211_INVAL_HW_QUEUE;
2641
2642         mutex_unlock(&sc->mutex);
2643 }
2644
2645 static void ath9k_mgd_prepare_tx(struct ieee80211_hw *hw,
2646                                  struct ieee80211_vif *vif,
2647                                  u16 duration)
2648 {
2649         struct ath_softc *sc = hw->priv;
2650         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2651         struct ath_vif *avp = (struct ath_vif *) vif->drv_priv;
2652         struct ath_beacon_config *cur_conf;
2653         struct ath_chanctx *go_ctx;
2654         unsigned long timeout;
2655         bool changed = false;
2656         u32 beacon_int;
2657
2658         if (!test_bit(ATH_OP_MULTI_CHANNEL, &common->op_flags))
2659                 return;
2660
2661         if (!avp->chanctx)
2662                 return;
2663
2664         mutex_lock(&sc->mutex);
2665
2666         spin_lock_bh(&sc->chan_lock);
2667         if (sc->next_chan || (sc->cur_chan != avp->chanctx))
2668                 changed = true;
2669         spin_unlock_bh(&sc->chan_lock);
2670
2671         if (!changed)
2672                 goto out;
2673
2674         ath9k_cancel_pending_offchannel(sc);
2675
2676         go_ctx = ath_is_go_chanctx_present(sc);
2677
2678         if (go_ctx) {
2679                 /*
2680                  * Wait till the GO interface gets a chance
2681                  * to send out an NoA.
2682                  */
2683                 spin_lock_bh(&sc->chan_lock);
2684                 sc->sched.mgd_prepare_tx = true;
2685                 cur_conf = &go_ctx->beacon;
2686                 beacon_int = TU_TO_USEC(cur_conf->beacon_interval);
2687                 spin_unlock_bh(&sc->chan_lock);
2688
2689                 timeout = usecs_to_jiffies(beacon_int * 2);
2690                 init_completion(&sc->go_beacon);
2691
2692                 mutex_unlock(&sc->mutex);
2693
2694                 if (wait_for_completion_timeout(&sc->go_beacon,
2695                                                 timeout) == 0) {
2696                         ath_dbg(common, CHAN_CTX,
2697                                 "Failed to send new NoA\n");
2698
2699                         spin_lock_bh(&sc->chan_lock);
2700                         sc->sched.mgd_prepare_tx = false;
2701                         spin_unlock_bh(&sc->chan_lock);
2702                 }
2703
2704                 mutex_lock(&sc->mutex);
2705         }
2706
2707         ath_dbg(common, CHAN_CTX,
2708                 "%s: Set chanctx state to FORCE_ACTIVE for vif: %pM\n",
2709                 __func__, vif->addr);
2710
2711         spin_lock_bh(&sc->chan_lock);
2712         sc->next_chan = avp->chanctx;
2713         sc->sched.state = ATH_CHANCTX_STATE_FORCE_ACTIVE;
2714         spin_unlock_bh(&sc->chan_lock);
2715
2716         ath_chanctx_set_next(sc, true);
2717 out:
2718         mutex_unlock(&sc->mutex);
2719 }
2720
2721 void ath9k_fill_chanctx_ops(void)
2722 {
2723         if (!ath9k_is_chanctx_enabled())
2724                 return;
2725
2726         ath9k_ops.hw_scan                  = ath9k_hw_scan;
2727         ath9k_ops.cancel_hw_scan           = ath9k_cancel_hw_scan;
2728         ath9k_ops.remain_on_channel        = ath9k_remain_on_channel;
2729         ath9k_ops.cancel_remain_on_channel = ath9k_cancel_remain_on_channel;
2730         ath9k_ops.add_chanctx              = ath9k_add_chanctx;
2731         ath9k_ops.remove_chanctx           = ath9k_remove_chanctx;
2732         ath9k_ops.change_chanctx           = ath9k_change_chanctx;
2733         ath9k_ops.assign_vif_chanctx       = ath9k_assign_vif_chanctx;
2734         ath9k_ops.unassign_vif_chanctx     = ath9k_unassign_vif_chanctx;
2735         ath9k_ops.mgd_prepare_tx           = ath9k_mgd_prepare_tx;
2736 }
2737
2738 #endif
2739
2740 static int ath9k_get_txpower(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
2741                              int *dbm)
2742 {
2743         struct ath_softc *sc = hw->priv;
2744         struct ath_vif *avp = (void *)vif->drv_priv;
2745
2746         mutex_lock(&sc->mutex);
2747         if (avp->chanctx)
2748                 *dbm = avp->chanctx->cur_txpower;
2749         else
2750                 *dbm = sc->cur_chan->cur_txpower;
2751         mutex_unlock(&sc->mutex);
2752
2753         *dbm /= 2;
2754
2755         return 0;
2756 }
2757
2758 struct ieee80211_ops ath9k_ops = {
2759         .tx                 = ath9k_tx,
2760         .start              = ath9k_start,
2761         .stop               = ath9k_stop,
2762         .add_interface      = ath9k_add_interface,
2763         .change_interface   = ath9k_change_interface,
2764         .remove_interface   = ath9k_remove_interface,
2765         .config             = ath9k_config,
2766         .configure_filter   = ath9k_configure_filter,
2767         .sta_state          = ath9k_sta_state,
2768         .sta_notify         = ath9k_sta_notify,
2769         .conf_tx            = ath9k_conf_tx,
2770         .bss_info_changed   = ath9k_bss_info_changed,
2771         .set_key            = ath9k_set_key,
2772         .get_tsf            = ath9k_get_tsf,
2773         .set_tsf            = ath9k_set_tsf,
2774         .reset_tsf          = ath9k_reset_tsf,
2775         .ampdu_action       = ath9k_ampdu_action,
2776         .get_survey         = ath9k_get_survey,
2777         .rfkill_poll        = ath9k_rfkill_poll_state,
2778         .set_coverage_class = ath9k_set_coverage_class,
2779         .flush              = ath9k_flush,
2780         .tx_frames_pending  = ath9k_tx_frames_pending,
2781         .tx_last_beacon     = ath9k_tx_last_beacon,
2782         .release_buffered_frames = ath9k_release_buffered_frames,
2783         .get_stats          = ath9k_get_stats,
2784         .set_antenna        = ath9k_set_antenna,
2785         .get_antenna        = ath9k_get_antenna,
2786
2787 #ifdef CONFIG_ATH9K_WOW
2788         .suspend            = ath9k_suspend,
2789         .resume             = ath9k_resume,
2790         .set_wakeup         = ath9k_set_wakeup,
2791 #endif
2792
2793 #ifdef CONFIG_ATH9K_DEBUGFS
2794         .get_et_sset_count  = ath9k_get_et_sset_count,
2795         .get_et_stats       = ath9k_get_et_stats,
2796         .get_et_strings     = ath9k_get_et_strings,
2797 #endif
2798
2799 #if defined(CONFIG_MAC80211_DEBUGFS) && defined(CONFIG_ATH9K_STATION_STATISTICS)
2800         .sta_add_debugfs    = ath9k_sta_add_debugfs,
2801 #endif
2802         .sw_scan_start      = ath9k_sw_scan_start,
2803         .sw_scan_complete   = ath9k_sw_scan_complete,
2804         .get_txpower        = ath9k_get_txpower,
2805         .wake_tx_queue      = ath9k_wake_tx_queue,
2806 };