2 * Copyright (c) 2008-2011 Atheros Communications Inc.
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 #include <linux/nl80211.h>
18 #include <linux/delay.h>
22 u8 ath9k_parse_mpdudensity(u8 mpdudensity)
25 * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
26 * 0 for no restriction
35 switch (mpdudensity) {
41 /* Our lower layer calculations limit our precision to
57 static bool ath9k_has_pending_frames(struct ath_softc *sc, struct ath_txq *txq,
62 spin_lock_bh(&txq->axq_lock);
72 if (txq->mac80211_qnum >= 0) {
73 struct list_head *list;
75 list = &sc->cur_chan->acq[txq->mac80211_qnum];
76 if (!list_empty(list))
80 spin_unlock_bh(&txq->axq_lock);
84 static bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode)
89 spin_lock_irqsave(&sc->sc_pm_lock, flags);
90 ret = ath9k_hw_setpower(sc->sc_ah, mode);
91 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
96 void ath_ps_full_sleep(unsigned long data)
98 struct ath_softc *sc = (struct ath_softc *) data;
99 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
102 spin_lock(&common->cc_lock);
103 ath_hw_cycle_counters_update(common);
104 spin_unlock(&common->cc_lock);
106 ath9k_hw_setrxabort(sc->sc_ah, 1);
107 ath9k_hw_stopdmarecv(sc->sc_ah, &reset);
109 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_FULL_SLEEP);
112 void ath9k_ps_wakeup(struct ath_softc *sc)
114 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
116 enum ath9k_power_mode power_mode;
118 spin_lock_irqsave(&sc->sc_pm_lock, flags);
119 if (++sc->ps_usecount != 1)
122 del_timer_sync(&sc->sleep_timer);
123 power_mode = sc->sc_ah->power_mode;
124 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
127 * While the hardware is asleep, the cycle counters contain no
128 * useful data. Better clear them now so that they don't mess up
129 * survey data results.
131 if (power_mode != ATH9K_PM_AWAKE) {
132 spin_lock(&common->cc_lock);
133 ath_hw_cycle_counters_update(common);
134 memset(&common->cc_survey, 0, sizeof(common->cc_survey));
135 memset(&common->cc_ani, 0, sizeof(common->cc_ani));
136 spin_unlock(&common->cc_lock);
140 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
143 void ath9k_ps_restore(struct ath_softc *sc)
145 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
146 enum ath9k_power_mode mode;
149 spin_lock_irqsave(&sc->sc_pm_lock, flags);
150 if (--sc->ps_usecount != 0)
154 mod_timer(&sc->sleep_timer, jiffies + HZ / 10);
158 if (sc->ps_enabled &&
159 !(sc->ps_flags & (PS_WAIT_FOR_BEACON |
161 PS_WAIT_FOR_PSPOLL_DATA |
164 mode = ATH9K_PM_NETWORK_SLEEP;
165 if (ath9k_hw_btcoex_is_enabled(sc->sc_ah))
166 ath9k_btcoex_stop_gen_timer(sc);
171 spin_lock(&common->cc_lock);
172 ath_hw_cycle_counters_update(common);
173 spin_unlock(&common->cc_lock);
175 ath9k_hw_setpower(sc->sc_ah, mode);
178 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
181 static void __ath_cancel_work(struct ath_softc *sc)
183 cancel_work_sync(&sc->paprd_work);
184 cancel_delayed_work_sync(&sc->tx_complete_work);
185 cancel_delayed_work_sync(&sc->hw_pll_work);
187 #ifdef CONFIG_ATH9K_BTCOEX_SUPPORT
188 if (ath9k_hw_mci_is_enabled(sc->sc_ah))
189 cancel_work_sync(&sc->mci_work);
193 void ath_cancel_work(struct ath_softc *sc)
195 __ath_cancel_work(sc);
196 cancel_work_sync(&sc->hw_reset_work);
199 void ath_restart_work(struct ath_softc *sc)
201 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
203 if (AR_SREV_9340(sc->sc_ah) || AR_SREV_9330(sc->sc_ah))
204 ieee80211_queue_delayed_work(sc->hw, &sc->hw_pll_work,
205 msecs_to_jiffies(ATH_PLL_WORK_INTERVAL));
210 static bool ath_prepare_reset(struct ath_softc *sc)
212 struct ath_hw *ah = sc->sc_ah;
215 ieee80211_stop_queues(sc->hw);
217 ath9k_hw_disable_interrupts(ah);
219 if (AR_SREV_9300_20_OR_LATER(ah)) {
220 ret &= ath_stoprecv(sc);
221 ret &= ath_drain_all_txq(sc);
223 ret &= ath_drain_all_txq(sc);
224 ret &= ath_stoprecv(sc);
230 static bool ath_complete_reset(struct ath_softc *sc, bool start)
232 struct ath_hw *ah = sc->sc_ah;
233 struct ath_common *common = ath9k_hw_common(ah);
236 ath9k_calculate_summary_state(sc, sc->cur_chan);
238 ath9k_cmn_update_txpow(ah, sc->cur_chan->cur_txpower,
239 sc->cur_chan->txpower,
240 &sc->cur_chan->cur_txpower);
241 clear_bit(ATH_OP_HW_RESET, &common->op_flags);
243 if (!sc->cur_chan->offchannel && start) {
244 /* restore per chanctx TSF timer */
245 if (sc->cur_chan->tsf_val) {
248 offset = ath9k_hw_get_tsf_offset(&sc->cur_chan->tsf_ts,
250 ath9k_hw_settsf64(ah, sc->cur_chan->tsf_val + offset);
254 if (!test_bit(ATH_OP_BEACONS, &common->op_flags))
257 if (ah->opmode == NL80211_IFTYPE_STATION &&
258 test_bit(ATH_OP_PRIM_STA_VIF, &common->op_flags)) {
259 spin_lock_irqsave(&sc->sc_pm_lock, flags);
260 sc->ps_flags |= PS_BEACON_SYNC | PS_WAIT_FOR_BEACON;
261 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
263 ath9k_set_beacon(sc);
266 ath_restart_work(sc);
267 ath_txq_schedule_all(sc);
272 ath9k_hw_set_interrupts(ah);
273 ath9k_hw_enable_interrupts(ah);
274 ieee80211_wake_queues(sc->hw);
275 ath9k_p2p_ps_timer(sc);
280 static int ath_reset_internal(struct ath_softc *sc, struct ath9k_channel *hchan)
282 struct ath_hw *ah = sc->sc_ah;
283 struct ath_common *common = ath9k_hw_common(ah);
284 struct ath9k_hw_cal_data *caldata = NULL;
288 __ath_cancel_work(sc);
290 disable_irq(sc->irq);
291 tasklet_disable(&sc->intr_tq);
292 tasklet_disable(&sc->bcon_tasklet);
293 spin_lock_bh(&sc->sc_pcu_lock);
295 if (!sc->cur_chan->offchannel) {
297 caldata = &sc->cur_chan->caldata;
307 hchan = ath9k_cmn_get_channel(sc->hw, ah, &sc->cur_chan->chandef);
310 if (!ath_prepare_reset(sc))
313 if (ath9k_is_chanctx_enabled())
316 spin_lock_bh(&sc->chan_lock);
317 sc->cur_chandef = sc->cur_chan->chandef;
318 spin_unlock_bh(&sc->chan_lock);
320 ath_dbg(common, CONFIG, "Reset to %u MHz, HT40: %d fastcc: %d\n",
321 hchan->channel, IS_CHAN_HT40(hchan), fastcc);
323 r = ath9k_hw_reset(ah, hchan, caldata, fastcc);
326 "Unable to reset channel, reset status %d\n", r);
328 ath9k_hw_enable_interrupts(ah);
329 ath9k_queue_reset(sc, RESET_TYPE_BB_HANG);
334 if (ath9k_hw_mci_is_enabled(sc->sc_ah) &&
335 sc->cur_chan->offchannel)
336 ath9k_mci_set_txpower(sc, true, false);
338 if (!ath_complete_reset(sc, true))
343 spin_unlock_bh(&sc->sc_pcu_lock);
344 tasklet_enable(&sc->bcon_tasklet);
345 tasklet_enable(&sc->intr_tq);
350 static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta,
351 struct ieee80211_vif *vif)
354 an = (struct ath_node *)sta->drv_priv;
359 memset(&an->key_idx, 0, sizeof(an->key_idx));
361 ath_tx_node_init(sc, an);
363 ath_dynack_node_init(sc->sc_ah, an);
366 static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta)
368 struct ath_node *an = (struct ath_node *)sta->drv_priv;
369 ath_tx_node_cleanup(sc, an);
371 ath_dynack_node_deinit(sc->sc_ah, an);
374 void ath9k_tasklet(unsigned long data)
376 struct ath_softc *sc = (struct ath_softc *)data;
377 struct ath_hw *ah = sc->sc_ah;
378 struct ath_common *common = ath9k_hw_common(ah);
379 enum ath_reset_type type;
384 spin_lock_irqsave(&sc->intr_lock, flags);
385 status = sc->intrstatus;
387 spin_unlock_irqrestore(&sc->intr_lock, flags);
390 spin_lock(&sc->sc_pcu_lock);
392 if (status & ATH9K_INT_FATAL) {
393 type = RESET_TYPE_FATAL_INT;
394 ath9k_queue_reset(sc, type);
395 ath_dbg(common, RESET, "FATAL: Skipping interrupts\n");
399 if ((ah->config.hw_hang_checks & HW_BB_WATCHDOG) &&
400 (status & ATH9K_INT_BB_WATCHDOG)) {
401 spin_lock(&common->cc_lock);
402 ath_hw_cycle_counters_update(common);
403 ar9003_hw_bb_watchdog_dbg_info(ah);
404 spin_unlock(&common->cc_lock);
406 if (ar9003_hw_bb_watchdog_check(ah)) {
407 type = RESET_TYPE_BB_WATCHDOG;
408 ath9k_queue_reset(sc, type);
410 ath_dbg(common, RESET,
411 "BB_WATCHDOG: Skipping interrupts\n");
416 if (status & ATH9K_INT_GTT) {
419 if ((sc->gtt_cnt >= MAX_GTT_CNT) && !ath9k_hw_check_alive(ah)) {
420 type = RESET_TYPE_TX_GTT;
421 ath9k_queue_reset(sc, type);
422 ath_dbg(common, RESET,
423 "GTT: Skipping interrupts\n");
428 spin_lock_irqsave(&sc->sc_pm_lock, flags);
429 if ((status & ATH9K_INT_TSFOOR) && sc->ps_enabled) {
431 * TSF sync does not look correct; remain awake to sync with
434 ath_dbg(common, PS, "TSFOOR - Sync with next Beacon\n");
435 sc->ps_flags |= PS_WAIT_FOR_BEACON | PS_BEACON_SYNC;
437 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
439 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
440 rxmask = (ATH9K_INT_RXHP | ATH9K_INT_RXLP | ATH9K_INT_RXEOL |
443 rxmask = (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
445 if (status & rxmask) {
446 /* Check for high priority Rx first */
447 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
448 (status & ATH9K_INT_RXHP))
449 ath_rx_tasklet(sc, 0, true);
451 ath_rx_tasklet(sc, 0, false);
454 if (status & ATH9K_INT_TX) {
455 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
457 * For EDMA chips, TX completion is enabled for the
458 * beacon queue, so if a beacon has been transmitted
459 * successfully after a GTT interrupt, the GTT counter
460 * gets reset to zero here.
464 ath_tx_edma_tasklet(sc);
469 wake_up(&sc->tx_wait);
472 if (status & ATH9K_INT_GENTIMER)
473 ath_gen_timer_isr(sc->sc_ah);
475 ath9k_btcoex_handle_interrupt(sc, status);
477 /* re-enable hardware interrupt */
478 ath9k_hw_resume_interrupts(ah);
480 spin_unlock(&sc->sc_pcu_lock);
481 ath9k_ps_restore(sc);
484 irqreturn_t ath_isr(int irq, void *dev)
486 #define SCHED_INTR ( \
488 ATH9K_INT_BB_WATCHDOG | \
499 ATH9K_INT_GENTIMER | \
502 struct ath_softc *sc = dev;
503 struct ath_hw *ah = sc->sc_ah;
504 struct ath_common *common = ath9k_hw_common(ah);
505 enum ath9k_int status;
510 * The hardware is not ready/present, don't
511 * touch anything. Note this can happen early
512 * on if the IRQ is shared.
514 if (!ah || test_bit(ATH_OP_INVALID, &common->op_flags))
517 /* shared irq, not for us */
518 if (!ath9k_hw_intrpend(ah))
522 * Figure out the reason(s) for the interrupt. Note
523 * that the hal returns a pseudo-ISR that may include
524 * bits we haven't explicitly enabled so we mask the
525 * value to insure we only process bits we requested.
527 ath9k_hw_getisr(ah, &status, &sync_cause); /* NB: clears ISR too */
528 ath9k_debug_sync_cause(sc, sync_cause);
529 status &= ah->imask; /* discard unasked-for bits */
531 if (test_bit(ATH_OP_HW_RESET, &common->op_flags)) {
532 ath9k_hw_kill_interrupts(sc->sc_ah);
537 * If there are no status bits set, then this interrupt was not
538 * for me (should have been caught above).
543 /* Cache the status */
544 spin_lock(&sc->intr_lock);
545 sc->intrstatus |= status;
546 spin_unlock(&sc->intr_lock);
548 if (status & SCHED_INTR)
552 * If a FATAL interrupt is received, we have to reset the chip
555 if (status & ATH9K_INT_FATAL)
558 if ((ah->config.hw_hang_checks & HW_BB_WATCHDOG) &&
559 (status & ATH9K_INT_BB_WATCHDOG))
562 if (status & ATH9K_INT_SWBA)
563 tasklet_schedule(&sc->bcon_tasklet);
565 if (status & ATH9K_INT_TXURN)
566 ath9k_hw_updatetxtriglevel(ah, true);
568 if (status & ATH9K_INT_RXEOL) {
569 ah->imask &= ~(ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
570 ath9k_hw_set_interrupts(ah);
573 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
574 if (status & ATH9K_INT_TIM_TIMER) {
575 if (ATH_DBG_WARN_ON_ONCE(sc->ps_idle))
577 /* Clear RxAbort bit so that we can
579 ath9k_setpower(sc, ATH9K_PM_AWAKE);
580 spin_lock(&sc->sc_pm_lock);
581 ath9k_hw_setrxabort(sc->sc_ah, 0);
582 sc->ps_flags |= PS_WAIT_FOR_BEACON;
583 spin_unlock(&sc->sc_pm_lock);
588 ath_debug_stat_interrupt(sc, status);
591 /* turn off every interrupt */
592 ath9k_hw_kill_interrupts(ah);
593 tasklet_schedule(&sc->intr_tq);
602 * This function is called when a HW reset cannot be deferred
603 * and has to be immediate.
605 int ath_reset(struct ath_softc *sc, struct ath9k_channel *hchan)
607 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
610 ath9k_hw_kill_interrupts(sc->sc_ah);
611 set_bit(ATH_OP_HW_RESET, &common->op_flags);
614 r = ath_reset_internal(sc, hchan);
615 ath9k_ps_restore(sc);
621 * When a HW reset can be deferred, it is added to the
622 * hw_reset_work workqueue, but we set ATH_OP_HW_RESET before
625 void ath9k_queue_reset(struct ath_softc *sc, enum ath_reset_type type)
627 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
628 #ifdef CONFIG_ATH9K_DEBUGFS
629 RESET_STAT_INC(sc, type);
631 ath9k_hw_kill_interrupts(sc->sc_ah);
632 set_bit(ATH_OP_HW_RESET, &common->op_flags);
633 ieee80211_queue_work(sc->hw, &sc->hw_reset_work);
636 void ath_reset_work(struct work_struct *work)
638 struct ath_softc *sc = container_of(work, struct ath_softc, hw_reset_work);
641 ath_reset_internal(sc, NULL);
642 ath9k_ps_restore(sc);
645 /**********************/
646 /* mac80211 callbacks */
647 /**********************/
649 static int ath9k_start(struct ieee80211_hw *hw)
651 struct ath_softc *sc = hw->priv;
652 struct ath_hw *ah = sc->sc_ah;
653 struct ath_common *common = ath9k_hw_common(ah);
654 struct ieee80211_channel *curchan = sc->cur_chan->chandef.chan;
655 struct ath_chanctx *ctx = sc->cur_chan;
656 struct ath9k_channel *init_channel;
659 ath_dbg(common, CONFIG,
660 "Starting driver with initial channel: %d MHz\n",
661 curchan->center_freq);
664 mutex_lock(&sc->mutex);
666 init_channel = ath9k_cmn_get_channel(hw, ah, &ctx->chandef);
667 sc->cur_chandef = hw->conf.chandef;
669 /* Reset SERDES registers */
670 ath9k_hw_configpcipowersave(ah, false);
673 * The basic interface to setting the hardware in a good
674 * state is ``reset''. On return the hardware is known to
675 * be powered up and with interrupts disabled. This must
676 * be followed by initialization of the appropriate bits
677 * and then setup of the interrupt mask.
679 spin_lock_bh(&sc->sc_pcu_lock);
681 atomic_set(&ah->intr_ref_cnt, -1);
683 r = ath9k_hw_reset(ah, init_channel, ah->caldata, false);
686 "Unable to reset hardware; reset status %d (freq %u MHz)\n",
687 r, curchan->center_freq);
688 ah->reset_power_on = false;
691 /* Setup our intr mask. */
692 ah->imask = ATH9K_INT_TX | ATH9K_INT_RXEOL |
693 ATH9K_INT_RXORN | ATH9K_INT_FATAL |
696 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
697 ah->imask |= ATH9K_INT_RXHP |
700 ah->imask |= ATH9K_INT_RX;
702 if (ah->config.hw_hang_checks & HW_BB_WATCHDOG)
703 ah->imask |= ATH9K_INT_BB_WATCHDOG;
706 * Enable GTT interrupts only for AR9003/AR9004 chips
709 if (AR_SREV_9300_20_OR_LATER(ah))
710 ah->imask |= ATH9K_INT_GTT;
712 if (ah->caps.hw_caps & ATH9K_HW_CAP_HT)
713 ah->imask |= ATH9K_INT_CST;
717 clear_bit(ATH_OP_INVALID, &common->op_flags);
718 sc->sc_ah->is_monitoring = false;
720 if (!ath_complete_reset(sc, false))
721 ah->reset_power_on = false;
723 if (ah->led_pin >= 0) {
724 ath9k_hw_set_gpio(ah, ah->led_pin,
725 (ah->config.led_active_high) ? 1 : 0);
726 ath9k_hw_gpio_request_out(ah, ah->led_pin, NULL,
727 AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
731 * Reset key cache to sane defaults (all entries cleared) instead of
732 * semi-random values after suspend/resume.
734 ath9k_cmn_init_crypto(sc->sc_ah);
736 ath9k_hw_reset_tsf(ah);
738 spin_unlock_bh(&sc->sc_pcu_lock);
740 mutex_unlock(&sc->mutex);
742 ath9k_ps_restore(sc);
749 static void ath9k_tx(struct ieee80211_hw *hw,
750 struct ieee80211_tx_control *control,
753 struct ath_softc *sc = hw->priv;
754 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
755 struct ath_tx_control txctl;
756 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
759 if (sc->ps_enabled) {
761 * mac80211 does not set PM field for normal data frames, so we
762 * need to update that based on the current PS mode.
764 if (ieee80211_is_data(hdr->frame_control) &&
765 !ieee80211_is_nullfunc(hdr->frame_control) &&
766 !ieee80211_has_pm(hdr->frame_control)) {
768 "Add PM=1 for a TX frame while in PS mode\n");
769 hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
773 if (unlikely(sc->sc_ah->power_mode == ATH9K_PM_NETWORK_SLEEP)) {
775 * We are using PS-Poll and mac80211 can request TX while in
776 * power save mode. Need to wake up hardware for the TX to be
777 * completed and if needed, also for RX of buffered frames.
780 spin_lock_irqsave(&sc->sc_pm_lock, flags);
781 if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
782 ath9k_hw_setrxabort(sc->sc_ah, 0);
783 if (ieee80211_is_pspoll(hdr->frame_control)) {
785 "Sending PS-Poll to pick a buffered frame\n");
786 sc->ps_flags |= PS_WAIT_FOR_PSPOLL_DATA;
788 ath_dbg(common, PS, "Wake up to complete TX\n");
789 sc->ps_flags |= PS_WAIT_FOR_TX_ACK;
792 * The actual restore operation will happen only after
793 * the ps_flags bit is cleared. We are just dropping
794 * the ps_usecount here.
796 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
797 ath9k_ps_restore(sc);
801 * Cannot tx while the hardware is in full sleep, it first needs a full
802 * chip reset to recover from that
804 if (unlikely(sc->sc_ah->power_mode == ATH9K_PM_FULL_SLEEP)) {
805 ath_err(common, "TX while HW is in FULL_SLEEP mode\n");
809 memset(&txctl, 0, sizeof(struct ath_tx_control));
810 txctl.txq = sc->tx.txq_map[skb_get_queue_mapping(skb)];
811 txctl.sta = control->sta;
813 ath_dbg(common, XMIT, "transmitting packet, skb: %p\n", skb);
815 if (ath_tx_start(hw, skb, &txctl) != 0) {
816 ath_dbg(common, XMIT, "TX failed\n");
817 TX_STAT_INC(txctl.txq->axq_qnum, txfailed);
823 ieee80211_free_txskb(hw, skb);
826 static bool ath9k_txq_list_has_key(struct list_head *txq_list, u32 keyix)
829 struct ieee80211_tx_info *txinfo;
830 struct ath_frame_info *fi;
832 list_for_each_entry(bf, txq_list, list) {
833 if (bf->bf_state.stale || !bf->bf_mpdu)
836 txinfo = IEEE80211_SKB_CB(bf->bf_mpdu);
837 fi = (struct ath_frame_info *)&txinfo->rate_driver_data[0];
838 if (fi->keyix == keyix)
845 static bool ath9k_txq_has_key(struct ath_softc *sc, u32 keyix)
847 struct ath_hw *ah = sc->sc_ah;
850 bool key_in_use = false;
852 for (i = 0; !key_in_use && i < ATH9K_NUM_TX_QUEUES; i++) {
853 if (!ATH_TXQ_SETUP(sc, i))
855 txq = &sc->tx.txq[i];
858 if (!ath9k_hw_numtxpending(ah, txq->axq_qnum))
861 ath_txq_lock(sc, txq);
862 key_in_use = ath9k_txq_list_has_key(&txq->axq_q, keyix);
863 if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
864 int idx = txq->txq_tailidx;
866 while (!key_in_use &&
867 !list_empty(&txq->txq_fifo[idx])) {
868 key_in_use = ath9k_txq_list_has_key(
869 &txq->txq_fifo[idx], keyix);
870 INCR(idx, ATH_TXFIFO_DEPTH);
873 ath_txq_unlock(sc, txq);
879 static void ath9k_pending_key_del(struct ath_softc *sc, u8 keyix)
881 struct ath_hw *ah = sc->sc_ah;
882 struct ath_common *common = ath9k_hw_common(ah);
884 if (!test_bit(keyix, ah->pending_del_keymap) ||
885 ath9k_txq_has_key(sc, keyix))
888 /* No more TXQ frames point to this key cache entry, so delete it. */
889 clear_bit(keyix, ah->pending_del_keymap);
890 ath_key_delete(common, keyix);
893 static void ath9k_stop(struct ieee80211_hw *hw)
895 struct ath_softc *sc = hw->priv;
896 struct ath_hw *ah = sc->sc_ah;
897 struct ath_common *common = ath9k_hw_common(ah);
901 ath9k_deinit_channel_context(sc);
905 mutex_lock(&sc->mutex);
909 if (test_bit(ATH_OP_INVALID, &common->op_flags)) {
910 ath_dbg(common, ANY, "Device not present\n");
911 mutex_unlock(&sc->mutex);
915 /* Ensure HW is awake when we try to shut it down. */
918 spin_lock_bh(&sc->sc_pcu_lock);
920 /* prevent tasklets to enable interrupts once we disable them */
921 ah->imask &= ~ATH9K_INT_GLOBAL;
923 /* make sure h/w will not generate any interrupt
924 * before setting the invalid flag. */
925 ath9k_hw_disable_interrupts(ah);
927 spin_unlock_bh(&sc->sc_pcu_lock);
929 /* we can now sync irq and kill any running tasklets, since we already
930 * disabled interrupts and not holding a spin lock */
931 synchronize_irq(sc->irq);
932 tasklet_kill(&sc->intr_tq);
933 tasklet_kill(&sc->bcon_tasklet);
935 prev_idle = sc->ps_idle;
938 spin_lock_bh(&sc->sc_pcu_lock);
940 if (ah->led_pin >= 0) {
941 ath9k_hw_set_gpio(ah, ah->led_pin,
942 (ah->config.led_active_high) ? 0 : 1);
943 ath9k_hw_gpio_request_in(ah, ah->led_pin, NULL);
946 ath_prepare_reset(sc);
949 dev_kfree_skb_any(sc->rx.frag);
954 ah->curchan = ath9k_cmn_get_channel(hw, ah,
955 &sc->cur_chan->chandef);
957 ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
959 set_bit(ATH_OP_INVALID, &common->op_flags);
961 ath9k_hw_phy_disable(ah);
963 ath9k_hw_configpcipowersave(ah, true);
965 spin_unlock_bh(&sc->sc_pcu_lock);
967 for (i = 0; i < ATH_KEYMAX; i++)
968 ath9k_pending_key_del(sc, i);
970 /* Clear key cache entries explicitly to get rid of any potentially
973 ath9k_cmn_init_crypto(sc->sc_ah);
975 ath9k_ps_restore(sc);
977 sc->ps_idle = prev_idle;
979 mutex_unlock(&sc->mutex);
981 ath_dbg(common, CONFIG, "Driver halt\n");
984 static bool ath9k_uses_beacons(int type)
987 case NL80211_IFTYPE_AP:
988 case NL80211_IFTYPE_ADHOC:
989 case NL80211_IFTYPE_MESH_POINT:
996 static void ath9k_vif_iter_set_beacon(struct ath9k_vif_iter_data *iter_data,
997 struct ieee80211_vif *vif)
999 /* Use the first (configured) interface, but prefering AP interfaces. */
1000 if (!iter_data->primary_beacon_vif) {
1001 iter_data->primary_beacon_vif = vif;
1003 if (iter_data->primary_beacon_vif->type != NL80211_IFTYPE_AP &&
1004 vif->type == NL80211_IFTYPE_AP)
1005 iter_data->primary_beacon_vif = vif;
1008 iter_data->beacons = true;
1009 iter_data->nbcnvifs += 1;
1012 static void ath9k_vif_iter(struct ath9k_vif_iter_data *iter_data,
1013 u8 *mac, struct ieee80211_vif *vif)
1015 struct ath_vif *avp = (struct ath_vif *)vif->drv_priv;
1018 if (iter_data->has_hw_macaddr) {
1019 for (i = 0; i < ETH_ALEN; i++)
1020 iter_data->mask[i] &=
1021 ~(iter_data->hw_macaddr[i] ^ mac[i]);
1023 memcpy(iter_data->hw_macaddr, mac, ETH_ALEN);
1024 iter_data->has_hw_macaddr = true;
1027 if (!vif->bss_conf.use_short_slot)
1028 iter_data->slottime = 20;
1030 switch (vif->type) {
1031 case NL80211_IFTYPE_AP:
1033 if (vif->bss_conf.enable_beacon)
1034 ath9k_vif_iter_set_beacon(iter_data, vif);
1036 case NL80211_IFTYPE_STATION:
1037 iter_data->nstations++;
1038 if (avp->assoc && !iter_data->primary_sta)
1039 iter_data->primary_sta = vif;
1041 case NL80211_IFTYPE_OCB:
1044 case NL80211_IFTYPE_ADHOC:
1045 iter_data->nadhocs++;
1046 if (vif->bss_conf.enable_beacon)
1047 ath9k_vif_iter_set_beacon(iter_data, vif);
1049 case NL80211_IFTYPE_MESH_POINT:
1050 iter_data->nmeshes++;
1051 if (vif->bss_conf.enable_beacon)
1052 ath9k_vif_iter_set_beacon(iter_data, vif);
1054 case NL80211_IFTYPE_WDS:
1062 static void ath9k_update_bssid_mask(struct ath_softc *sc,
1063 struct ath_chanctx *ctx,
1064 struct ath9k_vif_iter_data *iter_data)
1066 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1067 struct ath_vif *avp;
1070 if (!ath9k_is_chanctx_enabled())
1073 list_for_each_entry(avp, &ctx->vifs, list) {
1074 if (ctx->nvifs_assigned != 1)
1077 if (!iter_data->has_hw_macaddr)
1080 ether_addr_copy(common->curbssid, avp->bssid);
1082 /* perm_addr will be used as the p2p device address. */
1083 for (i = 0; i < ETH_ALEN; i++)
1084 iter_data->mask[i] &=
1085 ~(iter_data->hw_macaddr[i] ^
1086 sc->hw->wiphy->perm_addr[i]);
1090 /* Called with sc->mutex held. */
1091 void ath9k_calculate_iter_data(struct ath_softc *sc,
1092 struct ath_chanctx *ctx,
1093 struct ath9k_vif_iter_data *iter_data)
1095 struct ath_vif *avp;
1098 * The hardware will use primary station addr together with the
1099 * BSSID mask when matching addresses.
1101 memset(iter_data, 0, sizeof(*iter_data));
1102 eth_broadcast_addr(iter_data->mask);
1103 iter_data->slottime = 9;
1105 list_for_each_entry(avp, &ctx->vifs, list)
1106 ath9k_vif_iter(iter_data, avp->vif->addr, avp->vif);
1108 ath9k_update_bssid_mask(sc, ctx, iter_data);
1111 static void ath9k_set_assoc_state(struct ath_softc *sc,
1112 struct ieee80211_vif *vif, bool changed)
1114 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1115 struct ath_vif *avp = (struct ath_vif *)vif->drv_priv;
1116 unsigned long flags;
1118 set_bit(ATH_OP_PRIM_STA_VIF, &common->op_flags);
1120 ether_addr_copy(common->curbssid, avp->bssid);
1121 common->curaid = avp->aid;
1122 ath9k_hw_write_associd(sc->sc_ah);
1125 common->last_rssi = ATH_RSSI_DUMMY_MARKER;
1126 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
1128 spin_lock_irqsave(&sc->sc_pm_lock, flags);
1129 sc->ps_flags |= PS_BEACON_SYNC | PS_WAIT_FOR_BEACON;
1130 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
1133 if (ath9k_hw_mci_is_enabled(sc->sc_ah))
1134 ath9k_mci_update_wlan_channels(sc, false);
1136 ath_dbg(common, CONFIG,
1137 "Primary Station interface: %pM, BSSID: %pM\n",
1138 vif->addr, common->curbssid);
1141 #ifdef CONFIG_ATH9K_CHANNEL_CONTEXT
1142 static void ath9k_set_offchannel_state(struct ath_softc *sc)
1144 struct ath_hw *ah = sc->sc_ah;
1145 struct ath_common *common = ath9k_hw_common(ah);
1146 struct ieee80211_vif *vif = NULL;
1148 ath9k_ps_wakeup(sc);
1150 if (sc->offchannel.state < ATH_OFFCHANNEL_ROC_START)
1151 vif = sc->offchannel.scan_vif;
1153 vif = sc->offchannel.roc_vif;
1158 eth_zero_addr(common->curbssid);
1159 eth_broadcast_addr(common->bssidmask);
1160 memcpy(common->macaddr, vif->addr, ETH_ALEN);
1162 ah->opmode = vif->type;
1163 ah->imask &= ~ATH9K_INT_SWBA;
1164 ah->imask &= ~ATH9K_INT_TSFOOR;
1167 ath_hw_setbssidmask(common);
1168 ath9k_hw_setopmode(ah);
1169 ath9k_hw_write_associd(sc->sc_ah);
1170 ath9k_hw_set_interrupts(ah);
1171 ath9k_hw_init_global_settings(ah);
1174 ath9k_ps_restore(sc);
1178 /* Called with sc->mutex held. */
1179 void ath9k_calculate_summary_state(struct ath_softc *sc,
1180 struct ath_chanctx *ctx)
1182 struct ath_hw *ah = sc->sc_ah;
1183 struct ath_common *common = ath9k_hw_common(ah);
1184 struct ath9k_vif_iter_data iter_data;
1186 ath_chanctx_check_active(sc, ctx);
1188 if (ctx != sc->cur_chan)
1191 #ifdef CONFIG_ATH9K_CHANNEL_CONTEXT
1192 if (ctx == &sc->offchannel.chan)
1193 return ath9k_set_offchannel_state(sc);
1196 ath9k_ps_wakeup(sc);
1197 ath9k_calculate_iter_data(sc, ctx, &iter_data);
1199 if (iter_data.has_hw_macaddr)
1200 memcpy(common->macaddr, iter_data.hw_macaddr, ETH_ALEN);
1202 memcpy(common->bssidmask, iter_data.mask, ETH_ALEN);
1203 ath_hw_setbssidmask(common);
1205 if (iter_data.naps > 0) {
1206 ath9k_hw_set_tsfadjust(ah, true);
1207 ah->opmode = NL80211_IFTYPE_AP;
1209 ath9k_hw_set_tsfadjust(ah, false);
1210 if (iter_data.beacons)
1211 ath9k_beacon_ensure_primary_slot(sc);
1213 if (iter_data.nmeshes)
1214 ah->opmode = NL80211_IFTYPE_MESH_POINT;
1215 else if (iter_data.nocbs)
1216 ah->opmode = NL80211_IFTYPE_OCB;
1217 else if (iter_data.nwds)
1218 ah->opmode = NL80211_IFTYPE_AP;
1219 else if (iter_data.nadhocs)
1220 ah->opmode = NL80211_IFTYPE_ADHOC;
1222 ah->opmode = NL80211_IFTYPE_STATION;
1225 ath9k_hw_setopmode(ah);
1227 ctx->switch_after_beacon = false;
1228 if ((iter_data.nstations + iter_data.nadhocs + iter_data.nmeshes) > 0)
1229 ah->imask |= ATH9K_INT_TSFOOR;
1231 ah->imask &= ~ATH9K_INT_TSFOOR;
1232 if (iter_data.naps == 1 && iter_data.beacons)
1233 ctx->switch_after_beacon = true;
1236 if (ah->opmode == NL80211_IFTYPE_STATION) {
1237 bool changed = (iter_data.primary_sta != ctx->primary_sta);
1239 if (iter_data.primary_sta) {
1240 iter_data.primary_beacon_vif = iter_data.primary_sta;
1241 iter_data.beacons = true;
1242 ath9k_set_assoc_state(sc, iter_data.primary_sta,
1244 ctx->primary_sta = iter_data.primary_sta;
1246 ctx->primary_sta = NULL;
1247 eth_zero_addr(common->curbssid);
1249 ath9k_hw_write_associd(sc->sc_ah);
1250 if (ath9k_hw_mci_is_enabled(sc->sc_ah))
1251 ath9k_mci_update_wlan_channels(sc, true);
1254 sc->nbcnvifs = iter_data.nbcnvifs;
1255 ath9k_beacon_config(sc, iter_data.primary_beacon_vif,
1257 ath9k_hw_set_interrupts(ah);
1259 if (ah->slottime != iter_data.slottime) {
1260 ah->slottime = iter_data.slottime;
1261 ath9k_hw_init_global_settings(ah);
1264 if (iter_data.primary_sta)
1265 set_bit(ATH_OP_PRIM_STA_VIF, &common->op_flags);
1267 clear_bit(ATH_OP_PRIM_STA_VIF, &common->op_flags);
1269 ath_dbg(common, CONFIG,
1270 "macaddr: %pM, bssid: %pM, bssidmask: %pM\n",
1271 common->macaddr, common->curbssid, common->bssidmask);
1273 ath9k_ps_restore(sc);
1276 static void ath9k_tpc_vif_iter(void *data, u8 *mac, struct ieee80211_vif *vif)
1278 int *power = (int *)data;
1280 if (*power < vif->bss_conf.txpower)
1281 *power = vif->bss_conf.txpower;
1284 /* Called with sc->mutex held. */
1285 void ath9k_set_txpower(struct ath_softc *sc, struct ieee80211_vif *vif)
1288 struct ath_hw *ah = sc->sc_ah;
1289 struct ath_regulatory *reg = ath9k_hw_regulatory(ah);
1291 ath9k_ps_wakeup(sc);
1292 if (ah->tpc_enabled) {
1293 power = (vif) ? vif->bss_conf.txpower : -1;
1294 ieee80211_iterate_active_interfaces_atomic(
1295 sc->hw, IEEE80211_IFACE_ITER_RESUME_ALL,
1296 ath9k_tpc_vif_iter, &power);
1298 power = sc->hw->conf.power_level;
1300 power = sc->hw->conf.power_level;
1302 sc->cur_chan->txpower = 2 * power;
1303 ath9k_hw_set_txpowerlimit(ah, sc->cur_chan->txpower, false);
1304 sc->cur_chan->cur_txpower = reg->max_power_level;
1305 ath9k_ps_restore(sc);
1308 static void ath9k_assign_hw_queues(struct ieee80211_hw *hw,
1309 struct ieee80211_vif *vif)
1313 if (!ath9k_is_chanctx_enabled())
1316 for (i = 0; i < IEEE80211_NUM_ACS; i++)
1317 vif->hw_queue[i] = i;
1319 if (vif->type == NL80211_IFTYPE_AP ||
1320 vif->type == NL80211_IFTYPE_MESH_POINT)
1321 vif->cab_queue = hw->queues - 2;
1323 vif->cab_queue = IEEE80211_INVAL_HW_QUEUE;
1326 static int ath9k_add_interface(struct ieee80211_hw *hw,
1327 struct ieee80211_vif *vif)
1329 struct ath_softc *sc = hw->priv;
1330 struct ath_hw *ah = sc->sc_ah;
1331 struct ath_common *common = ath9k_hw_common(ah);
1332 struct ath_vif *avp = (void *)vif->drv_priv;
1333 struct ath_node *an = &avp->mcast_node;
1335 mutex_lock(&sc->mutex);
1336 if (IS_ENABLED(CONFIG_ATH9K_TX99)) {
1337 if (sc->cur_chan->nvifs >= 1) {
1338 mutex_unlock(&sc->mutex);
1344 ath_dbg(common, CONFIG, "Attach a VIF of type: %d\n", vif->type);
1345 sc->cur_chan->nvifs++;
1347 if (vif->type == NL80211_IFTYPE_STATION && ath9k_is_chanctx_enabled())
1348 vif->driver_flags |= IEEE80211_VIF_GET_NOA_UPDATE;
1350 if (ath9k_uses_beacons(vif->type))
1351 ath9k_beacon_assign_slot(sc, vif);
1354 if (!ath9k_is_chanctx_enabled()) {
1355 avp->chanctx = sc->cur_chan;
1356 list_add_tail(&avp->list, &avp->chanctx->vifs);
1359 ath9k_calculate_summary_state(sc, avp->chanctx);
1361 ath9k_assign_hw_queues(hw, vif);
1363 ath9k_set_txpower(sc, vif);
1368 an->no_ps_filter = true;
1369 ath_tx_node_init(sc, an);
1371 mutex_unlock(&sc->mutex);
1375 static int ath9k_change_interface(struct ieee80211_hw *hw,
1376 struct ieee80211_vif *vif,
1377 enum nl80211_iftype new_type,
1380 struct ath_softc *sc = hw->priv;
1381 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1382 struct ath_vif *avp = (void *)vif->drv_priv;
1384 mutex_lock(&sc->mutex);
1386 if (IS_ENABLED(CONFIG_ATH9K_TX99)) {
1387 mutex_unlock(&sc->mutex);
1391 ath_dbg(common, CONFIG, "Change Interface\n");
1393 if (ath9k_uses_beacons(vif->type))
1394 ath9k_beacon_remove_slot(sc, vif);
1396 vif->type = new_type;
1399 if (ath9k_uses_beacons(vif->type))
1400 ath9k_beacon_assign_slot(sc, vif);
1402 ath9k_assign_hw_queues(hw, vif);
1403 ath9k_calculate_summary_state(sc, avp->chanctx);
1405 ath9k_set_txpower(sc, vif);
1407 mutex_unlock(&sc->mutex);
1411 static void ath9k_remove_interface(struct ieee80211_hw *hw,
1412 struct ieee80211_vif *vif)
1414 struct ath_softc *sc = hw->priv;
1415 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1416 struct ath_vif *avp = (void *)vif->drv_priv;
1418 ath_dbg(common, CONFIG, "Detach Interface\n");
1420 mutex_lock(&sc->mutex);
1422 ath9k_p2p_remove_vif(sc, vif);
1424 sc->cur_chan->nvifs--;
1425 sc->tx99_vif = NULL;
1426 if (!ath9k_is_chanctx_enabled())
1427 list_del(&avp->list);
1429 if (ath9k_uses_beacons(vif->type))
1430 ath9k_beacon_remove_slot(sc, vif);
1432 ath_tx_node_cleanup(sc, &avp->mcast_node);
1434 ath9k_calculate_summary_state(sc, avp->chanctx);
1436 ath9k_set_txpower(sc, NULL);
1438 mutex_unlock(&sc->mutex);
1441 static void ath9k_enable_ps(struct ath_softc *sc)
1443 struct ath_hw *ah = sc->sc_ah;
1444 struct ath_common *common = ath9k_hw_common(ah);
1446 if (IS_ENABLED(CONFIG_ATH9K_TX99))
1449 sc->ps_enabled = true;
1450 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1451 if ((ah->imask & ATH9K_INT_TIM_TIMER) == 0) {
1452 ah->imask |= ATH9K_INT_TIM_TIMER;
1453 ath9k_hw_set_interrupts(ah);
1455 ath9k_hw_setrxabort(ah, 1);
1457 ath_dbg(common, PS, "PowerSave enabled\n");
1460 static void ath9k_disable_ps(struct ath_softc *sc)
1462 struct ath_hw *ah = sc->sc_ah;
1463 struct ath_common *common = ath9k_hw_common(ah);
1465 if (IS_ENABLED(CONFIG_ATH9K_TX99))
1468 sc->ps_enabled = false;
1469 ath9k_hw_setpower(ah, ATH9K_PM_AWAKE);
1470 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1471 ath9k_hw_setrxabort(ah, 0);
1472 sc->ps_flags &= ~(PS_WAIT_FOR_BEACON |
1474 PS_WAIT_FOR_PSPOLL_DATA |
1475 PS_WAIT_FOR_TX_ACK);
1476 if (ah->imask & ATH9K_INT_TIM_TIMER) {
1477 ah->imask &= ~ATH9K_INT_TIM_TIMER;
1478 ath9k_hw_set_interrupts(ah);
1481 ath_dbg(common, PS, "PowerSave disabled\n");
1484 static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
1486 struct ath_softc *sc = hw->priv;
1487 struct ath_hw *ah = sc->sc_ah;
1488 struct ath_common *common = ath9k_hw_common(ah);
1489 struct ieee80211_conf *conf = &hw->conf;
1490 struct ath_chanctx *ctx = sc->cur_chan;
1492 ath9k_ps_wakeup(sc);
1493 mutex_lock(&sc->mutex);
1495 if (changed & IEEE80211_CONF_CHANGE_IDLE) {
1496 sc->ps_idle = !!(conf->flags & IEEE80211_CONF_IDLE);
1498 ath_cancel_work(sc);
1499 ath9k_stop_btcoex(sc);
1501 ath9k_start_btcoex(sc);
1503 * The chip needs a reset to properly wake up from
1506 ath_chanctx_set_channel(sc, ctx, &ctx->chandef);
1511 * We just prepare to enable PS. We have to wait until our AP has
1512 * ACK'd our null data frame to disable RX otherwise we'll ignore
1513 * those ACKs and end up retransmitting the same null data frames.
1514 * IEEE80211_CONF_CHANGE_PS is only passed by mac80211 for STA mode.
1516 if (changed & IEEE80211_CONF_CHANGE_PS) {
1517 unsigned long flags;
1518 spin_lock_irqsave(&sc->sc_pm_lock, flags);
1519 if (conf->flags & IEEE80211_CONF_PS)
1520 ath9k_enable_ps(sc);
1522 ath9k_disable_ps(sc);
1523 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
1526 if (changed & IEEE80211_CONF_CHANGE_MONITOR) {
1527 if (conf->flags & IEEE80211_CONF_MONITOR) {
1528 ath_dbg(common, CONFIG, "Monitor mode is enabled\n");
1529 sc->sc_ah->is_monitoring = true;
1531 ath_dbg(common, CONFIG, "Monitor mode is disabled\n");
1532 sc->sc_ah->is_monitoring = false;
1536 if (!ath9k_is_chanctx_enabled() && (changed & IEEE80211_CONF_CHANGE_CHANNEL)) {
1537 ctx->offchannel = !!(conf->flags & IEEE80211_CONF_OFFCHANNEL);
1538 ath_chanctx_set_channel(sc, ctx, &hw->conf.chandef);
1541 if (changed & IEEE80211_CONF_CHANGE_POWER)
1542 ath9k_set_txpower(sc, NULL);
1544 mutex_unlock(&sc->mutex);
1545 ath9k_ps_restore(sc);
1550 #define SUPPORTED_FILTERS \
1555 FIF_BCN_PRBRESP_PROMISC | \
1559 /* FIXME: sc->sc_full_reset ? */
1560 static void ath9k_configure_filter(struct ieee80211_hw *hw,
1561 unsigned int changed_flags,
1562 unsigned int *total_flags,
1565 struct ath_softc *sc = hw->priv;
1566 struct ath_chanctx *ctx;
1569 changed_flags &= SUPPORTED_FILTERS;
1570 *total_flags &= SUPPORTED_FILTERS;
1572 spin_lock_bh(&sc->chan_lock);
1573 ath_for_each_chanctx(sc, ctx)
1574 ctx->rxfilter = *total_flags;
1575 #ifdef CONFIG_ATH9K_CHANNEL_CONTEXT
1576 sc->offchannel.chan.rxfilter = *total_flags;
1578 spin_unlock_bh(&sc->chan_lock);
1580 ath9k_ps_wakeup(sc);
1581 rfilt = ath_calcrxfilter(sc);
1582 ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
1583 ath9k_ps_restore(sc);
1585 ath_dbg(ath9k_hw_common(sc->sc_ah), CONFIG, "Set HW RX filter: 0x%x\n",
1589 static int ath9k_sta_add(struct ieee80211_hw *hw,
1590 struct ieee80211_vif *vif,
1591 struct ieee80211_sta *sta)
1593 struct ath_softc *sc = hw->priv;
1594 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1595 struct ath_node *an = (struct ath_node *) sta->drv_priv;
1596 struct ieee80211_key_conf ps_key = { };
1599 ath_node_attach(sc, sta, vif);
1601 if (vif->type != NL80211_IFTYPE_AP &&
1602 vif->type != NL80211_IFTYPE_AP_VLAN)
1605 key = ath_key_config(common, vif, sta, &ps_key);
1608 an->key_idx[0] = key;
1614 static void ath9k_del_ps_key(struct ath_softc *sc,
1615 struct ieee80211_vif *vif,
1616 struct ieee80211_sta *sta)
1618 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1619 struct ath_node *an = (struct ath_node *) sta->drv_priv;
1624 ath_key_delete(common, an->ps_key);
1629 static int ath9k_sta_remove(struct ieee80211_hw *hw,
1630 struct ieee80211_vif *vif,
1631 struct ieee80211_sta *sta)
1633 struct ath_softc *sc = hw->priv;
1635 ath9k_del_ps_key(sc, vif, sta);
1636 ath_node_detach(sc, sta);
1641 static int ath9k_sta_state(struct ieee80211_hw *hw,
1642 struct ieee80211_vif *vif,
1643 struct ieee80211_sta *sta,
1644 enum ieee80211_sta_state old_state,
1645 enum ieee80211_sta_state new_state)
1647 struct ath_softc *sc = hw->priv;
1648 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1651 if (old_state == IEEE80211_STA_NOTEXIST &&
1652 new_state == IEEE80211_STA_NONE) {
1653 ret = ath9k_sta_add(hw, vif, sta);
1654 ath_dbg(common, CONFIG,
1655 "Add station: %pM\n", sta->addr);
1656 } else if (old_state == IEEE80211_STA_NONE &&
1657 new_state == IEEE80211_STA_NOTEXIST) {
1658 ret = ath9k_sta_remove(hw, vif, sta);
1659 ath_dbg(common, CONFIG,
1660 "Remove station: %pM\n", sta->addr);
1663 if (ath9k_is_chanctx_enabled()) {
1664 if (vif->type == NL80211_IFTYPE_STATION) {
1665 if (old_state == IEEE80211_STA_ASSOC &&
1666 new_state == IEEE80211_STA_AUTHORIZED)
1667 ath_chanctx_event(sc, vif,
1668 ATH_CHANCTX_EVENT_AUTHORIZED);
1675 static void ath9k_sta_set_tx_filter(struct ath_hw *ah,
1676 struct ath_node *an,
1681 for (i = 0; i < ARRAY_SIZE(an->key_idx); i++) {
1682 if (!an->key_idx[i])
1684 ath9k_hw_set_tx_filter(ah, an->key_idx[i], set);
1688 static void ath9k_sta_notify(struct ieee80211_hw *hw,
1689 struct ieee80211_vif *vif,
1690 enum sta_notify_cmd cmd,
1691 struct ieee80211_sta *sta)
1693 struct ath_softc *sc = hw->priv;
1694 struct ath_node *an = (struct ath_node *) sta->drv_priv;
1697 case STA_NOTIFY_SLEEP:
1698 an->sleeping = true;
1699 ath_tx_aggr_sleep(sta, sc, an);
1700 ath9k_sta_set_tx_filter(sc->sc_ah, an, true);
1702 case STA_NOTIFY_AWAKE:
1703 ath9k_sta_set_tx_filter(sc->sc_ah, an, false);
1704 an->sleeping = false;
1705 ath_tx_aggr_wakeup(sc, an);
1710 static int ath9k_conf_tx(struct ieee80211_hw *hw,
1711 struct ieee80211_vif *vif, u16 queue,
1712 const struct ieee80211_tx_queue_params *params)
1714 struct ath_softc *sc = hw->priv;
1715 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1716 struct ath_txq *txq;
1717 struct ath9k_tx_queue_info qi;
1720 if (queue >= IEEE80211_NUM_ACS)
1723 txq = sc->tx.txq_map[queue];
1725 ath9k_ps_wakeup(sc);
1726 mutex_lock(&sc->mutex);
1728 memset(&qi, 0, sizeof(struct ath9k_tx_queue_info));
1730 qi.tqi_aifs = params->aifs;
1731 qi.tqi_cwmin = params->cw_min;
1732 qi.tqi_cwmax = params->cw_max;
1733 qi.tqi_burstTime = params->txop * 32;
1735 ath_dbg(common, CONFIG,
1736 "Configure tx [queue/halq] [%d/%d], aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
1737 queue, txq->axq_qnum, params->aifs, params->cw_min,
1738 params->cw_max, params->txop);
1740 ath_update_max_aggr_framelen(sc, queue, qi.tqi_burstTime);
1741 ret = ath_txq_update(sc, txq->axq_qnum, &qi);
1743 ath_err(common, "TXQ Update failed\n");
1745 mutex_unlock(&sc->mutex);
1746 ath9k_ps_restore(sc);
1751 static int ath9k_set_key(struct ieee80211_hw *hw,
1752 enum set_key_cmd cmd,
1753 struct ieee80211_vif *vif,
1754 struct ieee80211_sta *sta,
1755 struct ieee80211_key_conf *key)
1757 struct ath_softc *sc = hw->priv;
1758 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1759 struct ath_node *an = NULL;
1762 if (ath9k_modparam_nohwcrypt)
1765 if ((vif->type == NL80211_IFTYPE_ADHOC ||
1766 vif->type == NL80211_IFTYPE_MESH_POINT) &&
1767 (key->cipher == WLAN_CIPHER_SUITE_TKIP ||
1768 key->cipher == WLAN_CIPHER_SUITE_CCMP) &&
1769 !(key->flags & IEEE80211_KEY_FLAG_PAIRWISE)) {
1771 * For now, disable hw crypto for the RSN IBSS group keys. This
1772 * could be optimized in the future to use a modified key cache
1773 * design to support per-STA RX GTK, but until that gets
1774 * implemented, use of software crypto for group addressed
1775 * frames is a acceptable to allow RSN IBSS to be used.
1780 mutex_lock(&sc->mutex);
1781 ath9k_ps_wakeup(sc);
1782 ath_dbg(common, CONFIG, "Set HW Key %d\n", cmd);
1784 an = (struct ath_node *)sta->drv_priv;
1786 /* Delete pending key cache entries if no more frames are pointing to
1789 for (i = 0; i < ATH_KEYMAX; i++)
1790 ath9k_pending_key_del(sc, i);
1795 ath9k_del_ps_key(sc, vif, sta);
1797 key->hw_key_idx = 0;
1798 ret = ath_key_config(common, vif, sta, key);
1800 key->hw_key_idx = ret;
1801 /* push IV and Michael MIC generation to stack */
1802 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
1803 if (key->cipher == WLAN_CIPHER_SUITE_TKIP)
1804 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
1805 if (sc->sc_ah->sw_mgmt_crypto_tx &&
1806 key->cipher == WLAN_CIPHER_SUITE_CCMP)
1807 key->flags |= IEEE80211_KEY_FLAG_SW_MGMT_TX;
1810 if (an && key->hw_key_idx) {
1811 for (i = 0; i < ARRAY_SIZE(an->key_idx); i++) {
1814 an->key_idx[i] = key->hw_key_idx;
1817 WARN_ON(i == ARRAY_SIZE(an->key_idx));
1821 if (ath9k_txq_has_key(sc, key->hw_key_idx)) {
1822 /* Delay key cache entry deletion until there are no
1823 * remaining TXQ frames pointing to this entry.
1825 set_bit(key->hw_key_idx, sc->sc_ah->pending_del_keymap);
1826 ath_hw_keysetmac(common, key->hw_key_idx, NULL);
1828 ath_key_delete(common, key->hw_key_idx);
1831 for (i = 0; i < ARRAY_SIZE(an->key_idx); i++) {
1832 if (an->key_idx[i] != key->hw_key_idx)
1838 key->hw_key_idx = 0;
1844 ath9k_ps_restore(sc);
1845 mutex_unlock(&sc->mutex);
1850 static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
1851 struct ieee80211_vif *vif,
1852 struct ieee80211_bss_conf *bss_conf,
1856 (BSS_CHANGED_ASSOC | \
1857 BSS_CHANGED_IBSS | \
1858 BSS_CHANGED_BEACON_ENABLED)
1860 struct ath_softc *sc = hw->priv;
1861 struct ath_hw *ah = sc->sc_ah;
1862 struct ath_common *common = ath9k_hw_common(ah);
1863 struct ath_vif *avp = (void *)vif->drv_priv;
1866 ath9k_ps_wakeup(sc);
1867 mutex_lock(&sc->mutex);
1869 if (changed & BSS_CHANGED_ASSOC) {
1870 ath_dbg(common, CONFIG, "BSSID %pM Changed ASSOC %d\n",
1871 bss_conf->bssid, bss_conf->assoc);
1873 memcpy(avp->bssid, bss_conf->bssid, ETH_ALEN);
1874 avp->aid = bss_conf->aid;
1875 avp->assoc = bss_conf->assoc;
1877 ath9k_calculate_summary_state(sc, avp->chanctx);
1880 if ((changed & BSS_CHANGED_IBSS) ||
1881 (changed & BSS_CHANGED_OCB)) {
1882 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
1883 common->curaid = bss_conf->aid;
1884 ath9k_hw_write_associd(sc->sc_ah);
1887 if ((changed & BSS_CHANGED_BEACON_ENABLED) ||
1888 (changed & BSS_CHANGED_BEACON_INT) ||
1889 (changed & BSS_CHANGED_BEACON_INFO)) {
1890 ath9k_calculate_summary_state(sc, avp->chanctx);
1893 if ((avp->chanctx == sc->cur_chan) &&
1894 (changed & BSS_CHANGED_ERP_SLOT)) {
1895 if (bss_conf->use_short_slot)
1900 if (vif->type == NL80211_IFTYPE_AP) {
1902 * Defer update, so that connected stations can adjust
1903 * their settings at the same time.
1904 * See beacon.c for more details
1906 sc->beacon.slottime = slottime;
1907 sc->beacon.updateslot = UPDATE;
1909 ah->slottime = slottime;
1910 ath9k_hw_init_global_settings(ah);
1914 if (changed & BSS_CHANGED_P2P_PS)
1915 ath9k_p2p_bss_info_changed(sc, vif);
1917 if (changed & CHECK_ANI)
1920 if (changed & BSS_CHANGED_TXPOWER) {
1921 ath_dbg(common, CONFIG, "vif %pM power %d dbm power_type %d\n",
1922 vif->addr, bss_conf->txpower, bss_conf->txpower_type);
1923 ath9k_set_txpower(sc, vif);
1926 mutex_unlock(&sc->mutex);
1927 ath9k_ps_restore(sc);
1932 static u64 ath9k_get_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
1934 struct ath_softc *sc = hw->priv;
1935 struct ath_vif *avp = (void *)vif->drv_priv;
1938 mutex_lock(&sc->mutex);
1939 ath9k_ps_wakeup(sc);
1940 /* Get current TSF either from HW or kernel time. */
1941 if (sc->cur_chan == avp->chanctx) {
1942 tsf = ath9k_hw_gettsf64(sc->sc_ah);
1944 tsf = sc->cur_chan->tsf_val +
1945 ath9k_hw_get_tsf_offset(&sc->cur_chan->tsf_ts, NULL);
1947 tsf += le64_to_cpu(avp->tsf_adjust);
1948 ath9k_ps_restore(sc);
1949 mutex_unlock(&sc->mutex);
1954 static void ath9k_set_tsf(struct ieee80211_hw *hw,
1955 struct ieee80211_vif *vif,
1958 struct ath_softc *sc = hw->priv;
1959 struct ath_vif *avp = (void *)vif->drv_priv;
1961 mutex_lock(&sc->mutex);
1962 ath9k_ps_wakeup(sc);
1963 tsf -= le64_to_cpu(avp->tsf_adjust);
1964 getrawmonotonic(&avp->chanctx->tsf_ts);
1965 if (sc->cur_chan == avp->chanctx)
1966 ath9k_hw_settsf64(sc->sc_ah, tsf);
1967 avp->chanctx->tsf_val = tsf;
1968 ath9k_ps_restore(sc);
1969 mutex_unlock(&sc->mutex);
1972 static void ath9k_reset_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
1974 struct ath_softc *sc = hw->priv;
1975 struct ath_vif *avp = (void *)vif->drv_priv;
1977 mutex_lock(&sc->mutex);
1979 ath9k_ps_wakeup(sc);
1980 getrawmonotonic(&avp->chanctx->tsf_ts);
1981 if (sc->cur_chan == avp->chanctx)
1982 ath9k_hw_reset_tsf(sc->sc_ah);
1983 avp->chanctx->tsf_val = 0;
1984 ath9k_ps_restore(sc);
1986 mutex_unlock(&sc->mutex);
1989 static int ath9k_ampdu_action(struct ieee80211_hw *hw,
1990 struct ieee80211_vif *vif,
1991 struct ieee80211_ampdu_params *params)
1993 struct ath_softc *sc = hw->priv;
1994 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1997 struct ieee80211_sta *sta = params->sta;
1998 enum ieee80211_ampdu_mlme_action action = params->action;
1999 u16 tid = params->tid;
2000 u16 *ssn = ¶ms->ssn;
2002 mutex_lock(&sc->mutex);
2005 case IEEE80211_AMPDU_RX_START:
2007 case IEEE80211_AMPDU_RX_STOP:
2009 case IEEE80211_AMPDU_TX_START:
2010 if (ath9k_is_chanctx_enabled()) {
2011 if (test_bit(ATH_OP_SCANNING, &common->op_flags)) {
2016 ath9k_ps_wakeup(sc);
2017 ret = ath_tx_aggr_start(sc, sta, tid, ssn);
2019 ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
2020 ath9k_ps_restore(sc);
2022 case IEEE80211_AMPDU_TX_STOP_FLUSH:
2023 case IEEE80211_AMPDU_TX_STOP_FLUSH_CONT:
2025 case IEEE80211_AMPDU_TX_STOP_CONT:
2026 ath9k_ps_wakeup(sc);
2027 ath_tx_aggr_stop(sc, sta, tid);
2029 ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
2030 ath9k_ps_restore(sc);
2032 case IEEE80211_AMPDU_TX_OPERATIONAL:
2033 ath9k_ps_wakeup(sc);
2034 ath_tx_aggr_resume(sc, sta, tid);
2035 ath9k_ps_restore(sc);
2038 ath_err(ath9k_hw_common(sc->sc_ah), "Unknown AMPDU action\n");
2041 mutex_unlock(&sc->mutex);
2046 static int ath9k_get_survey(struct ieee80211_hw *hw, int idx,
2047 struct survey_info *survey)
2049 struct ath_softc *sc = hw->priv;
2050 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2051 struct ieee80211_supported_band *sband;
2052 struct ieee80211_channel *chan;
2055 if (IS_ENABLED(CONFIG_ATH9K_TX99))
2058 spin_lock_bh(&common->cc_lock);
2060 ath_update_survey_stats(sc);
2062 sband = hw->wiphy->bands[NL80211_BAND_2GHZ];
2063 if (sband && idx >= sband->n_channels) {
2064 idx -= sband->n_channels;
2069 sband = hw->wiphy->bands[NL80211_BAND_5GHZ];
2071 if (!sband || idx >= sband->n_channels) {
2072 spin_unlock_bh(&common->cc_lock);
2076 chan = &sband->channels[idx];
2077 pos = chan->hw_value;
2078 memcpy(survey, &sc->survey[pos], sizeof(*survey));
2079 survey->channel = chan;
2080 spin_unlock_bh(&common->cc_lock);
2085 static void ath9k_enable_dynack(struct ath_softc *sc)
2087 #ifdef CONFIG_ATH9K_DYNACK
2089 struct ath_hw *ah = sc->sc_ah;
2091 ath_dynack_reset(ah);
2093 ah->dynack.enabled = true;
2094 rfilt = ath_calcrxfilter(sc);
2095 ath9k_hw_setrxfilter(ah, rfilt);
2099 static void ath9k_set_coverage_class(struct ieee80211_hw *hw,
2102 struct ath_softc *sc = hw->priv;
2103 struct ath_hw *ah = sc->sc_ah;
2105 if (IS_ENABLED(CONFIG_ATH9K_TX99))
2108 mutex_lock(&sc->mutex);
2110 if (coverage_class >= 0) {
2111 ah->coverage_class = coverage_class;
2112 if (ah->dynack.enabled) {
2115 ah->dynack.enabled = false;
2116 rfilt = ath_calcrxfilter(sc);
2117 ath9k_hw_setrxfilter(ah, rfilt);
2119 ath9k_ps_wakeup(sc);
2120 ath9k_hw_init_global_settings(ah);
2121 ath9k_ps_restore(sc);
2122 } else if (!ah->dynack.enabled) {
2123 ath9k_enable_dynack(sc);
2126 mutex_unlock(&sc->mutex);
2129 static bool ath9k_has_tx_pending(struct ath_softc *sc,
2134 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
2135 if (!ATH_TXQ_SETUP(sc, i))
2138 npend = ath9k_has_pending_frames(sc, &sc->tx.txq[i],
2147 static void ath9k_flush(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
2148 u32 queues, bool drop)
2150 struct ath_softc *sc = hw->priv;
2151 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2153 if (ath9k_is_chanctx_enabled()) {
2154 if (!test_bit(ATH_OP_MULTI_CHANNEL, &common->op_flags))
2158 * If MCC is active, extend the flush timeout
2159 * and wait for the HW/SW queues to become
2160 * empty. This needs to be done outside the
2161 * sc->mutex lock to allow the channel scheduler
2162 * to switch channel contexts.
2164 * The vif queues have been stopped in mac80211,
2165 * so there won't be any incoming frames.
2167 __ath9k_flush(hw, queues, drop, true, true);
2171 mutex_lock(&sc->mutex);
2172 __ath9k_flush(hw, queues, drop, true, false);
2173 mutex_unlock(&sc->mutex);
2176 void __ath9k_flush(struct ieee80211_hw *hw, u32 queues, bool drop,
2177 bool sw_pending, bool timeout_override)
2179 struct ath_softc *sc = hw->priv;
2180 struct ath_hw *ah = sc->sc_ah;
2181 struct ath_common *common = ath9k_hw_common(ah);
2185 cancel_delayed_work_sync(&sc->tx_complete_work);
2187 if (ah->ah_flags & AH_UNPLUGGED) {
2188 ath_dbg(common, ANY, "Device has been unplugged!\n");
2192 if (test_bit(ATH_OP_INVALID, &common->op_flags)) {
2193 ath_dbg(common, ANY, "Device not present\n");
2197 spin_lock_bh(&sc->chan_lock);
2198 if (timeout_override)
2201 timeout = sc->cur_chan->flush_timeout;
2202 spin_unlock_bh(&sc->chan_lock);
2204 ath_dbg(common, CHAN_CTX,
2205 "Flush timeout: %d\n", jiffies_to_msecs(timeout));
2207 if (wait_event_timeout(sc->tx_wait, !ath9k_has_tx_pending(sc, sw_pending),
2212 ath9k_ps_wakeup(sc);
2213 spin_lock_bh(&sc->sc_pcu_lock);
2214 drain_txq = ath_drain_all_txq(sc);
2215 spin_unlock_bh(&sc->sc_pcu_lock);
2218 ath_reset(sc, NULL);
2220 ath9k_ps_restore(sc);
2223 ieee80211_queue_delayed_work(hw, &sc->tx_complete_work, 0);
2226 static bool ath9k_tx_frames_pending(struct ieee80211_hw *hw)
2228 struct ath_softc *sc = hw->priv;
2230 return ath9k_has_tx_pending(sc, true);
2233 static int ath9k_tx_last_beacon(struct ieee80211_hw *hw)
2235 struct ath_softc *sc = hw->priv;
2236 struct ath_hw *ah = sc->sc_ah;
2237 struct ieee80211_vif *vif;
2238 struct ath_vif *avp;
2240 struct ath_tx_status ts;
2241 bool edma = !!(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA);
2244 vif = sc->beacon.bslot[0];
2248 if (!vif->bss_conf.enable_beacon)
2251 avp = (void *)vif->drv_priv;
2253 if (!sc->beacon.tx_processed && !edma) {
2254 tasklet_disable(&sc->bcon_tasklet);
2257 if (!bf || !bf->bf_mpdu)
2260 status = ath9k_hw_txprocdesc(ah, bf->bf_desc, &ts);
2261 if (status == -EINPROGRESS)
2264 sc->beacon.tx_processed = true;
2265 sc->beacon.tx_last = !(ts.ts_status & ATH9K_TXERR_MASK);
2268 tasklet_enable(&sc->bcon_tasklet);
2271 return sc->beacon.tx_last;
2274 static int ath9k_get_stats(struct ieee80211_hw *hw,
2275 struct ieee80211_low_level_stats *stats)
2277 struct ath_softc *sc = hw->priv;
2278 struct ath_hw *ah = sc->sc_ah;
2279 struct ath9k_mib_stats *mib_stats = &ah->ah_mibStats;
2281 stats->dot11ACKFailureCount = mib_stats->ackrcv_bad;
2282 stats->dot11RTSFailureCount = mib_stats->rts_bad;
2283 stats->dot11FCSErrorCount = mib_stats->fcs_bad;
2284 stats->dot11RTSSuccessCount = mib_stats->rts_good;
2288 static u32 fill_chainmask(u32 cap, u32 new)
2293 for (i = 0; cap && new; i++, cap >>= 1) {
2294 if (!(cap & BIT(0)))
2306 static bool validate_antenna_mask(struct ath_hw *ah, u32 val)
2308 if (AR_SREV_9300_20_OR_LATER(ah))
2311 switch (val & 0x7) {
2317 return (ah->caps.rx_chainmask == 1);
2323 static int ath9k_set_antenna(struct ieee80211_hw *hw, u32 tx_ant, u32 rx_ant)
2325 struct ath_softc *sc = hw->priv;
2326 struct ath_hw *ah = sc->sc_ah;
2328 if (ah->caps.rx_chainmask != 1)
2331 if (!validate_antenna_mask(ah, rx_ant) || !tx_ant)
2334 sc->ant_rx = rx_ant;
2335 sc->ant_tx = tx_ant;
2337 if (ah->caps.rx_chainmask == 1)
2340 /* AR9100 runs into calibration issues if not all rx chains are enabled */
2341 if (AR_SREV_9100(ah))
2342 ah->rxchainmask = 0x7;
2344 ah->rxchainmask = fill_chainmask(ah->caps.rx_chainmask, rx_ant);
2346 ah->txchainmask = fill_chainmask(ah->caps.tx_chainmask, tx_ant);
2347 ath9k_cmn_reload_chainmask(ah);
2352 static int ath9k_get_antenna(struct ieee80211_hw *hw, u32 *tx_ant, u32 *rx_ant)
2354 struct ath_softc *sc = hw->priv;
2356 *tx_ant = sc->ant_tx;
2357 *rx_ant = sc->ant_rx;
2361 static void ath9k_sw_scan_start(struct ieee80211_hw *hw,
2362 struct ieee80211_vif *vif,
2365 struct ath_softc *sc = hw->priv;
2366 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2367 set_bit(ATH_OP_SCANNING, &common->op_flags);
2370 static void ath9k_sw_scan_complete(struct ieee80211_hw *hw,
2371 struct ieee80211_vif *vif)
2373 struct ath_softc *sc = hw->priv;
2374 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2375 clear_bit(ATH_OP_SCANNING, &common->op_flags);
2378 #ifdef CONFIG_ATH9K_CHANNEL_CONTEXT
2380 static void ath9k_cancel_pending_offchannel(struct ath_softc *sc)
2382 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2384 if (sc->offchannel.roc_vif) {
2385 ath_dbg(common, CHAN_CTX,
2386 "%s: Aborting RoC\n", __func__);
2388 del_timer_sync(&sc->offchannel.timer);
2389 if (sc->offchannel.state >= ATH_OFFCHANNEL_ROC_START)
2390 ath_roc_complete(sc, ATH_ROC_COMPLETE_ABORT);
2393 if (test_bit(ATH_OP_SCANNING, &common->op_flags)) {
2394 ath_dbg(common, CHAN_CTX,
2395 "%s: Aborting HW scan\n", __func__);
2397 del_timer_sync(&sc->offchannel.timer);
2398 ath_scan_complete(sc, true);
2402 static int ath9k_hw_scan(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
2403 struct ieee80211_scan_request *hw_req)
2405 struct cfg80211_scan_request *req = &hw_req->req;
2406 struct ath_softc *sc = hw->priv;
2407 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2410 mutex_lock(&sc->mutex);
2412 if (WARN_ON(sc->offchannel.scan_req)) {
2417 ath9k_ps_wakeup(sc);
2418 set_bit(ATH_OP_SCANNING, &common->op_flags);
2419 sc->offchannel.scan_vif = vif;
2420 sc->offchannel.scan_req = req;
2421 sc->offchannel.scan_idx = 0;
2423 ath_dbg(common, CHAN_CTX, "HW scan request received on vif: %pM\n",
2426 if (sc->offchannel.state == ATH_OFFCHANNEL_IDLE) {
2427 ath_dbg(common, CHAN_CTX, "Starting HW scan\n");
2428 ath_offchannel_next(sc);
2432 mutex_unlock(&sc->mutex);
2437 static void ath9k_cancel_hw_scan(struct ieee80211_hw *hw,
2438 struct ieee80211_vif *vif)
2440 struct ath_softc *sc = hw->priv;
2441 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2443 ath_dbg(common, CHAN_CTX, "Cancel HW scan on vif: %pM\n", vif->addr);
2445 mutex_lock(&sc->mutex);
2446 del_timer_sync(&sc->offchannel.timer);
2447 ath_scan_complete(sc, true);
2448 mutex_unlock(&sc->mutex);
2451 static int ath9k_remain_on_channel(struct ieee80211_hw *hw,
2452 struct ieee80211_vif *vif,
2453 struct ieee80211_channel *chan, int duration,
2454 enum ieee80211_roc_type type)
2456 struct ath_softc *sc = hw->priv;
2457 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2460 mutex_lock(&sc->mutex);
2462 if (WARN_ON(sc->offchannel.roc_vif)) {
2467 ath9k_ps_wakeup(sc);
2468 sc->offchannel.roc_vif = vif;
2469 sc->offchannel.roc_chan = chan;
2470 sc->offchannel.roc_duration = duration;
2472 ath_dbg(common, CHAN_CTX,
2473 "RoC request on vif: %pM, type: %d duration: %d\n",
2474 vif->addr, type, duration);
2476 if (sc->offchannel.state == ATH_OFFCHANNEL_IDLE) {
2477 ath_dbg(common, CHAN_CTX, "Starting RoC period\n");
2478 ath_offchannel_next(sc);
2482 mutex_unlock(&sc->mutex);
2487 static int ath9k_cancel_remain_on_channel(struct ieee80211_hw *hw)
2489 struct ath_softc *sc = hw->priv;
2490 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2492 mutex_lock(&sc->mutex);
2494 ath_dbg(common, CHAN_CTX, "Cancel RoC\n");
2495 del_timer_sync(&sc->offchannel.timer);
2497 if (sc->offchannel.roc_vif) {
2498 if (sc->offchannel.state >= ATH_OFFCHANNEL_ROC_START)
2499 ath_roc_complete(sc, ATH_ROC_COMPLETE_CANCEL);
2502 mutex_unlock(&sc->mutex);
2507 static int ath9k_add_chanctx(struct ieee80211_hw *hw,
2508 struct ieee80211_chanctx_conf *conf)
2510 struct ath_softc *sc = hw->priv;
2511 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2512 struct ath_chanctx *ctx, **ptr;
2515 mutex_lock(&sc->mutex);
2517 ath_for_each_chanctx(sc, ctx) {
2521 ptr = (void *) conf->drv_priv;
2523 ctx->assigned = true;
2524 pos = ctx - &sc->chanctx[0];
2525 ctx->hw_queue_base = pos * IEEE80211_NUM_ACS;
2527 ath_dbg(common, CHAN_CTX,
2528 "Add channel context: %d MHz\n",
2529 conf->def.chan->center_freq);
2531 ath_chanctx_set_channel(sc, ctx, &conf->def);
2533 mutex_unlock(&sc->mutex);
2537 mutex_unlock(&sc->mutex);
2542 static void ath9k_remove_chanctx(struct ieee80211_hw *hw,
2543 struct ieee80211_chanctx_conf *conf)
2545 struct ath_softc *sc = hw->priv;
2546 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2547 struct ath_chanctx *ctx = ath_chanctx_get(conf);
2549 mutex_lock(&sc->mutex);
2551 ath_dbg(common, CHAN_CTX,
2552 "Remove channel context: %d MHz\n",
2553 conf->def.chan->center_freq);
2555 ctx->assigned = false;
2556 ctx->hw_queue_base = 0;
2557 ath_chanctx_event(sc, NULL, ATH_CHANCTX_EVENT_UNASSIGN);
2559 mutex_unlock(&sc->mutex);
2562 static void ath9k_change_chanctx(struct ieee80211_hw *hw,
2563 struct ieee80211_chanctx_conf *conf,
2566 struct ath_softc *sc = hw->priv;
2567 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2568 struct ath_chanctx *ctx = ath_chanctx_get(conf);
2570 mutex_lock(&sc->mutex);
2571 ath_dbg(common, CHAN_CTX,
2572 "Change channel context: %d MHz\n",
2573 conf->def.chan->center_freq);
2574 ath_chanctx_set_channel(sc, ctx, &conf->def);
2575 mutex_unlock(&sc->mutex);
2578 static int ath9k_assign_vif_chanctx(struct ieee80211_hw *hw,
2579 struct ieee80211_vif *vif,
2580 struct ieee80211_chanctx_conf *conf)
2582 struct ath_softc *sc = hw->priv;
2583 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2584 struct ath_vif *avp = (void *)vif->drv_priv;
2585 struct ath_chanctx *ctx = ath_chanctx_get(conf);
2588 ath9k_cancel_pending_offchannel(sc);
2590 mutex_lock(&sc->mutex);
2592 ath_dbg(common, CHAN_CTX,
2593 "Assign VIF (addr: %pM, type: %d, p2p: %d) to channel context: %d MHz\n",
2594 vif->addr, vif->type, vif->p2p,
2595 conf->def.chan->center_freq);
2598 ctx->nvifs_assigned++;
2599 list_add_tail(&avp->list, &ctx->vifs);
2600 ath9k_calculate_summary_state(sc, ctx);
2601 for (i = 0; i < IEEE80211_NUM_ACS; i++)
2602 vif->hw_queue[i] = ctx->hw_queue_base + i;
2604 mutex_unlock(&sc->mutex);
2609 static void ath9k_unassign_vif_chanctx(struct ieee80211_hw *hw,
2610 struct ieee80211_vif *vif,
2611 struct ieee80211_chanctx_conf *conf)
2613 struct ath_softc *sc = hw->priv;
2614 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2615 struct ath_vif *avp = (void *)vif->drv_priv;
2616 struct ath_chanctx *ctx = ath_chanctx_get(conf);
2619 ath9k_cancel_pending_offchannel(sc);
2621 mutex_lock(&sc->mutex);
2623 ath_dbg(common, CHAN_CTX,
2624 "Remove VIF (addr: %pM, type: %d, p2p: %d) from channel context: %d MHz\n",
2625 vif->addr, vif->type, vif->p2p,
2626 conf->def.chan->center_freq);
2628 avp->chanctx = NULL;
2629 ctx->nvifs_assigned--;
2630 list_del(&avp->list);
2631 ath9k_calculate_summary_state(sc, ctx);
2632 for (ac = 0; ac < IEEE80211_NUM_ACS; ac++)
2633 vif->hw_queue[ac] = IEEE80211_INVAL_HW_QUEUE;
2635 mutex_unlock(&sc->mutex);
2638 static void ath9k_mgd_prepare_tx(struct ieee80211_hw *hw,
2639 struct ieee80211_vif *vif)
2641 struct ath_softc *sc = hw->priv;
2642 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2643 struct ath_vif *avp = (struct ath_vif *) vif->drv_priv;
2644 struct ath_beacon_config *cur_conf;
2645 struct ath_chanctx *go_ctx;
2646 unsigned long timeout;
2647 bool changed = false;
2650 if (!test_bit(ATH_OP_MULTI_CHANNEL, &common->op_flags))
2656 mutex_lock(&sc->mutex);
2658 spin_lock_bh(&sc->chan_lock);
2659 if (sc->next_chan || (sc->cur_chan != avp->chanctx))
2661 spin_unlock_bh(&sc->chan_lock);
2666 ath9k_cancel_pending_offchannel(sc);
2668 go_ctx = ath_is_go_chanctx_present(sc);
2672 * Wait till the GO interface gets a chance
2673 * to send out an NoA.
2675 spin_lock_bh(&sc->chan_lock);
2676 sc->sched.mgd_prepare_tx = true;
2677 cur_conf = &go_ctx->beacon;
2678 beacon_int = TU_TO_USEC(cur_conf->beacon_interval);
2679 spin_unlock_bh(&sc->chan_lock);
2681 timeout = usecs_to_jiffies(beacon_int * 2);
2682 init_completion(&sc->go_beacon);
2684 mutex_unlock(&sc->mutex);
2686 if (wait_for_completion_timeout(&sc->go_beacon,
2688 ath_dbg(common, CHAN_CTX,
2689 "Failed to send new NoA\n");
2691 spin_lock_bh(&sc->chan_lock);
2692 sc->sched.mgd_prepare_tx = false;
2693 spin_unlock_bh(&sc->chan_lock);
2696 mutex_lock(&sc->mutex);
2699 ath_dbg(common, CHAN_CTX,
2700 "%s: Set chanctx state to FORCE_ACTIVE for vif: %pM\n",
2701 __func__, vif->addr);
2703 spin_lock_bh(&sc->chan_lock);
2704 sc->next_chan = avp->chanctx;
2705 sc->sched.state = ATH_CHANCTX_STATE_FORCE_ACTIVE;
2706 spin_unlock_bh(&sc->chan_lock);
2708 ath_chanctx_set_next(sc, true);
2710 mutex_unlock(&sc->mutex);
2713 void ath9k_fill_chanctx_ops(void)
2715 if (!ath9k_is_chanctx_enabled())
2718 ath9k_ops.hw_scan = ath9k_hw_scan;
2719 ath9k_ops.cancel_hw_scan = ath9k_cancel_hw_scan;
2720 ath9k_ops.remain_on_channel = ath9k_remain_on_channel;
2721 ath9k_ops.cancel_remain_on_channel = ath9k_cancel_remain_on_channel;
2722 ath9k_ops.add_chanctx = ath9k_add_chanctx;
2723 ath9k_ops.remove_chanctx = ath9k_remove_chanctx;
2724 ath9k_ops.change_chanctx = ath9k_change_chanctx;
2725 ath9k_ops.assign_vif_chanctx = ath9k_assign_vif_chanctx;
2726 ath9k_ops.unassign_vif_chanctx = ath9k_unassign_vif_chanctx;
2727 ath9k_ops.mgd_prepare_tx = ath9k_mgd_prepare_tx;
2732 static int ath9k_get_txpower(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
2735 struct ath_softc *sc = hw->priv;
2736 struct ath_vif *avp = (void *)vif->drv_priv;
2738 mutex_lock(&sc->mutex);
2740 *dbm = avp->chanctx->cur_txpower;
2742 *dbm = sc->cur_chan->cur_txpower;
2743 mutex_unlock(&sc->mutex);
2750 struct ieee80211_ops ath9k_ops = {
2752 .start = ath9k_start,
2754 .add_interface = ath9k_add_interface,
2755 .change_interface = ath9k_change_interface,
2756 .remove_interface = ath9k_remove_interface,
2757 .config = ath9k_config,
2758 .configure_filter = ath9k_configure_filter,
2759 .sta_state = ath9k_sta_state,
2760 .sta_notify = ath9k_sta_notify,
2761 .conf_tx = ath9k_conf_tx,
2762 .bss_info_changed = ath9k_bss_info_changed,
2763 .set_key = ath9k_set_key,
2764 .get_tsf = ath9k_get_tsf,
2765 .set_tsf = ath9k_set_tsf,
2766 .reset_tsf = ath9k_reset_tsf,
2767 .ampdu_action = ath9k_ampdu_action,
2768 .get_survey = ath9k_get_survey,
2769 .rfkill_poll = ath9k_rfkill_poll_state,
2770 .set_coverage_class = ath9k_set_coverage_class,
2771 .flush = ath9k_flush,
2772 .tx_frames_pending = ath9k_tx_frames_pending,
2773 .tx_last_beacon = ath9k_tx_last_beacon,
2774 .release_buffered_frames = ath9k_release_buffered_frames,
2775 .get_stats = ath9k_get_stats,
2776 .set_antenna = ath9k_set_antenna,
2777 .get_antenna = ath9k_get_antenna,
2779 #ifdef CONFIG_ATH9K_WOW
2780 .suspend = ath9k_suspend,
2781 .resume = ath9k_resume,
2782 .set_wakeup = ath9k_set_wakeup,
2785 #ifdef CONFIG_ATH9K_DEBUGFS
2786 .get_et_sset_count = ath9k_get_et_sset_count,
2787 .get_et_stats = ath9k_get_et_stats,
2788 .get_et_strings = ath9k_get_et_strings,
2791 #if defined(CONFIG_MAC80211_DEBUGFS) && defined(CONFIG_ATH9K_STATION_STATISTICS)
2792 .sta_add_debugfs = ath9k_sta_add_debugfs,
2794 .sw_scan_start = ath9k_sw_scan_start,
2795 .sw_scan_complete = ath9k_sw_scan_complete,
2796 .get_txpower = ath9k_get_txpower,