drivers/net/wireless/ath/ath9k/main.c

   1 /*
   2  * Copyright (c) 2008-2011 Atheros Communications Inc.
   3  *
   4  * Permission to use, copy, modify, and/or distribute this software for any
   5  * purpose with or without fee is hereby granted, provided that the above
   6  * copyright notice and this permission notice appear in all copies.
   7  *
   8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
   9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15  */
  16
  17 #include <linux/nl80211.h>
  18 #include <linux/delay.h>
  19 #include "ath9k.h"
  20 #include "btcoex.h"
  21
  22 u8 ath9k_parse_mpdudensity(u8 mpdudensity)
  23 {
  24         /*
  25          * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
  26          *   0 for no restriction
  27          *   1 for 1/4 us
  28          *   2 for 1/2 us
  29          *   3 for 1 us
  30          *   4 for 2 us
  31          *   5 for 4 us
  32          *   6 for 8 us
  33          *   7 for 16 us
  34          */
  35         switch (mpdudensity) {
  36         case 0:
  37                 return 0;
  38         case 1:
  39         case 2:
  40         case 3:
  41                 /* Our lower layer calculations limit our precision to
  42                    1 microsecond */
  43                 return 1;
  44         case 4:
  45                 return 2;
  46         case 5:
  47                 return 4;
  48         case 6:
  49                 return 8;
  50         case 7:
  51                 return 16;
  52         default:
  53                 return 0;
  54         }
  55 }
  56
  57 static bool ath9k_has_pending_frames(struct ath_softc *sc, struct ath_txq *txq,
  58                                      bool sw_pending)
  59 {
  60         bool pending = false;
  61
  62         spin_lock_bh(&txq->axq_lock);
  63
  64         if (txq->axq_depth) {
  65                 pending = true;
  66                 goto out;
  67         }
  68
  69         if (!sw_pending)
  70                 goto out;
  71
  72         if (txq->mac80211_qnum >= 0) {
  73                 struct list_head *list;
  74
  75                 list = &sc->cur_chan->acq[txq->mac80211_qnum];
  76                 if (!list_empty(list))
  77                         pending = true;
  78         }
  79 out:
  80         spin_unlock_bh(&txq->axq_lock);
  81         return pending;
  82 }
  83
  84 static bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode)
  85 {
  86         unsigned long flags;
  87         bool ret;
  88
  89         spin_lock_irqsave(&sc->sc_pm_lock, flags);
  90         ret = ath9k_hw_setpower(sc->sc_ah, mode);
  91         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
  92
  93         return ret;
  94 }
  95
  96 void ath_ps_full_sleep(unsigned long data)
  97 {
  98         struct ath_softc *sc = (struct ath_softc *) data;
  99         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 100         bool reset;
 101
 102         spin_lock(&common->cc_lock);
 103         ath_hw_cycle_counters_update(common);
 104         spin_unlock(&common->cc_lock);
 105
 106         ath9k_hw_setrxabort(sc->sc_ah, 1);
 107         ath9k_hw_stopdmarecv(sc->sc_ah, &reset);
 108
 109         ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_FULL_SLEEP);
 110 }
 111
 112 void ath9k_ps_wakeup(struct ath_softc *sc)
 113 {
 114         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 115         unsigned long flags;
 116         enum ath9k_power_mode power_mode;
 117
 118         spin_lock_irqsave(&sc->sc_pm_lock, flags);
 119         if (++sc->ps_usecount != 1)
 120                 goto unlock;
 121
 122         del_timer_sync(&sc->sleep_timer);
 123         power_mode = sc->sc_ah->power_mode;
 124         ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
 125
 126         /*
 127          * While the hardware is asleep, the cycle counters contain no
 128          * useful data. Better clear them now so that they don't mess up
 129          * survey data results.
 130          */
 131         if (power_mode != ATH9K_PM_AWAKE) {
 132                 spin_lock(&common->cc_lock);
 133                 ath_hw_cycle_counters_update(common);
 134                 memset(&common->cc_survey, 0, sizeof(common->cc_survey));
 135                 memset(&common->cc_ani, 0, sizeof(common->cc_ani));
 136                 spin_unlock(&common->cc_lock);
 137         }
 138
 139  unlock:
 140         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 141 }
 142
 143 void ath9k_ps_restore(struct ath_softc *sc)
 144 {
 145         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 146         enum ath9k_power_mode mode;
 147         unsigned long flags;
 148
 149         spin_lock_irqsave(&sc->sc_pm_lock, flags);
 150         if (--sc->ps_usecount != 0)
 151                 goto unlock;
 152
 153         if (sc->ps_idle) {
 154                 mod_timer(&sc->sleep_timer, jiffies + HZ / 10);
 155                 goto unlock;
 156         }
 157
 158         if (sc->ps_enabled &&
 159                    !(sc->ps_flags & (PS_WAIT_FOR_BEACON |
 160                                      PS_WAIT_FOR_CAB |
 161                                      PS_WAIT_FOR_PSPOLL_DATA |
 162                                      PS_WAIT_FOR_TX_ACK |
 163                                      PS_WAIT_FOR_ANI))) {
 164                 mode = ATH9K_PM_NETWORK_SLEEP;
 165                 if (ath9k_hw_btcoex_is_enabled(sc->sc_ah))
 166                         ath9k_btcoex_stop_gen_timer(sc);
 167         } else {
 168                 goto unlock;
 169         }
 170
 171         spin_lock(&common->cc_lock);
 172         ath_hw_cycle_counters_update(common);
 173         spin_unlock(&common->cc_lock);
 174
 175         ath9k_hw_setpower(sc->sc_ah, mode);
 176
 177  unlock:
 178         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 179 }
 180
 181 static void __ath_cancel_work(struct ath_softc *sc)
 182 {
 183         cancel_work_sync(&sc->paprd_work);
 184         cancel_delayed_work_sync(&sc->tx_complete_work);
 185         cancel_delayed_work_sync(&sc->hw_pll_work);
 186
 187 #ifdef CONFIG_ATH9K_BTCOEX_SUPPORT
 188         if (ath9k_hw_mci_is_enabled(sc->sc_ah))
 189                 cancel_work_sync(&sc->mci_work);
 190 #endif
 191 }
 192
 193 void ath_cancel_work(struct ath_softc *sc)
 194 {
 195         __ath_cancel_work(sc);
 196         cancel_work_sync(&sc->hw_reset_work);
 197 }
 198
 199 void ath_restart_work(struct ath_softc *sc)
 200 {
 201         ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
 202
 203         if (AR_SREV_9340(sc->sc_ah) || AR_SREV_9330(sc->sc_ah))
 204                 ieee80211_queue_delayed_work(sc->hw, &sc->hw_pll_work,
 205                                      msecs_to_jiffies(ATH_PLL_WORK_INTERVAL));
 206
 207         ath_start_ani(sc);
 208 }
 209
 210 static bool ath_prepare_reset(struct ath_softc *sc)
 211 {
 212         struct ath_hw *ah = sc->sc_ah;
 213         bool ret = true;
 214
 215         ieee80211_stop_queues(sc->hw);
 216         ath_stop_ani(sc);
 217         ath9k_hw_disable_interrupts(ah);
 218
 219         if (AR_SREV_9300_20_OR_LATER(ah)) {
 220                 ret &= ath_stoprecv(sc);
 221                 ret &= ath_drain_all_txq(sc);
 222         } else {
 223                 ret &= ath_drain_all_txq(sc);
 224                 ret &= ath_stoprecv(sc);
 225         }
 226
 227         return ret;
 228 }
 229
 230 static bool ath_complete_reset(struct ath_softc *sc, bool start)
 231 {
 232         struct ath_hw *ah = sc->sc_ah;
 233         struct ath_common *common = ath9k_hw_common(ah);
 234         unsigned long flags;
 235
 236         ath9k_calculate_summary_state(sc, sc->cur_chan);
 237         ath_startrecv(sc);
 238         ath9k_cmn_update_txpow(ah, sc->cur_chan->cur_txpower,
 239                                sc->cur_chan->txpower,
 240                                &sc->cur_chan->cur_txpower);
 241         clear_bit(ATH_OP_HW_RESET, &common->op_flags);
 242
 243         if (!sc->cur_chan->offchannel && start) {
 244                 /* restore per chanctx TSF timer */
 245                 if (sc->cur_chan->tsf_val) {
 246                         u32 offset;
 247
 248                         offset = ath9k_hw_get_tsf_offset(&sc->cur_chan->tsf_ts,
 249                                                          NULL);
 250                         ath9k_hw_settsf64(ah, sc->cur_chan->tsf_val + offset);
 251                 }
 252
 253
 254                 if (!test_bit(ATH_OP_BEACONS, &common->op_flags))
 255                         goto work;
 256
 257                 if (ah->opmode == NL80211_IFTYPE_STATION &&
 258                     test_bit(ATH_OP_PRIM_STA_VIF, &common->op_flags)) {
 259                         spin_lock_irqsave(&sc->sc_pm_lock, flags);
 260                         sc->ps_flags |= PS_BEACON_SYNC | PS_WAIT_FOR_BEACON;
 261                         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 262                 } else {
 263                         ath9k_set_beacon(sc);
 264                 }
 265         work:
 266                 ath_restart_work(sc);
 267                 ath_txq_schedule_all(sc);
 268         }
 269
 270         sc->gtt_cnt = 0;
 271
 272         ath9k_hw_set_interrupts(ah);
 273         ath9k_hw_enable_interrupts(ah);
 274         ieee80211_wake_queues(sc->hw);
 275         ath9k_p2p_ps_timer(sc);
 276
 277         return true;
 278 }
 279
 280 static int ath_reset_internal(struct ath_softc *sc, struct ath9k_channel *hchan)
 281 {
 282         struct ath_hw *ah = sc->sc_ah;
 283         struct ath_common *common = ath9k_hw_common(ah);
 284         struct ath9k_hw_cal_data *caldata = NULL;
 285         bool fastcc = true;
 286         int r;
 287
 288         __ath_cancel_work(sc);
 289
 290         disable_irq(sc->irq);
 291         tasklet_disable(&sc->intr_tq);
 292         tasklet_disable(&sc->bcon_tasklet);
 293         spin_lock_bh(&sc->sc_pcu_lock);
 294
 295         if (!sc->cur_chan->offchannel) {
 296                 fastcc = false;
 297                 caldata = &sc->cur_chan->caldata;
 298         }
 299
 300         if (!hchan) {
 301                 fastcc = false;
 302                 hchan = ah->curchan;
 303         }
 304
 305         if (!hchan) {
 306                 fastcc = false;
 307                 hchan = ath9k_cmn_get_channel(sc->hw, ah, &sc->cur_chan->chandef);
 308         }
 309
 310         if (!ath_prepare_reset(sc))
 311                 fastcc = false;
 312
 313         if (ath9k_is_chanctx_enabled())
 314                 fastcc = false;
 315
 316         spin_lock_bh(&sc->chan_lock);
 317         sc->cur_chandef = sc->cur_chan->chandef;
 318         spin_unlock_bh(&sc->chan_lock);
 319
 320         ath_dbg(common, CONFIG, "Reset to %u MHz, HT40: %d fastcc: %d\n",
 321                 hchan->channel, IS_CHAN_HT40(hchan), fastcc);
 322
 323         r = ath9k_hw_reset(ah, hchan, caldata, fastcc);
 324         if (r) {
 325                 ath_err(common,
 326                         "Unable to reset channel, reset status %d\n", r);
 327
 328                 ath9k_hw_enable_interrupts(ah);
 329                 ath9k_queue_reset(sc, RESET_TYPE_BB_HANG);
 330
 331                 goto out;
 332         }
 333
 334         if (ath9k_hw_mci_is_enabled(sc->sc_ah) &&
 335             sc->cur_chan->offchannel)
 336                 ath9k_mci_set_txpower(sc, true, false);
 337
 338         if (!ath_complete_reset(sc, true))
 339                 r = -EIO;
 340
 341 out:
 342         enable_irq(sc->irq);
 343         spin_unlock_bh(&sc->sc_pcu_lock);
 344         tasklet_enable(&sc->bcon_tasklet);
 345         tasklet_enable(&sc->intr_tq);
 346
 347         return r;
 348 }
 349
 350 static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta,
 351                             struct ieee80211_vif *vif)
 352 {
 353         struct ath_node *an;
 354         an = (struct ath_node *)sta->drv_priv;
 355
 356         an->sc = sc;
 357         an->sta = sta;
 358         an->vif = vif;
 359         memset(&an->key_idx, 0, sizeof(an->key_idx));
 360
 361         ath_tx_node_init(sc, an);
 362
 363         ath_dynack_node_init(sc->sc_ah, an);
 364 }
 365
 366 static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta)
 367 {
 368         struct ath_node *an = (struct ath_node *)sta->drv_priv;
 369         ath_tx_node_cleanup(sc, an);
 370
 371         ath_dynack_node_deinit(sc->sc_ah, an);
 372 }
 373
 374 void ath9k_tasklet(unsigned long data)
 375 {
 376         struct ath_softc *sc = (struct ath_softc *)data;
 377         struct ath_hw *ah = sc->sc_ah;
 378         struct ath_common *common = ath9k_hw_common(ah);
 379         enum ath_reset_type type;
 380         unsigned long flags;
 381         u32 status;
 382         u32 rxmask;
 383
 384         spin_lock_irqsave(&sc->intr_lock, flags);
 385         status = sc->intrstatus;
 386         sc->intrstatus = 0;
 387         spin_unlock_irqrestore(&sc->intr_lock, flags);
 388
 389         ath9k_ps_wakeup(sc);
 390         spin_lock(&sc->sc_pcu_lock);
 391
 392         if (status & ATH9K_INT_FATAL) {
 393                 type = RESET_TYPE_FATAL_INT;
 394                 ath9k_queue_reset(sc, type);
 395                 ath_dbg(common, RESET, "FATAL: Skipping interrupts\n");
 396                 goto out;
 397         }
 398
 399         if ((ah->config.hw_hang_checks & HW_BB_WATCHDOG) &&
 400             (status & ATH9K_INT_BB_WATCHDOG)) {
 401                 spin_lock(&common->cc_lock);
 402                 ath_hw_cycle_counters_update(common);
 403                 ar9003_hw_bb_watchdog_dbg_info(ah);
 404                 spin_unlock(&common->cc_lock);
 405
 406                 if (ar9003_hw_bb_watchdog_check(ah)) {
 407                         type = RESET_TYPE_BB_WATCHDOG;
 408                         ath9k_queue_reset(sc, type);
 409
 410                         ath_dbg(common, RESET,
 411                                 "BB_WATCHDOG: Skipping interrupts\n");
 412                         goto out;
 413                 }
 414         }
 415
 416         if (status & ATH9K_INT_GTT) {
 417                 sc->gtt_cnt++;
 418
 419                 if ((sc->gtt_cnt >= MAX_GTT_CNT) && !ath9k_hw_check_alive(ah)) {
 420                         type = RESET_TYPE_TX_GTT;
 421                         ath9k_queue_reset(sc, type);
 422                         ath_dbg(common, RESET,
 423                                 "GTT: Skipping interrupts\n");
 424                         goto out;
 425                 }
 426         }
 427
 428         spin_lock_irqsave(&sc->sc_pm_lock, flags);
 429         if ((status & ATH9K_INT_TSFOOR) && sc->ps_enabled) {
 430                 /*
 431                  * TSF sync does not look correct; remain awake to sync with
 432                  * the next Beacon.
 433                  */
 434                 ath_dbg(common, PS, "TSFOOR - Sync with next Beacon\n");
 435                 sc->ps_flags |= PS_WAIT_FOR_BEACON | PS_BEACON_SYNC;
 436         }
 437         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 438
 439         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
 440                 rxmask = (ATH9K_INT_RXHP | ATH9K_INT_RXLP | ATH9K_INT_RXEOL |
 441                           ATH9K_INT_RXORN);
 442         else
 443                 rxmask = (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
 444
 445         if (status & rxmask) {
 446                 /* Check for high priority Rx first */
 447                 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
 448                     (status & ATH9K_INT_RXHP))
 449                         ath_rx_tasklet(sc, 0, true);
 450
 451                 ath_rx_tasklet(sc, 0, false);
 452         }
 453
 454         if (status & ATH9K_INT_TX) {
 455                 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
 456                         /*
 457                          * For EDMA chips, TX completion is enabled for the
 458                          * beacon queue, so if a beacon has been transmitted
 459                          * successfully after a GTT interrupt, the GTT counter
 460                          * gets reset to zero here.
 461                          */
 462                         sc->gtt_cnt = 0;
 463
 464                         ath_tx_edma_tasklet(sc);
 465                 } else {
 466                         ath_tx_tasklet(sc);
 467                 }
 468
 469                 wake_up(&sc->tx_wait);
 470         }
 471
 472         if (status & ATH9K_INT_GENTIMER)
 473                 ath_gen_timer_isr(sc->sc_ah);
 474
 475         ath9k_btcoex_handle_interrupt(sc, status);
 476
 477         /* re-enable hardware interrupt */
 478         ath9k_hw_resume_interrupts(ah);
 479 out:
 480         spin_unlock(&sc->sc_pcu_lock);
 481         ath9k_ps_restore(sc);
 482 }
 483
 484 irqreturn_t ath_isr(int irq, void *dev)
 485 {
 486 #define SCHED_INTR (                            \
 487                 ATH9K_INT_FATAL |               \
 488                 ATH9K_INT_BB_WATCHDOG |         \
 489                 ATH9K_INT_RXORN |               \
 490                 ATH9K_INT_RXEOL |               \
 491                 ATH9K_INT_RX |                  \
 492                 ATH9K_INT_RXLP |                \
 493                 ATH9K_INT_RXHP |                \
 494                 ATH9K_INT_TX |                  \
 495                 ATH9K_INT_BMISS |               \
 496                 ATH9K_INT_CST |                 \
 497                 ATH9K_INT_GTT |                 \
 498                 ATH9K_INT_TSFOOR |              \
 499                 ATH9K_INT_GENTIMER |            \
 500                 ATH9K_INT_MCI)
 501
 502         struct ath_softc *sc = dev;
 503         struct ath_hw *ah = sc->sc_ah;
 504         struct ath_common *common = ath9k_hw_common(ah);
 505         enum ath9k_int status;
 506         u32 sync_cause = 0;
 507         bool sched = false;
 508
 509         /*
 510          * The hardware is not ready/present, don't
 511          * touch anything. Note this can happen early
 512          * on if the IRQ is shared.
 513          */
 514         if (!ah || test_bit(ATH_OP_INVALID, &common->op_flags))
 515                 return IRQ_NONE;
 516
 517         /* shared irq, not for us */
 518         if (!ath9k_hw_intrpend(ah))
 519                 return IRQ_NONE;
 520
 521         /*
 522          * Figure out the reason(s) for the interrupt.  Note
 523          * that the hal returns a pseudo-ISR that may include
 524          * bits we haven't explicitly enabled so we mask the
 525          * value to insure we only process bits we requested.
 526          */
 527         ath9k_hw_getisr(ah, &status, &sync_cause); /* NB: clears ISR too */
 528         ath9k_debug_sync_cause(sc, sync_cause);
 529         status &= ah->imask;    /* discard unasked-for bits */
 530
 531         if (test_bit(ATH_OP_HW_RESET, &common->op_flags))
 532                 return IRQ_HANDLED;
 533
 534         /*
 535          * If there are no status bits set, then this interrupt was not
 536          * for me (should have been caught above).
 537          */
 538         if (!status)
 539                 return IRQ_NONE;
 540
 541         /* Cache the status */
 542         spin_lock(&sc->intr_lock);
 543         sc->intrstatus |= status;
 544         spin_unlock(&sc->intr_lock);
 545
 546         if (status & SCHED_INTR)
 547                 sched = true;
 548
 549         /*
 550          * If a FATAL interrupt is received, we have to reset the chip
 551          * immediately.
 552          */
 553         if (status & ATH9K_INT_FATAL)
 554                 goto chip_reset;
 555
 556         if ((ah->config.hw_hang_checks & HW_BB_WATCHDOG) &&
 557             (status & ATH9K_INT_BB_WATCHDOG))
 558                 goto chip_reset;
 559
 560         if (status & ATH9K_INT_SWBA)
 561                 tasklet_schedule(&sc->bcon_tasklet);
 562
 563         if (status & ATH9K_INT_TXURN)
 564                 ath9k_hw_updatetxtriglevel(ah, true);
 565
 566         if (status & ATH9K_INT_RXEOL) {
 567                 ah->imask &= ~(ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
 568                 ath9k_hw_set_interrupts(ah);
 569         }
 570
 571         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
 572                 if (status & ATH9K_INT_TIM_TIMER) {
 573                         if (ATH_DBG_WARN_ON_ONCE(sc->ps_idle))
 574                                 goto chip_reset;
 575                         /* Clear RxAbort bit so that we can
 576                          * receive frames */
 577                         ath9k_setpower(sc, ATH9K_PM_AWAKE);
 578                         spin_lock(&sc->sc_pm_lock);
 579                         ath9k_hw_setrxabort(sc->sc_ah, 0);
 580                         sc->ps_flags |= PS_WAIT_FOR_BEACON;
 581                         spin_unlock(&sc->sc_pm_lock);
 582                 }
 583
 584 chip_reset:
 585
 586         ath_debug_stat_interrupt(sc, status);
 587
 588         if (sched) {
 589                 /* turn off every interrupt */
 590                 ath9k_hw_kill_interrupts(ah);
 591                 tasklet_schedule(&sc->intr_tq);
 592         }
 593
 594         return IRQ_HANDLED;
 595
 596 #undef SCHED_INTR
 597 }
 598
 599 /*
 600  * This function is called when a HW reset cannot be deferred
 601  * and has to be immediate.
 602  */
 603 int ath_reset(struct ath_softc *sc, struct ath9k_channel *hchan)
 604 {
 605         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 606         int r;
 607
 608         ath9k_hw_kill_interrupts(sc->sc_ah);
 609         set_bit(ATH_OP_HW_RESET, &common->op_flags);
 610
 611         ath9k_ps_wakeup(sc);
 612         r = ath_reset_internal(sc, hchan);
 613         ath9k_ps_restore(sc);
 614
 615         return r;
 616 }
 617
 618 /*
 619  * When a HW reset can be deferred, it is added to the
 620  * hw_reset_work workqueue, but we set ATH_OP_HW_RESET before
 621  * queueing.
 622  */
 623 void ath9k_queue_reset(struct ath_softc *sc, enum ath_reset_type type)
 624 {
 625         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 626 #ifdef CONFIG_ATH9K_DEBUGFS
 627         RESET_STAT_INC(sc, type);
 628 #endif
 629         ath9k_hw_kill_interrupts(sc->sc_ah);
 630         set_bit(ATH_OP_HW_RESET, &common->op_flags);
 631         ieee80211_queue_work(sc->hw, &sc->hw_reset_work);
 632 }
 633
 634 void ath_reset_work(struct work_struct *work)
 635 {
 636         struct ath_softc *sc = container_of(work, struct ath_softc, hw_reset_work);
 637
 638         ath9k_ps_wakeup(sc);
 639         ath_reset_internal(sc, NULL);
 640         ath9k_ps_restore(sc);
 641 }
 642
 643 /**********************/
 644 /* mac80211 callbacks */
 645 /**********************/
 646
 647 static int ath9k_start(struct ieee80211_hw *hw)
 648 {
 649         struct ath_softc *sc = hw->priv;
 650         struct ath_hw *ah = sc->sc_ah;
 651         struct ath_common *common = ath9k_hw_common(ah);
 652         struct ieee80211_channel *curchan = sc->cur_chan->chandef.chan;
 653         struct ath_chanctx *ctx = sc->cur_chan;
 654         struct ath9k_channel *init_channel;
 655         int r;
 656
 657         ath_dbg(common, CONFIG,
 658                 "Starting driver with initial channel: %d MHz\n",
 659                 curchan->center_freq);
 660
 661         ath9k_ps_wakeup(sc);
 662         mutex_lock(&sc->mutex);
 663
 664         init_channel = ath9k_cmn_get_channel(hw, ah, &ctx->chandef);
 665         sc->cur_chandef = hw->conf.chandef;
 666
 667         /* Reset SERDES registers */
 668         ath9k_hw_configpcipowersave(ah, false);
 669
 670         /*
 671          * The basic interface to setting the hardware in a good
 672          * state is ``reset''.  On return the hardware is known to
 673          * be powered up and with interrupts disabled.  This must
 674          * be followed by initialization of the appropriate bits
 675          * and then setup of the interrupt mask.
 676          */
 677         spin_lock_bh(&sc->sc_pcu_lock);
 678
 679         atomic_set(&ah->intr_ref_cnt, -1);
 680
 681         r = ath9k_hw_reset(ah, init_channel, ah->caldata, false);
 682         if (r) {
 683                 ath_err(common,
 684                         "Unable to reset hardware; reset status %d (freq %u MHz)\n",
 685                         r, curchan->center_freq);
 686                 ah->reset_power_on = false;
 687         }
 688
 689         /* Setup our intr mask. */
 690         ah->imask = ATH9K_INT_TX | ATH9K_INT_RXEOL |
 691                     ATH9K_INT_RXORN | ATH9K_INT_FATAL |
 692                     ATH9K_INT_GLOBAL;
 693
 694         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
 695                 ah->imask |= ATH9K_INT_RXHP |
 696                              ATH9K_INT_RXLP;
 697         else
 698                 ah->imask |= ATH9K_INT_RX;
 699
 700         if (ah->config.hw_hang_checks & HW_BB_WATCHDOG)
 701                 ah->imask |= ATH9K_INT_BB_WATCHDOG;
 702
 703         /*
 704          * Enable GTT interrupts only for AR9003/AR9004 chips
 705          * for now.
 706          */
 707         if (AR_SREV_9300_20_OR_LATER(ah))
 708                 ah->imask |= ATH9K_INT_GTT;
 709
 710         if (ah->caps.hw_caps & ATH9K_HW_CAP_HT)
 711                 ah->imask |= ATH9K_INT_CST;
 712
 713         ath_mci_enable(sc);
 714
 715         clear_bit(ATH_OP_INVALID, &common->op_flags);
 716         sc->sc_ah->is_monitoring = false;
 717
 718         if (!ath_complete_reset(sc, false))
 719                 ah->reset_power_on = false;
 720
 721         if (ah->led_pin >= 0) {
 722                 ath9k_hw_set_gpio(ah, ah->led_pin,
 723                                   (ah->config.led_active_high) ? 1 : 0);
 724                 ath9k_hw_gpio_request_out(ah, ah->led_pin, NULL,
 725                                           AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
 726         }
 727
 728         /*
 729          * Reset key cache to sane defaults (all entries cleared) instead of
 730          * semi-random values after suspend/resume.
 731          */
 732         ath9k_cmn_init_crypto(sc->sc_ah);
 733
 734         ath9k_hw_reset_tsf(ah);
 735
 736         spin_unlock_bh(&sc->sc_pcu_lock);
 737
 738         mutex_unlock(&sc->mutex);
 739
 740         ath9k_ps_restore(sc);
 741
 742         ath9k_rng_start(sc);
 743
 744         return 0;
 745 }
 746
 747 static void ath9k_tx(struct ieee80211_hw *hw,
 748                      struct ieee80211_tx_control *control,
 749                      struct sk_buff *skb)
 750 {
 751         struct ath_softc *sc = hw->priv;
 752         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 753         struct ath_tx_control txctl;
 754         struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
 755         unsigned long flags;
 756
 757         if (sc->ps_enabled) {
 758                 /*
 759                  * mac80211 does not set PM field for normal data frames, so we
 760                  * need to update that based on the current PS mode.
 761                  */
 762                 if (ieee80211_is_data(hdr->frame_control) &&
 763                     !ieee80211_is_nullfunc(hdr->frame_control) &&
 764                     !ieee80211_has_pm(hdr->frame_control)) {
 765                         ath_dbg(common, PS,
 766                                 "Add PM=1 for a TX frame while in PS mode\n");
 767                         hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
 768                 }
 769         }
 770
 771         if (unlikely(sc->sc_ah->power_mode == ATH9K_PM_NETWORK_SLEEP)) {
 772                 /*
 773                  * We are using PS-Poll and mac80211 can request TX while in
 774                  * power save mode. Need to wake up hardware for the TX to be
 775                  * completed and if needed, also for RX of buffered frames.
 776                  */
 777                 ath9k_ps_wakeup(sc);
 778                 spin_lock_irqsave(&sc->sc_pm_lock, flags);
 779                 if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
 780                         ath9k_hw_setrxabort(sc->sc_ah, 0);
 781                 if (ieee80211_is_pspoll(hdr->frame_control)) {
 782                         ath_dbg(common, PS,
 783                                 "Sending PS-Poll to pick a buffered frame\n");
 784                         sc->ps_flags |= PS_WAIT_FOR_PSPOLL_DATA;
 785                 } else {
 786                         ath_dbg(common, PS, "Wake up to complete TX\n");
 787                         sc->ps_flags |= PS_WAIT_FOR_TX_ACK;
 788                 }
 789                 /*
 790                  * The actual restore operation will happen only after
 791                  * the ps_flags bit is cleared. We are just dropping
 792                  * the ps_usecount here.
 793                  */
 794                 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 795                 ath9k_ps_restore(sc);
 796         }
 797
 798         /*
 799          * Cannot tx while the hardware is in full sleep, it first needs a full
 800          * chip reset to recover from that
 801          */
 802         if (unlikely(sc->sc_ah->power_mode == ATH9K_PM_FULL_SLEEP)) {
 803                 ath_err(common, "TX while HW is in FULL_SLEEP mode\n");
 804                 goto exit;
 805         }
 806
 807         memset(&txctl, 0, sizeof(struct ath_tx_control));
 808         txctl.txq = sc->tx.txq_map[skb_get_queue_mapping(skb)];
 809         txctl.sta = control->sta;
 810
 811         ath_dbg(common, XMIT, "transmitting packet, skb: %p\n", skb);
 812
 813         if (ath_tx_start(hw, skb, &txctl) != 0) {
 814                 ath_dbg(common, XMIT, "TX failed\n");
 815                 TX_STAT_INC(txctl.txq->axq_qnum, txfailed);
 816                 goto exit;
 817         }
 818
 819         return;
 820 exit:
 821         ieee80211_free_txskb(hw, skb);
 822 }
 823
 824 static bool ath9k_txq_list_has_key(struct list_head *txq_list, u32 keyix)
 825 {
 826         struct ath_buf *bf;
 827         struct ieee80211_tx_info *txinfo;
 828         struct ath_frame_info *fi;
 829
 830         list_for_each_entry(bf, txq_list, list) {
 831                 if (bf->bf_state.stale || !bf->bf_mpdu)
 832                         continue;
 833
 834                 txinfo = IEEE80211_SKB_CB(bf->bf_mpdu);
 835                 fi = (struct ath_frame_info *)&txinfo->rate_driver_data[0];
 836                 if (fi->keyix == keyix)
 837                         return true;
 838         }
 839
 840         return false;
 841 }
 842
 843 static bool ath9k_txq_has_key(struct ath_softc *sc, u32 keyix)
 844 {
 845         struct ath_hw *ah = sc->sc_ah;
 846         int i;
 847         struct ath_txq *txq;
 848         bool key_in_use = false;
 849
 850         for (i = 0; !key_in_use && i < ATH9K_NUM_TX_QUEUES; i++) {
 851                 if (!ATH_TXQ_SETUP(sc, i))
 852                         continue;
 853                 txq = &sc->tx.txq[i];
 854                 if (!txq->axq_depth)
 855                         continue;
 856                 if (!ath9k_hw_numtxpending(ah, txq->axq_qnum))
 857                         continue;
 858
 859                 ath_txq_lock(sc, txq);
 860                 key_in_use = ath9k_txq_list_has_key(&txq->axq_q, keyix);
 861                 if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
 862                         int idx = txq->txq_tailidx;
 863
 864                         while (!key_in_use &&
 865                                !list_empty(&txq->txq_fifo[idx])) {
 866                                 key_in_use = ath9k_txq_list_has_key(
 867                                         &txq->txq_fifo[idx], keyix);
 868                                 INCR(idx, ATH_TXFIFO_DEPTH);
 869                         }
 870                 }
 871                 ath_txq_unlock(sc, txq);
 872         }
 873
 874         return key_in_use;
 875 }
 876
 877 static void ath9k_pending_key_del(struct ath_softc *sc, u8 keyix)
 878 {
 879         struct ath_hw *ah = sc->sc_ah;
 880         struct ath_common *common = ath9k_hw_common(ah);
 881
 882         if (!test_bit(keyix, ah->pending_del_keymap) ||
 883             ath9k_txq_has_key(sc, keyix))
 884                 return;
 885
 886         /* No more TXQ frames point to this key cache entry, so delete it. */
 887         clear_bit(keyix, ah->pending_del_keymap);
 888         ath_key_delete(common, keyix);
 889 }
 890
 891 static void ath9k_stop(struct ieee80211_hw *hw)
 892 {
 893         struct ath_softc *sc = hw->priv;
 894         struct ath_hw *ah = sc->sc_ah;
 895         struct ath_common *common = ath9k_hw_common(ah);
 896         bool prev_idle;
 897         int i;
 898
 899         ath9k_deinit_channel_context(sc);
 900
 901         ath9k_rng_stop(sc);
 902
 903         mutex_lock(&sc->mutex);
 904
 905         ath_cancel_work(sc);
 906
 907         if (test_bit(ATH_OP_INVALID, &common->op_flags)) {
 908                 ath_dbg(common, ANY, "Device not present\n");
 909                 mutex_unlock(&sc->mutex);
 910                 return;
 911         }
 912
 913         /* Ensure HW is awake when we try to shut it down. */
 914         ath9k_ps_wakeup(sc);
 915
 916         spin_lock_bh(&sc->sc_pcu_lock);
 917
 918         /* prevent tasklets to enable interrupts once we disable them */
 919         ah->imask &= ~ATH9K_INT_GLOBAL;
 920
 921         /* make sure h/w will not generate any interrupt
 922          * before setting the invalid flag. */
 923         ath9k_hw_disable_interrupts(ah);
 924
 925         spin_unlock_bh(&sc->sc_pcu_lock);
 926
 927         /* we can now sync irq and kill any running tasklets, since we already
 928          * disabled interrupts and not holding a spin lock */
 929         synchronize_irq(sc->irq);
 930         tasklet_kill(&sc->intr_tq);
 931         tasklet_kill(&sc->bcon_tasklet);
 932
 933         prev_idle = sc->ps_idle;
 934         sc->ps_idle = true;
 935
 936         spin_lock_bh(&sc->sc_pcu_lock);
 937
 938         if (ah->led_pin >= 0) {
 939                 ath9k_hw_set_gpio(ah, ah->led_pin,
 940                                   (ah->config.led_active_high) ? 0 : 1);
 941                 ath9k_hw_gpio_request_in(ah, ah->led_pin, NULL);
 942         }
 943
 944         ath_prepare_reset(sc);
 945
 946         if (sc->rx.frag) {
 947                 dev_kfree_skb_any(sc->rx.frag);
 948                 sc->rx.frag = NULL;
 949         }
 950
 951         if (!ah->curchan)
 952                 ah->curchan = ath9k_cmn_get_channel(hw, ah,
 953                                                     &sc->cur_chan->chandef);
 954
 955         ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
 956
 957         set_bit(ATH_OP_INVALID, &common->op_flags);
 958
 959         ath9k_hw_phy_disable(ah);
 960
 961         ath9k_hw_configpcipowersave(ah, true);
 962
 963         spin_unlock_bh(&sc->sc_pcu_lock);
 964
 965         for (i = 0; i < ATH_KEYMAX; i++)
 966                 ath9k_pending_key_del(sc, i);
 967
 968         /* Clear key cache entries explicitly to get rid of any potentially
 969          * remaining keys.
 970          */
 971         ath9k_cmn_init_crypto(sc->sc_ah);
 972
 973         ath9k_ps_restore(sc);
 974
 975         sc->ps_idle = prev_idle;
 976
 977         mutex_unlock(&sc->mutex);
 978
 979         ath_dbg(common, CONFIG, "Driver halt\n");
 980 }
 981
 982 static bool ath9k_uses_beacons(int type)
 983 {
 984         switch (type) {
 985         case NL80211_IFTYPE_AP:
 986         case NL80211_IFTYPE_ADHOC:
 987         case NL80211_IFTYPE_MESH_POINT:
 988                 return true;
 989         default:
 990                 return false;
 991         }
 992 }
 993
 994 static void ath9k_vif_iter_set_beacon(struct ath9k_vif_iter_data *iter_data,
 995                                       struct ieee80211_vif *vif)
 996 {
 997         /* Use the first (configured) interface, but prefering AP interfaces. */
 998         if (!iter_data->primary_beacon_vif) {
 999                 iter_data->primary_beacon_vif = vif;
1000         } else {
1001                 if (iter_data->primary_beacon_vif->type != NL80211_IFTYPE_AP &&
1002                     vif->type == NL80211_IFTYPE_AP)
1003                         iter_data->primary_beacon_vif = vif;
1004         }
1005
1006         iter_data->beacons = true;
1007         iter_data->nbcnvifs += 1;
1008 }
1009
1010 static void ath9k_vif_iter(struct ath9k_vif_iter_data *iter_data,
1011                            u8 *mac, struct ieee80211_vif *vif)
1012 {
1013         struct ath_vif *avp = (struct ath_vif *)vif->drv_priv;
1014         int i;
1015
1016         if (iter_data->has_hw_macaddr) {
1017                 for (i = 0; i < ETH_ALEN; i++)
1018                         iter_data->mask[i] &=
1019                                 ~(iter_data->hw_macaddr[i] ^ mac[i]);
1020         } else {
1021                 memcpy(iter_data->hw_macaddr, mac, ETH_ALEN);
1022                 iter_data->has_hw_macaddr = true;
1023         }
1024
1025         if (!vif->bss_conf.use_short_slot)
1026                 iter_data->slottime = 20;
1027
1028         switch (vif->type) {
1029         case NL80211_IFTYPE_AP:
1030                 iter_data->naps++;
1031                 if (vif->bss_conf.enable_beacon)
1032                         ath9k_vif_iter_set_beacon(iter_data, vif);
1033                 break;
1034         case NL80211_IFTYPE_STATION:
1035                 iter_data->nstations++;
1036                 if (avp->assoc && !iter_data->primary_sta)
1037                         iter_data->primary_sta = vif;
1038                 break;
1039         case NL80211_IFTYPE_OCB:
1040                 iter_data->nocbs++;
1041                 break;
1042         case NL80211_IFTYPE_ADHOC:
1043                 iter_data->nadhocs++;
1044                 if (vif->bss_conf.enable_beacon)
1045                         ath9k_vif_iter_set_beacon(iter_data, vif);
1046                 break;
1047         case NL80211_IFTYPE_MESH_POINT:
1048                 iter_data->nmeshes++;
1049                 if (vif->bss_conf.enable_beacon)
1050                         ath9k_vif_iter_set_beacon(iter_data, vif);
1051                 break;
1052         case NL80211_IFTYPE_WDS:
1053                 iter_data->nwds++;
1054                 break;
1055         default:
1056                 break;
1057         }
1058 }
1059
1060 static void ath9k_update_bssid_mask(struct ath_softc *sc,
1061                                     struct ath_chanctx *ctx,
1062                                     struct ath9k_vif_iter_data *iter_data)
1063 {
1064         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1065         struct ath_vif *avp;
1066         int i;
1067
1068         if (!ath9k_is_chanctx_enabled())
1069                 return;
1070
1071         list_for_each_entry(avp, &ctx->vifs, list) {
1072                 if (ctx->nvifs_assigned != 1)
1073                         continue;
1074
1075                 if (!iter_data->has_hw_macaddr)
1076                         continue;
1077
1078                 ether_addr_copy(common->curbssid, avp->bssid);
1079
1080                 /* perm_addr will be used as the p2p device address. */
1081                 for (i = 0; i < ETH_ALEN; i++)
1082                         iter_data->mask[i] &=
1083                                 ~(iter_data->hw_macaddr[i] ^
1084                                   sc->hw->wiphy->perm_addr[i]);
1085         }
1086 }
1087
1088 /* Called with sc->mutex held. */
1089 void ath9k_calculate_iter_data(struct ath_softc *sc,
1090                                struct ath_chanctx *ctx,
1091                                struct ath9k_vif_iter_data *iter_data)
1092 {
1093         struct ath_vif *avp;
1094
1095         /*
1096          * The hardware will use primary station addr together with the
1097          * BSSID mask when matching addresses.
1098          */
1099         memset(iter_data, 0, sizeof(*iter_data));
1100         eth_broadcast_addr(iter_data->mask);
1101         iter_data->slottime = 9;
1102
1103         list_for_each_entry(avp, &ctx->vifs, list)
1104                 ath9k_vif_iter(iter_data, avp->vif->addr, avp->vif);
1105
1106         ath9k_update_bssid_mask(sc, ctx, iter_data);
1107 }
1108
1109 static void ath9k_set_assoc_state(struct ath_softc *sc,
1110                                   struct ieee80211_vif *vif, bool changed)
1111 {
1112         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1113         struct ath_vif *avp = (struct ath_vif *)vif->drv_priv;
1114         unsigned long flags;
1115
1116         set_bit(ATH_OP_PRIM_STA_VIF, &common->op_flags);
1117
1118         ether_addr_copy(common->curbssid, avp->bssid);
1119         common->curaid = avp->aid;
1120         ath9k_hw_write_associd(sc->sc_ah);
1121
1122         if (changed) {
1123                 common->last_rssi = ATH_RSSI_DUMMY_MARKER;
1124                 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
1125
1126                 spin_lock_irqsave(&sc->sc_pm_lock, flags);
1127                 sc->ps_flags |= PS_BEACON_SYNC | PS_WAIT_FOR_BEACON;
1128                 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
1129         }
1130
1131         if (ath9k_hw_mci_is_enabled(sc->sc_ah))
1132                 ath9k_mci_update_wlan_channels(sc, false);
1133
1134         ath_dbg(common, CONFIG,
1135                 "Primary Station interface: %pM, BSSID: %pM\n",
1136                 vif->addr, common->curbssid);
1137 }
1138
1139 #ifdef CONFIG_ATH9K_CHANNEL_CONTEXT
1140 static void ath9k_set_offchannel_state(struct ath_softc *sc)
1141 {
1142         struct ath_hw *ah = sc->sc_ah;
1143         struct ath_common *common = ath9k_hw_common(ah);
1144         struct ieee80211_vif *vif = NULL;
1145
1146         ath9k_ps_wakeup(sc);
1147
1148         if (sc->offchannel.state < ATH_OFFCHANNEL_ROC_START)
1149                 vif = sc->offchannel.scan_vif;
1150         else
1151                 vif = sc->offchannel.roc_vif;
1152
1153         if (WARN_ON(!vif))
1154                 goto exit;
1155
1156         eth_zero_addr(common->curbssid);
1157         eth_broadcast_addr(common->bssidmask);
1158         memcpy(common->macaddr, vif->addr, ETH_ALEN);
1159         common->curaid = 0;
1160         ah->opmode = vif->type;
1161         ah->imask &= ~ATH9K_INT_SWBA;
1162         ah->imask &= ~ATH9K_INT_TSFOOR;
1163         ah->slottime = 9;
1164
1165         ath_hw_setbssidmask(common);
1166         ath9k_hw_setopmode(ah);
1167         ath9k_hw_write_associd(sc->sc_ah);
1168         ath9k_hw_set_interrupts(ah);
1169         ath9k_hw_init_global_settings(ah);
1170
1171 exit:
1172         ath9k_ps_restore(sc);
1173 }
1174 #endif
1175
1176 /* Called with sc->mutex held. */
1177 void ath9k_calculate_summary_state(struct ath_softc *sc,
1178                                    struct ath_chanctx *ctx)
1179 {
1180         struct ath_hw *ah = sc->sc_ah;
1181         struct ath_common *common = ath9k_hw_common(ah);
1182         struct ath9k_vif_iter_data iter_data;
1183
1184         ath_chanctx_check_active(sc, ctx);
1185
1186         if (ctx != sc->cur_chan)
1187                 return;
1188
1189 #ifdef CONFIG_ATH9K_CHANNEL_CONTEXT
1190         if (ctx == &sc->offchannel.chan)
1191                 return ath9k_set_offchannel_state(sc);
1192 #endif
1193
1194         ath9k_ps_wakeup(sc);
1195         ath9k_calculate_iter_data(sc, ctx, &iter_data);
1196
1197         if (iter_data.has_hw_macaddr)
1198                 memcpy(common->macaddr, iter_data.hw_macaddr, ETH_ALEN);
1199
1200         memcpy(common->bssidmask, iter_data.mask, ETH_ALEN);
1201         ath_hw_setbssidmask(common);
1202
1203         if (iter_data.naps > 0) {
1204                 ath9k_hw_set_tsfadjust(ah, true);
1205                 ah->opmode = NL80211_IFTYPE_AP;
1206         } else {
1207                 ath9k_hw_set_tsfadjust(ah, false);
1208                 if (iter_data.beacons)
1209                         ath9k_beacon_ensure_primary_slot(sc);
1210
1211                 if (iter_data.nmeshes)
1212                         ah->opmode = NL80211_IFTYPE_MESH_POINT;
1213                 else if (iter_data.nocbs)
1214                         ah->opmode = NL80211_IFTYPE_OCB;
1215                 else if (iter_data.nwds)
1216                         ah->opmode = NL80211_IFTYPE_AP;
1217                 else if (iter_data.nadhocs)
1218                         ah->opmode = NL80211_IFTYPE_ADHOC;
1219                 else
1220                         ah->opmode = NL80211_IFTYPE_STATION;
1221         }
1222
1223         ath9k_hw_setopmode(ah);
1224
1225         ctx->switch_after_beacon = false;
1226         if ((iter_data.nstations + iter_data.nadhocs + iter_data.nmeshes) > 0)
1227                 ah->imask |= ATH9K_INT_TSFOOR;
1228         else {
1229                 ah->imask &= ~ATH9K_INT_TSFOOR;
1230                 if (iter_data.naps == 1 && iter_data.beacons)
1231                         ctx->switch_after_beacon = true;
1232         }
1233
1234         if (ah->opmode == NL80211_IFTYPE_STATION) {
1235                 bool changed = (iter_data.primary_sta != ctx->primary_sta);
1236
1237                 if (iter_data.primary_sta) {
1238                         iter_data.primary_beacon_vif = iter_data.primary_sta;
1239                         iter_data.beacons = true;
1240                         ath9k_set_assoc_state(sc, iter_data.primary_sta,
1241                                               changed);
1242                         ctx->primary_sta = iter_data.primary_sta;
1243                 } else {
1244                         ctx->primary_sta = NULL;
1245                         eth_zero_addr(common->curbssid);
1246                         common->curaid = 0;
1247                         ath9k_hw_write_associd(sc->sc_ah);
1248                         if (ath9k_hw_mci_is_enabled(sc->sc_ah))
1249                                 ath9k_mci_update_wlan_channels(sc, true);
1250                 }
1251         }
1252         sc->nbcnvifs = iter_data.nbcnvifs;
1253         ath9k_beacon_config(sc, iter_data.primary_beacon_vif,
1254                             iter_data.beacons);
1255         ath9k_hw_set_interrupts(ah);
1256
1257         if (ah->slottime != iter_data.slottime) {
1258                 ah->slottime = iter_data.slottime;
1259                 ath9k_hw_init_global_settings(ah);
1260         }
1261
1262         if (iter_data.primary_sta)
1263                 set_bit(ATH_OP_PRIM_STA_VIF, &common->op_flags);
1264         else
1265                 clear_bit(ATH_OP_PRIM_STA_VIF, &common->op_flags);
1266
1267         ath_dbg(common, CONFIG,
1268                 "macaddr: %pM, bssid: %pM, bssidmask: %pM\n",
1269                 common->macaddr, common->curbssid, common->bssidmask);
1270
1271         ath9k_ps_restore(sc);
1272 }
1273
1274 static void ath9k_tpc_vif_iter(void *data, u8 *mac, struct ieee80211_vif *vif)
1275 {
1276         int *power = (int *)data;
1277
1278         if (*power < vif->bss_conf.txpower)
1279                 *power = vif->bss_conf.txpower;
1280 }
1281
1282 /* Called with sc->mutex held. */
1283 void ath9k_set_txpower(struct ath_softc *sc, struct ieee80211_vif *vif)
1284 {
1285         int power;
1286         struct ath_hw *ah = sc->sc_ah;
1287         struct ath_regulatory *reg = ath9k_hw_regulatory(ah);
1288
1289         ath9k_ps_wakeup(sc);
1290         if (ah->tpc_enabled) {
1291                 power = (vif) ? vif->bss_conf.txpower : -1;
1292                 ieee80211_iterate_active_interfaces_atomic(
1293                                 sc->hw, IEEE80211_IFACE_ITER_RESUME_ALL,
1294                                 ath9k_tpc_vif_iter, &power);
1295                 if (power == -1)
1296                         power = sc->hw->conf.power_level;
1297         } else {
1298                 power = sc->hw->conf.power_level;
1299         }
1300         sc->cur_chan->txpower = 2 * power;
1301         ath9k_hw_set_txpowerlimit(ah, sc->cur_chan->txpower, false);
1302         sc->cur_chan->cur_txpower = reg->max_power_level;
1303         ath9k_ps_restore(sc);
1304 }
1305
1306 static void ath9k_assign_hw_queues(struct ieee80211_hw *hw,
1307                                    struct ieee80211_vif *vif)
1308 {
1309         int i;
1310
1311         if (!ath9k_is_chanctx_enabled())
1312                 return;
1313
1314         for (i = 0; i < IEEE80211_NUM_ACS; i++)
1315                 vif->hw_queue[i] = i;
1316
1317         if (vif->type == NL80211_IFTYPE_AP ||
1318             vif->type == NL80211_IFTYPE_MESH_POINT)
1319                 vif->cab_queue = hw->queues - 2;
1320         else
1321                 vif->cab_queue = IEEE80211_INVAL_HW_QUEUE;
1322 }
1323
1324 static int ath9k_add_interface(struct ieee80211_hw *hw,
1325                                struct ieee80211_vif *vif)
1326 {
1327         struct ath_softc *sc = hw->priv;
1328         struct ath_hw *ah = sc->sc_ah;
1329         struct ath_common *common = ath9k_hw_common(ah);
1330         struct ath_vif *avp = (void *)vif->drv_priv;
1331         struct ath_node *an = &avp->mcast_node;
1332
1333         mutex_lock(&sc->mutex);
1334         if (IS_ENABLED(CONFIG_ATH9K_TX99)) {
1335                 if (sc->cur_chan->nvifs >= 1) {
1336                         mutex_unlock(&sc->mutex);
1337                         return -EOPNOTSUPP;
1338                 }
1339                 sc->tx99_vif = vif;
1340         }
1341
1342         ath_dbg(common, CONFIG, "Attach a VIF of type: %d\n", vif->type);
1343         sc->cur_chan->nvifs++;
1344
1345         if (vif->type == NL80211_IFTYPE_STATION && ath9k_is_chanctx_enabled())
1346                 vif->driver_flags |= IEEE80211_VIF_GET_NOA_UPDATE;
1347
1348         if (ath9k_uses_beacons(vif->type))
1349                 ath9k_beacon_assign_slot(sc, vif);
1350
1351         avp->vif = vif;
1352         if (!ath9k_is_chanctx_enabled()) {
1353                 avp->chanctx = sc->cur_chan;
1354                 list_add_tail(&avp->list, &avp->chanctx->vifs);
1355         }
1356
1357         ath9k_calculate_summary_state(sc, avp->chanctx);
1358
1359         ath9k_assign_hw_queues(hw, vif);
1360
1361         ath9k_set_txpower(sc, vif);
1362
1363         an->sc = sc;
1364         an->sta = NULL;
1365         an->vif = vif;
1366         an->no_ps_filter = true;
1367         ath_tx_node_init(sc, an);
1368
1369         mutex_unlock(&sc->mutex);
1370         return 0;
1371 }
1372
1373 static int ath9k_change_interface(struct ieee80211_hw *hw,
1374                                   struct ieee80211_vif *vif,
1375                                   enum nl80211_iftype new_type,
1376                                   bool p2p)
1377 {
1378         struct ath_softc *sc = hw->priv;
1379         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1380         struct ath_vif *avp = (void *)vif->drv_priv;
1381
1382         mutex_lock(&sc->mutex);
1383
1384         if (IS_ENABLED(CONFIG_ATH9K_TX99)) {
1385                 mutex_unlock(&sc->mutex);
1386                 return -EOPNOTSUPP;
1387         }
1388
1389         ath_dbg(common, CONFIG, "Change Interface\n");
1390
1391         if (ath9k_uses_beacons(vif->type))
1392                 ath9k_beacon_remove_slot(sc, vif);
1393
1394         vif->type = new_type;
1395         vif->p2p = p2p;
1396
1397         if (ath9k_uses_beacons(vif->type))
1398                 ath9k_beacon_assign_slot(sc, vif);
1399
1400         ath9k_assign_hw_queues(hw, vif);
1401         ath9k_calculate_summary_state(sc, avp->chanctx);
1402
1403         ath9k_set_txpower(sc, vif);
1404
1405         mutex_unlock(&sc->mutex);
1406         return 0;
1407 }
1408
1409 static void ath9k_remove_interface(struct ieee80211_hw *hw,
1410                                    struct ieee80211_vif *vif)
1411 {
1412         struct ath_softc *sc = hw->priv;
1413         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1414         struct ath_vif *avp = (void *)vif->drv_priv;
1415
1416         ath_dbg(common, CONFIG, "Detach Interface\n");
1417
1418         mutex_lock(&sc->mutex);
1419
1420         ath9k_p2p_remove_vif(sc, vif);
1421
1422         sc->cur_chan->nvifs--;
1423         sc->tx99_vif = NULL;
1424         if (!ath9k_is_chanctx_enabled())
1425                 list_del(&avp->list);
1426
1427         if (ath9k_uses_beacons(vif->type))
1428                 ath9k_beacon_remove_slot(sc, vif);
1429
1430         ath_tx_node_cleanup(sc, &avp->mcast_node);
1431
1432         ath9k_calculate_summary_state(sc, avp->chanctx);
1433
1434         ath9k_set_txpower(sc, NULL);
1435
1436         mutex_unlock(&sc->mutex);
1437 }
1438
1439 static void ath9k_enable_ps(struct ath_softc *sc)
1440 {
1441         struct ath_hw *ah = sc->sc_ah;
1442         struct ath_common *common = ath9k_hw_common(ah);
1443
1444         if (IS_ENABLED(CONFIG_ATH9K_TX99))
1445                 return;
1446
1447         sc->ps_enabled = true;
1448         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1449                 if ((ah->imask & ATH9K_INT_TIM_TIMER) == 0) {
1450                         ah->imask |= ATH9K_INT_TIM_TIMER;
1451                         ath9k_hw_set_interrupts(ah);
1452                 }
1453                 ath9k_hw_setrxabort(ah, 1);
1454         }
1455         ath_dbg(common, PS, "PowerSave enabled\n");
1456 }
1457
1458 static void ath9k_disable_ps(struct ath_softc *sc)
1459 {
1460         struct ath_hw *ah = sc->sc_ah;
1461         struct ath_common *common = ath9k_hw_common(ah);
1462
1463         if (IS_ENABLED(CONFIG_ATH9K_TX99))
1464                 return;
1465
1466         sc->ps_enabled = false;
1467         ath9k_hw_setpower(ah, ATH9K_PM_AWAKE);
1468         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1469                 ath9k_hw_setrxabort(ah, 0);
1470                 sc->ps_flags &= ~(PS_WAIT_FOR_BEACON |
1471                                   PS_WAIT_FOR_CAB |
1472                                   PS_WAIT_FOR_PSPOLL_DATA |
1473                                   PS_WAIT_FOR_TX_ACK);
1474                 if (ah->imask & ATH9K_INT_TIM_TIMER) {
1475                         ah->imask &= ~ATH9K_INT_TIM_TIMER;
1476                         ath9k_hw_set_interrupts(ah);
1477                 }
1478         }
1479         ath_dbg(common, PS, "PowerSave disabled\n");
1480 }
1481
1482 static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
1483 {
1484         struct ath_softc *sc = hw->priv;
1485         struct ath_hw *ah = sc->sc_ah;
1486         struct ath_common *common = ath9k_hw_common(ah);
1487         struct ieee80211_conf *conf = &hw->conf;
1488         struct ath_chanctx *ctx = sc->cur_chan;
1489
1490         ath9k_ps_wakeup(sc);
1491         mutex_lock(&sc->mutex);
1492
1493         if (changed & IEEE80211_CONF_CHANGE_IDLE) {
1494                 sc->ps_idle = !!(conf->flags & IEEE80211_CONF_IDLE);
1495                 if (sc->ps_idle) {
1496                         ath_cancel_work(sc);
1497                         ath9k_stop_btcoex(sc);
1498                 } else {
1499                         ath9k_start_btcoex(sc);
1500                         /*
1501                          * The chip needs a reset to properly wake up from
1502                          * full sleep
1503                          */
1504                         ath_chanctx_set_channel(sc, ctx, &ctx->chandef);
1505                 }
1506         }
1507
1508         /*
1509          * We just prepare to enable PS. We have to wait until our AP has
1510          * ACK'd our null data frame to disable RX otherwise we'll ignore
1511          * those ACKs and end up retransmitting the same null data frames.
1512          * IEEE80211_CONF_CHANGE_PS is only passed by mac80211 for STA mode.
1513          */
1514         if (changed & IEEE80211_CONF_CHANGE_PS) {
1515                 unsigned long flags;
1516                 spin_lock_irqsave(&sc->sc_pm_lock, flags);
1517                 if (conf->flags & IEEE80211_CONF_PS)
1518                         ath9k_enable_ps(sc);
1519                 else
1520                         ath9k_disable_ps(sc);
1521                 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
1522         }
1523
1524         if (changed & IEEE80211_CONF_CHANGE_MONITOR) {
1525                 if (conf->flags & IEEE80211_CONF_MONITOR) {
1526                         ath_dbg(common, CONFIG, "Monitor mode is enabled\n");
1527                         sc->sc_ah->is_monitoring = true;
1528                 } else {
1529                         ath_dbg(common, CONFIG, "Monitor mode is disabled\n");
1530                         sc->sc_ah->is_monitoring = false;
1531                 }
1532         }
1533
1534         if (!ath9k_is_chanctx_enabled() && (changed & IEEE80211_CONF_CHANGE_CHANNEL)) {
1535                 ctx->offchannel = !!(conf->flags & IEEE80211_CONF_OFFCHANNEL);
1536                 ath_chanctx_set_channel(sc, ctx, &hw->conf.chandef);
1537         }
1538
1539         if (changed & IEEE80211_CONF_CHANGE_POWER)
1540                 ath9k_set_txpower(sc, NULL);
1541
1542         mutex_unlock(&sc->mutex);
1543         ath9k_ps_restore(sc);
1544
1545         return 0;
1546 }
1547
1548 #define SUPPORTED_FILTERS                       \
1549         (FIF_ALLMULTI |                         \
1550         FIF_CONTROL |                           \
1551         FIF_PSPOLL |                            \
1552         FIF_OTHER_BSS |                         \
1553         FIF_BCN_PRBRESP_PROMISC |               \
1554         FIF_PROBE_REQ |                         \
1555         FIF_FCSFAIL)
1556
1557 /* FIXME: sc->sc_full_reset ? */
1558 static void ath9k_configure_filter(struct ieee80211_hw *hw,
1559                                    unsigned int changed_flags,
1560                                    unsigned int *total_flags,
1561                                    u64 multicast)
1562 {
1563         struct ath_softc *sc = hw->priv;
1564         struct ath_chanctx *ctx;
1565         u32 rfilt;
1566
1567         changed_flags &= SUPPORTED_FILTERS;
1568         *total_flags &= SUPPORTED_FILTERS;
1569
1570         spin_lock_bh(&sc->chan_lock);
1571         ath_for_each_chanctx(sc, ctx)
1572                 ctx->rxfilter = *total_flags;
1573 #ifdef CONFIG_ATH9K_CHANNEL_CONTEXT
1574         sc->offchannel.chan.rxfilter = *total_flags;
1575 #endif
1576         spin_unlock_bh(&sc->chan_lock);
1577
1578         ath9k_ps_wakeup(sc);
1579         rfilt = ath_calcrxfilter(sc);
1580         ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
1581         ath9k_ps_restore(sc);
1582
1583         ath_dbg(ath9k_hw_common(sc->sc_ah), CONFIG, "Set HW RX filter: 0x%x\n",
1584                 rfilt);
1585 }
1586
1587 static int ath9k_sta_add(struct ieee80211_hw *hw,
1588                          struct ieee80211_vif *vif,
1589                          struct ieee80211_sta *sta)
1590 {
1591         struct ath_softc *sc = hw->priv;
1592         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1593         struct ath_node *an = (struct ath_node *) sta->drv_priv;
1594         struct ieee80211_key_conf ps_key = { };
1595         int key;
1596
1597         ath_node_attach(sc, sta, vif);
1598
1599         if (vif->type != NL80211_IFTYPE_AP &&
1600             vif->type != NL80211_IFTYPE_AP_VLAN)
1601                 return 0;
1602
1603         key = ath_key_config(common, vif, sta, &ps_key);
1604         if (key > 0) {
1605                 an->ps_key = key;
1606                 an->key_idx[0] = key;
1607         }
1608
1609         return 0;
1610 }
1611
1612 static void ath9k_del_ps_key(struct ath_softc *sc,
1613                              struct ieee80211_vif *vif,
1614                              struct ieee80211_sta *sta)
1615 {
1616         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1617         struct ath_node *an = (struct ath_node *) sta->drv_priv;
1618
1619         if (!an->ps_key)
1620             return;
1621
1622         ath_key_delete(common, an->ps_key);
1623         an->ps_key = 0;
1624         an->key_idx[0] = 0;
1625 }
1626
1627 static int ath9k_sta_remove(struct ieee80211_hw *hw,
1628                             struct ieee80211_vif *vif,
1629                             struct ieee80211_sta *sta)
1630 {
1631         struct ath_softc *sc = hw->priv;
1632
1633         ath9k_del_ps_key(sc, vif, sta);
1634         ath_node_detach(sc, sta);
1635
1636         return 0;
1637 }
1638
1639 static int ath9k_sta_state(struct ieee80211_hw *hw,
1640                            struct ieee80211_vif *vif,
1641                            struct ieee80211_sta *sta,
1642                            enum ieee80211_sta_state old_state,
1643                            enum ieee80211_sta_state new_state)
1644 {
1645         struct ath_softc *sc = hw->priv;
1646         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1647         int ret = 0;
1648
1649         if (old_state == IEEE80211_STA_NOTEXIST &&
1650             new_state == IEEE80211_STA_NONE) {
1651                 ret = ath9k_sta_add(hw, vif, sta);
1652                 ath_dbg(common, CONFIG,
1653                         "Add station: %pM\n", sta->addr);
1654         } else if (old_state == IEEE80211_STA_NONE &&
1655                    new_state == IEEE80211_STA_NOTEXIST) {
1656                 ret = ath9k_sta_remove(hw, vif, sta);
1657                 ath_dbg(common, CONFIG,
1658                         "Remove station: %pM\n", sta->addr);
1659         }
1660
1661         if (ath9k_is_chanctx_enabled()) {
1662                 if (vif->type == NL80211_IFTYPE_STATION) {
1663                         if (old_state == IEEE80211_STA_ASSOC &&
1664                             new_state == IEEE80211_STA_AUTHORIZED)
1665                                 ath_chanctx_event(sc, vif,
1666                                                   ATH_CHANCTX_EVENT_AUTHORIZED);
1667                 }
1668         }
1669
1670         return ret;
1671 }
1672
1673 static void ath9k_sta_set_tx_filter(struct ath_hw *ah,
1674                                     struct ath_node *an,
1675                                     bool set)
1676 {
1677         int i;
1678
1679         for (i = 0; i < ARRAY_SIZE(an->key_idx); i++) {
1680                 if (!an->key_idx[i])
1681                         continue;
1682                 ath9k_hw_set_tx_filter(ah, an->key_idx[i], set);
1683         }
1684 }
1685
1686 static void ath9k_sta_notify(struct ieee80211_hw *hw,
1687                          struct ieee80211_vif *vif,
1688                          enum sta_notify_cmd cmd,
1689                          struct ieee80211_sta *sta)
1690 {
1691         struct ath_softc *sc = hw->priv;
1692         struct ath_node *an = (struct ath_node *) sta->drv_priv;
1693
1694         switch (cmd) {
1695         case STA_NOTIFY_SLEEP:
1696                 an->sleeping = true;
1697                 ath_tx_aggr_sleep(sta, sc, an);
1698                 ath9k_sta_set_tx_filter(sc->sc_ah, an, true);
1699                 break;
1700         case STA_NOTIFY_AWAKE:
1701                 ath9k_sta_set_tx_filter(sc->sc_ah, an, false);
1702                 an->sleeping = false;
1703                 ath_tx_aggr_wakeup(sc, an);
1704                 break;
1705         }
1706 }
1707
1708 static int ath9k_conf_tx(struct ieee80211_hw *hw,
1709                          struct ieee80211_vif *vif, u16 queue,
1710                          const struct ieee80211_tx_queue_params *params)
1711 {
1712         struct ath_softc *sc = hw->priv;
1713         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1714         struct ath_txq *txq;
1715         struct ath9k_tx_queue_info qi;
1716         int ret = 0;
1717
1718         if (queue >= IEEE80211_NUM_ACS)
1719                 return 0;
1720
1721         txq = sc->tx.txq_map[queue];
1722
1723         ath9k_ps_wakeup(sc);
1724         mutex_lock(&sc->mutex);
1725
1726         memset(&qi, 0, sizeof(struct ath9k_tx_queue_info));
1727
1728         qi.tqi_aifs = params->aifs;
1729         qi.tqi_cwmin = params->cw_min;
1730         qi.tqi_cwmax = params->cw_max;
1731         qi.tqi_burstTime = params->txop * 32;
1732
1733         ath_dbg(common, CONFIG,
1734                 "Configure tx [queue/halq] [%d/%d], aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
1735                 queue, txq->axq_qnum, params->aifs, params->cw_min,
1736                 params->cw_max, params->txop);
1737
1738         ath_update_max_aggr_framelen(sc, queue, qi.tqi_burstTime);
1739         ret = ath_txq_update(sc, txq->axq_qnum, &qi);
1740         if (ret)
1741                 ath_err(common, "TXQ Update failed\n");
1742
1743         mutex_unlock(&sc->mutex);
1744         ath9k_ps_restore(sc);
1745
1746         return ret;
1747 }
1748
1749 static int ath9k_set_key(struct ieee80211_hw *hw,
1750                          enum set_key_cmd cmd,
1751                          struct ieee80211_vif *vif,
1752                          struct ieee80211_sta *sta,
1753                          struct ieee80211_key_conf *key)
1754 {
1755         struct ath_softc *sc = hw->priv;
1756         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1757         struct ath_node *an = NULL;
1758         int ret = 0, i;
1759
1760         if (ath9k_modparam_nohwcrypt)
1761                 return -ENOSPC;
1762
1763         if ((vif->type == NL80211_IFTYPE_ADHOC ||
1764              vif->type == NL80211_IFTYPE_MESH_POINT) &&
1765             (key->cipher == WLAN_CIPHER_SUITE_TKIP ||
1766              key->cipher == WLAN_CIPHER_SUITE_CCMP) &&
1767             !(key->flags & IEEE80211_KEY_FLAG_PAIRWISE)) {
1768                 /*
1769                  * For now, disable hw crypto for the RSN IBSS group keys. This
1770                  * could be optimized in the future to use a modified key cache
1771                  * design to support per-STA RX GTK, but until that gets
1772                  * implemented, use of software crypto for group addressed
1773                  * frames is a acceptable to allow RSN IBSS to be used.
1774                  */
1775                 return -EOPNOTSUPP;
1776         }
1777
1778         mutex_lock(&sc->mutex);
1779         ath9k_ps_wakeup(sc);
1780         ath_dbg(common, CONFIG, "Set HW Key %d\n", cmd);
1781         if (sta)
1782                 an = (struct ath_node *)sta->drv_priv;
1783
1784         /* Delete pending key cache entries if no more frames are pointing to
1785          * them in TXQs.
1786          */
1787         for (i = 0; i < ATH_KEYMAX; i++)
1788                 ath9k_pending_key_del(sc, i);
1789
1790         switch (cmd) {
1791         case SET_KEY:
1792                 if (sta)
1793                         ath9k_del_ps_key(sc, vif, sta);
1794
1795                 key->hw_key_idx = 0;
1796                 ret = ath_key_config(common, vif, sta, key);
1797                 if (ret >= 0) {
1798                         key->hw_key_idx = ret;
1799                         /* push IV and Michael MIC generation to stack */
1800                         key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
1801                         if (key->cipher == WLAN_CIPHER_SUITE_TKIP)
1802                                 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
1803                         if (sc->sc_ah->sw_mgmt_crypto_tx &&
1804                             key->cipher == WLAN_CIPHER_SUITE_CCMP)
1805                                 key->flags |= IEEE80211_KEY_FLAG_SW_MGMT_TX;
1806                         ret = 0;
1807                 }
1808                 if (an && key->hw_key_idx) {
1809                         for (i = 0; i < ARRAY_SIZE(an->key_idx); i++) {
1810                                 if (an->key_idx[i])
1811                                         continue;
1812                                 an->key_idx[i] = key->hw_key_idx;
1813                                 break;
1814                         }
1815                         WARN_ON(i == ARRAY_SIZE(an->key_idx));
1816                 }
1817                 break;
1818         case DISABLE_KEY:
1819                 if (ath9k_txq_has_key(sc, key->hw_key_idx)) {
1820                         /* Delay key cache entry deletion until there are no
1821                          * remaining TXQ frames pointing to this entry.
1822                          */
1823                         set_bit(key->hw_key_idx, sc->sc_ah->pending_del_keymap);
1824                         ath_hw_keysetmac(common, key->hw_key_idx, NULL);
1825                 } else {
1826                         ath_key_delete(common, key->hw_key_idx);
1827                 }
1828                 if (an) {
1829                         for (i = 0; i < ARRAY_SIZE(an->key_idx); i++) {
1830                                 if (an->key_idx[i] != key->hw_key_idx)
1831                                         continue;
1832                                 an->key_idx[i] = 0;
1833                                 break;
1834                         }
1835                 }
1836                 key->hw_key_idx = 0;
1837                 break;
1838         default:
1839                 ret = -EINVAL;
1840         }
1841
1842         ath9k_ps_restore(sc);
1843         mutex_unlock(&sc->mutex);
1844
1845         return ret;
1846 }
1847
1848 static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
1849                                    struct ieee80211_vif *vif,
1850                                    struct ieee80211_bss_conf *bss_conf,
1851                                    u32 changed)
1852 {
1853 #define CHECK_ANI                               \
1854         (BSS_CHANGED_ASSOC |                    \
1855          BSS_CHANGED_IBSS |                     \
1856          BSS_CHANGED_BEACON_ENABLED)
1857
1858         struct ath_softc *sc = hw->priv;
1859         struct ath_hw *ah = sc->sc_ah;
1860         struct ath_common *common = ath9k_hw_common(ah);
1861         struct ath_vif *avp = (void *)vif->drv_priv;
1862         int slottime;
1863
1864         ath9k_ps_wakeup(sc);
1865         mutex_lock(&sc->mutex);
1866
1867         if (changed & BSS_CHANGED_ASSOC) {
1868                 ath_dbg(common, CONFIG, "BSSID %pM Changed ASSOC %d\n",
1869                         bss_conf->bssid, bss_conf->assoc);
1870
1871                 memcpy(avp->bssid, bss_conf->bssid, ETH_ALEN);
1872                 avp->aid = bss_conf->aid;
1873                 avp->assoc = bss_conf->assoc;
1874
1875                 ath9k_calculate_summary_state(sc, avp->chanctx);
1876         }
1877
1878         if ((changed & BSS_CHANGED_IBSS) ||
1879               (changed & BSS_CHANGED_OCB)) {
1880                 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
1881                 common->curaid = bss_conf->aid;
1882                 ath9k_hw_write_associd(sc->sc_ah);
1883         }
1884
1885         if ((changed & BSS_CHANGED_BEACON_ENABLED) ||
1886             (changed & BSS_CHANGED_BEACON_INT) ||
1887             (changed & BSS_CHANGED_BEACON_INFO)) {
1888                 ath9k_calculate_summary_state(sc, avp->chanctx);
1889         }
1890
1891         if ((avp->chanctx == sc->cur_chan) &&
1892             (changed & BSS_CHANGED_ERP_SLOT)) {
1893                 if (bss_conf->use_short_slot)
1894                         slottime = 9;
1895                 else
1896                         slottime = 20;
1897
1898                 if (vif->type == NL80211_IFTYPE_AP) {
1899                         /*
1900                          * Defer update, so that connected stations can adjust
1901                          * their settings at the same time.
1902                          * See beacon.c for more details
1903                          */
1904                         sc->beacon.slottime = slottime;
1905                         sc->beacon.updateslot = UPDATE;
1906                 } else {
1907                         ah->slottime = slottime;
1908                         ath9k_hw_init_global_settings(ah);
1909                 }
1910         }
1911
1912         if (changed & BSS_CHANGED_P2P_PS)
1913                 ath9k_p2p_bss_info_changed(sc, vif);
1914
1915         if (changed & CHECK_ANI)
1916                 ath_check_ani(sc);
1917
1918         if (changed & BSS_CHANGED_TXPOWER) {
1919                 ath_dbg(common, CONFIG, "vif %pM power %d dbm power_type %d\n",
1920                         vif->addr, bss_conf->txpower, bss_conf->txpower_type);
1921                 ath9k_set_txpower(sc, vif);
1922         }
1923
1924         mutex_unlock(&sc->mutex);
1925         ath9k_ps_restore(sc);
1926
1927 #undef CHECK_ANI
1928 }
1929
1930 static u64 ath9k_get_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
1931 {
1932         struct ath_softc *sc = hw->priv;
1933         struct ath_vif *avp = (void *)vif->drv_priv;
1934         u64 tsf;
1935
1936         mutex_lock(&sc->mutex);
1937         ath9k_ps_wakeup(sc);
1938         /* Get current TSF either from HW or kernel time. */
1939         if (sc->cur_chan == avp->chanctx) {
1940                 tsf = ath9k_hw_gettsf64(sc->sc_ah);
1941         } else {
1942                 tsf = sc->cur_chan->tsf_val +
1943                       ath9k_hw_get_tsf_offset(&sc->cur_chan->tsf_ts, NULL);
1944         }
1945         tsf += le64_to_cpu(avp->tsf_adjust);
1946         ath9k_ps_restore(sc);
1947         mutex_unlock(&sc->mutex);
1948
1949         return tsf;
1950 }
1951
1952 static void ath9k_set_tsf(struct ieee80211_hw *hw,
1953                           struct ieee80211_vif *vif,
1954                           u64 tsf)
1955 {
1956         struct ath_softc *sc = hw->priv;
1957         struct ath_vif *avp = (void *)vif->drv_priv;
1958
1959         mutex_lock(&sc->mutex);
1960         ath9k_ps_wakeup(sc);
1961         tsf -= le64_to_cpu(avp->tsf_adjust);
1962         getrawmonotonic(&avp->chanctx->tsf_ts);
1963         if (sc->cur_chan == avp->chanctx)
1964                 ath9k_hw_settsf64(sc->sc_ah, tsf);
1965         avp->chanctx->tsf_val = tsf;
1966         ath9k_ps_restore(sc);
1967         mutex_unlock(&sc->mutex);
1968 }
1969
1970 static void ath9k_reset_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
1971 {
1972         struct ath_softc *sc = hw->priv;
1973         struct ath_vif *avp = (void *)vif->drv_priv;
1974
1975         mutex_lock(&sc->mutex);
1976
1977         ath9k_ps_wakeup(sc);
1978         getrawmonotonic(&avp->chanctx->tsf_ts);
1979         if (sc->cur_chan == avp->chanctx)
1980                 ath9k_hw_reset_tsf(sc->sc_ah);
1981         avp->chanctx->tsf_val = 0;
1982         ath9k_ps_restore(sc);
1983
1984         mutex_unlock(&sc->mutex);
1985 }
1986
1987 static int ath9k_ampdu_action(struct ieee80211_hw *hw,
1988                               struct ieee80211_vif *vif,
1989                               struct ieee80211_ampdu_params *params)
1990 {
1991         struct ath_softc *sc = hw->priv;
1992         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1993         bool flush = false;
1994         int ret = 0;
1995         struct ieee80211_sta *sta = params->sta;
1996         enum ieee80211_ampdu_mlme_action action = params->action;
1997         u16 tid = params->tid;
1998         u16 *ssn = &params->ssn;
1999
2000         mutex_lock(&sc->mutex);
2001
2002         switch (action) {
2003         case IEEE80211_AMPDU_RX_START:
2004                 break;
2005         case IEEE80211_AMPDU_RX_STOP:
2006                 break;
2007         case IEEE80211_AMPDU_TX_START:
2008                 if (ath9k_is_chanctx_enabled()) {
2009                         if (test_bit(ATH_OP_SCANNING, &common->op_flags)) {
2010                                 ret = -EBUSY;
2011                                 break;
2012                         }
2013                 }
2014                 ath9k_ps_wakeup(sc);
2015                 ret = ath_tx_aggr_start(sc, sta, tid, ssn);
2016                 if (!ret)
2017                         ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
2018                 ath9k_ps_restore(sc);
2019                 break;
2020         case IEEE80211_AMPDU_TX_STOP_FLUSH:
2021         case IEEE80211_AMPDU_TX_STOP_FLUSH_CONT:
2022                 flush = true;
2023         case IEEE80211_AMPDU_TX_STOP_CONT:
2024                 ath9k_ps_wakeup(sc);
2025                 ath_tx_aggr_stop(sc, sta, tid);
2026                 if (!flush)
2027                         ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
2028                 ath9k_ps_restore(sc);
2029                 break;
2030         case IEEE80211_AMPDU_TX_OPERATIONAL:
2031                 ath9k_ps_wakeup(sc);
2032                 ath_tx_aggr_resume(sc, sta, tid);
2033                 ath9k_ps_restore(sc);
2034                 break;
2035         default:
2036                 ath_err(ath9k_hw_common(sc->sc_ah), "Unknown AMPDU action\n");
2037         }
2038
2039         mutex_unlock(&sc->mutex);
2040
2041         return ret;
2042 }
2043
2044 static int ath9k_get_survey(struct ieee80211_hw *hw, int idx,
2045                              struct survey_info *survey)
2046 {
2047         struct ath_softc *sc = hw->priv;
2048         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2049         struct ieee80211_supported_band *sband;
2050         struct ieee80211_channel *chan;
2051         int pos;
2052
2053         if (IS_ENABLED(CONFIG_ATH9K_TX99))
2054                 return -EOPNOTSUPP;
2055
2056         spin_lock_bh(&common->cc_lock);
2057         if (idx == 0)
2058                 ath_update_survey_stats(sc);
2059
2060         sband = hw->wiphy->bands[NL80211_BAND_2GHZ];
2061         if (sband && idx >= sband->n_channels) {
2062                 idx -= sband->n_channels;
2063                 sband = NULL;
2064         }
2065
2066         if (!sband)
2067                 sband = hw->wiphy->bands[NL80211_BAND_5GHZ];
2068
2069         if (!sband || idx >= sband->n_channels) {
2070                 spin_unlock_bh(&common->cc_lock);
2071                 return -ENOENT;
2072         }
2073
2074         chan = &sband->channels[idx];
2075         pos = chan->hw_value;
2076         memcpy(survey, &sc->survey[pos], sizeof(*survey));
2077         survey->channel = chan;
2078         spin_unlock_bh(&common->cc_lock);
2079
2080         return 0;
2081 }
2082
2083 static void ath9k_enable_dynack(struct ath_softc *sc)
2084 {
2085 #ifdef CONFIG_ATH9K_DYNACK
2086         u32 rfilt;
2087         struct ath_hw *ah = sc->sc_ah;
2088
2089         ath_dynack_reset(ah);
2090
2091         ah->dynack.enabled = true;
2092         rfilt = ath_calcrxfilter(sc);
2093         ath9k_hw_setrxfilter(ah, rfilt);
2094 #endif
2095 }
2096
2097 static void ath9k_set_coverage_class(struct ieee80211_hw *hw,
2098                                      s16 coverage_class)
2099 {
2100         struct ath_softc *sc = hw->priv;
2101         struct ath_hw *ah = sc->sc_ah;
2102
2103         if (IS_ENABLED(CONFIG_ATH9K_TX99))
2104                 return;
2105
2106         mutex_lock(&sc->mutex);
2107
2108         if (coverage_class >= 0) {
2109                 ah->coverage_class = coverage_class;
2110                 if (ah->dynack.enabled) {
2111                         u32 rfilt;
2112
2113                         ah->dynack.enabled = false;
2114                         rfilt = ath_calcrxfilter(sc);
2115                         ath9k_hw_setrxfilter(ah, rfilt);
2116                 }
2117                 ath9k_ps_wakeup(sc);
2118                 ath9k_hw_init_global_settings(ah);
2119                 ath9k_ps_restore(sc);
2120         } else if (!ah->dynack.enabled) {
2121                 ath9k_enable_dynack(sc);
2122         }
2123
2124         mutex_unlock(&sc->mutex);
2125 }
2126
2127 static bool ath9k_has_tx_pending(struct ath_softc *sc,
2128                                  bool sw_pending)
2129 {
2130         int i, npend = 0;
2131
2132         for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
2133                 if (!ATH_TXQ_SETUP(sc, i))
2134                         continue;
2135
2136                 npend = ath9k_has_pending_frames(sc, &sc->tx.txq[i],
2137                                                  sw_pending);
2138                 if (npend)
2139                         break;
2140         }
2141
2142         return !!npend;
2143 }
2144
2145 static void ath9k_flush(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
2146                         u32 queues, bool drop)
2147 {
2148         struct ath_softc *sc = hw->priv;
2149         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2150
2151         if (ath9k_is_chanctx_enabled()) {
2152                 if (!test_bit(ATH_OP_MULTI_CHANNEL, &common->op_flags))
2153                         goto flush;
2154
2155                 /*
2156                  * If MCC is active, extend the flush timeout
2157                  * and wait for the HW/SW queues to become
2158                  * empty. This needs to be done outside the
2159                  * sc->mutex lock to allow the channel scheduler
2160                  * to switch channel contexts.
2161                  *
2162                  * The vif queues have been stopped in mac80211,
2163                  * so there won't be any incoming frames.
2164                  */
2165                 __ath9k_flush(hw, queues, drop, true, true);
2166                 return;
2167         }
2168 flush:
2169         mutex_lock(&sc->mutex);
2170         __ath9k_flush(hw, queues, drop, true, false);
2171         mutex_unlock(&sc->mutex);
2172 }
2173
2174 void __ath9k_flush(struct ieee80211_hw *hw, u32 queues, bool drop,
2175                    bool sw_pending, bool timeout_override)
2176 {
2177         struct ath_softc *sc = hw->priv;
2178         struct ath_hw *ah = sc->sc_ah;
2179         struct ath_common *common = ath9k_hw_common(ah);
2180         int timeout;
2181         bool drain_txq;
2182
2183         cancel_delayed_work_sync(&sc->tx_complete_work);
2184
2185         if (ah->ah_flags & AH_UNPLUGGED) {
2186                 ath_dbg(common, ANY, "Device has been unplugged!\n");
2187                 return;
2188         }
2189
2190         if (test_bit(ATH_OP_INVALID, &common->op_flags)) {
2191                 ath_dbg(common, ANY, "Device not present\n");
2192                 return;
2193         }
2194
2195         spin_lock_bh(&sc->chan_lock);
2196         if (timeout_override)
2197                 timeout = HZ / 5;
2198         else
2199                 timeout = sc->cur_chan->flush_timeout;
2200         spin_unlock_bh(&sc->chan_lock);
2201
2202         ath_dbg(common, CHAN_CTX,
2203                 "Flush timeout: %d\n", jiffies_to_msecs(timeout));
2204
2205         if (wait_event_timeout(sc->tx_wait, !ath9k_has_tx_pending(sc, sw_pending),
2206                                timeout) > 0)
2207                 drop = false;
2208
2209         if (drop) {
2210                 ath9k_ps_wakeup(sc);
2211                 spin_lock_bh(&sc->sc_pcu_lock);
2212                 drain_txq = ath_drain_all_txq(sc);
2213                 spin_unlock_bh(&sc->sc_pcu_lock);
2214
2215                 if (!drain_txq)
2216                         ath_reset(sc, NULL);
2217
2218                 ath9k_ps_restore(sc);
2219         }
2220
2221         ieee80211_queue_delayed_work(hw, &sc->tx_complete_work, 0);
2222 }
2223
2224 static bool ath9k_tx_frames_pending(struct ieee80211_hw *hw)
2225 {
2226         struct ath_softc *sc = hw->priv;
2227
2228         return ath9k_has_tx_pending(sc, true);
2229 }
2230
2231 static int ath9k_tx_last_beacon(struct ieee80211_hw *hw)
2232 {
2233         struct ath_softc *sc = hw->priv;
2234         struct ath_hw *ah = sc->sc_ah;
2235         struct ieee80211_vif *vif;
2236         struct ath_vif *avp;
2237         struct ath_buf *bf;
2238         struct ath_tx_status ts;
2239         bool edma = !!(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA);
2240         int status;
2241
2242         vif = sc->beacon.bslot[0];
2243         if (!vif)
2244                 return 0;
2245
2246         if (!vif->bss_conf.enable_beacon)
2247                 return 0;
2248
2249         avp = (void *)vif->drv_priv;
2250
2251         if (!sc->beacon.tx_processed && !edma) {
2252                 tasklet_disable(&sc->bcon_tasklet);
2253
2254                 bf = avp->av_bcbuf;
2255                 if (!bf || !bf->bf_mpdu)
2256                         goto skip;
2257
2258                 status = ath9k_hw_txprocdesc(ah, bf->bf_desc, &ts);
2259                 if (status == -EINPROGRESS)
2260                         goto skip;
2261
2262                 sc->beacon.tx_processed = true;
2263                 sc->beacon.tx_last = !(ts.ts_status & ATH9K_TXERR_MASK);
2264
2265 skip:
2266                 tasklet_enable(&sc->bcon_tasklet);
2267         }
2268
2269         return sc->beacon.tx_last;
2270 }
2271
2272 static int ath9k_get_stats(struct ieee80211_hw *hw,
2273                            struct ieee80211_low_level_stats *stats)
2274 {
2275         struct ath_softc *sc = hw->priv;
2276         struct ath_hw *ah = sc->sc_ah;
2277         struct ath9k_mib_stats *mib_stats = &ah->ah_mibStats;
2278
2279         stats->dot11ACKFailureCount = mib_stats->ackrcv_bad;
2280         stats->dot11RTSFailureCount = mib_stats->rts_bad;
2281         stats->dot11FCSErrorCount = mib_stats->fcs_bad;
2282         stats->dot11RTSSuccessCount = mib_stats->rts_good;
2283         return 0;
2284 }
2285
2286 static u32 fill_chainmask(u32 cap, u32 new)
2287 {
2288         u32 filled = 0;
2289         int i;
2290
2291         for (i = 0; cap && new; i++, cap >>= 1) {
2292                 if (!(cap & BIT(0)))
2293                         continue;
2294
2295                 if (new & BIT(0))
2296                         filled |= BIT(i);
2297
2298                 new >>= 1;
2299         }
2300
2301         return filled;
2302 }
2303
2304 static bool validate_antenna_mask(struct ath_hw *ah, u32 val)
2305 {
2306         if (AR_SREV_9300_20_OR_LATER(ah))
2307                 return true;
2308
2309         switch (val & 0x7) {
2310         case 0x1:
2311         case 0x3:
2312         case 0x7:
2313                 return true;
2314         case 0x2:
2315                 return (ah->caps.rx_chainmask == 1);
2316         default:
2317                 return false;
2318         }
2319 }
2320
2321 static int ath9k_set_antenna(struct ieee80211_hw *hw, u32 tx_ant, u32 rx_ant)
2322 {
2323         struct ath_softc *sc = hw->priv;
2324         struct ath_hw *ah = sc->sc_ah;
2325
2326         if (ah->caps.rx_chainmask != 1)
2327                 rx_ant |= tx_ant;
2328
2329         if (!validate_antenna_mask(ah, rx_ant) || !tx_ant)
2330                 return -EINVAL;
2331
2332         sc->ant_rx = rx_ant;
2333         sc->ant_tx = tx_ant;
2334
2335         if (ah->caps.rx_chainmask == 1)
2336                 return 0;
2337
2338         /* AR9100 runs into calibration issues if not all rx chains are enabled */
2339         if (AR_SREV_9100(ah))
2340                 ah->rxchainmask = 0x7;
2341         else
2342                 ah->rxchainmask = fill_chainmask(ah->caps.rx_chainmask, rx_ant);
2343
2344         ah->txchainmask = fill_chainmask(ah->caps.tx_chainmask, tx_ant);
2345         ath9k_cmn_reload_chainmask(ah);
2346
2347         return 0;
2348 }
2349
2350 static int ath9k_get_antenna(struct ieee80211_hw *hw, u32 *tx_ant, u32 *rx_ant)
2351 {
2352         struct ath_softc *sc = hw->priv;
2353
2354         *tx_ant = sc->ant_tx;
2355         *rx_ant = sc->ant_rx;
2356         return 0;
2357 }
2358
2359 static void ath9k_sw_scan_start(struct ieee80211_hw *hw,
2360                                 struct ieee80211_vif *vif,
2361                                 const u8 *mac_addr)
2362 {
2363         struct ath_softc *sc = hw->priv;
2364         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2365         set_bit(ATH_OP_SCANNING, &common->op_flags);
2366 }
2367
2368 static void ath9k_sw_scan_complete(struct ieee80211_hw *hw,
2369                                    struct ieee80211_vif *vif)
2370 {
2371         struct ath_softc *sc = hw->priv;
2372         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2373         clear_bit(ATH_OP_SCANNING, &common->op_flags);
2374 }
2375
2376 #ifdef CONFIG_ATH9K_CHANNEL_CONTEXT
2377
2378 static void ath9k_cancel_pending_offchannel(struct ath_softc *sc)
2379 {
2380         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2381
2382         if (sc->offchannel.roc_vif) {
2383                 ath_dbg(common, CHAN_CTX,
2384                         "%s: Aborting RoC\n", __func__);
2385
2386                 del_timer_sync(&sc->offchannel.timer);
2387                 if (sc->offchannel.state >= ATH_OFFCHANNEL_ROC_START)
2388                         ath_roc_complete(sc, ATH_ROC_COMPLETE_ABORT);
2389         }
2390
2391         if (test_bit(ATH_OP_SCANNING, &common->op_flags)) {
2392                 ath_dbg(common, CHAN_CTX,
2393                         "%s: Aborting HW scan\n", __func__);
2394
2395                 del_timer_sync(&sc->offchannel.timer);
2396                 ath_scan_complete(sc, true);
2397         }
2398 }
2399
2400 static int ath9k_hw_scan(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
2401                          struct ieee80211_scan_request *hw_req)
2402 {
2403         struct cfg80211_scan_request *req = &hw_req->req;
2404         struct ath_softc *sc = hw->priv;
2405         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2406         int ret = 0;
2407
2408         mutex_lock(&sc->mutex);
2409
2410         if (WARN_ON(sc->offchannel.scan_req)) {
2411                 ret = -EBUSY;
2412                 goto out;
2413         }
2414
2415         ath9k_ps_wakeup(sc);
2416         set_bit(ATH_OP_SCANNING, &common->op_flags);
2417         sc->offchannel.scan_vif = vif;
2418         sc->offchannel.scan_req = req;
2419         sc->offchannel.scan_idx = 0;
2420
2421         ath_dbg(common, CHAN_CTX, "HW scan request received on vif: %pM\n",
2422                 vif->addr);
2423
2424         if (sc->offchannel.state == ATH_OFFCHANNEL_IDLE) {
2425                 ath_dbg(common, CHAN_CTX, "Starting HW scan\n");
2426                 ath_offchannel_next(sc);
2427         }
2428
2429 out:
2430         mutex_unlock(&sc->mutex);
2431
2432         return ret;
2433 }
2434
2435 static void ath9k_cancel_hw_scan(struct ieee80211_hw *hw,
2436                                  struct ieee80211_vif *vif)
2437 {
2438         struct ath_softc *sc = hw->priv;
2439         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2440
2441         ath_dbg(common, CHAN_CTX, "Cancel HW scan on vif: %pM\n", vif->addr);
2442
2443         mutex_lock(&sc->mutex);
2444         del_timer_sync(&sc->offchannel.timer);
2445         ath_scan_complete(sc, true);
2446         mutex_unlock(&sc->mutex);
2447 }
2448
2449 static int ath9k_remain_on_channel(struct ieee80211_hw *hw,
2450                                    struct ieee80211_vif *vif,
2451                                    struct ieee80211_channel *chan, int duration,
2452                                    enum ieee80211_roc_type type)
2453 {
2454         struct ath_softc *sc = hw->priv;
2455         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2456         int ret = 0;
2457
2458         mutex_lock(&sc->mutex);
2459
2460         if (WARN_ON(sc->offchannel.roc_vif)) {
2461                 ret = -EBUSY;
2462                 goto out;
2463         }
2464
2465         ath9k_ps_wakeup(sc);
2466         sc->offchannel.roc_vif = vif;
2467         sc->offchannel.roc_chan = chan;
2468         sc->offchannel.roc_duration = duration;
2469
2470         ath_dbg(common, CHAN_CTX,
2471                 "RoC request on vif: %pM, type: %d duration: %d\n",
2472                 vif->addr, type, duration);
2473
2474         if (sc->offchannel.state == ATH_OFFCHANNEL_IDLE) {
2475                 ath_dbg(common, CHAN_CTX, "Starting RoC period\n");
2476                 ath_offchannel_next(sc);
2477         }
2478
2479 out:
2480         mutex_unlock(&sc->mutex);
2481
2482         return ret;
2483 }
2484
2485 static int ath9k_cancel_remain_on_channel(struct ieee80211_hw *hw)
2486 {
2487         struct ath_softc *sc = hw->priv;
2488         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2489
2490         mutex_lock(&sc->mutex);
2491
2492         ath_dbg(common, CHAN_CTX, "Cancel RoC\n");
2493         del_timer_sync(&sc->offchannel.timer);
2494
2495         if (sc->offchannel.roc_vif) {
2496                 if (sc->offchannel.state >= ATH_OFFCHANNEL_ROC_START)
2497                         ath_roc_complete(sc, ATH_ROC_COMPLETE_CANCEL);
2498         }
2499
2500         mutex_unlock(&sc->mutex);
2501
2502         return 0;
2503 }
2504
2505 static int ath9k_add_chanctx(struct ieee80211_hw *hw,
2506                              struct ieee80211_chanctx_conf *conf)
2507 {
2508         struct ath_softc *sc = hw->priv;
2509         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2510         struct ath_chanctx *ctx, **ptr;
2511         int pos;
2512
2513         mutex_lock(&sc->mutex);
2514
2515         ath_for_each_chanctx(sc, ctx) {
2516                 if (ctx->assigned)
2517                         continue;
2518
2519                 ptr = (void *) conf->drv_priv;
2520                 *ptr = ctx;
2521                 ctx->assigned = true;
2522                 pos = ctx - &sc->chanctx[0];
2523                 ctx->hw_queue_base = pos * IEEE80211_NUM_ACS;
2524
2525                 ath_dbg(common, CHAN_CTX,
2526                         "Add channel context: %d MHz\n",
2527                         conf->def.chan->center_freq);
2528
2529                 ath_chanctx_set_channel(sc, ctx, &conf->def);
2530
2531                 mutex_unlock(&sc->mutex);
2532                 return 0;
2533         }
2534
2535         mutex_unlock(&sc->mutex);
2536         return -ENOSPC;
2537 }
2538
2539
2540 static void ath9k_remove_chanctx(struct ieee80211_hw *hw,
2541                                  struct ieee80211_chanctx_conf *conf)
2542 {
2543         struct ath_softc *sc = hw->priv;
2544         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2545         struct ath_chanctx *ctx = ath_chanctx_get(conf);
2546
2547         mutex_lock(&sc->mutex);
2548
2549         ath_dbg(common, CHAN_CTX,
2550                 "Remove channel context: %d MHz\n",
2551                 conf->def.chan->center_freq);
2552
2553         ctx->assigned = false;
2554         ctx->hw_queue_base = 0;
2555         ath_chanctx_event(sc, NULL, ATH_CHANCTX_EVENT_UNASSIGN);
2556
2557         mutex_unlock(&sc->mutex);
2558 }
2559
2560 static void ath9k_change_chanctx(struct ieee80211_hw *hw,
2561                                  struct ieee80211_chanctx_conf *conf,
2562                                  u32 changed)
2563 {
2564         struct ath_softc *sc = hw->priv;
2565         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2566         struct ath_chanctx *ctx = ath_chanctx_get(conf);
2567
2568         mutex_lock(&sc->mutex);
2569         ath_dbg(common, CHAN_CTX,
2570                 "Change channel context: %d MHz\n",
2571                 conf->def.chan->center_freq);
2572         ath_chanctx_set_channel(sc, ctx, &conf->def);
2573         mutex_unlock(&sc->mutex);
2574 }
2575
2576 static int ath9k_assign_vif_chanctx(struct ieee80211_hw *hw,
2577                                     struct ieee80211_vif *vif,
2578                                     struct ieee80211_chanctx_conf *conf)
2579 {
2580         struct ath_softc *sc = hw->priv;
2581         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2582         struct ath_vif *avp = (void *)vif->drv_priv;
2583         struct ath_chanctx *ctx = ath_chanctx_get(conf);
2584         int i;
2585
2586         ath9k_cancel_pending_offchannel(sc);
2587
2588         mutex_lock(&sc->mutex);
2589
2590         ath_dbg(common, CHAN_CTX,
2591                 "Assign VIF (addr: %pM, type: %d, p2p: %d) to channel context: %d MHz\n",
2592                 vif->addr, vif->type, vif->p2p,
2593                 conf->def.chan->center_freq);
2594
2595         avp->chanctx = ctx;
2596         ctx->nvifs_assigned++;
2597         list_add_tail(&avp->list, &ctx->vifs);
2598         ath9k_calculate_summary_state(sc, ctx);
2599         for (i = 0; i < IEEE80211_NUM_ACS; i++)
2600                 vif->hw_queue[i] = ctx->hw_queue_base + i;
2601
2602         mutex_unlock(&sc->mutex);
2603
2604         return 0;
2605 }
2606
2607 static void ath9k_unassign_vif_chanctx(struct ieee80211_hw *hw,
2608                                        struct ieee80211_vif *vif,
2609                                        struct ieee80211_chanctx_conf *conf)
2610 {
2611         struct ath_softc *sc = hw->priv;
2612         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2613         struct ath_vif *avp = (void *)vif->drv_priv;
2614         struct ath_chanctx *ctx = ath_chanctx_get(conf);
2615         int ac;
2616
2617         ath9k_cancel_pending_offchannel(sc);
2618
2619         mutex_lock(&sc->mutex);
2620
2621         ath_dbg(common, CHAN_CTX,
2622                 "Remove VIF (addr: %pM, type: %d, p2p: %d) from channel context: %d MHz\n",
2623                 vif->addr, vif->type, vif->p2p,
2624                 conf->def.chan->center_freq);
2625
2626         avp->chanctx = NULL;
2627         ctx->nvifs_assigned--;
2628         list_del(&avp->list);
2629         ath9k_calculate_summary_state(sc, ctx);
2630         for (ac = 0; ac < IEEE80211_NUM_ACS; ac++)
2631                 vif->hw_queue[ac] = IEEE80211_INVAL_HW_QUEUE;
2632
2633         mutex_unlock(&sc->mutex);
2634 }
2635
2636 static void ath9k_mgd_prepare_tx(struct ieee80211_hw *hw,
2637                                  struct ieee80211_vif *vif)
2638 {
2639         struct ath_softc *sc = hw->priv;
2640         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2641         struct ath_vif *avp = (struct ath_vif *) vif->drv_priv;
2642         struct ath_beacon_config *cur_conf;
2643         struct ath_chanctx *go_ctx;
2644         unsigned long timeout;
2645         bool changed = false;
2646         u32 beacon_int;
2647
2648         if (!test_bit(ATH_OP_MULTI_CHANNEL, &common->op_flags))
2649                 return;
2650
2651         if (!avp->chanctx)
2652                 return;
2653
2654         mutex_lock(&sc->mutex);
2655
2656         spin_lock_bh(&sc->chan_lock);
2657         if (sc->next_chan || (sc->cur_chan != avp->chanctx))
2658                 changed = true;
2659         spin_unlock_bh(&sc->chan_lock);
2660
2661         if (!changed)
2662                 goto out;
2663
2664         ath9k_cancel_pending_offchannel(sc);
2665
2666         go_ctx = ath_is_go_chanctx_present(sc);
2667
2668         if (go_ctx) {
2669                 /*
2670                  * Wait till the GO interface gets a chance
2671                  * to send out an NoA.
2672                  */
2673                 spin_lock_bh(&sc->chan_lock);
2674                 sc->sched.mgd_prepare_tx = true;
2675                 cur_conf = &go_ctx->beacon;
2676                 beacon_int = TU_TO_USEC(cur_conf->beacon_interval);
2677                 spin_unlock_bh(&sc->chan_lock);
2678
2679                 timeout = usecs_to_jiffies(beacon_int * 2);
2680                 init_completion(&sc->go_beacon);
2681
2682                 mutex_unlock(&sc->mutex);
2683
2684                 if (wait_for_completion_timeout(&sc->go_beacon,
2685                                                 timeout) == 0) {
2686                         ath_dbg(common, CHAN_CTX,
2687                                 "Failed to send new NoA\n");
2688
2689                         spin_lock_bh(&sc->chan_lock);
2690                         sc->sched.mgd_prepare_tx = false;
2691                         spin_unlock_bh(&sc->chan_lock);
2692                 }
2693
2694                 mutex_lock(&sc->mutex);
2695         }
2696
2697         ath_dbg(common, CHAN_CTX,
2698                 "%s: Set chanctx state to FORCE_ACTIVE for vif: %pM\n",
2699                 __func__, vif->addr);
2700
2701         spin_lock_bh(&sc->chan_lock);
2702         sc->next_chan = avp->chanctx;
2703         sc->sched.state = ATH_CHANCTX_STATE_FORCE_ACTIVE;
2704         spin_unlock_bh(&sc->chan_lock);
2705
2706         ath_chanctx_set_next(sc, true);
2707 out:
2708         mutex_unlock(&sc->mutex);
2709 }
2710
2711 void ath9k_fill_chanctx_ops(void)
2712 {
2713         if (!ath9k_is_chanctx_enabled())
2714                 return;
2715
2716         ath9k_ops.hw_scan                  = ath9k_hw_scan;
2717         ath9k_ops.cancel_hw_scan           = ath9k_cancel_hw_scan;
2718         ath9k_ops.remain_on_channel        = ath9k_remain_on_channel;
2719         ath9k_ops.cancel_remain_on_channel = ath9k_cancel_remain_on_channel;
2720         ath9k_ops.add_chanctx              = ath9k_add_chanctx;
2721         ath9k_ops.remove_chanctx           = ath9k_remove_chanctx;
2722         ath9k_ops.change_chanctx           = ath9k_change_chanctx;
2723         ath9k_ops.assign_vif_chanctx       = ath9k_assign_vif_chanctx;
2724         ath9k_ops.unassign_vif_chanctx     = ath9k_unassign_vif_chanctx;
2725         ath9k_ops.mgd_prepare_tx           = ath9k_mgd_prepare_tx;
2726 }
2727
2728 #endif
2729
2730 static int ath9k_get_txpower(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
2731                              int *dbm)
2732 {
2733         struct ath_softc *sc = hw->priv;
2734         struct ath_vif *avp = (void *)vif->drv_priv;
2735
2736         mutex_lock(&sc->mutex);
2737         if (avp->chanctx)
2738                 *dbm = avp->chanctx->cur_txpower;
2739         else
2740                 *dbm = sc->cur_chan->cur_txpower;
2741         mutex_unlock(&sc->mutex);
2742
2743         *dbm /= 2;
2744
2745         return 0;
2746 }
2747
2748 struct ieee80211_ops ath9k_ops = {
2749         .tx                 = ath9k_tx,
2750         .start              = ath9k_start,
2751         .stop               = ath9k_stop,
2752         .add_interface      = ath9k_add_interface,
2753         .change_interface   = ath9k_change_interface,
2754         .remove_interface   = ath9k_remove_interface,
2755         .config             = ath9k_config,
2756         .configure_filter   = ath9k_configure_filter,
2757         .sta_state          = ath9k_sta_state,
2758         .sta_notify         = ath9k_sta_notify,
2759         .conf_tx            = ath9k_conf_tx,
2760         .bss_info_changed   = ath9k_bss_info_changed,
2761         .set_key            = ath9k_set_key,
2762         .get_tsf            = ath9k_get_tsf,
2763         .set_tsf            = ath9k_set_tsf,
2764         .reset_tsf          = ath9k_reset_tsf,
2765         .ampdu_action       = ath9k_ampdu_action,
2766         .get_survey         = ath9k_get_survey,
2767         .rfkill_poll        = ath9k_rfkill_poll_state,
2768         .set_coverage_class = ath9k_set_coverage_class,
2769         .flush              = ath9k_flush,
2770         .tx_frames_pending  = ath9k_tx_frames_pending,
2771         .tx_last_beacon     = ath9k_tx_last_beacon,
2772         .release_buffered_frames = ath9k_release_buffered_frames,
2773         .get_stats          = ath9k_get_stats,
2774         .set_antenna        = ath9k_set_antenna,
2775         .get_antenna        = ath9k_get_antenna,
2776
2777 #ifdef CONFIG_ATH9K_WOW
2778         .suspend            = ath9k_suspend,
2779         .resume             = ath9k_resume,
2780         .set_wakeup         = ath9k_set_wakeup,
2781 #endif
2782
2783 #ifdef CONFIG_ATH9K_DEBUGFS
2784         .get_et_sset_count  = ath9k_get_et_sset_count,
2785         .get_et_stats       = ath9k_get_et_stats,
2786         .get_et_strings     = ath9k_get_et_strings,
2787 #endif
2788
2789 #if defined(CONFIG_MAC80211_DEBUGFS) && defined(CONFIG_ATH9K_STATION_STATISTICS)
2790         .sta_add_debugfs    = ath9k_sta_add_debugfs,
2791 #endif
2792         .sw_scan_start      = ath9k_sw_scan_start,
2793         .sw_scan_complete   = ath9k_sw_scan_complete,
2794         .get_txpower        = ath9k_get_txpower,
2795 };