2 * Copyright (c) 2010-2011 Atheros Communications Inc.
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
21 MODULE_AUTHOR("Atheros Communications");
22 MODULE_LICENSE("Dual BSD/GPL");
23 MODULE_DESCRIPTION("Atheros driver 802.11n HTC based wireless devices");
25 static unsigned int ath9k_debug = ATH_DBG_DEFAULT;
26 module_param_named(debug, ath9k_debug, uint, 0);
27 MODULE_PARM_DESC(debug, "Debugging mask");
29 int htc_modparam_nohwcrypt;
30 module_param_named(nohwcrypt, htc_modparam_nohwcrypt, int, 0444);
31 MODULE_PARM_DESC(nohwcrypt, "Disable hardware encryption");
33 static int ath9k_htc_btcoex_enable;
34 module_param_named(btcoex_enable, ath9k_htc_btcoex_enable, int, 0444);
35 MODULE_PARM_DESC(btcoex_enable, "Enable wifi-BT coexistence");
37 static int ath9k_ps_enable;
38 module_param_named(ps_enable, ath9k_ps_enable, int, 0444);
39 MODULE_PARM_DESC(ps_enable, "Enable WLAN PowerSave");
41 int htc_use_dev_fw = 0;
42 module_param_named(use_dev_fw, htc_use_dev_fw, int, 0444);
43 MODULE_PARM_DESC(use_dev_fw, "Use development FW version");
45 #ifdef CONFIG_MAC80211_LEDS
46 int ath9k_htc_led_blink = 1;
47 module_param_named(blink, ath9k_htc_led_blink, int, 0444);
48 MODULE_PARM_DESC(blink, "Enable LED blink on activity");
50 static const struct ieee80211_tpt_blink ath9k_htc_tpt_blink[] = {
51 { .throughput = 0 * 1024, .blink_time = 334 },
52 { .throughput = 1 * 1024, .blink_time = 260 },
53 { .throughput = 5 * 1024, .blink_time = 220 },
54 { .throughput = 10 * 1024, .blink_time = 190 },
55 { .throughput = 20 * 1024, .blink_time = 170 },
56 { .throughput = 50 * 1024, .blink_time = 150 },
57 { .throughput = 70 * 1024, .blink_time = 130 },
58 { .throughput = 100 * 1024, .blink_time = 110 },
59 { .throughput = 200 * 1024, .blink_time = 80 },
60 { .throughput = 300 * 1024, .blink_time = 50 },
64 static void ath9k_htc_op_ps_wakeup(struct ath_common *common)
66 ath9k_htc_ps_wakeup((struct ath9k_htc_priv *) common->priv);
69 static void ath9k_htc_op_ps_restore(struct ath_common *common)
71 ath9k_htc_ps_restore((struct ath9k_htc_priv *) common->priv);
74 static struct ath_ps_ops ath9k_htc_ps_ops = {
75 .wakeup = ath9k_htc_op_ps_wakeup,
76 .restore = ath9k_htc_op_ps_restore,
79 static int ath9k_htc_wait_for_target(struct ath9k_htc_priv *priv)
81 unsigned long time_left;
83 if (atomic_read(&priv->htc->tgt_ready) > 0) {
84 atomic_dec(&priv->htc->tgt_ready);
88 /* Firmware can take up to 50ms to get ready, to be safe use 1 second */
89 time_left = wait_for_completion_timeout(&priv->htc->target_wait, HZ);
91 dev_err(priv->dev, "ath9k_htc: Target is unresponsive\n");
95 atomic_dec(&priv->htc->tgt_ready);
100 static void ath9k_deinit_priv(struct ath9k_htc_priv *priv)
102 ath9k_hw_deinit(priv->ah);
107 static void ath9k_deinit_device(struct ath9k_htc_priv *priv)
109 struct ieee80211_hw *hw = priv->hw;
111 wiphy_rfkill_stop_polling(hw->wiphy);
112 ath9k_deinit_leds(priv);
113 ath9k_htc_deinit_debug(priv);
114 ieee80211_unregister_hw(hw);
115 ath9k_rx_cleanup(priv);
116 ath9k_tx_cleanup(priv);
117 ath9k_deinit_priv(priv);
120 static inline int ath9k_htc_connect_svc(struct ath9k_htc_priv *priv,
124 enum htc_endpoint_id,
126 enum htc_endpoint_id *ep_id)
128 struct htc_service_connreq req;
130 memset(&req, 0, sizeof(struct htc_service_connreq));
132 req.service_id = service_id;
133 req.ep_callbacks.priv = priv;
134 req.ep_callbacks.rx = ath9k_htc_rxep;
135 req.ep_callbacks.tx = tx;
137 return htc_connect_service(priv->htc, &req, ep_id);
140 static int ath9k_init_htc_services(struct ath9k_htc_priv *priv, u16 devid,
146 ret = ath9k_wmi_connect(priv->htc, priv->wmi, &priv->wmi_cmd_ep);
151 ret = ath9k_htc_connect_svc(priv, WMI_BEACON_SVC, ath9k_htc_beaconep,
157 ret = ath9k_htc_connect_svc(priv, WMI_CAB_SVC, ath9k_htc_txep,
164 ret = ath9k_htc_connect_svc(priv, WMI_UAPSD_SVC, ath9k_htc_txep,
170 ret = ath9k_htc_connect_svc(priv, WMI_MGMT_SVC, ath9k_htc_txep,
176 ret = ath9k_htc_connect_svc(priv, WMI_DATA_BE_SVC, ath9k_htc_txep,
182 ret = ath9k_htc_connect_svc(priv, WMI_DATA_BK_SVC, ath9k_htc_txep,
188 ret = ath9k_htc_connect_svc(priv, WMI_DATA_VI_SVC, ath9k_htc_txep,
194 ret = ath9k_htc_connect_svc(priv, WMI_DATA_VO_SVC, ath9k_htc_txep,
200 * Setup required credits before initializing HTC.
201 * This is a bit hacky, but, since queuing is done in
202 * the HIF layer, shouldn't matter much.
205 if (IS_AR7010_DEVICE(drv_info))
206 priv->htc->credits = 45;
208 priv->htc->credits = 33;
210 ret = htc_init(priv->htc);
214 dev_info(priv->dev, "ath9k_htc: HTC initialized with %d credits\n",
220 dev_err(priv->dev, "ath9k_htc: Unable to initialize HTC services\n");
224 static void ath9k_reg_notifier(struct wiphy *wiphy,
225 struct regulatory_request *request)
227 struct ieee80211_hw *hw = wiphy_to_ieee80211_hw(wiphy);
228 struct ath9k_htc_priv *priv = hw->priv;
230 ath_reg_notifier_apply(wiphy, request,
231 ath9k_hw_regulatory(priv->ah));
234 static unsigned int ath9k_regread(void *hw_priv, u32 reg_offset)
236 struct ath_hw *ah = (struct ath_hw *) hw_priv;
237 struct ath_common *common = ath9k_hw_common(ah);
238 struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
239 __be32 val, reg = cpu_to_be32(reg_offset);
242 r = ath9k_wmi_cmd(priv->wmi, WMI_REG_READ_CMDID,
243 (u8 *) ®, sizeof(reg),
244 (u8 *) &val, sizeof(val),
247 ath_dbg(common, WMI, "REGISTER READ FAILED: (0x%04x, %d)\n",
252 return be32_to_cpu(val);
255 static void ath9k_multi_regread(void *hw_priv, u32 *addr,
258 struct ath_hw *ah = (struct ath_hw *) hw_priv;
259 struct ath_common *common = ath9k_hw_common(ah);
260 struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
265 for (i = 0; i < count; i++) {
266 tmpaddr[i] = cpu_to_be32(addr[i]);
269 ret = ath9k_wmi_cmd(priv->wmi, WMI_REG_READ_CMDID,
270 (u8 *)tmpaddr , sizeof(u32) * count,
271 (u8 *)tmpval, sizeof(u32) * count,
275 "Multiple REGISTER READ FAILED (count: %d)\n", count);
278 for (i = 0; i < count; i++) {
279 val[i] = be32_to_cpu(tmpval[i]);
283 static void ath9k_regwrite_multi(struct ath_common *common)
285 struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
289 r = ath9k_wmi_cmd(priv->wmi, WMI_REG_WRITE_CMDID,
290 (u8 *) &priv->wmi->multi_write,
291 sizeof(struct register_write) * priv->wmi->multi_write_idx,
292 (u8 *) &rsp_status, sizeof(rsp_status),
296 "REGISTER WRITE FAILED, multi len: %d\n",
297 priv->wmi->multi_write_idx);
299 priv->wmi->multi_write_idx = 0;
302 static void ath9k_regwrite_single(void *hw_priv, u32 val, u32 reg_offset)
304 struct ath_hw *ah = (struct ath_hw *) hw_priv;
305 struct ath_common *common = ath9k_hw_common(ah);
306 struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
307 const __be32 buf[2] = {
308 cpu_to_be32(reg_offset),
313 r = ath9k_wmi_cmd(priv->wmi, WMI_REG_WRITE_CMDID,
314 (u8 *) &buf, sizeof(buf),
315 (u8 *) &val, sizeof(val),
318 ath_dbg(common, WMI, "REGISTER WRITE FAILED:(0x%04x, %d)\n",
323 static void ath9k_regwrite_buffer(void *hw_priv, u32 val, u32 reg_offset)
325 struct ath_hw *ah = (struct ath_hw *) hw_priv;
326 struct ath_common *common = ath9k_hw_common(ah);
327 struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
329 mutex_lock(&priv->wmi->multi_write_mutex);
331 /* Store the register/value */
332 priv->wmi->multi_write[priv->wmi->multi_write_idx].reg =
333 cpu_to_be32(reg_offset);
334 priv->wmi->multi_write[priv->wmi->multi_write_idx].val =
337 priv->wmi->multi_write_idx++;
339 /* If the buffer is full, send it out. */
340 if (priv->wmi->multi_write_idx == MAX_CMD_NUMBER)
341 ath9k_regwrite_multi(common);
343 mutex_unlock(&priv->wmi->multi_write_mutex);
346 static void ath9k_regwrite(void *hw_priv, u32 val, u32 reg_offset)
348 struct ath_hw *ah = (struct ath_hw *) hw_priv;
349 struct ath_common *common = ath9k_hw_common(ah);
350 struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
352 if (atomic_read(&priv->wmi->mwrite_cnt))
353 ath9k_regwrite_buffer(hw_priv, val, reg_offset);
355 ath9k_regwrite_single(hw_priv, val, reg_offset);
358 static void ath9k_enable_regwrite_buffer(void *hw_priv)
360 struct ath_hw *ah = (struct ath_hw *) hw_priv;
361 struct ath_common *common = ath9k_hw_common(ah);
362 struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
364 atomic_inc(&priv->wmi->mwrite_cnt);
367 static void ath9k_regwrite_flush(void *hw_priv)
369 struct ath_hw *ah = (struct ath_hw *) hw_priv;
370 struct ath_common *common = ath9k_hw_common(ah);
371 struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
373 atomic_dec(&priv->wmi->mwrite_cnt);
375 mutex_lock(&priv->wmi->multi_write_mutex);
377 if (priv->wmi->multi_write_idx)
378 ath9k_regwrite_multi(common);
380 mutex_unlock(&priv->wmi->multi_write_mutex);
383 static void ath9k_reg_rmw_buffer(void *hw_priv,
384 u32 reg_offset, u32 set, u32 clr)
386 struct ath_hw *ah = (struct ath_hw *) hw_priv;
387 struct ath_common *common = ath9k_hw_common(ah);
388 struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
392 mutex_lock(&priv->wmi->multi_rmw_mutex);
394 /* Store the register/value */
395 priv->wmi->multi_rmw[priv->wmi->multi_rmw_idx].reg =
396 cpu_to_be32(reg_offset);
397 priv->wmi->multi_rmw[priv->wmi->multi_rmw_idx].set =
399 priv->wmi->multi_rmw[priv->wmi->multi_rmw_idx].clr =
402 priv->wmi->multi_rmw_idx++;
404 /* If the buffer is full, send it out. */
405 if (priv->wmi->multi_rmw_idx == MAX_RMW_CMD_NUMBER) {
406 r = ath9k_wmi_cmd(priv->wmi, WMI_REG_RMW_CMDID,
407 (u8 *) &priv->wmi->multi_rmw,
408 sizeof(struct register_write) * priv->wmi->multi_rmw_idx,
409 (u8 *) &rsp_status, sizeof(rsp_status),
413 "REGISTER RMW FAILED, multi len: %d\n",
414 priv->wmi->multi_rmw_idx);
416 priv->wmi->multi_rmw_idx = 0;
419 mutex_unlock(&priv->wmi->multi_rmw_mutex);
422 static void ath9k_reg_rmw_flush(void *hw_priv)
424 struct ath_hw *ah = (struct ath_hw *) hw_priv;
425 struct ath_common *common = ath9k_hw_common(ah);
426 struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
430 if (test_bit(HTC_FWFLAG_NO_RMW, &priv->fw_flags))
433 atomic_dec(&priv->wmi->m_rmw_cnt);
435 mutex_lock(&priv->wmi->multi_rmw_mutex);
437 if (priv->wmi->multi_rmw_idx) {
438 r = ath9k_wmi_cmd(priv->wmi, WMI_REG_RMW_CMDID,
439 (u8 *) &priv->wmi->multi_rmw,
440 sizeof(struct register_rmw) * priv->wmi->multi_rmw_idx,
441 (u8 *) &rsp_status, sizeof(rsp_status),
445 "REGISTER RMW FAILED, multi len: %d\n",
446 priv->wmi->multi_rmw_idx);
448 priv->wmi->multi_rmw_idx = 0;
451 mutex_unlock(&priv->wmi->multi_rmw_mutex);
454 static void ath9k_enable_rmw_buffer(void *hw_priv)
456 struct ath_hw *ah = (struct ath_hw *) hw_priv;
457 struct ath_common *common = ath9k_hw_common(ah);
458 struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
460 if (test_bit(HTC_FWFLAG_NO_RMW, &priv->fw_flags))
463 atomic_inc(&priv->wmi->m_rmw_cnt);
466 static u32 ath9k_reg_rmw_single(void *hw_priv,
467 u32 reg_offset, u32 set, u32 clr)
469 struct ath_hw *ah = (struct ath_hw *) hw_priv;
470 struct ath_common *common = ath9k_hw_common(ah);
471 struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
472 struct register_rmw buf, buf_ret;
476 buf.reg = cpu_to_be32(reg_offset);
477 buf.set = cpu_to_be32(set);
478 buf.clr = cpu_to_be32(clr);
480 ret = ath9k_wmi_cmd(priv->wmi, WMI_REG_RMW_CMDID,
481 (u8 *) &buf, sizeof(buf),
482 (u8 *) &buf_ret, sizeof(buf_ret),
485 ath_dbg(common, WMI, "REGISTER RMW FAILED:(0x%04x, %d)\n",
491 static u32 ath9k_reg_rmw(void *hw_priv, u32 reg_offset, u32 set, u32 clr)
493 struct ath_hw *ah = (struct ath_hw *) hw_priv;
494 struct ath_common *common = ath9k_hw_common(ah);
495 struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
497 if (test_bit(HTC_FWFLAG_NO_RMW, &priv->fw_flags)) {
500 val = REG_READ(ah, reg_offset);
503 REG_WRITE(ah, reg_offset, val);
508 if (atomic_read(&priv->wmi->m_rmw_cnt))
509 ath9k_reg_rmw_buffer(hw_priv, reg_offset, set, clr);
511 ath9k_reg_rmw_single(hw_priv, reg_offset, set, clr);
516 static void ath_usb_read_cachesize(struct ath_common *common, int *csz)
518 *csz = L1_CACHE_BYTES >> 2;
521 static bool ath_usb_eeprom_read(struct ath_common *common, u32 off, u16 *data)
523 struct ath_hw *ah = (struct ath_hw *) common->ah;
525 (void)REG_READ(ah, AR5416_EEPROM_OFFSET + (off << AR5416_EEPROM_S));
527 if (!ath9k_hw_wait(ah,
528 AR_EEPROM_STATUS_DATA,
529 AR_EEPROM_STATUS_DATA_BUSY |
530 AR_EEPROM_STATUS_DATA_PROT_ACCESS, 0,
534 *data = MS(REG_READ(ah, AR_EEPROM_STATUS_DATA),
535 AR_EEPROM_STATUS_DATA_VAL);
540 static const struct ath_bus_ops ath9k_usb_bus_ops = {
541 .ath_bus_type = ATH_USB,
542 .read_cachesize = ath_usb_read_cachesize,
543 .eeprom_read = ath_usb_eeprom_read,
546 static int ath9k_init_queues(struct ath9k_htc_priv *priv)
548 struct ath_common *common = ath9k_hw_common(priv->ah);
551 for (i = 0; i < ARRAY_SIZE(priv->hwq_map); i++)
552 priv->hwq_map[i] = -1;
554 priv->beacon.beaconq = ath9k_hw_beaconq_setup(priv->ah);
555 if (priv->beacon.beaconq == -1) {
556 ath_err(common, "Unable to setup BEACON xmit queue\n");
560 priv->cabq = ath9k_htc_cabq_setup(priv);
561 if (priv->cabq == -1) {
562 ath_err(common, "Unable to setup CAB xmit queue\n");
566 if (!ath9k_htc_txq_setup(priv, IEEE80211_AC_BE)) {
567 ath_err(common, "Unable to setup xmit queue for BE traffic\n");
571 if (!ath9k_htc_txq_setup(priv, IEEE80211_AC_BK)) {
572 ath_err(common, "Unable to setup xmit queue for BK traffic\n");
575 if (!ath9k_htc_txq_setup(priv, IEEE80211_AC_VI)) {
576 ath_err(common, "Unable to setup xmit queue for VI traffic\n");
579 if (!ath9k_htc_txq_setup(priv, IEEE80211_AC_VO)) {
580 ath_err(common, "Unable to setup xmit queue for VO traffic\n");
590 static void ath9k_init_misc(struct ath9k_htc_priv *priv)
592 struct ath_common *common = ath9k_hw_common(priv->ah);
594 memcpy(common->bssidmask, ath_bcast_mac, ETH_ALEN);
596 common->last_rssi = ATH_RSSI_DUMMY_MARKER;
597 priv->ah->opmode = NL80211_IFTYPE_STATION;
599 priv->spec_priv.ah = priv->ah;
600 priv->spec_priv.spec_config.enabled = 0;
601 priv->spec_priv.spec_config.short_repeat = true;
602 priv->spec_priv.spec_config.count = 8;
603 priv->spec_priv.spec_config.endless = false;
604 priv->spec_priv.spec_config.period = 0x12;
605 priv->spec_priv.spec_config.fft_period = 0x02;
608 static int ath9k_init_priv(struct ath9k_htc_priv *priv,
609 u16 devid, char *product,
612 struct ath_hw *ah = NULL;
613 struct ath_common *common;
614 int i, ret = 0, csz = 0;
616 ah = kzalloc(sizeof(struct ath_hw), GFP_KERNEL);
622 ah->hw_version.devid = devid;
623 ah->hw_version.usbdev = drv_info;
624 ah->ah_flags |= AH_USE_EEPROM;
625 ah->reg_ops.read = ath9k_regread;
626 ah->reg_ops.multi_read = ath9k_multi_regread;
627 ah->reg_ops.write = ath9k_regwrite;
628 ah->reg_ops.enable_write_buffer = ath9k_enable_regwrite_buffer;
629 ah->reg_ops.write_flush = ath9k_regwrite_flush;
630 ah->reg_ops.enable_rmw_buffer = ath9k_enable_rmw_buffer;
631 ah->reg_ops.rmw_flush = ath9k_reg_rmw_flush;
632 ah->reg_ops.rmw = ath9k_reg_rmw;
635 common = ath9k_hw_common(ah);
636 common->ops = &ah->reg_ops;
637 common->ps_ops = &ath9k_htc_ps_ops;
638 common->bus_ops = &ath9k_usb_bus_ops;
640 common->hw = priv->hw;
642 common->debug_mask = ath9k_debug;
643 common->btcoex_enabled = ath9k_htc_btcoex_enable == 1;
644 set_bit(ATH_OP_INVALID, &common->op_flags);
646 spin_lock_init(&priv->beacon_lock);
647 spin_lock_init(&priv->tx.tx_lock);
648 mutex_init(&priv->mutex);
649 mutex_init(&priv->htc_pm_lock);
650 tasklet_init(&priv->rx_tasklet, ath9k_rx_tasklet,
651 (unsigned long)priv);
652 tasklet_init(&priv->tx_failed_tasklet, ath9k_tx_failed_tasklet,
653 (unsigned long)priv);
654 INIT_DELAYED_WORK(&priv->ani_work, ath9k_htc_ani_work);
655 INIT_WORK(&priv->ps_work, ath9k_ps_work);
656 INIT_WORK(&priv->fatal_work, ath9k_fatal_work);
657 setup_timer(&priv->tx.cleanup_timer, ath9k_htc_tx_cleanup_timer,
658 (unsigned long)priv);
661 * Cache line size is used to size and align various
662 * structures used to communicate with the hardware.
664 ath_read_cachesize(common, &csz);
665 common->cachelsz = csz << 2; /* convert to bytes */
667 ret = ath9k_hw_init(ah);
670 "Unable to initialize hardware; initialization status: %d\n",
675 ret = ath9k_init_queues(priv);
679 for (i = 0; i < ATH9K_HTC_MAX_BCN_VIF; i++)
680 priv->beacon.bslot[i] = NULL;
681 priv->beacon.slottime = 9;
683 ath9k_cmn_init_channels_rates(common);
684 ath9k_cmn_init_crypto(ah);
685 ath9k_init_misc(priv);
686 ath9k_htc_init_btcoex(priv, product);
700 static const struct ieee80211_iface_limit if_limits[] = {
701 { .max = 2, .types = BIT(NL80211_IFTYPE_STATION) |
702 BIT(NL80211_IFTYPE_P2P_CLIENT) },
703 { .max = 2, .types = BIT(NL80211_IFTYPE_AP) |
704 #ifdef CONFIG_MAC80211_MESH
705 BIT(NL80211_IFTYPE_MESH_POINT) |
707 BIT(NL80211_IFTYPE_P2P_GO) },
710 static const struct ieee80211_iface_combination if_comb = {
712 .n_limits = ARRAY_SIZE(if_limits),
714 .num_different_channels = 1,
717 static void ath9k_set_hw_capab(struct ath9k_htc_priv *priv,
718 struct ieee80211_hw *hw)
720 struct ath_hw *ah = priv->ah;
721 struct ath_common *common = ath9k_hw_common(priv->ah);
722 struct base_eep_header *pBase;
724 ieee80211_hw_set(hw, HOST_BROADCAST_PS_BUFFERING);
725 ieee80211_hw_set(hw, MFP_CAPABLE);
726 ieee80211_hw_set(hw, REPORTS_TX_ACK_STATUS);
727 ieee80211_hw_set(hw, PS_NULLFUNC_STACK);
728 ieee80211_hw_set(hw, RX_INCLUDES_FCS);
729 ieee80211_hw_set(hw, HAS_RATE_CONTROL);
730 ieee80211_hw_set(hw, SPECTRUM_MGMT);
731 ieee80211_hw_set(hw, SIGNAL_DBM);
732 ieee80211_hw_set(hw, AMPDU_AGGREGATION);
735 ieee80211_hw_set(hw, SUPPORTS_PS);
737 hw->wiphy->interface_modes =
738 BIT(NL80211_IFTYPE_STATION) |
739 BIT(NL80211_IFTYPE_ADHOC) |
740 BIT(NL80211_IFTYPE_AP) |
741 BIT(NL80211_IFTYPE_P2P_GO) |
742 BIT(NL80211_IFTYPE_P2P_CLIENT) |
743 BIT(NL80211_IFTYPE_MESH_POINT) |
744 BIT(NL80211_IFTYPE_OCB);
746 hw->wiphy->iface_combinations = &if_comb;
747 hw->wiphy->n_iface_combinations = 1;
749 hw->wiphy->flags &= ~WIPHY_FLAG_PS_ON_BY_DEFAULT;
751 hw->wiphy->flags |= WIPHY_FLAG_IBSS_RSN |
752 WIPHY_FLAG_HAS_REMAIN_ON_CHANNEL |
753 WIPHY_FLAG_HAS_CHANNEL_SWITCH;
755 hw->wiphy->flags |= WIPHY_FLAG_SUPPORTS_TDLS;
758 hw->max_listen_interval = 1;
760 hw->vif_data_size = sizeof(struct ath9k_htc_vif);
761 hw->sta_data_size = sizeof(struct ath9k_htc_sta);
763 /* tx_frame_hdr is larger than tx_mgmt_hdr anyway */
764 hw->extra_tx_headroom = sizeof(struct tx_frame_hdr) +
765 sizeof(struct htc_frame_hdr) + 4;
767 if (priv->ah->caps.hw_caps & ATH9K_HW_CAP_2GHZ)
768 hw->wiphy->bands[NL80211_BAND_2GHZ] =
769 &common->sbands[NL80211_BAND_2GHZ];
770 if (priv->ah->caps.hw_caps & ATH9K_HW_CAP_5GHZ)
771 hw->wiphy->bands[NL80211_BAND_5GHZ] =
772 &common->sbands[NL80211_BAND_5GHZ];
774 ath9k_cmn_reload_chainmask(ah);
776 pBase = ath9k_htc_get_eeprom_base(priv);
778 hw->wiphy->available_antennas_rx = pBase->rxMask;
779 hw->wiphy->available_antennas_tx = pBase->txMask;
782 SET_IEEE80211_PERM_ADDR(hw, common->macaddr);
785 static int ath9k_init_firmware_version(struct ath9k_htc_priv *priv)
787 struct ieee80211_hw *hw = priv->hw;
788 struct wmi_fw_version cmd_rsp;
791 memset(&cmd_rsp, 0, sizeof(cmd_rsp));
793 WMI_CMD(WMI_GET_FW_VERSION);
797 priv->fw_version_major = be16_to_cpu(cmd_rsp.major);
798 priv->fw_version_minor = be16_to_cpu(cmd_rsp.minor);
800 snprintf(hw->wiphy->fw_version, sizeof(hw->wiphy->fw_version), "%d.%d",
801 priv->fw_version_major,
802 priv->fw_version_minor);
804 dev_info(priv->dev, "ath9k_htc: FW Version: %d.%d\n",
805 priv->fw_version_major,
806 priv->fw_version_minor);
809 * Check if the available FW matches the driver's
812 if (priv->fw_version_major != MAJOR_VERSION_REQ ||
813 priv->fw_version_minor < MINOR_VERSION_REQ) {
814 dev_err(priv->dev, "ath9k_htc: Please upgrade to FW version %d.%d\n",
815 MAJOR_VERSION_REQ, MINOR_VERSION_REQ);
819 if (priv->fw_version_major == 1 && priv->fw_version_minor < 4)
820 set_bit(HTC_FWFLAG_NO_RMW, &priv->fw_flags);
822 dev_info(priv->dev, "FW RMW support: %s\n",
823 test_bit(HTC_FWFLAG_NO_RMW, &priv->fw_flags) ? "Off" : "On");
828 static int ath9k_init_device(struct ath9k_htc_priv *priv,
829 u16 devid, char *product, u32 drv_info)
831 struct ieee80211_hw *hw = priv->hw;
832 struct ath_common *common;
835 struct ath_regulatory *reg;
838 /* Bring up device */
839 error = ath9k_init_priv(priv, devid, product, drv_info);
844 common = ath9k_hw_common(ah);
845 ath9k_set_hw_capab(priv, hw);
847 error = ath9k_init_firmware_version(priv);
851 /* Initialize regulatory */
852 error = ath_regd_init(&common->regulatory, priv->hw->wiphy,
857 reg = &common->regulatory;
860 error = ath9k_tx_init(priv);
865 error = ath9k_rx_init(priv);
869 ath9k_hw_disable(priv->ah);
870 #ifdef CONFIG_MAC80211_LEDS
871 /* must be initialized before ieee80211_register_hw */
872 priv->led_cdev.default_trigger = ieee80211_create_tpt_led_trigger(priv->hw,
873 IEEE80211_TPT_LEDTRIG_FL_RADIO, ath9k_htc_tpt_blink,
874 ARRAY_SIZE(ath9k_htc_tpt_blink));
877 /* Register with mac80211 */
878 error = ieee80211_register_hw(hw);
882 /* Handle world regulatory */
883 if (!ath_is_world_regd(reg)) {
884 error = regulatory_hint(hw->wiphy, reg->alpha2);
889 error = ath9k_htc_init_debug(priv->ah);
891 ath_err(common, "Unable to create debugfs files\n");
895 ath_dbg(common, CONFIG,
896 "WMI:%d, BCN:%d, CAB:%d, UAPSD:%d, MGMT:%d, BE:%d, BK:%d, VI:%d, VO:%d\n",
907 ath9k_hw_name(priv->ah, hw_name, sizeof(hw_name));
908 wiphy_info(hw->wiphy, "%s\n", hw_name);
910 ath9k_init_leds(priv);
911 ath9k_start_rfkill_poll(priv);
916 ieee80211_unregister_hw(hw);
918 ath9k_rx_cleanup(priv);
920 ath9k_tx_cleanup(priv);
926 ath9k_deinit_priv(priv);
931 int ath9k_htc_probe_device(struct htc_target *htc_handle, struct device *dev,
932 u16 devid, char *product, u32 drv_info)
934 struct hif_device_usb *hif_dev;
935 struct ath9k_htc_priv *priv;
936 struct ieee80211_hw *hw;
939 hw = ieee80211_alloc_hw(sizeof(struct ath9k_htc_priv), &ath9k_htc_ops);
945 priv->htc = htc_handle;
947 htc_handle->drv_priv = priv;
948 SET_IEEE80211_DEV(hw, priv->dev);
950 ret = ath9k_htc_wait_for_target(priv);
954 priv->wmi = ath9k_init_wmi(priv);
960 ret = ath9k_init_htc_services(priv, devid, drv_info);
964 ret = ath9k_init_device(priv, devid, product, drv_info);
971 ath9k_stop_wmi(priv);
972 hif_dev = (struct hif_device_usb *)htc_handle->hif_dev;
973 ath9k_hif_usb_dealloc_urbs(hif_dev);
974 ath9k_destoy_wmi(priv);
976 ieee80211_free_hw(hw);
980 void ath9k_htc_disconnect_device(struct htc_target *htc_handle, bool hotunplug)
982 if (htc_handle->drv_priv) {
984 /* Check if the device has been yanked out. */
986 htc_handle->drv_priv->ah->ah_flags |= AH_UNPLUGGED;
988 ath9k_deinit_device(htc_handle->drv_priv);
989 ath9k_stop_wmi(htc_handle->drv_priv);
990 ieee80211_free_hw(htc_handle->drv_priv->hw);
996 void ath9k_htc_suspend(struct htc_target *htc_handle)
998 ath9k_htc_setpower(htc_handle->drv_priv, ATH9K_PM_FULL_SLEEP);
1001 int ath9k_htc_resume(struct htc_target *htc_handle)
1003 struct ath9k_htc_priv *priv = htc_handle->drv_priv;
1006 ret = ath9k_htc_wait_for_target(priv);
1010 ret = ath9k_init_htc_services(priv, priv->ah->hw_version.devid,
1011 priv->ah->hw_version.usbdev);
1012 ath9k_configure_leds(priv);
1018 static int __init ath9k_htc_init(void)
1020 if (ath9k_hif_usb_init() < 0) {
1021 pr_err("No USB devices found, driver not installed\n");
1027 module_init(ath9k_htc_init);
1029 static void __exit ath9k_htc_exit(void)
1031 ath9k_hif_usb_exit();
1032 pr_info("Driver unloaded\n");
1034 module_exit(ath9k_htc_exit);