3 * Copyright (c) 2011 Atheros Communications Inc.
4 * Copyright (c) 2011-2012 Qualcomm Atheros, Inc.
6 * Permission to use, copy, modify, and/or distribute this software for any
7 * purpose with or without fee is hereby granted, provided that the above
8 * copyright notice and this permission notice appear in all copies.
10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
11 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
12 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
13 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
14 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
15 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
16 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
19 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
21 #include <linux/moduleparam.h>
22 #include <linux/errno.h>
23 #include <linux/export.h>
25 #include <linux/mmc/sdio_func.h>
26 #include <linux/vmalloc.h>
35 static const struct ath6kl_hw hw_list[] = {
37 .id = AR6003_HW_2_0_VERSION,
38 .name = "ar6003 hw 2.0",
39 .dataset_patch_addr = 0x57e884,
40 .app_load_addr = 0x543180,
41 .board_ext_data_addr = 0x57e500,
42 .reserved_ram_size = 6912,
43 .refclk_hz = 26000000,
45 .flags = ATH6KL_HW_SDIO_CRC_ERROR_WAR,
47 /* hw2.0 needs override address hardcoded */
48 .app_start_override_addr = 0x944C00,
51 .dir = AR6003_HW_2_0_FW_DIR,
52 .otp = AR6003_HW_2_0_OTP_FILE,
53 .fw = AR6003_HW_2_0_FIRMWARE_FILE,
54 .tcmd = AR6003_HW_2_0_TCMD_FIRMWARE_FILE,
55 .patch = AR6003_HW_2_0_PATCH_FILE,
58 .fw_board = AR6003_HW_2_0_BOARD_DATA_FILE,
59 .fw_default_board = AR6003_HW_2_0_DEFAULT_BOARD_DATA_FILE,
62 .id = AR6003_HW_2_1_1_VERSION,
63 .name = "ar6003 hw 2.1.1",
64 .dataset_patch_addr = 0x57ff74,
65 .app_load_addr = 0x1234,
66 .board_ext_data_addr = 0x542330,
67 .reserved_ram_size = 512,
68 .refclk_hz = 26000000,
70 .testscript_addr = 0x57ef74,
71 .flags = ATH6KL_HW_SDIO_CRC_ERROR_WAR,
74 .dir = AR6003_HW_2_1_1_FW_DIR,
75 .otp = AR6003_HW_2_1_1_OTP_FILE,
76 .fw = AR6003_HW_2_1_1_FIRMWARE_FILE,
77 .tcmd = AR6003_HW_2_1_1_TCMD_FIRMWARE_FILE,
78 .patch = AR6003_HW_2_1_1_PATCH_FILE,
79 .utf = AR6003_HW_2_1_1_UTF_FIRMWARE_FILE,
80 .testscript = AR6003_HW_2_1_1_TESTSCRIPT_FILE,
83 .fw_board = AR6003_HW_2_1_1_BOARD_DATA_FILE,
84 .fw_default_board = AR6003_HW_2_1_1_DEFAULT_BOARD_DATA_FILE,
87 .id = AR6004_HW_1_0_VERSION,
88 .name = "ar6004 hw 1.0",
89 .dataset_patch_addr = 0x57e884,
90 .app_load_addr = 0x1234,
91 .board_ext_data_addr = 0x437000,
92 .reserved_ram_size = 19456,
93 .board_addr = 0x433900,
94 .refclk_hz = 26000000,
99 .dir = AR6004_HW_1_0_FW_DIR,
100 .fw = AR6004_HW_1_0_FIRMWARE_FILE,
103 .fw_board = AR6004_HW_1_0_BOARD_DATA_FILE,
104 .fw_default_board = AR6004_HW_1_0_DEFAULT_BOARD_DATA_FILE,
107 .id = AR6004_HW_1_1_VERSION,
108 .name = "ar6004 hw 1.1",
109 .dataset_patch_addr = 0x57e884,
110 .app_load_addr = 0x1234,
111 .board_ext_data_addr = 0x437000,
112 .reserved_ram_size = 11264,
113 .board_addr = 0x43d400,
114 .refclk_hz = 40000000,
118 .dir = AR6004_HW_1_1_FW_DIR,
119 .fw = AR6004_HW_1_1_FIRMWARE_FILE,
122 .fw_board = AR6004_HW_1_1_BOARD_DATA_FILE,
123 .fw_default_board = AR6004_HW_1_1_DEFAULT_BOARD_DATA_FILE,
126 .id = AR6004_HW_1_2_VERSION,
127 .name = "ar6004 hw 1.2",
128 .dataset_patch_addr = 0x436ecc,
129 .app_load_addr = 0x1234,
130 .board_ext_data_addr = 0x437000,
131 .reserved_ram_size = 9216,
132 .board_addr = 0x435c00,
133 .refclk_hz = 40000000,
138 .dir = AR6004_HW_1_2_FW_DIR,
139 .fw = AR6004_HW_1_2_FIRMWARE_FILE,
141 .fw_board = AR6004_HW_1_2_BOARD_DATA_FILE,
142 .fw_default_board = AR6004_HW_1_2_DEFAULT_BOARD_DATA_FILE,
145 .id = AR6004_HW_1_3_VERSION,
146 .name = "ar6004 hw 1.3",
147 .dataset_patch_addr = 0x437860,
148 .app_load_addr = 0x1234,
149 .board_ext_data_addr = 0x437000,
150 .reserved_ram_size = 7168,
151 .board_addr = 0x436400,
157 .dir = AR6004_HW_1_3_FW_DIR,
158 .fw = AR6004_HW_1_3_FIRMWARE_FILE,
159 .tcmd = AR6004_HW_1_3_TCMD_FIRMWARE_FILE,
160 .utf = AR6004_HW_1_3_UTF_FIRMWARE_FILE,
161 .testscript = AR6004_HW_1_3_TESTSCRIPT_FILE,
164 .fw_board = AR6004_HW_1_3_BOARD_DATA_FILE,
165 .fw_default_board = AR6004_HW_1_3_DEFAULT_BOARD_DATA_FILE,
168 .id = AR6004_HW_3_0_VERSION,
169 .name = "ar6004 hw 3.0",
170 .dataset_patch_addr = 0,
171 .app_load_addr = 0x1234,
172 .board_ext_data_addr = 0,
173 .reserved_ram_size = 7168,
174 .board_addr = 0x436400,
175 .testscript_addr = 0,
179 .dir = AR6004_HW_3_0_FW_DIR,
180 .fw = AR6004_HW_3_0_FIRMWARE_FILE,
181 .tcmd = AR6004_HW_3_0_TCMD_FIRMWARE_FILE,
182 .utf = AR6004_HW_3_0_UTF_FIRMWARE_FILE,
183 .testscript = AR6004_HW_3_0_TESTSCRIPT_FILE,
186 .fw_board = AR6004_HW_3_0_BOARD_DATA_FILE,
187 .fw_default_board = AR6004_HW_3_0_DEFAULT_BOARD_DATA_FILE,
192 * Include definitions here that can be used to tune the WLAN module
193 * behavior. Different customers can tune the behavior as per their needs,
198 * This configuration item enable/disable keepalive support.
199 * Keepalive support: In the absence of any data traffic to AP, null
200 * frames will be sent to the AP at periodic interval, to keep the association
201 * active. This configuration item defines the periodic interval.
202 * Use value of zero to disable keepalive support
203 * Default: 60 seconds
205 #define WLAN_CONFIG_KEEP_ALIVE_INTERVAL 60
208 * This configuration item sets the value of disconnect timeout
209 * Firmware delays sending the disconnec event to the host for this
210 * timeout after is gets disconnected from the current AP.
211 * If the firmware successly roams within the disconnect timeout
212 * it sends a new connect event
214 #define WLAN_CONFIG_DISCONNECT_TIMEOUT 10
217 #define ATH6KL_DATA_OFFSET 64
218 struct sk_buff *ath6kl_buf_alloc(int size)
223 /* Add chacheline space at front and back of buffer */
224 reserved = roundup((2 * L1_CACHE_BYTES) + ATH6KL_DATA_OFFSET +
225 sizeof(struct htc_packet) + ATH6KL_HTC_ALIGN_BYTES, 4);
226 skb = dev_alloc_skb(size + reserved);
229 skb_reserve(skb, reserved - L1_CACHE_BYTES);
233 void ath6kl_init_profile_info(struct ath6kl_vif *vif)
236 memset(vif->ssid, 0, sizeof(vif->ssid));
238 vif->dot11_auth_mode = OPEN_AUTH;
239 vif->auth_mode = NONE_AUTH;
240 vif->prwise_crypto = NONE_CRYPT;
241 vif->prwise_crypto_len = 0;
242 vif->grp_crypto = NONE_CRYPT;
243 vif->grp_crypto_len = 0;
244 memset(vif->wep_key_list, 0, sizeof(vif->wep_key_list));
245 memset(vif->req_bssid, 0, sizeof(vif->req_bssid));
246 memset(vif->bssid, 0, sizeof(vif->bssid));
250 static int ath6kl_set_host_app_area(struct ath6kl *ar)
253 struct host_app_area host_app_area;
255 /* Fetch the address of the host_app_area_s
256 * instance in the host interest area */
257 address = ath6kl_get_hi_item_addr(ar, HI_ITEM(hi_app_host_interest));
258 address = TARG_VTOP(ar->target_type, address);
260 if (ath6kl_diag_read32(ar, address, &data))
263 address = TARG_VTOP(ar->target_type, data);
264 host_app_area.wmi_protocol_ver = cpu_to_le32(WMI_PROTOCOL_VERSION);
265 if (ath6kl_diag_write(ar, address, (u8 *) &host_app_area,
266 sizeof(struct host_app_area)))
272 static inline void set_ac2_ep_map(struct ath6kl *ar,
274 enum htc_endpoint_id ep)
276 ar->ac2ep_map[ac] = ep;
277 ar->ep2ac_map[ep] = ac;
280 /* connect to a service */
281 static int ath6kl_connectservice(struct ath6kl *ar,
282 struct htc_service_connect_req *con_req,
286 struct htc_service_connect_resp response;
288 memset(&response, 0, sizeof(response));
290 status = ath6kl_htc_conn_service(ar->htc_target, con_req, &response);
292 ath6kl_err("failed to connect to %s service status:%d\n",
297 switch (con_req->svc_id) {
298 case WMI_CONTROL_SVC:
299 if (test_bit(WMI_ENABLED, &ar->flag))
300 ath6kl_wmi_set_control_ep(ar->wmi, response.endpoint);
301 ar->ctrl_ep = response.endpoint;
303 case WMI_DATA_BE_SVC:
304 set_ac2_ep_map(ar, WMM_AC_BE, response.endpoint);
306 case WMI_DATA_BK_SVC:
307 set_ac2_ep_map(ar, WMM_AC_BK, response.endpoint);
309 case WMI_DATA_VI_SVC:
310 set_ac2_ep_map(ar, WMM_AC_VI, response.endpoint);
312 case WMI_DATA_VO_SVC:
313 set_ac2_ep_map(ar, WMM_AC_VO, response.endpoint);
316 ath6kl_err("service id is not mapped %d\n", con_req->svc_id);
323 static int ath6kl_init_service_ep(struct ath6kl *ar)
325 struct htc_service_connect_req connect;
327 memset(&connect, 0, sizeof(connect));
329 /* these fields are the same for all service endpoints */
330 connect.ep_cb.tx_comp_multi = ath6kl_tx_complete;
331 connect.ep_cb.rx = ath6kl_rx;
332 connect.ep_cb.rx_refill = ath6kl_rx_refill;
333 connect.ep_cb.tx_full = ath6kl_tx_queue_full;
336 * Set the max queue depth so that our ath6kl_tx_queue_full handler
339 connect.max_txq_depth = MAX_DEFAULT_SEND_QUEUE_DEPTH;
340 connect.ep_cb.rx_refill_thresh = ATH6KL_MAX_RX_BUFFERS / 4;
341 if (!connect.ep_cb.rx_refill_thresh)
342 connect.ep_cb.rx_refill_thresh++;
344 /* connect to control service */
345 connect.svc_id = WMI_CONTROL_SVC;
346 if (ath6kl_connectservice(ar, &connect, "WMI CONTROL"))
349 connect.flags |= HTC_FLGS_TX_BNDL_PAD_EN;
352 * Limit the HTC message size on the send path, although e can
353 * receive A-MSDU frames of 4K, we will only send ethernet-sized
354 * (802.3) frames on the send path.
356 connect.max_rxmsg_sz = WMI_MAX_TX_DATA_FRAME_LENGTH;
359 * To reduce the amount of committed memory for larger A_MSDU
360 * frames, use the recv-alloc threshold mechanism for larger
363 connect.ep_cb.rx_alloc_thresh = ATH6KL_BUFFER_SIZE;
364 connect.ep_cb.rx_allocthresh = ath6kl_alloc_amsdu_rxbuf;
367 * For the remaining data services set the connection flag to
368 * reduce dribbling, if configured to do so.
370 connect.conn_flags |= HTC_CONN_FLGS_REDUCE_CRED_DRIB;
371 connect.conn_flags &= ~HTC_CONN_FLGS_THRESH_MASK;
372 connect.conn_flags |= HTC_CONN_FLGS_THRESH_LVL_HALF;
374 connect.svc_id = WMI_DATA_BE_SVC;
376 if (ath6kl_connectservice(ar, &connect, "WMI DATA BE"))
379 /* connect to back-ground map this to WMI LOW_PRI */
380 connect.svc_id = WMI_DATA_BK_SVC;
381 if (ath6kl_connectservice(ar, &connect, "WMI DATA BK"))
384 /* connect to Video service, map this to HI PRI */
385 connect.svc_id = WMI_DATA_VI_SVC;
386 if (ath6kl_connectservice(ar, &connect, "WMI DATA VI"))
390 * Connect to VO service, this is currently not mapped to a WMI
391 * priority stream due to historical reasons. WMI originally
392 * defined 3 priorities over 3 mailboxes We can change this when
393 * WMI is reworked so that priorities are not dependent on
396 connect.svc_id = WMI_DATA_VO_SVC;
397 if (ath6kl_connectservice(ar, &connect, "WMI DATA VO"))
403 void ath6kl_init_control_info(struct ath6kl_vif *vif)
405 ath6kl_init_profile_info(vif);
406 vif->def_txkey_index = 0;
407 memset(vif->wep_key_list, 0, sizeof(vif->wep_key_list));
412 * Set HTC/Mbox operational parameters, this can only be called when the
413 * target is in the BMI phase.
415 static int ath6kl_set_htc_params(struct ath6kl *ar, u32 mbox_isr_yield_val,
421 blk_size = ar->mbox_info.block_size;
424 blk_size |= ((u32)htc_ctrl_buf) << 16;
426 /* set the host interest area for the block size */
427 status = ath6kl_bmi_write_hi32(ar, hi_mbox_io_block_sz, blk_size);
429 ath6kl_err("bmi_write_memory for IO block size failed\n");
433 ath6kl_dbg(ATH6KL_DBG_TRC, "block size set: %d (target addr:0x%X)\n",
435 ath6kl_get_hi_item_addr(ar, HI_ITEM(hi_mbox_io_block_sz)));
437 if (mbox_isr_yield_val) {
438 /* set the host interest area for the mbox ISR yield limit */
439 status = ath6kl_bmi_write_hi32(ar, hi_mbox_isr_yield_limit,
442 ath6kl_err("bmi_write_memory for yield limit failed\n");
451 static int ath6kl_target_config_wlan_params(struct ath6kl *ar, int idx)
456 * Configure the device for rx dot11 header rules. "0,0" are the
457 * default values. Required if checksum offload is needed. Set
458 * RxMetaVersion to 2.
460 ret = ath6kl_wmi_set_rx_frame_format_cmd(ar->wmi, idx,
461 ar->rx_meta_ver, 0, 0);
463 ath6kl_err("unable to set the rx frame format: %d\n", ret);
467 if (ar->conf_flags & ATH6KL_CONF_IGNORE_PS_FAIL_EVT_IN_SCAN) {
468 ret = ath6kl_wmi_pmparams_cmd(ar->wmi, idx, 0, 1, 0, 0, 1,
469 IGNORE_PS_FAIL_DURING_SCAN);
471 ath6kl_err("unable to set power save fail event policy: %d\n",
477 if (!(ar->conf_flags & ATH6KL_CONF_IGNORE_ERP_BARKER)) {
478 ret = ath6kl_wmi_set_lpreamble_cmd(ar->wmi, idx, 0,
479 WMI_FOLLOW_BARKER_IN_ERP);
481 ath6kl_err("unable to set barker preamble policy: %d\n",
487 ret = ath6kl_wmi_set_keepalive_cmd(ar->wmi, idx,
488 WLAN_CONFIG_KEEP_ALIVE_INTERVAL);
490 ath6kl_err("unable to set keep alive interval: %d\n", ret);
494 ret = ath6kl_wmi_disctimeout_cmd(ar->wmi, idx,
495 WLAN_CONFIG_DISCONNECT_TIMEOUT);
497 ath6kl_err("unable to set disconnect timeout: %d\n", ret);
501 if (!(ar->conf_flags & ATH6KL_CONF_ENABLE_TX_BURST)) {
502 ret = ath6kl_wmi_set_wmm_txop(ar->wmi, idx, WMI_TXOP_DISABLED);
504 ath6kl_err("unable to set txop bursting: %d\n", ret);
509 if (ar->p2p && (ar->vif_max == 1 || idx)) {
510 ret = ath6kl_wmi_info_req_cmd(ar->wmi, idx,
511 P2P_FLAG_CAPABILITIES_REQ |
512 P2P_FLAG_MACADDR_REQ |
513 P2P_FLAG_HMODEL_REQ);
515 ath6kl_dbg(ATH6KL_DBG_TRC,
516 "failed to request P2P capabilities (%d) - assuming P2P not supported\n",
522 if (ar->p2p && (ar->vif_max == 1 || idx)) {
523 /* Enable Probe Request reporting for P2P */
524 ret = ath6kl_wmi_probe_report_req_cmd(ar->wmi, idx, true);
526 ath6kl_dbg(ATH6KL_DBG_TRC,
527 "failed to enable Probe Request reporting (%d)\n",
535 int ath6kl_configure_target(struct ath6kl *ar)
537 u32 param, ram_reserved_size;
538 u8 fw_iftype, fw_mode = 0, fw_submode = 0;
541 param = !!(ar->conf_flags & ATH6KL_CONF_UART_DEBUG);
542 if (ath6kl_bmi_write_hi32(ar, hi_serial_enable, param)) {
543 ath6kl_err("bmi_write_memory for uart debug failed\n");
548 * Note: Even though the firmware interface type is
549 * chosen as BSS_STA for all three interfaces, can
550 * be configured to IBSS/AP as long as the fw submode
551 * remains normal mode (0 - AP, STA and IBSS). But
552 * due to an target assert in firmware only one interface is
553 * configured for now.
555 fw_iftype = HI_OPTION_FW_MODE_BSS_STA;
557 for (i = 0; i < ar->vif_max; i++)
558 fw_mode |= fw_iftype << (i * HI_OPTION_FW_MODE_BITS);
561 * Submodes when fw does not support dynamic interface
563 * vif[0] - AP/STA/IBSS
564 * vif[1] - "P2P dev"/"P2P GO"/"P2P Client"
565 * vif[2] - "P2P dev"/"P2P GO"/"P2P Client"
566 * Otherwise, All the interface are initialized to p2p dev.
569 if (test_bit(ATH6KL_FW_CAPABILITY_STA_P2PDEV_DUPLEX,
570 ar->fw_capabilities)) {
571 for (i = 0; i < ar->vif_max; i++)
572 fw_submode |= HI_OPTION_FW_SUBMODE_P2PDEV <<
573 (i * HI_OPTION_FW_SUBMODE_BITS);
575 for (i = 0; i < ar->max_norm_iface; i++)
576 fw_submode |= HI_OPTION_FW_SUBMODE_NONE <<
577 (i * HI_OPTION_FW_SUBMODE_BITS);
579 for (i = ar->max_norm_iface; i < ar->vif_max; i++)
580 fw_submode |= HI_OPTION_FW_SUBMODE_P2PDEV <<
581 (i * HI_OPTION_FW_SUBMODE_BITS);
583 if (ar->p2p && ar->vif_max == 1)
584 fw_submode = HI_OPTION_FW_SUBMODE_P2PDEV;
587 if (ath6kl_bmi_write_hi32(ar, hi_app_host_interest,
588 HTC_PROTOCOL_VERSION) != 0) {
589 ath6kl_err("bmi_write_memory for htc version failed\n");
593 /* set the firmware mode to STA/IBSS/AP */
596 if (ath6kl_bmi_read_hi32(ar, hi_option_flag, ¶m) != 0) {
597 ath6kl_err("bmi_read_memory for setting fwmode failed\n");
601 param |= (ar->vif_max << HI_OPTION_NUM_DEV_SHIFT);
602 param |= fw_mode << HI_OPTION_FW_MODE_SHIFT;
603 param |= fw_submode << HI_OPTION_FW_SUBMODE_SHIFT;
605 param |= (0 << HI_OPTION_MAC_ADDR_METHOD_SHIFT);
606 param |= (0 << HI_OPTION_FW_BRIDGE_SHIFT);
608 if (ath6kl_bmi_write_hi32(ar, hi_option_flag, param) != 0) {
609 ath6kl_err("bmi_write_memory for setting fwmode failed\n");
613 ath6kl_dbg(ATH6KL_DBG_TRC, "firmware mode set\n");
616 * Hardcode the address use for the extended board data
617 * Ideally this should be pre-allocate by the OS at boot time
618 * But since it is a new feature and board data is loaded
619 * at init time, we have to workaround this from host.
620 * It is difficult to patch the firmware boot code,
621 * but possible in theory.
624 if ((ar->target_type == TARGET_TYPE_AR6003) ||
625 (ar->version.target_ver == AR6004_HW_1_3_VERSION) ||
626 (ar->version.target_ver == AR6004_HW_3_0_VERSION)) {
627 param = ar->hw.board_ext_data_addr;
628 ram_reserved_size = ar->hw.reserved_ram_size;
630 if (ath6kl_bmi_write_hi32(ar, hi_board_ext_data, param) != 0) {
631 ath6kl_err("bmi_write_memory for hi_board_ext_data failed\n");
635 if (ath6kl_bmi_write_hi32(ar, hi_end_ram_reserve_sz,
636 ram_reserved_size) != 0) {
637 ath6kl_err("bmi_write_memory for hi_end_ram_reserve_sz failed\n");
642 /* set the block size for the target */
643 if (ath6kl_set_htc_params(ar, MBOX_YIELD_LIMIT, 0))
644 /* use default number of control buffers */
647 /* Configure GPIO AR600x UART */
648 status = ath6kl_bmi_write_hi32(ar, hi_dbg_uart_txpin,
653 /* Configure target refclk_hz */
654 if (ar->hw.refclk_hz != 0) {
655 status = ath6kl_bmi_write_hi32(ar, hi_refclk_hz,
664 /* firmware upload */
665 static int ath6kl_get_fw(struct ath6kl *ar, const char *filename,
666 u8 **fw, size_t *fw_len)
668 const struct firmware *fw_entry;
671 ret = reject_firmware(&fw_entry, filename, ar->dev);
675 *fw_len = fw_entry->size;
676 *fw = kmemdup(fw_entry->data, fw_entry->size, GFP_KERNEL);
681 release_firmware(fw_entry);
688 * Check the device tree for a board-id and use it to construct
689 * the pathname to the firmware file. /*(DEBLOBBED)*/
690 static bool check_device_tree(struct ath6kl *ar)
692 static const char *board_id_prop = "atheros,board-id";
693 struct device_node *node;
694 char board_filename[64];
695 const char *board_id;
698 for_each_compatible_node(node, NULL, "atheros,ath6kl") {
699 board_id = of_get_property(node, board_id_prop, NULL);
700 if (board_id == NULL) {
701 ath6kl_warn("No \"%s\" property on %s node.\n",
702 board_id_prop, node->name);
705 snprintf(board_filename, sizeof(board_filename),
706 "/*(DEBLOBBED)*/", ar->hw.fw.dir, board_id);
708 ret = ath6kl_get_fw(ar, board_filename, &ar->fw_board,
711 ath6kl_err("Failed to get DT board file %s: %d\n",
712 board_filename, ret);
721 static bool check_device_tree(struct ath6kl *ar)
725 #endif /* CONFIG_OF */
727 static int ath6kl_fetch_board_file(struct ath6kl *ar)
729 const char *filename;
732 if (ar->fw_board != NULL)
735 if (WARN_ON(ar->hw.fw_board == NULL))
738 filename = ar->hw.fw_board;
740 ret = ath6kl_get_fw(ar, filename, &ar->fw_board,
743 /* managed to get proper board file */
747 if (check_device_tree(ar)) {
748 /* got board file from device tree */
752 /* there was no proper board file, try to use default instead */
753 ath6kl_warn("Failed to get board file %s (%d), trying to find default board file.\n",
756 filename = ar->hw.fw_default_board;
758 ret = ath6kl_get_fw(ar, filename, &ar->fw_board,
761 ath6kl_err("Failed to get default board file %s: %d\n",
766 ath6kl_warn("WARNING! No proper board file was not found, instead using a default board file.\n");
767 ath6kl_warn("Most likely your hardware won't work as specified. Install correct board file!\n");
772 static int ath6kl_fetch_otp_file(struct ath6kl *ar)
777 if (ar->fw_otp != NULL)
780 if (ar->hw.fw.otp == NULL) {
781 ath6kl_dbg(ATH6KL_DBG_BOOT,
782 "no OTP file configured for this hw\n");
786 snprintf(filename, sizeof(filename), "%s/%s",
787 ar->hw.fw.dir, ar->hw.fw.otp);
789 ret = ath6kl_get_fw(ar, filename, &ar->fw_otp,
792 ath6kl_err("Failed to get OTP file %s: %d\n",
800 static int ath6kl_fetch_testmode_file(struct ath6kl *ar)
805 if (ar->testmode == 0)
808 ath6kl_dbg(ATH6KL_DBG_BOOT, "testmode %d\n", ar->testmode);
810 if (ar->testmode == 2) {
811 if (ar->hw.fw.utf == NULL) {
812 ath6kl_warn("testmode 2 not supported\n");
816 snprintf(filename, sizeof(filename), "%s/%s",
817 ar->hw.fw.dir, ar->hw.fw.utf);
819 if (ar->hw.fw.tcmd == NULL) {
820 ath6kl_warn("testmode 1 not supported\n");
824 snprintf(filename, sizeof(filename), "%s/%s",
825 ar->hw.fw.dir, ar->hw.fw.tcmd);
828 set_bit(TESTMODE, &ar->flag);
830 ret = ath6kl_get_fw(ar, filename, &ar->fw, &ar->fw_len);
832 ath6kl_err("Failed to get testmode %d firmware file %s: %d\n",
833 ar->testmode, filename, ret);
840 static int ath6kl_fetch_fw_file(struct ath6kl *ar)
848 /* FIXME: remove WARN_ON() as we won't support FW API 1 for long */
849 if (WARN_ON(ar->hw.fw.fw == NULL))
852 snprintf(filename, sizeof(filename), "%s/%s",
853 ar->hw.fw.dir, ar->hw.fw.fw);
855 ret = ath6kl_get_fw(ar, filename, &ar->fw, &ar->fw_len);
857 ath6kl_err("Failed to get firmware file %s: %d\n",
865 static int ath6kl_fetch_patch_file(struct ath6kl *ar)
870 if (ar->fw_patch != NULL)
873 if (ar->hw.fw.patch == NULL)
876 snprintf(filename, sizeof(filename), "%s/%s",
877 ar->hw.fw.dir, ar->hw.fw.patch);
879 ret = ath6kl_get_fw(ar, filename, &ar->fw_patch,
882 ath6kl_err("Failed to get patch file %s: %d\n",
890 static int ath6kl_fetch_testscript_file(struct ath6kl *ar)
895 if (ar->testmode != 2)
898 if (ar->fw_testscript != NULL)
901 if (ar->hw.fw.testscript == NULL)
904 snprintf(filename, sizeof(filename), "%s/%s",
905 ar->hw.fw.dir, ar->hw.fw.testscript);
907 ret = ath6kl_get_fw(ar, filename, &ar->fw_testscript,
908 &ar->fw_testscript_len);
910 ath6kl_err("Failed to get testscript file %s: %d\n",
918 static int ath6kl_fetch_fw_api1(struct ath6kl *ar)
922 ret = ath6kl_fetch_otp_file(ar);
926 ret = ath6kl_fetch_fw_file(ar);
930 ret = ath6kl_fetch_patch_file(ar);
934 ret = ath6kl_fetch_testscript_file(ar);
941 static int ath6kl_fetch_fw_apin(struct ath6kl *ar, const char *name)
943 size_t magic_len, len, ie_len;
944 const struct firmware *fw;
945 struct ath6kl_fw_ie *hdr;
948 int ret, ie_id, i, index, bit;
951 snprintf(filename, sizeof(filename), "%s/%s", ar->hw.fw.dir, name);
953 ret = reject_firmware(&fw, filename, ar->dev);
960 /* magic also includes the null byte, check that as well */
961 magic_len = strlen(ATH6KL_FIRMWARE_MAGIC) + 1;
963 if (len < magic_len) {
968 if (memcmp(data, ATH6KL_FIRMWARE_MAGIC, magic_len) != 0) {
977 while (len > sizeof(struct ath6kl_fw_ie)) {
978 /* hdr is unaligned! */
979 hdr = (struct ath6kl_fw_ie *) data;
981 ie_id = le32_to_cpup(&hdr->id);
982 ie_len = le32_to_cpup(&hdr->len);
985 data += sizeof(*hdr);
993 case ATH6KL_FW_IE_FW_VERSION:
994 strlcpy(ar->wiphy->fw_version, data,
995 min(sizeof(ar->wiphy->fw_version), ie_len+1));
997 ath6kl_dbg(ATH6KL_DBG_BOOT,
998 "found fw version %s\n",
999 ar->wiphy->fw_version);
1001 case ATH6KL_FW_IE_OTP_IMAGE:
1002 ath6kl_dbg(ATH6KL_DBG_BOOT, "found otp image ie (%zd B)\n",
1005 ar->fw_otp = kmemdup(data, ie_len, GFP_KERNEL);
1007 if (ar->fw_otp == NULL) {
1012 ar->fw_otp_len = ie_len;
1014 case ATH6KL_FW_IE_FW_IMAGE:
1015 ath6kl_dbg(ATH6KL_DBG_BOOT, "found fw image ie (%zd B)\n",
1018 /* in testmode we already might have a fw file */
1022 ar->fw = vmalloc(ie_len);
1024 if (ar->fw == NULL) {
1029 memcpy(ar->fw, data, ie_len);
1030 ar->fw_len = ie_len;
1032 case ATH6KL_FW_IE_PATCH_IMAGE:
1033 ath6kl_dbg(ATH6KL_DBG_BOOT, "found patch image ie (%zd B)\n",
1036 ar->fw_patch = kmemdup(data, ie_len, GFP_KERNEL);
1038 if (ar->fw_patch == NULL) {
1043 ar->fw_patch_len = ie_len;
1045 case ATH6KL_FW_IE_RESERVED_RAM_SIZE:
1046 val = (__le32 *) data;
1047 ar->hw.reserved_ram_size = le32_to_cpup(val);
1049 ath6kl_dbg(ATH6KL_DBG_BOOT,
1050 "found reserved ram size ie %d\n",
1051 ar->hw.reserved_ram_size);
1053 case ATH6KL_FW_IE_CAPABILITIES:
1054 ath6kl_dbg(ATH6KL_DBG_BOOT,
1055 "found firmware capabilities ie (%zd B)\n",
1058 for (i = 0; i < ATH6KL_FW_CAPABILITY_MAX; i++) {
1062 if (index == ie_len)
1065 if (data[index] & (1 << bit))
1066 __set_bit(i, ar->fw_capabilities);
1069 ath6kl_dbg_dump(ATH6KL_DBG_BOOT, "capabilities", "",
1070 ar->fw_capabilities,
1071 sizeof(ar->fw_capabilities));
1073 case ATH6KL_FW_IE_PATCH_ADDR:
1074 if (ie_len != sizeof(*val))
1077 val = (__le32 *) data;
1078 ar->hw.dataset_patch_addr = le32_to_cpup(val);
1080 ath6kl_dbg(ATH6KL_DBG_BOOT,
1081 "found patch address ie 0x%x\n",
1082 ar->hw.dataset_patch_addr);
1084 case ATH6KL_FW_IE_BOARD_ADDR:
1085 if (ie_len != sizeof(*val))
1088 val = (__le32 *) data;
1089 ar->hw.board_addr = le32_to_cpup(val);
1091 ath6kl_dbg(ATH6KL_DBG_BOOT,
1092 "found board address ie 0x%x\n",
1095 case ATH6KL_FW_IE_VIF_MAX:
1096 if (ie_len != sizeof(*val))
1099 val = (__le32 *) data;
1100 ar->vif_max = min_t(unsigned int, le32_to_cpup(val),
1103 if (ar->vif_max > 1 && !ar->p2p)
1104 ar->max_norm_iface = 2;
1106 ath6kl_dbg(ATH6KL_DBG_BOOT,
1107 "found vif max ie %d\n", ar->vif_max);
1110 ath6kl_dbg(ATH6KL_DBG_BOOT, "Unknown fw ie: %u\n",
1111 le32_to_cpup(&hdr->id));
1121 release_firmware(fw);
1126 int ath6kl_init_fetch_firmwares(struct ath6kl *ar)
1130 ret = ath6kl_fetch_board_file(ar);
1134 ret = ath6kl_fetch_testmode_file(ar);
1138 ret = ath6kl_fetch_fw_apin(ar, ATH6KL_FW_API5_FILE);
1144 ret = ath6kl_fetch_fw_apin(ar, ATH6KL_FW_API4_FILE);
1150 ret = ath6kl_fetch_fw_apin(ar, ATH6KL_FW_API3_FILE);
1156 ret = ath6kl_fetch_fw_apin(ar, ATH6KL_FW_API2_FILE);
1162 ret = ath6kl_fetch_fw_api1(ar);
1169 ath6kl_dbg(ATH6KL_DBG_BOOT, "using fw api %d\n", ar->fw_api);
1174 static int ath6kl_upload_board_file(struct ath6kl *ar)
1176 u32 board_address, board_ext_address, param;
1177 u32 board_data_size, board_ext_data_size;
1180 if (WARN_ON(ar->fw_board == NULL))
1184 * Determine where in Target RAM to write Board Data.
1185 * For AR6004, host determine Target RAM address for
1186 * writing board data.
1188 if (ar->hw.board_addr != 0) {
1189 board_address = ar->hw.board_addr;
1190 ath6kl_bmi_write_hi32(ar, hi_board_data,
1193 ret = ath6kl_bmi_read_hi32(ar, hi_board_data, &board_address);
1195 ath6kl_err("Failed to get board file target address.\n");
1200 /* determine where in target ram to write extended board data */
1201 ret = ath6kl_bmi_read_hi32(ar, hi_board_ext_data, &board_ext_address);
1203 ath6kl_err("Failed to get extended board file target address.\n");
1207 if (ar->target_type == TARGET_TYPE_AR6003 &&
1208 board_ext_address == 0) {
1209 ath6kl_err("Failed to get board file target address.\n");
1213 switch (ar->target_type) {
1214 case TARGET_TYPE_AR6003:
1215 board_data_size = AR6003_BOARD_DATA_SZ;
1216 board_ext_data_size = AR6003_BOARD_EXT_DATA_SZ;
1217 if (ar->fw_board_len > (board_data_size + board_ext_data_size))
1218 board_ext_data_size = AR6003_BOARD_EXT_DATA_SZ_V2;
1220 case TARGET_TYPE_AR6004:
1221 board_data_size = AR6004_BOARD_DATA_SZ;
1222 board_ext_data_size = AR6004_BOARD_EXT_DATA_SZ;
1229 if (board_ext_address &&
1230 ar->fw_board_len == (board_data_size + board_ext_data_size)) {
1231 /* write extended board data */
1232 ath6kl_dbg(ATH6KL_DBG_BOOT,
1233 "writing extended board data to 0x%x (%d B)\n",
1234 board_ext_address, board_ext_data_size);
1236 ret = ath6kl_bmi_write(ar, board_ext_address,
1237 ar->fw_board + board_data_size,
1238 board_ext_data_size);
1240 ath6kl_err("Failed to write extended board data: %d\n",
1245 /* record that extended board data is initialized */
1246 param = (board_ext_data_size << 16) | 1;
1248 ath6kl_bmi_write_hi32(ar, hi_board_ext_data_config, param);
1251 if (ar->fw_board_len < board_data_size) {
1252 ath6kl_err("Too small board file: %zu\n", ar->fw_board_len);
1257 ath6kl_dbg(ATH6KL_DBG_BOOT, "writing board file to 0x%x (%d B)\n",
1258 board_address, board_data_size);
1260 ret = ath6kl_bmi_write(ar, board_address, ar->fw_board,
1264 ath6kl_err("Board file bmi write failed: %d\n", ret);
1268 /* record the fact that Board Data IS initialized */
1269 if ((ar->version.target_ver == AR6004_HW_1_3_VERSION) ||
1270 (ar->version.target_ver == AR6004_HW_3_0_VERSION))
1271 param = board_data_size;
1275 ath6kl_bmi_write_hi32(ar, hi_board_data_initialized, param);
1280 static int ath6kl_upload_otp(struct ath6kl *ar)
1283 bool from_hw = false;
1286 if (ar->fw_otp == NULL)
1289 address = ar->hw.app_load_addr;
1291 ath6kl_dbg(ATH6KL_DBG_BOOT, "writing otp to 0x%x (%zd B)\n", address,
1294 ret = ath6kl_bmi_fast_download(ar, address, ar->fw_otp,
1297 ath6kl_err("Failed to upload OTP file: %d\n", ret);
1301 /* read firmware start address */
1302 ret = ath6kl_bmi_read_hi32(ar, hi_app_start, &address);
1305 ath6kl_err("Failed to read hi_app_start: %d\n", ret);
1309 if (ar->hw.app_start_override_addr == 0) {
1310 ar->hw.app_start_override_addr = address;
1314 ath6kl_dbg(ATH6KL_DBG_BOOT, "app_start_override_addr%s 0x%x\n",
1315 from_hw ? " (from hw)" : "",
1316 ar->hw.app_start_override_addr);
1318 /* execute the OTP code */
1319 ath6kl_dbg(ATH6KL_DBG_BOOT, "executing OTP at 0x%x\n",
1320 ar->hw.app_start_override_addr);
1322 ath6kl_bmi_execute(ar, ar->hw.app_start_override_addr, ¶m);
1327 static int ath6kl_upload_firmware(struct ath6kl *ar)
1332 if (WARN_ON(ar->fw == NULL))
1335 address = ar->hw.app_load_addr;
1337 ath6kl_dbg(ATH6KL_DBG_BOOT, "writing firmware to 0x%x (%zd B)\n",
1338 address, ar->fw_len);
1340 ret = ath6kl_bmi_fast_download(ar, address, ar->fw, ar->fw_len);
1343 ath6kl_err("Failed to write firmware: %d\n", ret);
1348 * Set starting address for firmware
1349 * Don't need to setup app_start override addr on AR6004
1351 if (ar->target_type != TARGET_TYPE_AR6004) {
1352 address = ar->hw.app_start_override_addr;
1353 ath6kl_bmi_set_app_start(ar, address);
1358 static int ath6kl_upload_patch(struct ath6kl *ar)
1363 if (ar->fw_patch == NULL)
1366 address = ar->hw.dataset_patch_addr;
1368 ath6kl_dbg(ATH6KL_DBG_BOOT, "writing patch to 0x%x (%zd B)\n",
1369 address, ar->fw_patch_len);
1371 ret = ath6kl_bmi_write(ar, address, ar->fw_patch, ar->fw_patch_len);
1373 ath6kl_err("Failed to write patch file: %d\n", ret);
1377 ath6kl_bmi_write_hi32(ar, hi_dset_list_head, address);
1382 static int ath6kl_upload_testscript(struct ath6kl *ar)
1387 if (ar->testmode != 2)
1390 if (ar->fw_testscript == NULL)
1393 address = ar->hw.testscript_addr;
1395 ath6kl_dbg(ATH6KL_DBG_BOOT, "writing testscript to 0x%x (%zd B)\n",
1396 address, ar->fw_testscript_len);
1398 ret = ath6kl_bmi_write(ar, address, ar->fw_testscript,
1399 ar->fw_testscript_len);
1401 ath6kl_err("Failed to write testscript file: %d\n", ret);
1405 ath6kl_bmi_write_hi32(ar, hi_ota_testscript, address);
1407 if ((ar->version.target_ver != AR6004_HW_1_3_VERSION) &&
1408 (ar->version.target_ver != AR6004_HW_3_0_VERSION))
1409 ath6kl_bmi_write_hi32(ar, hi_end_ram_reserve_sz, 4096);
1411 ath6kl_bmi_write_hi32(ar, hi_test_apps_related, 1);
1416 static int ath6kl_init_upload(struct ath6kl *ar)
1418 u32 param, options, sleep, address;
1421 if (ar->target_type != TARGET_TYPE_AR6003 &&
1422 ar->target_type != TARGET_TYPE_AR6004)
1425 /* temporarily disable system sleep */
1426 address = MBOX_BASE_ADDRESS + LOCAL_SCRATCH_ADDRESS;
1427 status = ath6kl_bmi_reg_read(ar, address, ¶m);
1433 param |= ATH6KL_OPTION_SLEEP_DISABLE;
1434 status = ath6kl_bmi_reg_write(ar, address, param);
1438 address = RTC_BASE_ADDRESS + SYSTEM_SLEEP_ADDRESS;
1439 status = ath6kl_bmi_reg_read(ar, address, ¶m);
1445 param |= SM(SYSTEM_SLEEP_DISABLE, 1);
1446 status = ath6kl_bmi_reg_write(ar, address, param);
1450 ath6kl_dbg(ATH6KL_DBG_TRC, "old options: %d, old sleep: %d\n",
1453 /* program analog PLL register */
1454 /* no need to control 40/44MHz clock on AR6004 */
1455 if (ar->target_type != TARGET_TYPE_AR6004) {
1456 status = ath6kl_bmi_reg_write(ar, ATH6KL_ANALOG_PLL_REGISTER,
1462 /* Run at 80/88MHz by default */
1463 param = SM(CPU_CLOCK_STANDARD, 1);
1465 address = RTC_BASE_ADDRESS + CPU_CLOCK_ADDRESS;
1466 status = ath6kl_bmi_reg_write(ar, address, param);
1472 address = RTC_BASE_ADDRESS + LPO_CAL_ADDRESS;
1473 param = SM(LPO_CAL_ENABLE, 1);
1474 status = ath6kl_bmi_reg_write(ar, address, param);
1478 /* WAR to avoid SDIO CRC err */
1479 if (ar->hw.flags & ATH6KL_HW_SDIO_CRC_ERROR_WAR) {
1480 ath6kl_err("temporary war to avoid sdio crc error\n");
1483 address = GPIO_BASE_ADDRESS + GPIO_PIN9_ADDRESS;
1484 status = ath6kl_bmi_reg_write(ar, address, param);
1490 address = GPIO_BASE_ADDRESS + GPIO_PIN10_ADDRESS;
1491 status = ath6kl_bmi_reg_write(ar, address, param);
1495 address = GPIO_BASE_ADDRESS + GPIO_PIN11_ADDRESS;
1496 status = ath6kl_bmi_reg_write(ar, address, param);
1500 address = GPIO_BASE_ADDRESS + GPIO_PIN12_ADDRESS;
1501 status = ath6kl_bmi_reg_write(ar, address, param);
1505 address = GPIO_BASE_ADDRESS + GPIO_PIN13_ADDRESS;
1506 status = ath6kl_bmi_reg_write(ar, address, param);
1511 /* write EEPROM data to Target RAM */
1512 status = ath6kl_upload_board_file(ar);
1516 /* transfer One time Programmable data */
1517 status = ath6kl_upload_otp(ar);
1521 /* Download Target firmware */
1522 status = ath6kl_upload_firmware(ar);
1526 status = ath6kl_upload_patch(ar);
1530 /* Download the test script */
1531 status = ath6kl_upload_testscript(ar);
1535 /* Restore system sleep */
1536 address = RTC_BASE_ADDRESS + SYSTEM_SLEEP_ADDRESS;
1537 status = ath6kl_bmi_reg_write(ar, address, sleep);
1541 address = MBOX_BASE_ADDRESS + LOCAL_SCRATCH_ADDRESS;
1542 param = options | 0x20;
1543 status = ath6kl_bmi_reg_write(ar, address, param);
1550 int ath6kl_init_hw_params(struct ath6kl *ar)
1552 const struct ath6kl_hw *uninitialized_var(hw);
1555 for (i = 0; i < ARRAY_SIZE(hw_list); i++) {
1558 if (hw->id == ar->version.target_ver)
1562 if (i == ARRAY_SIZE(hw_list)) {
1563 ath6kl_err("Unsupported hardware version: 0x%x\n",
1564 ar->version.target_ver);
1570 ath6kl_dbg(ATH6KL_DBG_BOOT,
1571 "target_ver 0x%x target_type 0x%x dataset_patch 0x%x app_load_addr 0x%x\n",
1572 ar->version.target_ver, ar->target_type,
1573 ar->hw.dataset_patch_addr, ar->hw.app_load_addr);
1574 ath6kl_dbg(ATH6KL_DBG_BOOT,
1575 "app_start_override_addr 0x%x board_ext_data_addr 0x%x reserved_ram_size 0x%x",
1576 ar->hw.app_start_override_addr, ar->hw.board_ext_data_addr,
1577 ar->hw.reserved_ram_size);
1578 ath6kl_dbg(ATH6KL_DBG_BOOT,
1579 "refclk_hz %d uarttx_pin %d",
1580 ar->hw.refclk_hz, ar->hw.uarttx_pin);
1585 static const char *ath6kl_init_get_hif_name(enum ath6kl_hif_type type)
1588 case ATH6KL_HIF_TYPE_SDIO:
1590 case ATH6KL_HIF_TYPE_USB:
1598 static const struct fw_capa_str_map {
1602 { ATH6KL_FW_CAPABILITY_HOST_P2P, "host-p2p" },
1603 { ATH6KL_FW_CAPABILITY_SCHED_SCAN, "sched-scan" },
1604 { ATH6KL_FW_CAPABILITY_STA_P2PDEV_DUPLEX, "sta-p2pdev-duplex" },
1605 { ATH6KL_FW_CAPABILITY_INACTIVITY_TIMEOUT, "inactivity-timeout" },
1606 { ATH6KL_FW_CAPABILITY_RSN_CAP_OVERRIDE, "rsn-cap-override" },
1607 { ATH6KL_FW_CAPABILITY_WOW_MULTICAST_FILTER, "wow-mc-filter" },
1608 { ATH6KL_FW_CAPABILITY_BMISS_ENHANCE, "bmiss-enhance" },
1609 { ATH6KL_FW_CAPABILITY_SCHED_SCAN_MATCH_LIST, "sscan-match-list" },
1610 { ATH6KL_FW_CAPABILITY_RSSI_SCAN_THOLD, "rssi-scan-thold" },
1611 { ATH6KL_FW_CAPABILITY_CUSTOM_MAC_ADDR, "custom-mac-addr" },
1612 { ATH6KL_FW_CAPABILITY_TX_ERR_NOTIFY, "tx-err-notify" },
1613 { ATH6KL_FW_CAPABILITY_REGDOMAIN, "regdomain" },
1614 { ATH6KL_FW_CAPABILITY_SCHED_SCAN_V2, "sched-scan-v2" },
1615 { ATH6KL_FW_CAPABILITY_HEART_BEAT_POLL, "hb-poll" },
1616 { ATH6KL_FW_CAPABILITY_64BIT_RATES, "64bit-rates" },
1617 { ATH6KL_FW_CAPABILITY_AP_INACTIVITY_MINS, "ap-inactivity-mins" },
1618 { ATH6KL_FW_CAPABILITY_MAP_LP_ENDPOINT, "map-lp-endpoint" },
1619 { ATH6KL_FW_CAPABILITY_RATETABLE_MCS15, "ratetable-mcs15" },
1620 { ATH6KL_FW_CAPABILITY_NO_IP_CHECKSUM, "no-ip-checksum" },
1623 static const char *ath6kl_init_get_fw_capa_name(unsigned int id)
1627 for (i = 0; i < ARRAY_SIZE(fw_capa_map); i++) {
1628 if (fw_capa_map[i].id == id)
1629 return fw_capa_map[i].name;
1635 static void ath6kl_init_get_fwcaps(struct ath6kl *ar, char *buf, size_t buf_len)
1637 u8 *data = (u8 *) ar->fw_capabilities;
1638 size_t trunc_len, len = 0;
1640 char *trunc = "...";
1642 for (i = 0; i < ATH6KL_FW_CAPABILITY_MAX; i++) {
1646 if (index >= sizeof(ar->fw_capabilities) * 4)
1649 if (buf_len - len < 4) {
1650 ath6kl_warn("firmware capability buffer too small!\n");
1652 /* add "..." to the end of string */
1653 trunc_len = strlen(trunc) + 1;
1654 strncpy(buf + buf_len - trunc_len, trunc, trunc_len);
1659 if (data[index] & (1 << bit)) {
1660 len += scnprintf(buf + len, buf_len - len, "%s,",
1661 ath6kl_init_get_fw_capa_name(i));
1665 /* overwrite the last comma */
1672 static int ath6kl_init_hw_reset(struct ath6kl *ar)
1674 ath6kl_dbg(ATH6KL_DBG_BOOT, "cold resetting the device");
1676 return ath6kl_diag_write32(ar, RESET_CONTROL_ADDRESS,
1677 cpu_to_le32(RESET_CONTROL_COLD_RST));
1680 static int __ath6kl_init_hw_start(struct ath6kl *ar)
1686 ath6kl_dbg(ATH6KL_DBG_BOOT, "hw start\n");
1688 ret = ath6kl_hif_power_on(ar);
1692 ret = ath6kl_configure_target(ar);
1696 ret = ath6kl_init_upload(ar);
1700 /* Do we need to finish the BMI phase */
1701 ret = ath6kl_bmi_done(ar);
1706 * The reason we have to wait for the target here is that the
1707 * driver layer has to init BMI in order to set the host block
1710 ret = ath6kl_htc_wait_target(ar->htc_target);
1712 if (ret == -ETIMEDOUT) {
1714 * Most likely USB target is in odd state after reboot and
1715 * needs a reset. A cold reset makes the whole device
1716 * disappear from USB bus and initialisation starts from
1719 ath6kl_warn("htc wait target timed out, resetting device\n");
1720 ath6kl_init_hw_reset(ar);
1723 ath6kl_err("htc wait target failed: %d\n", ret);
1727 ret = ath6kl_init_service_ep(ar);
1729 ath6kl_err("Endpoint service initilisation failed: %d\n", ret);
1730 goto err_cleanup_scatter;
1733 /* setup credit distribution */
1734 ath6kl_htc_credit_setup(ar->htc_target, &ar->credit_state_info);
1737 ret = ath6kl_htc_start(ar->htc_target);
1739 /* FIXME: call this */
1740 ath6kl_cookie_cleanup(ar);
1741 goto err_cleanup_scatter;
1744 /* Wait for Wmi event to be ready */
1745 timeleft = wait_event_interruptible_timeout(ar->event_wq,
1749 if (timeleft <= 0) {
1750 clear_bit(WMI_READY, &ar->flag);
1751 ath6kl_err("wmi is not ready or wait was interrupted: %ld\n",
1757 ath6kl_dbg(ATH6KL_DBG_BOOT, "firmware booted\n");
1759 if (test_and_clear_bit(FIRST_BOOT, &ar->flag)) {
1760 ath6kl_info("%s %s fw %s api %d%s\n",
1762 ath6kl_init_get_hif_name(ar->hif_type),
1763 ar->wiphy->fw_version,
1765 test_bit(TESTMODE, &ar->flag) ? " testmode" : "");
1766 ath6kl_init_get_fwcaps(ar, buf, sizeof(buf));
1767 ath6kl_info("firmware supports: %s\n", buf);
1770 if (ar->version.abi_ver != ATH6KL_ABI_VERSION) {
1771 ath6kl_err("abi version mismatch: host(0x%x), target(0x%x)\n",
1772 ATH6KL_ABI_VERSION, ar->version.abi_ver);
1777 ath6kl_dbg(ATH6KL_DBG_TRC, "%s: wmi is ready\n", __func__);
1779 /* communicate the wmi protocol verision to the target */
1780 /* FIXME: return error */
1781 if ((ath6kl_set_host_app_area(ar)) != 0)
1782 ath6kl_err("unable to set the host app area\n");
1784 for (i = 0; i < ar->vif_max; i++) {
1785 ret = ath6kl_target_config_wlan_params(ar, i);
1793 ath6kl_htc_stop(ar->htc_target);
1794 err_cleanup_scatter:
1795 ath6kl_hif_cleanup_scatter(ar);
1797 ath6kl_hif_power_off(ar);
1802 int ath6kl_init_hw_start(struct ath6kl *ar)
1806 err = __ath6kl_init_hw_start(ar);
1809 ar->state = ATH6KL_STATE_ON;
1813 static int __ath6kl_init_hw_stop(struct ath6kl *ar)
1817 ath6kl_dbg(ATH6KL_DBG_BOOT, "hw stop\n");
1819 ath6kl_htc_stop(ar->htc_target);
1821 ath6kl_hif_stop(ar);
1823 ath6kl_bmi_reset(ar);
1825 ret = ath6kl_hif_power_off(ar);
1827 ath6kl_warn("failed to power off hif: %d\n", ret);
1832 int ath6kl_init_hw_stop(struct ath6kl *ar)
1836 err = __ath6kl_init_hw_stop(ar);
1839 ar->state = ATH6KL_STATE_OFF;
1843 void ath6kl_init_hw_restart(struct ath6kl *ar)
1845 clear_bit(WMI_READY, &ar->flag);
1847 ath6kl_cfg80211_stop_all(ar);
1849 if (__ath6kl_init_hw_stop(ar)) {
1850 ath6kl_dbg(ATH6KL_DBG_RECOVERY, "Failed to stop during fw error recovery\n");
1854 if (__ath6kl_init_hw_start(ar)) {
1855 ath6kl_dbg(ATH6KL_DBG_RECOVERY, "Failed to restart during fw error recovery\n");
1860 void ath6kl_stop_txrx(struct ath6kl *ar)
1862 struct ath6kl_vif *vif, *tmp_vif;
1865 set_bit(DESTROY_IN_PROGRESS, &ar->flag);
1867 if (down_interruptible(&ar->sem)) {
1868 ath6kl_err("down_interruptible failed\n");
1872 for (i = 0; i < AP_MAX_NUM_STA; i++)
1873 aggr_reset_state(ar->sta_list[i].aggr_conn);
1875 spin_lock_bh(&ar->list_lock);
1876 list_for_each_entry_safe(vif, tmp_vif, &ar->vif_list, list) {
1877 list_del(&vif->list);
1878 spin_unlock_bh(&ar->list_lock);
1879 ath6kl_cfg80211_vif_stop(vif, test_bit(WMI_READY, &ar->flag));
1881 ath6kl_cfg80211_vif_cleanup(vif);
1883 spin_lock_bh(&ar->list_lock);
1885 spin_unlock_bh(&ar->list_lock);
1887 clear_bit(WMI_READY, &ar->flag);
1889 if (ar->fw_recovery.enable)
1890 del_timer_sync(&ar->fw_recovery.hb_timer);
1893 * After wmi_shudown all WMI events will be dropped. We
1894 * need to cleanup the buffers allocated in AP mode and
1895 * give disconnect notification to stack, which usually
1896 * happens in the disconnect_event. Simulate the disconnect
1897 * event by calling the function directly. Sometimes
1898 * disconnect_event will be received when the debug logs
1901 ath6kl_wmi_shutdown(ar->wmi);
1903 clear_bit(WMI_ENABLED, &ar->flag);
1904 if (ar->htc_target) {
1905 ath6kl_dbg(ATH6KL_DBG_TRC, "%s: shut down htc\n", __func__);
1906 ath6kl_htc_stop(ar->htc_target);
1910 * Try to reset the device if we can. The driver may have been
1911 * configure NOT to reset the target during a debug session.
1913 ath6kl_init_hw_reset(ar);
1917 EXPORT_SYMBOL(ath6kl_stop_txrx);