1 // SPDX-License-Identifier: BSD-3-Clause-Clear
3 * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.
6 #include <linux/ieee80211.h>
7 #include <linux/kernel.h>
8 #include <linux/skbuff.h>
9 #include <crypto/hash.h>
12 #include "debugfs_htt_stats.h"
13 #include "debugfs_sta.h"
21 #define ATH11K_DP_RX_FRAGMENT_TIMEOUT_MS (2 * HZ)
24 u8 *ath11k_dp_rx_h_80211_hdr(struct ath11k_base *ab, struct hal_rx_desc *desc)
26 return ab->hw_params.hw_ops->rx_desc_get_hdr_status(desc);
30 enum hal_encrypt_type ath11k_dp_rx_h_mpdu_start_enctype(struct ath11k_base *ab,
31 struct hal_rx_desc *desc)
33 if (!ab->hw_params.hw_ops->rx_desc_encrypt_valid(desc))
34 return HAL_ENCRYPT_TYPE_OPEN;
36 return ab->hw_params.hw_ops->rx_desc_get_encrypt_type(desc);
39 static inline u8 ath11k_dp_rx_h_msdu_start_decap_type(struct ath11k_base *ab,
40 struct hal_rx_desc *desc)
42 return ab->hw_params.hw_ops->rx_desc_get_decap_type(desc);
46 bool ath11k_dp_rx_h_msdu_start_ldpc_support(struct ath11k_base *ab,
47 struct hal_rx_desc *desc)
49 return ab->hw_params.hw_ops->rx_desc_get_ldpc_support(desc);
53 u8 ath11k_dp_rx_h_msdu_start_mesh_ctl_present(struct ath11k_base *ab,
54 struct hal_rx_desc *desc)
56 return ab->hw_params.hw_ops->rx_desc_get_mesh_ctl(desc);
60 bool ath11k_dp_rx_h_mpdu_start_seq_ctrl_valid(struct ath11k_base *ab,
61 struct hal_rx_desc *desc)
63 return ab->hw_params.hw_ops->rx_desc_get_mpdu_seq_ctl_vld(desc);
66 static inline bool ath11k_dp_rx_h_mpdu_start_fc_valid(struct ath11k_base *ab,
67 struct hal_rx_desc *desc)
69 return ab->hw_params.hw_ops->rx_desc_get_mpdu_fc_valid(desc);
72 static inline bool ath11k_dp_rx_h_mpdu_start_more_frags(struct ath11k_base *ab,
75 struct ieee80211_hdr *hdr;
77 hdr = (struct ieee80211_hdr *)(skb->data + ab->hw_params.hal_desc_sz);
78 return ieee80211_has_morefrags(hdr->frame_control);
81 static inline u16 ath11k_dp_rx_h_mpdu_start_frag_no(struct ath11k_base *ab,
84 struct ieee80211_hdr *hdr;
86 hdr = (struct ieee80211_hdr *)(skb->data + ab->hw_params.hal_desc_sz);
87 return le16_to_cpu(hdr->seq_ctrl) & IEEE80211_SCTL_FRAG;
90 static inline u16 ath11k_dp_rx_h_mpdu_start_seq_no(struct ath11k_base *ab,
91 struct hal_rx_desc *desc)
93 return ab->hw_params.hw_ops->rx_desc_get_mpdu_start_seq_no(desc);
96 static inline void *ath11k_dp_rx_get_attention(struct ath11k_base *ab,
97 struct hal_rx_desc *desc)
99 return ab->hw_params.hw_ops->rx_desc_get_attention(desc);
102 static inline bool ath11k_dp_rx_h_attn_msdu_done(struct rx_attention *attn)
104 return !!FIELD_GET(RX_ATTENTION_INFO2_MSDU_DONE,
105 __le32_to_cpu(attn->info2));
108 static inline bool ath11k_dp_rx_h_attn_l4_cksum_fail(struct rx_attention *attn)
110 return !!FIELD_GET(RX_ATTENTION_INFO1_TCP_UDP_CKSUM_FAIL,
111 __le32_to_cpu(attn->info1));
114 static inline bool ath11k_dp_rx_h_attn_ip_cksum_fail(struct rx_attention *attn)
116 return !!FIELD_GET(RX_ATTENTION_INFO1_IP_CKSUM_FAIL,
117 __le32_to_cpu(attn->info1));
120 static inline bool ath11k_dp_rx_h_attn_is_decrypted(struct rx_attention *attn)
122 return (FIELD_GET(RX_ATTENTION_INFO2_DCRYPT_STATUS_CODE,
123 __le32_to_cpu(attn->info2)) ==
124 RX_DESC_DECRYPT_STATUS_CODE_OK);
127 static u32 ath11k_dp_rx_h_attn_mpdu_err(struct rx_attention *attn)
129 u32 info = __le32_to_cpu(attn->info1);
132 if (info & RX_ATTENTION_INFO1_FCS_ERR)
133 errmap |= DP_RX_MPDU_ERR_FCS;
135 if (info & RX_ATTENTION_INFO1_DECRYPT_ERR)
136 errmap |= DP_RX_MPDU_ERR_DECRYPT;
138 if (info & RX_ATTENTION_INFO1_TKIP_MIC_ERR)
139 errmap |= DP_RX_MPDU_ERR_TKIP_MIC;
141 if (info & RX_ATTENTION_INFO1_A_MSDU_ERROR)
142 errmap |= DP_RX_MPDU_ERR_AMSDU_ERR;
144 if (info & RX_ATTENTION_INFO1_OVERFLOW_ERR)
145 errmap |= DP_RX_MPDU_ERR_OVERFLOW;
147 if (info & RX_ATTENTION_INFO1_MSDU_LEN_ERR)
148 errmap |= DP_RX_MPDU_ERR_MSDU_LEN;
150 if (info & RX_ATTENTION_INFO1_MPDU_LEN_ERR)
151 errmap |= DP_RX_MPDU_ERR_MPDU_LEN;
156 static bool ath11k_dp_rx_h_attn_msdu_len_err(struct ath11k_base *ab,
157 struct hal_rx_desc *desc)
159 struct rx_attention *rx_attention;
162 rx_attention = ath11k_dp_rx_get_attention(ab, desc);
163 errmap = ath11k_dp_rx_h_attn_mpdu_err(rx_attention);
165 return errmap & DP_RX_MPDU_ERR_MSDU_LEN;
168 static inline u16 ath11k_dp_rx_h_msdu_start_msdu_len(struct ath11k_base *ab,
169 struct hal_rx_desc *desc)
171 return ab->hw_params.hw_ops->rx_desc_get_msdu_len(desc);
174 static inline u8 ath11k_dp_rx_h_msdu_start_sgi(struct ath11k_base *ab,
175 struct hal_rx_desc *desc)
177 return ab->hw_params.hw_ops->rx_desc_get_msdu_sgi(desc);
180 static inline u8 ath11k_dp_rx_h_msdu_start_rate_mcs(struct ath11k_base *ab,
181 struct hal_rx_desc *desc)
183 return ab->hw_params.hw_ops->rx_desc_get_msdu_rate_mcs(desc);
186 static inline u8 ath11k_dp_rx_h_msdu_start_rx_bw(struct ath11k_base *ab,
187 struct hal_rx_desc *desc)
189 return ab->hw_params.hw_ops->rx_desc_get_msdu_rx_bw(desc);
192 static inline u32 ath11k_dp_rx_h_msdu_start_freq(struct ath11k_base *ab,
193 struct hal_rx_desc *desc)
195 return ab->hw_params.hw_ops->rx_desc_get_msdu_freq(desc);
198 static inline u8 ath11k_dp_rx_h_msdu_start_pkt_type(struct ath11k_base *ab,
199 struct hal_rx_desc *desc)
201 return ab->hw_params.hw_ops->rx_desc_get_msdu_pkt_type(desc);
204 static inline u8 ath11k_dp_rx_h_msdu_start_nss(struct ath11k_base *ab,
205 struct hal_rx_desc *desc)
207 return hweight8(ab->hw_params.hw_ops->rx_desc_get_msdu_nss(desc));
210 static inline u8 ath11k_dp_rx_h_mpdu_start_tid(struct ath11k_base *ab,
211 struct hal_rx_desc *desc)
213 return ab->hw_params.hw_ops->rx_desc_get_mpdu_tid(desc);
216 static inline u16 ath11k_dp_rx_h_mpdu_start_peer_id(struct ath11k_base *ab,
217 struct hal_rx_desc *desc)
219 return ab->hw_params.hw_ops->rx_desc_get_mpdu_peer_id(desc);
222 static inline u8 ath11k_dp_rx_h_msdu_end_l3pad(struct ath11k_base *ab,
223 struct hal_rx_desc *desc)
225 return ab->hw_params.hw_ops->rx_desc_get_l3_pad_bytes(desc);
228 static inline bool ath11k_dp_rx_h_msdu_end_first_msdu(struct ath11k_base *ab,
229 struct hal_rx_desc *desc)
231 return ab->hw_params.hw_ops->rx_desc_get_first_msdu(desc);
234 static bool ath11k_dp_rx_h_msdu_end_last_msdu(struct ath11k_base *ab,
235 struct hal_rx_desc *desc)
237 return ab->hw_params.hw_ops->rx_desc_get_last_msdu(desc);
240 static void ath11k_dp_rx_desc_end_tlv_copy(struct ath11k_base *ab,
241 struct hal_rx_desc *fdesc,
242 struct hal_rx_desc *ldesc)
244 ab->hw_params.hw_ops->rx_desc_copy_attn_end_tlv(fdesc, ldesc);
247 static inline u32 ath11k_dp_rxdesc_get_mpdulen_err(struct rx_attention *attn)
249 return FIELD_GET(RX_ATTENTION_INFO1_MPDU_LEN_ERR,
250 __le32_to_cpu(attn->info1));
253 static inline u8 *ath11k_dp_rxdesc_get_80211hdr(struct ath11k_base *ab,
254 struct hal_rx_desc *rx_desc)
258 rx_pkt_hdr = ab->hw_params.hw_ops->rx_desc_get_msdu_payload(rx_desc);
263 static inline bool ath11k_dp_rxdesc_mpdu_valid(struct ath11k_base *ab,
264 struct hal_rx_desc *rx_desc)
268 tlv_tag = ab->hw_params.hw_ops->rx_desc_get_mpdu_start_tag(rx_desc);
270 return tlv_tag == HAL_RX_MPDU_START;
273 static inline u32 ath11k_dp_rxdesc_get_ppduid(struct ath11k_base *ab,
274 struct hal_rx_desc *rx_desc)
276 return ab->hw_params.hw_ops->rx_desc_get_mpdu_ppdu_id(rx_desc);
279 static inline void ath11k_dp_rxdesc_set_msdu_len(struct ath11k_base *ab,
280 struct hal_rx_desc *desc,
283 ab->hw_params.hw_ops->rx_desc_set_msdu_len(desc, len);
286 static bool ath11k_dp_rx_h_attn_is_mcbc(struct ath11k_base *ab,
287 struct hal_rx_desc *desc)
289 struct rx_attention *attn = ath11k_dp_rx_get_attention(ab, desc);
291 return ath11k_dp_rx_h_msdu_end_first_msdu(ab, desc) &&
292 (!!FIELD_GET(RX_ATTENTION_INFO1_MCAST_BCAST,
293 __le32_to_cpu(attn->info1)));
296 static bool ath11k_dp_rxdesc_mac_addr2_valid(struct ath11k_base *ab,
297 struct hal_rx_desc *desc)
299 return ab->hw_params.hw_ops->rx_desc_mac_addr2_valid(desc);
302 static u8 *ath11k_dp_rxdesc_mpdu_start_addr2(struct ath11k_base *ab,
303 struct hal_rx_desc *desc)
305 return ab->hw_params.hw_ops->rx_desc_mpdu_start_addr2(desc);
308 static void ath11k_dp_service_mon_ring(struct timer_list *t)
310 struct ath11k_base *ab = from_timer(ab, t, mon_reap_timer);
313 for (i = 0; i < ab->hw_params.num_rxmda_per_pdev; i++)
314 ath11k_dp_rx_process_mon_rings(ab, i, NULL, DP_MON_SERVICE_BUDGET);
316 mod_timer(&ab->mon_reap_timer, jiffies +
317 msecs_to_jiffies(ATH11K_MON_TIMER_INTERVAL));
320 static int ath11k_dp_purge_mon_ring(struct ath11k_base *ab)
323 unsigned long timeout = jiffies + msecs_to_jiffies(DP_MON_PURGE_TIMEOUT_MS);
326 for (i = 0; i < ab->hw_params.num_rxmda_per_pdev; i++)
327 reaped += ath11k_dp_rx_process_mon_rings(ab, i,
329 DP_MON_SERVICE_BUDGET);
331 /* nothing more to reap */
332 if (reaped < DP_MON_SERVICE_BUDGET)
335 } while (time_before(jiffies, timeout));
337 ath11k_warn(ab, "dp mon ring purge timeout");
342 /* Returns number of Rx buffers replenished */
343 int ath11k_dp_rxbufs_replenish(struct ath11k_base *ab, int mac_id,
344 struct dp_rxdma_ring *rx_ring,
346 enum hal_rx_buf_return_buf_manager mgr)
348 struct hal_srng *srng;
357 req_entries = min(req_entries, rx_ring->bufs_max);
359 srng = &ab->hal.srng_list[rx_ring->refill_buf_ring.ring_id];
361 spin_lock_bh(&srng->lock);
363 ath11k_hal_srng_access_begin(ab, srng);
365 num_free = ath11k_hal_srng_src_num_free(ab, srng, true);
366 if (!req_entries && (num_free > (rx_ring->bufs_max * 3) / 4))
367 req_entries = num_free;
369 req_entries = min(num_free, req_entries);
370 num_remain = req_entries;
372 while (num_remain > 0) {
373 skb = dev_alloc_skb(DP_RX_BUFFER_SIZE +
374 DP_RX_BUFFER_ALIGN_SIZE);
378 if (!IS_ALIGNED((unsigned long)skb->data,
379 DP_RX_BUFFER_ALIGN_SIZE)) {
381 PTR_ALIGN(skb->data, DP_RX_BUFFER_ALIGN_SIZE) -
385 paddr = dma_map_single(ab->dev, skb->data,
386 skb->len + skb_tailroom(skb),
388 if (dma_mapping_error(ab->dev, paddr))
391 spin_lock_bh(&rx_ring->idr_lock);
392 buf_id = idr_alloc(&rx_ring->bufs_idr, skb, 0,
393 rx_ring->bufs_max * 3, GFP_ATOMIC);
394 spin_unlock_bh(&rx_ring->idr_lock);
398 desc = ath11k_hal_srng_src_get_next_entry(ab, srng);
400 goto fail_idr_remove;
402 ATH11K_SKB_RXCB(skb)->paddr = paddr;
404 cookie = FIELD_PREP(DP_RXDMA_BUF_COOKIE_PDEV_ID, mac_id) |
405 FIELD_PREP(DP_RXDMA_BUF_COOKIE_BUF_ID, buf_id);
409 ath11k_hal_rx_buf_addr_info_set(desc, paddr, cookie, mgr);
412 ath11k_hal_srng_access_end(ab, srng);
414 spin_unlock_bh(&srng->lock);
416 return req_entries - num_remain;
419 spin_lock_bh(&rx_ring->idr_lock);
420 idr_remove(&rx_ring->bufs_idr, buf_id);
421 spin_unlock_bh(&rx_ring->idr_lock);
423 dma_unmap_single(ab->dev, paddr, skb->len + skb_tailroom(skb),
426 dev_kfree_skb_any(skb);
428 ath11k_hal_srng_access_end(ab, srng);
430 spin_unlock_bh(&srng->lock);
432 return req_entries - num_remain;
435 static int ath11k_dp_rxdma_buf_ring_free(struct ath11k *ar,
436 struct dp_rxdma_ring *rx_ring)
438 struct ath11k_pdev_dp *dp = &ar->dp;
442 spin_lock_bh(&rx_ring->idr_lock);
443 idr_for_each_entry(&rx_ring->bufs_idr, skb, buf_id) {
444 idr_remove(&rx_ring->bufs_idr, buf_id);
445 /* TODO: Understand where internal driver does this dma_unmap
448 dma_unmap_single(ar->ab->dev, ATH11K_SKB_RXCB(skb)->paddr,
449 skb->len + skb_tailroom(skb), DMA_FROM_DEVICE);
450 dev_kfree_skb_any(skb);
453 idr_destroy(&rx_ring->bufs_idr);
454 spin_unlock_bh(&rx_ring->idr_lock);
456 /* if rxdma1_enable is false, mon_status_refill_ring
457 * isn't setup, so don't clean.
459 if (!ar->ab->hw_params.rxdma1_enable)
462 rx_ring = &dp->rx_mon_status_refill_ring[0];
464 spin_lock_bh(&rx_ring->idr_lock);
465 idr_for_each_entry(&rx_ring->bufs_idr, skb, buf_id) {
466 idr_remove(&rx_ring->bufs_idr, buf_id);
467 /* XXX: Understand where internal driver does this dma_unmap
470 dma_unmap_single(ar->ab->dev, ATH11K_SKB_RXCB(skb)->paddr,
471 skb->len + skb_tailroom(skb), DMA_BIDIRECTIONAL);
472 dev_kfree_skb_any(skb);
475 idr_destroy(&rx_ring->bufs_idr);
476 spin_unlock_bh(&rx_ring->idr_lock);
481 static int ath11k_dp_rxdma_pdev_buf_free(struct ath11k *ar)
483 struct ath11k_pdev_dp *dp = &ar->dp;
484 struct ath11k_base *ab = ar->ab;
485 struct dp_rxdma_ring *rx_ring = &dp->rx_refill_buf_ring;
488 ath11k_dp_rxdma_buf_ring_free(ar, rx_ring);
490 rx_ring = &dp->rxdma_mon_buf_ring;
491 ath11k_dp_rxdma_buf_ring_free(ar, rx_ring);
493 for (i = 0; i < ab->hw_params.num_rxmda_per_pdev; i++) {
494 rx_ring = &dp->rx_mon_status_refill_ring[i];
495 ath11k_dp_rxdma_buf_ring_free(ar, rx_ring);
501 static int ath11k_dp_rxdma_ring_buf_setup(struct ath11k *ar,
502 struct dp_rxdma_ring *rx_ring,
505 struct ath11k_pdev_dp *dp = &ar->dp;
508 num_entries = rx_ring->refill_buf_ring.size /
509 ath11k_hal_srng_get_entrysize(ar->ab, ringtype);
511 rx_ring->bufs_max = num_entries;
512 ath11k_dp_rxbufs_replenish(ar->ab, dp->mac_id, rx_ring, num_entries,
513 ar->ab->hw_params.hal_params->rx_buf_rbm);
517 static int ath11k_dp_rxdma_pdev_buf_setup(struct ath11k *ar)
519 struct ath11k_pdev_dp *dp = &ar->dp;
520 struct ath11k_base *ab = ar->ab;
521 struct dp_rxdma_ring *rx_ring = &dp->rx_refill_buf_ring;
524 ath11k_dp_rxdma_ring_buf_setup(ar, rx_ring, HAL_RXDMA_BUF);
526 if (ar->ab->hw_params.rxdma1_enable) {
527 rx_ring = &dp->rxdma_mon_buf_ring;
528 ath11k_dp_rxdma_ring_buf_setup(ar, rx_ring, HAL_RXDMA_MONITOR_BUF);
531 for (i = 0; i < ab->hw_params.num_rxmda_per_pdev; i++) {
532 rx_ring = &dp->rx_mon_status_refill_ring[i];
533 ath11k_dp_rxdma_ring_buf_setup(ar, rx_ring, HAL_RXDMA_MONITOR_STATUS);
539 static void ath11k_dp_rx_pdev_srng_free(struct ath11k *ar)
541 struct ath11k_pdev_dp *dp = &ar->dp;
542 struct ath11k_base *ab = ar->ab;
545 ath11k_dp_srng_cleanup(ab, &dp->rx_refill_buf_ring.refill_buf_ring);
547 for (i = 0; i < ab->hw_params.num_rxmda_per_pdev; i++) {
548 if (ab->hw_params.rx_mac_buf_ring)
549 ath11k_dp_srng_cleanup(ab, &dp->rx_mac_buf_ring[i]);
551 ath11k_dp_srng_cleanup(ab, &dp->rxdma_err_dst_ring[i]);
552 ath11k_dp_srng_cleanup(ab,
553 &dp->rx_mon_status_refill_ring[i].refill_buf_ring);
556 ath11k_dp_srng_cleanup(ab, &dp->rxdma_mon_buf_ring.refill_buf_ring);
559 void ath11k_dp_pdev_reo_cleanup(struct ath11k_base *ab)
561 struct ath11k_dp *dp = &ab->dp;
564 for (i = 0; i < DP_REO_DST_RING_MAX; i++)
565 ath11k_dp_srng_cleanup(ab, &dp->reo_dst_ring[i]);
568 int ath11k_dp_pdev_reo_setup(struct ath11k_base *ab)
570 struct ath11k_dp *dp = &ab->dp;
574 for (i = 0; i < DP_REO_DST_RING_MAX; i++) {
575 ret = ath11k_dp_srng_setup(ab, &dp->reo_dst_ring[i],
577 DP_REO_DST_RING_SIZE);
579 ath11k_warn(ab, "failed to setup reo_dst_ring\n");
580 goto err_reo_cleanup;
587 ath11k_dp_pdev_reo_cleanup(ab);
592 static int ath11k_dp_rx_pdev_srng_alloc(struct ath11k *ar)
594 struct ath11k_pdev_dp *dp = &ar->dp;
595 struct ath11k_base *ab = ar->ab;
596 struct dp_srng *srng = NULL;
600 ret = ath11k_dp_srng_setup(ar->ab,
601 &dp->rx_refill_buf_ring.refill_buf_ring,
603 dp->mac_id, DP_RXDMA_BUF_RING_SIZE);
605 ath11k_warn(ar->ab, "failed to setup rx_refill_buf_ring\n");
609 if (ar->ab->hw_params.rx_mac_buf_ring) {
610 for (i = 0; i < ab->hw_params.num_rxmda_per_pdev; i++) {
611 ret = ath11k_dp_srng_setup(ar->ab,
612 &dp->rx_mac_buf_ring[i],
614 dp->mac_id + i, 1024);
616 ath11k_warn(ar->ab, "failed to setup rx_mac_buf_ring %d\n",
623 for (i = 0; i < ab->hw_params.num_rxmda_per_pdev; i++) {
624 ret = ath11k_dp_srng_setup(ar->ab, &dp->rxdma_err_dst_ring[i],
625 HAL_RXDMA_DST, 0, dp->mac_id + i,
626 DP_RXDMA_ERR_DST_RING_SIZE);
628 ath11k_warn(ar->ab, "failed to setup rxdma_err_dst_ring %d\n", i);
633 for (i = 0; i < ab->hw_params.num_rxmda_per_pdev; i++) {
634 srng = &dp->rx_mon_status_refill_ring[i].refill_buf_ring;
635 ret = ath11k_dp_srng_setup(ar->ab,
637 HAL_RXDMA_MONITOR_STATUS, 0, dp->mac_id + i,
638 DP_RXDMA_MON_STATUS_RING_SIZE);
641 "failed to setup rx_mon_status_refill_ring %d\n", i);
646 /* if rxdma1_enable is false, then it doesn't need
647 * to setup rxdam_mon_buf_ring, rxdma_mon_dst_ring
648 * and rxdma_mon_desc_ring.
649 * init reap timer for QCA6390.
651 if (!ar->ab->hw_params.rxdma1_enable) {
652 //init mon status buffer reap timer
653 timer_setup(&ar->ab->mon_reap_timer,
654 ath11k_dp_service_mon_ring, 0);
658 ret = ath11k_dp_srng_setup(ar->ab,
659 &dp->rxdma_mon_buf_ring.refill_buf_ring,
660 HAL_RXDMA_MONITOR_BUF, 0, dp->mac_id,
661 DP_RXDMA_MONITOR_BUF_RING_SIZE);
664 "failed to setup HAL_RXDMA_MONITOR_BUF\n");
668 ret = ath11k_dp_srng_setup(ar->ab, &dp->rxdma_mon_dst_ring,
669 HAL_RXDMA_MONITOR_DST, 0, dp->mac_id,
670 DP_RXDMA_MONITOR_DST_RING_SIZE);
673 "failed to setup HAL_RXDMA_MONITOR_DST\n");
677 ret = ath11k_dp_srng_setup(ar->ab, &dp->rxdma_mon_desc_ring,
678 HAL_RXDMA_MONITOR_DESC, 0, dp->mac_id,
679 DP_RXDMA_MONITOR_DESC_RING_SIZE);
682 "failed to setup HAL_RXDMA_MONITOR_DESC\n");
689 void ath11k_dp_reo_cmd_list_cleanup(struct ath11k_base *ab)
691 struct ath11k_dp *dp = &ab->dp;
692 struct dp_reo_cmd *cmd, *tmp;
693 struct dp_reo_cache_flush_elem *cmd_cache, *tmp_cache;
695 spin_lock_bh(&dp->reo_cmd_lock);
696 list_for_each_entry_safe(cmd, tmp, &dp->reo_cmd_list, list) {
697 list_del(&cmd->list);
698 dma_unmap_single(ab->dev, cmd->data.paddr,
699 cmd->data.size, DMA_BIDIRECTIONAL);
700 kfree(cmd->data.vaddr);
704 list_for_each_entry_safe(cmd_cache, tmp_cache,
705 &dp->reo_cmd_cache_flush_list, list) {
706 list_del(&cmd_cache->list);
707 dp->reo_cmd_cache_flush_count--;
708 dma_unmap_single(ab->dev, cmd_cache->data.paddr,
709 cmd_cache->data.size, DMA_BIDIRECTIONAL);
710 kfree(cmd_cache->data.vaddr);
713 spin_unlock_bh(&dp->reo_cmd_lock);
716 static void ath11k_dp_reo_cmd_free(struct ath11k_dp *dp, void *ctx,
717 enum hal_reo_cmd_status status)
719 struct dp_rx_tid *rx_tid = ctx;
721 if (status != HAL_REO_CMD_SUCCESS)
722 ath11k_warn(dp->ab, "failed to flush rx tid hw desc, tid %d status %d\n",
723 rx_tid->tid, status);
725 dma_unmap_single(dp->ab->dev, rx_tid->paddr, rx_tid->size,
727 kfree(rx_tid->vaddr);
730 static void ath11k_dp_reo_cache_flush(struct ath11k_base *ab,
731 struct dp_rx_tid *rx_tid)
733 struct ath11k_hal_reo_cmd cmd = {0};
734 unsigned long tot_desc_sz, desc_sz;
737 tot_desc_sz = rx_tid->size;
738 desc_sz = ath11k_hal_reo_qdesc_size(0, HAL_DESC_REO_NON_QOS_TID);
740 while (tot_desc_sz > desc_sz) {
741 tot_desc_sz -= desc_sz;
742 cmd.addr_lo = lower_32_bits(rx_tid->paddr + tot_desc_sz);
743 cmd.addr_hi = upper_32_bits(rx_tid->paddr);
744 ret = ath11k_dp_tx_send_reo_cmd(ab, rx_tid,
745 HAL_REO_CMD_FLUSH_CACHE, &cmd,
749 "failed to send HAL_REO_CMD_FLUSH_CACHE, tid %d (%d)\n",
753 memset(&cmd, 0, sizeof(cmd));
754 cmd.addr_lo = lower_32_bits(rx_tid->paddr);
755 cmd.addr_hi = upper_32_bits(rx_tid->paddr);
756 cmd.flag |= HAL_REO_CMD_FLG_NEED_STATUS;
757 ret = ath11k_dp_tx_send_reo_cmd(ab, rx_tid,
758 HAL_REO_CMD_FLUSH_CACHE,
759 &cmd, ath11k_dp_reo_cmd_free);
761 ath11k_err(ab, "failed to send HAL_REO_CMD_FLUSH_CACHE cmd, tid %d (%d)\n",
763 dma_unmap_single(ab->dev, rx_tid->paddr, rx_tid->size,
765 kfree(rx_tid->vaddr);
769 static void ath11k_dp_rx_tid_del_func(struct ath11k_dp *dp, void *ctx,
770 enum hal_reo_cmd_status status)
772 struct ath11k_base *ab = dp->ab;
773 struct dp_rx_tid *rx_tid = ctx;
774 struct dp_reo_cache_flush_elem *elem, *tmp;
776 if (status == HAL_REO_CMD_DRAIN) {
778 } else if (status != HAL_REO_CMD_SUCCESS) {
779 /* Shouldn't happen! Cleanup in case of other failure? */
780 ath11k_warn(ab, "failed to delete rx tid %d hw descriptor %d\n",
781 rx_tid->tid, status);
785 elem = kzalloc(sizeof(*elem), GFP_ATOMIC);
790 memcpy(&elem->data, rx_tid, sizeof(*rx_tid));
792 spin_lock_bh(&dp->reo_cmd_lock);
793 list_add_tail(&elem->list, &dp->reo_cmd_cache_flush_list);
794 dp->reo_cmd_cache_flush_count++;
796 /* Flush and invalidate aged REO desc from HW cache */
797 list_for_each_entry_safe(elem, tmp, &dp->reo_cmd_cache_flush_list,
799 if (dp->reo_cmd_cache_flush_count > DP_REO_DESC_FREE_THRESHOLD ||
800 time_after(jiffies, elem->ts +
801 msecs_to_jiffies(DP_REO_DESC_FREE_TIMEOUT_MS))) {
802 list_del(&elem->list);
803 dp->reo_cmd_cache_flush_count--;
804 spin_unlock_bh(&dp->reo_cmd_lock);
806 ath11k_dp_reo_cache_flush(ab, &elem->data);
808 spin_lock_bh(&dp->reo_cmd_lock);
811 spin_unlock_bh(&dp->reo_cmd_lock);
815 dma_unmap_single(ab->dev, rx_tid->paddr, rx_tid->size,
817 kfree(rx_tid->vaddr);
820 void ath11k_peer_rx_tid_delete(struct ath11k *ar,
821 struct ath11k_peer *peer, u8 tid)
823 struct ath11k_hal_reo_cmd cmd = {0};
824 struct dp_rx_tid *rx_tid = &peer->rx_tid[tid];
830 cmd.flag = HAL_REO_CMD_FLG_NEED_STATUS;
831 cmd.addr_lo = lower_32_bits(rx_tid->paddr);
832 cmd.addr_hi = upper_32_bits(rx_tid->paddr);
833 cmd.upd0 |= HAL_REO_CMD_UPD0_VLD;
834 ret = ath11k_dp_tx_send_reo_cmd(ar->ab, rx_tid,
835 HAL_REO_CMD_UPDATE_RX_QUEUE, &cmd,
836 ath11k_dp_rx_tid_del_func);
838 ath11k_err(ar->ab, "failed to send HAL_REO_CMD_UPDATE_RX_QUEUE cmd, tid %d (%d)\n",
840 dma_unmap_single(ar->ab->dev, rx_tid->paddr, rx_tid->size,
842 kfree(rx_tid->vaddr);
845 rx_tid->active = false;
848 static int ath11k_dp_rx_link_desc_return(struct ath11k_base *ab,
850 enum hal_wbm_rel_bm_act action)
852 struct ath11k_dp *dp = &ab->dp;
853 struct hal_srng *srng;
857 srng = &ab->hal.srng_list[dp->wbm_desc_rel_ring.ring_id];
859 spin_lock_bh(&srng->lock);
861 ath11k_hal_srng_access_begin(ab, srng);
863 desc = ath11k_hal_srng_src_get_next_entry(ab, srng);
869 ath11k_hal_rx_msdu_link_desc_set(ab, (void *)desc, (void *)link_desc,
873 ath11k_hal_srng_access_end(ab, srng);
875 spin_unlock_bh(&srng->lock);
880 static void ath11k_dp_rx_frags_cleanup(struct dp_rx_tid *rx_tid, bool rel_link_desc)
882 struct ath11k_base *ab = rx_tid->ab;
884 lockdep_assert_held(&ab->base_lock);
886 if (rx_tid->dst_ring_desc) {
888 ath11k_dp_rx_link_desc_return(ab, (u32 *)rx_tid->dst_ring_desc,
889 HAL_WBM_REL_BM_ACT_PUT_IN_IDLE);
890 kfree(rx_tid->dst_ring_desc);
891 rx_tid->dst_ring_desc = NULL;
895 rx_tid->last_frag_no = 0;
896 rx_tid->rx_frag_bitmap = 0;
897 __skb_queue_purge(&rx_tid->rx_frags);
900 void ath11k_peer_frags_flush(struct ath11k *ar, struct ath11k_peer *peer)
902 struct dp_rx_tid *rx_tid;
905 lockdep_assert_held(&ar->ab->base_lock);
907 for (i = 0; i <= IEEE80211_NUM_TIDS; i++) {
908 rx_tid = &peer->rx_tid[i];
910 spin_unlock_bh(&ar->ab->base_lock);
911 del_timer_sync(&rx_tid->frag_timer);
912 spin_lock_bh(&ar->ab->base_lock);
914 ath11k_dp_rx_frags_cleanup(rx_tid, true);
918 void ath11k_peer_rx_tid_cleanup(struct ath11k *ar, struct ath11k_peer *peer)
920 struct dp_rx_tid *rx_tid;
923 lockdep_assert_held(&ar->ab->base_lock);
925 for (i = 0; i <= IEEE80211_NUM_TIDS; i++) {
926 rx_tid = &peer->rx_tid[i];
928 ath11k_peer_rx_tid_delete(ar, peer, i);
929 ath11k_dp_rx_frags_cleanup(rx_tid, true);
931 spin_unlock_bh(&ar->ab->base_lock);
932 del_timer_sync(&rx_tid->frag_timer);
933 spin_lock_bh(&ar->ab->base_lock);
937 static int ath11k_peer_rx_tid_reo_update(struct ath11k *ar,
938 struct ath11k_peer *peer,
939 struct dp_rx_tid *rx_tid,
940 u32 ba_win_sz, u16 ssn,
943 struct ath11k_hal_reo_cmd cmd = {0};
946 cmd.addr_lo = lower_32_bits(rx_tid->paddr);
947 cmd.addr_hi = upper_32_bits(rx_tid->paddr);
948 cmd.flag = HAL_REO_CMD_FLG_NEED_STATUS;
949 cmd.upd0 = HAL_REO_CMD_UPD0_BA_WINDOW_SIZE;
950 cmd.ba_window_size = ba_win_sz;
953 cmd.upd0 |= HAL_REO_CMD_UPD0_SSN;
954 cmd.upd2 = FIELD_PREP(HAL_REO_CMD_UPD2_SSN, ssn);
957 ret = ath11k_dp_tx_send_reo_cmd(ar->ab, rx_tid,
958 HAL_REO_CMD_UPDATE_RX_QUEUE, &cmd,
961 ath11k_warn(ar->ab, "failed to update rx tid queue, tid %d (%d)\n",
966 rx_tid->ba_win_sz = ba_win_sz;
971 static void ath11k_dp_rx_tid_mem_free(struct ath11k_base *ab,
972 const u8 *peer_mac, int vdev_id, u8 tid)
974 struct ath11k_peer *peer;
975 struct dp_rx_tid *rx_tid;
977 spin_lock_bh(&ab->base_lock);
979 peer = ath11k_peer_find(ab, vdev_id, peer_mac);
981 ath11k_warn(ab, "failed to find the peer to free up rx tid mem\n");
985 rx_tid = &peer->rx_tid[tid];
989 dma_unmap_single(ab->dev, rx_tid->paddr, rx_tid->size,
991 kfree(rx_tid->vaddr);
993 rx_tid->active = false;
996 spin_unlock_bh(&ab->base_lock);
999 int ath11k_peer_rx_tid_setup(struct ath11k *ar, const u8 *peer_mac, int vdev_id,
1000 u8 tid, u32 ba_win_sz, u16 ssn,
1001 enum hal_pn_type pn_type)
1003 struct ath11k_base *ab = ar->ab;
1004 struct ath11k_peer *peer;
1005 struct dp_rx_tid *rx_tid;
1012 spin_lock_bh(&ab->base_lock);
1014 peer = ath11k_peer_find(ab, vdev_id, peer_mac);
1016 ath11k_warn(ab, "failed to find the peer to set up rx tid\n");
1017 spin_unlock_bh(&ab->base_lock);
1021 rx_tid = &peer->rx_tid[tid];
1022 /* Update the tid queue if it is already setup */
1023 if (rx_tid->active) {
1024 paddr = rx_tid->paddr;
1025 ret = ath11k_peer_rx_tid_reo_update(ar, peer, rx_tid,
1026 ba_win_sz, ssn, true);
1027 spin_unlock_bh(&ab->base_lock);
1029 ath11k_warn(ab, "failed to update reo for rx tid %d\n", tid);
1033 ret = ath11k_wmi_peer_rx_reorder_queue_setup(ar, vdev_id,
1037 ath11k_warn(ab, "failed to send wmi command to update rx reorder queue, tid :%d (%d)\n",
1044 rx_tid->ba_win_sz = ba_win_sz;
1046 /* TODO: Optimize the memory allocation for qos tid based on
1047 * the actual BA window size in REO tid update path.
1049 if (tid == HAL_DESC_REO_NON_QOS_TID)
1050 hw_desc_sz = ath11k_hal_reo_qdesc_size(ba_win_sz, tid);
1052 hw_desc_sz = ath11k_hal_reo_qdesc_size(DP_BA_WIN_SZ_MAX, tid);
1054 vaddr = kzalloc(hw_desc_sz + HAL_LINK_DESC_ALIGN - 1, GFP_ATOMIC);
1056 spin_unlock_bh(&ab->base_lock);
1060 addr_aligned = PTR_ALIGN(vaddr, HAL_LINK_DESC_ALIGN);
1062 ath11k_hal_reo_qdesc_setup(addr_aligned, tid, ba_win_sz,
1065 paddr = dma_map_single(ab->dev, addr_aligned, hw_desc_sz,
1068 ret = dma_mapping_error(ab->dev, paddr);
1070 spin_unlock_bh(&ab->base_lock);
1074 rx_tid->vaddr = vaddr;
1075 rx_tid->paddr = paddr;
1076 rx_tid->size = hw_desc_sz;
1077 rx_tid->active = true;
1079 spin_unlock_bh(&ab->base_lock);
1081 ret = ath11k_wmi_peer_rx_reorder_queue_setup(ar, vdev_id, peer_mac,
1082 paddr, tid, 1, ba_win_sz);
1084 ath11k_warn(ar->ab, "failed to setup rx reorder queue, tid :%d (%d)\n",
1086 ath11k_dp_rx_tid_mem_free(ab, peer_mac, vdev_id, tid);
1097 int ath11k_dp_rx_ampdu_start(struct ath11k *ar,
1098 struct ieee80211_ampdu_params *params)
1100 struct ath11k_base *ab = ar->ab;
1101 struct ath11k_sta *arsta = (void *)params->sta->drv_priv;
1102 int vdev_id = arsta->arvif->vdev_id;
1105 ret = ath11k_peer_rx_tid_setup(ar, params->sta->addr, vdev_id,
1106 params->tid, params->buf_size,
1107 params->ssn, arsta->pn_type);
1109 ath11k_warn(ab, "failed to setup rx tid %d\n", ret);
1114 int ath11k_dp_rx_ampdu_stop(struct ath11k *ar,
1115 struct ieee80211_ampdu_params *params)
1117 struct ath11k_base *ab = ar->ab;
1118 struct ath11k_peer *peer;
1119 struct ath11k_sta *arsta = (void *)params->sta->drv_priv;
1120 int vdev_id = arsta->arvif->vdev_id;
1125 spin_lock_bh(&ab->base_lock);
1127 peer = ath11k_peer_find(ab, vdev_id, params->sta->addr);
1129 ath11k_warn(ab, "failed to find the peer to stop rx aggregation\n");
1130 spin_unlock_bh(&ab->base_lock);
1134 paddr = peer->rx_tid[params->tid].paddr;
1135 active = peer->rx_tid[params->tid].active;
1138 spin_unlock_bh(&ab->base_lock);
1142 ret = ath11k_peer_rx_tid_reo_update(ar, peer, peer->rx_tid, 1, 0, false);
1143 spin_unlock_bh(&ab->base_lock);
1145 ath11k_warn(ab, "failed to update reo for rx tid %d: %d\n",
1150 ret = ath11k_wmi_peer_rx_reorder_queue_setup(ar, vdev_id,
1151 params->sta->addr, paddr,
1154 ath11k_warn(ab, "failed to send wmi to delete rx tid %d\n",
1160 int ath11k_dp_peer_rx_pn_replay_config(struct ath11k_vif *arvif,
1161 const u8 *peer_addr,
1162 enum set_key_cmd key_cmd,
1163 struct ieee80211_key_conf *key)
1165 struct ath11k *ar = arvif->ar;
1166 struct ath11k_base *ab = ar->ab;
1167 struct ath11k_hal_reo_cmd cmd = {0};
1168 struct ath11k_peer *peer;
1169 struct dp_rx_tid *rx_tid;
1173 /* NOTE: Enable PN/TSC replay check offload only for unicast frames.
1174 * We use mac80211 PN/TSC replay check functionality for bcast/mcast
1177 if (!(key->flags & IEEE80211_KEY_FLAG_PAIRWISE))
1180 cmd.flag |= HAL_REO_CMD_FLG_NEED_STATUS;
1181 cmd.upd0 |= HAL_REO_CMD_UPD0_PN |
1182 HAL_REO_CMD_UPD0_PN_SIZE |
1183 HAL_REO_CMD_UPD0_PN_VALID |
1184 HAL_REO_CMD_UPD0_PN_CHECK |
1185 HAL_REO_CMD_UPD0_SVLD;
1187 switch (key->cipher) {
1188 case WLAN_CIPHER_SUITE_TKIP:
1189 case WLAN_CIPHER_SUITE_CCMP:
1190 case WLAN_CIPHER_SUITE_CCMP_256:
1191 case WLAN_CIPHER_SUITE_GCMP:
1192 case WLAN_CIPHER_SUITE_GCMP_256:
1193 if (key_cmd == SET_KEY) {
1194 cmd.upd1 |= HAL_REO_CMD_UPD1_PN_CHECK;
1202 spin_lock_bh(&ab->base_lock);
1204 peer = ath11k_peer_find(ab, arvif->vdev_id, peer_addr);
1206 ath11k_warn(ab, "failed to find the peer to configure pn replay detection\n");
1207 spin_unlock_bh(&ab->base_lock);
1211 for (tid = 0; tid <= IEEE80211_NUM_TIDS; tid++) {
1212 rx_tid = &peer->rx_tid[tid];
1213 if (!rx_tid->active)
1215 cmd.addr_lo = lower_32_bits(rx_tid->paddr);
1216 cmd.addr_hi = upper_32_bits(rx_tid->paddr);
1217 ret = ath11k_dp_tx_send_reo_cmd(ab, rx_tid,
1218 HAL_REO_CMD_UPDATE_RX_QUEUE,
1221 ath11k_warn(ab, "failed to configure rx tid %d queue for pn replay detection %d\n",
1227 spin_unlock_bh(&ab->base_lock);
1232 static inline int ath11k_get_ppdu_user_index(struct htt_ppdu_stats *ppdu_stats,
1237 for (i = 0; i < HTT_PPDU_STATS_MAX_USERS - 1; i++) {
1238 if (ppdu_stats->user_stats[i].is_valid_peer_id) {
1239 if (peer_id == ppdu_stats->user_stats[i].peer_id)
1249 static int ath11k_htt_tlv_ppdu_stats_parse(struct ath11k_base *ab,
1250 u16 tag, u16 len, const void *ptr,
1253 struct htt_ppdu_stats_info *ppdu_info;
1254 struct htt_ppdu_user_stats *user_stats;
1258 ppdu_info = (struct htt_ppdu_stats_info *)data;
1261 case HTT_PPDU_STATS_TAG_COMMON:
1262 if (len < sizeof(struct htt_ppdu_stats_common)) {
1263 ath11k_warn(ab, "Invalid len %d for the tag 0x%x\n",
1267 memcpy((void *)&ppdu_info->ppdu_stats.common, ptr,
1268 sizeof(struct htt_ppdu_stats_common));
1270 case HTT_PPDU_STATS_TAG_USR_RATE:
1271 if (len < sizeof(struct htt_ppdu_stats_user_rate)) {
1272 ath11k_warn(ab, "Invalid len %d for the tag 0x%x\n",
1277 peer_id = ((struct htt_ppdu_stats_user_rate *)ptr)->sw_peer_id;
1278 cur_user = ath11k_get_ppdu_user_index(&ppdu_info->ppdu_stats,
1282 user_stats = &ppdu_info->ppdu_stats.user_stats[cur_user];
1283 user_stats->peer_id = peer_id;
1284 user_stats->is_valid_peer_id = true;
1285 memcpy((void *)&user_stats->rate, ptr,
1286 sizeof(struct htt_ppdu_stats_user_rate));
1287 user_stats->tlv_flags |= BIT(tag);
1289 case HTT_PPDU_STATS_TAG_USR_COMPLTN_COMMON:
1290 if (len < sizeof(struct htt_ppdu_stats_usr_cmpltn_cmn)) {
1291 ath11k_warn(ab, "Invalid len %d for the tag 0x%x\n",
1296 peer_id = ((struct htt_ppdu_stats_usr_cmpltn_cmn *)ptr)->sw_peer_id;
1297 cur_user = ath11k_get_ppdu_user_index(&ppdu_info->ppdu_stats,
1301 user_stats = &ppdu_info->ppdu_stats.user_stats[cur_user];
1302 user_stats->peer_id = peer_id;
1303 user_stats->is_valid_peer_id = true;
1304 memcpy((void *)&user_stats->cmpltn_cmn, ptr,
1305 sizeof(struct htt_ppdu_stats_usr_cmpltn_cmn));
1306 user_stats->tlv_flags |= BIT(tag);
1308 case HTT_PPDU_STATS_TAG_USR_COMPLTN_ACK_BA_STATUS:
1310 sizeof(struct htt_ppdu_stats_usr_cmpltn_ack_ba_status)) {
1311 ath11k_warn(ab, "Invalid len %d for the tag 0x%x\n",
1317 ((struct htt_ppdu_stats_usr_cmpltn_ack_ba_status *)ptr)->sw_peer_id;
1318 cur_user = ath11k_get_ppdu_user_index(&ppdu_info->ppdu_stats,
1322 user_stats = &ppdu_info->ppdu_stats.user_stats[cur_user];
1323 user_stats->peer_id = peer_id;
1324 user_stats->is_valid_peer_id = true;
1325 memcpy((void *)&user_stats->ack_ba, ptr,
1326 sizeof(struct htt_ppdu_stats_usr_cmpltn_ack_ba_status));
1327 user_stats->tlv_flags |= BIT(tag);
1333 int ath11k_dp_htt_tlv_iter(struct ath11k_base *ab, const void *ptr, size_t len,
1334 int (*iter)(struct ath11k_base *ar, u16 tag, u16 len,
1335 const void *ptr, void *data),
1338 const struct htt_tlv *tlv;
1339 const void *begin = ptr;
1340 u16 tlv_tag, tlv_len;
1344 if (len < sizeof(*tlv)) {
1345 ath11k_err(ab, "htt tlv parse failure at byte %zd (%zu bytes left, %zu expected)\n",
1346 ptr - begin, len, sizeof(*tlv));
1349 tlv = (struct htt_tlv *)ptr;
1350 tlv_tag = FIELD_GET(HTT_TLV_TAG, tlv->header);
1351 tlv_len = FIELD_GET(HTT_TLV_LEN, tlv->header);
1352 ptr += sizeof(*tlv);
1353 len -= sizeof(*tlv);
1355 if (tlv_len > len) {
1356 ath11k_err(ab, "htt tlv parse failure of tag %u at byte %zd (%zu bytes left, %u expected)\n",
1357 tlv_tag, ptr - begin, len, tlv_len);
1360 ret = iter(ab, tlv_tag, tlv_len, ptr, data);
1371 ath11k_update_per_peer_tx_stats(struct ath11k *ar,
1372 struct htt_ppdu_stats *ppdu_stats, u8 user)
1374 struct ath11k_base *ab = ar->ab;
1375 struct ath11k_peer *peer;
1376 struct ieee80211_sta *sta;
1377 struct ath11k_sta *arsta;
1378 struct htt_ppdu_stats_user_rate *user_rate;
1379 struct ath11k_per_peer_tx_stats *peer_stats = &ar->peer_tx_stats;
1380 struct htt_ppdu_user_stats *usr_stats = &ppdu_stats->user_stats[user];
1381 struct htt_ppdu_stats_common *common = &ppdu_stats->common;
1383 u8 flags, mcs, nss, bw, sgi, dcm, rate_idx = 0;
1385 u16 rate = 0, succ_pkts = 0;
1386 u32 tx_duration = 0;
1387 u8 tid = HTT_PPDU_STATS_NON_QOS_TID;
1388 bool is_ampdu = false;
1393 if (!(usr_stats->tlv_flags & BIT(HTT_PPDU_STATS_TAG_USR_RATE)))
1396 if (usr_stats->tlv_flags & BIT(HTT_PPDU_STATS_TAG_USR_COMPLTN_COMMON))
1398 HTT_USR_CMPLTN_IS_AMPDU(usr_stats->cmpltn_cmn.flags);
1400 if (usr_stats->tlv_flags &
1401 BIT(HTT_PPDU_STATS_TAG_USR_COMPLTN_ACK_BA_STATUS)) {
1402 succ_bytes = usr_stats->ack_ba.success_bytes;
1403 succ_pkts = FIELD_GET(HTT_PPDU_STATS_ACK_BA_INFO_NUM_MSDU_M,
1404 usr_stats->ack_ba.info);
1405 tid = FIELD_GET(HTT_PPDU_STATS_ACK_BA_INFO_TID_NUM,
1406 usr_stats->ack_ba.info);
1409 if (common->fes_duration_us)
1410 tx_duration = common->fes_duration_us;
1412 user_rate = &usr_stats->rate;
1413 flags = HTT_USR_RATE_PREAMBLE(user_rate->rate_flags);
1414 bw = HTT_USR_RATE_BW(user_rate->rate_flags) - 2;
1415 nss = HTT_USR_RATE_NSS(user_rate->rate_flags) + 1;
1416 mcs = HTT_USR_RATE_MCS(user_rate->rate_flags);
1417 sgi = HTT_USR_RATE_GI(user_rate->rate_flags);
1418 dcm = HTT_USR_RATE_DCM(user_rate->rate_flags);
1420 /* Note: If host configured fixed rates and in some other special
1421 * cases, the broadcast/management frames are sent in different rates.
1422 * Firmware rate's control to be skipped for this?
1425 if (flags == WMI_RATE_PREAMBLE_HE && mcs > ATH11K_HE_MCS_MAX) {
1426 ath11k_warn(ab, "Invalid HE mcs %d peer stats", mcs);
1430 if (flags == WMI_RATE_PREAMBLE_VHT && mcs > ATH11K_VHT_MCS_MAX) {
1431 ath11k_warn(ab, "Invalid VHT mcs %d peer stats", mcs);
1435 if (flags == WMI_RATE_PREAMBLE_HT && (mcs > ATH11K_HT_MCS_MAX || nss < 1)) {
1436 ath11k_warn(ab, "Invalid HT mcs %d nss %d peer stats",
1441 if (flags == WMI_RATE_PREAMBLE_CCK || flags == WMI_RATE_PREAMBLE_OFDM) {
1442 ret = ath11k_mac_hw_ratecode_to_legacy_rate(mcs,
1451 spin_lock_bh(&ab->base_lock);
1452 peer = ath11k_peer_find_by_id(ab, usr_stats->peer_id);
1454 if (!peer || !peer->sta) {
1455 spin_unlock_bh(&ab->base_lock);
1461 arsta = (struct ath11k_sta *)sta->drv_priv;
1463 memset(&arsta->txrate, 0, sizeof(arsta->txrate));
1466 case WMI_RATE_PREAMBLE_OFDM:
1467 arsta->txrate.legacy = rate;
1469 case WMI_RATE_PREAMBLE_CCK:
1470 arsta->txrate.legacy = rate;
1472 case WMI_RATE_PREAMBLE_HT:
1473 arsta->txrate.mcs = mcs + 8 * (nss - 1);
1474 arsta->txrate.flags = RATE_INFO_FLAGS_MCS;
1476 arsta->txrate.flags |= RATE_INFO_FLAGS_SHORT_GI;
1478 case WMI_RATE_PREAMBLE_VHT:
1479 arsta->txrate.mcs = mcs;
1480 arsta->txrate.flags = RATE_INFO_FLAGS_VHT_MCS;
1482 arsta->txrate.flags |= RATE_INFO_FLAGS_SHORT_GI;
1484 case WMI_RATE_PREAMBLE_HE:
1485 arsta->txrate.mcs = mcs;
1486 arsta->txrate.flags = RATE_INFO_FLAGS_HE_MCS;
1487 arsta->txrate.he_dcm = dcm;
1488 arsta->txrate.he_gi = ath11k_mac_he_gi_to_nl80211_he_gi(sgi);
1489 arsta->txrate.he_ru_alloc = ath11k_mac_phy_he_ru_to_nl80211_he_ru_alloc
1490 ((user_rate->ru_end -
1491 user_rate->ru_start) + 1);
1495 arsta->txrate.nss = nss;
1497 arsta->txrate.bw = ath11k_mac_bw_to_mac80211_bw(bw);
1498 arsta->tx_duration += tx_duration;
1499 memcpy(&arsta->last_txrate, &arsta->txrate, sizeof(struct rate_info));
1501 /* PPDU stats reported for mgmt packet doesn't have valid tx bytes.
1502 * So skip peer stats update for mgmt packets.
1504 if (tid < HTT_PPDU_STATS_NON_QOS_TID) {
1505 memset(peer_stats, 0, sizeof(*peer_stats));
1506 peer_stats->succ_pkts = succ_pkts;
1507 peer_stats->succ_bytes = succ_bytes;
1508 peer_stats->is_ampdu = is_ampdu;
1509 peer_stats->duration = tx_duration;
1510 peer_stats->ba_fails =
1511 HTT_USR_CMPLTN_LONG_RETRY(usr_stats->cmpltn_cmn.flags) +
1512 HTT_USR_CMPLTN_SHORT_RETRY(usr_stats->cmpltn_cmn.flags);
1514 if (ath11k_debugfs_is_extd_tx_stats_enabled(ar))
1515 ath11k_debugfs_sta_add_tx_stats(arsta, peer_stats, rate_idx);
1518 spin_unlock_bh(&ab->base_lock);
1522 static void ath11k_htt_update_ppdu_stats(struct ath11k *ar,
1523 struct htt_ppdu_stats *ppdu_stats)
1527 for (user = 0; user < HTT_PPDU_STATS_MAX_USERS - 1; user++)
1528 ath11k_update_per_peer_tx_stats(ar, ppdu_stats, user);
1532 struct htt_ppdu_stats_info *ath11k_dp_htt_get_ppdu_desc(struct ath11k *ar,
1535 struct htt_ppdu_stats_info *ppdu_info;
1537 spin_lock_bh(&ar->data_lock);
1538 if (!list_empty(&ar->ppdu_stats_info)) {
1539 list_for_each_entry(ppdu_info, &ar->ppdu_stats_info, list) {
1540 if (ppdu_info->ppdu_id == ppdu_id) {
1541 spin_unlock_bh(&ar->data_lock);
1546 if (ar->ppdu_stat_list_depth > HTT_PPDU_DESC_MAX_DEPTH) {
1547 ppdu_info = list_first_entry(&ar->ppdu_stats_info,
1548 typeof(*ppdu_info), list);
1549 list_del(&ppdu_info->list);
1550 ar->ppdu_stat_list_depth--;
1551 ath11k_htt_update_ppdu_stats(ar, &ppdu_info->ppdu_stats);
1555 spin_unlock_bh(&ar->data_lock);
1557 ppdu_info = kzalloc(sizeof(*ppdu_info), GFP_ATOMIC);
1561 spin_lock_bh(&ar->data_lock);
1562 list_add_tail(&ppdu_info->list, &ar->ppdu_stats_info);
1563 ar->ppdu_stat_list_depth++;
1564 spin_unlock_bh(&ar->data_lock);
1569 static int ath11k_htt_pull_ppdu_stats(struct ath11k_base *ab,
1570 struct sk_buff *skb)
1572 struct ath11k_htt_ppdu_stats_msg *msg;
1573 struct htt_ppdu_stats_info *ppdu_info;
1579 msg = (struct ath11k_htt_ppdu_stats_msg *)skb->data;
1580 len = FIELD_GET(HTT_T2H_PPDU_STATS_INFO_PAYLOAD_SIZE, msg->info);
1581 pdev_id = FIELD_GET(HTT_T2H_PPDU_STATS_INFO_PDEV_ID, msg->info);
1582 ppdu_id = msg->ppdu_id;
1585 ar = ath11k_mac_get_ar_by_pdev_id(ab, pdev_id);
1591 if (ath11k_debugfs_is_pktlog_lite_mode_enabled(ar))
1592 trace_ath11k_htt_ppdu_stats(ar, skb->data, len);
1594 ppdu_info = ath11k_dp_htt_get_ppdu_desc(ar, ppdu_id);
1600 ppdu_info->ppdu_id = ppdu_id;
1601 ret = ath11k_dp_htt_tlv_iter(ab, msg->data, len,
1602 ath11k_htt_tlv_ppdu_stats_parse,
1605 ath11k_warn(ab, "Failed to parse tlv %d\n", ret);
1615 static void ath11k_htt_pktlog(struct ath11k_base *ab, struct sk_buff *skb)
1617 struct htt_pktlog_msg *data = (struct htt_pktlog_msg *)skb->data;
1618 struct ath_pktlog_hdr *hdr = (struct ath_pktlog_hdr *)data;
1622 pdev_id = FIELD_GET(HTT_T2H_PPDU_STATS_INFO_PDEV_ID, data->hdr);
1623 ar = ath11k_mac_get_ar_by_pdev_id(ab, pdev_id);
1625 ath11k_warn(ab, "invalid pdev id %d on htt pktlog\n", pdev_id);
1629 trace_ath11k_htt_pktlog(ar, data->payload, hdr->size,
1630 ar->ab->pktlog_defs_checksum);
1633 static void ath11k_htt_backpressure_event_handler(struct ath11k_base *ab,
1634 struct sk_buff *skb)
1636 u32 *data = (u32 *)skb->data;
1637 u8 pdev_id, ring_type, ring_id, pdev_idx;
1639 u32 backpressure_time;
1640 struct ath11k_bp_stats *bp_stats;
1642 pdev_id = FIELD_GET(HTT_BACKPRESSURE_EVENT_PDEV_ID_M, *data);
1643 ring_type = FIELD_GET(HTT_BACKPRESSURE_EVENT_RING_TYPE_M, *data);
1644 ring_id = FIELD_GET(HTT_BACKPRESSURE_EVENT_RING_ID_M, *data);
1647 hp = FIELD_GET(HTT_BACKPRESSURE_EVENT_HP_M, *data);
1648 tp = FIELD_GET(HTT_BACKPRESSURE_EVENT_TP_M, *data);
1651 backpressure_time = *data;
1653 ath11k_dbg(ab, ATH11K_DBG_DP_HTT, "htt backpressure event, pdev %d, ring type %d,ring id %d, hp %d tp %d, backpressure time %d\n",
1654 pdev_id, ring_type, ring_id, hp, tp, backpressure_time);
1656 if (ring_type == HTT_BACKPRESSURE_UMAC_RING_TYPE) {
1657 if (ring_id >= HTT_SW_UMAC_RING_IDX_MAX)
1660 bp_stats = &ab->soc_stats.bp_stats.umac_ring_bp_stats[ring_id];
1661 } else if (ring_type == HTT_BACKPRESSURE_LMAC_RING_TYPE) {
1662 pdev_idx = DP_HW2SW_MACID(pdev_id);
1664 if (ring_id >= HTT_SW_LMAC_RING_IDX_MAX || pdev_idx >= MAX_RADIOS)
1667 bp_stats = &ab->soc_stats.bp_stats.lmac_ring_bp_stats[ring_id][pdev_idx];
1669 ath11k_warn(ab, "unknown ring type received in htt bp event %d\n",
1674 spin_lock_bh(&ab->base_lock);
1678 bp_stats->jiffies = jiffies;
1679 spin_unlock_bh(&ab->base_lock);
1682 void ath11k_dp_htt_htc_t2h_msg_handler(struct ath11k_base *ab,
1683 struct sk_buff *skb)
1685 struct ath11k_dp *dp = &ab->dp;
1686 struct htt_resp_msg *resp = (struct htt_resp_msg *)skb->data;
1687 enum htt_t2h_msg_type type = FIELD_GET(HTT_T2H_MSG_TYPE, *(u32 *)resp);
1690 u8 mac_addr[ETH_ALEN];
1695 ath11k_dbg(ab, ATH11K_DBG_DP_HTT, "dp_htt rx msg type :0x%0x\n", type);
1698 case HTT_T2H_MSG_TYPE_VERSION_CONF:
1699 dp->htt_tgt_ver_major = FIELD_GET(HTT_T2H_VERSION_CONF_MAJOR,
1700 resp->version_msg.version);
1701 dp->htt_tgt_ver_minor = FIELD_GET(HTT_T2H_VERSION_CONF_MINOR,
1702 resp->version_msg.version);
1703 complete(&dp->htt_tgt_version_received);
1705 case HTT_T2H_MSG_TYPE_PEER_MAP:
1706 vdev_id = FIELD_GET(HTT_T2H_PEER_MAP_INFO_VDEV_ID,
1707 resp->peer_map_ev.info);
1708 peer_id = FIELD_GET(HTT_T2H_PEER_MAP_INFO_PEER_ID,
1709 resp->peer_map_ev.info);
1710 peer_mac_h16 = FIELD_GET(HTT_T2H_PEER_MAP_INFO1_MAC_ADDR_H16,
1711 resp->peer_map_ev.info1);
1712 ath11k_dp_get_mac_addr(resp->peer_map_ev.mac_addr_l32,
1713 peer_mac_h16, mac_addr);
1714 ath11k_peer_map_event(ab, vdev_id, peer_id, mac_addr, 0, 0);
1716 case HTT_T2H_MSG_TYPE_PEER_MAP2:
1717 vdev_id = FIELD_GET(HTT_T2H_PEER_MAP_INFO_VDEV_ID,
1718 resp->peer_map_ev.info);
1719 peer_id = FIELD_GET(HTT_T2H_PEER_MAP_INFO_PEER_ID,
1720 resp->peer_map_ev.info);
1721 peer_mac_h16 = FIELD_GET(HTT_T2H_PEER_MAP_INFO1_MAC_ADDR_H16,
1722 resp->peer_map_ev.info1);
1723 ath11k_dp_get_mac_addr(resp->peer_map_ev.mac_addr_l32,
1724 peer_mac_h16, mac_addr);
1725 ast_hash = FIELD_GET(HTT_T2H_PEER_MAP_INFO2_AST_HASH_VAL,
1726 resp->peer_map_ev.info2);
1727 hw_peer_id = FIELD_GET(HTT_T2H_PEER_MAP_INFO1_HW_PEER_ID,
1728 resp->peer_map_ev.info1);
1729 ath11k_peer_map_event(ab, vdev_id, peer_id, mac_addr, ast_hash,
1732 case HTT_T2H_MSG_TYPE_PEER_UNMAP:
1733 case HTT_T2H_MSG_TYPE_PEER_UNMAP2:
1734 peer_id = FIELD_GET(HTT_T2H_PEER_UNMAP_INFO_PEER_ID,
1735 resp->peer_unmap_ev.info);
1736 ath11k_peer_unmap_event(ab, peer_id);
1738 case HTT_T2H_MSG_TYPE_PPDU_STATS_IND:
1739 ath11k_htt_pull_ppdu_stats(ab, skb);
1741 case HTT_T2H_MSG_TYPE_EXT_STATS_CONF:
1742 ath11k_debugfs_htt_ext_stats_handler(ab, skb);
1744 case HTT_T2H_MSG_TYPE_PKTLOG:
1745 ath11k_htt_pktlog(ab, skb);
1747 case HTT_T2H_MSG_TYPE_BKPRESSURE_EVENT_IND:
1748 ath11k_htt_backpressure_event_handler(ab, skb);
1751 ath11k_warn(ab, "htt event %d not handled\n", type);
1755 dev_kfree_skb_any(skb);
1758 static int ath11k_dp_rx_msdu_coalesce(struct ath11k *ar,
1759 struct sk_buff_head *msdu_list,
1760 struct sk_buff *first, struct sk_buff *last,
1761 u8 l3pad_bytes, int msdu_len)
1763 struct ath11k_base *ab = ar->ab;
1764 struct sk_buff *skb;
1765 struct ath11k_skb_rxcb *rxcb = ATH11K_SKB_RXCB(first);
1766 int buf_first_hdr_len, buf_first_len;
1767 struct hal_rx_desc *ldesc;
1768 int space_extra, rem_len, buf_len;
1769 u32 hal_rx_desc_sz = ar->ab->hw_params.hal_desc_sz;
1771 /* As the msdu is spread across multiple rx buffers,
1772 * find the offset to the start of msdu for computing
1773 * the length of the msdu in the first buffer.
1775 buf_first_hdr_len = hal_rx_desc_sz + l3pad_bytes;
1776 buf_first_len = DP_RX_BUFFER_SIZE - buf_first_hdr_len;
1778 if (WARN_ON_ONCE(msdu_len <= buf_first_len)) {
1779 skb_put(first, buf_first_hdr_len + msdu_len);
1780 skb_pull(first, buf_first_hdr_len);
1784 ldesc = (struct hal_rx_desc *)last->data;
1785 rxcb->is_first_msdu = ath11k_dp_rx_h_msdu_end_first_msdu(ab, ldesc);
1786 rxcb->is_last_msdu = ath11k_dp_rx_h_msdu_end_last_msdu(ab, ldesc);
1788 /* MSDU spans over multiple buffers because the length of the MSDU
1789 * exceeds DP_RX_BUFFER_SIZE - HAL_RX_DESC_SIZE. So assume the data
1790 * in the first buf is of length DP_RX_BUFFER_SIZE - HAL_RX_DESC_SIZE.
1792 skb_put(first, DP_RX_BUFFER_SIZE);
1793 skb_pull(first, buf_first_hdr_len);
1795 /* When an MSDU spread over multiple buffers attention, MSDU_END and
1796 * MPDU_END tlvs are valid only in the last buffer. Copy those tlvs.
1798 ath11k_dp_rx_desc_end_tlv_copy(ab, rxcb->rx_desc, ldesc);
1800 space_extra = msdu_len - (buf_first_len + skb_tailroom(first));
1801 if (space_extra > 0 &&
1802 (pskb_expand_head(first, 0, space_extra, GFP_ATOMIC) < 0)) {
1803 /* Free up all buffers of the MSDU */
1804 while ((skb = __skb_dequeue(msdu_list)) != NULL) {
1805 rxcb = ATH11K_SKB_RXCB(skb);
1806 if (!rxcb->is_continuation) {
1807 dev_kfree_skb_any(skb);
1810 dev_kfree_skb_any(skb);
1815 rem_len = msdu_len - buf_first_len;
1816 while ((skb = __skb_dequeue(msdu_list)) != NULL && rem_len > 0) {
1817 rxcb = ATH11K_SKB_RXCB(skb);
1818 if (rxcb->is_continuation)
1819 buf_len = DP_RX_BUFFER_SIZE - hal_rx_desc_sz;
1823 if (buf_len > (DP_RX_BUFFER_SIZE - hal_rx_desc_sz)) {
1825 dev_kfree_skb_any(skb);
1829 skb_put(skb, buf_len + hal_rx_desc_sz);
1830 skb_pull(skb, hal_rx_desc_sz);
1831 skb_copy_from_linear_data(skb, skb_put(first, buf_len),
1833 dev_kfree_skb_any(skb);
1836 if (!rxcb->is_continuation)
1843 static struct sk_buff *ath11k_dp_rx_get_msdu_last_buf(struct sk_buff_head *msdu_list,
1844 struct sk_buff *first)
1846 struct sk_buff *skb;
1847 struct ath11k_skb_rxcb *rxcb = ATH11K_SKB_RXCB(first);
1849 if (!rxcb->is_continuation)
1852 skb_queue_walk(msdu_list, skb) {
1853 rxcb = ATH11K_SKB_RXCB(skb);
1854 if (!rxcb->is_continuation)
1861 static void ath11k_dp_rx_h_csum_offload(struct ath11k *ar, struct sk_buff *msdu)
1863 struct ath11k_skb_rxcb *rxcb = ATH11K_SKB_RXCB(msdu);
1864 struct rx_attention *rx_attention;
1865 bool ip_csum_fail, l4_csum_fail;
1867 rx_attention = ath11k_dp_rx_get_attention(ar->ab, rxcb->rx_desc);
1868 ip_csum_fail = ath11k_dp_rx_h_attn_ip_cksum_fail(rx_attention);
1869 l4_csum_fail = ath11k_dp_rx_h_attn_l4_cksum_fail(rx_attention);
1871 msdu->ip_summed = (ip_csum_fail || l4_csum_fail) ?
1872 CHECKSUM_NONE : CHECKSUM_UNNECESSARY;
1875 static int ath11k_dp_rx_crypto_mic_len(struct ath11k *ar,
1876 enum hal_encrypt_type enctype)
1879 case HAL_ENCRYPT_TYPE_OPEN:
1880 case HAL_ENCRYPT_TYPE_TKIP_NO_MIC:
1881 case HAL_ENCRYPT_TYPE_TKIP_MIC:
1883 case HAL_ENCRYPT_TYPE_CCMP_128:
1884 return IEEE80211_CCMP_MIC_LEN;
1885 case HAL_ENCRYPT_TYPE_CCMP_256:
1886 return IEEE80211_CCMP_256_MIC_LEN;
1887 case HAL_ENCRYPT_TYPE_GCMP_128:
1888 case HAL_ENCRYPT_TYPE_AES_GCMP_256:
1889 return IEEE80211_GCMP_MIC_LEN;
1890 case HAL_ENCRYPT_TYPE_WEP_40:
1891 case HAL_ENCRYPT_TYPE_WEP_104:
1892 case HAL_ENCRYPT_TYPE_WEP_128:
1893 case HAL_ENCRYPT_TYPE_WAPI_GCM_SM4:
1894 case HAL_ENCRYPT_TYPE_WAPI:
1898 ath11k_warn(ar->ab, "unsupported encryption type %d for mic len\n", enctype);
1902 static int ath11k_dp_rx_crypto_param_len(struct ath11k *ar,
1903 enum hal_encrypt_type enctype)
1906 case HAL_ENCRYPT_TYPE_OPEN:
1908 case HAL_ENCRYPT_TYPE_TKIP_NO_MIC:
1909 case HAL_ENCRYPT_TYPE_TKIP_MIC:
1910 return IEEE80211_TKIP_IV_LEN;
1911 case HAL_ENCRYPT_TYPE_CCMP_128:
1912 return IEEE80211_CCMP_HDR_LEN;
1913 case HAL_ENCRYPT_TYPE_CCMP_256:
1914 return IEEE80211_CCMP_256_HDR_LEN;
1915 case HAL_ENCRYPT_TYPE_GCMP_128:
1916 case HAL_ENCRYPT_TYPE_AES_GCMP_256:
1917 return IEEE80211_GCMP_HDR_LEN;
1918 case HAL_ENCRYPT_TYPE_WEP_40:
1919 case HAL_ENCRYPT_TYPE_WEP_104:
1920 case HAL_ENCRYPT_TYPE_WEP_128:
1921 case HAL_ENCRYPT_TYPE_WAPI_GCM_SM4:
1922 case HAL_ENCRYPT_TYPE_WAPI:
1926 ath11k_warn(ar->ab, "unsupported encryption type %d\n", enctype);
1930 static int ath11k_dp_rx_crypto_icv_len(struct ath11k *ar,
1931 enum hal_encrypt_type enctype)
1934 case HAL_ENCRYPT_TYPE_OPEN:
1935 case HAL_ENCRYPT_TYPE_CCMP_128:
1936 case HAL_ENCRYPT_TYPE_CCMP_256:
1937 case HAL_ENCRYPT_TYPE_GCMP_128:
1938 case HAL_ENCRYPT_TYPE_AES_GCMP_256:
1940 case HAL_ENCRYPT_TYPE_TKIP_NO_MIC:
1941 case HAL_ENCRYPT_TYPE_TKIP_MIC:
1942 return IEEE80211_TKIP_ICV_LEN;
1943 case HAL_ENCRYPT_TYPE_WEP_40:
1944 case HAL_ENCRYPT_TYPE_WEP_104:
1945 case HAL_ENCRYPT_TYPE_WEP_128:
1946 case HAL_ENCRYPT_TYPE_WAPI_GCM_SM4:
1947 case HAL_ENCRYPT_TYPE_WAPI:
1951 ath11k_warn(ar->ab, "unsupported encryption type %d\n", enctype);
1955 static void ath11k_dp_rx_h_undecap_nwifi(struct ath11k *ar,
1956 struct sk_buff *msdu,
1958 enum hal_encrypt_type enctype,
1959 struct ieee80211_rx_status *status)
1961 struct ath11k_skb_rxcb *rxcb = ATH11K_SKB_RXCB(msdu);
1962 u8 decap_hdr[DP_MAX_NWIFI_HDR_LEN];
1963 struct ieee80211_hdr *hdr;
1970 /* copy SA & DA and pull decapped header */
1971 hdr = (struct ieee80211_hdr *)msdu->data;
1972 hdr_len = ieee80211_hdrlen(hdr->frame_control);
1973 ether_addr_copy(da, ieee80211_get_DA(hdr));
1974 ether_addr_copy(sa, ieee80211_get_SA(hdr));
1975 skb_pull(msdu, ieee80211_hdrlen(hdr->frame_control));
1977 if (rxcb->is_first_msdu) {
1978 /* original 802.11 header is valid for the first msdu
1979 * hence we can reuse the same header
1981 hdr = (struct ieee80211_hdr *)first_hdr;
1982 hdr_len = ieee80211_hdrlen(hdr->frame_control);
1984 /* Each A-MSDU subframe will be reported as a separate MSDU,
1985 * so strip the A-MSDU bit from QoS Ctl.
1987 if (ieee80211_is_data_qos(hdr->frame_control)) {
1988 qos = ieee80211_get_qos_ctl(hdr);
1989 qos[0] &= ~IEEE80211_QOS_CTL_A_MSDU_PRESENT;
1992 /* Rebuild qos header if this is a middle/last msdu */
1993 hdr->frame_control |= __cpu_to_le16(IEEE80211_STYPE_QOS_DATA);
1995 /* Reset the order bit as the HT_Control header is stripped */
1996 hdr->frame_control &= ~(__cpu_to_le16(IEEE80211_FCTL_ORDER));
1998 qos_ctl = rxcb->tid;
2000 if (ath11k_dp_rx_h_msdu_start_mesh_ctl_present(ar->ab, rxcb->rx_desc))
2001 qos_ctl |= IEEE80211_QOS_CTL_MESH_CONTROL_PRESENT;
2003 /* TODO Add other QoS ctl fields when required */
2005 /* copy decap header before overwriting for reuse below */
2006 memcpy(decap_hdr, (uint8_t *)hdr, hdr_len);
2009 if (!(status->flag & RX_FLAG_IV_STRIPPED)) {
2010 memcpy(skb_push(msdu,
2011 ath11k_dp_rx_crypto_param_len(ar, enctype)),
2012 (void *)hdr + hdr_len,
2013 ath11k_dp_rx_crypto_param_len(ar, enctype));
2016 if (!rxcb->is_first_msdu) {
2017 memcpy(skb_push(msdu,
2018 IEEE80211_QOS_CTL_LEN), &qos_ctl,
2019 IEEE80211_QOS_CTL_LEN);
2020 memcpy(skb_push(msdu, hdr_len), decap_hdr, hdr_len);
2024 memcpy(skb_push(msdu, hdr_len), hdr, hdr_len);
2026 /* original 802.11 header has a different DA and in
2027 * case of 4addr it may also have different SA
2029 hdr = (struct ieee80211_hdr *)msdu->data;
2030 ether_addr_copy(ieee80211_get_DA(hdr), da);
2031 ether_addr_copy(ieee80211_get_SA(hdr), sa);
2034 static void ath11k_dp_rx_h_undecap_raw(struct ath11k *ar, struct sk_buff *msdu,
2035 enum hal_encrypt_type enctype,
2036 struct ieee80211_rx_status *status,
2039 struct ath11k_skb_rxcb *rxcb = ATH11K_SKB_RXCB(msdu);
2040 struct ieee80211_hdr *hdr;
2044 if (!rxcb->is_first_msdu ||
2045 !(rxcb->is_first_msdu && rxcb->is_last_msdu)) {
2050 skb_trim(msdu, msdu->len - FCS_LEN);
2055 hdr = (void *)msdu->data;
2058 if (status->flag & RX_FLAG_IV_STRIPPED) {
2059 skb_trim(msdu, msdu->len -
2060 ath11k_dp_rx_crypto_mic_len(ar, enctype));
2062 skb_trim(msdu, msdu->len -
2063 ath11k_dp_rx_crypto_icv_len(ar, enctype));
2066 if (status->flag & RX_FLAG_MIC_STRIPPED)
2067 skb_trim(msdu, msdu->len -
2068 ath11k_dp_rx_crypto_mic_len(ar, enctype));
2071 if (status->flag & RX_FLAG_ICV_STRIPPED)
2072 skb_trim(msdu, msdu->len -
2073 ath11k_dp_rx_crypto_icv_len(ar, enctype));
2077 if ((status->flag & RX_FLAG_MMIC_STRIPPED) &&
2078 !ieee80211_has_morefrags(hdr->frame_control) &&
2079 enctype == HAL_ENCRYPT_TYPE_TKIP_MIC)
2080 skb_trim(msdu, msdu->len - IEEE80211_CCMP_MIC_LEN);
2083 if (status->flag & RX_FLAG_IV_STRIPPED) {
2084 hdr_len = ieee80211_hdrlen(hdr->frame_control);
2085 crypto_len = ath11k_dp_rx_crypto_param_len(ar, enctype);
2087 memmove((void *)msdu->data + crypto_len,
2088 (void *)msdu->data, hdr_len);
2089 skb_pull(msdu, crypto_len);
2093 static void *ath11k_dp_rx_h_find_rfc1042(struct ath11k *ar,
2094 struct sk_buff *msdu,
2095 enum hal_encrypt_type enctype)
2097 struct ath11k_skb_rxcb *rxcb = ATH11K_SKB_RXCB(msdu);
2098 struct ieee80211_hdr *hdr;
2099 size_t hdr_len, crypto_len;
2103 is_amsdu = !(rxcb->is_first_msdu && rxcb->is_last_msdu);
2104 hdr = (struct ieee80211_hdr *)ath11k_dp_rx_h_80211_hdr(ar->ab, rxcb->rx_desc);
2107 if (rxcb->is_first_msdu) {
2108 hdr_len = ieee80211_hdrlen(hdr->frame_control);
2109 crypto_len = ath11k_dp_rx_crypto_param_len(ar, enctype);
2111 rfc1042 += hdr_len + crypto_len;
2115 rfc1042 += sizeof(struct ath11k_dp_amsdu_subframe_hdr);
2120 static void ath11k_dp_rx_h_undecap_eth(struct ath11k *ar,
2121 struct sk_buff *msdu,
2123 enum hal_encrypt_type enctype,
2124 struct ieee80211_rx_status *status)
2126 struct ieee80211_hdr *hdr;
2133 rfc1042 = ath11k_dp_rx_h_find_rfc1042(ar, msdu, enctype);
2134 if (WARN_ON_ONCE(!rfc1042))
2137 /* pull decapped header and copy SA & DA */
2138 eth = (struct ethhdr *)msdu->data;
2139 ether_addr_copy(da, eth->h_dest);
2140 ether_addr_copy(sa, eth->h_source);
2141 skb_pull(msdu, sizeof(struct ethhdr));
2143 /* push rfc1042/llc/snap */
2144 memcpy(skb_push(msdu, sizeof(struct ath11k_dp_rfc1042_hdr)), rfc1042,
2145 sizeof(struct ath11k_dp_rfc1042_hdr));
2147 /* push original 802.11 header */
2148 hdr = (struct ieee80211_hdr *)first_hdr;
2149 hdr_len = ieee80211_hdrlen(hdr->frame_control);
2151 if (!(status->flag & RX_FLAG_IV_STRIPPED)) {
2152 memcpy(skb_push(msdu,
2153 ath11k_dp_rx_crypto_param_len(ar, enctype)),
2154 (void *)hdr + hdr_len,
2155 ath11k_dp_rx_crypto_param_len(ar, enctype));
2158 memcpy(skb_push(msdu, hdr_len), hdr, hdr_len);
2160 /* original 802.11 header has a different DA and in
2161 * case of 4addr it may also have different SA
2163 hdr = (struct ieee80211_hdr *)msdu->data;
2164 ether_addr_copy(ieee80211_get_DA(hdr), da);
2165 ether_addr_copy(ieee80211_get_SA(hdr), sa);
2168 static void ath11k_dp_rx_h_undecap(struct ath11k *ar, struct sk_buff *msdu,
2169 struct hal_rx_desc *rx_desc,
2170 enum hal_encrypt_type enctype,
2171 struct ieee80211_rx_status *status,
2176 struct ethhdr *ehdr;
2178 first_hdr = ath11k_dp_rx_h_80211_hdr(ar->ab, rx_desc);
2179 decap = ath11k_dp_rx_h_msdu_start_decap_type(ar->ab, rx_desc);
2182 case DP_RX_DECAP_TYPE_NATIVE_WIFI:
2183 ath11k_dp_rx_h_undecap_nwifi(ar, msdu, first_hdr,
2186 case DP_RX_DECAP_TYPE_RAW:
2187 ath11k_dp_rx_h_undecap_raw(ar, msdu, enctype, status,
2190 case DP_RX_DECAP_TYPE_ETHERNET2_DIX:
2191 ehdr = (struct ethhdr *)msdu->data;
2193 /* mac80211 allows fast path only for authorized STA */
2194 if (ehdr->h_proto == cpu_to_be16(ETH_P_PAE)) {
2195 ATH11K_SKB_RXCB(msdu)->is_eapol = true;
2196 ath11k_dp_rx_h_undecap_eth(ar, msdu, first_hdr,
2201 /* PN for mcast packets will be validated in mac80211;
2202 * remove eth header and add 802.11 header.
2204 if (ATH11K_SKB_RXCB(msdu)->is_mcbc && decrypted)
2205 ath11k_dp_rx_h_undecap_eth(ar, msdu, first_hdr,
2208 case DP_RX_DECAP_TYPE_8023:
2209 /* TODO: Handle undecap for these formats */
2214 static struct ath11k_peer *
2215 ath11k_dp_rx_h_find_peer(struct ath11k_base *ab, struct sk_buff *msdu)
2217 struct ath11k_skb_rxcb *rxcb = ATH11K_SKB_RXCB(msdu);
2218 struct hal_rx_desc *rx_desc = rxcb->rx_desc;
2219 struct ath11k_peer *peer = NULL;
2221 lockdep_assert_held(&ab->base_lock);
2224 peer = ath11k_peer_find_by_id(ab, rxcb->peer_id);
2229 if (!rx_desc || !(ath11k_dp_rxdesc_mac_addr2_valid(ab, rx_desc)))
2232 peer = ath11k_peer_find_by_addr(ab,
2233 ath11k_dp_rxdesc_mpdu_start_addr2(ab, rx_desc));
2237 static void ath11k_dp_rx_h_mpdu(struct ath11k *ar,
2238 struct sk_buff *msdu,
2239 struct hal_rx_desc *rx_desc,
2240 struct ieee80211_rx_status *rx_status)
2242 bool fill_crypto_hdr;
2243 enum hal_encrypt_type enctype;
2244 bool is_decrypted = false;
2245 struct ath11k_skb_rxcb *rxcb;
2246 struct ieee80211_hdr *hdr;
2247 struct ath11k_peer *peer;
2248 struct rx_attention *rx_attention;
2251 /* PN for multicast packets will be checked in mac80211 */
2252 rxcb = ATH11K_SKB_RXCB(msdu);
2253 fill_crypto_hdr = ath11k_dp_rx_h_attn_is_mcbc(ar->ab, rx_desc);
2254 rxcb->is_mcbc = fill_crypto_hdr;
2256 if (rxcb->is_mcbc) {
2257 rxcb->peer_id = ath11k_dp_rx_h_mpdu_start_peer_id(ar->ab, rx_desc);
2258 rxcb->seq_no = ath11k_dp_rx_h_mpdu_start_seq_no(ar->ab, rx_desc);
2261 spin_lock_bh(&ar->ab->base_lock);
2262 peer = ath11k_dp_rx_h_find_peer(ar->ab, msdu);
2265 enctype = peer->sec_type_grp;
2267 enctype = peer->sec_type;
2269 enctype = ath11k_dp_rx_h_mpdu_start_enctype(ar->ab, rx_desc);
2271 spin_unlock_bh(&ar->ab->base_lock);
2273 rx_attention = ath11k_dp_rx_get_attention(ar->ab, rx_desc);
2274 err_bitmap = ath11k_dp_rx_h_attn_mpdu_err(rx_attention);
2275 if (enctype != HAL_ENCRYPT_TYPE_OPEN && !err_bitmap)
2276 is_decrypted = ath11k_dp_rx_h_attn_is_decrypted(rx_attention);
2278 /* Clear per-MPDU flags while leaving per-PPDU flags intact */
2279 rx_status->flag &= ~(RX_FLAG_FAILED_FCS_CRC |
2280 RX_FLAG_MMIC_ERROR |
2282 RX_FLAG_IV_STRIPPED |
2283 RX_FLAG_MMIC_STRIPPED);
2285 if (err_bitmap & DP_RX_MPDU_ERR_FCS)
2286 rx_status->flag |= RX_FLAG_FAILED_FCS_CRC;
2287 if (err_bitmap & DP_RX_MPDU_ERR_TKIP_MIC)
2288 rx_status->flag |= RX_FLAG_MMIC_ERROR;
2291 rx_status->flag |= RX_FLAG_DECRYPTED | RX_FLAG_MMIC_STRIPPED;
2293 if (fill_crypto_hdr)
2294 rx_status->flag |= RX_FLAG_MIC_STRIPPED |
2295 RX_FLAG_ICV_STRIPPED;
2297 rx_status->flag |= RX_FLAG_IV_STRIPPED |
2298 RX_FLAG_PN_VALIDATED;
2301 ath11k_dp_rx_h_csum_offload(ar, msdu);
2302 ath11k_dp_rx_h_undecap(ar, msdu, rx_desc,
2303 enctype, rx_status, is_decrypted);
2305 if (!is_decrypted || fill_crypto_hdr)
2308 if (ath11k_dp_rx_h_msdu_start_decap_type(ar->ab, rx_desc) !=
2309 DP_RX_DECAP_TYPE_ETHERNET2_DIX) {
2310 hdr = (void *)msdu->data;
2311 hdr->frame_control &= ~__cpu_to_le16(IEEE80211_FCTL_PROTECTED);
2315 static void ath11k_dp_rx_h_rate(struct ath11k *ar, struct hal_rx_desc *rx_desc,
2316 struct ieee80211_rx_status *rx_status)
2318 struct ieee80211_supported_band *sband;
2319 enum rx_msdu_start_pkt_type pkt_type;
2323 bool is_cck, is_ldpc;
2325 pkt_type = ath11k_dp_rx_h_msdu_start_pkt_type(ar->ab, rx_desc);
2326 bw = ath11k_dp_rx_h_msdu_start_rx_bw(ar->ab, rx_desc);
2327 rate_mcs = ath11k_dp_rx_h_msdu_start_rate_mcs(ar->ab, rx_desc);
2328 nss = ath11k_dp_rx_h_msdu_start_nss(ar->ab, rx_desc);
2329 sgi = ath11k_dp_rx_h_msdu_start_sgi(ar->ab, rx_desc);
2332 case RX_MSDU_START_PKT_TYPE_11A:
2333 case RX_MSDU_START_PKT_TYPE_11B:
2334 is_cck = (pkt_type == RX_MSDU_START_PKT_TYPE_11B);
2335 sband = &ar->mac.sbands[rx_status->band];
2336 rx_status->rate_idx = ath11k_mac_hw_rate_to_idx(sband, rate_mcs,
2339 case RX_MSDU_START_PKT_TYPE_11N:
2340 rx_status->encoding = RX_ENC_HT;
2341 if (rate_mcs > ATH11K_HT_MCS_MAX) {
2343 "Received with invalid mcs in HT mode %d\n",
2347 rx_status->rate_idx = rate_mcs + (8 * (nss - 1));
2349 rx_status->enc_flags |= RX_ENC_FLAG_SHORT_GI;
2350 rx_status->bw = ath11k_mac_bw_to_mac80211_bw(bw);
2352 case RX_MSDU_START_PKT_TYPE_11AC:
2353 rx_status->encoding = RX_ENC_VHT;
2354 rx_status->rate_idx = rate_mcs;
2355 if (rate_mcs > ATH11K_VHT_MCS_MAX) {
2357 "Received with invalid mcs in VHT mode %d\n",
2361 rx_status->nss = nss;
2363 rx_status->enc_flags |= RX_ENC_FLAG_SHORT_GI;
2364 rx_status->bw = ath11k_mac_bw_to_mac80211_bw(bw);
2365 is_ldpc = ath11k_dp_rx_h_msdu_start_ldpc_support(ar->ab, rx_desc);
2367 rx_status->enc_flags |= RX_ENC_FLAG_LDPC;
2369 case RX_MSDU_START_PKT_TYPE_11AX:
2370 rx_status->rate_idx = rate_mcs;
2371 if (rate_mcs > ATH11K_HE_MCS_MAX) {
2373 "Received with invalid mcs in HE mode %d\n",
2377 rx_status->encoding = RX_ENC_HE;
2378 rx_status->nss = nss;
2379 rx_status->he_gi = ath11k_mac_he_gi_to_nl80211_he_gi(sgi);
2380 rx_status->bw = ath11k_mac_bw_to_mac80211_bw(bw);
2385 static void ath11k_dp_rx_h_ppdu(struct ath11k *ar, struct hal_rx_desc *rx_desc,
2386 struct ieee80211_rx_status *rx_status)
2389 u32 center_freq, meta_data;
2390 struct ieee80211_channel *channel;
2392 rx_status->freq = 0;
2393 rx_status->rate_idx = 0;
2395 rx_status->encoding = RX_ENC_LEGACY;
2396 rx_status->bw = RATE_INFO_BW_20;
2398 rx_status->flag |= RX_FLAG_NO_SIGNAL_VAL;
2400 meta_data = ath11k_dp_rx_h_msdu_start_freq(ar->ab, rx_desc);
2401 channel_num = meta_data;
2402 center_freq = meta_data >> 16;
2404 if (center_freq >= ATH11K_MIN_6G_FREQ &&
2405 center_freq <= ATH11K_MAX_6G_FREQ) {
2406 rx_status->band = NL80211_BAND_6GHZ;
2407 rx_status->freq = center_freq;
2408 } else if (channel_num >= 1 && channel_num <= 14) {
2409 rx_status->band = NL80211_BAND_2GHZ;
2410 } else if (channel_num >= 36 && channel_num <= 173) {
2411 rx_status->band = NL80211_BAND_5GHZ;
2413 spin_lock_bh(&ar->data_lock);
2414 channel = ar->rx_channel;
2416 rx_status->band = channel->band;
2418 ieee80211_frequency_to_channel(channel->center_freq);
2420 spin_unlock_bh(&ar->data_lock);
2421 ath11k_dbg_dump(ar->ab, ATH11K_DBG_DATA, NULL, "rx_desc: ",
2422 rx_desc, sizeof(struct hal_rx_desc));
2425 if (rx_status->band != NL80211_BAND_6GHZ)
2426 rx_status->freq = ieee80211_channel_to_frequency(channel_num,
2429 ath11k_dp_rx_h_rate(ar, rx_desc, rx_status);
2432 static void ath11k_dp_rx_deliver_msdu(struct ath11k *ar, struct napi_struct *napi,
2433 struct sk_buff *msdu,
2434 struct ieee80211_rx_status *status)
2436 static const struct ieee80211_radiotap_he known = {
2437 .data1 = cpu_to_le16(IEEE80211_RADIOTAP_HE_DATA1_DATA_MCS_KNOWN |
2438 IEEE80211_RADIOTAP_HE_DATA1_BW_RU_ALLOC_KNOWN),
2439 .data2 = cpu_to_le16(IEEE80211_RADIOTAP_HE_DATA2_GI_KNOWN),
2441 struct ieee80211_rx_status *rx_status;
2442 struct ieee80211_radiotap_he *he = NULL;
2443 struct ieee80211_sta *pubsta = NULL;
2444 struct ath11k_peer *peer;
2445 struct ath11k_skb_rxcb *rxcb = ATH11K_SKB_RXCB(msdu);
2446 u8 decap = DP_RX_DECAP_TYPE_RAW;
2447 bool is_mcbc = rxcb->is_mcbc;
2448 bool is_eapol = rxcb->is_eapol;
2450 if (status->encoding == RX_ENC_HE &&
2451 !(status->flag & RX_FLAG_RADIOTAP_HE) &&
2452 !(status->flag & RX_FLAG_SKIP_MONITOR)) {
2453 he = skb_push(msdu, sizeof(known));
2454 memcpy(he, &known, sizeof(known));
2455 status->flag |= RX_FLAG_RADIOTAP_HE;
2458 if (!(status->flag & RX_FLAG_ONLY_MONITOR))
2459 decap = ath11k_dp_rx_h_msdu_start_decap_type(ar->ab, rxcb->rx_desc);
2461 spin_lock_bh(&ar->ab->base_lock);
2462 peer = ath11k_dp_rx_h_find_peer(ar->ab, msdu);
2463 if (peer && peer->sta)
2465 spin_unlock_bh(&ar->ab->base_lock);
2467 ath11k_dbg(ar->ab, ATH11K_DBG_DATA,
2468 "rx skb %pK len %u peer %pM %d %s sn %u %s%s%s%s%s%s%s %srate_idx %u vht_nss %u freq %u band %u flag 0x%x fcs-err %i mic-err %i amsdu-more %i\n",
2471 peer ? peer->addr : NULL,
2473 is_mcbc ? "mcast" : "ucast",
2475 (status->encoding == RX_ENC_LEGACY) ? "legacy" : "",
2476 (status->encoding == RX_ENC_HT) ? "ht" : "",
2477 (status->encoding == RX_ENC_VHT) ? "vht" : "",
2478 (status->encoding == RX_ENC_HE) ? "he" : "",
2479 (status->bw == RATE_INFO_BW_40) ? "40" : "",
2480 (status->bw == RATE_INFO_BW_80) ? "80" : "",
2481 (status->bw == RATE_INFO_BW_160) ? "160" : "",
2482 status->enc_flags & RX_ENC_FLAG_SHORT_GI ? "sgi " : "",
2486 status->band, status->flag,
2487 !!(status->flag & RX_FLAG_FAILED_FCS_CRC),
2488 !!(status->flag & RX_FLAG_MMIC_ERROR),
2489 !!(status->flag & RX_FLAG_AMSDU_MORE));
2491 ath11k_dbg_dump(ar->ab, ATH11K_DBG_DP_RX, NULL, "dp rx msdu: ",
2492 msdu->data, msdu->len);
2494 rx_status = IEEE80211_SKB_RXCB(msdu);
2495 *rx_status = *status;
2497 /* TODO: trace rx packet */
2499 /* PN for multicast packets are not validate in HW,
2500 * so skip 802.3 rx path
2501 * Also, fast_rx expectes the STA to be authorized, hence
2502 * eapol packets are sent in slow path.
2504 if (decap == DP_RX_DECAP_TYPE_ETHERNET2_DIX && !is_eapol &&
2505 !(is_mcbc && rx_status->flag & RX_FLAG_DECRYPTED))
2506 rx_status->flag |= RX_FLAG_8023;
2508 ieee80211_rx_napi(ar->hw, pubsta, msdu, napi);
2511 static int ath11k_dp_rx_process_msdu(struct ath11k *ar,
2512 struct sk_buff *msdu,
2513 struct sk_buff_head *msdu_list,
2514 struct ieee80211_rx_status *rx_status)
2516 struct ath11k_base *ab = ar->ab;
2517 struct hal_rx_desc *rx_desc, *lrx_desc;
2518 struct rx_attention *rx_attention;
2519 struct ath11k_skb_rxcb *rxcb;
2520 struct sk_buff *last_buf;
2525 u32 hal_rx_desc_sz = ar->ab->hw_params.hal_desc_sz;
2527 last_buf = ath11k_dp_rx_get_msdu_last_buf(msdu_list, msdu);
2530 "No valid Rx buffer to access Atten/MSDU_END/MPDU_END tlvs\n");
2535 rx_desc = (struct hal_rx_desc *)msdu->data;
2536 if (ath11k_dp_rx_h_attn_msdu_len_err(ab, rx_desc)) {
2537 ath11k_warn(ar->ab, "msdu len not valid\n");
2542 lrx_desc = (struct hal_rx_desc *)last_buf->data;
2543 rx_attention = ath11k_dp_rx_get_attention(ab, lrx_desc);
2544 if (!ath11k_dp_rx_h_attn_msdu_done(rx_attention)) {
2545 ath11k_warn(ab, "msdu_done bit in attention is not set\n");
2550 rxcb = ATH11K_SKB_RXCB(msdu);
2551 rxcb->rx_desc = rx_desc;
2552 msdu_len = ath11k_dp_rx_h_msdu_start_msdu_len(ab, rx_desc);
2553 l3_pad_bytes = ath11k_dp_rx_h_msdu_end_l3pad(ab, lrx_desc);
2555 if (rxcb->is_frag) {
2556 skb_pull(msdu, hal_rx_desc_sz);
2557 } else if (!rxcb->is_continuation) {
2558 if ((msdu_len + hal_rx_desc_sz) > DP_RX_BUFFER_SIZE) {
2559 hdr_status = ath11k_dp_rx_h_80211_hdr(ab, rx_desc);
2561 ath11k_warn(ab, "invalid msdu len %u\n", msdu_len);
2562 ath11k_dbg_dump(ab, ATH11K_DBG_DATA, NULL, "", hdr_status,
2563 sizeof(struct ieee80211_hdr));
2564 ath11k_dbg_dump(ab, ATH11K_DBG_DATA, NULL, "", rx_desc,
2565 sizeof(struct hal_rx_desc));
2568 skb_put(msdu, hal_rx_desc_sz + l3_pad_bytes + msdu_len);
2569 skb_pull(msdu, hal_rx_desc_sz + l3_pad_bytes);
2571 ret = ath11k_dp_rx_msdu_coalesce(ar, msdu_list,
2573 l3_pad_bytes, msdu_len);
2576 "failed to coalesce msdu rx buffer%d\n", ret);
2581 ath11k_dp_rx_h_ppdu(ar, rx_desc, rx_status);
2582 ath11k_dp_rx_h_mpdu(ar, msdu, rx_desc, rx_status);
2584 rx_status->flag |= RX_FLAG_SKIP_MONITOR | RX_FLAG_DUP_VALIDATED;
2592 static void ath11k_dp_rx_process_received_packets(struct ath11k_base *ab,
2593 struct napi_struct *napi,
2594 struct sk_buff_head *msdu_list,
2597 struct sk_buff *msdu;
2599 struct ieee80211_rx_status rx_status = {0};
2602 if (skb_queue_empty(msdu_list))
2605 if (unlikely(!rcu_access_pointer(ab->pdevs_active[mac_id]))) {
2606 __skb_queue_purge(msdu_list);
2610 ar = ab->pdevs[mac_id].ar;
2611 if (unlikely(test_bit(ATH11K_CAC_RUNNING, &ar->dev_flags))) {
2612 __skb_queue_purge(msdu_list);
2616 while ((msdu = __skb_dequeue(msdu_list))) {
2617 ret = ath11k_dp_rx_process_msdu(ar, msdu, msdu_list, &rx_status);
2618 if (unlikely(ret)) {
2619 ath11k_dbg(ab, ATH11K_DBG_DATA,
2620 "Unable to process msdu %d", ret);
2621 dev_kfree_skb_any(msdu);
2625 ath11k_dp_rx_deliver_msdu(ar, napi, msdu, &rx_status);
2629 int ath11k_dp_process_rx(struct ath11k_base *ab, int ring_id,
2630 struct napi_struct *napi, int budget)
2632 struct ath11k_dp *dp = &ab->dp;
2633 struct dp_rxdma_ring *rx_ring;
2634 int num_buffs_reaped[MAX_RADIOS] = {0};
2635 struct sk_buff_head msdu_list[MAX_RADIOS];
2636 struct ath11k_skb_rxcb *rxcb;
2637 int total_msdu_reaped = 0;
2638 struct hal_srng *srng;
2639 struct sk_buff *msdu;
2643 struct hal_reo_dest_ring *desc;
2644 enum hal_reo_dest_ring_push_reason push_reason;
2648 for (i = 0; i < MAX_RADIOS; i++)
2649 __skb_queue_head_init(&msdu_list[i]);
2651 srng = &ab->hal.srng_list[dp->reo_dst_ring[ring_id].ring_id];
2653 spin_lock_bh(&srng->lock);
2656 ath11k_hal_srng_access_begin(ab, srng);
2658 while (likely(desc =
2659 (struct hal_reo_dest_ring *)ath11k_hal_srng_dst_get_next_entry(ab,
2661 cookie = FIELD_GET(BUFFER_ADDR_INFO1_SW_COOKIE,
2662 desc->buf_addr_info.info1);
2663 buf_id = FIELD_GET(DP_RXDMA_BUF_COOKIE_BUF_ID,
2665 mac_id = FIELD_GET(DP_RXDMA_BUF_COOKIE_PDEV_ID, cookie);
2667 ar = ab->pdevs[mac_id].ar;
2668 rx_ring = &ar->dp.rx_refill_buf_ring;
2669 spin_lock_bh(&rx_ring->idr_lock);
2670 msdu = idr_find(&rx_ring->bufs_idr, buf_id);
2671 if (unlikely(!msdu)) {
2672 ath11k_warn(ab, "frame rx with invalid buf_id %d\n",
2674 spin_unlock_bh(&rx_ring->idr_lock);
2678 idr_remove(&rx_ring->bufs_idr, buf_id);
2679 spin_unlock_bh(&rx_ring->idr_lock);
2681 rxcb = ATH11K_SKB_RXCB(msdu);
2682 dma_unmap_single(ab->dev, rxcb->paddr,
2683 msdu->len + skb_tailroom(msdu),
2686 num_buffs_reaped[mac_id]++;
2688 push_reason = FIELD_GET(HAL_REO_DEST_RING_INFO0_PUSH_REASON,
2690 if (unlikely(push_reason !=
2691 HAL_REO_DEST_RING_PUSH_REASON_ROUTING_INSTRUCTION)) {
2692 dev_kfree_skb_any(msdu);
2693 ab->soc_stats.hal_reo_error[dp->reo_dst_ring[ring_id].ring_id]++;
2697 rxcb->is_first_msdu = !!(desc->rx_msdu_info.info0 &
2698 RX_MSDU_DESC_INFO0_FIRST_MSDU_IN_MPDU);
2699 rxcb->is_last_msdu = !!(desc->rx_msdu_info.info0 &
2700 RX_MSDU_DESC_INFO0_LAST_MSDU_IN_MPDU);
2701 rxcb->is_continuation = !!(desc->rx_msdu_info.info0 &
2702 RX_MSDU_DESC_INFO0_MSDU_CONTINUATION);
2703 rxcb->peer_id = FIELD_GET(RX_MPDU_DESC_META_DATA_PEER_ID,
2704 desc->rx_mpdu_info.meta_data);
2705 rxcb->seq_no = FIELD_GET(RX_MPDU_DESC_INFO0_SEQ_NUM,
2706 desc->rx_mpdu_info.info0);
2707 rxcb->tid = FIELD_GET(HAL_REO_DEST_RING_INFO0_RX_QUEUE_NUM,
2710 rxcb->mac_id = mac_id;
2711 __skb_queue_tail(&msdu_list[mac_id], msdu);
2713 if (rxcb->is_continuation) {
2716 total_msdu_reaped++;
2720 if (total_msdu_reaped >= budget)
2724 /* Hw might have updated the head pointer after we cached it.
2725 * In this case, even though there are entries in the ring we'll
2726 * get rx_desc NULL. Give the read another try with updated cached
2727 * head pointer so that we can reap complete MPDU in the current
2730 if (unlikely(!done && ath11k_hal_srng_dst_num_free(ab, srng, true))) {
2731 ath11k_hal_srng_access_end(ab, srng);
2735 ath11k_hal_srng_access_end(ab, srng);
2737 spin_unlock_bh(&srng->lock);
2739 if (unlikely(!total_msdu_reaped))
2742 for (i = 0; i < ab->num_radios; i++) {
2743 if (!num_buffs_reaped[i])
2746 ath11k_dp_rx_process_received_packets(ab, napi, &msdu_list[i], i);
2748 ar = ab->pdevs[i].ar;
2749 rx_ring = &ar->dp.rx_refill_buf_ring;
2751 ath11k_dp_rxbufs_replenish(ab, i, rx_ring, num_buffs_reaped[i],
2752 ab->hw_params.hal_params->rx_buf_rbm);
2755 return total_msdu_reaped;
2758 static void ath11k_dp_rx_update_peer_stats(struct ath11k_sta *arsta,
2759 struct hal_rx_mon_ppdu_info *ppdu_info)
2761 struct ath11k_rx_peer_stats *rx_stats = arsta->rx_stats;
2768 num_msdu = ppdu_info->tcp_msdu_count + ppdu_info->tcp_ack_msdu_count +
2769 ppdu_info->udp_msdu_count + ppdu_info->other_msdu_count;
2771 rx_stats->num_msdu += num_msdu;
2772 rx_stats->tcp_msdu_count += ppdu_info->tcp_msdu_count +
2773 ppdu_info->tcp_ack_msdu_count;
2774 rx_stats->udp_msdu_count += ppdu_info->udp_msdu_count;
2775 rx_stats->other_msdu_count += ppdu_info->other_msdu_count;
2777 if (ppdu_info->preamble_type == HAL_RX_PREAMBLE_11A ||
2778 ppdu_info->preamble_type == HAL_RX_PREAMBLE_11B) {
2780 ppdu_info->mcs = HAL_RX_MAX_MCS;
2781 ppdu_info->tid = IEEE80211_NUM_TIDS;
2784 if (ppdu_info->nss > 0 && ppdu_info->nss <= HAL_RX_MAX_NSS)
2785 rx_stats->nss_count[ppdu_info->nss - 1] += num_msdu;
2787 if (ppdu_info->mcs <= HAL_RX_MAX_MCS)
2788 rx_stats->mcs_count[ppdu_info->mcs] += num_msdu;
2790 if (ppdu_info->gi < HAL_RX_GI_MAX)
2791 rx_stats->gi_count[ppdu_info->gi] += num_msdu;
2793 if (ppdu_info->bw < HAL_RX_BW_MAX)
2794 rx_stats->bw_count[ppdu_info->bw] += num_msdu;
2796 if (ppdu_info->ldpc < HAL_RX_SU_MU_CODING_MAX)
2797 rx_stats->coding_count[ppdu_info->ldpc] += num_msdu;
2799 if (ppdu_info->tid <= IEEE80211_NUM_TIDS)
2800 rx_stats->tid_count[ppdu_info->tid] += num_msdu;
2802 if (ppdu_info->preamble_type < HAL_RX_PREAMBLE_MAX)
2803 rx_stats->pream_cnt[ppdu_info->preamble_type] += num_msdu;
2805 if (ppdu_info->reception_type < HAL_RX_RECEPTION_TYPE_MAX)
2806 rx_stats->reception_type[ppdu_info->reception_type] += num_msdu;
2808 if (ppdu_info->is_stbc)
2809 rx_stats->stbc_count += num_msdu;
2811 if (ppdu_info->beamformed)
2812 rx_stats->beamformed_count += num_msdu;
2814 if (ppdu_info->num_mpdu_fcs_ok > 1)
2815 rx_stats->ampdu_msdu_count += num_msdu;
2817 rx_stats->non_ampdu_msdu_count += num_msdu;
2819 rx_stats->num_mpdu_fcs_ok += ppdu_info->num_mpdu_fcs_ok;
2820 rx_stats->num_mpdu_fcs_err += ppdu_info->num_mpdu_fcs_err;
2821 rx_stats->dcm_count += ppdu_info->dcm;
2822 rx_stats->ru_alloc_cnt[ppdu_info->ru_alloc] += num_msdu;
2824 arsta->rssi_comb = ppdu_info->rssi_comb;
2826 BUILD_BUG_ON(ARRAY_SIZE(arsta->chain_signal) >
2827 ARRAY_SIZE(ppdu_info->rssi_chain_pri20));
2829 for (i = 0; i < ARRAY_SIZE(arsta->chain_signal); i++)
2830 arsta->chain_signal[i] = ppdu_info->rssi_chain_pri20[i];
2832 rx_stats->rx_duration += ppdu_info->rx_duration;
2833 arsta->rx_duration = rx_stats->rx_duration;
2836 static struct sk_buff *ath11k_dp_rx_alloc_mon_status_buf(struct ath11k_base *ab,
2837 struct dp_rxdma_ring *rx_ring,
2840 struct sk_buff *skb;
2843 skb = dev_alloc_skb(DP_RX_BUFFER_SIZE +
2844 DP_RX_BUFFER_ALIGN_SIZE);
2847 goto fail_alloc_skb;
2849 if (!IS_ALIGNED((unsigned long)skb->data,
2850 DP_RX_BUFFER_ALIGN_SIZE)) {
2851 skb_pull(skb, PTR_ALIGN(skb->data, DP_RX_BUFFER_ALIGN_SIZE) -
2855 paddr = dma_map_single(ab->dev, skb->data,
2856 skb->len + skb_tailroom(skb),
2858 if (unlikely(dma_mapping_error(ab->dev, paddr)))
2861 spin_lock_bh(&rx_ring->idr_lock);
2862 *buf_id = idr_alloc(&rx_ring->bufs_idr, skb, 0,
2863 rx_ring->bufs_max, GFP_ATOMIC);
2864 spin_unlock_bh(&rx_ring->idr_lock);
2866 goto fail_dma_unmap;
2868 ATH11K_SKB_RXCB(skb)->paddr = paddr;
2872 dma_unmap_single(ab->dev, paddr, skb->len + skb_tailroom(skb),
2875 dev_kfree_skb_any(skb);
2880 int ath11k_dp_rx_mon_status_bufs_replenish(struct ath11k_base *ab, int mac_id,
2881 struct dp_rxdma_ring *rx_ring,
2883 enum hal_rx_buf_return_buf_manager mgr)
2885 struct hal_srng *srng;
2887 struct sk_buff *skb;
2894 req_entries = min(req_entries, rx_ring->bufs_max);
2896 srng = &ab->hal.srng_list[rx_ring->refill_buf_ring.ring_id];
2898 spin_lock_bh(&srng->lock);
2900 ath11k_hal_srng_access_begin(ab, srng);
2902 num_free = ath11k_hal_srng_src_num_free(ab, srng, true);
2904 req_entries = min(num_free, req_entries);
2905 num_remain = req_entries;
2907 while (num_remain > 0) {
2908 skb = ath11k_dp_rx_alloc_mon_status_buf(ab, rx_ring,
2912 paddr = ATH11K_SKB_RXCB(skb)->paddr;
2914 desc = ath11k_hal_srng_src_get_next_entry(ab, srng);
2918 cookie = FIELD_PREP(DP_RXDMA_BUF_COOKIE_PDEV_ID, mac_id) |
2919 FIELD_PREP(DP_RXDMA_BUF_COOKIE_BUF_ID, buf_id);
2923 ath11k_hal_rx_buf_addr_info_set(desc, paddr, cookie, mgr);
2926 ath11k_hal_srng_access_end(ab, srng);
2928 spin_unlock_bh(&srng->lock);
2930 return req_entries - num_remain;
2933 spin_lock_bh(&rx_ring->idr_lock);
2934 idr_remove(&rx_ring->bufs_idr, buf_id);
2935 spin_unlock_bh(&rx_ring->idr_lock);
2936 dma_unmap_single(ab->dev, paddr, skb->len + skb_tailroom(skb),
2938 dev_kfree_skb_any(skb);
2939 ath11k_hal_srng_access_end(ab, srng);
2940 spin_unlock_bh(&srng->lock);
2942 return req_entries - num_remain;
2945 #define ATH11K_DP_RX_FULL_MON_PPDU_ID_WRAP 32535
2948 ath11k_dp_rx_mon_update_status_buf_state(struct ath11k_mon_data *pmon,
2949 struct hal_tlv_hdr *tlv)
2951 struct hal_rx_ppdu_start *ppdu_start;
2952 u16 ppdu_id_diff, ppdu_id, tlv_len;
2955 /* PPDU id is part of second tlv, move ptr to second tlv */
2956 tlv_len = FIELD_GET(HAL_TLV_HDR_LEN, tlv->tl);
2958 ptr += sizeof(*tlv) + tlv_len;
2959 tlv = (struct hal_tlv_hdr *)ptr;
2961 if (FIELD_GET(HAL_TLV_HDR_TAG, tlv->tl) != HAL_RX_PPDU_START)
2964 ptr += sizeof(*tlv);
2965 ppdu_start = (struct hal_rx_ppdu_start *)ptr;
2966 ppdu_id = FIELD_GET(HAL_RX_PPDU_START_INFO0_PPDU_ID,
2967 __le32_to_cpu(ppdu_start->info0));
2969 if (pmon->sw_mon_entries.ppdu_id < ppdu_id) {
2970 pmon->buf_state = DP_MON_STATUS_LEAD;
2971 ppdu_id_diff = ppdu_id - pmon->sw_mon_entries.ppdu_id;
2972 if (ppdu_id_diff > ATH11K_DP_RX_FULL_MON_PPDU_ID_WRAP)
2973 pmon->buf_state = DP_MON_STATUS_LAG;
2974 } else if (pmon->sw_mon_entries.ppdu_id > ppdu_id) {
2975 pmon->buf_state = DP_MON_STATUS_LAG;
2976 ppdu_id_diff = pmon->sw_mon_entries.ppdu_id - ppdu_id;
2977 if (ppdu_id_diff > ATH11K_DP_RX_FULL_MON_PPDU_ID_WRAP)
2978 pmon->buf_state = DP_MON_STATUS_LEAD;
2982 static int ath11k_dp_rx_reap_mon_status_ring(struct ath11k_base *ab, int mac_id,
2983 int *budget, struct sk_buff_head *skb_list)
2986 const struct ath11k_hw_hal_params *hal_params;
2987 struct ath11k_pdev_dp *dp;
2988 struct dp_rxdma_ring *rx_ring;
2989 struct ath11k_mon_data *pmon;
2990 struct hal_srng *srng;
2991 void *rx_mon_status_desc;
2992 struct sk_buff *skb;
2993 struct ath11k_skb_rxcb *rxcb;
2994 struct hal_tlv_hdr *tlv;
2996 int buf_id, srng_id;
2999 int num_buffs_reaped = 0;
3001 ar = ab->pdevs[ath11k_hw_mac_id_to_pdev_id(&ab->hw_params, mac_id)].ar;
3003 pmon = &dp->mon_data;
3004 srng_id = ath11k_hw_mac_id_to_srng_id(&ab->hw_params, mac_id);
3005 rx_ring = &dp->rx_mon_status_refill_ring[srng_id];
3007 srng = &ab->hal.srng_list[rx_ring->refill_buf_ring.ring_id];
3009 spin_lock_bh(&srng->lock);
3011 ath11k_hal_srng_access_begin(ab, srng);
3014 rx_mon_status_desc =
3015 ath11k_hal_srng_src_peek(ab, srng);
3016 if (!rx_mon_status_desc) {
3017 pmon->buf_state = DP_MON_STATUS_REPLINISH;
3021 ath11k_hal_rx_buf_addr_info_get(rx_mon_status_desc, &paddr,
3024 buf_id = FIELD_GET(DP_RXDMA_BUF_COOKIE_BUF_ID, cookie);
3026 spin_lock_bh(&rx_ring->idr_lock);
3027 skb = idr_find(&rx_ring->bufs_idr, buf_id);
3029 ath11k_warn(ab, "rx monitor status with invalid buf_id %d\n",
3031 spin_unlock_bh(&rx_ring->idr_lock);
3032 pmon->buf_state = DP_MON_STATUS_REPLINISH;
3036 idr_remove(&rx_ring->bufs_idr, buf_id);
3037 spin_unlock_bh(&rx_ring->idr_lock);
3039 rxcb = ATH11K_SKB_RXCB(skb);
3041 dma_unmap_single(ab->dev, rxcb->paddr,
3042 skb->len + skb_tailroom(skb),
3045 tlv = (struct hal_tlv_hdr *)skb->data;
3046 if (FIELD_GET(HAL_TLV_HDR_TAG, tlv->tl) !=
3047 HAL_RX_STATUS_BUFFER_DONE) {
3048 ath11k_warn(ab, "mon status DONE not set %lx\n",
3049 FIELD_GET(HAL_TLV_HDR_TAG,
3051 dev_kfree_skb_any(skb);
3052 pmon->buf_state = DP_MON_STATUS_NO_DMA;
3056 if (ab->hw_params.full_monitor_mode) {
3057 ath11k_dp_rx_mon_update_status_buf_state(pmon, tlv);
3058 if (paddr == pmon->mon_status_paddr)
3059 pmon->buf_state = DP_MON_STATUS_MATCH;
3061 __skb_queue_tail(skb_list, skb);
3063 pmon->buf_state = DP_MON_STATUS_REPLINISH;
3066 skb = ath11k_dp_rx_alloc_mon_status_buf(ab, rx_ring,
3070 hal_params = ab->hw_params.hal_params;
3071 ath11k_hal_rx_buf_addr_info_set(rx_mon_status_desc, 0, 0,
3072 hal_params->rx_buf_rbm);
3076 rxcb = ATH11K_SKB_RXCB(skb);
3078 cookie = FIELD_PREP(DP_RXDMA_BUF_COOKIE_PDEV_ID, mac_id) |
3079 FIELD_PREP(DP_RXDMA_BUF_COOKIE_BUF_ID, buf_id);
3081 ath11k_hal_rx_buf_addr_info_set(rx_mon_status_desc, rxcb->paddr,
3083 ab->hw_params.hal_params->rx_buf_rbm);
3084 ath11k_hal_srng_src_get_next_entry(ab, srng);
3087 ath11k_hal_srng_access_end(ab, srng);
3088 spin_unlock_bh(&srng->lock);
3090 return num_buffs_reaped;
3093 static void ath11k_dp_rx_frag_timer(struct timer_list *timer)
3095 struct dp_rx_tid *rx_tid = from_timer(rx_tid, timer, frag_timer);
3097 spin_lock_bh(&rx_tid->ab->base_lock);
3098 if (rx_tid->last_frag_no &&
3099 rx_tid->rx_frag_bitmap == GENMASK(rx_tid->last_frag_no, 0)) {
3100 spin_unlock_bh(&rx_tid->ab->base_lock);
3103 ath11k_dp_rx_frags_cleanup(rx_tid, true);
3104 spin_unlock_bh(&rx_tid->ab->base_lock);
3107 int ath11k_peer_rx_frag_setup(struct ath11k *ar, const u8 *peer_mac, int vdev_id)
3109 struct ath11k_base *ab = ar->ab;
3110 struct crypto_shash *tfm;
3111 struct ath11k_peer *peer;
3112 struct dp_rx_tid *rx_tid;
3115 tfm = crypto_alloc_shash("michael_mic", 0, 0);
3117 return PTR_ERR(tfm);
3119 spin_lock_bh(&ab->base_lock);
3121 peer = ath11k_peer_find(ab, vdev_id, peer_mac);
3123 ath11k_warn(ab, "failed to find the peer to set up fragment info\n");
3124 spin_unlock_bh(&ab->base_lock);
3128 for (i = 0; i <= IEEE80211_NUM_TIDS; i++) {
3129 rx_tid = &peer->rx_tid[i];
3131 timer_setup(&rx_tid->frag_timer, ath11k_dp_rx_frag_timer, 0);
3132 skb_queue_head_init(&rx_tid->rx_frags);
3135 peer->tfm_mmic = tfm;
3136 spin_unlock_bh(&ab->base_lock);
3141 static int ath11k_dp_rx_h_michael_mic(struct crypto_shash *tfm, u8 *key,
3142 struct ieee80211_hdr *hdr, u8 *data,
3143 size_t data_len, u8 *mic)
3145 SHASH_DESC_ON_STACK(desc, tfm);
3146 u8 mic_hdr[16] = {0};
3155 ret = crypto_shash_setkey(tfm, key, 8);
3159 ret = crypto_shash_init(desc);
3163 /* TKIP MIC header */
3164 memcpy(mic_hdr, ieee80211_get_DA(hdr), ETH_ALEN);
3165 memcpy(mic_hdr + ETH_ALEN, ieee80211_get_SA(hdr), ETH_ALEN);
3166 if (ieee80211_is_data_qos(hdr->frame_control))
3167 tid = ieee80211_get_tid(hdr);
3170 ret = crypto_shash_update(desc, mic_hdr, 16);
3173 ret = crypto_shash_update(desc, data, data_len);
3176 ret = crypto_shash_final(desc, mic);
3178 shash_desc_zero(desc);
3182 static int ath11k_dp_rx_h_verify_tkip_mic(struct ath11k *ar, struct ath11k_peer *peer,
3183 struct sk_buff *msdu)
3185 struct hal_rx_desc *rx_desc = (struct hal_rx_desc *)msdu->data;
3186 struct ieee80211_rx_status *rxs = IEEE80211_SKB_RXCB(msdu);
3187 struct ieee80211_key_conf *key_conf;
3188 struct ieee80211_hdr *hdr;
3189 u8 mic[IEEE80211_CCMP_MIC_LEN];
3190 int head_len, tail_len, ret;
3192 u32 hdr_len, hal_rx_desc_sz = ar->ab->hw_params.hal_desc_sz;
3196 if (ath11k_dp_rx_h_mpdu_start_enctype(ar->ab, rx_desc) !=
3197 HAL_ENCRYPT_TYPE_TKIP_MIC)
3200 hdr = (struct ieee80211_hdr *)(msdu->data + hal_rx_desc_sz);
3201 hdr_len = ieee80211_hdrlen(hdr->frame_control);
3202 head_len = hdr_len + hal_rx_desc_sz + IEEE80211_TKIP_IV_LEN;
3203 tail_len = IEEE80211_CCMP_MIC_LEN + IEEE80211_TKIP_ICV_LEN + FCS_LEN;
3205 if (!is_multicast_ether_addr(hdr->addr1))
3206 key_idx = peer->ucast_keyidx;
3208 key_idx = peer->mcast_keyidx;
3210 key_conf = peer->keys[key_idx];
3212 data = msdu->data + head_len;
3213 data_len = msdu->len - head_len - tail_len;
3214 key = &key_conf->key[NL80211_TKIP_DATA_OFFSET_RX_MIC_KEY];
3216 ret = ath11k_dp_rx_h_michael_mic(peer->tfm_mmic, key, hdr, data, data_len, mic);
3217 if (ret || memcmp(mic, data + data_len, IEEE80211_CCMP_MIC_LEN))
3223 (ATH11K_SKB_RXCB(msdu))->is_first_msdu = true;
3224 (ATH11K_SKB_RXCB(msdu))->is_last_msdu = true;
3226 rxs->flag |= RX_FLAG_MMIC_ERROR | RX_FLAG_MMIC_STRIPPED |
3227 RX_FLAG_IV_STRIPPED | RX_FLAG_DECRYPTED;
3228 skb_pull(msdu, hal_rx_desc_sz);
3230 ath11k_dp_rx_h_ppdu(ar, rx_desc, rxs);
3231 ath11k_dp_rx_h_undecap(ar, msdu, rx_desc,
3232 HAL_ENCRYPT_TYPE_TKIP_MIC, rxs, true);
3233 ieee80211_rx(ar->hw, msdu);
3237 static void ath11k_dp_rx_h_undecap_frag(struct ath11k *ar, struct sk_buff *msdu,
3238 enum hal_encrypt_type enctype, u32 flags)
3240 struct ieee80211_hdr *hdr;
3243 u32 hal_rx_desc_sz = ar->ab->hw_params.hal_desc_sz;
3248 hdr = (struct ieee80211_hdr *)(msdu->data + hal_rx_desc_sz);
3250 if (flags & RX_FLAG_MIC_STRIPPED)
3251 skb_trim(msdu, msdu->len -
3252 ath11k_dp_rx_crypto_mic_len(ar, enctype));
3254 if (flags & RX_FLAG_ICV_STRIPPED)
3255 skb_trim(msdu, msdu->len -
3256 ath11k_dp_rx_crypto_icv_len(ar, enctype));
3258 if (flags & RX_FLAG_IV_STRIPPED) {
3259 hdr_len = ieee80211_hdrlen(hdr->frame_control);
3260 crypto_len = ath11k_dp_rx_crypto_param_len(ar, enctype);
3262 memmove((void *)msdu->data + hal_rx_desc_sz + crypto_len,
3263 (void *)msdu->data + hal_rx_desc_sz, hdr_len);
3264 skb_pull(msdu, crypto_len);
3268 static int ath11k_dp_rx_h_defrag(struct ath11k *ar,
3269 struct ath11k_peer *peer,
3270 struct dp_rx_tid *rx_tid,
3271 struct sk_buff **defrag_skb)
3273 struct hal_rx_desc *rx_desc;
3274 struct sk_buff *skb, *first_frag, *last_frag;
3275 struct ieee80211_hdr *hdr;
3276 struct rx_attention *rx_attention;
3277 enum hal_encrypt_type enctype;
3278 bool is_decrypted = false;
3281 u32 flags, hal_rx_desc_sz = ar->ab->hw_params.hal_desc_sz;
3283 first_frag = skb_peek(&rx_tid->rx_frags);
3284 last_frag = skb_peek_tail(&rx_tid->rx_frags);
3286 skb_queue_walk(&rx_tid->rx_frags, skb) {
3288 rx_desc = (struct hal_rx_desc *)skb->data;
3289 hdr = (struct ieee80211_hdr *)(skb->data + hal_rx_desc_sz);
3291 enctype = ath11k_dp_rx_h_mpdu_start_enctype(ar->ab, rx_desc);
3292 if (enctype != HAL_ENCRYPT_TYPE_OPEN) {
3293 rx_attention = ath11k_dp_rx_get_attention(ar->ab, rx_desc);
3294 is_decrypted = ath11k_dp_rx_h_attn_is_decrypted(rx_attention);
3298 if (skb != first_frag)
3299 flags |= RX_FLAG_IV_STRIPPED;
3300 if (skb != last_frag)
3301 flags |= RX_FLAG_ICV_STRIPPED |
3302 RX_FLAG_MIC_STRIPPED;
3305 /* RX fragments are always raw packets */
3306 if (skb != last_frag)
3307 skb_trim(skb, skb->len - FCS_LEN);
3308 ath11k_dp_rx_h_undecap_frag(ar, skb, enctype, flags);
3310 if (skb != first_frag)
3311 skb_pull(skb, hal_rx_desc_sz +
3312 ieee80211_hdrlen(hdr->frame_control));
3313 msdu_len += skb->len;
3316 extra_space = msdu_len - (DP_RX_BUFFER_SIZE + skb_tailroom(first_frag));
3317 if (extra_space > 0 &&
3318 (pskb_expand_head(first_frag, 0, extra_space, GFP_ATOMIC) < 0))
3321 __skb_unlink(first_frag, &rx_tid->rx_frags);
3322 while ((skb = __skb_dequeue(&rx_tid->rx_frags))) {
3323 skb_put_data(first_frag, skb->data, skb->len);
3324 dev_kfree_skb_any(skb);
3327 hdr = (struct ieee80211_hdr *)(first_frag->data + hal_rx_desc_sz);
3328 hdr->frame_control &= ~__cpu_to_le16(IEEE80211_FCTL_MOREFRAGS);
3329 ATH11K_SKB_RXCB(first_frag)->is_frag = 1;
3331 if (ath11k_dp_rx_h_verify_tkip_mic(ar, peer, first_frag))
3334 *defrag_skb = first_frag;
3338 static int ath11k_dp_rx_h_defrag_reo_reinject(struct ath11k *ar, struct dp_rx_tid *rx_tid,
3339 struct sk_buff *defrag_skb)
3341 struct ath11k_base *ab = ar->ab;
3342 struct ath11k_pdev_dp *dp = &ar->dp;
3343 struct dp_rxdma_ring *rx_refill_ring = &dp->rx_refill_buf_ring;
3344 struct hal_rx_desc *rx_desc = (struct hal_rx_desc *)defrag_skb->data;
3345 struct hal_reo_entrance_ring *reo_ent_ring;
3346 struct hal_reo_dest_ring *reo_dest_ring;
3347 struct dp_link_desc_bank *link_desc_banks;
3348 struct hal_rx_msdu_link *msdu_link;
3349 struct hal_rx_msdu_details *msdu0;
3350 struct hal_srng *srng;
3352 u32 desc_bank, msdu_info, mpdu_info;
3353 u32 dst_idx, cookie, hal_rx_desc_sz;
3356 hal_rx_desc_sz = ab->hw_params.hal_desc_sz;
3357 link_desc_banks = ab->dp.link_desc_banks;
3358 reo_dest_ring = rx_tid->dst_ring_desc;
3360 ath11k_hal_rx_reo_ent_paddr_get(ab, reo_dest_ring, &paddr, &desc_bank);
3361 msdu_link = (struct hal_rx_msdu_link *)(link_desc_banks[desc_bank].vaddr +
3362 (paddr - link_desc_banks[desc_bank].paddr));
3363 msdu0 = &msdu_link->msdu_link[0];
3364 dst_idx = FIELD_GET(RX_MSDU_DESC_INFO0_REO_DEST_IND, msdu0->rx_msdu_info.info0);
3365 memset(msdu0, 0, sizeof(*msdu0));
3367 msdu_info = FIELD_PREP(RX_MSDU_DESC_INFO0_FIRST_MSDU_IN_MPDU, 1) |
3368 FIELD_PREP(RX_MSDU_DESC_INFO0_LAST_MSDU_IN_MPDU, 1) |
3369 FIELD_PREP(RX_MSDU_DESC_INFO0_MSDU_CONTINUATION, 0) |
3370 FIELD_PREP(RX_MSDU_DESC_INFO0_MSDU_LENGTH,
3371 defrag_skb->len - hal_rx_desc_sz) |
3372 FIELD_PREP(RX_MSDU_DESC_INFO0_REO_DEST_IND, dst_idx) |
3373 FIELD_PREP(RX_MSDU_DESC_INFO0_VALID_SA, 1) |
3374 FIELD_PREP(RX_MSDU_DESC_INFO0_VALID_DA, 1);
3375 msdu0->rx_msdu_info.info0 = msdu_info;
3377 /* change msdu len in hal rx desc */
3378 ath11k_dp_rxdesc_set_msdu_len(ab, rx_desc, defrag_skb->len - hal_rx_desc_sz);
3380 paddr = dma_map_single(ab->dev, defrag_skb->data,
3381 defrag_skb->len + skb_tailroom(defrag_skb),
3383 if (dma_mapping_error(ab->dev, paddr))
3386 spin_lock_bh(&rx_refill_ring->idr_lock);
3387 buf_id = idr_alloc(&rx_refill_ring->bufs_idr, defrag_skb, 0,
3388 rx_refill_ring->bufs_max * 3, GFP_ATOMIC);
3389 spin_unlock_bh(&rx_refill_ring->idr_lock);
3395 ATH11K_SKB_RXCB(defrag_skb)->paddr = paddr;
3396 cookie = FIELD_PREP(DP_RXDMA_BUF_COOKIE_PDEV_ID, dp->mac_id) |
3397 FIELD_PREP(DP_RXDMA_BUF_COOKIE_BUF_ID, buf_id);
3399 ath11k_hal_rx_buf_addr_info_set(msdu0, paddr, cookie,
3400 ab->hw_params.hal_params->rx_buf_rbm);
3402 /* Fill mpdu details into reo entrace ring */
3403 srng = &ab->hal.srng_list[ab->dp.reo_reinject_ring.ring_id];
3405 spin_lock_bh(&srng->lock);
3406 ath11k_hal_srng_access_begin(ab, srng);
3408 reo_ent_ring = (struct hal_reo_entrance_ring *)
3409 ath11k_hal_srng_src_get_next_entry(ab, srng);
3410 if (!reo_ent_ring) {
3411 ath11k_hal_srng_access_end(ab, srng);
3412 spin_unlock_bh(&srng->lock);
3416 memset(reo_ent_ring, 0, sizeof(*reo_ent_ring));
3418 ath11k_hal_rx_reo_ent_paddr_get(ab, reo_dest_ring, &paddr, &desc_bank);
3419 ath11k_hal_rx_buf_addr_info_set(reo_ent_ring, paddr, desc_bank,
3420 HAL_RX_BUF_RBM_WBM_IDLE_DESC_LIST);
3422 mpdu_info = FIELD_PREP(RX_MPDU_DESC_INFO0_MSDU_COUNT, 1) |
3423 FIELD_PREP(RX_MPDU_DESC_INFO0_SEQ_NUM, rx_tid->cur_sn) |
3424 FIELD_PREP(RX_MPDU_DESC_INFO0_FRAG_FLAG, 0) |
3425 FIELD_PREP(RX_MPDU_DESC_INFO0_VALID_SA, 1) |
3426 FIELD_PREP(RX_MPDU_DESC_INFO0_VALID_DA, 1) |
3427 FIELD_PREP(RX_MPDU_DESC_INFO0_RAW_MPDU, 1) |
3428 FIELD_PREP(RX_MPDU_DESC_INFO0_VALID_PN, 1);
3430 reo_ent_ring->rx_mpdu_info.info0 = mpdu_info;
3431 reo_ent_ring->rx_mpdu_info.meta_data = reo_dest_ring->rx_mpdu_info.meta_data;
3432 reo_ent_ring->queue_addr_lo = reo_dest_ring->queue_addr_lo;
3433 reo_ent_ring->info0 = FIELD_PREP(HAL_REO_ENTR_RING_INFO0_QUEUE_ADDR_HI,
3434 FIELD_GET(HAL_REO_DEST_RING_INFO0_QUEUE_ADDR_HI,
3435 reo_dest_ring->info0)) |
3436 FIELD_PREP(HAL_REO_ENTR_RING_INFO0_DEST_IND, dst_idx);
3437 ath11k_hal_srng_access_end(ab, srng);
3438 spin_unlock_bh(&srng->lock);
3443 spin_lock_bh(&rx_refill_ring->idr_lock);
3444 idr_remove(&rx_refill_ring->bufs_idr, buf_id);
3445 spin_unlock_bh(&rx_refill_ring->idr_lock);
3447 dma_unmap_single(ab->dev, paddr, defrag_skb->len + skb_tailroom(defrag_skb),
3452 static int ath11k_dp_rx_h_cmp_frags(struct ath11k *ar,
3453 struct sk_buff *a, struct sk_buff *b)
3457 frag1 = ath11k_dp_rx_h_mpdu_start_frag_no(ar->ab, a);
3458 frag2 = ath11k_dp_rx_h_mpdu_start_frag_no(ar->ab, b);
3460 return frag1 - frag2;
3463 static void ath11k_dp_rx_h_sort_frags(struct ath11k *ar,
3464 struct sk_buff_head *frag_list,
3465 struct sk_buff *cur_frag)
3467 struct sk_buff *skb;
3470 skb_queue_walk(frag_list, skb) {
3471 cmp = ath11k_dp_rx_h_cmp_frags(ar, skb, cur_frag);
3474 __skb_queue_before(frag_list, skb, cur_frag);
3477 __skb_queue_tail(frag_list, cur_frag);
3480 static u64 ath11k_dp_rx_h_get_pn(struct ath11k *ar, struct sk_buff *skb)
3482 struct ieee80211_hdr *hdr;
3485 u32 hal_rx_desc_sz = ar->ab->hw_params.hal_desc_sz;
3487 hdr = (struct ieee80211_hdr *)(skb->data + hal_rx_desc_sz);
3488 ehdr = skb->data + hal_rx_desc_sz + ieee80211_hdrlen(hdr->frame_control);
3491 pn |= (u64)ehdr[1] << 8;
3492 pn |= (u64)ehdr[4] << 16;
3493 pn |= (u64)ehdr[5] << 24;
3494 pn |= (u64)ehdr[6] << 32;
3495 pn |= (u64)ehdr[7] << 40;
3501 ath11k_dp_rx_h_defrag_validate_incr_pn(struct ath11k *ar, struct dp_rx_tid *rx_tid)
3503 enum hal_encrypt_type encrypt_type;
3504 struct sk_buff *first_frag, *skb;
3505 struct hal_rx_desc *desc;
3509 first_frag = skb_peek(&rx_tid->rx_frags);
3510 desc = (struct hal_rx_desc *)first_frag->data;
3512 encrypt_type = ath11k_dp_rx_h_mpdu_start_enctype(ar->ab, desc);
3513 if (encrypt_type != HAL_ENCRYPT_TYPE_CCMP_128 &&
3514 encrypt_type != HAL_ENCRYPT_TYPE_CCMP_256 &&
3515 encrypt_type != HAL_ENCRYPT_TYPE_GCMP_128 &&
3516 encrypt_type != HAL_ENCRYPT_TYPE_AES_GCMP_256)
3519 last_pn = ath11k_dp_rx_h_get_pn(ar, first_frag);
3520 skb_queue_walk(&rx_tid->rx_frags, skb) {
3521 if (skb == first_frag)
3524 cur_pn = ath11k_dp_rx_h_get_pn(ar, skb);
3525 if (cur_pn != last_pn + 1)
3532 static int ath11k_dp_rx_frag_h_mpdu(struct ath11k *ar,
3533 struct sk_buff *msdu,
3536 struct ath11k_base *ab = ar->ab;
3537 struct hal_rx_desc *rx_desc;
3538 struct ath11k_peer *peer;
3539 struct dp_rx_tid *rx_tid;
3540 struct sk_buff *defrag_skb = NULL;
3548 rx_desc = (struct hal_rx_desc *)msdu->data;
3549 peer_id = ath11k_dp_rx_h_mpdu_start_peer_id(ar->ab, rx_desc);
3550 tid = ath11k_dp_rx_h_mpdu_start_tid(ar->ab, rx_desc);
3551 seqno = ath11k_dp_rx_h_mpdu_start_seq_no(ar->ab, rx_desc);
3552 frag_no = ath11k_dp_rx_h_mpdu_start_frag_no(ar->ab, msdu);
3553 more_frags = ath11k_dp_rx_h_mpdu_start_more_frags(ar->ab, msdu);
3554 is_mcbc = ath11k_dp_rx_h_attn_is_mcbc(ar->ab, rx_desc);
3556 /* Multicast/Broadcast fragments are not expected */
3560 if (!ath11k_dp_rx_h_mpdu_start_seq_ctrl_valid(ar->ab, rx_desc) ||
3561 !ath11k_dp_rx_h_mpdu_start_fc_valid(ar->ab, rx_desc) ||
3562 tid > IEEE80211_NUM_TIDS)
3565 /* received unfragmented packet in reo
3566 * exception ring, this shouldn't happen
3567 * as these packets typically come from
3570 if (WARN_ON_ONCE(!frag_no && !more_frags))
3573 spin_lock_bh(&ab->base_lock);
3574 peer = ath11k_peer_find_by_id(ab, peer_id);
3576 ath11k_warn(ab, "failed to find the peer to de-fragment received fragment peer_id %d\n",
3581 rx_tid = &peer->rx_tid[tid];
3583 if ((!skb_queue_empty(&rx_tid->rx_frags) && seqno != rx_tid->cur_sn) ||
3584 skb_queue_empty(&rx_tid->rx_frags)) {
3585 /* Flush stored fragments and start a new sequence */
3586 ath11k_dp_rx_frags_cleanup(rx_tid, true);
3587 rx_tid->cur_sn = seqno;
3590 if (rx_tid->rx_frag_bitmap & BIT(frag_no)) {
3591 /* Fragment already present */
3596 if (frag_no > __fls(rx_tid->rx_frag_bitmap))
3597 __skb_queue_tail(&rx_tid->rx_frags, msdu);
3599 ath11k_dp_rx_h_sort_frags(ar, &rx_tid->rx_frags, msdu);
3601 rx_tid->rx_frag_bitmap |= BIT(frag_no);
3603 rx_tid->last_frag_no = frag_no;
3606 rx_tid->dst_ring_desc = kmemdup(ring_desc,
3607 sizeof(*rx_tid->dst_ring_desc),
3609 if (!rx_tid->dst_ring_desc) {
3614 ath11k_dp_rx_link_desc_return(ab, ring_desc,
3615 HAL_WBM_REL_BM_ACT_PUT_IN_IDLE);
3618 if (!rx_tid->last_frag_no ||
3619 rx_tid->rx_frag_bitmap != GENMASK(rx_tid->last_frag_no, 0)) {
3620 mod_timer(&rx_tid->frag_timer, jiffies +
3621 ATH11K_DP_RX_FRAGMENT_TIMEOUT_MS);
3625 spin_unlock_bh(&ab->base_lock);
3626 del_timer_sync(&rx_tid->frag_timer);
3627 spin_lock_bh(&ab->base_lock);
3629 peer = ath11k_peer_find_by_id(ab, peer_id);
3631 goto err_frags_cleanup;
3633 if (!ath11k_dp_rx_h_defrag_validate_incr_pn(ar, rx_tid))
3634 goto err_frags_cleanup;
3636 if (ath11k_dp_rx_h_defrag(ar, peer, rx_tid, &defrag_skb))
3637 goto err_frags_cleanup;
3640 goto err_frags_cleanup;
3642 if (ath11k_dp_rx_h_defrag_reo_reinject(ar, rx_tid, defrag_skb))
3643 goto err_frags_cleanup;
3645 ath11k_dp_rx_frags_cleanup(rx_tid, false);
3649 dev_kfree_skb_any(defrag_skb);
3650 ath11k_dp_rx_frags_cleanup(rx_tid, true);
3652 spin_unlock_bh(&ab->base_lock);
3657 ath11k_dp_process_rx_err_buf(struct ath11k *ar, u32 *ring_desc, int buf_id, bool drop)
3659 struct ath11k_pdev_dp *dp = &ar->dp;
3660 struct dp_rxdma_ring *rx_ring = &dp->rx_refill_buf_ring;
3661 struct sk_buff *msdu;
3662 struct ath11k_skb_rxcb *rxcb;
3663 struct hal_rx_desc *rx_desc;
3666 u32 hal_rx_desc_sz = ar->ab->hw_params.hal_desc_sz;
3668 spin_lock_bh(&rx_ring->idr_lock);
3669 msdu = idr_find(&rx_ring->bufs_idr, buf_id);
3671 ath11k_warn(ar->ab, "rx err buf with invalid buf_id %d\n",
3673 spin_unlock_bh(&rx_ring->idr_lock);
3677 idr_remove(&rx_ring->bufs_idr, buf_id);
3678 spin_unlock_bh(&rx_ring->idr_lock);
3680 rxcb = ATH11K_SKB_RXCB(msdu);
3681 dma_unmap_single(ar->ab->dev, rxcb->paddr,
3682 msdu->len + skb_tailroom(msdu),
3686 dev_kfree_skb_any(msdu);
3691 if (!rcu_dereference(ar->ab->pdevs_active[ar->pdev_idx])) {
3692 dev_kfree_skb_any(msdu);
3696 if (test_bit(ATH11K_CAC_RUNNING, &ar->dev_flags)) {
3697 dev_kfree_skb_any(msdu);
3701 rx_desc = (struct hal_rx_desc *)msdu->data;
3702 msdu_len = ath11k_dp_rx_h_msdu_start_msdu_len(ar->ab, rx_desc);
3703 if ((msdu_len + hal_rx_desc_sz) > DP_RX_BUFFER_SIZE) {
3704 hdr_status = ath11k_dp_rx_h_80211_hdr(ar->ab, rx_desc);
3705 ath11k_warn(ar->ab, "invalid msdu leng %u", msdu_len);
3706 ath11k_dbg_dump(ar->ab, ATH11K_DBG_DATA, NULL, "", hdr_status,
3707 sizeof(struct ieee80211_hdr));
3708 ath11k_dbg_dump(ar->ab, ATH11K_DBG_DATA, NULL, "", rx_desc,
3709 sizeof(struct hal_rx_desc));
3710 dev_kfree_skb_any(msdu);
3714 skb_put(msdu, hal_rx_desc_sz + msdu_len);
3716 if (ath11k_dp_rx_frag_h_mpdu(ar, msdu, ring_desc)) {
3717 dev_kfree_skb_any(msdu);
3718 ath11k_dp_rx_link_desc_return(ar->ab, ring_desc,
3719 HAL_WBM_REL_BM_ACT_PUT_IN_IDLE);
3726 int ath11k_dp_process_rx_err(struct ath11k_base *ab, struct napi_struct *napi,
3729 u32 msdu_cookies[HAL_NUM_RX_MSDUS_PER_LINK_DESC];
3730 struct dp_link_desc_bank *link_desc_banks;
3731 enum hal_rx_buf_return_buf_manager rbm;
3732 int tot_n_bufs_reaped, quota, ret, i;
3733 int n_bufs_reaped[MAX_RADIOS] = {0};
3734 struct dp_rxdma_ring *rx_ring;
3735 struct dp_srng *reo_except;
3736 u32 desc_bank, num_msdus;
3737 struct hal_srng *srng;
3738 struct ath11k_dp *dp;
3747 tot_n_bufs_reaped = 0;
3751 reo_except = &dp->reo_except_ring;
3752 link_desc_banks = dp->link_desc_banks;
3754 srng = &ab->hal.srng_list[reo_except->ring_id];
3756 spin_lock_bh(&srng->lock);
3758 ath11k_hal_srng_access_begin(ab, srng);
3761 (desc = ath11k_hal_srng_dst_get_next_entry(ab, srng))) {
3762 struct hal_reo_dest_ring *reo_desc = (struct hal_reo_dest_ring *)desc;
3764 ab->soc_stats.err_ring_pkts++;
3765 ret = ath11k_hal_desc_reo_parse_err(ab, desc, &paddr,
3768 ath11k_warn(ab, "failed to parse error reo desc %d\n",
3772 link_desc_va = link_desc_banks[desc_bank].vaddr +
3773 (paddr - link_desc_banks[desc_bank].paddr);
3774 ath11k_hal_rx_msdu_link_info_get(link_desc_va, &num_msdus, msdu_cookies,
3776 if (rbm != HAL_RX_BUF_RBM_WBM_IDLE_DESC_LIST &&
3777 rbm != HAL_RX_BUF_RBM_SW3_BM) {
3778 ab->soc_stats.invalid_rbm++;
3779 ath11k_warn(ab, "invalid return buffer manager %d\n", rbm);
3780 ath11k_dp_rx_link_desc_return(ab, desc,
3781 HAL_WBM_REL_BM_ACT_REL_MSDU);
3785 is_frag = !!(reo_desc->rx_mpdu_info.info0 & RX_MPDU_DESC_INFO0_FRAG_FLAG);
3787 /* Process only rx fragments with one msdu per link desc below, and drop
3788 * msdu's indicated due to error reasons.
3790 if (!is_frag || num_msdus > 1) {
3792 /* Return the link desc back to wbm idle list */
3793 ath11k_dp_rx_link_desc_return(ab, desc,
3794 HAL_WBM_REL_BM_ACT_PUT_IN_IDLE);
3797 for (i = 0; i < num_msdus; i++) {
3798 buf_id = FIELD_GET(DP_RXDMA_BUF_COOKIE_BUF_ID,
3801 mac_id = FIELD_GET(DP_RXDMA_BUF_COOKIE_PDEV_ID,
3804 ar = ab->pdevs[mac_id].ar;
3806 if (!ath11k_dp_process_rx_err_buf(ar, desc, buf_id, drop)) {
3807 n_bufs_reaped[mac_id]++;
3808 tot_n_bufs_reaped++;
3812 if (tot_n_bufs_reaped >= quota) {
3813 tot_n_bufs_reaped = quota;
3817 budget = quota - tot_n_bufs_reaped;
3821 ath11k_hal_srng_access_end(ab, srng);
3823 spin_unlock_bh(&srng->lock);
3825 for (i = 0; i < ab->num_radios; i++) {
3826 if (!n_bufs_reaped[i])
3829 ar = ab->pdevs[i].ar;
3830 rx_ring = &ar->dp.rx_refill_buf_ring;
3832 ath11k_dp_rxbufs_replenish(ab, i, rx_ring, n_bufs_reaped[i],
3833 ab->hw_params.hal_params->rx_buf_rbm);
3836 return tot_n_bufs_reaped;
3839 static void ath11k_dp_rx_null_q_desc_sg_drop(struct ath11k *ar,
3841 struct sk_buff_head *msdu_list)
3843 struct sk_buff *skb, *tmp;
3844 struct ath11k_skb_rxcb *rxcb;
3847 n_buffs = DIV_ROUND_UP(msdu_len,
3848 (DP_RX_BUFFER_SIZE - ar->ab->hw_params.hal_desc_sz));
3850 skb_queue_walk_safe(msdu_list, skb, tmp) {
3851 rxcb = ATH11K_SKB_RXCB(skb);
3852 if (rxcb->err_rel_src == HAL_WBM_REL_SRC_MODULE_REO &&
3853 rxcb->err_code == HAL_REO_DEST_RING_ERROR_CODE_DESC_ADDR_ZERO) {
3856 __skb_unlink(skb, msdu_list);
3857 dev_kfree_skb_any(skb);
3863 static int ath11k_dp_rx_h_null_q_desc(struct ath11k *ar, struct sk_buff *msdu,
3864 struct ieee80211_rx_status *status,
3865 struct sk_buff_head *msdu_list)
3868 struct hal_rx_desc *desc = (struct hal_rx_desc *)msdu->data;
3869 struct rx_attention *rx_attention;
3871 struct ath11k_skb_rxcb *rxcb = ATH11K_SKB_RXCB(msdu);
3872 u32 hal_rx_desc_sz = ar->ab->hw_params.hal_desc_sz;
3874 msdu_len = ath11k_dp_rx_h_msdu_start_msdu_len(ar->ab, desc);
3876 if (!rxcb->is_frag && ((msdu_len + hal_rx_desc_sz) > DP_RX_BUFFER_SIZE)) {
3877 /* First buffer will be freed by the caller, so deduct it's length */
3878 msdu_len = msdu_len - (DP_RX_BUFFER_SIZE - hal_rx_desc_sz);
3879 ath11k_dp_rx_null_q_desc_sg_drop(ar, msdu_len, msdu_list);
3883 rx_attention = ath11k_dp_rx_get_attention(ar->ab, desc);
3884 if (!ath11k_dp_rx_h_attn_msdu_done(rx_attention)) {
3886 "msdu_done bit not set in null_q_des processing\n");
3887 __skb_queue_purge(msdu_list);
3891 /* Handle NULL queue descriptor violations arising out a missing
3892 * REO queue for a given peer or a given TID. This typically
3893 * may happen if a packet is received on a QOS enabled TID before the
3894 * ADDBA negotiation for that TID, when the TID queue is setup. Or
3895 * it may also happen for MC/BC frames if they are not routed to the
3896 * non-QOS TID queue, in the absence of any other default TID queue.
3897 * This error can show up both in a REO destination or WBM release ring.
3900 rxcb->is_first_msdu = ath11k_dp_rx_h_msdu_end_first_msdu(ar->ab, desc);
3901 rxcb->is_last_msdu = ath11k_dp_rx_h_msdu_end_last_msdu(ar->ab, desc);
3903 if (rxcb->is_frag) {
3904 skb_pull(msdu, hal_rx_desc_sz);
3906 l3pad_bytes = ath11k_dp_rx_h_msdu_end_l3pad(ar->ab, desc);
3908 if ((hal_rx_desc_sz + l3pad_bytes + msdu_len) > DP_RX_BUFFER_SIZE)
3911 skb_put(msdu, hal_rx_desc_sz + l3pad_bytes + msdu_len);
3912 skb_pull(msdu, hal_rx_desc_sz + l3pad_bytes);
3914 ath11k_dp_rx_h_ppdu(ar, desc, status);
3916 ath11k_dp_rx_h_mpdu(ar, msdu, desc, status);
3918 rxcb->tid = ath11k_dp_rx_h_mpdu_start_tid(ar->ab, desc);
3920 /* Please note that caller will having the access to msdu and completing
3921 * rx with mac80211. Need not worry about cleaning up amsdu_list.
3927 static bool ath11k_dp_rx_h_reo_err(struct ath11k *ar, struct sk_buff *msdu,
3928 struct ieee80211_rx_status *status,
3929 struct sk_buff_head *msdu_list)
3931 struct ath11k_skb_rxcb *rxcb = ATH11K_SKB_RXCB(msdu);
3934 ar->ab->soc_stats.reo_error[rxcb->err_code]++;
3936 switch (rxcb->err_code) {
3937 case HAL_REO_DEST_RING_ERROR_CODE_DESC_ADDR_ZERO:
3938 if (ath11k_dp_rx_h_null_q_desc(ar, msdu, status, msdu_list))
3941 case HAL_REO_DEST_RING_ERROR_CODE_PN_CHECK_FAILED:
3942 /* TODO: Do not drop PN failed packets in the driver;
3943 * instead, it is good to drop such packets in mac80211
3944 * after incrementing the replay counters.
3948 /* TODO: Review other errors and process them to mac80211
3958 static void ath11k_dp_rx_h_tkip_mic_err(struct ath11k *ar, struct sk_buff *msdu,
3959 struct ieee80211_rx_status *status)
3962 struct hal_rx_desc *desc = (struct hal_rx_desc *)msdu->data;
3964 struct ath11k_skb_rxcb *rxcb = ATH11K_SKB_RXCB(msdu);
3965 u32 hal_rx_desc_sz = ar->ab->hw_params.hal_desc_sz;
3967 rxcb->is_first_msdu = ath11k_dp_rx_h_msdu_end_first_msdu(ar->ab, desc);
3968 rxcb->is_last_msdu = ath11k_dp_rx_h_msdu_end_last_msdu(ar->ab, desc);
3970 l3pad_bytes = ath11k_dp_rx_h_msdu_end_l3pad(ar->ab, desc);
3971 msdu_len = ath11k_dp_rx_h_msdu_start_msdu_len(ar->ab, desc);
3972 skb_put(msdu, hal_rx_desc_sz + l3pad_bytes + msdu_len);
3973 skb_pull(msdu, hal_rx_desc_sz + l3pad_bytes);
3975 ath11k_dp_rx_h_ppdu(ar, desc, status);
3977 status->flag |= (RX_FLAG_MMIC_STRIPPED | RX_FLAG_MMIC_ERROR |
3980 ath11k_dp_rx_h_undecap(ar, msdu, desc,
3981 HAL_ENCRYPT_TYPE_TKIP_MIC, status, false);
3984 static bool ath11k_dp_rx_h_rxdma_err(struct ath11k *ar, struct sk_buff *msdu,
3985 struct ieee80211_rx_status *status)
3987 struct ath11k_skb_rxcb *rxcb = ATH11K_SKB_RXCB(msdu);
3990 ar->ab->soc_stats.rxdma_error[rxcb->err_code]++;
3992 switch (rxcb->err_code) {
3993 case HAL_REO_ENTR_RING_RXDMA_ECODE_TKIP_MIC_ERR:
3994 ath11k_dp_rx_h_tkip_mic_err(ar, msdu, status);
3997 /* TODO: Review other rxdma error code to check if anything is
3998 * worth reporting to mac80211
4007 static void ath11k_dp_rx_wbm_err(struct ath11k *ar,
4008 struct napi_struct *napi,
4009 struct sk_buff *msdu,
4010 struct sk_buff_head *msdu_list)
4012 struct ath11k_skb_rxcb *rxcb = ATH11K_SKB_RXCB(msdu);
4013 struct ieee80211_rx_status rxs = {0};
4016 switch (rxcb->err_rel_src) {
4017 case HAL_WBM_REL_SRC_MODULE_REO:
4018 drop = ath11k_dp_rx_h_reo_err(ar, msdu, &rxs, msdu_list);
4020 case HAL_WBM_REL_SRC_MODULE_RXDMA:
4021 drop = ath11k_dp_rx_h_rxdma_err(ar, msdu, &rxs);
4024 /* msdu will get freed */
4029 dev_kfree_skb_any(msdu);
4033 ath11k_dp_rx_deliver_msdu(ar, napi, msdu, &rxs);
4036 int ath11k_dp_rx_process_wbm_err(struct ath11k_base *ab,
4037 struct napi_struct *napi, int budget)
4040 struct ath11k_dp *dp = &ab->dp;
4041 struct dp_rxdma_ring *rx_ring;
4042 struct hal_rx_wbm_rel_info err_info;
4043 struct hal_srng *srng;
4044 struct sk_buff *msdu;
4045 struct sk_buff_head msdu_list[MAX_RADIOS];
4046 struct ath11k_skb_rxcb *rxcb;
4049 int num_buffs_reaped[MAX_RADIOS] = {0};
4050 int total_num_buffs_reaped = 0;
4053 for (i = 0; i < ab->num_radios; i++)
4054 __skb_queue_head_init(&msdu_list[i]);
4056 srng = &ab->hal.srng_list[dp->rx_rel_ring.ring_id];
4058 spin_lock_bh(&srng->lock);
4060 ath11k_hal_srng_access_begin(ab, srng);
4063 rx_desc = ath11k_hal_srng_dst_get_next_entry(ab, srng);
4067 ret = ath11k_hal_wbm_desc_parse_err(ab, rx_desc, &err_info);
4070 "failed to parse rx error in wbm_rel ring desc %d\n",
4075 buf_id = FIELD_GET(DP_RXDMA_BUF_COOKIE_BUF_ID, err_info.cookie);
4076 mac_id = FIELD_GET(DP_RXDMA_BUF_COOKIE_PDEV_ID, err_info.cookie);
4078 ar = ab->pdevs[mac_id].ar;
4079 rx_ring = &ar->dp.rx_refill_buf_ring;
4081 spin_lock_bh(&rx_ring->idr_lock);
4082 msdu = idr_find(&rx_ring->bufs_idr, buf_id);
4084 ath11k_warn(ab, "frame rx with invalid buf_id %d pdev %d\n",
4086 spin_unlock_bh(&rx_ring->idr_lock);
4090 idr_remove(&rx_ring->bufs_idr, buf_id);
4091 spin_unlock_bh(&rx_ring->idr_lock);
4093 rxcb = ATH11K_SKB_RXCB(msdu);
4094 dma_unmap_single(ab->dev, rxcb->paddr,
4095 msdu->len + skb_tailroom(msdu),
4098 num_buffs_reaped[mac_id]++;
4099 total_num_buffs_reaped++;
4102 if (err_info.push_reason !=
4103 HAL_REO_DEST_RING_PUSH_REASON_ERR_DETECTED) {
4104 dev_kfree_skb_any(msdu);
4108 rxcb->err_rel_src = err_info.err_rel_src;
4109 rxcb->err_code = err_info.err_code;
4110 rxcb->rx_desc = (struct hal_rx_desc *)msdu->data;
4111 __skb_queue_tail(&msdu_list[mac_id], msdu);
4114 ath11k_hal_srng_access_end(ab, srng);
4116 spin_unlock_bh(&srng->lock);
4118 if (!total_num_buffs_reaped)
4121 for (i = 0; i < ab->num_radios; i++) {
4122 if (!num_buffs_reaped[i])
4125 ar = ab->pdevs[i].ar;
4126 rx_ring = &ar->dp.rx_refill_buf_ring;
4128 ath11k_dp_rxbufs_replenish(ab, i, rx_ring, num_buffs_reaped[i],
4129 ab->hw_params.hal_params->rx_buf_rbm);
4133 for (i = 0; i < ab->num_radios; i++) {
4134 if (!rcu_dereference(ab->pdevs_active[i])) {
4135 __skb_queue_purge(&msdu_list[i]);
4139 ar = ab->pdevs[i].ar;
4141 if (test_bit(ATH11K_CAC_RUNNING, &ar->dev_flags)) {
4142 __skb_queue_purge(&msdu_list[i]);
4146 while ((msdu = __skb_dequeue(&msdu_list[i])) != NULL)
4147 ath11k_dp_rx_wbm_err(ar, napi, msdu, &msdu_list[i]);
4151 return total_num_buffs_reaped;
4154 int ath11k_dp_process_rxdma_err(struct ath11k_base *ab, int mac_id, int budget)
4157 struct dp_srng *err_ring;
4158 struct dp_rxdma_ring *rx_ring;
4159 struct dp_link_desc_bank *link_desc_banks = ab->dp.link_desc_banks;
4160 struct hal_srng *srng;
4161 u32 msdu_cookies[HAL_NUM_RX_MSDUS_PER_LINK_DESC];
4162 enum hal_rx_buf_return_buf_manager rbm;
4163 enum hal_reo_entr_rxdma_ecode rxdma_err_code;
4164 struct ath11k_skb_rxcb *rxcb;
4165 struct sk_buff *skb;
4166 struct hal_reo_entrance_ring *entr_ring;
4168 int num_buf_freed = 0;
4177 ar = ab->pdevs[ath11k_hw_mac_id_to_pdev_id(&ab->hw_params, mac_id)].ar;
4178 err_ring = &ar->dp.rxdma_err_dst_ring[ath11k_hw_mac_id_to_srng_id(&ab->hw_params,
4180 rx_ring = &ar->dp.rx_refill_buf_ring;
4182 srng = &ab->hal.srng_list[err_ring->ring_id];
4184 spin_lock_bh(&srng->lock);
4186 ath11k_hal_srng_access_begin(ab, srng);
4189 (desc = ath11k_hal_srng_dst_get_next_entry(ab, srng))) {
4190 ath11k_hal_rx_reo_ent_paddr_get(ab, desc, &paddr, &desc_bank);
4192 entr_ring = (struct hal_reo_entrance_ring *)desc;
4194 FIELD_GET(HAL_REO_ENTR_RING_INFO1_RXDMA_ERROR_CODE,
4196 ab->soc_stats.rxdma_error[rxdma_err_code]++;
4198 link_desc_va = link_desc_banks[desc_bank].vaddr +
4199 (paddr - link_desc_banks[desc_bank].paddr);
4200 ath11k_hal_rx_msdu_link_info_get(link_desc_va, &num_msdus,
4201 msdu_cookies, &rbm);
4203 for (i = 0; i < num_msdus; i++) {
4204 buf_id = FIELD_GET(DP_RXDMA_BUF_COOKIE_BUF_ID,
4207 spin_lock_bh(&rx_ring->idr_lock);
4208 skb = idr_find(&rx_ring->bufs_idr, buf_id);
4210 ath11k_warn(ab, "rxdma error with invalid buf_id %d\n",
4212 spin_unlock_bh(&rx_ring->idr_lock);
4216 idr_remove(&rx_ring->bufs_idr, buf_id);
4217 spin_unlock_bh(&rx_ring->idr_lock);
4219 rxcb = ATH11K_SKB_RXCB(skb);
4220 dma_unmap_single(ab->dev, rxcb->paddr,
4221 skb->len + skb_tailroom(skb),
4223 dev_kfree_skb_any(skb);
4228 ath11k_dp_rx_link_desc_return(ab, desc,
4229 HAL_WBM_REL_BM_ACT_PUT_IN_IDLE);
4232 ath11k_hal_srng_access_end(ab, srng);
4234 spin_unlock_bh(&srng->lock);
4237 ath11k_dp_rxbufs_replenish(ab, mac_id, rx_ring, num_buf_freed,
4238 ab->hw_params.hal_params->rx_buf_rbm);
4240 return budget - quota;
4243 void ath11k_dp_process_reo_status(struct ath11k_base *ab)
4245 struct ath11k_dp *dp = &ab->dp;
4246 struct hal_srng *srng;
4247 struct dp_reo_cmd *cmd, *tmp;
4251 struct hal_reo_status reo_status;
4253 srng = &ab->hal.srng_list[dp->reo_status_ring.ring_id];
4255 memset(&reo_status, 0, sizeof(reo_status));
4257 spin_lock_bh(&srng->lock);
4259 ath11k_hal_srng_access_begin(ab, srng);
4261 while ((reo_desc = ath11k_hal_srng_dst_get_next_entry(ab, srng))) {
4262 tag = FIELD_GET(HAL_SRNG_TLV_HDR_TAG, *reo_desc);
4265 case HAL_REO_GET_QUEUE_STATS_STATUS:
4266 ath11k_hal_reo_status_queue_stats(ab, reo_desc,
4269 case HAL_REO_FLUSH_QUEUE_STATUS:
4270 ath11k_hal_reo_flush_queue_status(ab, reo_desc,
4273 case HAL_REO_FLUSH_CACHE_STATUS:
4274 ath11k_hal_reo_flush_cache_status(ab, reo_desc,
4277 case HAL_REO_UNBLOCK_CACHE_STATUS:
4278 ath11k_hal_reo_unblk_cache_status(ab, reo_desc,
4281 case HAL_REO_FLUSH_TIMEOUT_LIST_STATUS:
4282 ath11k_hal_reo_flush_timeout_list_status(ab, reo_desc,
4285 case HAL_REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS:
4286 ath11k_hal_reo_desc_thresh_reached_status(ab, reo_desc,
4289 case HAL_REO_UPDATE_RX_REO_QUEUE_STATUS:
4290 ath11k_hal_reo_update_rx_reo_queue_status(ab, reo_desc,
4294 ath11k_warn(ab, "Unknown reo status type %d\n", tag);
4298 spin_lock_bh(&dp->reo_cmd_lock);
4299 list_for_each_entry_safe(cmd, tmp, &dp->reo_cmd_list, list) {
4300 if (reo_status.uniform_hdr.cmd_num == cmd->cmd_num) {
4302 list_del(&cmd->list);
4306 spin_unlock_bh(&dp->reo_cmd_lock);
4309 cmd->handler(dp, (void *)&cmd->data,
4310 reo_status.uniform_hdr.cmd_status);
4317 ath11k_hal_srng_access_end(ab, srng);
4319 spin_unlock_bh(&srng->lock);
4322 void ath11k_dp_rx_pdev_free(struct ath11k_base *ab, int mac_id)
4324 struct ath11k *ar = ab->pdevs[mac_id].ar;
4326 ath11k_dp_rx_pdev_srng_free(ar);
4327 ath11k_dp_rxdma_pdev_buf_free(ar);
4330 int ath11k_dp_rx_pdev_alloc(struct ath11k_base *ab, int mac_id)
4332 struct ath11k *ar = ab->pdevs[mac_id].ar;
4333 struct ath11k_pdev_dp *dp = &ar->dp;
4338 ret = ath11k_dp_rx_pdev_srng_alloc(ar);
4340 ath11k_warn(ab, "failed to setup rx srngs\n");
4344 ret = ath11k_dp_rxdma_pdev_buf_setup(ar);
4346 ath11k_warn(ab, "failed to setup rxdma ring\n");
4350 ring_id = dp->rx_refill_buf_ring.refill_buf_ring.ring_id;
4351 ret = ath11k_dp_tx_htt_srng_setup(ab, ring_id, mac_id, HAL_RXDMA_BUF);
4353 ath11k_warn(ab, "failed to configure rx_refill_buf_ring %d\n",
4358 if (ab->hw_params.rx_mac_buf_ring) {
4359 for (i = 0; i < ab->hw_params.num_rxmda_per_pdev; i++) {
4360 ring_id = dp->rx_mac_buf_ring[i].ring_id;
4361 ret = ath11k_dp_tx_htt_srng_setup(ab, ring_id,
4362 mac_id + i, HAL_RXDMA_BUF);
4364 ath11k_warn(ab, "failed to configure rx_mac_buf_ring%d %d\n",
4371 for (i = 0; i < ab->hw_params.num_rxmda_per_pdev; i++) {
4372 ring_id = dp->rxdma_err_dst_ring[i].ring_id;
4373 ret = ath11k_dp_tx_htt_srng_setup(ab, ring_id,
4374 mac_id + i, HAL_RXDMA_DST);
4376 ath11k_warn(ab, "failed to configure rxdma_err_dest_ring%d %d\n",
4382 if (!ab->hw_params.rxdma1_enable)
4383 goto config_refill_ring;
4385 ring_id = dp->rxdma_mon_buf_ring.refill_buf_ring.ring_id;
4386 ret = ath11k_dp_tx_htt_srng_setup(ab, ring_id,
4387 mac_id, HAL_RXDMA_MONITOR_BUF);
4389 ath11k_warn(ab, "failed to configure rxdma_mon_buf_ring %d\n",
4393 ret = ath11k_dp_tx_htt_srng_setup(ab,
4394 dp->rxdma_mon_dst_ring.ring_id,
4395 mac_id, HAL_RXDMA_MONITOR_DST);
4397 ath11k_warn(ab, "failed to configure rxdma_mon_dst_ring %d\n",
4401 ret = ath11k_dp_tx_htt_srng_setup(ab,
4402 dp->rxdma_mon_desc_ring.ring_id,
4403 mac_id, HAL_RXDMA_MONITOR_DESC);
4405 ath11k_warn(ab, "failed to configure rxdma_mon_dst_ring %d\n",
4411 for (i = 0; i < ab->hw_params.num_rxmda_per_pdev; i++) {
4412 ring_id = dp->rx_mon_status_refill_ring[i].refill_buf_ring.ring_id;
4413 ret = ath11k_dp_tx_htt_srng_setup(ab, ring_id, mac_id + i,
4414 HAL_RXDMA_MONITOR_STATUS);
4417 "failed to configure mon_status_refill_ring%d %d\n",
4426 static void ath11k_dp_mon_set_frag_len(u32 *total_len, u32 *frag_len)
4428 if (*total_len >= (DP_RX_BUFFER_SIZE - sizeof(struct hal_rx_desc))) {
4429 *frag_len = DP_RX_BUFFER_SIZE - sizeof(struct hal_rx_desc);
4430 *total_len -= *frag_len;
4432 *frag_len = *total_len;
4438 int ath11k_dp_rx_monitor_link_desc_return(struct ath11k *ar,
4439 void *p_last_buf_addr_info,
4442 struct ath11k_pdev_dp *dp = &ar->dp;
4443 struct dp_srng *dp_srng;
4445 void *src_srng_desc;
4448 if (ar->ab->hw_params.rxdma1_enable) {
4449 dp_srng = &dp->rxdma_mon_desc_ring;
4450 hal_srng = &ar->ab->hal.srng_list[dp_srng->ring_id];
4452 dp_srng = &ar->ab->dp.wbm_desc_rel_ring;
4453 hal_srng = &ar->ab->hal.srng_list[dp_srng->ring_id];
4456 ath11k_hal_srng_access_begin(ar->ab, hal_srng);
4458 src_srng_desc = ath11k_hal_srng_src_get_next_entry(ar->ab, hal_srng);
4460 if (src_srng_desc) {
4461 struct ath11k_buffer_addr *src_desc =
4462 (struct ath11k_buffer_addr *)src_srng_desc;
4464 *src_desc = *((struct ath11k_buffer_addr *)p_last_buf_addr_info);
4466 ath11k_dbg(ar->ab, ATH11K_DBG_DATA,
4467 "Monitor Link Desc Ring %d Full", mac_id);
4471 ath11k_hal_srng_access_end(ar->ab, hal_srng);
4476 void ath11k_dp_rx_mon_next_link_desc_get(void *rx_msdu_link_desc,
4477 dma_addr_t *paddr, u32 *sw_cookie,
4479 void **pp_buf_addr_info)
4481 struct hal_rx_msdu_link *msdu_link =
4482 (struct hal_rx_msdu_link *)rx_msdu_link_desc;
4483 struct ath11k_buffer_addr *buf_addr_info;
4485 buf_addr_info = (struct ath11k_buffer_addr *)&msdu_link->buf_addr_info;
4487 ath11k_hal_rx_buf_addr_info_get(buf_addr_info, paddr, sw_cookie, rbm);
4489 *pp_buf_addr_info = (void *)buf_addr_info;
4492 static int ath11k_dp_pkt_set_pktlen(struct sk_buff *skb, u32 len)
4494 if (skb->len > len) {
4497 if (skb_tailroom(skb) < len - skb->len) {
4498 if ((pskb_expand_head(skb, 0,
4499 len - skb->len - skb_tailroom(skb),
4501 dev_kfree_skb_any(skb);
4505 skb_put(skb, (len - skb->len));
4510 static void ath11k_hal_rx_msdu_list_get(struct ath11k *ar,
4511 void *msdu_link_desc,
4512 struct hal_rx_msdu_list *msdu_list,
4515 struct hal_rx_msdu_details *msdu_details = NULL;
4516 struct rx_msdu_desc *msdu_desc_info = NULL;
4517 struct hal_rx_msdu_link *msdu_link = NULL;
4519 u32 last = FIELD_PREP(RX_MSDU_DESC_INFO0_LAST_MSDU_IN_MPDU, 1);
4520 u32 first = FIELD_PREP(RX_MSDU_DESC_INFO0_FIRST_MSDU_IN_MPDU, 1);
4523 msdu_link = (struct hal_rx_msdu_link *)msdu_link_desc;
4524 msdu_details = &msdu_link->msdu_link[0];
4526 for (i = 0; i < HAL_RX_NUM_MSDU_DESC; i++) {
4527 if (FIELD_GET(BUFFER_ADDR_INFO0_ADDR,
4528 msdu_details[i].buf_addr_info.info0) == 0) {
4529 msdu_desc_info = &msdu_details[i - 1].rx_msdu_info;
4530 msdu_desc_info->info0 |= last;
4534 msdu_desc_info = &msdu_details[i].rx_msdu_info;
4537 msdu_desc_info->info0 |= first;
4538 else if (i == (HAL_RX_NUM_MSDU_DESC - 1))
4539 msdu_desc_info->info0 |= last;
4540 msdu_list->msdu_info[i].msdu_flags = msdu_desc_info->info0;
4541 msdu_list->msdu_info[i].msdu_len =
4542 HAL_RX_MSDU_PKT_LENGTH_GET(msdu_desc_info->info0);
4543 msdu_list->sw_cookie[i] =
4544 FIELD_GET(BUFFER_ADDR_INFO1_SW_COOKIE,
4545 msdu_details[i].buf_addr_info.info1);
4546 tmp = FIELD_GET(BUFFER_ADDR_INFO1_RET_BUF_MGR,
4547 msdu_details[i].buf_addr_info.info1);
4548 msdu_list->rbm[i] = tmp;
4553 static u32 ath11k_dp_rx_mon_comp_ppduid(u32 msdu_ppdu_id, u32 *ppdu_id,
4558 if ((*ppdu_id < msdu_ppdu_id) &&
4559 ((msdu_ppdu_id - *ppdu_id) < DP_NOT_PPDU_ID_WRAP_AROUND)) {
4560 *ppdu_id = msdu_ppdu_id;
4562 } else if ((*ppdu_id > msdu_ppdu_id) &&
4563 ((*ppdu_id - msdu_ppdu_id) > DP_NOT_PPDU_ID_WRAP_AROUND)) {
4564 /* mon_dst is behind than mon_status
4565 * skip dst_ring and free it
4568 *ppdu_id = msdu_ppdu_id;
4574 static void ath11k_dp_mon_get_buf_len(struct hal_rx_msdu_desc_info *info,
4575 bool *is_frag, u32 *total_len,
4576 u32 *frag_len, u32 *msdu_cnt)
4578 if (info->msdu_flags & RX_MSDU_DESC_INFO0_MSDU_CONTINUATION) {
4580 *total_len = info->msdu_len;
4583 ath11k_dp_mon_set_frag_len(total_len,
4587 ath11k_dp_mon_set_frag_len(total_len,
4590 *frag_len = info->msdu_len;
4598 ath11k_dp_rx_mon_mpdu_pop(struct ath11k *ar, int mac_id,
4599 void *ring_entry, struct sk_buff **head_msdu,
4600 struct sk_buff **tail_msdu, u32 *npackets,
4603 struct ath11k_pdev_dp *dp = &ar->dp;
4604 struct ath11k_mon_data *pmon = (struct ath11k_mon_data *)&dp->mon_data;
4605 struct dp_rxdma_ring *rx_ring = &dp->rxdma_mon_buf_ring;
4606 struct sk_buff *msdu = NULL, *last = NULL;
4607 struct hal_rx_msdu_list msdu_list;
4608 void *p_buf_addr_info, *p_last_buf_addr_info;
4609 struct hal_rx_desc *rx_desc;
4610 void *rx_msdu_link_desc;
4613 u32 rx_buf_size, rx_pkt_offset, sw_cookie;
4614 u32 rx_bufs_used = 0, i = 0;
4615 u32 msdu_ppdu_id = 0, msdu_cnt = 0;
4616 u32 total_len = 0, frag_len = 0;
4617 bool is_frag, is_first_msdu;
4618 bool drop_mpdu = false;
4619 struct ath11k_skb_rxcb *rxcb;
4620 struct hal_reo_entrance_ring *ent_desc =
4621 (struct hal_reo_entrance_ring *)ring_entry;
4623 u32 rx_link_buf_info[2];
4626 if (!ar->ab->hw_params.rxdma1_enable)
4627 rx_ring = &dp->rx_refill_buf_ring;
4629 ath11k_hal_rx_reo_ent_buf_paddr_get(ring_entry, &paddr,
4631 &p_last_buf_addr_info, &rbm,
4634 if (FIELD_GET(HAL_REO_ENTR_RING_INFO1_RXDMA_PUSH_REASON,
4636 HAL_REO_DEST_RING_PUSH_REASON_ERR_DETECTED) {
4638 FIELD_GET(HAL_REO_ENTR_RING_INFO1_RXDMA_ERROR_CODE,
4640 if (rxdma_err == HAL_REO_ENTR_RING_RXDMA_ECODE_FLUSH_REQUEST_ERR ||
4641 rxdma_err == HAL_REO_ENTR_RING_RXDMA_ECODE_MPDU_LEN_ERR ||
4642 rxdma_err == HAL_REO_ENTR_RING_RXDMA_ECODE_OVERFLOW_ERR) {
4644 pmon->rx_mon_stats.dest_mpdu_drop++;
4649 is_first_msdu = true;
4652 if (pmon->mon_last_linkdesc_paddr == paddr) {
4653 pmon->rx_mon_stats.dup_mon_linkdesc_cnt++;
4654 return rx_bufs_used;
4657 if (ar->ab->hw_params.rxdma1_enable)
4659 (void *)pmon->link_desc_banks[sw_cookie].vaddr +
4660 (paddr - pmon->link_desc_banks[sw_cookie].paddr);
4663 (void *)ar->ab->dp.link_desc_banks[sw_cookie].vaddr +
4664 (paddr - ar->ab->dp.link_desc_banks[sw_cookie].paddr);
4666 ath11k_hal_rx_msdu_list_get(ar, rx_msdu_link_desc, &msdu_list,
4669 for (i = 0; i < num_msdus; i++) {
4672 if (pmon->mon_last_buf_cookie == msdu_list.sw_cookie[i]) {
4673 ath11k_dbg(ar->ab, ATH11K_DBG_DATA,
4674 "i %d last_cookie %d is same\n",
4675 i, pmon->mon_last_buf_cookie);
4677 pmon->rx_mon_stats.dup_mon_buf_cnt++;
4680 buf_id = FIELD_GET(DP_RXDMA_BUF_COOKIE_BUF_ID,
4681 msdu_list.sw_cookie[i]);
4683 spin_lock_bh(&rx_ring->idr_lock);
4684 msdu = idr_find(&rx_ring->bufs_idr, buf_id);
4685 spin_unlock_bh(&rx_ring->idr_lock);
4687 ath11k_dbg(ar->ab, ATH11K_DBG_DATA,
4688 "msdu_pop: invalid buf_id %d\n", buf_id);
4691 rxcb = ATH11K_SKB_RXCB(msdu);
4692 if (!rxcb->unmapped) {
4693 dma_unmap_single(ar->ab->dev, rxcb->paddr,
4700 ath11k_dbg(ar->ab, ATH11K_DBG_DATA,
4701 "i %d drop msdu %p *ppdu_id %x\n",
4703 dev_kfree_skb_any(msdu);
4708 rx_desc = (struct hal_rx_desc *)msdu->data;
4710 rx_pkt_offset = sizeof(struct hal_rx_desc);
4711 l2_hdr_offset = ath11k_dp_rx_h_msdu_end_l3pad(ar->ab, rx_desc);
4713 if (is_first_msdu) {
4714 if (!ath11k_dp_rxdesc_mpdu_valid(ar->ab, rx_desc)) {
4716 dev_kfree_skb_any(msdu);
4718 pmon->mon_last_linkdesc_paddr = paddr;
4723 ath11k_dp_rxdesc_get_ppduid(ar->ab, rx_desc);
4725 if (ath11k_dp_rx_mon_comp_ppduid(msdu_ppdu_id,
4730 dev_kfree_skb_any(msdu);
4734 return rx_bufs_used;
4736 pmon->mon_last_linkdesc_paddr = paddr;
4737 is_first_msdu = false;
4739 ath11k_dp_mon_get_buf_len(&msdu_list.msdu_info[i],
4740 &is_frag, &total_len,
4741 &frag_len, &msdu_cnt);
4742 rx_buf_size = rx_pkt_offset + l2_hdr_offset + frag_len;
4744 ath11k_dp_pkt_set_pktlen(msdu, rx_buf_size);
4753 pmon->mon_last_buf_cookie = msdu_list.sw_cookie[i];
4755 spin_lock_bh(&rx_ring->idr_lock);
4756 idr_remove(&rx_ring->bufs_idr, buf_id);
4757 spin_unlock_bh(&rx_ring->idr_lock);
4760 ath11k_hal_rx_buf_addr_info_set(rx_link_buf_info, paddr, sw_cookie, rbm);
4762 ath11k_dp_rx_mon_next_link_desc_get(rx_msdu_link_desc, &paddr,
4766 if (ar->ab->hw_params.rxdma1_enable) {
4767 if (ath11k_dp_rx_monitor_link_desc_return(ar,
4768 p_last_buf_addr_info,
4770 ath11k_dbg(ar->ab, ATH11K_DBG_DATA,
4771 "dp_rx_monitor_link_desc_return failed");
4773 ath11k_dp_rx_link_desc_return(ar->ab, rx_link_buf_info,
4774 HAL_WBM_REL_BM_ACT_PUT_IN_IDLE);
4777 p_last_buf_addr_info = p_buf_addr_info;
4779 } while (paddr && msdu_cnt);
4789 return rx_bufs_used;
4792 static void ath11k_dp_rx_msdus_set_payload(struct ath11k *ar, struct sk_buff *msdu)
4794 u32 rx_pkt_offset, l2_hdr_offset;
4796 rx_pkt_offset = ar->ab->hw_params.hal_desc_sz;
4797 l2_hdr_offset = ath11k_dp_rx_h_msdu_end_l3pad(ar->ab,
4798 (struct hal_rx_desc *)msdu->data);
4799 skb_pull(msdu, rx_pkt_offset + l2_hdr_offset);
4802 static struct sk_buff *
4803 ath11k_dp_rx_mon_merg_msdus(struct ath11k *ar,
4804 u32 mac_id, struct sk_buff *head_msdu,
4805 struct sk_buff *last_msdu,
4806 struct ieee80211_rx_status *rxs, bool *fcs_err)
4808 struct ath11k_base *ab = ar->ab;
4809 struct sk_buff *msdu, *prev_buf;
4810 struct hal_rx_desc *rx_desc;
4812 u8 *dest, decap_format;
4813 struct ieee80211_hdr_3addr *wh;
4814 struct rx_attention *rx_attention;
4818 goto err_merge_fail;
4820 rx_desc = (struct hal_rx_desc *)head_msdu->data;
4821 rx_attention = ath11k_dp_rx_get_attention(ab, rx_desc);
4822 err_bitmap = ath11k_dp_rx_h_attn_mpdu_err(rx_attention);
4824 if (err_bitmap & DP_RX_MPDU_ERR_FCS)
4827 if (ath11k_dp_rxdesc_get_mpdulen_err(rx_attention))
4830 decap_format = ath11k_dp_rx_h_msdu_start_decap_type(ab, rx_desc);
4832 ath11k_dp_rx_h_ppdu(ar, rx_desc, rxs);
4834 if (decap_format == DP_RX_DECAP_TYPE_RAW) {
4835 ath11k_dp_rx_msdus_set_payload(ar, head_msdu);
4837 prev_buf = head_msdu;
4838 msdu = head_msdu->next;
4841 ath11k_dp_rx_msdus_set_payload(ar, msdu);
4847 prev_buf->next = NULL;
4849 skb_trim(prev_buf, prev_buf->len - HAL_RX_FCS_LEN);
4850 } else if (decap_format == DP_RX_DECAP_TYPE_NATIVE_WIFI) {
4853 rx_desc = (struct hal_rx_desc *)head_msdu->data;
4854 hdr_desc = ath11k_dp_rxdesc_get_80211hdr(ab, rx_desc);
4857 wh = (struct ieee80211_hdr_3addr *)hdr_desc;
4859 if (ieee80211_is_data_qos(wh->frame_control))
4865 ath11k_dp_rx_msdus_set_payload(ar, msdu);
4867 dest = skb_push(msdu, sizeof(__le16));
4869 goto err_merge_fail;
4870 memcpy(dest, hdr_desc, sizeof(struct ieee80211_qos_hdr));
4875 dest = skb_put(prev_buf, HAL_RX_FCS_LEN);
4877 goto err_merge_fail;
4879 ath11k_dbg(ab, ATH11K_DBG_DATA,
4880 "mpdu_buf %pK mpdu_buf->len %u",
4881 prev_buf, prev_buf->len);
4883 ath11k_dbg(ab, ATH11K_DBG_DATA,
4884 "decap format %d is not supported!\n",
4886 goto err_merge_fail;
4896 ath11k_dp_rx_update_radiotap_he(struct hal_rx_mon_ppdu_info *rx_status,
4901 put_unaligned_le16(rx_status->he_data1, &rtap_buf[rtap_len]);
4904 put_unaligned_le16(rx_status->he_data2, &rtap_buf[rtap_len]);
4907 put_unaligned_le16(rx_status->he_data3, &rtap_buf[rtap_len]);
4910 put_unaligned_le16(rx_status->he_data4, &rtap_buf[rtap_len]);
4913 put_unaligned_le16(rx_status->he_data5, &rtap_buf[rtap_len]);
4916 put_unaligned_le16(rx_status->he_data6, &rtap_buf[rtap_len]);
4920 ath11k_dp_rx_update_radiotap_he_mu(struct hal_rx_mon_ppdu_info *rx_status,
4925 put_unaligned_le16(rx_status->he_flags1, &rtap_buf[rtap_len]);
4928 put_unaligned_le16(rx_status->he_flags2, &rtap_buf[rtap_len]);
4931 rtap_buf[rtap_len] = rx_status->he_RU[0];
4934 rtap_buf[rtap_len] = rx_status->he_RU[1];
4937 rtap_buf[rtap_len] = rx_status->he_RU[2];
4940 rtap_buf[rtap_len] = rx_status->he_RU[3];
4943 static void ath11k_update_radiotap(struct ath11k *ar,
4944 struct hal_rx_mon_ppdu_info *ppduinfo,
4945 struct sk_buff *mon_skb,
4946 struct ieee80211_rx_status *rxs)
4948 struct ieee80211_supported_band *sband;
4951 rxs->flag |= RX_FLAG_MACTIME_START;
4952 rxs->signal = ppduinfo->rssi_comb + ATH11K_DEFAULT_NOISE_FLOOR;
4955 rxs->nss = ppduinfo->nss;
4957 if (ppduinfo->he_mu_flags) {
4958 rxs->flag |= RX_FLAG_RADIOTAP_HE_MU;
4959 rxs->encoding = RX_ENC_HE;
4960 ptr = skb_push(mon_skb, sizeof(struct ieee80211_radiotap_he_mu));
4961 ath11k_dp_rx_update_radiotap_he_mu(ppduinfo, ptr);
4962 } else if (ppduinfo->he_flags) {
4963 rxs->flag |= RX_FLAG_RADIOTAP_HE;
4964 rxs->encoding = RX_ENC_HE;
4965 ptr = skb_push(mon_skb, sizeof(struct ieee80211_radiotap_he));
4966 ath11k_dp_rx_update_radiotap_he(ppduinfo, ptr);
4967 rxs->rate_idx = ppduinfo->rate;
4968 } else if (ppduinfo->vht_flags) {
4969 rxs->encoding = RX_ENC_VHT;
4970 rxs->rate_idx = ppduinfo->rate;
4971 } else if (ppduinfo->ht_flags) {
4972 rxs->encoding = RX_ENC_HT;
4973 rxs->rate_idx = ppduinfo->rate;
4975 rxs->encoding = RX_ENC_LEGACY;
4976 sband = &ar->mac.sbands[rxs->band];
4977 rxs->rate_idx = ath11k_mac_hw_rate_to_idx(sband, ppduinfo->rate,
4978 ppduinfo->cck_flag);
4981 rxs->mactime = ppduinfo->tsft;
4984 static int ath11k_dp_rx_mon_deliver(struct ath11k *ar, u32 mac_id,
4985 struct sk_buff *head_msdu,
4986 struct hal_rx_mon_ppdu_info *ppduinfo,
4987 struct sk_buff *tail_msdu,
4988 struct napi_struct *napi)
4990 struct ath11k_pdev_dp *dp = &ar->dp;
4991 struct sk_buff *mon_skb, *skb_next, *header;
4992 struct ieee80211_rx_status *rxs = &dp->rx_status;
4993 bool fcs_err = false;
4995 mon_skb = ath11k_dp_rx_mon_merg_msdus(ar, mac_id, head_msdu,
4996 tail_msdu, rxs, &fcs_err);
4999 goto mon_deliver_fail;
5006 rxs->flag = RX_FLAG_FAILED_FCS_CRC;
5009 skb_next = mon_skb->next;
5011 rxs->flag &= ~RX_FLAG_AMSDU_MORE;
5013 rxs->flag |= RX_FLAG_AMSDU_MORE;
5015 if (mon_skb == header) {
5017 rxs->flag &= ~RX_FLAG_ALLOW_SAME_PN;
5019 rxs->flag |= RX_FLAG_ALLOW_SAME_PN;
5021 ath11k_update_radiotap(ar, ppduinfo, mon_skb, rxs);
5023 ath11k_dp_rx_deliver_msdu(ar, napi, mon_skb, rxs);
5031 mon_skb = head_msdu;
5033 skb_next = mon_skb->next;
5034 dev_kfree_skb_any(mon_skb);
5040 /* The destination ring processing is stuck if the destination is not
5041 * moving while status ring moves 16 PPDU. The destination ring processing
5042 * skips this destination ring PPDU as a workaround.
5044 #define MON_DEST_RING_STUCK_MAX_CNT 16
5046 static void ath11k_dp_rx_mon_dest_process(struct ath11k *ar, int mac_id,
5047 u32 quota, struct napi_struct *napi)
5049 struct ath11k_pdev_dp *dp = &ar->dp;
5050 struct ath11k_mon_data *pmon = (struct ath11k_mon_data *)&dp->mon_data;
5051 const struct ath11k_hw_hal_params *hal_params;
5057 struct ath11k_pdev_mon_stats *rx_mon_stats;
5059 u32 mpdu_rx_bufs_used;
5061 if (ar->ab->hw_params.rxdma1_enable)
5062 ring_id = dp->rxdma_mon_dst_ring.ring_id;
5064 ring_id = dp->rxdma_err_dst_ring[mac_id].ring_id;
5066 mon_dst_srng = &ar->ab->hal.srng_list[ring_id];
5068 if (!mon_dst_srng) {
5070 "HAL Monitor Destination Ring Init Failed -- %pK",
5075 spin_lock_bh(&pmon->mon_lock);
5077 ath11k_hal_srng_access_begin(ar->ab, mon_dst_srng);
5079 ppdu_id = pmon->mon_ppdu_info.ppdu_id;
5081 rx_mon_stats = &pmon->rx_mon_stats;
5083 while ((ring_entry = ath11k_hal_srng_dst_peek(ar->ab, mon_dst_srng))) {
5084 struct sk_buff *head_msdu, *tail_msdu;
5089 mpdu_rx_bufs_used = ath11k_dp_rx_mon_mpdu_pop(ar, mac_id, ring_entry,
5092 &npackets, &ppdu_id);
5094 rx_bufs_used += mpdu_rx_bufs_used;
5096 if (mpdu_rx_bufs_used) {
5097 dp->mon_dest_ring_stuck_cnt = 0;
5099 dp->mon_dest_ring_stuck_cnt++;
5100 rx_mon_stats->dest_mon_not_reaped++;
5103 if (dp->mon_dest_ring_stuck_cnt > MON_DEST_RING_STUCK_MAX_CNT) {
5104 rx_mon_stats->dest_mon_stuck++;
5105 ath11k_dbg(ar->ab, ATH11K_DBG_DATA,
5106 "status ring ppdu_id=%d dest ring ppdu_id=%d mon_dest_ring_stuck_cnt=%d dest_mon_not_reaped=%u dest_mon_stuck=%u\n",
5107 pmon->mon_ppdu_info.ppdu_id, ppdu_id,
5108 dp->mon_dest_ring_stuck_cnt,
5109 rx_mon_stats->dest_mon_not_reaped,
5110 rx_mon_stats->dest_mon_stuck);
5111 pmon->mon_ppdu_info.ppdu_id = ppdu_id;
5115 if (ppdu_id != pmon->mon_ppdu_info.ppdu_id) {
5116 pmon->mon_ppdu_status = DP_PPDU_STATUS_START;
5117 ath11k_dbg(ar->ab, ATH11K_DBG_DATA,
5118 "dest_rx: new ppdu_id %x != status ppdu_id %x dest_mon_not_reaped = %u dest_mon_stuck = %u\n",
5119 ppdu_id, pmon->mon_ppdu_info.ppdu_id,
5120 rx_mon_stats->dest_mon_not_reaped,
5121 rx_mon_stats->dest_mon_stuck);
5124 if (head_msdu && tail_msdu) {
5125 ath11k_dp_rx_mon_deliver(ar, dp->mac_id, head_msdu,
5126 &pmon->mon_ppdu_info,
5128 rx_mon_stats->dest_mpdu_done++;
5131 ring_entry = ath11k_hal_srng_dst_get_next_entry(ar->ab,
5134 ath11k_hal_srng_access_end(ar->ab, mon_dst_srng);
5136 spin_unlock_bh(&pmon->mon_lock);
5139 rx_mon_stats->dest_ppdu_done++;
5140 hal_params = ar->ab->hw_params.hal_params;
5142 if (ar->ab->hw_params.rxdma1_enable)
5143 ath11k_dp_rxbufs_replenish(ar->ab, dp->mac_id,
5144 &dp->rxdma_mon_buf_ring,
5146 hal_params->rx_buf_rbm);
5148 ath11k_dp_rxbufs_replenish(ar->ab, dp->mac_id,
5149 &dp->rx_refill_buf_ring,
5151 hal_params->rx_buf_rbm);
5155 int ath11k_dp_rx_process_mon_status(struct ath11k_base *ab, int mac_id,
5156 struct napi_struct *napi, int budget)
5158 struct ath11k *ar = ath11k_ab_to_ar(ab, mac_id);
5159 enum hal_rx_mon_status hal_status;
5160 struct sk_buff *skb;
5161 struct sk_buff_head skb_list;
5162 struct ath11k_peer *peer;
5163 struct ath11k_sta *arsta;
5164 int num_buffs_reaped = 0;
5167 struct ath11k_mon_data *pmon = (struct ath11k_mon_data *)&ar->dp.mon_data;
5168 struct ath11k_pdev_mon_stats *rx_mon_stats = &pmon->rx_mon_stats;
5169 struct hal_rx_mon_ppdu_info *ppdu_info = &pmon->mon_ppdu_info;
5171 __skb_queue_head_init(&skb_list);
5173 num_buffs_reaped = ath11k_dp_rx_reap_mon_status_ring(ab, mac_id, &budget,
5175 if (!num_buffs_reaped)
5178 memset(ppdu_info, 0, sizeof(*ppdu_info));
5179 ppdu_info->peer_id = HAL_INVALID_PEERID;
5181 while ((skb = __skb_dequeue(&skb_list))) {
5182 if (ath11k_debugfs_is_pktlog_lite_mode_enabled(ar)) {
5183 log_type = ATH11K_PKTLOG_TYPE_LITE_RX;
5184 rx_buf_sz = DP_RX_BUFFER_SIZE_LITE;
5185 } else if (ath11k_debugfs_is_pktlog_rx_stats_enabled(ar)) {
5186 log_type = ATH11K_PKTLOG_TYPE_RX_STATBUF;
5187 rx_buf_sz = DP_RX_BUFFER_SIZE;
5189 log_type = ATH11K_PKTLOG_TYPE_INVALID;
5193 if (log_type != ATH11K_PKTLOG_TYPE_INVALID)
5194 trace_ath11k_htt_rxdesc(ar, skb->data, log_type, rx_buf_sz);
5196 memset(ppdu_info, 0, sizeof(struct hal_rx_mon_ppdu_info));
5197 hal_status = ath11k_hal_rx_parse_mon_status(ab, ppdu_info, skb);
5199 if (test_bit(ATH11K_FLAG_MONITOR_STARTED, &ar->monitor_flags) &&
5200 pmon->mon_ppdu_status == DP_PPDU_STATUS_START &&
5201 hal_status == HAL_TLV_STATUS_PPDU_DONE) {
5202 rx_mon_stats->status_ppdu_done++;
5203 pmon->mon_ppdu_status = DP_PPDU_STATUS_DONE;
5204 ath11k_dp_rx_mon_dest_process(ar, mac_id, budget, napi);
5205 pmon->mon_ppdu_status = DP_PPDU_STATUS_START;
5208 if (ppdu_info->peer_id == HAL_INVALID_PEERID ||
5209 hal_status != HAL_RX_MON_STATUS_PPDU_DONE) {
5210 dev_kfree_skb_any(skb);
5215 spin_lock_bh(&ab->base_lock);
5216 peer = ath11k_peer_find_by_id(ab, ppdu_info->peer_id);
5218 if (!peer || !peer->sta) {
5219 ath11k_dbg(ab, ATH11K_DBG_DATA,
5220 "failed to find the peer with peer_id %d\n",
5221 ppdu_info->peer_id);
5225 arsta = (struct ath11k_sta *)peer->sta->drv_priv;
5226 ath11k_dp_rx_update_peer_stats(arsta, ppdu_info);
5228 if (ath11k_debugfs_is_pktlog_peer_valid(ar, peer->addr))
5229 trace_ath11k_htt_rxdesc(ar, skb->data, log_type, rx_buf_sz);
5232 spin_unlock_bh(&ab->base_lock);
5235 dev_kfree_skb_any(skb);
5236 memset(ppdu_info, 0, sizeof(*ppdu_info));
5237 ppdu_info->peer_id = HAL_INVALID_PEERID;
5240 return num_buffs_reaped;
5244 ath11k_dp_rx_full_mon_mpdu_pop(struct ath11k *ar,
5245 void *ring_entry, struct sk_buff **head_msdu,
5246 struct sk_buff **tail_msdu,
5247 struct hal_sw_mon_ring_entries *sw_mon_entries)
5249 struct ath11k_pdev_dp *dp = &ar->dp;
5250 struct ath11k_mon_data *pmon = &dp->mon_data;
5251 struct dp_rxdma_ring *rx_ring = &dp->rxdma_mon_buf_ring;
5252 struct sk_buff *msdu = NULL, *last = NULL;
5253 struct hal_sw_monitor_ring *sw_desc = ring_entry;
5254 struct hal_rx_msdu_list msdu_list;
5255 struct hal_rx_desc *rx_desc;
5256 struct ath11k_skb_rxcb *rxcb;
5257 void *rx_msdu_link_desc;
5258 void *p_buf_addr_info, *p_last_buf_addr_info;
5260 u32 rx_buf_size, rx_pkt_offset, l2_hdr_offset;
5261 u32 rx_bufs_used = 0, msdu_cnt = 0;
5262 u32 total_len = 0, frag_len = 0, sw_cookie;
5265 bool is_frag, is_first_msdu;
5266 bool drop_mpdu = false;
5268 ath11k_hal_rx_sw_mon_ring_buf_paddr_get(ring_entry, sw_mon_entries);
5270 sw_cookie = sw_mon_entries->mon_dst_sw_cookie;
5271 sw_mon_entries->end_of_ppdu = false;
5272 sw_mon_entries->drop_ppdu = false;
5273 p_last_buf_addr_info = sw_mon_entries->dst_buf_addr_info;
5274 msdu_cnt = sw_mon_entries->msdu_cnt;
5276 sw_mon_entries->end_of_ppdu =
5277 FIELD_GET(HAL_SW_MON_RING_INFO0_END_OF_PPDU, sw_desc->info0);
5278 if (sw_mon_entries->end_of_ppdu)
5279 return rx_bufs_used;
5281 if (FIELD_GET(HAL_SW_MON_RING_INFO0_RXDMA_PUSH_REASON,
5283 HAL_REO_DEST_RING_PUSH_REASON_ERR_DETECTED) {
5285 FIELD_GET(HAL_SW_MON_RING_INFO0_RXDMA_ERROR_CODE,
5287 if (rxdma_err == HAL_REO_ENTR_RING_RXDMA_ECODE_FLUSH_REQUEST_ERR ||
5288 rxdma_err == HAL_REO_ENTR_RING_RXDMA_ECODE_MPDU_LEN_ERR ||
5289 rxdma_err == HAL_REO_ENTR_RING_RXDMA_ECODE_OVERFLOW_ERR) {
5290 pmon->rx_mon_stats.dest_mpdu_drop++;
5296 is_first_msdu = true;
5300 (u8 *)pmon->link_desc_banks[sw_cookie].vaddr +
5301 (sw_mon_entries->mon_dst_paddr -
5302 pmon->link_desc_banks[sw_cookie].paddr);
5304 ath11k_hal_rx_msdu_list_get(ar, rx_msdu_link_desc, &msdu_list,
5307 for (i = 0; i < num_msdus; i++) {
5308 buf_id = FIELD_GET(DP_RXDMA_BUF_COOKIE_BUF_ID,
5309 msdu_list.sw_cookie[i]);
5311 spin_lock_bh(&rx_ring->idr_lock);
5312 msdu = idr_find(&rx_ring->bufs_idr, buf_id);
5314 ath11k_dbg(ar->ab, ATH11K_DBG_DATA,
5315 "full mon msdu_pop: invalid buf_id %d\n",
5317 spin_unlock_bh(&rx_ring->idr_lock);
5320 idr_remove(&rx_ring->bufs_idr, buf_id);
5321 spin_unlock_bh(&rx_ring->idr_lock);
5323 rxcb = ATH11K_SKB_RXCB(msdu);
5324 if (!rxcb->unmapped) {
5325 dma_unmap_single(ar->ab->dev, rxcb->paddr,
5332 ath11k_dbg(ar->ab, ATH11K_DBG_DATA,
5333 "full mon: i %d drop msdu %p *ppdu_id %x\n",
5334 i, msdu, sw_mon_entries->ppdu_id);
5335 dev_kfree_skb_any(msdu);
5340 rx_desc = (struct hal_rx_desc *)msdu->data;
5342 rx_pkt_offset = sizeof(struct hal_rx_desc);
5343 l2_hdr_offset = ath11k_dp_rx_h_msdu_end_l3pad(ar->ab, rx_desc);
5345 if (is_first_msdu) {
5346 if (!ath11k_dp_rxdesc_mpdu_valid(ar->ab, rx_desc)) {
5348 dev_kfree_skb_any(msdu);
5352 is_first_msdu = false;
5355 ath11k_dp_mon_get_buf_len(&msdu_list.msdu_info[i],
5356 &is_frag, &total_len,
5357 &frag_len, &msdu_cnt);
5359 rx_buf_size = rx_pkt_offset + l2_hdr_offset + frag_len;
5361 ath11k_dp_pkt_set_pktlen(msdu, rx_buf_size);
5373 ath11k_dp_rx_mon_next_link_desc_get(rx_msdu_link_desc,
5374 &sw_mon_entries->mon_dst_paddr,
5375 &sw_mon_entries->mon_dst_sw_cookie,
5379 if (ath11k_dp_rx_monitor_link_desc_return(ar,
5380 p_last_buf_addr_info,
5382 ath11k_dbg(ar->ab, ATH11K_DBG_DATA,
5383 "full mon: dp_rx_monitor_link_desc_return failed\n");
5385 p_last_buf_addr_info = p_buf_addr_info;
5387 } while (sw_mon_entries->mon_dst_paddr && msdu_cnt);
5394 return rx_bufs_used;
5397 static int ath11k_dp_rx_full_mon_prepare_mpdu(struct ath11k_dp *dp,
5398 struct dp_full_mon_mpdu *mon_mpdu,
5399 struct sk_buff *head,
5400 struct sk_buff *tail)
5402 mon_mpdu = kzalloc(sizeof(*mon_mpdu), GFP_ATOMIC);
5406 list_add_tail(&mon_mpdu->list, &dp->dp_full_mon_mpdu_list);
5407 mon_mpdu->head = head;
5408 mon_mpdu->tail = tail;
5413 static void ath11k_dp_rx_full_mon_drop_ppdu(struct ath11k_dp *dp,
5414 struct dp_full_mon_mpdu *mon_mpdu)
5416 struct dp_full_mon_mpdu *tmp;
5417 struct sk_buff *tmp_msdu, *skb_next;
5419 if (list_empty(&dp->dp_full_mon_mpdu_list))
5422 list_for_each_entry_safe(mon_mpdu, tmp, &dp->dp_full_mon_mpdu_list, list) {
5423 list_del(&mon_mpdu->list);
5425 tmp_msdu = mon_mpdu->head;
5427 skb_next = tmp_msdu->next;
5428 dev_kfree_skb_any(tmp_msdu);
5429 tmp_msdu = skb_next;
5436 static int ath11k_dp_rx_full_mon_deliver_ppdu(struct ath11k *ar,
5438 struct ath11k_mon_data *pmon,
5439 struct napi_struct *napi)
5441 struct ath11k_pdev_mon_stats *rx_mon_stats;
5442 struct dp_full_mon_mpdu *tmp;
5443 struct dp_full_mon_mpdu *mon_mpdu = pmon->mon_mpdu;
5444 struct sk_buff *head_msdu, *tail_msdu;
5445 struct ath11k_base *ab = ar->ab;
5446 struct ath11k_dp *dp = &ab->dp;
5449 rx_mon_stats = &pmon->rx_mon_stats;
5451 list_for_each_entry_safe(mon_mpdu, tmp, &dp->dp_full_mon_mpdu_list, list) {
5452 list_del(&mon_mpdu->list);
5453 head_msdu = mon_mpdu->head;
5454 tail_msdu = mon_mpdu->tail;
5455 if (head_msdu && tail_msdu) {
5456 ret = ath11k_dp_rx_mon_deliver(ar, mac_id, head_msdu,
5457 &pmon->mon_ppdu_info,
5459 rx_mon_stats->dest_mpdu_done++;
5460 ath11k_dbg(ar->ab, ATH11K_DBG_DATA, "full mon: deliver ppdu\n");
5469 ath11k_dp_rx_process_full_mon_status_ring(struct ath11k_base *ab, int mac_id,
5470 struct napi_struct *napi, int budget)
5472 struct ath11k *ar = ab->pdevs[mac_id].ar;
5473 struct ath11k_pdev_dp *dp = &ar->dp;
5474 struct ath11k_mon_data *pmon = &dp->mon_data;
5475 struct hal_sw_mon_ring_entries *sw_mon_entries;
5476 int quota = 0, work = 0, count;
5478 sw_mon_entries = &pmon->sw_mon_entries;
5480 while (pmon->hold_mon_dst_ring) {
5481 quota = ath11k_dp_rx_process_mon_status(ab, mac_id,
5483 if (pmon->buf_state == DP_MON_STATUS_MATCH) {
5484 count = sw_mon_entries->status_buf_count;
5486 quota += ath11k_dp_rx_process_mon_status(ab, mac_id,
5490 ath11k_dp_rx_full_mon_deliver_ppdu(ar, dp->mac_id,
5492 pmon->hold_mon_dst_ring = false;
5493 } else if (!pmon->mon_status_paddr ||
5494 pmon->buf_state == DP_MON_STATUS_LEAD) {
5495 sw_mon_entries->drop_ppdu = true;
5496 pmon->hold_mon_dst_ring = false;
5505 if (sw_mon_entries->drop_ppdu)
5506 ath11k_dp_rx_full_mon_drop_ppdu(&ab->dp, pmon->mon_mpdu);
5511 static int ath11k_dp_full_mon_process_rx(struct ath11k_base *ab, int mac_id,
5512 struct napi_struct *napi, int budget)
5514 struct ath11k *ar = ab->pdevs[mac_id].ar;
5515 struct ath11k_pdev_dp *dp = &ar->dp;
5516 struct ath11k_mon_data *pmon = &dp->mon_data;
5517 struct hal_sw_mon_ring_entries *sw_mon_entries;
5518 struct ath11k_pdev_mon_stats *rx_mon_stats;
5519 struct sk_buff *head_msdu, *tail_msdu;
5520 void *mon_dst_srng = &ar->ab->hal.srng_list[dp->rxdma_mon_dst_ring.ring_id];
5522 u32 rx_bufs_used = 0, mpdu_rx_bufs_used;
5524 bool break_dst_ring = false;
5526 spin_lock_bh(&pmon->mon_lock);
5528 sw_mon_entries = &pmon->sw_mon_entries;
5529 rx_mon_stats = &pmon->rx_mon_stats;
5531 if (pmon->hold_mon_dst_ring) {
5532 spin_unlock_bh(&pmon->mon_lock);
5533 goto reap_status_ring;
5536 ath11k_hal_srng_access_begin(ar->ab, mon_dst_srng);
5537 while ((ring_entry = ath11k_hal_srng_dst_peek(ar->ab, mon_dst_srng))) {
5541 mpdu_rx_bufs_used = ath11k_dp_rx_full_mon_mpdu_pop(ar, ring_entry,
5545 rx_bufs_used += mpdu_rx_bufs_used;
5547 if (!sw_mon_entries->end_of_ppdu) {
5549 ret = ath11k_dp_rx_full_mon_prepare_mpdu(&ab->dp,
5554 break_dst_ring = true;
5559 if (!sw_mon_entries->ppdu_id &&
5560 !sw_mon_entries->mon_status_paddr) {
5561 break_dst_ring = true;
5566 rx_mon_stats->dest_ppdu_done++;
5567 pmon->mon_ppdu_status = DP_PPDU_STATUS_START;
5568 pmon->buf_state = DP_MON_STATUS_LAG;
5569 pmon->mon_status_paddr = sw_mon_entries->mon_status_paddr;
5570 pmon->hold_mon_dst_ring = true;
5572 ring_entry = ath11k_hal_srng_dst_get_next_entry(ar->ab,
5578 ath11k_hal_srng_access_end(ar->ab, mon_dst_srng);
5579 spin_unlock_bh(&pmon->mon_lock);
5582 ath11k_dp_rxbufs_replenish(ar->ab, dp->mac_id,
5583 &dp->rxdma_mon_buf_ring,
5585 HAL_RX_BUF_RBM_SW3_BM);
5589 quota = ath11k_dp_rx_process_full_mon_status_ring(ab, mac_id,
5595 int ath11k_dp_rx_process_mon_rings(struct ath11k_base *ab, int mac_id,
5596 struct napi_struct *napi, int budget)
5598 struct ath11k *ar = ath11k_ab_to_ar(ab, mac_id);
5601 if (test_bit(ATH11K_FLAG_MONITOR_STARTED, &ar->monitor_flags) &&
5602 ab->hw_params.full_monitor_mode)
5603 ret = ath11k_dp_full_mon_process_rx(ab, mac_id, napi, budget);
5605 ret = ath11k_dp_rx_process_mon_status(ab, mac_id, napi, budget);
5610 static int ath11k_dp_rx_pdev_mon_status_attach(struct ath11k *ar)
5612 struct ath11k_pdev_dp *dp = &ar->dp;
5613 struct ath11k_mon_data *pmon = (struct ath11k_mon_data *)&dp->mon_data;
5615 skb_queue_head_init(&pmon->rx_status_q);
5617 pmon->mon_ppdu_status = DP_PPDU_STATUS_START;
5619 memset(&pmon->rx_mon_stats, 0,
5620 sizeof(pmon->rx_mon_stats));
5624 int ath11k_dp_rx_pdev_mon_attach(struct ath11k *ar)
5626 struct ath11k_pdev_dp *dp = &ar->dp;
5627 struct ath11k_mon_data *pmon = &dp->mon_data;
5628 struct hal_srng *mon_desc_srng = NULL;
5629 struct dp_srng *dp_srng;
5631 u32 n_link_desc = 0;
5633 ret = ath11k_dp_rx_pdev_mon_status_attach(ar);
5635 ath11k_warn(ar->ab, "pdev_mon_status_attach() failed");
5639 /* if rxdma1_enable is false, no need to setup
5640 * rxdma_mon_desc_ring.
5642 if (!ar->ab->hw_params.rxdma1_enable)
5645 dp_srng = &dp->rxdma_mon_desc_ring;
5646 n_link_desc = dp_srng->size /
5647 ath11k_hal_srng_get_entrysize(ar->ab, HAL_RXDMA_MONITOR_DESC);
5649 &ar->ab->hal.srng_list[dp->rxdma_mon_desc_ring.ring_id];
5651 ret = ath11k_dp_link_desc_setup(ar->ab, pmon->link_desc_banks,
5652 HAL_RXDMA_MONITOR_DESC, mon_desc_srng,
5655 ath11k_warn(ar->ab, "mon_link_desc_pool_setup() failed");
5658 pmon->mon_last_linkdesc_paddr = 0;
5659 pmon->mon_last_buf_cookie = DP_RX_DESC_COOKIE_MAX + 1;
5660 spin_lock_init(&pmon->mon_lock);
5665 static int ath11k_dp_mon_link_free(struct ath11k *ar)
5667 struct ath11k_pdev_dp *dp = &ar->dp;
5668 struct ath11k_mon_data *pmon = &dp->mon_data;
5670 ath11k_dp_link_desc_cleanup(ar->ab, pmon->link_desc_banks,
5671 HAL_RXDMA_MONITOR_DESC,
5672 &dp->rxdma_mon_desc_ring);
5676 int ath11k_dp_rx_pdev_mon_detach(struct ath11k *ar)
5678 ath11k_dp_mon_link_free(ar);
5682 int ath11k_dp_rx_pktlog_start(struct ath11k_base *ab)
5684 /* start reap timer */
5685 mod_timer(&ab->mon_reap_timer,
5686 jiffies + msecs_to_jiffies(ATH11K_MON_TIMER_INTERVAL));
5691 int ath11k_dp_rx_pktlog_stop(struct ath11k_base *ab, bool stop_timer)
5696 del_timer_sync(&ab->mon_reap_timer);
5698 /* reap all the monitor related rings */
5699 ret = ath11k_dp_purge_mon_ring(ab);
5701 ath11k_warn(ab, "failed to purge dp mon ring: %d\n", ret);