drivers/net/wireless/ath/ath11k/core.c

   1 // SPDX-License-Identifier: BSD-3-Clause-Clear
   2 /*
   3  * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.
   4  * Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved.
   5  */
   6
   7 #include <linux/module.h>
   8 #include <linux/slab.h>
   9 #include <linux/remoteproc.h>
  10 #include <linux/firmware.h>
  11 #include <linux/of.h>
  12
  13 #include "core.h"
  14 #include "dp_tx.h"
  15 #include "dp_rx.h"
  16 #include "debug.h"
  17 #include "hif.h"
  18 #include "wow.h"
  19
  20 unsigned int ath11k_debug_mask;
  21 EXPORT_SYMBOL(ath11k_debug_mask);
  22 module_param_named(debug_mask, ath11k_debug_mask, uint, 0644);
  23 MODULE_PARM_DESC(debug_mask, "Debugging mask");
  24
  25 static unsigned int ath11k_crypto_mode;
  26 module_param_named(crypto_mode, ath11k_crypto_mode, uint, 0644);
  27 MODULE_PARM_DESC(crypto_mode, "crypto mode: 0-hardware, 1-software");
  28
  29 /* frame mode values are mapped as per enum ath11k_hw_txrx_mode */
  30 unsigned int ath11k_frame_mode = ATH11K_HW_TXRX_NATIVE_WIFI;
  31 module_param_named(frame_mode, ath11k_frame_mode, uint, 0644);
  32 MODULE_PARM_DESC(frame_mode,
  33                  "Datapath frame mode (0: raw, 1: native wifi (default), 2: ethernet)");
  34
  35 static const struct ath11k_hw_params ath11k_hw_params[] = {
  36         {
  37                 .hw_rev = ATH11K_HW_IPQ8074,
  38                 .name = "ipq8074 hw2.0",
  39                 .fw = {
  40                         .dir = "IPQ8074/hw2.0",
  41                         .board_size = 256 * 1024,
  42                         .cal_offset = 128 * 1024,
  43                 },
  44                 .max_radios = 3,
  45                 .bdf_addr = 0x4B0C0000,
  46                 .hw_ops = &ipq8074_ops,
  47                 .ring_mask = &ath11k_hw_ring_mask_ipq8074,
  48                 .internal_sleep_clock = false,
  49                 .regs = &ipq8074_regs,
  50                 .qmi_service_ins_id = ATH11K_QMI_WLFW_SERVICE_INS_ID_V01_IPQ8074,
  51                 .host_ce_config = ath11k_host_ce_config_ipq8074,
  52                 .ce_count = 12,
  53                 .target_ce_config = ath11k_target_ce_config_wlan_ipq8074,
  54                 .target_ce_count = 11,
  55                 .svc_to_ce_map = ath11k_target_service_to_ce_map_wlan_ipq8074,
  56                 .svc_to_ce_map_len = 21,
  57                 .rfkill_pin = 0,
  58                 .rfkill_cfg = 0,
  59                 .rfkill_on_level = 0,
  60                 .single_pdev_only = false,
  61                 .rxdma1_enable = true,
  62                 .num_rxmda_per_pdev = 1,
  63                 .rx_mac_buf_ring = false,
  64                 .vdev_start_delay = false,
  65                 .htt_peer_map_v2 = true,
  66
  67                 .spectral = {
  68                         .fft_sz = 2,
  69                         /* HW bug, expected BIN size is 2 bytes but HW report as 4 bytes.
  70                          * so added pad size as 2 bytes to compensate the BIN size
  71                          */
  72                         .fft_pad_sz = 2,
  73                         .summary_pad_sz = 0,
  74                         .fft_hdr_len = 16,
  75                         .max_fft_bins = 512,
  76                 },
  77
  78                 .interface_modes = BIT(NL80211_IFTYPE_STATION) |
  79                                         BIT(NL80211_IFTYPE_AP) |
  80                                         BIT(NL80211_IFTYPE_MESH_POINT),
  81                 .supports_monitor = true,
  82                 .full_monitor_mode = false,
  83                 .supports_shadow_regs = false,
  84                 .idle_ps = false,
  85                 .supports_sta_ps = false,
  86                 .cold_boot_calib = true,
  87                 .fw_mem_mode = 0,
  88                 .num_vdevs = 16 + 1,
  89                 .num_peers = 512,
  90                 .supports_suspend = false,
  91                 .hal_desc_sz = sizeof(struct hal_rx_desc_ipq8074),
  92                 .supports_regdb = false,
  93                 .fix_l1ss = true,
  94                 .credit_flow = false,
  95                 .max_tx_ring = DP_TCL_NUM_RING_MAX,
  96                 .hal_params = &ath11k_hw_hal_params_ipq8074,
  97                 .supports_dynamic_smps_6ghz = false,
  98                 .alloc_cacheable_memory = true,
  99                 .supports_rssi_stats = false,
 100                 .fw_wmi_diag_event = false,
 101                 .current_cc_support = false,
 102                 .dbr_debug_support = true,
 103                 .global_reset = false,
 104                 .bios_sar_capa = NULL,
 105                 .m3_fw_support = false,
 106                 .fixed_bdf_addr = true,
 107                 .fixed_mem_region = true,
 108                 .static_window_map = false,
 109                 .hybrid_bus_type = false,
 110                 .dp_window_idx = 0,
 111                 .ce_window_idx = 0,
 112                 .fixed_fw_mem = false,
 113                 .support_off_channel_tx = false,
 114         },
 115         {
 116                 .hw_rev = ATH11K_HW_IPQ6018_HW10,
 117                 .name = "ipq6018 hw1.0",
 118                 .fw = {
 119                         .dir = "IPQ6018/hw1.0",
 120                         .board_size = 256 * 1024,
 121                         .cal_offset = 128 * 1024,
 122                 },
 123                 .max_radios = 2,
 124                 .bdf_addr = 0x4ABC0000,
 125                 .hw_ops = &ipq6018_ops,
 126                 .ring_mask = &ath11k_hw_ring_mask_ipq8074,
 127                 .internal_sleep_clock = false,
 128                 .regs = &ipq8074_regs,
 129                 .qmi_service_ins_id = ATH11K_QMI_WLFW_SERVICE_INS_ID_V01_IPQ8074,
 130                 .host_ce_config = ath11k_host_ce_config_ipq8074,
 131                 .ce_count = 12,
 132                 .target_ce_config = ath11k_target_ce_config_wlan_ipq8074,
 133                 .target_ce_count = 11,
 134                 .svc_to_ce_map = ath11k_target_service_to_ce_map_wlan_ipq6018,
 135                 .svc_to_ce_map_len = 19,
 136                 .rfkill_pin = 0,
 137                 .rfkill_cfg = 0,
 138                 .rfkill_on_level = 0,
 139                 .single_pdev_only = false,
 140                 .rxdma1_enable = true,
 141                 .num_rxmda_per_pdev = 1,
 142                 .rx_mac_buf_ring = false,
 143                 .vdev_start_delay = false,
 144                 .htt_peer_map_v2 = true,
 145
 146                 .spectral = {
 147                         .fft_sz = 4,
 148                         .fft_pad_sz = 0,
 149                         .summary_pad_sz = 0,
 150                         .fft_hdr_len = 16,
 151                         .max_fft_bins = 512,
 152                 },
 153
 154                 .interface_modes = BIT(NL80211_IFTYPE_STATION) |
 155                                         BIT(NL80211_IFTYPE_AP) |
 156                                         BIT(NL80211_IFTYPE_MESH_POINT),
 157                 .supports_monitor = true,
 158                 .full_monitor_mode = false,
 159                 .supports_shadow_regs = false,
 160                 .idle_ps = false,
 161                 .supports_sta_ps = false,
 162                 .cold_boot_calib = true,
 163                 .fw_mem_mode = 0,
 164                 .num_vdevs = 16 + 1,
 165                 .num_peers = 512,
 166                 .supports_suspend = false,
 167                 .hal_desc_sz = sizeof(struct hal_rx_desc_ipq8074),
 168                 .supports_regdb = false,
 169                 .fix_l1ss = true,
 170                 .credit_flow = false,
 171                 .max_tx_ring = DP_TCL_NUM_RING_MAX,
 172                 .hal_params = &ath11k_hw_hal_params_ipq8074,
 173                 .supports_dynamic_smps_6ghz = false,
 174                 .alloc_cacheable_memory = true,
 175                 .supports_rssi_stats = false,
 176                 .fw_wmi_diag_event = false,
 177                 .current_cc_support = false,
 178                 .dbr_debug_support = true,
 179                 .global_reset = false,
 180                 .bios_sar_capa = NULL,
 181                 .m3_fw_support = false,
 182                 .fixed_bdf_addr = true,
 183                 .fixed_mem_region = true,
 184                 .static_window_map = false,
 185                 .hybrid_bus_type = false,
 186                 .dp_window_idx = 0,
 187                 .ce_window_idx = 0,
 188                 .fixed_fw_mem = false,
 189                 .support_off_channel_tx = false,
 190         },
 191         {
 192                 .name = "qca6390 hw2.0",
 193                 .hw_rev = ATH11K_HW_QCA6390_HW20,
 194                 .fw = {
 195                         .dir = "QCA6390/hw2.0",
 196                         .board_size = 256 * 1024,
 197                         .cal_offset = 128 * 1024,
 198                 },
 199                 .max_radios = 3,
 200                 .bdf_addr = 0x4B0C0000,
 201                 .hw_ops = &qca6390_ops,
 202                 .ring_mask = &ath11k_hw_ring_mask_qca6390,
 203                 .internal_sleep_clock = true,
 204                 .regs = &qca6390_regs,
 205                 .qmi_service_ins_id = ATH11K_QMI_WLFW_SERVICE_INS_ID_V01_QCA6390,
 206                 .host_ce_config = ath11k_host_ce_config_qca6390,
 207                 .ce_count = 9,
 208                 .target_ce_config = ath11k_target_ce_config_wlan_qca6390,
 209                 .target_ce_count = 9,
 210                 .svc_to_ce_map = ath11k_target_service_to_ce_map_wlan_qca6390,
 211                 .svc_to_ce_map_len = 14,
 212                 .rfkill_pin = 48,
 213                 .rfkill_cfg = 0,
 214                 .rfkill_on_level = 1,
 215                 .single_pdev_only = true,
 216                 .rxdma1_enable = false,
 217                 .num_rxmda_per_pdev = 2,
 218                 .rx_mac_buf_ring = true,
 219                 .vdev_start_delay = true,
 220                 .htt_peer_map_v2 = false,
 221
 222                 .spectral = {
 223                         .fft_sz = 0,
 224                         .fft_pad_sz = 0,
 225                         .summary_pad_sz = 0,
 226                         .fft_hdr_len = 0,
 227                         .max_fft_bins = 0,
 228                 },
 229
 230                 .interface_modes = BIT(NL80211_IFTYPE_STATION) |
 231                                         BIT(NL80211_IFTYPE_AP),
 232                 .supports_monitor = false,
 233                 .full_monitor_mode = false,
 234                 .supports_shadow_regs = true,
 235                 .idle_ps = true,
 236                 .supports_sta_ps = true,
 237                 .cold_boot_calib = false,
 238                 .fw_mem_mode = 0,
 239                 .num_vdevs = 16 + 1,
 240                 .num_peers = 512,
 241                 .supports_suspend = true,
 242                 .hal_desc_sz = sizeof(struct hal_rx_desc_ipq8074),
 243                 .supports_regdb = false,
 244                 .fix_l1ss = true,
 245                 .credit_flow = true,
 246                 .max_tx_ring = DP_TCL_NUM_RING_MAX_QCA6390,
 247                 .hal_params = &ath11k_hw_hal_params_qca6390,
 248                 .supports_dynamic_smps_6ghz = false,
 249                 .alloc_cacheable_memory = false,
 250                 .supports_rssi_stats = true,
 251                 .fw_wmi_diag_event = true,
 252                 .current_cc_support = true,
 253                 .dbr_debug_support = false,
 254                 .global_reset = true,
 255                 .bios_sar_capa = NULL,
 256                 .m3_fw_support = true,
 257                 .fixed_bdf_addr = false,
 258                 .fixed_mem_region = false,
 259                 .static_window_map = false,
 260                 .hybrid_bus_type = false,
 261                 .dp_window_idx = 0,
 262                 .ce_window_idx = 0,
 263                 .fixed_fw_mem = false,
 264                 .support_off_channel_tx = true,
 265         },
 266         {
 267                 .name = "qcn9074 hw1.0",
 268                 .hw_rev = ATH11K_HW_QCN9074_HW10,
 269                 .fw = {
 270                         .dir = "QCN9074/hw1.0",
 271                         .board_size = 256 * 1024,
 272                         .cal_offset = 128 * 1024,
 273                 },
 274                 .max_radios = 1,
 275                 .single_pdev_only = false,
 276                 .qmi_service_ins_id = ATH11K_QMI_WLFW_SERVICE_INS_ID_V01_QCN9074,
 277                 .hw_ops = &qcn9074_ops,
 278                 .ring_mask = &ath11k_hw_ring_mask_qcn9074,
 279                 .internal_sleep_clock = false,
 280                 .regs = &qcn9074_regs,
 281                 .host_ce_config = ath11k_host_ce_config_qcn9074,
 282                 .ce_count = 6,
 283                 .target_ce_config = ath11k_target_ce_config_wlan_qcn9074,
 284                 .target_ce_count = 9,
 285                 .svc_to_ce_map = ath11k_target_service_to_ce_map_wlan_qcn9074,
 286                 .svc_to_ce_map_len = 18,
 287                 .rfkill_pin = 0,
 288                 .rfkill_cfg = 0,
 289                 .rfkill_on_level = 0,
 290                 .rxdma1_enable = true,
 291                 .num_rxmda_per_pdev = 1,
 292                 .rx_mac_buf_ring = false,
 293                 .vdev_start_delay = false,
 294                 .htt_peer_map_v2 = true,
 295
 296                 .spectral = {
 297                         .fft_sz = 2,
 298                         .fft_pad_sz = 0,
 299                         .summary_pad_sz = 16,
 300                         .fft_hdr_len = 24,
 301                         .max_fft_bins = 1024,
 302                 },
 303
 304                 .interface_modes = BIT(NL80211_IFTYPE_STATION) |
 305                                         BIT(NL80211_IFTYPE_AP) |
 306                                         BIT(NL80211_IFTYPE_MESH_POINT),
 307                 .supports_monitor = true,
 308                 .full_monitor_mode = true,
 309                 .supports_shadow_regs = false,
 310                 .idle_ps = false,
 311                 .supports_sta_ps = false,
 312                 .cold_boot_calib = false,
 313                 .fw_mem_mode = 2,
 314                 .num_vdevs = 8,
 315                 .num_peers = 128,
 316                 .supports_suspend = false,
 317                 .hal_desc_sz = sizeof(struct hal_rx_desc_qcn9074),
 318                 .supports_regdb = false,
 319                 .fix_l1ss = true,
 320                 .credit_flow = false,
 321                 .max_tx_ring = DP_TCL_NUM_RING_MAX,
 322                 .hal_params = &ath11k_hw_hal_params_ipq8074,
 323                 .supports_dynamic_smps_6ghz = true,
 324                 .alloc_cacheable_memory = true,
 325                 .supports_rssi_stats = false,
 326                 .fw_wmi_diag_event = false,
 327                 .current_cc_support = false,
 328                 .dbr_debug_support = true,
 329                 .global_reset = false,
 330                 .bios_sar_capa = NULL,
 331                 .m3_fw_support = true,
 332                 .fixed_bdf_addr = false,
 333                 .fixed_mem_region = false,
 334                 .static_window_map = true,
 335                 .hybrid_bus_type = false,
 336                 .dp_window_idx = 3,
 337                 .ce_window_idx = 2,
 338                 .fixed_fw_mem = false,
 339                 .support_off_channel_tx = false,
 340         },
 341         {
 342                 .name = "wcn6855 hw2.0",
 343                 .hw_rev = ATH11K_HW_WCN6855_HW20,
 344                 .fw = {
 345                         .dir = "WCN6855/hw2.0",
 346                         .board_size = 256 * 1024,
 347                         .cal_offset = 128 * 1024,
 348                 },
 349                 .max_radios = 3,
 350                 .bdf_addr = 0x4B0C0000,
 351                 .hw_ops = &wcn6855_ops,
 352                 .ring_mask = &ath11k_hw_ring_mask_qca6390,
 353                 .internal_sleep_clock = true,
 354                 .regs = &wcn6855_regs,
 355                 .qmi_service_ins_id = ATH11K_QMI_WLFW_SERVICE_INS_ID_V01_QCA6390,
 356                 .host_ce_config = ath11k_host_ce_config_qca6390,
 357                 .ce_count = 9,
 358                 .target_ce_config = ath11k_target_ce_config_wlan_qca6390,
 359                 .target_ce_count = 9,
 360                 .svc_to_ce_map = ath11k_target_service_to_ce_map_wlan_qca6390,
 361                 .svc_to_ce_map_len = 14,
 362                 .rfkill_pin = 0,
 363                 .rfkill_cfg = 0,
 364                 .rfkill_on_level = 0,
 365                 .single_pdev_only = true,
 366                 .rxdma1_enable = false,
 367                 .num_rxmda_per_pdev = 2,
 368                 .rx_mac_buf_ring = true,
 369                 .vdev_start_delay = true,
 370                 .htt_peer_map_v2 = false,
 371
 372                 .spectral = {
 373                         .fft_sz = 0,
 374                         .fft_pad_sz = 0,
 375                         .summary_pad_sz = 0,
 376                         .fft_hdr_len = 0,
 377                         .max_fft_bins = 0,
 378                 },
 379
 380                 .interface_modes = BIT(NL80211_IFTYPE_STATION) |
 381                                         BIT(NL80211_IFTYPE_AP),
 382                 .supports_monitor = false,
 383                 .full_monitor_mode = false,
 384                 .supports_shadow_regs = true,
 385                 .idle_ps = true,
 386                 .supports_sta_ps = true,
 387                 .cold_boot_calib = false,
 388                 .fw_mem_mode = 0,
 389                 .num_vdevs = 16 + 1,
 390                 .num_peers = 512,
 391                 .supports_suspend = true,
 392                 .hal_desc_sz = sizeof(struct hal_rx_desc_wcn6855),
 393                 .supports_regdb = true,
 394                 .fix_l1ss = false,
 395                 .credit_flow = true,
 396                 .max_tx_ring = DP_TCL_NUM_RING_MAX_QCA6390,
 397                 .hal_params = &ath11k_hw_hal_params_qca6390,
 398                 .supports_dynamic_smps_6ghz = false,
 399                 .alloc_cacheable_memory = false,
 400                 .supports_rssi_stats = true,
 401                 .fw_wmi_diag_event = true,
 402                 .current_cc_support = true,
 403                 .dbr_debug_support = false,
 404                 .global_reset = true,
 405                 .bios_sar_capa = &ath11k_hw_sar_capa_wcn6855,
 406                 .m3_fw_support = true,
 407                 .fixed_bdf_addr = false,
 408                 .fixed_mem_region = false,
 409                 .static_window_map = false,
 410                 .hybrid_bus_type = false,
 411                 .dp_window_idx = 0,
 412                 .ce_window_idx = 0,
 413                 .fixed_fw_mem = false,
 414                 .support_off_channel_tx = true,
 415         },
 416         {
 417                 .name = "wcn6855 hw2.1",
 418                 .hw_rev = ATH11K_HW_WCN6855_HW21,
 419                 .fw = {
 420                         .dir = "WCN6855/hw2.1",
 421                         .board_size = 256 * 1024,
 422                         .cal_offset = 128 * 1024,
 423                 },
 424                 .max_radios = 3,
 425                 .bdf_addr = 0x4B0C0000,
 426                 .hw_ops = &wcn6855_ops,
 427                 .ring_mask = &ath11k_hw_ring_mask_qca6390,
 428                 .internal_sleep_clock = true,
 429                 .regs = &wcn6855_regs,
 430                 .qmi_service_ins_id = ATH11K_QMI_WLFW_SERVICE_INS_ID_V01_QCA6390,
 431                 .host_ce_config = ath11k_host_ce_config_qca6390,
 432                 .ce_count = 9,
 433                 .target_ce_config = ath11k_target_ce_config_wlan_qca6390,
 434                 .target_ce_count = 9,
 435                 .svc_to_ce_map = ath11k_target_service_to_ce_map_wlan_qca6390,
 436                 .svc_to_ce_map_len = 14,
 437                 .rfkill_pin = 0,
 438                 .rfkill_cfg = 0,
 439                 .rfkill_on_level = 0,
 440                 .single_pdev_only = true,
 441                 .rxdma1_enable = false,
 442                 .num_rxmda_per_pdev = 2,
 443                 .rx_mac_buf_ring = true,
 444                 .vdev_start_delay = true,
 445                 .htt_peer_map_v2 = false,
 446
 447                 .spectral = {
 448                         .fft_sz = 0,
 449                         .fft_pad_sz = 0,
 450                         .summary_pad_sz = 0,
 451                         .fft_hdr_len = 0,
 452                         .max_fft_bins = 0,
 453                 },
 454
 455                 .interface_modes = BIT(NL80211_IFTYPE_STATION) |
 456                                         BIT(NL80211_IFTYPE_AP),
 457                 .supports_monitor = false,
 458                 .supports_shadow_regs = true,
 459                 .idle_ps = true,
 460                 .supports_sta_ps = true,
 461                 .cold_boot_calib = false,
 462                 .fw_mem_mode = 0,
 463                 .num_vdevs = 16 + 1,
 464                 .num_peers = 512,
 465                 .supports_suspend = true,
 466                 .hal_desc_sz = sizeof(struct hal_rx_desc_wcn6855),
 467                 .supports_regdb = true,
 468                 .fix_l1ss = false,
 469                 .credit_flow = true,
 470                 .max_tx_ring = DP_TCL_NUM_RING_MAX_QCA6390,
 471                 .hal_params = &ath11k_hw_hal_params_qca6390,
 472                 .supports_dynamic_smps_6ghz = false,
 473                 .alloc_cacheable_memory = false,
 474                 .supports_rssi_stats = true,
 475                 .fw_wmi_diag_event = true,
 476                 .current_cc_support = true,
 477                 .dbr_debug_support = false,
 478                 .global_reset = true,
 479                 .bios_sar_capa = &ath11k_hw_sar_capa_wcn6855,
 480                 .m3_fw_support = true,
 481                 .fixed_bdf_addr = false,
 482                 .fixed_mem_region = false,
 483                 .static_window_map = false,
 484                 .hybrid_bus_type = false,
 485                 .dp_window_idx = 0,
 486                 .ce_window_idx = 0,
 487                 .fixed_fw_mem = false,
 488                 .support_off_channel_tx = true,
 489         },
 490         {
 491                 .name = "wcn6750 hw1.0",
 492                 .hw_rev = ATH11K_HW_WCN6750_HW10,
 493                 .fw = {
 494                         .dir = "WCN6750/hw1.0",
 495                         .board_size = 256 * 1024,
 496                         .cal_offset = 128 * 1024,
 497                 },
 498                 .max_radios = 1,
 499                 .bdf_addr = 0x4B0C0000,
 500                 .hw_ops = &wcn6750_ops,
 501                 .ring_mask = &ath11k_hw_ring_mask_qca6390,
 502                 .internal_sleep_clock = false,
 503                 .regs = &wcn6750_regs,
 504                 .qmi_service_ins_id = ATH11K_QMI_WLFW_SERVICE_INS_ID_V01_WCN6750,
 505                 .host_ce_config = ath11k_host_ce_config_qca6390,
 506                 .ce_count = 9,
 507                 .target_ce_config = ath11k_target_ce_config_wlan_qca6390,
 508                 .target_ce_count = 9,
 509                 .svc_to_ce_map = ath11k_target_service_to_ce_map_wlan_qca6390,
 510                 .svc_to_ce_map_len = 14,
 511                 .rfkill_pin = 0,
 512                 .rfkill_cfg = 0,
 513                 .rfkill_on_level = 0,
 514                 .single_pdev_only = true,
 515                 .rxdma1_enable = false,
 516                 .num_rxmda_per_pdev = 1,
 517                 .rx_mac_buf_ring = true,
 518                 .vdev_start_delay = true,
 519                 .htt_peer_map_v2 = false,
 520
 521                 .spectral = {
 522                         .fft_sz = 0,
 523                         .fft_pad_sz = 0,
 524                         .summary_pad_sz = 0,
 525                         .fft_hdr_len = 0,
 526                         .max_fft_bins = 0,
 527                 },
 528
 529                 .interface_modes = BIT(NL80211_IFTYPE_STATION) |
 530                                         BIT(NL80211_IFTYPE_AP),
 531                 .supports_monitor = false,
 532                 .supports_shadow_regs = true,
 533                 .idle_ps = true,
 534                 .supports_sta_ps = true,
 535                 .cold_boot_calib = false,
 536                 .fw_mem_mode = 0,
 537                 .num_vdevs = 16 + 1,
 538                 .num_peers = 512,
 539                 .supports_suspend = false,
 540                 .hal_desc_sz = sizeof(struct hal_rx_desc_qcn9074),
 541                 .supports_regdb = true,
 542                 .fix_l1ss = false,
 543                 .credit_flow = true,
 544                 .max_tx_ring = DP_TCL_NUM_RING_MAX_QCA6390,
 545                 .hal_params = &ath11k_hw_hal_params_qca6390,
 546                 .supports_dynamic_smps_6ghz = false,
 547                 .alloc_cacheable_memory = false,
 548                 .supports_rssi_stats = true,
 549                 .fw_wmi_diag_event = false,
 550                 .current_cc_support = true,
 551                 .dbr_debug_support = false,
 552                 .global_reset = false,
 553                 .bios_sar_capa = NULL,
 554                 .m3_fw_support = false,
 555                 .fixed_bdf_addr = false,
 556                 .fixed_mem_region = false,
 557                 .static_window_map = true,
 558                 .hybrid_bus_type = true,
 559                 .dp_window_idx = 1,
 560                 .ce_window_idx = 2,
 561                 .fixed_fw_mem = true,
 562                 .support_off_channel_tx = false,
 563         },
 564 };
 565
 566 static inline struct ath11k_pdev *ath11k_core_get_single_pdev(struct ath11k_base *ab)
 567 {
 568         WARN_ON(!ab->hw_params.single_pdev_only);
 569
 570         return &ab->pdevs[0];
 571 }
 572
 573 int ath11k_core_suspend(struct ath11k_base *ab)
 574 {
 575         int ret;
 576         struct ath11k_pdev *pdev;
 577         struct ath11k *ar;
 578
 579         if (!ab->hw_params.supports_suspend)
 580                 return -EOPNOTSUPP;
 581
 582         /* so far single_pdev_only chips have supports_suspend as true
 583          * and only the first pdev is valid.
 584          */
 585         pdev = ath11k_core_get_single_pdev(ab);
 586         ar = pdev->ar;
 587         if (!ar || ar->state != ATH11K_STATE_OFF)
 588                 return 0;
 589
 590         ret = ath11k_dp_rx_pktlog_stop(ab, true);
 591         if (ret) {
 592                 ath11k_warn(ab, "failed to stop dp rx (and timer) pktlog during suspend: %d\n",
 593                             ret);
 594                 return ret;
 595         }
 596
 597         ret = ath11k_mac_wait_tx_complete(ar);
 598         if (ret) {
 599                 ath11k_warn(ab, "failed to wait tx complete: %d\n", ret);
 600                 return ret;
 601         }
 602
 603         ret = ath11k_wow_enable(ab);
 604         if (ret) {
 605                 ath11k_warn(ab, "failed to enable wow during suspend: %d\n", ret);
 606                 return ret;
 607         }
 608
 609         ret = ath11k_dp_rx_pktlog_stop(ab, false);
 610         if (ret) {
 611                 ath11k_warn(ab, "failed to stop dp rx pktlog during suspend: %d\n",
 612                             ret);
 613                 return ret;
 614         }
 615
 616         ath11k_ce_stop_shadow_timers(ab);
 617         ath11k_dp_stop_shadow_timers(ab);
 618
 619         ath11k_hif_irq_disable(ab);
 620         ath11k_hif_ce_irq_disable(ab);
 621
 622         ret = ath11k_hif_suspend(ab);
 623         if (ret) {
 624                 ath11k_warn(ab, "failed to suspend hif: %d\n", ret);
 625                 return ret;
 626         }
 627
 628         return 0;
 629 }
 630 EXPORT_SYMBOL(ath11k_core_suspend);
 631
 632 int ath11k_core_resume(struct ath11k_base *ab)
 633 {
 634         int ret;
 635         struct ath11k_pdev *pdev;
 636         struct ath11k *ar;
 637
 638         if (!ab->hw_params.supports_suspend)
 639                 return -EOPNOTSUPP;
 640
 641         /* so far signle_pdev_only chips have supports_suspend as true
 642          * and only the first pdev is valid.
 643          */
 644         pdev = ath11k_core_get_single_pdev(ab);
 645         ar = pdev->ar;
 646         if (!ar || ar->state != ATH11K_STATE_OFF)
 647                 return 0;
 648
 649         ret = ath11k_hif_resume(ab);
 650         if (ret) {
 651                 ath11k_warn(ab, "failed to resume hif during resume: %d\n", ret);
 652                 return ret;
 653         }
 654
 655         ath11k_hif_ce_irq_enable(ab);
 656         ath11k_hif_irq_enable(ab);
 657
 658         ret = ath11k_dp_rx_pktlog_start(ab);
 659         if (ret) {
 660                 ath11k_warn(ab, "failed to start rx pktlog during resume: %d\n",
 661                             ret);
 662                 return ret;
 663         }
 664
 665         ret = ath11k_wow_wakeup(ab);
 666         if (ret) {
 667                 ath11k_warn(ab, "failed to wakeup wow during resume: %d\n", ret);
 668                 return ret;
 669         }
 670
 671         return 0;
 672 }
 673 EXPORT_SYMBOL(ath11k_core_resume);
 674
 675 static void ath11k_core_check_cc_code_bdfext(const struct dmi_header *hdr, void *data)
 676 {
 677         struct ath11k_base *ab = data;
 678         const char *magic = ATH11K_SMBIOS_BDF_EXT_MAGIC;
 679         struct ath11k_smbios_bdf *smbios = (struct ath11k_smbios_bdf *)hdr;
 680         ssize_t copied;
 681         size_t len;
 682         int i;
 683
 684         if (ab->qmi.target.bdf_ext[0] != '\0')
 685                 return;
 686
 687         if (hdr->type != ATH11K_SMBIOS_BDF_EXT_TYPE)
 688                 return;
 689
 690         if (hdr->length != ATH11K_SMBIOS_BDF_EXT_LENGTH) {
 691                 ath11k_dbg(ab, ATH11K_DBG_BOOT,
 692                            "wrong smbios bdf ext type length (%d).\n",
 693                            hdr->length);
 694                 return;
 695         }
 696
 697         spin_lock_bh(&ab->base_lock);
 698
 699         switch (smbios->country_code_flag) {
 700         case ATH11K_SMBIOS_CC_ISO:
 701                 ab->new_alpha2[0] = (smbios->cc_code >> 8) & 0xff;
 702                 ab->new_alpha2[1] = smbios->cc_code & 0xff;
 703                 ath11k_dbg(ab, ATH11K_DBG_BOOT, "boot smbios cc_code %c%c\n",
 704                            ab->new_alpha2[0], ab->new_alpha2[1]);
 705                 break;
 706         case ATH11K_SMBIOS_CC_WW:
 707                 ab->new_alpha2[0] = '0';
 708                 ab->new_alpha2[1] = '0';
 709                 ath11k_dbg(ab, ATH11K_DBG_BOOT, "boot smbios worldwide regdomain\n");
 710                 break;
 711         default:
 712                 ath11k_dbg(ab, ATH11K_DBG_BOOT, "boot ignore smbios country code setting %d\n",
 713                            smbios->country_code_flag);
 714                 break;
 715         }
 716
 717         spin_unlock_bh(&ab->base_lock);
 718
 719         if (!smbios->bdf_enabled) {
 720                 ath11k_dbg(ab, ATH11K_DBG_BOOT, "bdf variant name not found.\n");
 721                 return;
 722         }
 723
 724         /* Only one string exists (per spec) */
 725         if (memcmp(smbios->bdf_ext, magic, strlen(magic)) != 0) {
 726                 ath11k_dbg(ab, ATH11K_DBG_BOOT,
 727                            "bdf variant magic does not match.\n");
 728                 return;
 729         }
 730
 731         len = min_t(size_t,
 732                     strlen(smbios->bdf_ext), sizeof(ab->qmi.target.bdf_ext));
 733         for (i = 0; i < len; i++) {
 734                 if (!isascii(smbios->bdf_ext[i]) || !isprint(smbios->bdf_ext[i])) {
 735                         ath11k_dbg(ab, ATH11K_DBG_BOOT,
 736                                    "bdf variant name contains non ascii chars.\n");
 737                         return;
 738                 }
 739         }
 740
 741         /* Copy extension name without magic prefix */
 742         copied = strscpy(ab->qmi.target.bdf_ext, smbios->bdf_ext + strlen(magic),
 743                          sizeof(ab->qmi.target.bdf_ext));
 744         if (copied < 0) {
 745                 ath11k_dbg(ab, ATH11K_DBG_BOOT,
 746                            "bdf variant string is longer than the buffer can accommodate\n");
 747                 return;
 748         }
 749
 750         ath11k_dbg(ab, ATH11K_DBG_BOOT,
 751                    "found and validated bdf variant smbios_type 0x%x bdf %s\n",
 752                    ATH11K_SMBIOS_BDF_EXT_TYPE, ab->qmi.target.bdf_ext);
 753 }
 754
 755 int ath11k_core_check_smbios(struct ath11k_base *ab)
 756 {
 757         ab->qmi.target.bdf_ext[0] = '\0';
 758         dmi_walk(ath11k_core_check_cc_code_bdfext, ab);
 759
 760         if (ab->qmi.target.bdf_ext[0] == '\0')
 761                 return -ENODATA;
 762
 763         return 0;
 764 }
 765
 766 int ath11k_core_check_dt(struct ath11k_base *ab)
 767 {
 768         size_t max_len = sizeof(ab->qmi.target.bdf_ext);
 769         const char *variant = NULL;
 770         struct device_node *node;
 771
 772         node = ab->dev->of_node;
 773         if (!node)
 774                 return -ENOENT;
 775
 776         of_property_read_string(node, "qcom,ath11k-calibration-variant",
 777                                 &variant);
 778         if (!variant)
 779                 return -ENODATA;
 780
 781         if (strscpy(ab->qmi.target.bdf_ext, variant, max_len) < 0)
 782                 ath11k_dbg(ab, ATH11K_DBG_BOOT,
 783                            "bdf variant string is longer than the buffer can accommodate (variant: %s)\n",
 784                             variant);
 785
 786         return 0;
 787 }
 788
 789 static int __ath11k_core_create_board_name(struct ath11k_base *ab, char *name,
 790                                            size_t name_len, bool with_variant)
 791 {
 792         /* strlen(',variant=') + strlen(ab->qmi.target.bdf_ext) */
 793         char variant[9 + ATH11K_QMI_BDF_EXT_STR_LENGTH] = { 0 };
 794
 795         if (with_variant && ab->qmi.target.bdf_ext[0] != '\0')
 796                 scnprintf(variant, sizeof(variant), ",variant=%s",
 797                           ab->qmi.target.bdf_ext);
 798
 799         switch (ab->id.bdf_search) {
 800         case ATH11K_BDF_SEARCH_BUS_AND_BOARD:
 801                 scnprintf(name, name_len,
 802                           "bus=%s,vendor=%04x,device=%04x,subsystem-vendor=%04x,subsystem-device=%04x,qmi-chip-id=%d,qmi-board-id=%d%s",
 803                           ath11k_bus_str(ab->hif.bus),
 804                           ab->id.vendor, ab->id.device,
 805                           ab->id.subsystem_vendor,
 806                           ab->id.subsystem_device,
 807                           ab->qmi.target.chip_id,
 808                           ab->qmi.target.board_id,
 809                           variant);
 810                 break;
 811         default:
 812                 scnprintf(name, name_len,
 813                           "bus=%s,qmi-chip-id=%d,qmi-board-id=%d%s",
 814                           ath11k_bus_str(ab->hif.bus),
 815                           ab->qmi.target.chip_id,
 816                           ab->qmi.target.board_id, variant);
 817                 break;
 818         }
 819
 820         ath11k_dbg(ab, ATH11K_DBG_BOOT, "boot using board name '%s'\n", name);
 821
 822         return 0;
 823 }
 824
 825 static int ath11k_core_create_board_name(struct ath11k_base *ab, char *name,
 826                                          size_t name_len)
 827 {
 828         return __ath11k_core_create_board_name(ab, name, name_len, true);
 829 }
 830
 831 static int ath11k_core_create_fallback_board_name(struct ath11k_base *ab, char *name,
 832                                                   size_t name_len)
 833 {
 834         return __ath11k_core_create_board_name(ab, name, name_len, false);
 835 }
 836
 837 const struct firmware *ath11k_core_firmware_request(struct ath11k_base *ab,
 838                                                     const char *file)
 839 {
 840         const struct firmware *fw;
 841         char path[100];
 842         int ret;
 843
 844         if (file == NULL)
 845                 return ERR_PTR(-ENOENT);
 846
 847         ath11k_core_create_firmware_path(ab, file, path, sizeof(path));
 848
 849         ret = firmware_reject_nowarn(&fw, path, ab->dev);
 850         if (ret)
 851                 return ERR_PTR(ret);
 852
 853         ath11k_dbg(ab, ATH11K_DBG_BOOT, "boot firmware request %s size %zu\n",
 854                    path, fw->size);
 855
 856         return fw;
 857 }
 858
 859 void ath11k_core_free_bdf(struct ath11k_base *ab, struct ath11k_board_data *bd)
 860 {
 861         if (!IS_ERR(bd->fw))
 862                 release_firmware(bd->fw);
 863
 864         memset(bd, 0, sizeof(*bd));
 865 }
 866
 867 static int ath11k_core_parse_bd_ie_board(struct ath11k_base *ab,
 868                                          struct ath11k_board_data *bd,
 869                                          const void *buf, size_t buf_len,
 870                                          const char *boardname,
 871                                          int ie_id,
 872                                          int name_id,
 873                                          int data_id)
 874 {
 875         const struct ath11k_fw_ie *hdr;
 876         bool name_match_found;
 877         int ret, board_ie_id;
 878         size_t board_ie_len;
 879         const void *board_ie_data;
 880
 881         name_match_found = false;
 882
 883         /* go through ATH11K_BD_IE_BOARD_/ATH11K_BD_IE_REGDB_ elements */
 884         while (buf_len > sizeof(struct ath11k_fw_ie)) {
 885                 hdr = buf;
 886                 board_ie_id = le32_to_cpu(hdr->id);
 887                 board_ie_len = le32_to_cpu(hdr->len);
 888                 board_ie_data = hdr->data;
 889
 890                 buf_len -= sizeof(*hdr);
 891                 buf += sizeof(*hdr);
 892
 893                 if (buf_len < ALIGN(board_ie_len, 4)) {
 894                         ath11k_err(ab, "invalid %s length: %zu < %zu\n",
 895                                    ath11k_bd_ie_type_str(ie_id),
 896                                    buf_len, ALIGN(board_ie_len, 4));
 897                         ret = -EINVAL;
 898                         goto out;
 899                 }
 900
 901                 if (board_ie_id == name_id) {
 902                         ath11k_dbg_dump(ab, ATH11K_DBG_BOOT, "board name", "",
 903                                         board_ie_data, board_ie_len);
 904
 905                         if (board_ie_len != strlen(boardname))
 906                                 goto next;
 907
 908                         ret = memcmp(board_ie_data, boardname, strlen(boardname));
 909                         if (ret)
 910                                 goto next;
 911
 912                         name_match_found = true;
 913                         ath11k_dbg(ab, ATH11K_DBG_BOOT,
 914                                    "boot found match %s for name '%s'",
 915                                    ath11k_bd_ie_type_str(ie_id),
 916                                    boardname);
 917                 } else if (board_ie_id == data_id) {
 918                         if (!name_match_found)
 919                                 /* no match found */
 920                                 goto next;
 921
 922                         ath11k_dbg(ab, ATH11K_DBG_BOOT,
 923                                    "boot found %s for '%s'",
 924                                    ath11k_bd_ie_type_str(ie_id),
 925                                    boardname);
 926
 927                         bd->data = board_ie_data;
 928                         bd->len = board_ie_len;
 929
 930                         ret = 0;
 931                         goto out;
 932                 } else {
 933                         ath11k_warn(ab, "unknown %s id found: %d\n",
 934                                     ath11k_bd_ie_type_str(ie_id),
 935                                     board_ie_id);
 936                 }
 937 next:
 938                 /* jump over the padding */
 939                 board_ie_len = ALIGN(board_ie_len, 4);
 940
 941                 buf_len -= board_ie_len;
 942                 buf += board_ie_len;
 943         }
 944
 945         /* no match found */
 946         ret = -ENOENT;
 947
 948 out:
 949         return ret;
 950 }
 951
 952 static int ath11k_core_fetch_board_data_api_n(struct ath11k_base *ab,
 953                                               struct ath11k_board_data *bd,
 954                                               const char *boardname,
 955                                               int ie_id_match,
 956                                               int name_id,
 957                                               int data_id)
 958 {
 959         size_t len, magic_len;
 960         const u8 *data;
 961         char *filename, filepath[100];
 962         size_t ie_len;
 963         struct ath11k_fw_ie *hdr;
 964         int ret, ie_id;
 965
 966         filename = ATH11K_BOARD_API2_FILE;
 967
 968         if (!bd->fw)
 969                 bd->fw = ath11k_core_firmware_request(ab, filename);
 970
 971         if (IS_ERR(bd->fw))
 972                 return PTR_ERR(bd->fw);
 973
 974         data = bd->fw->data;
 975         len = bd->fw->size;
 976
 977         ath11k_core_create_firmware_path(ab, filename,
 978                                          filepath, sizeof(filepath));
 979
 980         /* magic has extra null byte padded */
 981         magic_len = strlen(ATH11K_BOARD_MAGIC) + 1;
 982         if (len < magic_len) {
 983                 ath11k_err(ab, "failed to find magic value in %s, file too short: %zu\n",
 984                            filepath, len);
 985                 ret = -EINVAL;
 986                 goto err;
 987         }
 988
 989         if (memcmp(data, ATH11K_BOARD_MAGIC, magic_len)) {
 990                 ath11k_err(ab, "found invalid board magic\n");
 991                 ret = -EINVAL;
 992                 goto err;
 993         }
 994
 995         /* magic is padded to 4 bytes */
 996         magic_len = ALIGN(magic_len, 4);
 997         if (len < magic_len) {
 998                 ath11k_err(ab, "failed: %s too small to contain board data, len: %zu\n",
 999                            filepath, len);
1000                 ret = -EINVAL;
1001                 goto err;
1002         }
1003
1004         data += magic_len;
1005         len -= magic_len;
1006
1007         while (len > sizeof(struct ath11k_fw_ie)) {
1008                 hdr = (struct ath11k_fw_ie *)data;
1009                 ie_id = le32_to_cpu(hdr->id);
1010                 ie_len = le32_to_cpu(hdr->len);
1011
1012                 len -= sizeof(*hdr);
1013                 data = hdr->data;
1014
1015                 if (len < ALIGN(ie_len, 4)) {
1016                         ath11k_err(ab, "invalid length for board ie_id %d ie_len %zu len %zu\n",
1017                                    ie_id, ie_len, len);
1018                         ret = -EINVAL;
1019                         goto err;
1020                 }
1021
1022                 if (ie_id == ie_id_match) {
1023                         ret = ath11k_core_parse_bd_ie_board(ab, bd, data,
1024                                                             ie_len,
1025                                                             boardname,
1026                                                             ie_id_match,
1027                                                             name_id,
1028                                                             data_id);
1029                         if (ret == -ENOENT)
1030                                 /* no match found, continue */
1031                                 goto next;
1032                         else if (ret)
1033                                 /* there was an error, bail out */
1034                                 goto err;
1035                         /* either found or error, so stop searching */
1036                         goto out;
1037                 }
1038 next:
1039                 /* jump over the padding */
1040                 ie_len = ALIGN(ie_len, 4);
1041
1042                 len -= ie_len;
1043                 data += ie_len;
1044         }
1045
1046 out:
1047         if (!bd->data || !bd->len) {
1048                 ath11k_dbg(ab, ATH11K_DBG_BOOT,
1049                            "failed to fetch %s for %s from %s\n",
1050                            ath11k_bd_ie_type_str(ie_id_match),
1051                            boardname, filepath);
1052                 ret = -ENODATA;
1053                 goto err;
1054         }
1055
1056         return 0;
1057
1058 err:
1059         ath11k_core_free_bdf(ab, bd);
1060         return ret;
1061 }
1062
1063 int ath11k_core_fetch_board_data_api_1(struct ath11k_base *ab,
1064                                        struct ath11k_board_data *bd,
1065                                        const char *name)
1066 {
1067         bd->fw = ath11k_core_firmware_request(ab, name);
1068
1069         if (IS_ERR(bd->fw))
1070                 return PTR_ERR(bd->fw);
1071
1072         bd->data = bd->fw->data;
1073         bd->len = bd->fw->size;
1074
1075         return 0;
1076 }
1077
1078 #define BOARD_NAME_SIZE 200
1079 int ath11k_core_fetch_bdf(struct ath11k_base *ab, struct ath11k_board_data *bd)
1080 {
1081         char boardname[BOARD_NAME_SIZE], fallback_boardname[BOARD_NAME_SIZE];
1082         char *filename, filepath[100];
1083         int ret;
1084
1085         filename = ATH11K_BOARD_API2_FILE;
1086
1087         ret = ath11k_core_create_board_name(ab, boardname, sizeof(boardname));
1088         if (ret) {
1089                 ath11k_err(ab, "failed to create board name: %d", ret);
1090                 return ret;
1091         }
1092
1093         ab->bd_api = 2;
1094         ret = ath11k_core_fetch_board_data_api_n(ab, bd, boardname,
1095                                                  ATH11K_BD_IE_BOARD,
1096                                                  ATH11K_BD_IE_BOARD_NAME,
1097                                                  ATH11K_BD_IE_BOARD_DATA);
1098         if (!ret)
1099                 goto success;
1100
1101         ret = ath11k_core_create_fallback_board_name(ab, fallback_boardname,
1102                                                      sizeof(fallback_boardname));
1103         if (ret) {
1104                 ath11k_err(ab, "failed to create fallback board name: %d", ret);
1105                 return ret;
1106         }
1107
1108         ret = ath11k_core_fetch_board_data_api_n(ab, bd, fallback_boardname,
1109                                                  ATH11K_BD_IE_BOARD,
1110                                                  ATH11K_BD_IE_BOARD_NAME,
1111                                                  ATH11K_BD_IE_BOARD_DATA);
1112         if (!ret)
1113                 goto success;
1114
1115         ab->bd_api = 1;
1116         ret = ath11k_core_fetch_board_data_api_1(ab, bd, ATH11K_DEFAULT_BOARD_FILE);
1117         if (ret) {
1118                 ath11k_core_create_firmware_path(ab, filename,
1119                                                  filepath, sizeof(filepath));
1120                 ath11k_err(ab, "failed to fetch board data for %s from %s\n",
1121                            boardname, filepath);
1122                 if (memcmp(boardname, fallback_boardname, strlen(boardname)))
1123                         ath11k_err(ab, "failed to fetch board data for %s from %s\n",
1124                                    fallback_boardname, filepath);
1125
1126                 ath11k_err(ab, "failed to fetch /*(DEBLOBBED)*/ from %s\n",
1127                            ab->hw_params.fw.dir);
1128                 return ret;
1129         }
1130
1131 success:
1132         ath11k_dbg(ab, ATH11K_DBG_BOOT, "using board api %d\n", ab->bd_api);
1133         return 0;
1134 }
1135
1136 int ath11k_core_fetch_regdb(struct ath11k_base *ab, struct ath11k_board_data *bd)
1137 {
1138         char boardname[BOARD_NAME_SIZE];
1139         int ret;
1140
1141         ret = ath11k_core_create_board_name(ab, boardname, BOARD_NAME_SIZE);
1142         if (ret) {
1143                 ath11k_dbg(ab, ATH11K_DBG_BOOT,
1144                            "failed to create board name for regdb: %d", ret);
1145                 goto exit;
1146         }
1147
1148         ret = ath11k_core_fetch_board_data_api_n(ab, bd, boardname,
1149                                                  ATH11K_BD_IE_REGDB,
1150                                                  ATH11K_BD_IE_REGDB_NAME,
1151                                                  ATH11K_BD_IE_REGDB_DATA);
1152         if (!ret)
1153                 goto exit;
1154
1155         ret = ath11k_core_fetch_board_data_api_1(ab, bd, ATH11K_REGDB_FILE_NAME);
1156         if (ret)
1157                 ath11k_dbg(ab, ATH11K_DBG_BOOT, "failed to fetch %s from %s\n",
1158                            ATH11K_REGDB_FILE_NAME, ab->hw_params.fw.dir);
1159
1160 exit:
1161         if (!ret)
1162                 ath11k_dbg(ab, ATH11K_DBG_BOOT, "fetched regdb\n");
1163
1164         return ret;
1165 }
1166
1167 static void ath11k_core_stop(struct ath11k_base *ab)
1168 {
1169         if (!test_bit(ATH11K_FLAG_CRASH_FLUSH, &ab->dev_flags))
1170                 ath11k_qmi_firmware_stop(ab);
1171
1172         ath11k_hif_stop(ab);
1173         ath11k_wmi_detach(ab);
1174         ath11k_dp_pdev_reo_cleanup(ab);
1175
1176         /* De-Init of components as needed */
1177 }
1178
1179 static int ath11k_core_soc_create(struct ath11k_base *ab)
1180 {
1181         int ret;
1182
1183         ret = ath11k_qmi_init_service(ab);
1184         if (ret) {
1185                 ath11k_err(ab, "failed to initialize qmi :%d\n", ret);
1186                 return ret;
1187         }
1188
1189         ret = ath11k_debugfs_soc_create(ab);
1190         if (ret) {
1191                 ath11k_err(ab, "failed to create ath11k debugfs\n");
1192                 goto err_qmi_deinit;
1193         }
1194
1195         ret = ath11k_hif_power_up(ab);
1196         if (ret) {
1197                 ath11k_err(ab, "failed to power up :%d\n", ret);
1198                 goto err_debugfs_reg;
1199         }
1200
1201         return 0;
1202
1203 err_debugfs_reg:
1204         ath11k_debugfs_soc_destroy(ab);
1205 err_qmi_deinit:
1206         ath11k_qmi_deinit_service(ab);
1207         return ret;
1208 }
1209
1210 static void ath11k_core_soc_destroy(struct ath11k_base *ab)
1211 {
1212         ath11k_debugfs_soc_destroy(ab);
1213         ath11k_dp_free(ab);
1214         ath11k_reg_free(ab);
1215         ath11k_qmi_deinit_service(ab);
1216 }
1217
1218 static int ath11k_core_pdev_create(struct ath11k_base *ab)
1219 {
1220         int ret;
1221
1222         ret = ath11k_debugfs_pdev_create(ab);
1223         if (ret) {
1224                 ath11k_err(ab, "failed to create core pdev debugfs: %d\n", ret);
1225                 return ret;
1226         }
1227
1228         ret = ath11k_mac_register(ab);
1229         if (ret) {
1230                 ath11k_err(ab, "failed register the radio with mac80211: %d\n", ret);
1231                 goto err_pdev_debug;
1232         }
1233
1234         ret = ath11k_dp_pdev_alloc(ab);
1235         if (ret) {
1236                 ath11k_err(ab, "failed to attach DP pdev: %d\n", ret);
1237                 goto err_mac_unregister;
1238         }
1239
1240         ret = ath11k_thermal_register(ab);
1241         if (ret) {
1242                 ath11k_err(ab, "could not register thermal device: %d\n",
1243                            ret);
1244                 goto err_dp_pdev_free;
1245         }
1246
1247         ret = ath11k_spectral_init(ab);
1248         if (ret) {
1249                 ath11k_err(ab, "failed to init spectral %d\n", ret);
1250                 goto err_thermal_unregister;
1251         }
1252
1253         return 0;
1254
1255 err_thermal_unregister:
1256         ath11k_thermal_unregister(ab);
1257 err_dp_pdev_free:
1258         ath11k_dp_pdev_free(ab);
1259 err_mac_unregister:
1260         ath11k_mac_unregister(ab);
1261 err_pdev_debug:
1262         ath11k_debugfs_pdev_destroy(ab);
1263
1264         return ret;
1265 }
1266
1267 static void ath11k_core_pdev_destroy(struct ath11k_base *ab)
1268 {
1269         ath11k_spectral_deinit(ab);
1270         ath11k_thermal_unregister(ab);
1271         ath11k_mac_unregister(ab);
1272         ath11k_hif_irq_disable(ab);
1273         ath11k_dp_pdev_free(ab);
1274         ath11k_debugfs_pdev_destroy(ab);
1275 }
1276
1277 static int ath11k_core_start(struct ath11k_base *ab)
1278 {
1279         int ret;
1280
1281         ret = ath11k_wmi_attach(ab);
1282         if (ret) {
1283                 ath11k_err(ab, "failed to attach wmi: %d\n", ret);
1284                 return ret;
1285         }
1286
1287         ret = ath11k_htc_init(ab);
1288         if (ret) {
1289                 ath11k_err(ab, "failed to init htc: %d\n", ret);
1290                 goto err_wmi_detach;
1291         }
1292
1293         ret = ath11k_hif_start(ab);
1294         if (ret) {
1295                 ath11k_err(ab, "failed to start HIF: %d\n", ret);
1296                 goto err_wmi_detach;
1297         }
1298
1299         ret = ath11k_htc_wait_target(&ab->htc);
1300         if (ret) {
1301                 ath11k_err(ab, "failed to connect to HTC: %d\n", ret);
1302                 goto err_hif_stop;
1303         }
1304
1305         ret = ath11k_dp_htt_connect(&ab->dp);
1306         if (ret) {
1307                 ath11k_err(ab, "failed to connect to HTT: %d\n", ret);
1308                 goto err_hif_stop;
1309         }
1310
1311         ret = ath11k_wmi_connect(ab);
1312         if (ret) {
1313                 ath11k_err(ab, "failed to connect wmi: %d\n", ret);
1314                 goto err_hif_stop;
1315         }
1316
1317         ret = ath11k_htc_start(&ab->htc);
1318         if (ret) {
1319                 ath11k_err(ab, "failed to start HTC: %d\n", ret);
1320                 goto err_hif_stop;
1321         }
1322
1323         ret = ath11k_wmi_wait_for_service_ready(ab);
1324         if (ret) {
1325                 ath11k_err(ab, "failed to receive wmi service ready event: %d\n",
1326                            ret);
1327                 goto err_hif_stop;
1328         }
1329
1330         ret = ath11k_mac_allocate(ab);
1331         if (ret) {
1332                 ath11k_err(ab, "failed to create new hw device with mac80211 :%d\n",
1333                            ret);
1334                 goto err_hif_stop;
1335         }
1336
1337         ath11k_dp_pdev_pre_alloc(ab);
1338
1339         ret = ath11k_dp_pdev_reo_setup(ab);
1340         if (ret) {
1341                 ath11k_err(ab, "failed to initialize reo destination rings: %d\n", ret);
1342                 goto err_mac_destroy;
1343         }
1344
1345         ret = ath11k_wmi_cmd_init(ab);
1346         if (ret) {
1347                 ath11k_err(ab, "failed to send wmi init cmd: %d\n", ret);
1348                 goto err_reo_cleanup;
1349         }
1350
1351         ret = ath11k_wmi_wait_for_unified_ready(ab);
1352         if (ret) {
1353                 ath11k_err(ab, "failed to receive wmi unified ready event: %d\n",
1354                            ret);
1355                 goto err_reo_cleanup;
1356         }
1357
1358         /* put hardware to DBS mode */
1359         if (ab->hw_params.single_pdev_only && ab->hw_params.num_rxmda_per_pdev > 1) {
1360                 ret = ath11k_wmi_set_hw_mode(ab, WMI_HOST_HW_MODE_DBS);
1361                 if (ret) {
1362                         ath11k_err(ab, "failed to send dbs mode: %d\n", ret);
1363                         goto err_hif_stop;
1364                 }
1365         }
1366
1367         ret = ath11k_dp_tx_htt_h2t_ver_req_msg(ab);
1368         if (ret) {
1369                 ath11k_err(ab, "failed to send htt version request message: %d\n",
1370                            ret);
1371                 goto err_reo_cleanup;
1372         }
1373
1374         return 0;
1375
1376 err_reo_cleanup:
1377         ath11k_dp_pdev_reo_cleanup(ab);
1378 err_mac_destroy:
1379         ath11k_mac_destroy(ab);
1380 err_hif_stop:
1381         ath11k_hif_stop(ab);
1382 err_wmi_detach:
1383         ath11k_wmi_detach(ab);
1384
1385         return ret;
1386 }
1387
1388 static int ath11k_core_start_firmware(struct ath11k_base *ab,
1389                                       enum ath11k_firmware_mode mode)
1390 {
1391         int ret;
1392
1393         ath11k_ce_get_shadow_config(ab, &ab->qmi.ce_cfg.shadow_reg_v2,
1394                                     &ab->qmi.ce_cfg.shadow_reg_v2_len);
1395
1396         ret = ath11k_qmi_firmware_start(ab, mode);
1397         if (ret) {
1398                 ath11k_err(ab, "failed to send firmware start: %d\n", ret);
1399                 return ret;
1400         }
1401
1402         return ret;
1403 }
1404
1405 static int ath11k_core_rfkill_config(struct ath11k_base *ab)
1406 {
1407         struct ath11k *ar;
1408         int ret = 0, i;
1409
1410         if (!(ab->target_caps.sys_cap_info & WMI_SYS_CAP_INFO_RFKILL))
1411                 return 0;
1412
1413         for (i = 0; i < ab->num_radios; i++) {
1414                 ar = ab->pdevs[i].ar;
1415
1416                 ret = ath11k_mac_rfkill_config(ar);
1417                 if (ret && ret != -EOPNOTSUPP) {
1418                         ath11k_warn(ab, "failed to configure rfkill: %d", ret);
1419                         return ret;
1420                 }
1421         }
1422
1423         return ret;
1424 }
1425
1426 int ath11k_core_qmi_firmware_ready(struct ath11k_base *ab)
1427 {
1428         int ret;
1429
1430         ret = ath11k_core_start_firmware(ab, ATH11K_FIRMWARE_MODE_NORMAL);
1431         if (ret) {
1432                 ath11k_err(ab, "failed to start firmware: %d\n", ret);
1433                 return ret;
1434         }
1435
1436         ret = ath11k_ce_init_pipes(ab);
1437         if (ret) {
1438                 ath11k_err(ab, "failed to initialize CE: %d\n", ret);
1439                 goto err_firmware_stop;
1440         }
1441
1442         ret = ath11k_dp_alloc(ab);
1443         if (ret) {
1444                 ath11k_err(ab, "failed to init DP: %d\n", ret);
1445                 goto err_firmware_stop;
1446         }
1447
1448         switch (ath11k_crypto_mode) {
1449         case ATH11K_CRYPT_MODE_SW:
1450                 set_bit(ATH11K_FLAG_HW_CRYPTO_DISABLED, &ab->dev_flags);
1451                 set_bit(ATH11K_FLAG_RAW_MODE, &ab->dev_flags);
1452                 break;
1453         case ATH11K_CRYPT_MODE_HW:
1454                 clear_bit(ATH11K_FLAG_HW_CRYPTO_DISABLED, &ab->dev_flags);
1455                 clear_bit(ATH11K_FLAG_RAW_MODE, &ab->dev_flags);
1456                 break;
1457         default:
1458                 ath11k_info(ab, "invalid crypto_mode: %d\n", ath11k_crypto_mode);
1459                 return -EINVAL;
1460         }
1461
1462         if (ath11k_frame_mode == ATH11K_HW_TXRX_RAW)
1463                 set_bit(ATH11K_FLAG_RAW_MODE, &ab->dev_flags);
1464
1465         mutex_lock(&ab->core_lock);
1466         ret = ath11k_core_start(ab);
1467         if (ret) {
1468                 ath11k_err(ab, "failed to start core: %d\n", ret);
1469                 goto err_dp_free;
1470         }
1471
1472         ret = ath11k_core_pdev_create(ab);
1473         if (ret) {
1474                 ath11k_err(ab, "failed to create pdev core: %d\n", ret);
1475                 goto err_core_stop;
1476         }
1477         ath11k_hif_irq_enable(ab);
1478
1479         ret = ath11k_core_rfkill_config(ab);
1480         if (ret && ret != -EOPNOTSUPP) {
1481                 ath11k_err(ab, "failed to config rfkill: %d\n", ret);
1482                 goto err_core_stop;
1483         }
1484
1485         mutex_unlock(&ab->core_lock);
1486
1487         return 0;
1488
1489 err_core_stop:
1490         ath11k_core_stop(ab);
1491         ath11k_mac_destroy(ab);
1492 err_dp_free:
1493         ath11k_dp_free(ab);
1494         mutex_unlock(&ab->core_lock);
1495 err_firmware_stop:
1496         ath11k_qmi_firmware_stop(ab);
1497
1498         return ret;
1499 }
1500
1501 static int ath11k_core_reconfigure_on_crash(struct ath11k_base *ab)
1502 {
1503         int ret;
1504
1505         mutex_lock(&ab->core_lock);
1506         ath11k_thermal_unregister(ab);
1507         ath11k_hif_irq_disable(ab);
1508         ath11k_dp_pdev_free(ab);
1509         ath11k_spectral_deinit(ab);
1510         ath11k_hif_stop(ab);
1511         ath11k_wmi_detach(ab);
1512         ath11k_dp_pdev_reo_cleanup(ab);
1513         mutex_unlock(&ab->core_lock);
1514
1515         ath11k_dp_free(ab);
1516         ath11k_hal_srng_deinit(ab);
1517
1518         ab->free_vdev_map = (1LL << (ab->num_radios * TARGET_NUM_VDEVS(ab))) - 1;
1519
1520         ret = ath11k_hal_srng_init(ab);
1521         if (ret)
1522                 return ret;
1523
1524         clear_bit(ATH11K_FLAG_CRASH_FLUSH, &ab->dev_flags);
1525
1526         ret = ath11k_core_qmi_firmware_ready(ab);
1527         if (ret)
1528                 goto err_hal_srng_deinit;
1529
1530         clear_bit(ATH11K_FLAG_RECOVERY, &ab->dev_flags);
1531
1532         return 0;
1533
1534 err_hal_srng_deinit:
1535         ath11k_hal_srng_deinit(ab);
1536         return ret;
1537 }
1538
1539 void ath11k_core_halt(struct ath11k *ar)
1540 {
1541         struct ath11k_base *ab = ar->ab;
1542
1543         lockdep_assert_held(&ar->conf_mutex);
1544
1545         ar->num_created_vdevs = 0;
1546         ar->allocated_vdev_map = 0;
1547
1548         ath11k_mac_scan_finish(ar);
1549         ath11k_mac_peer_cleanup_all(ar);
1550         cancel_delayed_work_sync(&ar->scan.timeout);
1551         cancel_work_sync(&ar->regd_update_work);
1552         cancel_work_sync(&ab->update_11d_work);
1553         cancel_work_sync(&ab->rfkill_work);
1554
1555         rcu_assign_pointer(ab->pdevs_active[ar->pdev_idx], NULL);
1556         synchronize_rcu();
1557         INIT_LIST_HEAD(&ar->arvifs);
1558         idr_init(&ar->txmgmt_idr);
1559 }
1560
1561 static void ath11k_rfkill_work(struct work_struct *work)
1562 {
1563         struct ath11k_base *ab = container_of(work, struct ath11k_base, rfkill_work);
1564         struct ath11k *ar;
1565         bool rfkill_radio_on;
1566         int i;
1567
1568         spin_lock_bh(&ab->base_lock);
1569         rfkill_radio_on = ab->rfkill_radio_on;
1570         spin_unlock_bh(&ab->base_lock);
1571
1572         for (i = 0; i < ab->num_radios; i++) {
1573                 ar = ab->pdevs[i].ar;
1574                 if (!ar)
1575                         continue;
1576
1577                 /* notify cfg80211 radio state change */
1578                 ath11k_mac_rfkill_enable_radio(ar, rfkill_radio_on);
1579                 wiphy_rfkill_set_hw_state(ar->hw->wiphy, !rfkill_radio_on);
1580         }
1581 }
1582
1583 static void ath11k_update_11d(struct work_struct *work)
1584 {
1585         struct ath11k_base *ab = container_of(work, struct ath11k_base, update_11d_work);
1586         struct ath11k *ar;
1587         struct ath11k_pdev *pdev;
1588         struct wmi_set_current_country_params set_current_param = {};
1589         int ret, i;
1590
1591         spin_lock_bh(&ab->base_lock);
1592         memcpy(&set_current_param.alpha2, &ab->new_alpha2, 2);
1593         spin_unlock_bh(&ab->base_lock);
1594
1595         ath11k_dbg(ab, ATH11K_DBG_WMI, "update 11d new cc %c%c\n",
1596                    set_current_param.alpha2[0],
1597                    set_current_param.alpha2[1]);
1598
1599         for (i = 0; i < ab->num_radios; i++) {
1600                 pdev = &ab->pdevs[i];
1601                 ar = pdev->ar;
1602
1603                 memcpy(&ar->alpha2, &set_current_param.alpha2, 2);
1604                 ret = ath11k_wmi_send_set_current_country_cmd(ar, &set_current_param);
1605                 if (ret)
1606                         ath11k_warn(ar->ab,
1607                                     "pdev id %d failed set current country code: %d\n",
1608                                     i, ret);
1609         }
1610 }
1611
1612 static void ath11k_core_pre_reconfigure_recovery(struct ath11k_base *ab)
1613 {
1614         struct ath11k *ar;
1615         struct ath11k_pdev *pdev;
1616         int i;
1617
1618         spin_lock_bh(&ab->base_lock);
1619         ab->stats.fw_crash_counter++;
1620         spin_unlock_bh(&ab->base_lock);
1621
1622         for (i = 0; i < ab->num_radios; i++) {
1623                 pdev = &ab->pdevs[i];
1624                 ar = pdev->ar;
1625                 if (!ar || ar->state == ATH11K_STATE_OFF)
1626                         continue;
1627
1628                 ieee80211_stop_queues(ar->hw);
1629                 ath11k_mac_drain_tx(ar);
1630                 ar->state_11d = ATH11K_11D_IDLE;
1631                 complete(&ar->completed_11d_scan);
1632                 complete(&ar->scan.started);
1633                 complete(&ar->scan.completed);
1634                 complete(&ar->scan.on_channel);
1635                 complete(&ar->peer_assoc_done);
1636                 complete(&ar->peer_delete_done);
1637                 complete(&ar->install_key_done);
1638                 complete(&ar->vdev_setup_done);
1639                 complete(&ar->vdev_delete_done);
1640                 complete(&ar->bss_survey_done);
1641                 complete(&ar->thermal.wmi_sync);
1642
1643                 wake_up(&ar->dp.tx_empty_waitq);
1644                 idr_for_each(&ar->txmgmt_idr,
1645                              ath11k_mac_tx_mgmt_pending_free, ar);
1646                 idr_destroy(&ar->txmgmt_idr);
1647                 wake_up(&ar->txmgmt_empty_waitq);
1648         }
1649
1650         wake_up(&ab->wmi_ab.tx_credits_wq);
1651         wake_up(&ab->peer_mapping_wq);
1652 }
1653
1654 static void ath11k_core_post_reconfigure_recovery(struct ath11k_base *ab)
1655 {
1656         struct ath11k *ar;
1657         struct ath11k_pdev *pdev;
1658         int i;
1659
1660         for (i = 0; i < ab->num_radios; i++) {
1661                 pdev = &ab->pdevs[i];
1662                 ar = pdev->ar;
1663                 if (!ar || ar->state == ATH11K_STATE_OFF)
1664                         continue;
1665
1666                 mutex_lock(&ar->conf_mutex);
1667
1668                 switch (ar->state) {
1669                 case ATH11K_STATE_ON:
1670                         ar->state = ATH11K_STATE_RESTARTING;
1671                         ath11k_core_halt(ar);
1672                         ieee80211_restart_hw(ar->hw);
1673                         break;
1674                 case ATH11K_STATE_OFF:
1675                         ath11k_warn(ab,
1676                                     "cannot restart radio %d that hasn't been started\n",
1677                                     i);
1678                         break;
1679                 case ATH11K_STATE_RESTARTING:
1680                         break;
1681                 case ATH11K_STATE_RESTARTED:
1682                         ar->state = ATH11K_STATE_WEDGED;
1683                         fallthrough;
1684                 case ATH11K_STATE_WEDGED:
1685                         ath11k_warn(ab,
1686                                     "device is wedged, will not restart radio %d\n", i);
1687                         break;
1688                 }
1689                 mutex_unlock(&ar->conf_mutex);
1690         }
1691         complete(&ab->driver_recovery);
1692 }
1693
1694 static void ath11k_core_restart(struct work_struct *work)
1695 {
1696         struct ath11k_base *ab = container_of(work, struct ath11k_base, restart_work);
1697         int ret;
1698
1699         if (!ab->is_reset)
1700                 ath11k_core_pre_reconfigure_recovery(ab);
1701
1702         ret = ath11k_core_reconfigure_on_crash(ab);
1703         if (ret) {
1704                 ath11k_err(ab, "failed to reconfigure driver on crash recovery\n");
1705                 return;
1706         }
1707
1708         if (ab->is_reset)
1709                 complete_all(&ab->reconfigure_complete);
1710
1711         if (!ab->is_reset)
1712                 ath11k_core_post_reconfigure_recovery(ab);
1713 }
1714
1715 static void ath11k_core_reset(struct work_struct *work)
1716 {
1717         struct ath11k_base *ab = container_of(work, struct ath11k_base, reset_work);
1718         int reset_count, fail_cont_count;
1719         long time_left;
1720
1721         if (!(test_bit(ATH11K_FLAG_REGISTERED, &ab->dev_flags))) {
1722                 ath11k_warn(ab, "ignore reset dev flags 0x%lx\n", ab->dev_flags);
1723                 return;
1724         }
1725
1726         /* Sometimes the recovery will fail and then the next all recovery fail,
1727          * this is to avoid infinite recovery since it can not recovery success.
1728          */
1729         fail_cont_count = atomic_read(&ab->fail_cont_count);
1730
1731         if (fail_cont_count >= ATH11K_RESET_MAX_FAIL_COUNT_FINAL)
1732                 return;
1733
1734         if (fail_cont_count >= ATH11K_RESET_MAX_FAIL_COUNT_FIRST &&
1735             time_before(jiffies, ab->reset_fail_timeout))
1736                 return;
1737
1738         reset_count = atomic_inc_return(&ab->reset_count);
1739
1740         if (reset_count > 1) {
1741                 /* Sometimes it happened another reset worker before the previous one
1742                  * completed, then the second reset worker will destroy the previous one,
1743                  * thus below is to avoid that.
1744                  */
1745                 ath11k_warn(ab, "already resetting count %d\n", reset_count);
1746
1747                 reinit_completion(&ab->reset_complete);
1748                 time_left = wait_for_completion_timeout(&ab->reset_complete,
1749                                                         ATH11K_RESET_TIMEOUT_HZ);
1750
1751                 if (time_left) {
1752                         ath11k_dbg(ab, ATH11K_DBG_BOOT, "to skip reset\n");
1753                         atomic_dec(&ab->reset_count);
1754                         return;
1755                 }
1756
1757                 ab->reset_fail_timeout = jiffies + ATH11K_RESET_FAIL_TIMEOUT_HZ;
1758                 /* Record the continuous recovery fail count when recovery failed*/
1759                 atomic_inc(&ab->fail_cont_count);
1760         }
1761
1762         ath11k_dbg(ab, ATH11K_DBG_BOOT, "reset starting\n");
1763
1764         ab->is_reset = true;
1765         atomic_set(&ab->recovery_count, 0);
1766         reinit_completion(&ab->recovery_start);
1767         atomic_set(&ab->recovery_start_count, 0);
1768
1769         ath11k_core_pre_reconfigure_recovery(ab);
1770
1771         reinit_completion(&ab->reconfigure_complete);
1772         ath11k_core_post_reconfigure_recovery(ab);
1773
1774         ath11k_dbg(ab, ATH11K_DBG_BOOT, "waiting recovery start...\n");
1775
1776         time_left = wait_for_completion_timeout(&ab->recovery_start,
1777                                                 ATH11K_RECOVER_START_TIMEOUT_HZ);
1778
1779         ath11k_hif_power_down(ab);
1780         ath11k_hif_power_up(ab);
1781
1782         ath11k_dbg(ab, ATH11K_DBG_BOOT, "reset started\n");
1783 }
1784
1785 static int ath11k_init_hw_params(struct ath11k_base *ab)
1786 {
1787         const struct ath11k_hw_params *hw_params = NULL;
1788         int i;
1789
1790         for (i = 0; i < ARRAY_SIZE(ath11k_hw_params); i++) {
1791                 hw_params = &ath11k_hw_params[i];
1792
1793                 if (hw_params->hw_rev == ab->hw_rev)
1794                         break;
1795         }
1796
1797         if (i == ARRAY_SIZE(ath11k_hw_params)) {
1798                 ath11k_err(ab, "Unsupported hardware version: 0x%x\n", ab->hw_rev);
1799                 return -EINVAL;
1800         }
1801
1802         ab->hw_params = *hw_params;
1803
1804         ath11k_info(ab, "%s\n", ab->hw_params.name);
1805
1806         return 0;
1807 }
1808
1809 int ath11k_core_pre_init(struct ath11k_base *ab)
1810 {
1811         int ret;
1812
1813         ret = ath11k_init_hw_params(ab);
1814         if (ret) {
1815                 ath11k_err(ab, "failed to get hw params: %d\n", ret);
1816                 return ret;
1817         }
1818
1819         return 0;
1820 }
1821 EXPORT_SYMBOL(ath11k_core_pre_init);
1822
1823 int ath11k_core_init(struct ath11k_base *ab)
1824 {
1825         int ret;
1826
1827         ret = ath11k_core_soc_create(ab);
1828         if (ret) {
1829                 ath11k_err(ab, "failed to create soc core: %d\n", ret);
1830                 return ret;
1831         }
1832
1833         return 0;
1834 }
1835 EXPORT_SYMBOL(ath11k_core_init);
1836
1837 void ath11k_core_deinit(struct ath11k_base *ab)
1838 {
1839         mutex_lock(&ab->core_lock);
1840
1841         ath11k_core_pdev_destroy(ab);
1842         ath11k_core_stop(ab);
1843
1844         mutex_unlock(&ab->core_lock);
1845
1846         ath11k_hif_power_down(ab);
1847         ath11k_mac_destroy(ab);
1848         ath11k_core_soc_destroy(ab);
1849 }
1850 EXPORT_SYMBOL(ath11k_core_deinit);
1851
1852 void ath11k_core_free(struct ath11k_base *ab)
1853 {
1854         destroy_workqueue(ab->workqueue_aux);
1855         destroy_workqueue(ab->workqueue);
1856
1857         kfree(ab);
1858 }
1859 EXPORT_SYMBOL(ath11k_core_free);
1860
1861 struct ath11k_base *ath11k_core_alloc(struct device *dev, size_t priv_size,
1862                                       enum ath11k_bus bus)
1863 {
1864         struct ath11k_base *ab;
1865
1866         ab = kzalloc(sizeof(*ab) + priv_size, GFP_KERNEL);
1867         if (!ab)
1868                 return NULL;
1869
1870         init_completion(&ab->driver_recovery);
1871
1872         ab->workqueue = create_singlethread_workqueue("ath11k_wq");
1873         if (!ab->workqueue)
1874                 goto err_sc_free;
1875
1876         ab->workqueue_aux = create_singlethread_workqueue("ath11k_aux_wq");
1877         if (!ab->workqueue_aux)
1878                 goto err_free_wq;
1879
1880         mutex_init(&ab->core_lock);
1881         mutex_init(&ab->tbl_mtx_lock);
1882         spin_lock_init(&ab->base_lock);
1883         mutex_init(&ab->vdev_id_11d_lock);
1884         init_completion(&ab->reset_complete);
1885         init_completion(&ab->reconfigure_complete);
1886         init_completion(&ab->recovery_start);
1887
1888         INIT_LIST_HEAD(&ab->peers);
1889         init_waitqueue_head(&ab->peer_mapping_wq);
1890         init_waitqueue_head(&ab->wmi_ab.tx_credits_wq);
1891         init_waitqueue_head(&ab->qmi.cold_boot_waitq);
1892         INIT_WORK(&ab->restart_work, ath11k_core_restart);
1893         INIT_WORK(&ab->update_11d_work, ath11k_update_11d);
1894         INIT_WORK(&ab->rfkill_work, ath11k_rfkill_work);
1895         INIT_WORK(&ab->reset_work, ath11k_core_reset);
1896         timer_setup(&ab->rx_replenish_retry, ath11k_ce_rx_replenish_retry, 0);
1897         init_completion(&ab->htc_suspend);
1898         init_completion(&ab->wow.wakeup_completed);
1899
1900         ab->dev = dev;
1901         ab->hif.bus = bus;
1902
1903         return ab;
1904
1905 err_free_wq:
1906         destroy_workqueue(ab->workqueue);
1907 err_sc_free:
1908         kfree(ab);
1909         return NULL;
1910 }
1911 EXPORT_SYMBOL(ath11k_core_alloc);
1912
1913 MODULE_DESCRIPTION("Core module for Qualcomm Atheros 802.11ax wireless LAN cards.");
1914 MODULE_LICENSE("Dual BSD/GPL");