2 * Copyright (c) 2015 Qualcomm Atheros, Inc.
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
20 #define ATH10K_SWAP_CODE_SEG_BIN_LEN_MAX (512 * 1024)
21 #define ATH10K_SWAP_CODE_SEG_MAGIC_BYTES_SZ 12
22 #define ATH10K_SWAP_CODE_SEG_NUM_MAX 16
23 /* Currently only one swap segment is supported */
24 #define ATH10K_SWAP_CODE_SEG_NUM_SUPPORTED 1
26 struct ath10k_fw_file;
28 struct ath10k_swap_code_seg_tlv {
34 struct ath10k_swap_code_seg_tail {
35 u8 magic_signature[ATH10K_SWAP_CODE_SEG_MAGIC_BYTES_SZ];
36 __le32 bmi_write_addr;
39 union ath10k_swap_code_seg_item {
40 struct ath10k_swap_code_seg_tlv tlv;
41 struct ath10k_swap_code_seg_tail tail;
44 struct ath10k_swap_code_seg_hw_info {
45 /* Swap binary image size */
52 __le32 bus_addr[ATH10K_SWAP_CODE_SEG_NUM_MAX];
53 __le64 reserved[ATH10K_SWAP_CODE_SEG_NUM_MAX];
56 struct ath10k_swap_code_seg_info {
57 struct ath10k_swap_code_seg_hw_info seg_hw_info;
58 void *virt_address[ATH10K_SWAP_CODE_SEG_NUM_SUPPORTED];
60 dma_addr_t paddr[ATH10K_SWAP_CODE_SEG_NUM_SUPPORTED];
63 int ath10k_swap_code_seg_configure(struct ath10k *ar,
64 const struct ath10k_fw_file *fw_file);
65 void ath10k_swap_code_seg_release(struct ath10k *ar,
66 struct ath10k_fw_file *fw_file);
67 int ath10k_swap_code_seg_init(struct ath10k *ar,
68 struct ath10k_fw_file *fw_file);